ReactOS  0.4.10-dev-358-g66981e1
halp.h File Reference
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Classes

struct  _HAL_BIOS_FRAME
 
union  _TIMER_CONTROL_PORT_REGISTER
 
union  _SYSTEM_CONTROL_PORT_B_REGISTER
 
union  _I8259_ICW1
 
union  _I8259_ICW2
 
union  _I8259_ICW3
 
union  _I8259_ICW4
 
union  _I8259_OCW2
 
union  _I8259_OCW3
 
union  _I8259_ISR
 
union  _EISA_ELCR
 
struct  _PIC_MASK
 
struct  _IDTUsageFlags
 
struct  IDTUsage
 
struct  _HalAddressUsage
 

Macros

#define INIT_SECTION   /* Done via alloc_text for MSC */
 
#define HAL_BUILD_TYPE   ((DBG ? PRCB_BUILD_DEBUG : 0) | PRCB_BUILD_UNIPROCESSOR)
 
#define HAL_APC_REQUEST   0
 
#define HAL_DPC_REQUEST   1
 
#define HAL_PROFILING_INTERVAL   0
 
#define HAL_PROFILING_MULTIPLIER   1
 
#define CMOS_CONTROL_PORT   (PUCHAR)0x70
 
#define CMOS_DATA_PORT   (PUCHAR)0x71
 
#define RTC_REGISTER_A   0x0A
 
#define RTC_REG_A_UIP   0x80
 
#define RTC_REGISTER_B   0x0B
 
#define RTC_REG_B_PI   0x40
 
#define RTC_REGISTER_C   0x0C
 
#define RTC_REG_C_IRQ   0x80
 
#define RTC_REGISTER_D   0x0D
 
#define RTC_REGISTER_CENTURY   0x32
 
#define IDT_REGISTERED   0x01
 
#define IDT_LATCHED   0x02
 
#define IDT_READ_ONLY   0x04
 
#define IDT_INTERNAL   0x11
 
#define IDT_DEVICE   0x21
 
#define BCD_INT(bcd)   (((bcd & 0xF0) >> 4) * 10 + (bcd & 0x0F))
 
#define INT_BCD(int)   (UCHAR)(((int / 10) << 4) + (int % 10))
 
#define VIDEO_SERVICES   0x10
 
#define SET_VIDEO_MODE   0x00
 
#define GRAPHICS_MODE_12   0x12 /* 80x30 8x16 640x480 16/256K */
 
#define PIT_FREQUENCY   1193182
 
#define TIMER_CHANNEL0_DATA_PORT   0x40
 
#define TIMER_CHANNEL1_DATA_PORT   0x41
 
#define TIMER_CHANNEL2_DATA_PORT   0x42
 
#define TIMER_CONTROL_PORT   0x43
 
#define SYSTEM_CONTROL_PORT_A   0x92
 
#define SYSTEM_CONTROL_PORT_B   0x61
 
#define PIC1_CONTROL_PORT   0x20
 
#define PIC1_DATA_PORT   0x21
 
#define PIC2_CONTROL_PORT   0xA0
 
#define PIC2_DATA_PORT   0xA1
 
#define EISA_ELCR_MASTER   0x4D0
 
#define EISA_ELCR_SLAVE   0x4D1
 
#define HALP_REVISION_FROM_HACK_FLAGS(x)   ((x) >> 24)
 
#define HALP_REVISION_HACK_FLAGS(x)   ((x) >> 12)
 
#define HALP_HACK_FLAGS(x)   ((x) & 0xFFF)
 
#define HALP_CARD_FEATURE_FULL_DECODE   0x0001
 
#define HALP_CHECK_CARD_REVISION_ID   0x10000
 
#define HALP_CHECK_CARD_SUBVENDOR_ID   0x20000
 
#define HALP_CHECK_CARD_SUBSYSTEM_ID   0x40000
 
#define HalAddressToPde(x)   (PHARDWARE_PTE)MiAddressToPde(x)
 
#define HalAddressToPte(x)   (PHARDWARE_PTE)MiAddressToPte(x)
 

Typedefs

typedef struct _HAL_BIOS_FRAME HAL_BIOS_FRAME
 
typedef struct _HAL_BIOS_FRAMEPHAL_BIOS_FRAME
 
typedef VOID(__cdeclPHAL_SW_INTERRUPT_HANDLER )(VOID)
 
typedef VOID(FASTCALLPHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY )(IN PKTRAP_FRAME TrapFrame)
 
typedef enum _TIMER_OPERATING_MODES TIMER_OPERATING_MODES
 
typedef enum _TIMER_ACCESS_MODES TIMER_ACCESS_MODES
 
typedef enum _TIMER_CHANNELS TIMER_CHANNELS
 
typedef union
_TIMER_CONTROL_PORT_REGISTER 
TIMER_CONTROL_PORT_REGISTER
 
typedef union
_TIMER_CONTROL_PORT_REGISTER
PTIMER_CONTROL_PORT_REGISTER
 
typedef union
_SYSTEM_CONTROL_PORT_B_REGISTER 
SYSTEM_CONTROL_PORT_B_REGISTER
 
typedef union
_SYSTEM_CONTROL_PORT_B_REGISTER
PSYSTEM_CONTROL_PORT_B_REGISTER
 
typedef enum
_I8259_ICW1_OPERATING_MODE 
I8259_ICW1_OPERATING_MODE
 
typedef enum
_I8259_ICW1_INTERRUPT_MODE 
I8259_ICW1_INTERRUPT_MODE
 
typedef enum _I8259_ICW1_INTERVAL I8259_ICW1_INTERVAL
 
typedef enum
_I8259_ICW4_SYSTEM_MODE 
I8259_ICW4_SYSTEM_MODE
 
typedef enum _I8259_ICW4_EOI_MODE I8259_ICW4_EOI_MODE
 
typedef enum
_I8259_ICW4_BUFFERED_MODE 
I8259_ICW4_BUFFERED_MODE
 
typedef enum _I8259_READ_REQUEST I8259_READ_REQUEST
 
typedef enum _I8259_EOI_MODE I8259_EOI_MODE
 
typedef union _I8259_ICW1 I8259_ICW1
 
typedef union _I8259_ICW1PI8259_ICW1
 
typedef union _I8259_ICW2 I8259_ICW2
 
typedef union _I8259_ICW2PI8259_ICW2
 
typedef union _I8259_ICW3 I8259_ICW3
 
typedef union _I8259_ICW3PI8259_ICW3
 
typedef union _I8259_ICW4 I8259_ICW4
 
typedef union _I8259_ICW4PI8259_ICW4
 
typedef union _I8259_OCW2 I8259_OCW2
 
typedef union _I8259_OCW2PI8259_OCW2
 
typedef union _I8259_OCW3 I8259_OCW3
 
typedef union _I8259_OCW3PI8259_OCW3
 
typedef union _I8259_ISR I8259_ISR
 
typedef union _I8259_ISRPI8259_ISR
 
typedef I8259_ISR I8259_IDR
 
typedef I8259_ISRPI8259_IDR
 
typedef union _EISA_ELCR EISA_ELCR
 
typedef union _EISA_ELCRPEISA_ELCR
 
typedef struct _PIC_MASK PIC_MASK
 
typedef struct _PIC_MASKPPIC_MASK
 
typedef BOOLEAN(NTAPIPHAL_DISMISS_INTERRUPT )(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
typedef struct _IDTUsageFlags IDTUsageFlags
 
typedef struct _HalAddressUsage ADDRESS_USAGE
 
typedef struct _HalAddressUsagePADDRESS_USAGE
 

Enumerations

enum  _TIMER_OPERATING_MODES {
  PitOperatingMode0, PitOperatingMode1, PitOperatingMode2, PitOperatingMode3,
  PitOperatingMode4, PitOperatingMode5, PitOperatingMode2Reserved, PitOperatingMode5Reserved
}
 
enum  _TIMER_ACCESS_MODES { PitAccessModeCounterLatch, PitAccessModeLow, PitAccessModeHigh, PitAccessModeLowHigh }
 
enum  _TIMER_CHANNELS { PitChannel0, PitChannel1, PitChannel2, PitReadBack }
 
enum  _I8259_ICW1_OPERATING_MODE { Cascade, Single }
 
enum  _I8259_ICW1_INTERRUPT_MODE { EdgeTriggered, LevelTriggered }
 
enum  _I8259_ICW1_INTERVAL { Interval8, Interval4 }
 
enum  _I8259_ICW4_SYSTEM_MODE { Mcs8085Mode, New8086Mode }
 
enum  _I8259_ICW4_EOI_MODE { NormalEoi, AutomaticEoi }
 
enum  _I8259_ICW4_BUFFERED_MODE { NonBuffered, NonBuffered2, BufferedSlave, BufferedMaster }
 
enum  _I8259_READ_REQUEST { InvalidRequest, InvalidRequest2, ReadIdr, ReadIsr }
 
enum  _I8259_EOI_MODE {
  RotateAutoEoiClear, NonSpecificEoi, InvalidEoiMode, SpecificEoi,
  RotateAutoEoiSet, RotateNonSpecific, SetPriority, RotateSpecific
}
 

Functions

BOOLEAN NTAPI HalpDismissIrqGeneric (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq15 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq13 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq07 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrqLevel (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq15Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq13Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq07Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
VOID __cdecl HalpHardwareInterruptLevel (VOID)
 
PADAPTER_OBJECT NTAPI HalpAllocateAdapterEx (ULONG NumberOfMapRegisters, BOOLEAN IsMaster, BOOLEAN Dma32BitAddresses)
 
VOID NTAPI HalpRegisterVector (IN UCHAR Flags, IN ULONG BusVector, IN ULONG SystemVector, IN KIRQL Irql)
 
VOID NTAPI HalpEnableInterruptHandler (IN UCHAR Flags, IN ULONG BusVector, IN ULONG SystemVector, IN KIRQL Irql, IN PVOID Handler, IN KINTERRUPT_MODE Mode)
 
VOID NTAPI HalpInitializePICs (IN BOOLEAN EnableInterrupts)
 
VOID __cdecl HalpApcInterrupt (VOID)
 
VOID __cdecl HalpDispatchInterrupt (VOID)
 
PHAL_SW_INTERRUPT_HANDLER __cdecl HalpDispatchInterrupt2 (VOID)
 
DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry (IN PKTRAP_FRAME TrapFrame)
 
DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry (IN PKTRAP_FRAME TrapFrame)
 
VOID NTAPI HalpInitializeClock (VOID)
 
VOID __cdecl HalpClockInterrupt (VOID)
 
VOID __cdecl HalpProfileInterrupt (VOID)
 
VOID NTAPI HalpCalibrateStallExecution (VOID)
 
VOID HalpInitPciBus (VOID)
 
VOID HalpInitDma (VOID)
 
VOID HalpInitPhase0 (PLOADER_PARAMETER_BLOCK LoaderBlock)
 
VOID HalpInitPhase1 (VOID)
 
VOID NTAPI HalpFlushTLB (VOID)
 
VOID NTAPI HalpCheckPowerButton (VOID)
 
VOID NTAPI HalpRegisterKdSupportFunctions (VOID)
 
NTSTATUS NTAPI HalpSetupPciDeviceForDebugging (IN PVOID LoaderBlock, IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice)
 
NTSTATUS NTAPI HalpReleasePciDeviceForDebugging (IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice)
 
ULONG64 NTAPI HalpAllocPhysicalMemory (IN PLOADER_PARAMETER_BLOCK LoaderBlock, IN ULONG64 MaxAddress, IN PFN_NUMBER PageCount, IN BOOLEAN Aligned)
 
PVOID NTAPI HalpMapPhysicalMemory64 (IN PHYSICAL_ADDRESS PhysicalAddress, IN PFN_COUNT PageCount)
 
VOID NTAPI HalpUnmapVirtualAddress (IN PVOID VirtualAddress, IN PFN_COUNT NumberPages)
 
NTSTATUS NTAPI HaliQuerySystemInformation (IN HAL_QUERY_INFORMATION_CLASS InformationClass, IN ULONG BufferSize, IN OUT PVOID Buffer, OUT PULONG ReturnedLength)
 
NTSTATUS NTAPI HaliSetSystemInformation (IN HAL_SET_INFORMATION_CLASS InformationClass, IN ULONG BufferSize, IN OUT PVOID Buffer)
 
BOOLEAN NTAPI HalpBiosDisplayReset (VOID)
 
VOID FASTCALL HalpExitToV86 (PKTRAP_FRAME TrapFrame)
 
VOID __cdecl HalpRealModeStart (VOID)
 
VOID NTAPI HaliHaltSystem (VOID)
 
VOID NTAPI HalpInitializeCmos (VOID)
 
UCHAR NTAPI HalpReadCmos (IN UCHAR Reg)
 
VOID NTAPI HalpWriteCmos (IN UCHAR Reg, IN UCHAR Value)
 
VOID NTAPI HalpAcquireCmosSpinLock (VOID)
 
VOID NTAPI HalpReleaseCmosSpinLock (VOID)
 
VOID NTAPI HalpInitializeLegacyPICs (VOID)
 
NTSTATUS NTAPI HalpOpenRegistryKey (IN PHANDLE KeyHandle, IN HANDLE RootKey, IN PUNICODE_STRING KeyName, IN ACCESS_MASK DesiredAccess, IN BOOLEAN Create)
 
VOID NTAPI HalpGetNMICrashFlag (VOID)
 
BOOLEAN NTAPI HalpGetDebugPortTable (VOID)
 
VOID NTAPI HalpReportSerialNumber (VOID)
 
NTSTATUS NTAPI HalpMarkAcpiHal (VOID)
 
VOID NTAPI HalpBuildAddressMap (VOID)
 
VOID NTAPI HalpReportResourceUsage (IN PUNICODE_STRING HalName, IN INTERFACE_TYPE InterfaceType)
 
ULONG NTAPI HalpIs16BitPortDecodeSupported (VOID)
 
NTSTATUS NTAPI HalpQueryAcpiResourceRequirements (OUT PIO_RESOURCE_REQUIREMENTS_LIST *Requirements)
 
VOID FASTCALL KeUpdateSystemTime (IN PKTRAP_FRAME TrapFrame, IN ULONG Increment, IN KIRQL OldIrql)
 
VOID NTAPI HalpInitBusHandlers (VOID)
 
NTSTATUS NTAPI HaliInitPnpDriver (VOID)
 
VOID NTAPI HalpDebugPciDumpBus (IN ULONG i, IN ULONG j, IN ULONG k, IN PPCI_COMMON_CONFIG PciData)
 
VOID NTAPI HalpInitProcessor (IN ULONG ProcessorNumber, IN PLOADER_PARAMETER_BLOCK LoaderBlock)
 

Variables

BOOLEAN HalpProfilingStopped
 
BOOLEAN HalpNMIInProgress
 
ADDRESS_USAGE HalpDefaultIoSpace
 
KSPIN_LOCK HalpSystemHardwareLock
 
PADDRESS_USAGE HalpAddressUsageList
 
LARGE_INTEGER HalpPerfCounter
 
KAFFINITY HalpActiveProcessors
 
BOOLEAN HalDisableFirmwareMapper
 
PWCHAR HalHardwareIdString
 
PWCHAR HalName
 
KAFFINITY HalpDefaultInterruptAffinity
 
IDTUsageFlags HalpIDTUsageFlags [MAXIMUM_IDTVECTOR+1]
 
const USHORT HalpBuildType
 

Macro Definition Documentation

#define BCD_INT (   bcd)    (((bcd & 0xF0) >> 4) * 10 + (bcd & 0x0F))

Definition at line 76 of file halp.h.

#define CMOS_CONTROL_PORT   (PUCHAR)0x70

Definition at line 57 of file halp.h.

#define CMOS_DATA_PORT   (PUCHAR)0x71

Definition at line 58 of file halp.h.

#define EISA_ELCR_MASTER   0x4D0

Definition at line 383 of file halp.h.

Referenced by HalpInitializePICs().

#define EISA_ELCR_SLAVE   0x4D1

Definition at line 384 of file halp.h.

Referenced by HalpInitializePICs().

#define GRAPHICS_MODE_12   0x12 /* 80x30 8x16 640x480 16/256K */

Definition at line 94 of file halp.h.

#define HAL_APC_REQUEST   0

Definition at line 49 of file halp.h.

#define HAL_BUILD_TYPE   ((DBG ? PRCB_BUILD_DEBUG : 0) | PRCB_BUILD_UNIPROCESSOR)

Definition at line 17 of file halp.h.

#define HAL_DPC_REQUEST   1

Definition at line 50 of file halp.h.

#define HAL_PROFILING_INTERVAL   0

Definition at line 53 of file halp.h.

Referenced by HalInitializeProfiling(), HalSetProfileInterval(), and HalStartProfileInterrupt().

#define HAL_PROFILING_MULTIPLIER   1

Definition at line 54 of file halp.h.

Referenced by HalInitializeProfiling(), and HalSetProfileInterval().

#define HalAddressToPde (   x)    (PHARDWARE_PTE)MiAddressToPde(x)

Definition at line 529 of file halp.h.

Referenced by HalpMapRealModeMemory(), and HalpUnmapRealModeMemory().

#define HALP_CARD_FEATURE_FULL_DECODE   0x0001

Definition at line 517 of file halp.h.

Referenced by HalpInitializePciBus().

#define HALP_CHECK_CARD_REVISION_ID   0x10000

Definition at line 522 of file halp.h.

Referenced by HalpIsRecognizedCard().

#define HALP_CHECK_CARD_SUBSYSTEM_ID   0x40000

Definition at line 524 of file halp.h.

Referenced by HalpIsRecognizedCard().

#define HALP_CHECK_CARD_SUBVENDOR_ID   0x20000

Definition at line 523 of file halp.h.

Referenced by HalpIsRecognizedCard().

#define HALP_HACK_FLAGS (   x)    ((x) & 0xFFF)

Definition at line 512 of file halp.h.

Referenced by HalpGetChipHacks().

#define HALP_REVISION_FROM_HACK_FLAGS (   x)    ((x) >> 24)

Definition at line 510 of file halp.h.

Referenced by HalpGetChipHacks().

#define HALP_REVISION_HACK_FLAGS (   x)    ((x) >> 12)

Definition at line 511 of file halp.h.

Referenced by HalpGetChipHacks().

#define IDT_DEVICE   0x21

Definition at line 73 of file halp.h.

#define IDT_INTERNAL   0x11

Definition at line 72 of file halp.h.

#define IDT_LATCHED   0x02

Definition at line 70 of file halp.h.

#define IDT_READ_ONLY   0x04

Definition at line 71 of file halp.h.

Referenced by HalpBuildPartialFromAddress().

#define IDT_REGISTERED   0x01

Definition at line 69 of file halp.h.

#define INIT_SECTION   /* Done via alloc_text for MSC */

Definition at line 10 of file halp.h.

#define INT_BCD (   int)    (UCHAR)(((int / 10) << 4) + (int % 10))

Definition at line 78 of file halp.h.

#define PIC2_CONTROL_PORT   0xA0
#define PIT_FREQUENCY   1193182

Definition at line 113 of file halp.h.

Referenced by HalMakeBeep(), and KeQueryPerformanceCounter().

#define RTC_REG_A_UIP   0x80

Definition at line 60 of file halp.h.

#define RTC_REG_B_PI   0x40
#define RTC_REG_C_IRQ   0x80

Definition at line 64 of file halp.h.

#define RTC_REGISTER_A   0x0A

Definition at line 59 of file halp.h.

#define RTC_REGISTER_B   0x0B

Definition at line 61 of file halp.h.

#define RTC_REGISTER_C   0x0C

Definition at line 63 of file halp.h.

Referenced by HalpClockInterruptHandler(), and HalpInitializeTsc().

#define RTC_REGISTER_CENTURY   0x32

Definition at line 66 of file halp.h.

#define RTC_REGISTER_D   0x0D

Definition at line 65 of file halp.h.

#define SET_VIDEO_MODE   0x00

Definition at line 89 of file halp.h.

#define SYSTEM_CONTROL_PORT_A   0x92

Definition at line 177 of file halp.h.

#define SYSTEM_CONTROL_PORT_B   0x61

Definition at line 178 of file halp.h.

Referenced by HalHandleNMI(), and HalMakeBeep().

#define TIMER_CHANNEL0_DATA_PORT   0x40

Definition at line 118 of file halp.h.

Referenced by HalpRead8254Value(), and HalpSetTimerRollOver().

#define TIMER_CHANNEL1_DATA_PORT   0x41

Definition at line 119 of file halp.h.

#define TIMER_CHANNEL2_DATA_PORT   0x42

Definition at line 120 of file halp.h.

Referenced by HalMakeBeep().

#define TIMER_CONTROL_PORT   0x43

Definition at line 121 of file halp.h.

#define VIDEO_SERVICES   0x10

Definition at line 84 of file halp.h.

Typedef Documentation

typedef union _EISA_ELCR EISA_ELCR
typedef union _I8259_ICW1 I8259_ICW1
typedef union _I8259_ICW2 I8259_ICW2
typedef union _I8259_ICW3 I8259_ICW3
typedef union _I8259_ICW4 I8259_ICW4

Definition at line 375 of file halp.h.

typedef union _I8259_ISR I8259_ISR
typedef union _I8259_OCW2 I8259_OCW2
typedef union _I8259_OCW3 I8259_OCW3
typedef union _EISA_ELCR * PEISA_ELCR
typedef BOOLEAN(NTAPI * PHAL_DISMISS_INTERRUPT)(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

Definition at line 431 of file halp.h.

typedef VOID(__cdecl * PHAL_SW_INTERRUPT_HANDLER)(VOID)

Definition at line 39 of file halp.h.

typedef VOID(FASTCALL * PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY)(IN PKTRAP_FRAME TrapFrame)

Definition at line 45 of file halp.h.

typedef union _I8259_ICW1 * PI8259_ICW1
typedef union _I8259_ICW2 * PI8259_ICW2
typedef union _I8259_ICW3 * PI8259_ICW3
typedef union _I8259_ICW4 * PI8259_ICW4
typedef I8259_ISR * PI8259_IDR

Definition at line 375 of file halp.h.

typedef union _I8259_ISR * PI8259_ISR
typedef union _I8259_OCW2 * PI8259_OCW2
typedef union _I8259_OCW3 * PI8259_OCW3

Enumeration Type Documentation

Enumerator
RotateAutoEoiClear 
NonSpecificEoi 
InvalidEoiMode 
SpecificEoi 
RotateAutoEoiSet 
RotateNonSpecific 
SetPriority 
RotateSpecific 

Definition at line 255 of file halp.h.

Enumerator
EdgeTriggered 
LevelTriggered 

Definition at line 215 of file halp.h.

216 {
enum _I8259_ICW1_INTERRUPT_MODE I8259_ICW1_INTERRUPT_MODE
Enumerator
Interval8 
Interval4 

Definition at line 221 of file halp.h.

222 {
223  Interval8,
224  Interval4
enum _I8259_ICW1_INTERVAL I8259_ICW1_INTERVAL
Enumerator
Cascade 
Single 

Definition at line 209 of file halp.h.

210 {
211  Cascade,
212  Single
Definition: halp.h:212
enum _I8259_ICW1_OPERATING_MODE I8259_ICW1_OPERATING_MODE
Definition: halp.h:211
Enumerator
NonBuffered 
NonBuffered2 
BufferedSlave 
BufferedMaster 

Definition at line 239 of file halp.h.

240 {
241  NonBuffered,
242  NonBuffered2,
enum _I8259_ICW4_BUFFERED_MODE I8259_ICW4_BUFFERED_MODE
Enumerator
NormalEoi 
AutomaticEoi 

Definition at line 233 of file halp.h.

234 {
235  NormalEoi,
enum _I8259_ICW4_EOI_MODE I8259_ICW4_EOI_MODE
Enumerator
Mcs8085Mode 
New8086Mode 

Definition at line 227 of file halp.h.

228 {
229  Mcs8085Mode,
enum _I8259_ICW4_SYSTEM_MODE I8259_ICW4_SYSTEM_MODE
Enumerator
InvalidRequest 
InvalidRequest2 
ReadIdr 
ReadIsr 

Definition at line 247 of file halp.h.

248 {
251  ReadIdr,
252  ReadIsr
enum _I8259_READ_REQUEST I8259_READ_REQUEST
Definition: halp.h:251
Definition: halp.h:252
Enumerator
PitAccessModeCounterLatch 
PitAccessModeLow 
PitAccessModeHigh 
PitAccessModeLowHigh 

Definition at line 143 of file halp.h.

Enumerator
PitChannel0 
PitChannel1 
PitChannel2 
PitReadBack 

Definition at line 151 of file halp.h.

152 {
153  PitChannel0,
154  PitChannel1,
155  PitChannel2,
enum _TIMER_CHANNELS TIMER_CHANNELS
Enumerator
PitOperatingMode0 
PitOperatingMode1 
PitOperatingMode2 
PitOperatingMode3 
PitOperatingMode4 
PitOperatingMode5 
PitOperatingMode2Reserved 
PitOperatingMode5Reserved 

Definition at line 131 of file halp.h.

Function Documentation

VOID NTAPI HaliHaltSystem ( VOID  )

Definition at line 22 of file processor.c.

Referenced by HalInitSystem().

23 {
24  /* Disable interrupts and halt the CPU */
25  _disable();
26  __halt();
27 }
__INTRIN_INLINE void __halt(void)
Definition: intrin_x86.h:1600
void __cdecl _disable(void)
Definition: intrin_arm.h:365
NTSTATUS NTAPI HaliInitPnpDriver ( VOID  )

Definition at line 902 of file halpnpdd.c.

Referenced by HalInitSystem().

903 {
905  UNICODE_STRING DriverString;
906  PAGED_CODE();
907 
908  /* Create the driver */
909  RtlInitUnicodeString(&DriverString, L"\\Driver\\ACPI_HAL");
910  Status = IoCreateDriver(&DriverString, HalpDriverEntry);
911 
912  /* Return status */
913  return Status;
914 }
#define PAGED_CODE()
Definition: video.h:57
LONG NTSTATUS
Definition: precomp.h:26
NTSTATUS NTAPI HalpDriverEntry(IN PDRIVER_OBJECT DriverObject, IN PUNICODE_STRING RegistryPath)
Definition: halpnpdd.c:846
static const WCHAR L[]
Definition: oid.c:1087
Status
Definition: gdiplustypes.h:24
NTSTATUS NTAPI IoCreateDriver(IN PUNICODE_STRING DriverName OPTIONAL, IN PDRIVER_INITIALIZE InitializationFunction)
Definition: driver.c:1633
NTSYSAPI VOID NTAPI RtlInitUnicodeString(PUNICODE_STRING DestinationString, PCWSTR SourceString)
NTSTATUS NTAPI HaliQuerySystemInformation ( IN HAL_QUERY_INFORMATION_CLASS  InformationClass,
IN ULONG  BufferSize,
IN OUT PVOID  Buffer,
OUT PULONG  ReturnedLength 
)

Definition at line 19 of file sysinfo.c.

Referenced by HalInitSystem().

23 {
25  while (TRUE);
27 }
#define TRUE
Definition: types.h:120
#define STATUS_NOT_IMPLEMENTED
Definition: ntstatus.h:225
#define UNIMPLEMENTED
Definition: debug.h:114
NTSTATUS NTAPI HaliSetSystemInformation ( IN HAL_SET_INFORMATION_CLASS  InformationClass,
IN ULONG  BufferSize,
IN OUT PVOID  Buffer 
)

Definition at line 31 of file sysinfo.c.

Referenced by HalInitSystem().

34 {
36  while (TRUE);
38 }
#define TRUE
Definition: types.h:120
#define STATUS_NOT_IMPLEMENTED
Definition: ntstatus.h:225
#define UNIMPLEMENTED
Definition: debug.h:114
VOID NTAPI HalpAcquireCmosSpinLock ( VOID  )

Definition at line 227 of file spinlock.c.

Referenced by HalGetEnvironmentVariable(), HalMakeBeep(), HalpGetCmosData(), HalpInitializeClock(), HalpReboot(), HalpSetCmosData(), HalQueryRealTimeClock(), HalSetEnvironmentVariable(), HalSetRealTimeClock(), HalStartProfileInterrupt(), HalStopProfileInterrupt(), and RtcSetClockRate().

228 {
230 
231  /* Get flags and disable interrupts */
232  Flags = __readeflags();
233  _disable();
234 
235  /* Acquire the lock */
237 
238  /* We have the lock, save the flags now */
240 }
uint32_t ULONG_PTR
Definition: typedefs.h:63
_Must_inspect_result_ _In_ ULONG Flags
Definition: wsk.h:170
__INTRIN_INLINE uintptr_t __readeflags(void)
Definition: intrin_x86.h:1560
FORCEINLINE VOID KxAcquireSpinLock(IN PKSPIN_LOCK SpinLock)
Definition: spinlock.h:20
ULONG_PTR HalpSystemHardwareFlags
Definition: spinlock.c:24
KSPIN_LOCK HalpSystemHardwareLock
Definition: spinlock.c:25
void __cdecl _disable(void)
Definition: intrin_arm.h:365
PADAPTER_OBJECT NTAPI HalpAllocateAdapterEx ( ULONG  NumberOfMapRegisters,
BOOLEAN  IsMaster,
BOOLEAN  Dma32BitAddresses 
)
ULONG64 NTAPI HalpAllocPhysicalMemory ( IN PLOADER_PARAMETER_BLOCK  LoaderBlock,
IN ULONG64  MaxAddress,
IN PFN_NUMBER  PageCount,
IN BOOLEAN  Aligned 
)

Definition at line 29 of file memory.c.

Referenced by HalpAcpiCopyBiosTable(), HalpAcpiFindRsdtPhase0(), and HalpSetupAcpiPhase0().

33 {
34  ULONG UsedDescriptors;
36  PFN_NUMBER MaxPage, BasePage, Alignment;
37  PLIST_ENTRY NextEntry;
38  PMEMORY_ALLOCATION_DESCRIPTOR MdBlock, NewBlock, FreeBlock;
39 
40  /* Highest page we'll go */
41  MaxPage = MaxAddress >> PAGE_SHIFT;
42 
43  /* We need at least two blocks */
44  if ((HalpUsedAllocDescriptors + 2) > 64) return 0;
45 
46  /* Remember how many we have now */
47  UsedDescriptors = HalpUsedAllocDescriptors;
48 
49  /* Loop the loader block memory descriptors */
50  NextEntry = LoaderBlock->MemoryDescriptorListHead.Flink;
51  while (NextEntry != &LoaderBlock->MemoryDescriptorListHead)
52  {
53  /* Get the block */
54  MdBlock = CONTAINING_RECORD(NextEntry,
56  ListEntry);
57 
58  /* No alignment by default */
59  Alignment = 0;
60 
61  /* Unless requested, in which case we use a 64KB block alignment */
62  if (Aligned) Alignment = ((MdBlock->BasePage + 0x0F) & ~0x0F) - MdBlock->BasePage;
63 
64  /* Search for free memory */
65  if ((MdBlock->MemoryType == LoaderFree) ||
66  (MdBlock->MemoryType == LoaderFirmwareTemporary))
67  {
68  /* Make sure the page is within bounds, including alignment */
69  BasePage = MdBlock->BasePage;
70  if ((BasePage) &&
71  (MdBlock->PageCount >= PageCount + Alignment) &&
72  (BasePage + PageCount + Alignment < MaxPage))
73  {
74  /* We found an address */
75  PhysicalAddress = ((ULONG64)BasePage + Alignment) << PAGE_SHIFT;
76  break;
77  }
78  }
79 
80  /* Keep trying */
81  NextEntry = NextEntry->Flink;
82  }
83 
84  /* If we didn't find anything, get out of here */
85  if (NextEntry == &LoaderBlock->MemoryDescriptorListHead) return 0;
86 
87  /* Okay, now get a descriptor */
89  NewBlock->PageCount = (ULONG)PageCount;
90  NewBlock->BasePage = MdBlock->BasePage + Alignment;
92 
93  /* Update count */
94  UsedDescriptors++;
95  HalpUsedAllocDescriptors = UsedDescriptors;
96 
97  /* Check if we had any alignment */
98  if (Alignment)
99  {
100  /* Check if we had leftovers */
101  if (MdBlock->PageCount > (PageCount + Alignment))
102  {
103  /* Get the next descriptor */
104  FreeBlock = &HalpAllocationDescriptorArray[UsedDescriptors];
105  FreeBlock->PageCount = MdBlock->PageCount - Alignment - (ULONG)PageCount;
106  FreeBlock->BasePage = MdBlock->BasePage + Alignment + (ULONG)PageCount;
107 
108  /* One more */
110 
111  /* Insert it into the list */
112  InsertHeadList(&MdBlock->ListEntry, &FreeBlock->ListEntry);
113  }
114 
115  /* Trim the original block to the alignment only */
116  MdBlock->PageCount = Alignment;
117 
118  /* Insert the descriptor after the original one */
119  InsertHeadList(&MdBlock->ListEntry, &NewBlock->ListEntry);
120  }
121  else
122  {
123  /* Consume memory from this block */
124  MdBlock->BasePage += (ULONG)PageCount;
125  MdBlock->PageCount -= (ULONG)PageCount;
126 
127  /* Insert the descriptor before the original one */
128  InsertTailList(&MdBlock->ListEntry, &NewBlock->ListEntry);
129 
130  /* Remove the entry if the whole block was allocated */
131  if (MdBlock->PageCount == 0) RemoveEntryList(&MdBlock->ListEntry);
132  }
133 
134  /* Return the address */
135  return PhysicalAddress;
136 }
#define PAGE_SHIFT
Definition: env_spec_w32.h:45
ULONG HalpUsedAllocDescriptors
Definition: memory.c:20
FORCEINLINE VOID InsertHeadList(_Inout_ PLIST_ENTRY ListHead, _Inout_ __drv_aliasesMem PLIST_ENTRY Entry)
Definition: rtlfuncs.h:201
#define InsertTailList(ListHead, Entry)
FORCEINLINE BOOLEAN RemoveEntryList(_In_ PLIST_ENTRY Entry)
Definition: rtlfuncs.h:105
TYPE_OF_MEMORY MemoryType
Definition: arc.h:193
ULONG PFN_NUMBER
Definition: ke.h:8
union Alignment_ Alignment
PFLT_MESSAGE_WAITER_QUEUE CONTAINING_RECORD(Csq, DEVICE_EXTENSION, IrpQueue)) -> WaiterQ.mLock) _IRQL_raises_(DISPATCH_LEVEL) VOID NTAPI FltpAcquireMessageWaiterLock(_In_ PIO_CSQ Csq, _Out_ PKIRQL Irql)
Definition: Messaging.c:560
struct _LIST_ENTRY * Flink
Definition: typedefs.h:119
unsigned __int64 ULONG64
Definition: imports.h:198
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS PhysicalAddress
Definition: iotypes.h:1060
Definition: typedefs.h:117
unsigned int ULONG
Definition: retypes.h:1
MEMORY_ALLOCATION_DESCRIPTOR HalpAllocationDescriptorArray[64]
Definition: memory.c:21
VOID __cdecl HalpApcInterrupt ( VOID  )

Referenced by HalpInitializePICs().

DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry ( IN PKTRAP_FRAME  TrapFrame)

Definition at line 1239 of file pic.c.

1240 {
1241  /* Do the work */
1242  _HalpApcInterruptHandler(TrapFrame);
1243 }
FORCEINLINE DECLSPEC_NORETURN VOID _HalpApcInterruptHandler(IN PKTRAP_FRAME TrapFrame)
Definition: pic.c:1209
BOOLEAN NTAPI HalpBiosDisplayReset ( VOID  )

Definition at line 269 of file x86bios.c.

Referenced by HalInitializeBios(), and HalInitSystem().

270 {
271 #if 0
272  X86_BIOS_REGISTERS Registers;
273  ULONG OldEflags;
274 
275  /* Save flags and disable interrupts */
276  OldEflags = __readeflags();
277  _disable();
278 
279  /* Set AH = 0 (Set video mode), AL = 0x12 (640x480x16 vga) */
280  Registers.Eax = 0x12;
281 
282  /* Call INT 0x10 */
283  x86BiosCall(0x10, &Registers);
284 
285  // FIXME: check result
286 
287  /* Restore previous flags */
288  __writeeflags(OldEflags);
289 #endif
290  return TRUE;
291 }
#define TRUE
Definition: types.h:120
__INTRIN_INLINE uintptr_t __readeflags(void)
Definition: intrin_x86.h:1560
__INTRIN_INLINE void __writeeflags(uintptr_t Value)
Definition: intrin_x86.h:1555
void __cdecl _disable(void)
Definition: intrin_arm.h:365
unsigned int ULONG
Definition: retypes.h:1
VOID NTAPI HalpBuildAddressMap ( VOID  )

Definition at line 940 of file halacpi.c.

Referenced by HalpReportResourceUsage().

941 {
942  /* ACPI is magic baby */
943 }
VOID NTAPI HalpCalibrateStallExecution ( VOID  )

Definition at line 102 of file hardware.c.

Referenced by HalInitSystem(), and MachInit().

103 {
104  ULONG i;
105  ULONG calib_bit;
106  ULONG CurCount;
107 
108  /* Initialise timer interrupt with MILLISECOND ms interval */
109  WRITE_PORT_UCHAR((PUCHAR)0x43, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
110  WRITE_PORT_UCHAR((PUCHAR)0x40, LATCH & 0xff); /* LSB */
111  WRITE_PORT_UCHAR((PUCHAR)0x40, LATCH >> 8); /* MSB */
112 
113  /* Stage 1: Coarse calibration */
114 
115  delay_count = 1;
116 
117  do
118  {
119  /* Next delay count to try */
120  delay_count <<= 1;
121 
123 
124  /* Do the delay */
126 
127  CurCount = Read8254Timer();
128  }
129  while (CurCount > LATCH / 2);
130 
131  /* Get bottom value for delay */
132  delay_count >>= 1;
133 
134  /* Stage 2: Fine calibration */
135 
136  /* Which bit are we going to test */
137  calib_bit = delay_count;
138 
139  for (i = 0; i < PRECISION; i++)
140  {
141  /* Next bit to calibrate */
142  calib_bit >>= 1;
143 
144  /* If we have done all bits, stop */
145  if (!calib_bit) break;
146 
147  /* Set the bit in delay_count */
148  delay_count |= calib_bit;
149 
151 
152  /* Do the delay */
154 
155  CurCount = Read8254Timer();
156  /* If a tick has passed, turn the calibrated bit back off */
157  if (CurCount <= LATCH / 2)
158  delay_count &= ~calib_bit;
159  }
160 
161  /* We're finished: Do the finishing touches */
162 
163  /* Calculate delay_count for 1ms */
164  delay_count /= (MILLISEC / 2);
165 }
static VOID __StallExecutionProcessor(ULONG Loops)
Definition: hardware.c:51
unsigned char * PUCHAR
Definition: retypes.h:3
static VOID WaitFor8254Wraparound(VOID)
Definition: hardware.c:78
GLenum GLclampf GLint i
Definition: glfuncs.h:14
#define PRECISION
Definition: hardware.c:30
#define MILLISEC
Definition: hardware.c:29
static unsigned int delay_count
Definition: hardware.c:36
static ULONG Read8254Timer(VOID)
Definition: hardware.c:65
#define LATCH
Definition: hardware.c:34
unsigned int ULONG
Definition: retypes.h:1
void WRITE_PORT_UCHAR(PUCHAR Address, UCHAR Value)
Definition: mach.c:539
VOID NTAPI HalpCheckPowerButton ( VOID  )

Definition at line 20 of file misc.c.

Referenced by HalpRegisterKdSupportFunctions().

21 {
22  /* Nothing to do on non-ACPI */
23  return;
24 }
VOID __cdecl HalpClockInterrupt ( VOID  )

Definition at line 30 of file timer.c.

Referenced by HalInitSystem(), HalpInitializePICs(), HalpInitPhase0(), and HalpInitPhase1().

31 {
32  /* Clear the interrupt */
35 
36  /* FIXME: Update HAL Perf counters */
37 
38  /* FIXME: Check if someone changed the clockrate */
39 
40  /* Call the kernel */
43  CLOCK2_LEVEL);
44 }
#define KeGetCurrentIrql()
Definition: env_spec_w32.h:706
NTKERNELAPI VOID NTAPI WRITE_REGISTER_ULONG(IN PULONG Register, IN ULONG Value)
ASSERT((InvokeOnSuccess||InvokeOnError||InvokeOnCancel)?(CompletionRoutine!=NULL):TRUE)
VOID FASTCALL KeUpdateSystemTime(IN PKTRAP_FRAME TrapFrame, IN ULONG Increment, IN KIRQL OldIrql)
Definition: time.c:64
#define TIMER0_INT_CLEAR
Definition: sp804.h:18
#define CLOCK2_LEVEL
Definition: env_spec_w32.h:700
ULONG HalpCurrentTimeIncrement
Definition: timer.c:25
#define KeGetCurrentThread
Definition: hal.h:44
VOID NTAPI HalpDebugPciDumpBus ( IN ULONG  i,
IN ULONG  j,
IN ULONG  k,
IN PPCI_COMMON_CONFIG  PciData 
)

Definition at line 796 of file bussupp.c.

Referenced by HalpInitializePciBus().

800 {
801  PCHAR p, ClassName, SubClassName, VendorName, ProductName, SubVendorName;
802  ULONG Length;
803  CHAR LookupString[16] = "";
804  CHAR bSubClassName[64] = "";
805  CHAR bVendorName[64] = "";
806  CHAR bProductName[128] = "Unknown device";
807  CHAR bSubVendorName[128] = "Unknown";
808  ULONG Size, Mem, b;
809 
810  /* Isolate the class name */
811  sprintf(LookupString, "C %02x ", PciData->BaseClass);
812  ClassName = strstr((PCHAR)ClassTable, LookupString);
813  if (ClassName)
814  {
815  /* Isolate the subclass name */
816  ClassName += 6;
817  sprintf(LookupString, "\t%02x ", PciData->SubClass);
818  SubClassName = strstr(ClassName, LookupString);
819  if (SubClassName)
820  {
821  /* Copy the subclass into our buffer */
822  SubClassName += 5;
823  p = strpbrk(SubClassName, "\r\n");
824  Length = p - SubClassName;
825  if (Length >= sizeof(bSubClassName)) Length = sizeof(bSubClassName) - 1;
826  strncpy(bSubClassName, SubClassName, Length);
827  bSubClassName[Length] = '\0';
828  }
829  }
830 
831  /* Isolate the vendor name */
832  sprintf(LookupString, "\r\n%04x ", PciData->VendorID);
833  VendorName = strstr((PCHAR)VendorTable, LookupString);
834  if (VendorName)
835  {
836  /* Copy the vendor name into our buffer */
837  VendorName += 8;
838  p = strpbrk(VendorName, "\r\n");
839  Length = p - VendorName;
840  if (Length >= sizeof(bVendorName)) Length = sizeof(bVendorName) - 1;
841  strncpy(bVendorName, VendorName, Length);
842  bVendorName[Length] = '\0';
843 
844  /* Isolate the product name */
845  sprintf(LookupString, "\t%04x ", PciData->DeviceID);
846  ProductName = strstr(VendorName, LookupString);
847  if (ProductName)
848  {
849  /* Copy the product name into our buffer */
850  ProductName += 7;
851  p = strpbrk(ProductName, "\r\n");
852  Length = p - ProductName;
853  if (Length >= sizeof(bProductName)) Length = sizeof(bProductName) - 1;
854  strncpy(bProductName, ProductName, Length);
855  bProductName[Length] = '\0';
856 
857  /* Isolate the subvendor and subsystem name */
858  sprintf(LookupString,
859  "\t\t%04x %04x ",
860  PciData->u.type0.SubVendorID,
861  PciData->u.type0.SubSystemID);
862  SubVendorName = strstr(ProductName, LookupString);
863  if (SubVendorName)
864  {
865  /* Copy the subvendor name into our buffer */
866  SubVendorName += 13;
867  p = strpbrk(SubVendorName, "\r\n");
868  Length = p - SubVendorName;
869  if (Length >= sizeof(bSubVendorName)) Length = sizeof(bSubVendorName) - 1;
870  strncpy(bSubVendorName, SubVendorName, Length);
871  bSubVendorName[Length] = '\0';
872  }
873  }
874  }
875 
876  /* Print out the data */
877  DbgPrint("%02x:%02x.%x %s [%02x%02x]: %s %s [%04x:%04x] (rev %02x)\n"
878  "\tSubsystem: %s [%04x:%04x]\n",
879  i,
880  j,
881  k,
882  bSubClassName,
883  PciData->BaseClass,
884  PciData->SubClass,
885  bVendorName,
886  bProductName,
887  PciData->VendorID,
888  PciData->DeviceID,
889  PciData->RevisionID,
890  bSubVendorName,
891  PciData->u.type0.SubVendorID,
892  PciData->u.type0.SubSystemID);
893 
894  /* Print out and decode flags */
895  DbgPrint("\tFlags:");
896  if (PciData->Command & PCI_ENABLE_BUS_MASTER) DbgPrint(" bus master,");
897  if (PciData->Status & PCI_STATUS_66MHZ_CAPABLE) DbgPrint(" 66MHz,");
898  if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x000) DbgPrint(" fast devsel,");
899  if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x200) DbgPrint(" medium devsel,");
900  if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x400) DbgPrint(" slow devsel,");
901  if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x600) DbgPrint(" unknown devsel,");
902  DbgPrint(" latency %d", PciData->LatencyTimer);
903  if (PciData->u.type0.InterruptPin != 0 &&
904  PciData->u.type0.InterruptLine != 0 &&
905  PciData->u.type0.InterruptLine != 0xFF) DbgPrint(", IRQ %02d", PciData->u.type0.InterruptLine);
906  else if (PciData->u.type0.InterruptPin != 0) DbgPrint(", IRQ assignment required");
907  DbgPrint("\n");
908 
909  /* Scan addresses */
910  Size = 0;
911  for (b = 0; b < PCI_TYPE0_ADDRESSES; b++)
912  {
913  /* Check for a BAR */
914  Mem = PciData->u.type0.BaseAddresses[b];
915  if (Mem)
916  {
917  /* Decode the address type */
918  if (Mem & PCI_ADDRESS_IO_SPACE)
919  {
920  /* Guess the size */
921  Size = 1 << 2;
922  while (!(Mem & Size) && (Size)) Size <<= 1;
923 
924  /* Print it out */
925  DbgPrint("\tI/O ports at %04lx", Mem & PCI_ADDRESS_IO_ADDRESS_MASK);
926  ShowSize(Size);
927  }
928  else
929  {
930  /* Guess the size */
931  Size = 1 << 8;
932  while (!(Mem & Size) && (Size)) Size <<= 1;
933 
934  /* Print it out */
935  DbgPrint("\tMemory at %08lx (%d-bit, %sprefetchable)",
937  (Mem & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_32BIT ? 32 : 64,
938  (Mem & PCI_ADDRESS_MEMORY_PREFETCHABLE) ? "" : "non-");
939  ShowSize(Size);
940  }
941  }
942  }
943 }
signed char * PCHAR
Definition: retypes.h:7
#define PCI_TYPE0_ADDRESSES
Definition: iotypes.h:3134
GLenum GLclampf GLint GLenum GLuint GLenum GLenum GLsizei GLenum const GLvoid GLfloat GLfloat GLfloat GLfloat GLclampd GLint GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean GLboolean GLboolean GLboolean GLint GLenum GLsizei const GLvoid GLenum GLint GLenum GLint GLint GLsizei GLint GLenum GLint GLint GLint GLint GLsizei GLenum GLsizei const GLuint GLboolean GLenum GLenum GLint GLsizei GLenum GLsizei GLenum const GLvoid GLboolean const GLboolean GLenum const GLdouble const GLfloat const GLdouble const GLfloat GLenum GLint GLint GLint GLint GLint GLint j
Definition: glfuncs.h:98
#define PCI_ADDRESS_IO_ADDRESS_MASK
Definition: iotypes.h:3867
#define DbgPrint
Definition: loader.c:25
char * strpbrk(const char *String, const char *Delimiters)
Definition: utclib.c:302
char * strstr(char *String1, char *String2)
Definition: utclib.c:653
char * strncpy(char *DstString, const char *SrcString, ACPI_SIZE Count)
Definition: utclib.c:427
char CHAR
Definition: xmlstorage.h:175
#define PCI_ADDRESS_MEMORY_TYPE_MASK
Definition: iotypes.h:3865
#define PCI_TYPE_32BIT
Definition: iotypes.h:3871
#define sprintf(buf, format,...)
Definition: sprintf.c:55
GLenum GLclampf GLint i
Definition: glfuncs.h:14
#define PCI_STATUS_DEVSEL
Definition: iotypes.h:3269
#define PCI_ADDRESS_MEMORY_ADDRESS_MASK
Definition: iotypes.h:3868
#define b
Definition: ke_i.h:79
UINTN Size
Definition: acefiex.h:555
#define PCI_ENABLE_BUS_MASTER
Definition: iotypes.h:3252
#define PCI_STATUS_66MHZ_CAPABLE
Definition: iotypes.h:3265
VOID NTAPI ShowSize(IN ULONG Size)
VOID UINTN Length
Definition: acefiex.h:744
#define PCI_ADDRESS_MEMORY_PREFETCHABLE
Definition: iotypes.h:3866
unsigned int ULONG
Definition: retypes.h:1
GLfloat GLfloat p
Definition: glext.h:8902
#define PCI_ADDRESS_IO_SPACE
Definition: iotypes.h:3864
int k
Definition: mpi.c:3369
BOOLEAN NTAPI HalpDismissIrq07 ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 853 of file pic.c.

856 {
857  I8259_OCW3 Ocw3;
858  I8259_ISR Isr;
859 
860  /* Request the ISR */
861  Ocw3.Bits = 0;
862  Ocw3.Sbo = 1;
863  Ocw3.ReadRequest = ReadIsr;
865 
866  /* Read the ISR */
868 
869  /* Is IRQ 7 really active? If it isn't, this is spurious so fail */
870  if (Isr.Irq7 == FALSE) return FALSE;
871 
872  /* Do normal interrupt dismiss */
873  return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
874 }
#define PIC1_CONTROL_PORT
Definition: halp.h:201
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqGeneric(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:737
UCHAR ReadRequest
Definition: halp.h:346
#define FALSE
Definition: types.h:117
UCHAR Bits
Definition: halp.h:372
UCHAR Sbo
Definition: halp.h:348
UCHAR Irq7
Definition: halp.h:369
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
Definition: halp.h:252
UCHAR Bits
Definition: halp.h:353
static BOOLEAN NTAPI Isr(PKINTERRUPT Interrupt, PVOID ServiceContext)
Definition: floppy.c:584
PPC_QUAL unsigned char __inbyte(const unsigned long Port)
Definition: intrin_ppc.h:539
BOOLEAN NTAPI HalpDismissIrq07Level ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 995 of file pic.c.

998 {
999  I8259_OCW3 Ocw3;
1000  I8259_ISR Isr;
1001 
1002  /* Request the ISR */
1003  Ocw3.Bits = 0;
1004  Ocw3.Sbo = 1;
1005  Ocw3.ReadRequest = ReadIsr;
1007 
1008  /* Read the ISR */
1010 
1011  /* Is IRQ 7 really active? If it isn't, this is spurious so fail */
1012  if (Isr.Irq7 == FALSE) return FALSE;
1013 
1014  /* Do normal interrupt dismiss */
1015  return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
1016 }
#define PIC1_CONTROL_PORT
Definition: halp.h:201
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqLevel(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:880
UCHAR ReadRequest
Definition: halp.h:346
#define FALSE
Definition: types.h:117
UCHAR Bits
Definition: halp.h:372
UCHAR Sbo
Definition: halp.h:348
UCHAR Irq7
Definition: halp.h:369
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
Definition: halp.h:252
UCHAR Bits
Definition: halp.h:353
static BOOLEAN NTAPI Isr(PKINTERRUPT Interrupt, PVOID ServiceContext)
Definition: floppy.c:584
PPC_QUAL unsigned char __inbyte(const unsigned long Port)
Definition: intrin_ppc.h:539
BOOLEAN NTAPI HalpDismissIrq13 ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 840 of file pic.c.

843 {
844  /* Clear the FPU busy latch */
845  __outbyte(0xF0, 0);
846 
847  /* Do normal interrupt dismiss */
848  return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
849 }
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqGeneric(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:737
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
BOOLEAN NTAPI HalpDismissIrq13Level ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 982 of file pic.c.

985 {
986  /* Clear the FPU busy latch */
987  __outbyte(0xF0, 0);
988 
989  /* Do normal interrupt dismiss */
990  return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
991 }
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqLevel(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:880
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
BOOLEAN NTAPI HalpDismissIrq15 ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 804 of file pic.c.

807 {
808  I8259_OCW3 Ocw3;
809  I8259_OCW2 Ocw2;
810  I8259_ISR Isr;
811 
812  /* Request the ISR */
813  Ocw3.Bits = 0;
814  Ocw3.Sbo = 1; /* This encodes an OCW3 vs. an OCW2 */
815  Ocw3.ReadRequest = ReadIsr;
817 
818  /* Read the ISR */
820 
821  /* Is IRQ15 really active (this is IR7) */
822  if (Isr.Irq7 == FALSE)
823  {
824  /* It isn't, so we have to EOI IRQ2 because this was cascaded */
825  Ocw2.Bits = 0;
826  Ocw2.EoiMode = SpecificEoi;
827  __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | 2);
828 
829  /* And now fail since this was spurious */
830  return FALSE;
831  }
832 
833  /* Do normal interrupt dismiss */
834  return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
835 }
UCHAR EoiMode
Definition: halp.h:337
#define PIC1_CONTROL_PORT
Definition: halp.h:201
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqGeneric(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:737
UCHAR ReadRequest
Definition: halp.h:346
#define FALSE
Definition: types.h:117
UCHAR Bits
Definition: halp.h:372
UCHAR Sbo
Definition: halp.h:348
#define PIC2_CONTROL_PORT
Definition: halp.h:203
UCHAR Irq7
Definition: halp.h:369
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
Definition: halp.h:252
UCHAR Bits
Definition: halp.h:339
UCHAR Bits
Definition: halp.h:353
static BOOLEAN NTAPI Isr(PKINTERRUPT Interrupt, PVOID ServiceContext)
Definition: floppy.c:584
PPC_QUAL unsigned char __inbyte(const unsigned long Port)
Definition: intrin_ppc.h:539
BOOLEAN NTAPI HalpDismissIrq15Level ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 947 of file pic.c.

950 {
951  I8259_OCW3 Ocw3;
952  I8259_OCW2 Ocw2;
953  I8259_ISR Isr;
954 
955  /* Request the ISR */
956  Ocw3.Bits = 0;
957  Ocw3.Sbo = 1; /* This encodes an OCW3 vs. an OCW2 */
958  Ocw3.ReadRequest = ReadIsr;
960 
961  /* Read the ISR */
963 
964  /* Is IRQ15 really active (this is IR7) */
965  if (Isr.Irq7 == FALSE)
966  {
967  /* It isn't, so we have to EOI IRQ2 because this was cascaded */
968  Ocw2.Bits = 0;
969  Ocw2.EoiMode = SpecificEoi;
970  __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | 2);
971 
972  /* And now fail since this was spurious */
973  return FALSE;
974  }
975 
976  /* Do normal interrupt dismiss */
977  return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
978 }
UCHAR EoiMode
Definition: halp.h:337
#define PIC1_CONTROL_PORT
Definition: halp.h:201
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqLevel(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:880
UCHAR ReadRequest
Definition: halp.h:346
#define FALSE
Definition: types.h:117
UCHAR Bits
Definition: halp.h:372
UCHAR Sbo
Definition: halp.h:348
#define PIC2_CONTROL_PORT
Definition: halp.h:203
UCHAR Irq7
Definition: halp.h:369
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
Definition: halp.h:252
UCHAR Bits
Definition: halp.h:339
UCHAR Bits
Definition: halp.h:353
static BOOLEAN NTAPI Isr(PKINTERRUPT Interrupt, PVOID ServiceContext)
Definition: floppy.c:584
PPC_QUAL unsigned char __inbyte(const unsigned long Port)
Definition: intrin_ppc.h:539
BOOLEAN NTAPI HalpDismissIrqGeneric ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 794 of file pic.c.

797 {
798  /* Run the inline code */
799  return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
800 }
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqGeneric(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:737
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
BOOLEAN NTAPI HalpDismissIrqLevel ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 937 of file pic.c.

940 {
941  /* Run the inline code */
942  return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
943 }
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqLevel(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:880
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
VOID __cdecl HalpDispatchInterrupt ( VOID  )

Referenced by HalpInitializePICs().

PHAL_SW_INTERRUPT_HANDLER __cdecl HalpDispatchInterrupt2 ( VOID  )

Definition at line 1304 of file pic.c.

1305 {
1306  ULONG PendingIrqlMask, PendingIrql;
1307  KIRQL OldIrql;
1308  PIC_MASK Mask;
1309  PKPCR Pcr = KeGetPcr();
1310 
1311  /* Do the work */
1312  OldIrql = _HalpDispatchInterruptHandler();
1313 
1314  /* Restore IRQL */
1315  Pcr->Irql = OldIrql;
1316 
1317  /* Check for pending software interrupts and compare with current IRQL */
1318  PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[OldIrql];
1319  if (PendingIrqlMask)
1320  {
1321  /* Check if pending IRQL affects hardware state */
1322  BitScanReverse(&PendingIrql, PendingIrqlMask);
1323  if (PendingIrql > DISPATCH_LEVEL)
1324  {
1325  /* Set new PIC mask */
1326  Mask.Both = Pcr->IDR & 0xFFFF;
1327  __outbyte(PIC1_DATA_PORT, Mask.Master);
1328  __outbyte(PIC2_DATA_PORT, Mask.Slave);
1329 
1330  /* Clear IRR bit */
1331  Pcr->IRR ^= (1 << PendingIrql);
1332  }
1333 
1334  /* Now handle pending interrupt */
1335  return SWInterruptHandlerTable[PendingIrql];
1336  }
1337 
1338  return NULL;
1339 }
KIRQL Irql
Definition: ke.h:298
ULONG IDR
Definition: ke.h:22
ULONG FindHigherIrqlMask[32]
Definition: pic.c:216
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
Definition: ke.h:280
#define KeGetPcr()
Definition: ke.h:25
UCHAR KIRQL
Definition: env_spec_w32.h:591
PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable[20]
Definition: pic.c:381
smooth NULL
Definition: ftsmooth.c:416
#define PIC2_DATA_PORT
Definition: halp.h:204
Definition: irql.c:21
#define PIC1_DATA_PORT
Definition: halp.h:202
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
#define BitScanReverse
Definition: interlocked.h:6
#define DISPATCH_LEVEL
Definition: env_spec_w32.h:696
FORCEINLINE KIRQL _HalpDispatchInterruptHandler(VOID)
Definition: pic.c:1264
unsigned int ULONG
Definition: retypes.h:1
ULONG IRR
Definition: ke.h:21
DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry ( IN PKTRAP_FRAME  TrapFrame)

Definition at line 1288 of file pic.c.

1289 {
1290  KIRQL CurrentIrql;
1291 
1292  /* Do the work */
1293  CurrentIrql = _HalpDispatchInterruptHandler();
1294 
1295  /* End the interrupt */
1296  HalpEndSoftwareInterrupt(CurrentIrql, TrapFrame);
1297 
1298  /* Exit the interrupt */
1299  KiEoiHelper(TrapFrame);
1300 }
DECLSPEC_NORETURN VOID FASTCALL KiEoiHelper(IN PKTRAP_FRAME TrapFrame)
Definition: traphdlr.c:126
UCHAR KIRQL
Definition: env_spec_w32.h:591
VOID NTAPI HalpEndSoftwareInterrupt(IN KIRQL OldIrql, IN PKTRAP_FRAME TrapFrame)
FORCEINLINE KIRQL _HalpDispatchInterruptHandler(VOID)
Definition: pic.c:1264
VOID NTAPI HalpEnableInterruptHandler ( IN UCHAR  Flags,
IN ULONG  BusVector,
IN ULONG  SystemVector,
IN KIRQL  Irql,
IN PVOID  Handler,
IN KINTERRUPT_MODE  Mode 
)

Definition at line 49 of file usage.c.

Referenced by HalInitSystem(), HalpInitPhase0(), and HalpInitPhase1().

55 {
56  /* Register the routine */
58 }
static const BYTE InterruptRoutine[]
Definition: device.c:34
struct _KIPCR * PKIPCR
_Out_ PKIRQL Irql
Definition: csq.h:179
#define KeGetPcr()
Definition: ke.h:25
ACPI_PHYSICAL_ADDRESS ACPI_SIZE BOOLEAN Warn BOOLEAN Physical UINT32 ACPI_TABLE_HEADER *OutTableHeader ACPI_TABLE_HEADER **OutTable ACPI_HANDLE UINT32 ACPI_WALK_CALLBACK ACPI_WALK_CALLBACK void void **ReturnValue UINT32 ACPI_BUFFER *RetPathPtr ACPI_OBJECT_HANDLER Handler
Definition: acpixf.h:658
VOID FASTCALL HalpExitToV86 ( PKTRAP_FRAME  TrapFrame)

Referenced by HalpBiosCall().

VOID NTAPI HalpFlushTLB ( VOID  )

Definition at line 163 of file misc.c.

Referenced by HalpMapPhysicalMemory64(), HalpMapRealModeMemory(), HalpUnmapRealModeMemory(), and HalpUnmapVirtualAddress().

164 {
165  ULONG_PTR Flags, Cr4;
166  INT CpuInfo[4];
167  ULONG_PTR PageDirectory;
168 
169  //
170  // Disable interrupts
171  //
172  Flags = __readeflags();
173  _disable();
174 
175  //
176  // Get page table directory base
177  //
178  PageDirectory = __readcr3();
179 
180  //
181  // Check for CPUID support
182  //
183  if (KeGetCurrentPrcb()->CpuID)
184  {
185  //
186  // Check for global bit in CPU features
187  //
188  __cpuid(CpuInfo, 1);
189  if (CpuInfo[3] & 0x2000)
190  {
191  //
192  // Get current CR4 value
193  //
194  Cr4 = __readcr4();
195 
196  //
197  // Disable global bit
198  //
199  __writecr4(Cr4 & ~CR4_PGE);
200 
201  //
202  // Flush TLB and re-enable global bit
203  //
204  __writecr3(PageDirectory);
205  __writecr4(Cr4);
206 
207  //
208  // Restore interrupts
209  //
210  __writeeflags(Flags);
211  return;
212  }
213  }
214 
215  //
216  // Legacy: just flush TLB
217  //
218  __writecr3(PageDirectory);
219  __writeeflags(Flags);
220 }
__INTRIN_INLINE void __writecr4(unsigned int Data)
Definition: intrin_x86.h:1685
FORCEINLINE struct _KPRCB * KeGetCurrentPrcb(VOID)
Definition: ketypes.h:1062
__INTRIN_INLINE unsigned long __readcr3(void)
Definition: intrin_x86.h:1711
int32_t INT
Definition: typedefs.h:56
uint32_t ULONG_PTR
Definition: typedefs.h:63
#define CR4_PGE
Definition: ketypes.h:91
_Must_inspect_result_ _In_ ULONG Flags
Definition: wsk.h:170
__INTRIN_INLINE void __writecr3(unsigned int Data)
Definition: intrin_x86.h:1680
__INTRIN_INLINE uintptr_t __readeflags(void)
Definition: intrin_x86.h:1560
__INTRIN_INLINE void __writeeflags(uintptr_t Value)
Definition: intrin_x86.h:1555
__INTRIN_INLINE unsigned long __readcr4(void)
Definition: intrin_x86.h:1718
PPC_QUAL void __cpuid(int CPUInfo[], const int InfoType)
Definition: intrin_ppc.h:682
void __cdecl _disable(void)
Definition: intrin_arm.h:365
BOOLEAN NTAPI HalpGetDebugPortTable ( VOID  )

Definition at line 947 of file halacpi.c.

Referenced by HalpReportResourceUsage().

948 {
949  return ((HalpDebugPortTable) &&
951 }
PDEBUG_PORT_TABLE HalpDebugPortTable
Definition: halacpi.c:24
UCHAR AddressSpaceID
Definition: acpi.h:69
GEN_ADDR BaseAddress
Definition: acpi.h:209
VOID NTAPI HalpGetNMICrashFlag ( VOID  )

Definition at line 568 of file usage.c.

Referenced by HalpInitializePciBus().

569 {
571  UNICODE_STRING KeyName = RTL_CONSTANT_STRING(L"\\Registry\\Machine\\System\\CurrentControlSet\\Control\\CrashControl");
574  HANDLE Handle;
576  KEY_VALUE_PARTIAL_INFORMATION KeyValueInformation;
577 
578  /* Set default */
579  HalpNMIDumpFlag = 0;
580 
581  /* Initialize attributes */
582  InitializeObjectAttributes(&ObjectAttributes,
583  &KeyName,
585  NULL,
586  NULL);
587 
588  /* Open crash key */
589  Status = ZwOpenKey(&Handle, KEY_READ, &ObjectAttributes);
590  if (NT_SUCCESS(Status))
591  {
592  /* Query key value */
593  RtlInitUnicodeString(&ValueName, L"NMICrashDump");
594  Status = ZwQueryValueKey(Handle,
595  &ValueName,
597  &KeyValueInformation,
598  sizeof(KeyValueInformation),
599  &ResultLength);
600  if (NT_SUCCESS(Status))
601  {
602  /* Check for valid data */
603  if (ResultLength == sizeof(KEY_VALUE_PARTIAL_INFORMATION))
604  {
605  /* Read the flag */
606  HalpNMIDumpFlag = KeyValueInformation.Data[0];
607  }
608  }
609 
610  /* We're done */
611  ZwClose(Handle);
612  }
613 }
IN CINT OUT PVOID IN ULONG OUT PULONG ResultLength
Definition: conport.c:47
IN PUNICODE_STRING IN POBJECT_ATTRIBUTES ObjectAttributes
Definition: conport.c:35
_Must_inspect_result_ _Out_ PNDIS_STATUS _In_ NDIS_HANDLE _In_ ULONG _Out_ PNDIS_STRING KeyName
Definition: ndis.h:4693
#define KEY_READ
Definition: nt_native.h:1023
NTSYSAPI NTSTATUS NTAPI ZwClose(_In_ HANDLE Handle)
_In_ PUNICODE_STRING ValueName
Definition: cmfuncs.h:264
smooth NULL
Definition: ftsmooth.c:416
BOOLEAN HalpNMIDumpFlag
Definition: usage.c:54
_In_ HANDLE Handle
Definition: extypes.h:390
LONG NTSTATUS
Definition: precomp.h:26
#define NT_SUCCESS(StatCode)
Definition: apphelp.c:24
#define OBJ_CASE_INSENSITIVE
Definition: winternl.h:228
static const WCHAR L[]
Definition: oid.c:1087
Status
Definition: gdiplustypes.h:24
DWORD *typedef HANDLE
Definition: winlogon.h:60
unsigned int ULONG
Definition: retypes.h:1
NTSYSAPI VOID NTAPI RtlInitUnicodeString(PUNICODE_STRING DestinationString, PCWSTR SourceString)
#define InitializeObjectAttributes(p, n, a, r, s)
Definition: reg.c:106
#define RTL_CONSTANT_STRING(s)
Definition: tunneltest.c:14
VOID __cdecl HalpHardwareInterruptLevel ( VOID  )
VOID NTAPI HalpInitBusHandlers ( VOID  )

Definition at line 932 of file halacpi.c.

Referenced by HalInitSystem().

933 {
934  /* On ACPI, we only have a fake PCI bus to worry about */
936 }
VOID NTAPI HalpInitNonBusHandler(VOID)
Definition: halacpi.c:922
VOID HalpInitDma ( VOID  )

Definition at line 121 of file dma.c.

Referenced by HalInitSystem(), and HalpInitPhase1().

122 {
123  /*
124  * Initialize the DMA Operation table
125  */
131 
132  /*
133  * Check if Extended DMA is available. We're just going to do a random
134  * read and write.
135  */
136 
137  WRITE_PORT_UCHAR((PUCHAR)FIELD_OFFSET(EISA_CONTROL, DmaController2Pages.Channel2), 0x2A);
138  if (READ_PORT_UCHAR((PUCHAR)FIELD_OFFSET(EISA_CONTROL, DmaController2Pages.Channel2)) == 0x2A)
139  HalpEisaDma = TRUE;
140 
141  /*
142  * Intialize all the global variables and allocate master adapter with
143  * first map buffers.
144  */
145 
148 
150 
151  /*
152  * Setup the HalDispatchTable callback for creating PnP DMA adapters. It's
153  * used by IoGetDmaAdapter in the kernel.
154  */
155 
157 }
static LIST_ENTRY HalpDmaAdapterList
Definition: dma.c:78
#define HalGetDmaAdapter
Definition: haltypes.h:291
NTSTATUS(NTAPI * PALLOCATE_ADAPTER_CHANNEL)(_In_ PDMA_ADAPTER DmaAdapter, _In_ PDEVICE_OBJECT DeviceObject, _In_ ULONG NumberOfMapRegisters, _In_ PDRIVER_CONTROL ExecutionRoutine, _In_ PVOID Context)
Definition: iotypes.h:2209
#define TRUE
Definition: types.h:120
PHYSICAL_ADDRESS NTAPI IoMapTransfer(IN PADAPTER_OBJECT AdapterObject, IN PMDL Mdl, IN PVOID MapRegisterBase, IN PVOID CurrentVa, IN OUT PULONG Length, IN BOOLEAN WriteToDevice)
Definition: dma.c:144
PFREE_MAP_REGISTERS FreeMapRegisters
Definition: iotypes.h:2316
unsigned char * PUCHAR
Definition: retypes.h:3
UCHAR NTAPI READ_PORT_UCHAR(PUCHAR Address)
Definition: mach.c:535
static DMA_OPERATIONS HalpDmaOperations
Definition: dma.c:94
VOID NTAPI IoFreeMapRegisters(IN PADAPTER_OBJECT AdapterObject, IN PVOID MapRegisterBase, IN ULONG NumberOfMapRegisters)
Definition: dma.c:114
PMAP_TRANSFER MapTransfer
Definition: iotypes.h:2317
static BOOLEAN HalpEisaDma
Definition: dma.c:80
VOID NTAPI IoFreeAdapterChannel(IN PADAPTER_OBJECT AdapterObject)
Definition: dma.c:103
PFLUSH_ADAPTER_BUFFERS FlushAdapterBuffers
Definition: iotypes.h:2314
NTSTATUS NTAPI IoAllocateAdapterChannel(IN PADAPTER_OBJECT AdapterObject, IN PDEVICE_OBJECT DeviceObject, IN ULONG NumberOfMapRegisters, IN PDRIVER_CONTROL ExecutionRoutine, IN PVOID Context)
Definition: adapter.c:30
PFREE_ADAPTER_CHANNEL FreeAdapterChannel
Definition: iotypes.h:2315
BOOLEAN NTAPI IoFlushAdapterBuffers(IN PADAPTER_OBJECT AdapterObject, IN PMDL Mdl, IN PVOID MapRegisterBase, IN PVOID CurrentVa, IN ULONG Length, IN BOOLEAN WriteToDevice)
Definition: dma.c:127
VOID(NTAPI * PFREE_MAP_REGISTERS)(_In_ PDMA_ADAPTER DmaAdapter, PVOID MapRegisterBase, ULONG NumberOfMapRegisters)
Definition: iotypes.h:2230
PHYSICAL_ADDRESS(NTAPI * PMAP_TRANSFER)(_In_ PDMA_ADAPTER DmaAdapter, _In_ PMDL Mdl, _In_ PVOID MapRegisterBase, _In_ PVOID CurrentVa, _Inout_ PULONG Length, _In_ BOOLEAN WriteToDevice)
Definition: iotypes.h:2236
#define KeInitializeEvent(pEvt, foo, foo2)
Definition: env_spec_w32.h:477
PALLOCATE_ADAPTER_CHANNEL AllocateAdapterChannel
Definition: iotypes.h:2313
PDMA_ADAPTER NTAPI HalpGetDmaAdapter(IN PVOID Context, IN PDEVICE_DESCRIPTION DeviceDescription, OUT PULONG NumberOfMapRegisters)
Definition: dma.c:790
#define InitializeListHead(ListHead)
Definition: env_spec_w32.h:944
#define FIELD_OFFSET(t, f)
Definition: typedefs.h:254
static KEVENT HalpDmaLock
Definition: dma.c:77
BOOLEAN(NTAPI * PFLUSH_ADAPTER_BUFFERS)(_In_ PDMA_ADAPTER DmaAdapter, _In_ PMDL Mdl, _In_ PVOID MapRegisterBase, _In_ PVOID CurrentVa, _In_ ULONG Length, _In_ BOOLEAN WriteToDevice)
Definition: iotypes.h:2217
void WRITE_PORT_UCHAR(PUCHAR Address, UCHAR Value)
Definition: mach.c:539
static PADAPTER_OBJECT HalpMasterAdapter
Definition: dma.c:81
VOID(NTAPI * PFREE_ADAPTER_CHANNEL)(_In_ PDMA_ADAPTER DmaAdapter)
Definition: iotypes.h:2226
PADAPTER_OBJECT NTAPI HalpDmaAllocateMasterAdapter(VOID)
Definition: dma.c:332
VOID NTAPI HalpInitializeClock ( VOID  )

Definition at line 54 of file timer.c.

Referenced by HalInitSystem().

55 {
56  PKIPCR Pcr = (PKIPCR)KeGetPcr();
57  ULONG ClockInterval;
58  SP804_CONTROL_REGISTER ControlRegister;
59 
60  /* Setup the clock and profile interrupt */
62 
63  /*
64  * Configure the interval to 10ms
65  * (INTERVAL (10ms) * TIMCLKfreq (1MHz))
66  * --------------------------------------- == 10^4
67  * (TIMCLKENXdiv (1) * PRESCALEdiv (1))
68  */
69  ClockInterval = 0x2710;
70 
71  /* Configure the timer */
72  ControlRegister.AsUlong = 0;
73  ControlRegister.Wide = TRUE;
74  ControlRegister.Periodic = TRUE;
75  ControlRegister.Interrupt = TRUE;
76  ControlRegister.Enabled = TRUE;
77 
78  /* Enable the timer */
79  WRITE_REGISTER_ULONG(TIMER0_LOAD, ClockInterval);
81 }
VOID HalpStallInterrupt(VOID)
Definition: timer.c:47
NTKERNELAPI VOID NTAPI WRITE_REGISTER_ULONG(IN PULONG Register, IN ULONG Value)
#define TRUE
Definition: types.h:120
#define TIMER0_LOAD
Definition: sp804.h:15
struct _KIPCR * PKIPCR
#define KeGetPcr()
Definition: ke.h:25
#define CLOCK2_LEVEL
Definition: env_spec_w32.h:700
#define TIMER0_CONTROL
Definition: sp804.h:17
unsigned int ULONG
Definition: retypes.h:1
PKINTERRUPT_ROUTINE InterruptRoutine[MAXIMUM_VECTOR]
Definition: ketypes.h:510
VOID NTAPI HalpInitializeCmos ( VOID  )

Definition at line 160 of file cmos.c.

Referenced by HalInitSystem().

161 {
162  /* Set default century offset byte */
164 
165  /* No support for EISA or MCA */
167 }
ASSERT((InvokeOnSuccess||InvokeOnError||InvokeOnCancel)?(CompletionRoutine!=NULL):TRUE)
ULONG HalpBusType
Definition: bus.c:17
#define MACHINE_TYPE_ISA
Definition: ketypes.h:52
UCHAR HalpCmosCenturyOffset
Definition: cmos.c:22
VOID NTAPI HalpInitializeLegacyPICs ( VOID  )

Definition at line 18 of file pic.c.

Referenced by HalpInitializePICs().

19 {
20  I8259_ICW1 Icw1;
21  I8259_ICW2 Icw2;
22  I8259_ICW3 Icw3;
23  I8259_ICW4 Icw4;
24 
26 
27  /* Initialize ICW1 for master, interval 8, edge-triggered mode with ICW4 */
28  Icw1.NeedIcw4 = TRUE;
29  Icw1.OperatingMode = Cascade;
30  Icw1.Interval = Interval8;
32  Icw1.Init = TRUE;
33  Icw1.InterruptVectorAddress = 0;
35 
36  /* ICW2 - interrupt vector offset */
39 
40  /* Connect slave to IRQ 2 */
41  Icw3.Bits = 0;
42  Icw3.SlaveIrq2 = TRUE;
44 
45  /* Enable 8086 mode, non-automatic EOI, non-buffered mode, non special fully nested mode */
46  Icw4.SystemMode = New8086Mode;
47  Icw4.EoiMode = NormalEoi;
50  Icw4.Reserved = 0;
52 
53  /* Mask all interrupts */
55 
56  /* Initialize ICW1 for slave, interval 8, edge-triggered mode with ICW4 */
57  Icw1.NeedIcw4 = TRUE;
59  Icw1.OperatingMode = Cascade;
60  Icw1.Interval = Interval8;
61  Icw1.Init = TRUE;
62  Icw1.InterruptVectorAddress = 0; /* This is only used in MCS80/85 mode */
64 
65  /* Set interrupt vector base */
66  Icw2.Bits = PRIMARY_VECTOR_BASE + 8;
68 
69  /* Slave ID */
70  Icw3.Bits = 0;
71  Icw3.SlaveId = 2;
73 
74  /* Enable 8086 mode, non-automatic EOI, non-buffered mode, non special fully nested mode */
75  Icw4.SystemMode = New8086Mode;
76  Icw4.EoiMode = NormalEoi;
79  Icw4.Reserved = 0;
81 
82  /* Mask all interrupts */
84 }
UCHAR Interval
Definition: halp.h:276
#define TRUE
Definition: types.h:120
UCHAR InterruptMode
Definition: halp.h:277
ASSERT((InvokeOnSuccess||InvokeOnError||InvokeOnCancel)?(CompletionRoutine!=NULL):TRUE)
#define PRIMARY_VECTOR_BASE
Definition: halp.h:16
#define PIC1_CONTROL_PORT
Definition: halp.h:201
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
UCHAR SlaveIrq2
Definition: halp.h:302
UCHAR Bits
Definition: halp.h:291
UCHAR Bits
Definition: halp.h:315
__INTRIN_INLINE uintptr_t __readeflags(void)
Definition: intrin_x86.h:1560
#define FALSE
Definition: types.h:117
UCHAR SpecialFullyNestedMode
Definition: halp.h:325
UCHAR Reserved
Definition: halp.h:326
UCHAR Bits
Definition: halp.h:281
#define PIC2_DATA_PORT
Definition: halp.h:204
UCHAR SystemMode
Definition: halp.h:322
UCHAR OperatingMode
Definition: halp.h:275
UCHAR BufferedMode
Definition: halp.h:324
UCHAR NeedIcw4
Definition: halp.h:274
#define PIC2_CONTROL_PORT
Definition: halp.h:203
UCHAR EoiMode
Definition: halp.h:323
#define PIC1_DATA_PORT
Definition: halp.h:202
UCHAR Bits
Definition: halp.h:328
UCHAR InterruptVectorAddress
Definition: halp.h:279
UCHAR Init
Definition: halp.h:278
Definition: halp.h:211
UCHAR SlaveId
Definition: halp.h:311
#define EFLAGS_INTERRUPT_MASK
Definition: ketypes.h:126
VOID NTAPI HalpInitializePICs ( IN BOOLEAN  EnableInterrupts)

Definition at line 445 of file apic.c.

Referenced by HalInitSystem().

446 {
447  ULONG_PTR EFlags;
448 
449  /* Save EFlags and disable interrupts */
450  EFlags = __readeflags();
451  _disable();
452 
453  /* Initialize and mask the PIC */
455 
456  /* Initialize the I/O APIC */
458 
459  /* Manually reserve some vectors */
463 
464  /* Set interrupt handlers in the IDT */
466 #ifndef _M_AMD64
469 #endif
470 
471  /* Register the vectors for APC and dispatch interrupts */
474 
475  /* Restore interrupt state */
477  __writeeflags(EFlags);
478 }
static NTSTATUS EnableInterrupts(IN PPORT_DEVICE_EXTENSION DeviceExtension, IN UCHAR FlagsToDisable, IN UCHAR FlagsToEnable)
Definition: pnp.c:380
VOID NTAPI HalpRegisterVector(IN UCHAR Flags, IN ULONG BusVector, IN ULONG SystemVector, IN KIRQL Irql)
Definition: usage.c:34
uint32_t ULONG_PTR
Definition: typedefs.h:63
__INTRIN_INLINE uintptr_t __readeflags(void)
Definition: intrin_x86.h:1560
VOID __cdecl HalpDispatchInterrupt(VOID)
VOID NTAPI ApicInitializeIOApic(VOID)
Definition: apic.c:383
UCHAR HalpVectorToIndex[256]
Definition: apic.c:28
#define DISPATCH_VECTOR
Definition: apic.h:27
#define IDT_INTERNAL
Definition: halp.h:21
VOID __cdecl HalpApcInterrupt(VOID)
__INTRIN_INLINE void __writeeflags(uintptr_t Value)
Definition: intrin_x86.h:1555
VOID HalpClockInterrupt(VOID)
Definition: timer.c:30
FORCEINLINE VOID KeRegisterInterruptHandler(IN ULONG Vector, IN PVOID Handler)
Definition: ke.h:242
#define DISPATCH_LEVEL
Definition: env_spec_w32.h:696
void __cdecl _disable(void)
Definition: intrin_arm.h:365
#define APC_LEVEL
Definition: env_spec_w32.h:695
#define APIC_CLOCK_VECTOR
Definition: apic.h:29
VOID NTAPI HalpInitializeLegacyPICs(VOID)
Definition: pic.c:18
#define APC_VECTOR
Definition: apic.h:26
#define EFLAGS_INTERRUPT_MASK
Definition: ketypes.h:126
VOID HalpInitPciBus ( VOID  )
VOID HalpInitPhase0 ( PLOADER_PARAMETER_BLOCK  LoaderBlock)

Definition at line 31 of file halinit_mp.c.

33 {
34  static BOOLEAN MPSInitialized = FALSE;
35 
36 
37  /* Only initialize MP system once. Once called the first time,
38  each subsequent call is part of the initialization sequence
39  for an application processor. */
40 
41  DPRINT("HalpInitPhase0()\n");
42 
43 
44  if (MPSInitialized)
45  {
46  ASSERT(FALSE);
47  }
48 
49  MPSInitialized = TRUE;
50 
51  if (!HaliFindSmpConfig())
52  {
53  ASSERT(FALSE);
54  }
55 
56  /* store the kernel base for later use */
57  KernelBase = (ULONG_PTR)CONTAINING_RECORD(LoaderBlock->LoadOrderListHead.Flink, LDR_DATA_TABLE_ENTRY, InLoadOrderLinks)->DllBase;
58 
59 }
#define TRUE
Definition: types.h:120
ASSERT((InvokeOnSuccess||InvokeOnError||InvokeOnCancel)?(CompletionRoutine!=NULL):TRUE)
#define FALSE
Definition: types.h:117
void DPRINT(...)
Definition: polytest.cpp:61
PFLT_MESSAGE_WAITER_QUEUE CONTAINING_RECORD(Csq, DEVICE_EXTENSION, IrpQueue)) -> WaiterQ.mLock) _IRQL_raises_(DISPATCH_LEVEL) VOID NTAPI FltpAcquireMessageWaiterLock(_In_ PIO_CSQ Csq, _Out_ PKIRQL Irql)
Definition: Messaging.c:560
struct _LIST_ENTRY * Flink
Definition: typedefs.h:119
unsigned char BOOLEAN
BOOLEAN HaliFindSmpConfig(VOID)
Definition: mpconfig.c:605
ULONG_PTR KernelBase
Definition: halinit_mp.c:21
Definition: btrfs_drv.h:1762
LIST_ENTRY LoadOrderListHead
Definition: arc.h:493
#define ULONG_PTR
Definition: config.h:101
VOID HalpInitPhase1 ( VOID  )

Definition at line 26 of file halinit_up.c.

27 {
28 
29 }
VOID NTAPI HalpInitProcessor ( IN ULONG  ProcessorNumber,
IN PLOADER_PARAMETER_BLOCK  LoaderBlock 
)

Definition at line 28 of file halinit_apic.c.

Referenced by HalInitializeProcessor().

31 {
32  /* Initialize the local APIC for this cpu */
33  ApicInitializeLocalApic(ProcessorNumber);
34 
35  /* Initialize profiling data (but don't start it) */
37 
38  /* Initialize the timer */
39  //ApicInitializeTimer(ProcessorNumber);
40 
41 }
VOID NTAPI ApicInitializeLocalApic(ULONG Cpu)
Definition: apic.c:259
VOID NTAPI HalInitializeProfiling(VOID)
Definition: apictimer.c:70
ULONG NTAPI HalpIs16BitPortDecodeSupported ( VOID  )

Definition at line 955 of file halacpi.c.

Referenced by HalpBuildPartialFromAddress().

956 {
957  /* All ACPI systems are at least "EISA" so they support this */
959 }
#define CM_RESOURCE_PORT_16_BIT_DECODE
Definition: cmtypes.h:112
PVOID NTAPI HalpMapPhysicalMemory64 ( IN PHYSICAL_ADDRESS  PhysicalAddress,
IN PFN_COUNT  PageCount 
)

Definition at line 28 of file misc.c.

Referenced by HalpAcpiCopyBiosTable(), HalpAcpiFindRsdtPhase0(), HalpAcpiGetTableFromBios(), HalpAcpiTableCacheInit(), HalpReboot(), HalpRegisterKdSupportFunctions(), and HalpSetupAcpiPhase0().

30 {
31  /* Use kernel memory manager I/O map facilities */
33  NumberPage << PAGE_SHIFT,
34  MmNonCached);
35 }
#define PAGE_SHIFT
Definition: env_spec_w32.h:45
PVOID NTAPI MmMapIoSpace(IN PHYSICAL_ADDRESS PhysicalAddress, IN SIZE_T NumberOfBytes, IN MEMORY_CACHING_TYPE CacheType)
Definition: iosup.c:47
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS PhysicalAddress
Definition: iotypes.h:1060
NTSTATUS NTAPI HalpMarkAcpiHal ( VOID  )

Definition at line 64 of file misc.c.

Referenced by HalpReportResourceUsage().

65 {
67  UNICODE_STRING KeyString;
69  HANDLE Handle;
71 
72  /* Open the control set key */
73  RtlInitUnicodeString(&KeyString,
74  L"\\REGISTRY\\MACHINE\\SYSTEM\\CURRENTCONTROLSET");
75  Status = HalpOpenRegistryKey(&Handle, 0, &KeyString, KEY_ALL_ACCESS, FALSE);
76  if (NT_SUCCESS(Status))
77  {
78  /* Open the PNP key */
79  RtlInitUnicodeString(&KeyString, L"Control\\Pnp");
80  Status = HalpOpenRegistryKey(&KeyHandle,
81  Handle,
82  &KeyString,
84  TRUE);
85  /* Close root key */
86  ZwClose(Handle);
87 
88  /* Check if PNP BIOS key exists */
89  if (NT_SUCCESS(Status))
90  {
91  /* Set the disable value to false -- we need the mapper */
92  RtlInitUnicodeString(&KeyString, L"DisableFirmwareMapper");
93  Status = ZwSetValueKey(KeyHandle,
94  &KeyString,
95  0,
96  REG_DWORD,
97  &Value,
98  sizeof(Value));
99 
100  /* Close subkey */
101  ZwClose(KeyHandle);
102  }
103  }
104 
105  /* Return status */
106  return Status;
107 }
#define TRUE
Definition: types.h:120
_Must_inspect_result_ _Out_ PNDIS_STATUS _In_ NDIS_HANDLE _In_ ULONG _Out_ PNDIS_STRING _Out_ PNDIS_HANDLE KeyHandle
Definition: ndis.h:4693
NTSYSAPI NTSTATUS NTAPI ZwClose(_In_ HANDLE Handle)
#define FALSE
Definition: types.h:117
NTSTATUS NTAPI HalpOpenRegistryKey(IN PHANDLE KeyHandle, IN HANDLE RootKey, IN PUNICODE_STRING KeyName, IN ACCESS_MASK DesiredAccess, IN BOOLEAN Create)
Definition: misc.c:111
_In_ HANDLE Handle
Definition: extypes.h:390
LONG NTSTATUS
Definition: precomp.h:26
#define NT_SUCCESS(StatCode)
Definition: apphelp.c:24
static const WCHAR L[]
Definition: oid.c:1087
UINTN UINT8 Value
Definition: acefiex.h:751
Status
Definition: gdiplustypes.h:24
BOOLEAN HalDisableFirmwareMapper
Definition: halacpi.c:43
DWORD *typedef HANDLE
Definition: winlogon.h:60
#define KEY_ALL_ACCESS
Definition: nt_native.h:1041
unsigned int ULONG
Definition: retypes.h:1
NTSYSAPI VOID NTAPI RtlInitUnicodeString(PUNICODE_STRING DestinationString, PCWSTR SourceString)
#define REG_DWORD
Definition: sdbapi.c:539
NTSTATUS NTAPI HalpOpenRegistryKey ( IN PHANDLE  KeyHandle,
IN HANDLE  RootKey,
IN PUNICODE_STRING  KeyName,
IN ACCESS_MASK  DesiredAccess,
IN BOOLEAN  Create 
)

Definition at line 111 of file misc.c.

Referenced by HalpMarkAcpiHal(), HalpMarkChipsetDecode(), and HalpReportSerialNumber().

116 {
120 
121  /* Setup the attributes we received */
122  InitializeObjectAttributes(&ObjectAttributes,
123  KeyName,
125  RootKey,
126  NULL);
127 
128  /* What to do? */
129  if ( Create )
130  {
131  /* Create the key */
132  Status = ZwCreateKey(KeyHandle,
134  &ObjectAttributes,
135  0,
136  NULL,
138  &Disposition);
139  }
140  else
141  {
142  /* Open the key */
143  Status = ZwOpenKey(KeyHandle, DesiredAccess, &ObjectAttributes);
144  }
145 
146  /* We're done */
147  return Status;
148 }
IN PUNICODE_STRING IN POBJECT_ATTRIBUTES ObjectAttributes
Definition: conport.c:35
_Must_inspect_result_ _Out_ PNDIS_STATUS _In_ NDIS_HANDLE _In_ ULONG _Out_ PNDIS_STRING KeyName
Definition: ndis.h:4693
static PMEMKEY RootKey
Definition: registry.c:40
_Must_inspect_result_ _Out_ PNDIS_STATUS _In_ NDIS_HANDLE _In_ ULONG _Out_ PNDIS_STRING _Out_ PNDIS_HANDLE KeyHandle
Definition: ndis.h:4693
_In_ BOOLEAN Create
Definition: pstypes.h:511
_In_ ACCESS_MASK _In_ POBJECT_ATTRIBUTES _Reserved_ ULONG _In_opt_ PUNICODE_STRING _In_ ULONG _Out_opt_ PULONG Disposition
Definition: cmfuncs.h:50
smooth NULL
Definition: ftsmooth.c:416
LONG NTSTATUS
Definition: precomp.h:26
#define OBJ_CASE_INSENSITIVE
Definition: winternl.h:228
Status
Definition: gdiplustypes.h:24
_In_ PIO_STACK_LOCATION _Inout_ PFILE_OBJECT _Inout_ PVCB _Outptr_result_maybenull_ PDCB _In_ PDCB _In_ PDIRENT _In_ ULONG _In_ ULONG _In_ PUNICODE_STRING _In_ PACCESS_MASK DesiredAccess
Definition: create.c:4157
unsigned int ULONG
Definition: retypes.h:1
#define InitializeObjectAttributes(p, n, a, r, s)
Definition: reg.c:106
#define REG_OPTION_VOLATILE
Definition: nt_native.h:1060
VOID __cdecl HalpProfileInterrupt ( VOID  )
NTSTATUS NTAPI HalpQueryAcpiResourceRequirements ( OUT PIO_RESOURCE_REQUIREMENTS_LIST Requirements)

Definition at line 1010 of file halacpi.c.

Referenced by HalpQueryResourceRequirements(), and HalpQueryResources().

1011 {
1012  PIO_RESOURCE_REQUIREMENTS_LIST RequirementsList;
1013  ULONG Count = 0, ListSize;
1014  NTSTATUS Status;
1015  PAGED_CODE();
1016 
1017  /* Get ACPI resources */
1019  DPRINT("Resource count: %d\n", Count);
1020 
1021  /* Compute size of the list and allocate it */
1022  ListSize = FIELD_OFFSET(IO_RESOURCE_REQUIREMENTS_LIST, List[0].Descriptors) +
1023  (Count * sizeof(IO_RESOURCE_DESCRIPTOR));
1024  DPRINT("Resource list size: %d\n", ListSize);
1025  RequirementsList = ExAllocatePoolWithTag(PagedPool, ListSize, TAG_HAL);
1026  if (RequirementsList)
1027  {
1028  /* Initialize it */
1029  RtlZeroMemory(RequirementsList, ListSize);
1030  RequirementsList->ListSize = ListSize;
1031 
1032  /* Build it */
1033  Status = HalpBuildAcpiResourceList(RequirementsList);
1034  if (NT_SUCCESS(Status))
1035  {
1036  /* It worked, return it */
1037  *Requirements = RequirementsList;
1038 
1039  /* Validate the list */
1040  ASSERT(RequirementsList->List[0].Count == Count);
1041  }
1042  else
1043  {
1044  /* Fail */
1045  ExFreePoolWithTag(RequirementsList, TAG_HAL);
1046  Status = STATUS_NO_SUCH_DEVICE;
1047  }
1048  }
1049  else
1050  {
1051  /* Not enough memory */
1053  }
1054 
1055  /* Return the status */
1056  return Status;
1057 }
#define STATUS_INSUFFICIENT_RESOURCES
Definition: udferr_usr.h:158
VOID NTAPI HalpAcpiDetectResourceListSize(OUT PULONG ListSize)
Definition: halacpi.c:963
NTSTATUS NTAPI HalpBuildAcpiResourceList(IN PIO_RESOURCE_REQUIREMENTS_LIST ResourceList)
Definition: halacpi.c:973
ASSERT((InvokeOnSuccess||InvokeOnError||InvokeOnCancel)?(CompletionRoutine!=NULL):TRUE)
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
#define PAGED_CODE()
Definition: video.h:57
void DPRINT(...)
Definition: polytest.cpp:61
LONG NTSTATUS
Definition: precomp.h:26
LIST_ENTRY List
Definition: psmgr.c:57
#define NT_SUCCESS(StatCode)
Definition: apphelp.c:24
#define STATUS_NO_SUCH_DEVICE
Definition: udferr_usr.h:136
#define ExAllocatePoolWithTag(hernya, size, tag)
Definition: env_spec_w32.h:350
IO_RESOURCE_LIST List[1]
Definition: iotypes.h:2392
#define TAG_HAL
Definition: hal.h:55
Status
Definition: gdiplustypes.h:24
struct _IO_RESOURCE_DESCRIPTOR IO_RESOURCE_DESCRIPTOR
#define FIELD_OFFSET(t, f)
Definition: typedefs.h:254
unsigned int ULONG
Definition: retypes.h:1
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:261
#define ExFreePoolWithTag(_P, _T)
Definition: module.h:1099
UCHAR NTAPI HalpReadCmos ( IN UCHAR  Reg)

Definition at line 24 of file cmos.c.

Referenced by HalGetEnvironmentVariable(), HalpClockInterruptHandler(), HalpGetCmosData(), HalpInitializeClock(), HalpInitializeTsc(), HalQueryRealTimeClock(), HalSetEnvironmentVariable(), HalSetRealTimeClock(), HalStartProfileInterrupt(), HalStopProfileInterrupt(), and RtcSetClockRate().

25 {
26  /* Select the register */
28 
29  /* Query the value */
31 }
#define CMOS_CONTROL_PORT
Definition: halp.h:14
UCHAR NTAPI READ_PORT_UCHAR(PUCHAR Address)
Definition: mach.c:535
#define CMOS_DATA_PORT
Definition: halp.h:15
void WRITE_PORT_UCHAR(PUCHAR Address, UCHAR Value)
Definition: mach.c:539
VOID __cdecl HalpRealModeStart ( VOID  )
VOID NTAPI HalpRegisterKdSupportFunctions ( VOID  )

Definition at line 23 of file bus.c.

Referenced by HalInitializeProcessor().

24 {
25  /* Register PCI Device Functions */
28 
29  /* Register memory functions */
32 
33  /* Register ACPI stub */
35 }
VOID NTAPI HalpCheckPowerButton(VOID)
Definition: misc.c:20
#define KdUnmapVirtualAddress
Definition: halfuncs.h:52
NTSTATUS NTAPI HalpSetupPciDeviceForDebugging(IN PVOID LoaderBlock, IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice)
Definition: pci.c:473
PVOID NTAPI HalpMapPhysicalMemory64(IN PHYSICAL_ADDRESS PhysicalAddress, IN ULONG NumberPage)
Definition: misc.c:28
#define KdMapPhysicalMemory64
Definition: halfuncs.h:51
VOID NTAPI HalpUnmapVirtualAddress(IN PVOID VirtualAddress, IN ULONG NumberPages)
Definition: misc.c:39
#define KdSetupPciDeviceForDebugging
Definition: halfuncs.h:46
NTSTATUS NTAPI HalpReleasePciDeviceForDebugging(IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice)
Definition: pci.c:482
#define KdCheckPowerButton
Definition: halfuncs.h:49
#define KdReleasePciDeviceforDebugging
Definition: halfuncs.h:47
VOID NTAPI HalpRegisterVector ( IN UCHAR  Flags,
IN ULONG  BusVector,
IN ULONG  SystemVector,
IN KIRQL  Irql 
)

Definition at line 34 of file usage.c.

Referenced by HalpEnableInterruptHandler(), HalpInitializePICs(), and HalpReportResourceUsage().

38 {
39  /* Save the vector flags */
40  HalpIDTUsageFlags[SystemVector].Flags = Flags;
41 
42  /* Save the vector data */
43  HalpIDTUsage[SystemVector].Irql = Irql;
44  HalpIDTUsage[SystemVector].BusReleativeVector = BusVector;
45 }
IDTUsage HalpIDTUsage[256]
Definition: usage.c:20
IDTUsageFlags HalpIDTUsageFlags[256]
Definition: usage.c:19
_Out_ PKIRQL Irql
Definition: csq.h:179
UCHAR BusReleativeVector
Definition: halp.h:32
_Must_inspect_result_ _In_ ULONG Flags
Definition: wsk.h:170
UCHAR Flags
Definition: halp.h:26
KIRQL Irql
Definition: halp.h:31
VOID NTAPI HalpReleaseCmosSpinLock ( VOID  )

Definition at line 244 of file spinlock.c.

Referenced by HalGetEnvironmentVariable(), HalMakeBeep(), HalpGetCmosData(), HalpInitializeClock(), HalpSetCmosData(), HalQueryRealTimeClock(), HalSetEnvironmentVariable(), HalSetRealTimeClock(), HalStartProfileInterrupt(), HalStopProfileInterrupt(), and RtcSetClockRate().

245 {
247 
248  /* Get the flags */
249  Flags = HalpSystemHardwareFlags;
250 
251  /* Release the lock */
253 
254  /* Restore the flags */
255  __writeeflags(Flags);
256 }
FORCEINLINE VOID KxReleaseSpinLock(IN PKSPIN_LOCK SpinLock)
Definition: spinlock.h:35
uint32_t ULONG_PTR
Definition: typedefs.h:63
_Must_inspect_result_ _In_ ULONG Flags
Definition: wsk.h:170
ULONG_PTR HalpSystemHardwareFlags
Definition: spinlock.c:24
KSPIN_LOCK HalpSystemHardwareLock
Definition: spinlock.c:25
__INTRIN_INLINE void __writeeflags(uintptr_t Value)
Definition: intrin_x86.h:1555
NTSTATUS NTAPI HalpReleasePciDeviceForDebugging ( IN OUT PDEBUG_DEVICE_DESCRIPTOR  PciDevice)

Definition at line 482 of file pci.c.

Referenced by HalpRegisterKdSupportFunctions().

483 {
484  DPRINT1("Unimplemented!\n");
485  return STATUS_NOT_IMPLEMENTED;
486 }
#define STATUS_NOT_IMPLEMENTED
Definition: ntstatus.h:225
#define DPRINT1
Definition: precomp.h:8
VOID NTAPI HalpReportResourceUsage ( IN PUNICODE_STRING  HalName,
IN INTERFACE_TYPE  InterfaceType 
)

Definition at line 26 of file usage.c.

Referenced by HalReportResourceUsage().

28 {
29  DbgPrint("%wZ has been initialized\n", HalName);
30 }
#define DbgPrint
Definition: loader.c:25
PWCHAR HalName
Definition: halacpi.c:45
VOID NTAPI HalpReportSerialNumber ( VOID  )

Definition at line 33 of file misc.c.

Referenced by HalpReportResourceUsage().

34 {
36  UNICODE_STRING KeyString;
37  HANDLE Handle;
38 
39  /* Make sure there is a serial number */
40  if (!HalpSerialLen) return;
41 
42  /* Open the system key */
43  RtlInitUnicodeString(&KeyString, L"\\Registry\\Machine\\Hardware\\Description\\System");
44  Status = HalpOpenRegistryKey(&Handle, 0, &KeyString, KEY_ALL_ACCESS, FALSE);
45  if (NT_SUCCESS(Status))
46  {
47  /* Add the serial number */
48  RtlInitUnicodeString(&KeyString, L"Serial Number");
49  ZwSetValueKey(Handle,
50  &KeyString,
51  0,
52  REG_BINARY,
55 
56  /* Close the handle */
57  ZwClose(Handle);
58  }
59 }
#define REG_BINARY
Definition: nt_native.h:1496
NTSYSAPI NTSTATUS NTAPI ZwClose(_In_ HANDLE Handle)
#define FALSE
Definition: types.h:117
NTSTATUS NTAPI HalpOpenRegistryKey(IN PHANDLE KeyHandle, IN HANDLE RootKey, IN PUNICODE_STRING KeyName, IN ACCESS_MASK DesiredAccess, IN BOOLEAN Create)
Definition: misc.c:111
_In_ HANDLE Handle
Definition: extypes.h:390
LONG NTSTATUS
Definition: precomp.h:26
UCHAR HalpSerialLen
Definition: misc.c:24
#define NT_SUCCESS(StatCode)
Definition: apphelp.c:24
static const WCHAR L[]
Definition: oid.c:1087
Status
Definition: gdiplustypes.h:24
CHAR HalpSerialNumber[31]
Definition: misc.c:25
DWORD *typedef HANDLE
Definition: winlogon.h:60
#define KEY_ALL_ACCESS
Definition: nt_native.h:1041
NTSYSAPI VOID NTAPI RtlInitUnicodeString(PUNICODE_STRING DestinationString, PCWSTR SourceString)
NTSTATUS NTAPI HalpSetupPciDeviceForDebugging ( IN PVOID  LoaderBlock,
IN OUT PDEBUG_DEVICE_DESCRIPTOR  PciDevice 
)

Definition at line 473 of file pci.c.

Referenced by HalpRegisterKdSupportFunctions().

475 {
476  DPRINT1("Unimplemented!\n");
477  return STATUS_NOT_IMPLEMENTED;
478 }
#define STATUS_NOT_IMPLEMENTED
Definition: ntstatus.h:225
#define DPRINT1
Definition: precomp.h:8
VOID NTAPI HalpUnmapVirtualAddress ( IN PVOID  VirtualAddress,
IN PFN_COUNT  NumberPages 
)

Definition at line 39 of file misc.c.

Referenced by HalpAcpiGetTable(), HalpAcpiGetTableFromBios(), HalpAcpiTableCacheInit(), and HalpRegisterKdSupportFunctions().

41 {
42  /* Use kernel memory manager I/O map facilities */
43  MmUnmapIoSpace(VirtualAddress, NumberPages << PAGE_SHIFT);
44 }
#define PAGE_SHIFT
Definition: env_spec_w32.h:45
_In_ ULONG _In_ BOOLEAN _Must_inspect_result_ PVOID * VirtualAddress
Definition: ndis.h:3773
VOID NTAPI MmUnmapIoSpace(IN PVOID BaseAddress, IN SIZE_T NumberOfBytes)
Definition: iosup.c:193
VOID NTAPI HalpWriteCmos ( IN UCHAR  Reg,
IN UCHAR  Value 
)

Definition at line 35 of file cmos.c.

Referenced by HalpInitializeClock(), HalpInitializeTsc(), HalpSetCmosData(), HalSetEnvironmentVariable(), HalSetRealTimeClock(), HalStartProfileInterrupt(), HalStopProfileInterrupt(), and RtcSetClockRate().

37 {
38  /* Select the register */
40 
41  /* Write the value */
43 }
#define CMOS_CONTROL_PORT
Definition: halp.h:14
#define CMOS_DATA_PORT
Definition: halp.h:15
UINTN UINT8 Value
Definition: acefiex.h:751
void WRITE_PORT_UCHAR(PUCHAR Address, UCHAR Value)
Definition: mach.c:539
VOID FASTCALL KeUpdateSystemTime ( IN PKTRAP_FRAME  TrapFrame,
IN ULONG  Increment,
IN KIRQL  OldIrql 
)

Definition at line 64 of file time.c.

67 {
68  PKPRCB Prcb = KeGetCurrentPrcb();
69  ULARGE_INTEGER CurrentTime, InterruptTime;
70  LONG OldTickOffset;
71 
72  /* Check if this tick is being skipped */
73  if (Prcb->SkipTick)
74  {
75  /* Handle it next time */
76  Prcb->SkipTick = FALSE;
77 
78  /* Increase interrupt count and end the interrupt */
79  Prcb->InterruptCount++;
80  KiEndInterrupt(Irql, TrapFrame);
81 
82  /* Note: non-x86 return back to the caller! */
83  return;
84  }
85 
86  /* Add the increment time to the shared data */
87  InterruptTime.QuadPart = *(ULONGLONG*)&SharedUserData->InterruptTime;
88  InterruptTime.QuadPart += Increment;
89  KiWriteSystemTime(&SharedUserData->InterruptTime, InterruptTime);
90 
91  /* Check for timer expiration */
92  KiCheckForTimerExpiration(Prcb, TrapFrame, InterruptTime);
93 
94  /* Update the tick offset */
96 
97  /* If the debugger is enabled, check for break-in request */
99  {
100  /* Break-in requested! */
102  }
103 
104  /* Check for full tick */
105  if (OldTickOffset <= (LONG)Increment)
106  {
107  /* Update the system time */
108  CurrentTime.QuadPart = *(ULONGLONG*)&SharedUserData->SystemTime;
109  CurrentTime.QuadPart += KeTimeAdjustment;
110  KiWriteSystemTime(&SharedUserData->SystemTime, CurrentTime);
111 
112  /* Update the tick count */
113  CurrentTime.QuadPart = (*(ULONGLONG*)&KeTickCount) + 1;
114  KiWriteSystemTime(&KeTickCount, CurrentTime);
115 
116  /* Update it in the shared user data */
117  KiWriteSystemTime(&SharedUserData->TickCount, CurrentTime);
118 
119  /* Check for expiration with the new tick count as well */
120  KiCheckForTimerExpiration(Prcb, TrapFrame, InterruptTime);
121 
122  /* Reset the tick offset */
124 
125  /* Update processor/thread runtime */
126  KeUpdateRunTime(TrapFrame, Irql);
127  }
128  else
129  {
130  /* Increase interrupt count only */
131  Prcb->InterruptCount++;
132  }
133 
134  /* Disable interrupts and end the interrupt */
135  KiEndInterrupt(Irql, TrapFrame);
136 }
ULONG KeMaximumIncrement
Definition: clock.c:20
FORCEINLINE VOID KiWriteSystemTime(volatile KSYSTEM_TIME *SystemTime, ULARGE_INTEGER NewTime)
Definition: time.c:25
FORCEINLINE struct _KPRCB * KeGetCurrentPrcb(VOID)
Definition: ketypes.h:1062
_Out_ PKIRQL Irql
Definition: csq.h:179
ULONG KeTimeAdjustment
Definition: time.c:18
ULONGLONG QuadPart
Definition: ms-dtyp.idl:185
#define FALSE
Definition: types.h:117
long LONG
Definition: pedump.c:60
BOOLEAN NTAPI KdPollBreakIn(VOID)
Definition: kdmain.c:367
#define KiEndInterrupt(x, y)
Definition: ke.h:175
UCHAR SkipTick
Definition: ketypes.h:738
BOOLEAN KdDebuggerEnabled
Definition: kdmain.c:16
LONG KiTickOffset
Definition: time.c:17
#define InterlockedExchangeAdd
Definition: interlocked.h:181
ULONG InterruptCount
Definition: ketypes.h:732
FORCEINLINE VOID KiCheckForTimerExpiration(PKPRCB Prcb, PKTRAP_FRAME TrapFrame, ULARGE_INTEGER InterruptTime)
Definition: time.c:40
uint64_t ULONGLONG
Definition: typedefs.h:65
#define SharedUserData
NTKERNELAPI volatile KSYSTEM_TIME KeTickCount
Definition: clock.c:19
VOID NTAPI KeUpdateRunTime(IN PKTRAP_FRAME TrapFrame, IN KIRQL Irql)
Definition: time.c:140
#define DBG_STATUS_CONTROL_C
Definition: kdtypes.h:39
__analysis_noreturn NTSYSAPI VOID NTAPI DbgBreakPointWithStatus(_In_ ULONG Status)
IN OUT PLONG IN OUT PLONG Addend IN OUT PLONG IN LONG Increment
Definition: CrNtStubs.h:42

Variable Documentation

BOOLEAN HalDisableFirmwareMapper

Definition at line 43 of file halacpi.c.

Referenced by HalpMarkAcpiHal().

PWCHAR HalHardwareIdString

Definition at line 44 of file halacpi.c.

Referenced by HalpQueryIdFdo().

KAFFINITY HalpActiveProcessors

Definition at line 17 of file processor.c.

Referenced by HalInitializeProcessor(), and HalpBuildPartialFromIdt().

PADDRESS_USAGE HalpAddressUsageList

Definition at line 56 of file usage.c.

Referenced by HalInitSystem(), and HalpReportResourceUsage().

const USHORT HalpBuildType

Definition at line 22 of file halinit_apic.c.

Referenced by HalInitSystem().

KAFFINITY HalpDefaultInterruptAffinity

Definition at line 18 of file processor.c.

Referenced by HalInitializeProcessor(), and HalpGetRootInterruptVector().

ADDRESS_USAGE HalpDefaultIoSpace

Definition at line 78 of file usage.c.

Referenced by HalInitSystem().

IDTUsageFlags HalpIDTUsageFlags[MAXIMUM_IDTVECTOR+1]

Definition at line 19 of file usage.c.

Referenced by HalpGetSystemInterruptVector().

BOOLEAN HalpNMIInProgress

Definition at line 22 of file misc.c.

Referenced by HalHandleNMI(), and HalpRestoreTrapHandlers().

LARGE_INTEGER HalpPerfCounter

Definition at line 25 of file timer.c.

Referenced by KeQueryPerformanceCounter().

BOOLEAN HalpProfilingStopped
KSPIN_LOCK HalpSystemHardwareLock

Definition at line 18 of file cmos.c.

Referenced by HalInitSystem(), HalpAcquireCmosSpinLock(), and HalpReleaseCmosSpinLock().