This graph shows which files directly or indirectly include this file:

Classes
struct	_HAL_BIOS_FRAME

struct	_IDTUsageFlags

struct	IDTUsage

struct	_HalAddressUsage

struct	_HALP_ROLLOVER

Macros
#define	HAL_BUILD_TYPE ((DBG ? PRCB_BUILD_DEBUG : 0) \| PRCB_BUILD_UNIPROCESSOR)

#define	SYNCH_LEVEL HalpIrqlSynchLevel

#define	HAL_APC_REQUEST 0

#define	HAL_DPC_REQUEST 1

#define	HAL_PROFILING_INTERVAL 0

#define	HAL_PROFILING_MULTIPLIER 1

#define	IDT_REGISTERED 0x01

#define	IDT_LATCHED 0x02

#define	IDT_READ_ONLY 0x04

#define	IDT_INTERNAL 0x11

#define	IDT_DEVICE 0x21

#define	HALP_LOW_STUB_SIZE_IN_PAGES 3

#define	BCD_INT(bcd) (((bcd & 0xF0) >> 4) * 10 + (bcd & 0x0F))

#define	INT_BCD(int) (UCHAR)(((int / 10) << 4) + (int % 10))

#define	HALP_REVISION_FROM_HACK_FLAGS(x) ((x) >> 24)

#define	HALP_REVISION_HACK_FLAGS(x) ((x) >> 12)

#define	HALP_HACK_FLAGS(x) ((x) & 0xFFF)

#define	HALP_CARD_FEATURE_FULL_DECODE 0x0001

#define	HALP_CHECK_CARD_REVISION_ID 0x10000

#define	HALP_CHECK_CARD_SUBVENDOR_ID 0x20000

#define	HALP_CHECK_CARD_SUBSYSTEM_ID 0x40000

#define	HalAddressToPde(x) (PHARDWARE_PTE)MiAddressToPde(x)

#define	HalAddressToPte(x) (PHARDWARE_PTE)MiAddressToPte(x)

Typedefs
typedef struct _HAL_BIOS_FRAME	HAL_BIOS_FRAME

typedef struct _HAL_BIOS_FRAME *	PHAL_BIOS_FRAME

typedef VOID(__cdecl *	PHAL_SW_INTERRUPT_HANDLER) (VOID)

typedef VOID(FASTCALL *	PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY) (IN PKTRAP_FRAME TrapFrame)

typedef BOOLEAN(NTAPI *	PHAL_DISMISS_INTERRUPT) (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

typedef struct _IDTUsageFlags	IDTUsageFlags

typedef struct _HalAddressUsage	ADDRESS_USAGE

typedef struct _HalAddressUsage *	PADDRESS_USAGE

typedef struct _HALP_ROLLOVER	HALP_ROLLOVER

typedef struct _HALP_ROLLOVER *	PHALP_ROLLOVER

Functions
BOOLEAN NTAPI	HalpDismissIrqGeneric (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrq15 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrq13 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrq07 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrqLevel (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrq15Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrq13Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrq07Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

VOID __cdecl	HalpHardwareInterruptLevel (VOID)

PADAPTER_OBJECT NTAPI	HalpAllocateAdapterEx (ULONG NumberOfMapRegisters, BOOLEAN IsMaster, BOOLEAN Dma32BitAddresses)

VOID NTAPI	HalpRegisterVector (IN UCHAR Flags, IN ULONG BusVector, IN ULONG SystemVector, IN KIRQL Irql)

VOID NTAPI	HalpEnableInterruptHandler (IN UCHAR Flags, IN ULONG BusVector, IN ULONG SystemVector, IN KIRQL Irql, IN PVOID Handler, IN KINTERRUPT_MODE Mode)

VOID NTAPI	HalpInitializePICs (IN BOOLEAN EnableInterrupts)

VOID __cdecl	HalpApcInterrupt (VOID)

VOID __cdecl	HalpDispatchInterrupt (VOID)

PHAL_SW_INTERRUPT_HANDLER __cdecl	HalpDispatchInterrupt2 (VOID)

DECLSPEC_NORETURN VOID FASTCALL	HalpApcInterrupt2ndEntry (IN PKTRAP_FRAME TrapFrame)

DECLSPEC_NORETURN VOID FASTCALL	HalpDispatchInterrupt2ndEntry (IN PKTRAP_FRAME TrapFrame)

	CODE_SEG ("INIT") VOID NTAPI HalpInitializeClock(VOID)

VOID __cdecl	HalpClockInterrupt (VOID)

VOID __cdecl	HalpClockIpi (VOID)

VOID __cdecl	HalpProfileInterrupt (VOID)

VOID NTAPI	HalpCalibrateStallExecution (VOID)

VOID	HalpInitPciBus (VOID)

VOID	HalpInitPhase0 (PLOADER_PARAMETER_BLOCK LoaderBlock)

VOID	HalpInitPhase1 (VOID)

VOID NTAPI	HalpFlushTLB (VOID)

VOID NTAPI	HalpCheckPowerButton (VOID)

VOID NTAPI	HalpRegisterKdSupportFunctions (VOID)

NTSTATUS NTAPI	HalpSetupPciDeviceForDebugging (IN PVOID LoaderBlock, IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice)

NTSTATUS NTAPI	HalpReleasePciDeviceForDebugging (IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice)

ULONG64 NTAPI	HalpAllocPhysicalMemory (IN PLOADER_PARAMETER_BLOCK LoaderBlock, IN ULONG64 MaxAddress, IN PFN_NUMBER PageCount, IN BOOLEAN Aligned)

PVOID NTAPI	HalpMapPhysicalMemory64Vista (IN PHYSICAL_ADDRESS PhysicalAddress, IN PFN_COUNT PageCount, IN BOOLEAN FlushCurrentTLB)

VOID NTAPI	HalpUnmapVirtualAddressVista (IN PVOID VirtualAddress, IN PFN_COUNT NumberPages, IN BOOLEAN FlushCurrentTLB)

PVOID NTAPI	HalpMapPhysicalMemory64 (IN PHYSICAL_ADDRESS PhysicalAddress, IN PFN_COUNT PageCount)

VOID NTAPI	HalpUnmapVirtualAddress (IN PVOID VirtualAddress, IN PFN_COUNT NumberPages)

NTSTATUS NTAPI	HaliHandlePCIConfigSpaceAccess (_In_ BOOLEAN IsRead, _In_ ULONG Port, _In_ ULONG Length, _Inout_ PULONG Buffer)

NTSTATUS NTAPI	HaliQuerySystemInformation (IN HAL_QUERY_INFORMATION_CLASS InformationClass, IN ULONG BufferSize, IN OUT PVOID Buffer, OUT PULONG ReturnedLength)

NTSTATUS NTAPI	HaliSetSystemInformation (IN HAL_SET_INFORMATION_CLASS InformationClass, IN ULONG BufferSize, IN OUT PVOID Buffer)

BOOLEAN NTAPI	HalpBiosDisplayReset (VOID)

VOID FASTCALL	HalpExitToV86 (PKTRAP_FRAME TrapFrame)

VOID __cdecl	HalpRealModeStart (VOID)

VOID NTAPI	HaliHaltSystem (VOID)

VOID NTAPI	HalpInitializeCmos (VOID)

	_Requires_lock_held_ (HalpSystemHardwareLock) UCHAR NTAPI HalpReadCmos(IN UCHAR Reg)

	_Acquires_lock_ (HalpSystemHardwareLock) VOID NTAPI HalpAcquireCmosSpinLock(VOID)

	_Releases_lock_ (HalpSystemHardwareLock) VOID NTAPI HalpReleaseCmosSpinLock(VOID)

VOID NTAPI	HalpInitializeLegacyPICs (VOID)

NTSTATUS NTAPI	HalpOpenRegistryKey (IN PHANDLE KeyHandle, IN HANDLE RootKey, IN PUNICODE_STRING KeyName, IN ACCESS_MASK DesiredAccess, IN BOOLEAN Create)

VOID NTAPI	HalpGetNMICrashFlag (VOID)

BOOLEAN NTAPI	HalpGetDebugPortTable (VOID)

VOID NTAPI	HalpReportSerialNumber (VOID)

NTSTATUS NTAPI	HalpMarkAcpiHal (VOID)

VOID NTAPI	HalpBuildAddressMap (VOID)

VOID NTAPI	HalpReportResourceUsage (IN PUNICODE_STRING HalName, IN INTERFACE_TYPE InterfaceType)

ULONG NTAPI	HalpIs16BitPortDecodeSupported (VOID)

NTSTATUS NTAPI	HalpQueryAcpiResourceRequirements (OUT PIO_RESOURCE_REQUIREMENTS_LIST *Requirements)

VOID FASTCALL	KeUpdateSystemTime (IN PKTRAP_FRAME TrapFrame, IN ULONG Increment, IN KIRQL OldIrql)

VOID NTAPI	KeUpdateRunTime (_In_ PKTRAP_FRAME TrapFrame, _In_ KIRQL Irql)

VOID NTAPI	HalpInitBusHandlers (VOID)

NTSTATUS NTAPI	HaliInitPnpDriver (VOID)

VOID NTAPI	HalpDebugPciDumpBus (IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER PciSlot, IN ULONG i, IN ULONG j, IN ULONG k, IN PPCI_COMMON_CONFIG PciData)

VOID NTAPI	HalpInitProcessor (IN ULONG ProcessorNumber, IN PLOADER_PARAMETER_BLOCK LoaderBlock)

VOID NTAPI	HalInitializeBios (_In_ ULONG Phase, _In_ PLOADER_PARAMETER_BLOCK LoaderBlock)

Macro Definition Documentation

◆ BCD_INT

#define BCD_INT ( bcd ) (((bcd & 0xF0) >> 4) * 10 + (bcd & 0x0F))

Definition at line 71 of file halp.h.

◆ HAL_APC_REQUEST

#define HAL_APC_REQUEST 0

Definition at line 50 of file halp.h.

◆ HAL_BUILD_TYPE

#define HAL_BUILD_TYPE ((DBG ? PRCB_BUILD_DEBUG : 0) | PRCB_BUILD_UNIPROCESSOR)

Definition at line 10 of file halp.h.

◆ HAL_DPC_REQUEST

#define HAL_DPC_REQUEST 1

Definition at line 51 of file halp.h.

◆ HAL_PROFILING_INTERVAL

#define HAL_PROFILING_INTERVAL 0

Definition at line 54 of file halp.h.

◆ HAL_PROFILING_MULTIPLIER

#define HAL_PROFILING_MULTIPLIER 1

Definition at line 55 of file halp.h.

◆ HalAddressToPde

#define HalAddressToPde ( x ) (PHARDWARE_PTE)MiAddressToPde(x)

Definition at line 176 of file halp.h.

◆ HalAddressToPte

#define HalAddressToPte ( x ) (PHARDWARE_PTE)MiAddressToPte(x)

Definition at line 177 of file halp.h.

◆ HALP_CARD_FEATURE_FULL_DECODE

#define HALP_CARD_FEATURE_FULL_DECODE 0x0001

Definition at line 164 of file halp.h.

◆ HALP_CHECK_CARD_REVISION_ID

#define HALP_CHECK_CARD_REVISION_ID 0x10000

Definition at line 169 of file halp.h.

◆ HALP_CHECK_CARD_SUBSYSTEM_ID

#define HALP_CHECK_CARD_SUBSYSTEM_ID 0x40000

Definition at line 171 of file halp.h.

◆ HALP_CHECK_CARD_SUBVENDOR_ID

#define HALP_CHECK_CARD_SUBVENDOR_ID 0x20000

Definition at line 170 of file halp.h.

◆ HALP_HACK_FLAGS

#define HALP_HACK_FLAGS ( x ) ((x) & 0xFFF)

Definition at line 159 of file halp.h.

◆ HALP_LOW_STUB_SIZE_IN_PAGES

#define HALP_LOW_STUB_SIZE_IN_PAGES 3

Definition at line 67 of file halp.h.

◆ HALP_REVISION_FROM_HACK_FLAGS

#define HALP_REVISION_FROM_HACK_FLAGS ( x ) ((x) >> 24)

Definition at line 157 of file halp.h.

◆ HALP_REVISION_HACK_FLAGS

#define HALP_REVISION_HACK_FLAGS ( x ) ((x) >> 12)

Definition at line 158 of file halp.h.

◆ IDT_DEVICE

#define IDT_DEVICE 0x21

Definition at line 62 of file halp.h.

◆ IDT_INTERNAL

#define IDT_INTERNAL 0x11

Definition at line 61 of file halp.h.

◆ IDT_LATCHED

#define IDT_LATCHED 0x02

Definition at line 59 of file halp.h.

◆ IDT_READ_ONLY

#define IDT_READ_ONLY 0x04

Definition at line 60 of file halp.h.

◆ IDT_REGISTERED

#define IDT_REGISTERED 0x01

Definition at line 58 of file halp.h.

◆ INT_BCD

#define INT_BCD ( int ) (UCHAR)(((int / 10) << 4) + (int % 10))

Definition at line 73 of file halp.h.

◆ SYNCH_LEVEL

#define SYNCH_LEVEL HalpIrqlSynchLevel

Definition at line 18 of file halp.h.

Typedef Documentation

◆ ADDRESS_USAGE

typedef struct _HalAddressUsage ADDRESS_USAGE

◆ HAL_BIOS_FRAME

typedef struct _HAL_BIOS_FRAME HAL_BIOS_FRAME

◆ HALP_ROLLOVER

typedef struct _HALP_ROLLOVER HALP_ROLLOVER

◆ IDTUsageFlags

typedef struct _IDTUsageFlags IDTUsageFlags

◆ PADDRESS_USAGE

typedef struct _HalAddressUsage * PADDRESS_USAGE

◆ PHAL_BIOS_FRAME

typedef struct _HAL_BIOS_FRAME * PHAL_BIOS_FRAME

◆ PHAL_DISMISS_INTERRUPT

typedef BOOLEAN(NTAPI * PHAL_DISMISS_INTERRUPT) (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

Definition at line 77 of file halp.h.

◆ PHAL_SW_INTERRUPT_HANDLER

typedef VOID(__cdecl * PHAL_SW_INTERRUPT_HANDLER) (VOID)

Definition at line 39 of file halp.h.

◆ PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY

typedef VOID(FASTCALL * PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY) (IN PKTRAP_FRAME TrapFrame)

Definition at line 45 of file halp.h.

◆ PHALP_ROLLOVER

typedef struct _HALP_ROLLOVER * PHALP_ROLLOVER

Function Documentation

◆ _Acquires_lock_()

_Acquires_lock_ ( HalpSystemHardwareLock )

◆ _Releases_lock_()

_Releases_lock_ ( HalpSystemHardwareLock )

◆ _Requires_lock_held_()

_Requires_lock_held_ ( HalpSystemHardwareLock )

◆ CODE_SEG()

CODE_SEG ( "INIT" )

Definition at line 1810 of file Interface.c.

{
    UNICODE_STRING DeviceName = RTL_CONSTANT_STRING(L"\\FileSystem\\Filters\\"DRIVER_NAME);
    PDEVICE_OBJECT RawDeviceObject;
    PDEVICE_OBJECT DeviceObject;
    PFILE_OBJECT RawFileObject;
    UNICODE_STRING ObjectName;
    UNICODE_STRING SymLink;
 
    NTSTATUS Status;
 
    RtlZeroMemory(&DriverData, sizeof(DRIVER_DATA));
    DriverData.DriverObject = DriverObject;
 
    /* Save the registry key for this driver */
    DriverData.ServiceKey.Length = RegistryPath->Length;
    DriverData.ServiceKey.MaximumLength = RegistryPath->MaximumLength;
    DriverData.ServiceKey.Buffer = (PWCHAR)ExAllocatePoolWithTag(NonPagedPool,
                                                                 RegistryPath->MaximumLength,
                                                                 FM_TAG_REGISTRY_DATA);
    if (!DriverData.ServiceKey.Buffer) return STATUS_INSUFFICIENT_RESOURCES;
    RtlCopyUnicodeString(&DriverData.ServiceKey, RegistryPath);
 
    /* Do some initialization */
    ExInitializeFastMutex(&DriverData.FilterAttachLock);
 
    /* Create the main filter manager device object */
    Status = IoCreateDevice(DriverObject,
                            0,
                            &DeviceName,
                            FILE_DEVICE_DISK_FILE_SYSTEM,
                            FILE_DEVICE_SECURE_OPEN,
                            FALSE,
                            &DeviceObject);
    if (!NT_SUCCESS(Status))
    {
        DPRINT1("fltmgr IoCreateDevice failed.  Status = %X\n", Status);
        goto Cleanup;
    }
 
    /* Store a global reference so we can access from callbacks */
    DriverData.DeviceObject = DeviceObject;
 
    /* Generate the symbolic link name */
    RtlInitUnicodeString(&SymLink, L"\\??\\"DRIVER_NAME);
    Status = IoCreateSymbolicLink(&SymLink, &DeviceName);
    if (!NT_SUCCESS(Status)) goto Cleanup;
 
    /* Create the callbacks for the dispatch table, FastIo and FS callbacks */
    Status = SetupDispatchAndCallbacksTables(DriverObject);
    if (!NT_SUCCESS(Status)) goto Cleanup;
 
    /* Initialize the comms objects */
    Status = FltpSetupCommunicationObjects(DriverObject);
    if (!NT_SUCCESS(Status)) goto Cleanup;
 
    /* Register for notifications when a new file system is loaded. This also enumerates any existing file systems */
    Status = IoRegisterFsRegistrationChange(DriverObject, FltpFsNotification);
    FLT_ASSERT(Status != STATUS_DEVICE_ALREADY_ATTACHED); // Windows checks for this, I'm not sure how it can happen. Needs investigation??
    if (!NT_SUCCESS(Status))  goto Cleanup;
 
    InitializeListHead(&FilterList);
    ExInitializeResourceLite(&FilterListLock);
 
    /* IoRegisterFsRegistrationChange isn't notified about the raw  file systems, so we attach to them manually */
    RtlInitUnicodeString(&ObjectName, L"\\Device\\RawDisk");
    Status = IoGetDeviceObjectPointer(&ObjectName,
                                      FILE_READ_ATTRIBUTES,
                                      &RawFileObject,
                                      &RawDeviceObject);
    if (NT_SUCCESS(Status))
    {
        FltpFsNotification(RawDeviceObject, TRUE);
        ObDereferenceObject(RawFileObject);
    }
 
    RtlInitUnicodeString(&ObjectName, L"\\Device\\RawCdRom");
    Status = IoGetDeviceObjectPointer(&ObjectName,
                                      FILE_READ_ATTRIBUTES,
                                      &RawFileObject,
                                      &RawDeviceObject);
    if (NT_SUCCESS(Status))
    {
        FltpFsNotification(RawDeviceObject, TRUE);
        ObDereferenceObject(RawFileObject);
    }
 
    /* We're done, clear the initializing flag */
    ClearFlag(DeviceObject->Flags, DO_DEVICE_INITIALIZING);
    Status = STATUS_SUCCESS;
 
Cleanup:
 
    if (!NT_SUCCESS(Status))
    {
        if (DriverData.FastIoDispatch)
        {
            DriverObject->FastIoDispatch = NULL;
            ExFreePoolWithTag(DriverData.FastIoDispatch, FM_TAG_DISPATCH_TABLE);
        }
 
        IoDeleteSymbolicLink(&SymLink);
 
        if (DeviceObject)
            IoDeleteDevice(DeviceObject);
 
        if (DriverData.ServiceKey.Buffer)
            ExFreePoolWithTag(DriverData.ServiceKey.Buffer, FM_TAG_REGISTRY_DATA);
    }
 
    return Status;
}

◆ HaliHaltSystem()

VOID NTAPI HaliHaltSystem ( VOID )

Definition at line 21 of file processor.c.

{
    /* Disable interrupts and halt the CPU */
    _disable();
    __halt();
}

Referenced by HalInitSystem().

◆ HaliHandlePCIConfigSpaceAccess()

NTSTATUS NTAPI HaliHandlePCIConfigSpaceAccess	(	_In_ BOOLEAN	IsRead,
		_In_ ULONG	Port,
		_In_ ULONG	Length,
		_Inout_ PULONG	Buffer
	)

Definition at line 43 of file sysinfo.c.

{
    DPRINT1("HaliHandlePCIConfigSpaceAccess: IsRead %X, Port 0x%X, Length %u, Buffer %p\n", IsRead, Port, Length, Buffer);
    //ASSERT(FALSE);
    return STATUS_NOT_IMPLEMENTED;
}

◆ HaliInitPnpDriver()

NTSTATUS NTAPI HaliInitPnpDriver ( VOID )

Definition at line 906 of file halpnpdd.c.

{
    NTSTATUS Status;
    UNICODE_STRING DriverString;
    PAGED_CODE();
 
    /* Create the driver */
    RtlInitUnicodeString(&DriverString, L"\\Driver\\ACPI_HAL");
    Status = IoCreateDriver(&DriverString, HalpDriverEntry);
 
    /* Return status */
    return Status;
}

Referenced by HalInitSystem().

◆ HalInitializeBios()

VOID NTAPI HalInitializeBios	(	_In_ ULONG	Phase,
		_In_ PLOADER_PARAMETER_BLOCK	LoaderBlock
	)

Definition at line 48 of file x86bios.c.

{
    PPFN_NUMBER PfnArray;
    PFN_NUMBER Pfn, Last;
    PMEMORY_ALLOCATION_DESCRIPTOR Descriptor;
    PLIST_ENTRY ListEntry;
    PMDL Mdl;
    ULONG64 PhysicalAddress;
 
    if (Phase == 0)
    {
        /* Allocate one page for a fallback mapping */
        PhysicalAddress = HalpAllocPhysicalMemory(LoaderBlock,
                                                  0x100000,
                                                  1,
                                                  FALSE);
        if (PhysicalAddress == 0)
        {
            ASSERT(FALSE);
        }
 
        x86BiosFallbackPfn = PhysicalAddress / PAGE_SIZE;
        ASSERT(x86BiosFallbackPfn != 0);
 
        /* Allocate a page for the buffer allocation */
        x86BiosBufferPhysical = HalpAllocPhysicalMemory(LoaderBlock,
                                                        0x100000,
                                                        1,
                                                        FALSE);
        if (x86BiosBufferPhysical == 0)
        {
            ASSERT(FALSE);
        }
    }
    else
    {
 
        /* Allocate an MDL for 1MB */
        Mdl = IoAllocateMdl(NULL, 0x100000, FALSE, FALSE, NULL);
        if (!Mdl)
        {
            ASSERT(FALSE);
        }
 
        /* Get pointer to the pfn array */
        PfnArray = MmGetMdlPfnArray(Mdl);
 
        /* Fill the array with the fallback page */
        for (Pfn = 0; Pfn < 0x100; Pfn++)
        {
            PfnArray[Pfn] = x86BiosFallbackPfn;
        }
 
        /* Loop the memory descriptors */
        for (ListEntry = LoaderBlock->MemoryDescriptorListHead.Flink;
             ListEntry != &LoaderBlock->MemoryDescriptorListHead;
             ListEntry = ListEntry->Flink)
        {
            /* Get the memory descriptor */
            Descriptor = CONTAINING_RECORD(ListEntry,
                                           MEMORY_ALLOCATION_DESCRIPTOR,
                                           ListEntry);
 
            /* Check if the memory is in the low 1 MB range */
            if (Descriptor->BasePage < 0x100)
            {
                /* Check if the memory type is firmware */
                if ((Descriptor->MemoryType == LoaderFirmwarePermanent) ||
                    (Descriptor->MemoryType == LoaderSpecialMemory))
                {
                    /* It's firmware, so map it! */
                    Last = min(Descriptor->BasePage + Descriptor->PageCount, 0x100);
                    for (Pfn = Descriptor->BasePage; Pfn < Last; Pfn++)
                    {
                        /* Set each physical page in the MDL */
                        PfnArray[Pfn] = Pfn;
                    }
                }
            }
        }
 
        /* Map this page proper, too */
        Pfn = x86BiosBufferPhysical / PAGE_SIZE;
        PfnArray[Pfn] = Pfn;
 
        Mdl->MdlFlags = MDL_PAGES_LOCKED;
 
        /* Map the MDL to system space */
        x86BiosMemoryMapping = MmGetSystemAddressForMdlSafe(Mdl, HighPagePriority);
        ASSERT(x86BiosMemoryMapping);
 
        DPRINT1("*x86BiosMemoryMapping: %p, %p\n",
                *(PVOID*)x86BiosMemoryMapping, *(PVOID*)(x86BiosMemoryMapping + 8));
        //DbgDumpPage(x86BiosMemoryMapping, 0xc351);
 
        x86BiosIsInitialized = TRUE;
    }
}

Referenced by HalInitSystem().

◆ HaliQuerySystemInformation()

NTSTATUS NTAPI HaliQuerySystemInformation	(	IN HAL_QUERY_INFORMATION_CLASS	InformationClass,
		IN ULONG	BufferSize,
		IN OUT PVOID	Buffer,
		OUT PULONG	ReturnedLength
	)

Definition at line 19 of file sysinfo.c.

{
    UNIMPLEMENTED;
    while (TRUE);
    return STATUS_NOT_IMPLEMENTED;
}

Referenced by HalInitSystem().

◆ HaliSetSystemInformation()

NTSTATUS NTAPI HaliSetSystemInformation	(	IN HAL_SET_INFORMATION_CLASS	InformationClass,
		IN ULONG	BufferSize,
		IN OUT PVOID	Buffer
	)

Definition at line 31 of file sysinfo.c.

{
    UNIMPLEMENTED;
    while (TRUE);
    return STATUS_NOT_IMPLEMENTED;
}

Referenced by HalInitSystem().

◆ HalpAllocateAdapterEx()

PADAPTER_OBJECT NTAPI HalpAllocateAdapterEx	(	ULONG	NumberOfMapRegisters,
		BOOLEAN	IsMaster,
		BOOLEAN	Dma32BitAddresses
	)

◆ HalpAllocPhysicalMemory()

ULONG64 NTAPI HalpAllocPhysicalMemory	(	IN PLOADER_PARAMETER_BLOCK	LoaderBlock,
		IN ULONG64	MaxAddress,
		IN PFN_NUMBER	PageCount,
		IN BOOLEAN	Aligned
	)

Definition at line 29 of file memory.c.

{
    ULONG UsedDescriptors;
    ULONG64 PhysicalAddress;
    PFN_NUMBER MaxPage, BasePage, Alignment;
    PLIST_ENTRY NextEntry;
    PMEMORY_ALLOCATION_DESCRIPTOR MdBlock, NewBlock, FreeBlock;
 
    /* Highest page we'll go */
    MaxPage = MaxAddress >> PAGE_SHIFT;
 
    /* We need at least two blocks */
    if ((HalpUsedAllocDescriptors + 2) > 64) return 0;
 
    /* Remember how many we have now */
    UsedDescriptors = HalpUsedAllocDescriptors;
 
    /* Loop the loader block memory descriptors */
    NextEntry = LoaderBlock->MemoryDescriptorListHead.Flink;
    while (NextEntry != &LoaderBlock->MemoryDescriptorListHead)
    {
        /* Get the block */
        MdBlock = CONTAINING_RECORD(NextEntry,
                                    MEMORY_ALLOCATION_DESCRIPTOR,
                                    ListEntry);
 
        /* No alignment by default */
        Alignment = 0;
 
        /* Unless requested, in which case we use a 64KB block alignment */
        if (Aligned) Alignment = ((MdBlock->BasePage + 0x0F) & ~0x0F) - MdBlock->BasePage;
 
        /* Search for free memory */
        if ((MdBlock->MemoryType == LoaderFree) ||
            (MdBlock->MemoryType == LoaderFirmwareTemporary))
        {
            /* Make sure the page is within bounds, including alignment */
            BasePage = MdBlock->BasePage;
            if ((BasePage) &&
                (MdBlock->PageCount >= PageCount + Alignment) &&
                (BasePage + PageCount + Alignment < MaxPage))
            {
                /* We found an address */
                PhysicalAddress = ((ULONG64)BasePage + Alignment) << PAGE_SHIFT;
                break;
            }
        }
 
        /* Keep trying */
        NextEntry = NextEntry->Flink;
    }
 
    /* If we didn't find anything, get out of here */
    if (NextEntry == &LoaderBlock->MemoryDescriptorListHead) return 0;
 
    /* Okay, now get a descriptor */
    NewBlock = &HalpAllocationDescriptorArray[HalpUsedAllocDescriptors];
    NewBlock->PageCount = (ULONG)PageCount;
    NewBlock->BasePage = MdBlock->BasePage + Alignment;
    NewBlock->MemoryType = LoaderHALCachedMemory;
 
    /* Update count */
    UsedDescriptors++;
    HalpUsedAllocDescriptors = UsedDescriptors;
 
    /* Check if we had any alignment */
    if (Alignment)
    {
        /* Check if we had leftovers */
        if (MdBlock->PageCount > (PageCount + Alignment))
        {
            /* Get the next descriptor */
            FreeBlock = &HalpAllocationDescriptorArray[UsedDescriptors];
            FreeBlock->PageCount = MdBlock->PageCount - Alignment - (ULONG)PageCount;
            FreeBlock->BasePage = MdBlock->BasePage + Alignment + (ULONG)PageCount;
 
            /* One more */
            HalpUsedAllocDescriptors++;
 
            /* Insert it into the list */
            InsertHeadList(&MdBlock->ListEntry, &FreeBlock->ListEntry);
        }
 
        /* Trim the original block to the alignment only */
        MdBlock->PageCount = Alignment;
 
        /* Insert the descriptor after the original one */
        InsertHeadList(&MdBlock->ListEntry, &NewBlock->ListEntry);
    }
    else
    {
        /* Consume memory from this block */
        MdBlock->BasePage += (ULONG)PageCount;
        MdBlock->PageCount -= (ULONG)PageCount;
 
        /* Insert the descriptor before the original one */
        InsertTailList(&MdBlock->ListEntry, &NewBlock->ListEntry);
 
        /* Remove the entry if the whole block was allocated */
        if (MdBlock->PageCount == 0) RemoveEntryList(&MdBlock->ListEntry);
    }
 
    /* Return the address */
    return PhysicalAddress;
}

Referenced by HalInitializeBios(), HalpAcpiCopyBiosTable(), HalpAcpiFindRsdtPhase0(), HalpSetupAcpiPhase0(), and HalpSetupPciDeviceForDebugging().

◆ HalpApcInterrupt()

VOID __cdecl HalpApcInterrupt ( VOID )

Referenced by HalpInitializePICs().

◆ HalpApcInterrupt2ndEntry()

DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry ( IN PKTRAP_FRAME TrapFrame )

Definition at line 1134 of file pic.c.

{
    /* Do the work */
    _HalpApcInterruptHandler(TrapFrame);
}

◆ HalpBiosDisplayReset()

BOOLEAN NTAPI HalpBiosDisplayReset ( VOID )

Definition at line 642 of file bios.c.

{
#if defined(SARCH_XBOX) || defined(SARCH_PC98)
    /* There is no VGA BIOS on these machine types */
    return FALSE;
#else
    ULONG Flags;
    PHARDWARE_PTE IdtPte;
    BOOLEAN RestoreWriteProtection = FALSE;
 
    //
    // Disable interrupts
    //
    Flags = __readeflags();
    _disable();
 
    //
    // Map memory available to the V8086 real-mode code
    //
    HalpMapRealModeMemory();
 
    //
    // On P5, the first 7 entries of the IDT are write protected to work around
    // the cmpxchg8b lock errata. Unprotect them here so we can set our custom
    // invalid op-code handler.
    //
    IdtPte = HalAddressToPte(KeGetPcr()->IDT);
    RestoreWriteProtection = IdtPte->Write != 0;
    IdtPte->Write = 1;
 
    //
    // Use special invalid opcode and GPF trap handlers
    //
    HalpSwitchToRealModeTrapHandlers();
 
    //
    // Configure the IOPM and TSS
    //
    HalpSetupRealModeIoPermissionsAndTask();
 
    //
    // Now jump to real mode
    //
    HalpBiosCall();
 
    //
    // Restore kernel trap handlers
    //
    HalpRestoreTrapHandlers();
 
    //
    // Restore write permission
    //
    IdtPte->Write = RestoreWriteProtection;
 
    //
    // Restore TSS and IOPM
    //
    HalpRestoreIoPermissionsAndTask();
 
    //
    // Restore low memory mapping
    //
    HalpUnmapRealModeMemory();
 
    //
    // Restore interrupts if they were previously enabled
    //
    __writeeflags(Flags);
    return TRUE;
#endif
}

Referenced by HalInitSystem().

◆ HalpBuildAddressMap()

VOID NTAPI HalpBuildAddressMap ( VOID )

Definition at line 944 of file halacpi.c.

{
    /* ACPI is magic baby */
}

Referenced by HalpReportResourceUsage().

◆ HalpCalibrateStallExecution()

VOID NTAPI HalpCalibrateStallExecution ( VOID )

Definition at line 105 of file pchw.c.

{
    ULONG i;
    ULONG calib_bit;
    ULONG CurCount;
 
    /* Initialise timer interrupt with MILLISECOND ms interval        */
    WRITE_PORT_UCHAR((PUCHAR)0x43, 0x34);  /* binary, mode 2, LSB/MSB, ch 0 */
    WRITE_PORT_UCHAR((PUCHAR)0x40, LATCH & 0xff); /* LSB */
    WRITE_PORT_UCHAR((PUCHAR)0x40, LATCH >> 8); /* MSB */
 
    /* Stage 1:  Coarse calibration                                   */
 
    delay_count = 1;
 
    do
    {
        /* Next delay count to try */
        delay_count <<= 1;
 
        WaitFor8254Wraparound();
 
        /* Do the delay */
        __StallExecutionProcessor(delay_count);
 
        CurCount = Read8254Timer();
    }
    while (CurCount > LATCH / 2);
 
    /* Get bottom value for delay */
    delay_count >>= 1;
 
    /* Stage 2:  Fine calibration                                     */
 
    /* Which bit are we going to test */
    calib_bit = delay_count;
 
    for (i = 0; i < PRECISION; i++)
    {
        /* Next bit to calibrate */
        calib_bit >>= 1;
 
        /* If we have done all bits, stop */
        if (!calib_bit) break;
 
        /* Set the bit in delay_count */
        delay_count |= calib_bit;
 
        WaitFor8254Wraparound();
 
        /* Do the delay */
        __StallExecutionProcessor(delay_count);
 
        CurCount = Read8254Timer();
        /* If a tick has passed, turn the calibrated bit back off */
        if (CurCount <= LATCH / 2)
            delay_count &= ~calib_bit;
    }
 
    /* We're finished:  Do the finishing touches */
 
    /* Calculate delay_count for 1ms */
    delay_count /= (MILLISEC / 2);
}

Referenced by HalInitSystem(), and MachInit().

◆ HalpCheckPowerButton()

VOID NTAPI HalpCheckPowerButton ( VOID )

Definition at line 146 of file misc.c.

{
    //
    // Nothing to do on non-ACPI
    //
    return;
}

Referenced by HalpRegisterKdSupportFunctions().

◆ HalpClockInterrupt()

VOID __cdecl HalpClockInterrupt ( VOID )

Definition at line 30 of file timer.c.

{
    /* Clear the interrupt */
    ASSERT(KeGetCurrentIrql() == CLOCK2_LEVEL);
    WRITE_REGISTER_ULONG(TIMER0_INT_CLEAR, 1);
 
    /* FIXME: Update HAL Perf counters */
 
    /* FIXME: Check if someone changed the clockrate */
 
    /* Call the kernel */
    KeUpdateSystemTime(KeGetCurrentThread()->TrapFrame,
                       HalpCurrentTimeIncrement,
                       CLOCK2_LEVEL);
}

Referenced by HalInitSystem(), HalpInitializePICs(), HalpInitPhase0(), and HalpInitPhase1().

◆ HalpClockIpi()

VOID __cdecl HalpClockIpi ( VOID )

Referenced by HalpInitializePICs().

◆ HalpDebugPciDumpBus()

VOID NTAPI HalpDebugPciDumpBus	(	IN PBUS_HANDLER	BusHandler,
		IN PCI_SLOT_NUMBER	PciSlot,
		IN ULONG	i,
		IN ULONG	j,
		IN ULONG	k,
		IN PPCI_COMMON_CONFIG	PciData
	)

Definition at line 794 of file bussupp.c.

{
    PCHAR p, ClassName, Boundary, SubClassName, VendorName, ProductName, SubVendorName;
    UCHAR HeaderType;
    ULONG Length;
    CHAR LookupString[16] = "";
    CHAR bSubClassName[64] = "Unknown";
    CHAR bVendorName[64] = "";
    CHAR bProductName[128] = "Unknown device";
    CHAR bSubVendorName[128] = "Unknown";
    ULONG Size, Mem, b;
 
    HeaderType = (PciData->HeaderType & ~PCI_MULTIFUNCTION);
 
    /* Isolate the class name */
    sprintf(LookupString, "C %02x  ", PciData->BaseClass);
    ClassName = strstr((PCHAR)ClassTable, LookupString);
    if (ClassName)
    {
        /* Isolate the subclass name */
        ClassName += strlen("C 00  ");
        Boundary = strstr(ClassName, NEWLINE "C ");
        sprintf(LookupString, NEWLINE "\t%02x  ", PciData->SubClass);
        SubClassName = strstr(ClassName, LookupString);
        if (Boundary && SubClassName > Boundary)
        {
            SubClassName = NULL;
        }
        if (!SubClassName)
        {
            SubClassName = ClassName;
        }
        else
        {
            SubClassName += strlen(NEWLINE "\t00  ");
        }
        /* Copy the subclass into our buffer */
        p = strpbrk(SubClassName, NEWLINE);
        Length = p - SubClassName;
        Length = min(Length, sizeof(bSubClassName) - 1);
        strncpy(bSubClassName, SubClassName, Length);
        bSubClassName[Length] = '\0';
    }
 
    /* Isolate the vendor name */
    sprintf(LookupString, NEWLINE "%04x  ", PciData->VendorID);
    VendorName = strstr((PCHAR)VendorTable, LookupString);
    if (VendorName)
    {
        /* Copy the vendor name into our buffer */
        VendorName += strlen(NEWLINE "0000  ");
        p = strpbrk(VendorName, NEWLINE);
        Length = p - VendorName;
        Length = min(Length, sizeof(bVendorName) - 1);
        strncpy(bVendorName, VendorName, Length);
        bVendorName[Length] = '\0';
        p += strlen(NEWLINE);
        while (*p == '\t' || *p == '#')
        {
            p = strpbrk(p, NEWLINE);
            p += strlen(NEWLINE);
        }
        Boundary = p;
 
        /* Isolate the product name */
        sprintf(LookupString, "\t%04x  ", PciData->DeviceID);
        ProductName = strstr(VendorName, LookupString);
        if (Boundary && ProductName >= Boundary)
        {
            ProductName = NULL;
        }
        if (ProductName)
        {
            /* Copy the product name into our buffer */
            ProductName += strlen("\t0000  ");
            p = strpbrk(ProductName, NEWLINE);
            Length = p - ProductName;
            Length = min(Length, sizeof(bProductName) - 1);
            strncpy(bProductName, ProductName, Length);
            bProductName[Length] = '\0';
            p += strlen(NEWLINE);
            while ((*p == '\t' && *(p + 1) == '\t') || *p == '#')
            {
                p = strpbrk(p, NEWLINE);
                p += strlen(NEWLINE);
            }
            Boundary = p;
            SubVendorName = NULL;
 
            if (HeaderType == PCI_DEVICE_TYPE)
            {
                /* Isolate the subvendor and subsystem name */
                sprintf(LookupString,
                        "\t\t%04x %04x  ",
                        PciData->u.type0.SubVendorID,
                        PciData->u.type0.SubSystemID);
                SubVendorName = strstr(ProductName, LookupString);
                if (Boundary && SubVendorName >= Boundary)
                {
                    SubVendorName = NULL;
                }
            }
            if (SubVendorName)
            {
                /* Copy the subvendor name into our buffer */
                SubVendorName += strlen("\t\t0000 0000  ");
                p = strpbrk(SubVendorName, NEWLINE);
                Length = p - SubVendorName;
                Length = min(Length, sizeof(bSubVendorName) - 1);
                strncpy(bSubVendorName, SubVendorName, Length);
                bSubVendorName[Length] = '\0';
            }
        }
    }
 
    /* Print out the data */
    DbgPrint("%02x:%02x.%x %s [%02x%02x]: %s %s [%04x:%04x] (rev %02x)\n",
             i,
             j,
             k,
             bSubClassName,
             PciData->BaseClass,
             PciData->SubClass,
             bVendorName,
             bProductName,
             PciData->VendorID,
             PciData->DeviceID,
             PciData->RevisionID);
 
    if (HeaderType == PCI_DEVICE_TYPE)
    {
        DbgPrint("\tSubsystem: %s [%04x:%04x]\n",
                 bSubVendorName,
                 PciData->u.type0.SubVendorID,
                 PciData->u.type0.SubSystemID);
    }
 
    /* Print out and decode flags */
    DbgPrint("\tFlags:");
    if (PciData->Command & PCI_ENABLE_BUS_MASTER) DbgPrint(" bus master,");
    if (PciData->Status & PCI_STATUS_66MHZ_CAPABLE) DbgPrint(" 66MHz,");
    if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x000) DbgPrint(" fast devsel,");
    if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x200) DbgPrint(" medium devsel,");
    if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x400) DbgPrint(" slow devsel,");
    if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x600) DbgPrint(" unknown devsel,");
    DbgPrint(" latency %d", PciData->LatencyTimer);
    if (PciData->u.type0.InterruptPin != 0 &&
        PciData->u.type0.InterruptLine != 0 &&
        PciData->u.type0.InterruptLine != 0xFF) DbgPrint(", IRQ %02d", PciData->u.type0.InterruptLine);
    else if (PciData->u.type0.InterruptPin != 0) DbgPrint(", IRQ assignment required");
    DbgPrint("\n");
 
    if (HeaderType == PCI_BRIDGE_TYPE)
    {
        DbgPrint("\tBridge:");
        DbgPrint(" primary bus %d,", PciData->u.type1.PrimaryBus);
        DbgPrint(" secondary bus %d,", PciData->u.type1.SecondaryBus);
        DbgPrint(" subordinate bus %d,", PciData->u.type1.SubordinateBus);
        DbgPrint(" secondary latency %d", PciData->u.type1.SecondaryLatency);
        DbgPrint("\n");
    }
 
    /* Scan addresses */
    Size = 0;
    for (b = 0; b < (HeaderType == PCI_DEVICE_TYPE ? PCI_TYPE0_ADDRESSES : PCI_TYPE1_ADDRESSES); b++)
    {
        /* Check for a BAR */
        if (HeaderType != PCI_CARDBUS_BRIDGE_TYPE)
            Mem = PciData->u.type0.BaseAddresses[b];
        else
            Mem = 0;
        if (Mem)
        {
            ULONG PciBar = 0xFFFFFFFF;
 
            HalpWritePCIConfig(BusHandler,
                               PciSlot,
                               &PciBar,
                               FIELD_OFFSET(PCI_COMMON_HEADER, u.type0.BaseAddresses[b]),
                               sizeof(ULONG));
            HalpReadPCIConfig(BusHandler,
                              PciSlot,
                              &PciBar,
                              FIELD_OFFSET(PCI_COMMON_HEADER, u.type0.BaseAddresses[b]),
                              sizeof(ULONG));
            HalpWritePCIConfig(BusHandler,
                               PciSlot,
                               &Mem,
                               FIELD_OFFSET(PCI_COMMON_HEADER, u.type0.BaseAddresses[b]),
                               sizeof(ULONG));
 
            /* Decode the address type */
            if (PciBar & PCI_ADDRESS_IO_SPACE)
            {
                /* Guess the size */
                Size = 1 << 2;
                while (!(PciBar & Size) && (Size)) Size <<= 1;
 
                /* Print it out */
                DbgPrint("\tI/O ports at %04lx", Mem & PCI_ADDRESS_IO_ADDRESS_MASK);
                ShowSize(Size);
            }
            else
            {
                /* Guess the size */
                Size = 1 << 4;
                while (!(PciBar & Size) && (Size)) Size <<= 1;
 
                /* Print it out */
                DbgPrint("\tMemory at %08lx (%d-bit, %sprefetchable)",
                         Mem & PCI_ADDRESS_MEMORY_ADDRESS_MASK,
                         (Mem & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_32BIT ? 32 : 64,
                         (Mem & PCI_ADDRESS_MEMORY_PREFETCHABLE) ? "" : "non-");
                ShowSize(Size);
            }
            DbgPrint("\n");
        }
    }
}

Referenced by HalpInitializePciBus().

◆ HalpDismissIrq07()

BOOLEAN NTAPI HalpDismissIrq07	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 708 of file pic.c.

{
    I8259_OCW3 Ocw3;
    I8259_ISR Isr;
 
    /* Request the ISR */
    Ocw3.Bits = 0;
    Ocw3.Sbo = 1;
    Ocw3.ReadRequest = ReadIsr;
    __outbyte(PIC1_CONTROL_PORT, Ocw3.Bits);
 
    /* Read the ISR */
    Isr.Bits = __inbyte(PIC1_CONTROL_PORT);
 
    /* Is IRQ 7 really active? If it isn't, this is spurious so fail */
    if (Isr.Irq7 == FALSE) return FALSE;
 
    /* Do normal interrupt dismiss */
    return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
}

◆ HalpDismissIrq07Level()

BOOLEAN NTAPI HalpDismissIrq07Level	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 890 of file pic.c.

{
    I8259_OCW3 Ocw3;
    I8259_ISR Isr;
 
    /* Request the ISR */
    Ocw3.Bits = 0;
    Ocw3.Sbo = 1;
    Ocw3.ReadRequest = ReadIsr;
    __outbyte(PIC1_CONTROL_PORT, Ocw3.Bits);
 
    /* Read the ISR */
    Isr.Bits = __inbyte(PIC1_CONTROL_PORT);
 
    /* Is IRQ 7 really active? If it isn't, this is spurious so fail */
    if (Isr.Irq7 == FALSE) return FALSE;
 
    /* Do normal interrupt dismiss */
    return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
}

◆ HalpDismissIrq13()

BOOLEAN NTAPI HalpDismissIrq13	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 679 of file pic.c.

{
    /* Clear the FPU busy latch */
    __outbyte(0xF0, 0);
 
    /* Do normal interrupt dismiss */
    return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
}

◆ HalpDismissIrq13Level()

BOOLEAN NTAPI HalpDismissIrq13Level	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 861 of file pic.c.

{
    /* Clear the FPU busy latch */
    __outbyte(0xF0, 0);
 
    /* Do normal interrupt dismiss */
    return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
}

◆ HalpDismissIrq15()

BOOLEAN NTAPI HalpDismissIrq15	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 644 of file pic.c.

{
    I8259_OCW3 Ocw3;
    I8259_OCW2 Ocw2;
    I8259_ISR Isr;
 
    /* Request the ISR */
    Ocw3.Bits = 0;
    Ocw3.Sbo = 1; /* This encodes an OCW3 vs. an OCW2 */
    Ocw3.ReadRequest = ReadIsr;
    __outbyte(PIC2_CONTROL_PORT, Ocw3.Bits);
 
    /* Read the ISR */
    Isr.Bits = __inbyte(PIC2_CONTROL_PORT);
 
    /* Is IRQ15 really active (this is IR7) */
    if (Isr.Irq7 == FALSE)
    {
        /* It isn't, so we have to EOI cascade IRQ */
        Ocw2.Bits = 0;
        Ocw2.EoiMode = SpecificEoi;
        __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | PIC_CASCADE_IRQ);
 
        /* And now fail since this was spurious */
        return FALSE;
    }
 
    /* Do normal interrupt dismiss */
    return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
}

◆ HalpDismissIrq15Level()

BOOLEAN NTAPI HalpDismissIrq15Level	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 826 of file pic.c.

{
    I8259_OCW3 Ocw3;
    I8259_OCW2 Ocw2;
    I8259_ISR Isr;
 
    /* Request the ISR */
    Ocw3.Bits = 0;
    Ocw3.Sbo = 1; /* This encodes an OCW3 vs. an OCW2 */
    Ocw3.ReadRequest = ReadIsr;
    __outbyte(PIC2_CONTROL_PORT, Ocw3.Bits);
 
    /* Read the ISR */
    Isr.Bits = __inbyte(PIC2_CONTROL_PORT);
 
    /* Is IRQ15 really active (this is IR7) */
    if (Isr.Irq7 == FALSE)
    {
        /* It isn't, so we have to EOI cascade IRQ */
        Ocw2.Bits = 0;
        Ocw2.EoiMode = SpecificEoi;
        __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | PIC_CASCADE_IRQ);
 
        /* And now fail since this was spurious */
        return FALSE;
    }
 
    /* Do normal interrupt dismiss */
    return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
}

◆ HalpDismissIrqGeneric()

BOOLEAN NTAPI HalpDismissIrqGeneric	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 634 of file pic.c.

{
    /* Run the inline code */
    return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
}

◆ HalpDismissIrqLevel()

BOOLEAN NTAPI HalpDismissIrqLevel	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 816 of file pic.c.

{
    /* Run the inline code */
    return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
}

◆ HalpDispatchInterrupt()

VOID __cdecl HalpDispatchInterrupt ( VOID )

Referenced by HalpInitializePICs().

◆ HalpDispatchInterrupt2()

PHAL_SW_INTERRUPT_HANDLER __cdecl HalpDispatchInterrupt2 ( VOID )

Definition at line 1199 of file pic.c.

{
    ULONG PendingIrqlMask, PendingIrql;
    KIRQL OldIrql;
    PIC_MASK Mask;
    PKPCR Pcr = KeGetPcr();
 
    /* Do the work */
    OldIrql = _HalpDispatchInterruptHandler();
 
    /* Restore IRQL */
    Pcr->Irql = OldIrql;
 
    /* Check for pending software interrupts and compare with current IRQL */
    PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[OldIrql];
    if (PendingIrqlMask)
    {
        /* Check if pending IRQL affects hardware state */
        BitScanReverse(&PendingIrql, PendingIrqlMask);
        if (PendingIrql > DISPATCH_LEVEL)
        {
            /* Set new PIC mask */
            Mask.Both = Pcr->IDR & 0xFFFF;
            __outbyte(PIC1_DATA_PORT, Mask.Master);
            __outbyte(PIC2_DATA_PORT, Mask.Slave);
 
            /* Clear IRR bit */
            Pcr->IRR ^= (1 << PendingIrql);
        }
 
        /* Now handle pending interrupt */
        return SWInterruptHandlerTable[PendingIrql];
    }
 
    return NULL;
}

◆ HalpDispatchInterrupt2ndEntry()

DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry ( IN PKTRAP_FRAME TrapFrame )

Definition at line 1183 of file pic.c.

{
    KIRQL CurrentIrql;
 
    /* Do the work */
    CurrentIrql = _HalpDispatchInterruptHandler();
 
    /* End the interrupt */
    HalpEndSoftwareInterrupt(CurrentIrql, TrapFrame);
 
    /* Exit the interrupt */
    KiEoiHelper(TrapFrame);
}

◆ HalpEnableInterruptHandler()

VOID NTAPI HalpEnableInterruptHandler	(	IN UCHAR	Flags,
		IN ULONG	BusVector,
		IN ULONG	SystemVector,
		IN KIRQL	Irql,
		IN PVOID	Handler,
		IN KINTERRUPT_MODE	Mode
	)

Definition at line 49 of file usage.c.

{
    /* Register the routine */
    KeGetPcr()->InterruptRoutine[Irql] = Handler;
}

Referenced by HalInitSystem(), HalpInitPhase0(), and HalpInitPhase1().

◆ HalpExitToV86()

VOID FASTCALL HalpExitToV86 ( PKTRAP_FRAME TrapFrame )

Referenced by HalpBiosCall().

◆ HalpFlushTLB()

VOID NTAPI HalpFlushTLB ( VOID )

Definition at line 156 of file misc.c.

{
    ULONG_PTR Flags, Cr4;
    INT CpuInfo[4];
    ULONG_PTR PageDirectory;
 
    //
    // Disable interrupts
    //
    Flags = __readeflags();
    _disable();
 
    //
    // Get page table directory base
    //
    PageDirectory = __readcr3();
 
    //
    // Check for CPUID support
    //
    if (KeGetCurrentPrcb()->CpuID)
    {
        //
        // Check for global bit in CPU features
        //
        __cpuid(CpuInfo, 1);
        if (CpuInfo[3] & 0x2000)
        {
            //
            // Get current CR4 value
            //
            Cr4 = __readcr4();
 
            //
            // Disable global bit
            //
            __writecr4(Cr4 & ~CR4_PGE);
 
            //
            // Flush TLB and re-enable global bit
            //
            __writecr3(PageDirectory);
            __writecr4(Cr4);
 
            //
            // Restore interrupts
            //
            __writeeflags(Flags);
            return;
        }
    }
 
    //
    // Legacy: just flush TLB
    //
    __writecr3(PageDirectory);
    __writeeflags(Flags);
}

Referenced by HalpMapPhysicalMemory64Vista(), HalpMapRealModeMemory(), HalpUnmapRealModeMemory(), and HalpUnmapVirtualAddressVista().

◆ HalpGetDebugPortTable()

BOOLEAN NTAPI HalpGetDebugPortTable ( VOID )

Definition at line 952 of file halacpi.c.

{
    return ((HalpDebugPortTable) &&
            (HalpDebugPortTable->BaseAddress.AddressSpaceID == 1));
}

Referenced by HalpReportResourceUsage().

◆ HalpGetNMICrashFlag()

VOID NTAPI HalpGetNMICrashFlag ( VOID )

Definition at line 595 of file usage.c.

{
    UNICODE_STRING ValueName;
    UNICODE_STRING KeyName = RTL_CONSTANT_STRING(L"\\Registry\\Machine\\System\\CurrentControlSet\\Control\\CrashControl");
    OBJECT_ATTRIBUTES ObjectAttributes;
    ULONG ResultLength;
    HANDLE Handle;
    NTSTATUS Status;
    KEY_VALUE_PARTIAL_INFORMATION KeyValueInformation;
 
    /* Set default */
    HalpNMIDumpFlag = 0;
 
    /* Initialize attributes */
    InitializeObjectAttributes(&ObjectAttributes,
                               &KeyName,
                               OBJ_CASE_INSENSITIVE,
                               NULL,
                               NULL);
 
    /* Open crash key */
    Status = ZwOpenKey(&Handle, KEY_READ, &ObjectAttributes);
    if (NT_SUCCESS(Status))
    {
        /* Query key value */
        RtlInitUnicodeString(&ValueName, L"NMICrashDump");
        Status = ZwQueryValueKey(Handle,
                                 &ValueName,
                                 KeyValuePartialInformation,
                                 &KeyValueInformation,
                                 sizeof(KeyValueInformation),
                                 &ResultLength);
        if (NT_SUCCESS(Status))
        {
            /* Check for valid data */
            if (ResultLength == sizeof(KEY_VALUE_PARTIAL_INFORMATION))
            {
                /* Read the flag */
                HalpNMIDumpFlag = KeyValueInformation.Data[0];
            }
        }
 
        /* We're done */
        ZwClose(Handle);
    }
}

Referenced by HalpInitializePciBus().

◆ HalpHardwareInterruptLevel()

VOID __cdecl HalpHardwareInterruptLevel ( VOID )

Referenced by HalEnableSystemInterrupt(), and HalpInitializePICs().

◆ HalpInitBusHandlers()

VOID NTAPI HalpInitBusHandlers ( VOID )

Definition at line 935 of file halacpi.c.

{
    /* On ACPI, we only have a fake PCI bus to worry about */
    HalpInitNonBusHandler();
}

Referenced by HalInitSystem().

◆ HalpInitializeCmos()

VOID NTAPI HalpInitializeCmos ( VOID )

Definition at line 160 of file cmos.c.

{
    /* Set default century offset byte */
    HalpCmosCenturyOffset = 50;
 
    /* No support for EISA or MCA */
    ASSERT(HalpBusType == MACHINE_TYPE_ISA);
}

Referenced by HalInitSystem().

◆ HalpInitializeLegacyPICs()

VOID NTAPI HalpInitializeLegacyPICs ( VOID )

Definition at line 18 of file pic.c.

{
    I8259_ICW1 Icw1;
    I8259_ICW2 Icw2;
    I8259_ICW3 Icw3;
    I8259_ICW4 Icw4;
 
    ASSERT(!(__readeflags() & EFLAGS_INTERRUPT_MASK));
 
    /* Initialize ICW1 for master, interval 8, edge-triggered mode with ICW4 */
    Icw1.NeedIcw4 = TRUE;
    Icw1.OperatingMode = Cascade;
    Icw1.Interval = Interval8;
    Icw1.InterruptMode = EdgeTriggered;
    Icw1.Init = TRUE;
    Icw1.InterruptVectorAddress = 0;
    __outbyte(PIC1_CONTROL_PORT, Icw1.Bits);
 
    /* ICW2 - interrupt vector offset */
    Icw2.Bits = PRIMARY_VECTOR_BASE;
    __outbyte(PIC1_DATA_PORT, Icw2.Bits);
 
    /* Connect slave to IRQ 2 */
    Icw3.Bits = 0;
    Icw3.SlaveIrq2 = TRUE;
    __outbyte(PIC1_DATA_PORT, Icw3.Bits);
 
    /* Enable 8086 mode, non-automatic EOI, non-buffered mode, non special fully nested mode */
    Icw4.SystemMode = New8086Mode;
    Icw4.EoiMode = NormalEoi;
    Icw4.BufferedMode = NonBuffered;
    Icw4.SpecialFullyNestedMode = FALSE;
    Icw4.Reserved = 0;
    __outbyte(PIC1_DATA_PORT, Icw4.Bits);
 
    /* Mask all interrupts */
    __outbyte(PIC1_DATA_PORT, 0xFF);
 
    /* Initialize ICW1 for slave, interval 8, edge-triggered mode with ICW4 */
    Icw1.NeedIcw4 = TRUE;
    Icw1.InterruptMode = EdgeTriggered;
    Icw1.OperatingMode = Cascade;
    Icw1.Interval = Interval8;
    Icw1.Init = TRUE;
    Icw1.InterruptVectorAddress = 0; /* This is only used in MCS80/85 mode */
    __outbyte(PIC2_CONTROL_PORT, Icw1.Bits);
 
    /* Set interrupt vector base */
    Icw2.Bits = PRIMARY_VECTOR_BASE + 8;
    __outbyte(PIC2_DATA_PORT, Icw2.Bits);
 
    /* Slave ID */
    Icw3.Bits = 0;
    Icw3.SlaveId = 2;
    __outbyte(PIC2_DATA_PORT, Icw3.Bits);
 
    /* Enable 8086 mode, non-automatic EOI, non-buffered mode, non special fully nested mode */
    Icw4.SystemMode = New8086Mode;
    Icw4.EoiMode = NormalEoi;
    Icw4.BufferedMode = NonBuffered;
    Icw4.SpecialFullyNestedMode = FALSE;
    Icw4.Reserved = 0;
    __outbyte(PIC2_DATA_PORT, Icw4.Bits);
 
    /* Mask all interrupts */
    __outbyte(PIC2_DATA_PORT, 0xFF);
}

Referenced by HalpInitializePICs().

◆ HalpInitializePICs()

VOID NTAPI HalpInitializePICs ( IN BOOLEAN EnableInterrupts )

Definition at line 513 of file apic.c.

{
    ULONG_PTR EFlags;
 
    /* Save EFlags and disable interrupts */
    EFlags = __readeflags();
    _disable();
 
    /* Initialize and mask the PIC */
    HalpInitializeLegacyPICs();
 
    /* Initialize the I/O APIC */
    ApicInitializeIOApic();
 
    /* Manually reserve some vectors */
    HalpVectorToIndex[APC_VECTOR] = APIC_RESERVED_VECTOR;
    HalpVectorToIndex[DISPATCH_VECTOR] = APIC_RESERVED_VECTOR;
    HalpVectorToIndex[APIC_CLOCK_VECTOR] = 8;
    HalpVectorToIndex[CLOCK_IPI_VECTOR] = APIC_RESERVED_VECTOR;
    HalpVectorToIndex[APIC_SPURIOUS_VECTOR] = APIC_RESERVED_VECTOR;
 
    /* Set interrupt handlers in the IDT */
    KeRegisterInterruptHandler(APIC_CLOCK_VECTOR, HalpClockInterrupt);
    KeRegisterInterruptHandler(CLOCK_IPI_VECTOR, HalpClockIpi);
#ifndef _M_AMD64
    KeRegisterInterruptHandler(APC_VECTOR, HalpApcInterrupt);
    KeRegisterInterruptHandler(DISPATCH_VECTOR, HalpDispatchInterrupt);
#endif
 
    /* Register the vectors for APC and dispatch interrupts */
    HalpRegisterVector(IDT_INTERNAL, 0, APC_VECTOR, APC_LEVEL);
    HalpRegisterVector(IDT_INTERNAL, 0, DISPATCH_VECTOR, DISPATCH_LEVEL);
 
    /* Restore interrupt state */
    if (EnableInterrupts) EFlags |= EFLAGS_INTERRUPT_MASK;
    __writeeflags(EFlags);
}

Referenced by HalInitSystem().

◆ HalpInitPciBus()

VOID HalpInitPciBus ( VOID )

◆ HalpInitPhase0()

VOID HalpInitPhase0 ( PLOADER_PARAMETER_BLOCK LoaderBlock )

Definition at line 30 of file halinit_mp.c.

{
   static BOOLEAN MPSInitialized = FALSE;
 
 
   /* Only initialize MP system once. Once called the first time,
      each subsequent call is part of the initialization sequence
      for an application processor. */
 
   DPRINT("HalpInitPhase0()\n");
 
 
   if (MPSInitialized)
   {
      ASSERT(FALSE);
   }
 
   MPSInitialized = TRUE;
 
   if (!HaliFindSmpConfig())
   {
      ASSERT(FALSE);
   }
 
   /* store the kernel base for later use */
   KernelBase = (ULONG_PTR)CONTAINING_RECORD(LoaderBlock->LoadOrderListHead.Flink, LDR_DATA_TABLE_ENTRY, InLoadOrderLinks)->DllBase;
 
}

◆ HalpInitPhase1()

VOID HalpInitPhase1 ( VOID )

Definition at line 26 of file halinit_up.c.

{
 
}

◆ HalpInitProcessor()

VOID NTAPI HalpInitProcessor	(	IN ULONG	ProcessorNumber,
		IN PLOADER_PARAMETER_BLOCK	LoaderBlock
	)

Definition at line 24 of file halinit.c.

{
    if (ProcessorNumber == 0)
    {
        HalpParseApicTables(LoaderBlock);
    }
 
    HalpSetupProcessorsTable(ProcessorNumber);
 
    /* Initialize the local APIC for this cpu */
    ApicInitializeLocalApic(ProcessorNumber);
 
    /* Initialize profiling data (but don't start it) */
    HalInitializeProfiling();
 
    /* Initialize the timer */
    //ApicInitializeTimer(ProcessorNumber);
}

Referenced by HalInitializeProcessor().

◆ HalpIs16BitPortDecodeSupported()

ULONG NTAPI HalpIs16BitPortDecodeSupported ( VOID )

Definition at line 961 of file halacpi.c.

{
    /* All ACPI systems are at least "EISA" so they support this */
    return CM_RESOURCE_PORT_16_BIT_DECODE;
}

Referenced by HalpBuildPartialFromAddress().

◆ HalpMapPhysicalMemory64()

PVOID NTAPI HalpMapPhysicalMemory64	(	IN PHYSICAL_ADDRESS	PhysicalAddress,
		IN PFN_COUNT	PageCount
	)

Definition at line 140 of file memory.c.

{
    return HalpMapPhysicalMemory64Vista(PhysicalAddress, PageCount, TRUE);
}

Referenced by HalpAcpiCopyBiosTable(), HalpAcpiFindRsdtPhase0(), HalpAcpiGetTableFromBios(), HalpAcpiTableCacheInit(), HalpConfigureDebuggingDevice(), HalpInitializeCmos(), HalpReboot(), HalpRegisterKdSupportFunctions(), HalpSetupAcpiPhase0(), and HalpSetupPciDeviceForDebugging().

◆ HalpMapPhysicalMemory64Vista()

PVOID NTAPI HalpMapPhysicalMemory64Vista	(	IN PHYSICAL_ADDRESS	PhysicalAddress,
		IN PFN_COUNT	PageCount,
		IN BOOLEAN	FlushCurrentTLB
	)

Definition at line 156 of file memory.c.

{
    PHARDWARE_PTE PointerPte;
    PFN_NUMBER UsedPages = 0;
    PVOID VirtualAddress, BaseAddress;
 
    /* Start at the current HAL heap base */
    BaseAddress = HalpHeapStart;
    VirtualAddress = BaseAddress;
 
    /* Loop until we have all the pages required */
    while (UsedPages < PageCount)
    {
        /* If this overflows past the HAL heap, it means there's no space */
        if (VirtualAddress == NULL) return NULL;
 
        /* Get the PTE for this address */
        PointerPte = HalAddressToPte(VirtualAddress);
 
        /* Go to the next page */
        VirtualAddress = (PVOID)((ULONG_PTR)VirtualAddress + PAGE_SIZE);
 
        /* Check if the page is available */
        if (PointerPte->Valid)
        {
            /* PTE has data, skip it and start with a new base address */
            BaseAddress = VirtualAddress;
            UsedPages = 0;
            continue;
        }
 
        /* PTE is available, keep going on this run */
        UsedPages++;
    }
 
    /* Take the base address of the page plus the actual offset in the address */
    VirtualAddress = (PVOID)((ULONG_PTR)BaseAddress +
                             BYTE_OFFSET(PhysicalAddress.LowPart));
 
    /* If we are starting at the heap, move the heap */
    if (BaseAddress == HalpHeapStart)
    {
        /* Past this allocation */
        HalpHeapStart = (PVOID)((ULONG_PTR)BaseAddress + (PageCount * PAGE_SIZE));
    }
 
    /* Loop pages that can be mapped */
    while (UsedPages--)
    {
        /* Fill out the PTE */
        PointerPte = HalAddressToPte(BaseAddress);
        PointerPte->PageFrameNumber = (PFN_NUMBER)(PhysicalAddress.QuadPart >> PAGE_SHIFT);
        PointerPte->Valid = 1;
        PointerPte->Write = 1;
 
        /* Move to the next address */
        PhysicalAddress.QuadPart += PAGE_SIZE;
        BaseAddress = (PVOID)((ULONG_PTR)BaseAddress + PAGE_SIZE);
    }
 
    /* Flush the TLB and return the address */
    if (FlushCurrentTLB)
        HalpFlushTLB();
 
    return VirtualAddress;
}

Referenced by HalpMapPhysicalMemory64(), and HalpRegisterKdSupportFunctions().

◆ HalpMarkAcpiHal()

NTSTATUS NTAPI HalpMarkAcpiHal ( VOID )

Definition at line 57 of file misc.c.

{
    NTSTATUS Status;
    UNICODE_STRING KeyString;
    HANDLE KeyHandle;
    HANDLE Handle;
    ULONG Value = HalDisableFirmwareMapper ? 1 : 0;
 
    /* Open the control set key */
    RtlInitUnicodeString(&KeyString,
                         L"\\REGISTRY\\MACHINE\\SYSTEM\\CURRENTCONTROLSET");
    Status = HalpOpenRegistryKey(&Handle, 0, &KeyString, KEY_ALL_ACCESS, FALSE);
    if (NT_SUCCESS(Status))
    {
        /* Open the PNP key */
        RtlInitUnicodeString(&KeyString, L"Control\\Pnp");
        Status = HalpOpenRegistryKey(&KeyHandle,
                                     Handle,
                                     &KeyString,
                                     KEY_ALL_ACCESS,
                                     TRUE);
        /* Close root key */
        ZwClose(Handle);
 
        /* Check if PNP BIOS key exists */
        if (NT_SUCCESS(Status))
        {
            /* Set the disable value to false -- we need the mapper */
            RtlInitUnicodeString(&KeyString, L"DisableFirmwareMapper");
            Status = ZwSetValueKey(KeyHandle,
                                   &KeyString,
                                   0,
                                   REG_DWORD,
                                   &Value,
                                   sizeof(Value));
 
            /* Close subkey */
            ZwClose(KeyHandle);
        }
    }
 
    /* Return status */
    return Status;
}

Referenced by HalpReportResourceUsage().

◆ HalpOpenRegistryKey()

NTSTATUS NTAPI HalpOpenRegistryKey	(	IN PHANDLE	KeyHandle,
		IN HANDLE	RootKey,
		IN PUNICODE_STRING	KeyName,
		IN ACCESS_MASK	DesiredAccess,
		IN BOOLEAN	Create
	)

Definition at line 104 of file misc.c.

{
    NTSTATUS Status;
    ULONG Disposition;
    OBJECT_ATTRIBUTES ObjectAttributes;
 
    /* Setup the attributes we received */
    InitializeObjectAttributes(&ObjectAttributes,
                               KeyName,
                               OBJ_CASE_INSENSITIVE,
                               RootKey,
                               NULL);
 
    /* What to do? */
    if ( Create )
    {
        /* Create the key */
        Status = ZwCreateKey(KeyHandle,
                             DesiredAccess,
                             &ObjectAttributes,
                             0,
                             NULL,
                             REG_OPTION_VOLATILE,
                             &Disposition);
    }
    else
    {
        /* Open the key */
        Status = ZwOpenKey(KeyHandle, DesiredAccess, &ObjectAttributes);
    }
 
    /* We're done */
    return Status;
}

Referenced by HalpMarkAcpiHal(), HalpMarkChipsetDecode(), HalpRegisterPciDebuggingDeviceInfo(), and HalpReportSerialNumber().

◆ HalpProfileInterrupt()

VOID __cdecl HalpProfileInterrupt ( VOID )

◆ HalpQueryAcpiResourceRequirements()

NTSTATUS NTAPI HalpQueryAcpiResourceRequirements ( OUT PIO_RESOURCE_REQUIREMENTS_LIST * Requirements )

Definition at line 1016 of file halacpi.c.

{
    PIO_RESOURCE_REQUIREMENTS_LIST RequirementsList;
    ULONG Count, ListSize;
    NTSTATUS Status;
 
    PAGED_CODE();
 
    /* Get ACPI resources */
    HalpAcpiDetectResourceListSize(&Count);
    DPRINT("Resource count: %lu\n", Count);
 
    /* Compute size of the list and allocate it */
    ListSize = FIELD_OFFSET(IO_RESOURCE_REQUIREMENTS_LIST, List[0].Descriptors) +
               (Count * sizeof(IO_RESOURCE_DESCRIPTOR));
    DPRINT("Resource list size: %lu\n", ListSize);
    RequirementsList = ExAllocatePoolWithTag(PagedPool, ListSize, TAG_HAL);
    if (RequirementsList)
    {
        /* Initialize it */
        RtlZeroMemory(RequirementsList, ListSize);
        RequirementsList->ListSize = ListSize;
 
        /* Build it */
        Status = HalpBuildAcpiResourceList(RequirementsList);
        if (NT_SUCCESS(Status))
        {
            /* It worked, return it */
            *Requirements = RequirementsList;
 
            /* Validate the list */
            ASSERT(RequirementsList->List[0].Count == Count);
        }
        else
        {
            /* Fail */
            ExFreePoolWithTag(RequirementsList, TAG_HAL);
            Status = STATUS_NO_SUCH_DEVICE;
        }
    }
    else
    {
        /* Not enough memory */
        Status = STATUS_INSUFFICIENT_RESOURCES;
    }
 
    /* Return the status */
    return Status;
}

Referenced by HalpQueryResourceRequirements(), and HalpQueryResources().

◆ HalpRealModeStart()

VOID __cdecl HalpRealModeStart ( VOID )

Referenced by HalpBiosCall(), and HalpMapRealModeMemory().

◆ HalpRegisterKdSupportFunctions()

VOID NTAPI HalpRegisterKdSupportFunctions ( VOID )

Definition at line 22 of file busemul.c.

{
    /* Register PCI Device Functions */
    KdSetupPciDeviceForDebugging = HalpSetupPciDeviceForDebugging;
    KdReleasePciDeviceforDebugging = HalpReleasePciDeviceForDebugging;
 
    /* Register memory functions */
#ifndef _MINIHAL_
#if (NTDDI_VERSION >= NTDDI_VISTA)
    KdMapPhysicalMemory64 = HalpMapPhysicalMemory64Vista;
    KdUnmapVirtualAddress = HalpUnmapVirtualAddressVista;
#else
    KdMapPhysicalMemory64 = HalpMapPhysicalMemory64;
    KdUnmapVirtualAddress = HalpUnmapVirtualAddress;
#endif
#endif
 
    /* Register ACPI stub */
    KdCheckPowerButton = HalpCheckPowerButton;
}

Referenced by HalInitializeProcessor().

◆ HalpRegisterVector()

VOID NTAPI HalpRegisterVector	(	IN UCHAR	Flags,
		IN ULONG	BusVector,
		IN ULONG	SystemVector,
		IN KIRQL	Irql
	)

Definition at line 34 of file usage.c.

{
    /* Save the vector flags */
    HalpIDTUsageFlags[SystemVector].Flags = Flags;
 
    /* Save the vector data */
    HalpIDTUsage[SystemVector].Irql  = Irql;
    HalpIDTUsage[SystemVector].BusReleativeVector = BusVector;
}

Referenced by HalpEnableInterruptHandler(), HalpInitializePICs(), and HalpReportResourceUsage().

◆ HalpReleasePciDeviceForDebugging()

NTSTATUS NTAPI HalpReleasePciDeviceForDebugging ( IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice )

◆ HalpReportResourceUsage()

VOID NTAPI HalpReportResourceUsage	(	IN PUNICODE_STRING	HalName,
		IN INTERFACE_TYPE	InterfaceType
	)

Definition at line 26 of file usage.c.

{
    DbgPrint("%wZ has been initialized\n", HalName);
}

Referenced by HalReportResourceUsage().

◆ HalpReportSerialNumber()

VOID NTAPI HalpReportSerialNumber ( VOID )

Definition at line 26 of file misc.c.

{
    NTSTATUS Status;
    UNICODE_STRING KeyString;
    HANDLE Handle;
 
    /* Make sure there is a serial number */
    if (!HalpSerialLen) return;
 
    /* Open the system key */
    RtlInitUnicodeString(&KeyString, L"\\Registry\\Machine\\Hardware\\Description\\System");
    Status = HalpOpenRegistryKey(&Handle, 0, &KeyString, KEY_ALL_ACCESS, FALSE);
    if (NT_SUCCESS(Status))
    {
        /* Add the serial number */
        RtlInitUnicodeString(&KeyString, L"Serial Number");
        ZwSetValueKey(Handle,
                      &KeyString,
                      0,
                      REG_BINARY,
                      HalpSerialNumber,
                      HalpSerialLen);
 
        /* Close the handle */
        ZwClose(Handle);
    }
}

Referenced by HalpReportResourceUsage().

◆ HalpSetupPciDeviceForDebugging()

NTSTATUS NTAPI HalpSetupPciDeviceForDebugging	(	IN PVOID	LoaderBlock,
		IN OUT PDEBUG_DEVICE_DESCRIPTOR	PciDevice
	)

◆ HalpUnmapVirtualAddress()

VOID NTAPI HalpUnmapVirtualAddress	(	IN PVOID	VirtualAddress,
		IN PFN_COUNT	NumberPages
	)

Definition at line 148 of file memory.c.

{
    HalpUnmapVirtualAddressVista(VirtualAddress, PageCount, TRUE);
}

Referenced by HalpAcpiGetTable(), HalpAcpiGetTableFromBios(), HalpAcpiTableCacheInit(), HalpRegisterKdSupportFunctions(), and HalpReleasePciDeviceForDebugging().

◆ HalpUnmapVirtualAddressVista()

VOID NTAPI HalpUnmapVirtualAddressVista	(	IN PVOID	VirtualAddress,
		IN PFN_COUNT	NumberPages,
		IN BOOLEAN	FlushCurrentTLB
	)

Definition at line 227 of file memory.c.

{
    PHARDWARE_PTE PointerPte;
    ULONG i;
 
    /* Only accept valid addresses */
    if (VirtualAddress < (PVOID)MM_HAL_VA_START) return;
 
    /* Align it down to page size */
    VirtualAddress = (PVOID)((ULONG_PTR)VirtualAddress & ~(PAGE_SIZE - 1));
 
    /* Loop PTEs */
    PointerPte = HalAddressToPte(VirtualAddress);
    for (i = 0; i < PageCount; i++)
    {
        *(PULONG)PointerPte = 0;
        PointerPte++;
    }
 
    /* Flush the TLB */
    if (FlushCurrentTLB)
        HalpFlushTLB();
 
    /* Put the heap back */
    if (HalpHeapStart > VirtualAddress) HalpHeapStart = VirtualAddress;
}

Referenced by HalpRegisterKdSupportFunctions(), and HalpUnmapVirtualAddress().

◆ KeUpdateRunTime()

VOID NTAPI KeUpdateRunTime	(	_In_ PKTRAP_FRAME	TrapFrame,
		_In_ KIRQL	Irql
	)

Referenced by HalpClockIpiHandler().

◆ KeUpdateSystemTime()

VOID FASTCALL KeUpdateSystemTime	(	IN PKTRAP_FRAME	TrapFrame,
		IN ULONG	Increment,
		IN KIRQL	OldIrql
	)

Definition at line 64 of file time.c.

{
    PKPRCB Prcb = KeGetCurrentPrcb();
    ULARGE_INTEGER CurrentTime, InterruptTime;
    LONG OldTickOffset;
 
    /* Check if this tick is being skipped */
    if (Prcb->SkipTick)
    {
        /* Handle it next time */
        Prcb->SkipTick = FALSE;
 
        /* Increase interrupt count and end the interrupt */
        Prcb->InterruptCount++;
        KiEndInterrupt(Irql, TrapFrame);
 
        /* Note: non-x86 return back to the caller! */
        return;
    }
 
    /* Add the increment time to the shared data */
    InterruptTime.QuadPart = *(ULONGLONG*)&SharedUserData->InterruptTime;
    InterruptTime.QuadPart += Increment;
    KiWriteSystemTime(&SharedUserData->InterruptTime, InterruptTime);
 
    /* Check for timer expiration */
    KiCheckForTimerExpiration(Prcb, TrapFrame, InterruptTime);
 
    /* Update the tick offset */
    OldTickOffset = InterlockedExchangeAdd(&KiTickOffset, -(LONG)Increment);
 
    /* If the debugger is enabled, check for break-in request */
    if (KdDebuggerEnabled && KdPollBreakIn())
    {
        /* Break-in requested! */
        DbgBreakPointWithStatus(DBG_STATUS_CONTROL_C);
    }
 
    /* Check for full tick */
    if (OldTickOffset <= (LONG)Increment)
    {
        /* Update the system time */
        CurrentTime.QuadPart = *(ULONGLONG*)&SharedUserData->SystemTime;
        CurrentTime.QuadPart += KeTimeAdjustment;
        KiWriteSystemTime(&SharedUserData->SystemTime, CurrentTime);
 
        /* Update the tick count */
        CurrentTime.QuadPart = (*(ULONGLONG*)&KeTickCount) + 1;
        KiWriteSystemTime(&KeTickCount, CurrentTime);
 
        /* Update it in the shared user data */
        KiWriteSystemTime(&SharedUserData->TickCount, CurrentTime);
 
        /* Check for expiration with the new tick count as well */
        KiCheckForTimerExpiration(Prcb, TrapFrame, InterruptTime);
 
        /* Reset the tick offset */
        KiTickOffset += KeMaximumIncrement;
 
        /* Update processor/thread runtime */
        KeUpdateRunTime(TrapFrame, Irql);
    }
    else
    {
        /* Increase interrupt count only */
        Prcb->InterruptCount++;
    }
 
    /* Disable interrupts and end the interrupt */
    KiEndInterrupt(Irql, TrapFrame);
}

Variable Documentation

◆ HalDisableFirmwareMapper

BOOLEAN HalDisableFirmwareMapper

extern

Definition at line 43 of file halacpi.c.

Referenced by HalpMarkAcpiHal().

◆ HalHardwareIdString

PWCHAR HalHardwareIdString

extern

Definition at line 44 of file halacpi.c.

Referenced by HalpQueryIdFdo().

◆ HalName

PWCHAR HalName

extern

Definition at line 45 of file halacpi.c.

Referenced by HalpReportResourceUsage(), HalReportResourceUsage(), IoReportHalResourceUsage(), MiBuildImportsForBootDrivers(), and MmGetSystemRoutineAddress().

◆ HalpActiveProcessors

KAFFINITY HalpActiveProcessors

extern

Definition at line 17 of file processor.c.

Referenced by HalInitializeProcessor(), HalpBuildPartialFromIdt(), and HalRequestIpiSpecifyVector().

◆ HalpAddressUsageList

PADDRESS_USAGE HalpAddressUsageList

extern

Definition at line 20 of file usage.c.

Referenced by HalInitSystem(), and HalpReportResourceUsage().

◆ HalpBuildType

const USHORT HalpBuildType

extern

Definition at line 14 of file buildtype.c.

Referenced by HalInitSystem(), and HalpInitPhase0().

◆ HalpDefaultInterruptAffinity

KAFFINITY HalpDefaultInterruptAffinity

extern

Definition at line 18 of file processor.c.

Referenced by HalInitializeProcessor(), and HalpGetRootInterruptVector().

◆ HalpDefaultIoSpace

ADDRESS_USAGE HalpDefaultIoSpace

extern

Definition at line 42 of file usage.c.

Referenced by HalInitSystem().

◆ HalpIDTUsageFlags

IDTUsageFlags HalpIDTUsageFlags[MAXIMUM_IDTVECTOR+1]

extern

Definition at line 19 of file usage.c.

Referenced by HalpBuildPartialFromIdt(), HalpGetSystemInterruptVector(), HalpRegisterVector(), and HalpReportResourceUsage().

◆ HalpIrqlSynchLevel

KIRQL HalpIrqlSynchLevel

extern

Definition at line 19 of file buildtype.c.

◆ HalpNMIInProgress

BOOLEAN HalpNMIInProgress

extern

Definition at line 18 of file nmi.c.

Referenced by HalHandleNMI(), and HalpRestoreTrapHandlers().

◆ HalpPerfCounter

LARGE_INTEGER HalpPerfCounter

extern

Definition at line 23 of file timer.c.

Referenced by KeQueryPerformanceCounter().

◆ HalpProfilingStopped

BOOLEAN HalpProfilingStopped

extern

Definition at line 18 of file profil.c.

Referenced by HalSetProfileInterval(), HalStartProfileInterrupt(), and HalStopProfileInterrupt().

◆ HalpSystemHardwareLock

KSPIN_LOCK HalpSystemHardwareLock

extern

Definition at line 25 of file spinlock.c.

Referenced by HalInitSystem(), HalpAcquireCmosSpinLock(), and HalpReleaseCmosSpinLock().

◆ Value

IN UCHAR Value

Definition at line 417 of file halp.h.

Variables
KIRQL	HalpIrqlSynchLevel

BOOLEAN	HalpProfilingStopped

IN UCHAR	Value

BOOLEAN	HalpNMIInProgress

ADDRESS_USAGE	HalpDefaultIoSpace

KSPIN_LOCK	HalpSystemHardwareLock

PADDRESS_USAGE	HalpAddressUsageList

LARGE_INTEGER	HalpPerfCounter

KAFFINITY	HalpActiveProcessors

BOOLEAN	HalDisableFirmwareMapper

PWCHAR	HalHardwareIdString

PWCHAR	HalName

KAFFINITY	HalpDefaultInterruptAffinity

IDTUsageFlags	HalpIDTUsageFlags [MAXIMUM_IDTVECTOR+1]

const USHORT	HalpBuildType

Classes

Macros

Typedefs

Functions

Variables

Macro Definition Documentation

◆ BCD_INT

◆ HAL_APC_REQUEST

◆ HAL_BUILD_TYPE

◆ HAL_DPC_REQUEST

◆ HAL_PROFILING_INTERVAL

◆ HAL_PROFILING_MULTIPLIER

◆ HalAddressToPde

◆ HalAddressToPte

◆ HALP_CARD_FEATURE_FULL_DECODE

◆ HALP_CHECK_CARD_REVISION_ID

◆ HALP_CHECK_CARD_SUBSYSTEM_ID

◆ HALP_CHECK_CARD_SUBVENDOR_ID

◆ HALP_HACK_FLAGS

◆ HALP_LOW_STUB_SIZE_IN_PAGES

◆ HALP_REVISION_FROM_HACK_FLAGS

◆ HALP_REVISION_HACK_FLAGS

◆ IDT_DEVICE

◆ IDT_INTERNAL

◆ IDT_LATCHED

◆ IDT_READ_ONLY

◆ IDT_REGISTERED

◆ INT_BCD

◆ SYNCH_LEVEL

Typedef Documentation

◆ ADDRESS_USAGE

◆ HAL_BIOS_FRAME

◆ HALP_ROLLOVER

◆ IDTUsageFlags

◆ PADDRESS_USAGE

◆ PHAL_BIOS_FRAME

◆ PHAL_DISMISS_INTERRUPT

◆ PHAL_SW_INTERRUPT_HANDLER

◆ PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY

◆ PHALP_ROLLOVER

Function Documentation

◆ _Acquires_lock_()

◆ _Releases_lock_()

◆ _Requires_lock_held_()

◆ CODE_SEG()

◆ HaliHaltSystem()

◆ HaliHandlePCIConfigSpaceAccess()

◆ HaliInitPnpDriver()

◆ HalInitializeBios()

◆ HaliQuerySystemInformation()

◆ HaliSetSystemInformation()

◆ HalpAllocateAdapterEx()

◆ HalpAllocPhysicalMemory()

◆ HalpApcInterrupt()

◆ HalpApcInterrupt2ndEntry()

◆ HalpBiosDisplayReset()

◆ HalpBuildAddressMap()

◆ HalpCalibrateStallExecution()

◆ HalpCheckPowerButton()

◆ HalpClockInterrupt()

◆ HalpClockIpi()

◆ HalpDebugPciDumpBus()

◆ HalpDismissIrq07()

◆ HalpDismissIrq07Level()

◆ HalpDismissIrq13()

◆ HalpDismissIrq13Level()

◆ HalpDismissIrq15()

◆ HalpDismissIrq15Level()

◆ HalpDismissIrqGeneric()

◆ HalpDismissIrqLevel()

◆ HalpDispatchInterrupt()

◆ HalpDispatchInterrupt2()

◆ HalpDispatchInterrupt2ndEntry()

◆ HalpEnableInterruptHandler()

◆ HalpExitToV86()

◆ HalpFlushTLB()

◆ HalpGetDebugPortTable()

◆ HalpGetNMICrashFlag()

◆ HalpHardwareInterruptLevel()

◆ HalpInitBusHandlers()