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Classes
struct	_HAL_BIOS_FRAME

union	_TIMER_CONTROL_PORT_REGISTER

union	_SYSTEM_CONTROL_PORT_B_REGISTER

union	_I8259_ICW1

union	_I8259_ICW2

union	_I8259_ICW3

union	_I8259_ICW4

union	_I8259_OCW2

union	_I8259_OCW3

union	_I8259_ISR

union	_EISA_ELCR

struct	_PIC_MASK

struct	_IDTUsageFlags

struct	IDTUsage

struct	_HalAddressUsage

Macros
#define	HAL_BUILD_TYPE ((DBG ? PRCB_BUILD_DEBUG : 0) \| PRCB_BUILD_UNIPROCESSOR)

#define	HAL_APC_REQUEST 0

#define	HAL_DPC_REQUEST 1

#define	HAL_PROFILING_INTERVAL 0

#define	HAL_PROFILING_MULTIPLIER 1

#define	CMOS_CONTROL_PORT (PUCHAR)0x70

#define	CMOS_DATA_PORT (PUCHAR)0x71

#define	RTC_REGISTER_A 0x0A

#define	RTC_REG_A_UIP 0x80

#define	RTC_REGISTER_B 0x0B

#define	RTC_REG_B_PI 0x40

#define	RTC_REGISTER_C 0x0C

#define	RTC_REG_C_IRQ 0x80

#define	RTC_REGISTER_D 0x0D

#define	RTC_REGISTER_CENTURY 0x32

#define	IDT_REGISTERED 0x01

#define	IDT_LATCHED 0x02

#define	IDT_READ_ONLY 0x04

#define	IDT_INTERNAL 0x11

#define	IDT_DEVICE 0x21

#define	BCD_INT(bcd) (((bcd & 0xF0) >> 4) * 10 + (bcd & 0x0F))

#define	INT_BCD(int) (UCHAR)(((int / 10) << 4) + (int % 10))

#define	VIDEO_SERVICES 0x10

#define	SET_VIDEO_MODE 0x00

#define	GRAPHICS_MODE_12 0x12 /* 80x30 8x16 640x480 16/256K */

#define	PIT_FREQUENCY 1193182

#define	TIMER_CHANNEL0_DATA_PORT 0x40

#define	TIMER_CHANNEL1_DATA_PORT 0x41

#define	TIMER_CHANNEL2_DATA_PORT 0x42

#define	TIMER_CONTROL_PORT 0x43

#define	SYSTEM_CONTROL_PORT_A 0x92

#define	SYSTEM_CONTROL_PORT_B 0x61

#define	PIC1_CONTROL_PORT 0x20

#define	PIC1_DATA_PORT 0x21

#define	PIC2_CONTROL_PORT 0xA0

#define	PIC2_DATA_PORT 0xA1

#define	EISA_ELCR_MASTER 0x4D0

#define	EISA_ELCR_SLAVE 0x4D1

#define	HALP_REVISION_FROM_HACK_FLAGS(x) ((x) >> 24)

#define	HALP_REVISION_HACK_FLAGS(x) ((x) >> 12)

#define	HALP_HACK_FLAGS(x) ((x) & 0xFFF)

#define	HALP_CARD_FEATURE_FULL_DECODE 0x0001

#define	HALP_CHECK_CARD_REVISION_ID 0x10000

#define	HALP_CHECK_CARD_SUBVENDOR_ID 0x20000

#define	HALP_CHECK_CARD_SUBSYSTEM_ID 0x40000

#define	HalAddressToPde(x) (PHARDWARE_PTE)MiAddressToPde(x)

#define	HalAddressToPte(x) (PHARDWARE_PTE)MiAddressToPte(x)

Typedefs
typedef struct _HAL_BIOS_FRAME	HAL_BIOS_FRAME

typedef struct _HAL_BIOS_FRAME *	PHAL_BIOS_FRAME

typedef VOID(__cdecl *	PHAL_SW_INTERRUPT_HANDLER) (VOID)

typedef VOID(FASTCALL *	PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY) (IN PKTRAP_FRAME TrapFrame)

typedef enum _TIMER_OPERATING_MODES	TIMER_OPERATING_MODES

typedef enum _TIMER_ACCESS_MODES	TIMER_ACCESS_MODES

typedef enum _TIMER_CHANNELS	TIMER_CHANNELS

typedef union _TIMER_CONTROL_PORT_REGISTER	TIMER_CONTROL_PORT_REGISTER

typedef union _TIMER_CONTROL_PORT_REGISTER *	PTIMER_CONTROL_PORT_REGISTER

typedef union _SYSTEM_CONTROL_PORT_B_REGISTER	SYSTEM_CONTROL_PORT_B_REGISTER

typedef union _SYSTEM_CONTROL_PORT_B_REGISTER *	PSYSTEM_CONTROL_PORT_B_REGISTER

typedef enum _I8259_ICW1_OPERATING_MODE	I8259_ICW1_OPERATING_MODE

typedef enum _I8259_ICW1_INTERRUPT_MODE	I8259_ICW1_INTERRUPT_MODE

typedef enum _I8259_ICW1_INTERVAL	I8259_ICW1_INTERVAL

typedef enum _I8259_ICW4_SYSTEM_MODE	I8259_ICW4_SYSTEM_MODE

typedef enum _I8259_ICW4_EOI_MODE	I8259_ICW4_EOI_MODE

typedef enum _I8259_ICW4_BUFFERED_MODE	I8259_ICW4_BUFFERED_MODE

typedef enum _I8259_READ_REQUEST	I8259_READ_REQUEST

typedef enum _I8259_EOI_MODE	I8259_EOI_MODE

typedef union _I8259_ICW1	I8259_ICW1

typedef union _I8259_ICW1 *	PI8259_ICW1

typedef union _I8259_ICW2	I8259_ICW2

typedef union _I8259_ICW2 *	PI8259_ICW2

typedef union _I8259_ICW3	I8259_ICW3

typedef union _I8259_ICW3 *	PI8259_ICW3

typedef union _I8259_ICW4	I8259_ICW4

typedef union _I8259_ICW4 *	PI8259_ICW4

typedef union _I8259_OCW2	I8259_OCW2

typedef union _I8259_OCW2 *	PI8259_OCW2

typedef union _I8259_OCW3	I8259_OCW3

typedef union _I8259_OCW3 *	PI8259_OCW3

typedef union _I8259_ISR	I8259_ISR

typedef union _I8259_ISR *	PI8259_ISR

typedef I8259_ISR	I8259_IDR

typedef I8259_ISR *	PI8259_IDR

typedef union _EISA_ELCR	EISA_ELCR

typedef union _EISA_ELCR *	PEISA_ELCR

typedef struct _PIC_MASK	PIC_MASK

typedef struct _PIC_MASK *	PPIC_MASK

typedef BOOLEAN(NTAPI *	PHAL_DISMISS_INTERRUPT) (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

typedef struct _IDTUsageFlags	IDTUsageFlags

typedef struct _HalAddressUsage	ADDRESS_USAGE

typedef struct _HalAddressUsage *	PADDRESS_USAGE

Enumerations
enum	_TIMER_OPERATING_MODES { PitOperatingMode0, PitOperatingMode1, PitOperatingMode2, PitOperatingMode3, PitOperatingMode4, PitOperatingMode5, PitOperatingMode2Reserved, PitOperatingMode5Reserved }

enum	_TIMER_ACCESS_MODES { PitAccessModeCounterLatch, PitAccessModeLow, PitAccessModeHigh, PitAccessModeLowHigh }

enum	_TIMER_CHANNELS { PitChannel0, PitChannel1, PitChannel2, PitReadBack }

enum	_I8259_ICW1_OPERATING_MODE { Cascade, Single }

enum	_I8259_ICW1_INTERRUPT_MODE { EdgeTriggered, LevelTriggered }

enum	_I8259_ICW1_INTERVAL { Interval8, Interval4 }

enum	_I8259_ICW4_SYSTEM_MODE { Mcs8085Mode, New8086Mode }

enum	_I8259_ICW4_EOI_MODE { NormalEoi, AutomaticEoi }

enum	_I8259_ICW4_BUFFERED_MODE { NonBuffered, NonBuffered2, BufferedSlave, BufferedMaster }

enum	_I8259_READ_REQUEST { InvalidRequest, InvalidRequest2, ReadIdr, ReadIsr }

enum	_I8259_EOI_MODE { RotateAutoEoiClear, NonSpecificEoi, InvalidEoiMode, SpecificEoi, RotateAutoEoiSet, RotateNonSpecific, SetPriority, RotateSpecific }

Functions
BOOLEAN NTAPI	HalpDismissIrqGeneric (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrq15 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrq13 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrq07 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrqLevel (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrq15Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrq13Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

BOOLEAN NTAPI	HalpDismissIrq07Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

VOID __cdecl	HalpHardwareInterruptLevel (VOID)

PADAPTER_OBJECT NTAPI	HalpAllocateAdapterEx (ULONG NumberOfMapRegisters, BOOLEAN IsMaster, BOOLEAN Dma32BitAddresses)

INIT_FUNCTION VOID NTAPI	HalpRegisterVector (IN UCHAR Flags, IN ULONG BusVector, IN ULONG SystemVector, IN KIRQL Irql)

INIT_FUNCTION VOID NTAPI	HalpEnableInterruptHandler (IN UCHAR Flags, IN ULONG BusVector, IN ULONG SystemVector, IN KIRQL Irql, IN PVOID Handler, IN KINTERRUPT_MODE Mode)

VOID NTAPI	HalpInitializePICs (IN BOOLEAN EnableInterrupts)

VOID __cdecl	HalpApcInterrupt (VOID)

VOID __cdecl	HalpDispatchInterrupt (VOID)

PHAL_SW_INTERRUPT_HANDLER __cdecl	HalpDispatchInterrupt2 (VOID)

DECLSPEC_NORETURN VOID FASTCALL	HalpApcInterrupt2ndEntry (IN PKTRAP_FRAME TrapFrame)

DECLSPEC_NORETURN VOID FASTCALL	HalpDispatchInterrupt2ndEntry (IN PKTRAP_FRAME TrapFrame)

INIT_FUNCTION VOID NTAPI	HalpInitializeClock (VOID)

VOID __cdecl	HalpClockInterrupt (VOID)

VOID __cdecl	HalpProfileInterrupt (VOID)

VOID NTAPI	HalpCalibrateStallExecution (VOID)

VOID	HalpInitPciBus (VOID)

INIT_FUNCTION VOID	HalpInitDma (VOID)

VOID	HalpInitPhase0 (PLOADER_PARAMETER_BLOCK LoaderBlock)

VOID	HalpInitPhase1 (VOID)

VOID NTAPI	HalpFlushTLB (VOID)

VOID NTAPI	HalpCheckPowerButton (VOID)

INIT_FUNCTION VOID NTAPI	HalpRegisterKdSupportFunctions (VOID)

INIT_FUNCTION NTSTATUS NTAPI	HalpSetupPciDeviceForDebugging (IN PVOID LoaderBlock, IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice)

INIT_FUNCTION NTSTATUS NTAPI	HalpReleasePciDeviceForDebugging (IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice)

ULONG64 NTAPI	HalpAllocPhysicalMemory (IN PLOADER_PARAMETER_BLOCK LoaderBlock, IN ULONG64 MaxAddress, IN PFN_NUMBER PageCount, IN BOOLEAN Aligned)

PVOID NTAPI	HalpMapPhysicalMemory64Vista (IN PHYSICAL_ADDRESS PhysicalAddress, IN PFN_COUNT PageCount, IN BOOLEAN FlushCurrentTLB)

VOID NTAPI	HalpUnmapVirtualAddressVista (IN PVOID VirtualAddress, IN PFN_COUNT NumberPages, IN BOOLEAN FlushCurrentTLB)

PVOID NTAPI	HalpMapPhysicalMemory64 (IN PHYSICAL_ADDRESS PhysicalAddress, IN PFN_COUNT PageCount)

VOID NTAPI	HalpUnmapVirtualAddress (IN PVOID VirtualAddress, IN PFN_COUNT NumberPages)

NTSTATUS NTAPI	HaliQuerySystemInformation (IN HAL_QUERY_INFORMATION_CLASS InformationClass, IN ULONG BufferSize, IN OUT PVOID Buffer, OUT PULONG ReturnedLength)

NTSTATUS NTAPI	HaliSetSystemInformation (IN HAL_SET_INFORMATION_CLASS InformationClass, IN ULONG BufferSize, IN OUT PVOID Buffer)

BOOLEAN NTAPI	HalpBiosDisplayReset (VOID)

VOID FASTCALL	HalpExitToV86 (PKTRAP_FRAME TrapFrame)

VOID __cdecl	HalpRealModeStart (VOID)

VOID NTAPI	HaliHaltSystem (VOID)

INIT_FUNCTION VOID NTAPI	HalpInitializeCmos (VOID)

UCHAR NTAPI	HalpReadCmos (IN UCHAR Reg)

VOID NTAPI	HalpWriteCmos (IN UCHAR Reg, IN UCHAR Value)

VOID NTAPI	HalpAcquireCmosSpinLock (VOID)

VOID NTAPI	HalpReleaseCmosSpinLock (VOID)

VOID NTAPI	HalpInitializeLegacyPICs (VOID)

NTSTATUS NTAPI	HalpOpenRegistryKey (IN PHANDLE KeyHandle, IN HANDLE RootKey, IN PUNICODE_STRING KeyName, IN ACCESS_MASK DesiredAccess, IN BOOLEAN Create)

INIT_FUNCTION VOID NTAPI	HalpGetNMICrashFlag (VOID)

INIT_FUNCTION BOOLEAN NTAPI	HalpGetDebugPortTable (VOID)

INIT_FUNCTION VOID NTAPI	HalpReportSerialNumber (VOID)

INIT_FUNCTION NTSTATUS NTAPI	HalpMarkAcpiHal (VOID)

INIT_FUNCTION VOID NTAPI	HalpBuildAddressMap (VOID)

INIT_FUNCTION VOID NTAPI	HalpReportResourceUsage (IN PUNICODE_STRING HalName, IN INTERFACE_TYPE InterfaceType)

INIT_FUNCTION ULONG NTAPI	HalpIs16BitPortDecodeSupported (VOID)

NTSTATUS NTAPI	HalpQueryAcpiResourceRequirements (OUT PIO_RESOURCE_REQUIREMENTS_LIST *Requirements)

VOID FASTCALL	KeUpdateSystemTime (IN PKTRAP_FRAME TrapFrame, IN ULONG Increment, IN KIRQL OldIrql)

INIT_FUNCTION VOID NTAPI	HalpInitBusHandlers (VOID)

NTSTATUS NTAPI	HaliInitPnpDriver (VOID)

INIT_FUNCTION VOID NTAPI	HalpDebugPciDumpBus (IN ULONG i, IN ULONG j, IN ULONG k, IN PPCI_COMMON_CONFIG PciData)

VOID NTAPI	HalpInitProcessor (IN ULONG ProcessorNumber, IN PLOADER_PARAMETER_BLOCK LoaderBlock)

Macro Definition Documentation

◆ BCD_INT

#define BCD_INT ( bcd ) (((bcd & 0xF0) >> 4) * 10 + (bcd & 0x0F))

Definition at line 69 of file halp.h.

◆ CMOS_CONTROL_PORT

#define CMOS_CONTROL_PORT (PUCHAR)0x70

Definition at line 50 of file halp.h.

◆ CMOS_DATA_PORT

#define CMOS_DATA_PORT (PUCHAR)0x71

Definition at line 51 of file halp.h.

◆ EISA_ELCR_MASTER

#define EISA_ELCR_MASTER 0x4D0

Definition at line 376 of file halp.h.

◆ EISA_ELCR_SLAVE

#define EISA_ELCR_SLAVE 0x4D1

Definition at line 377 of file halp.h.

◆ GRAPHICS_MODE_12

#define GRAPHICS_MODE_12 0x12 /* 80x30 8x16 640x480 16/256K */

Definition at line 87 of file halp.h.

◆ HAL_APC_REQUEST

#define HAL_APC_REQUEST 0

Definition at line 42 of file halp.h.

◆ HAL_BUILD_TYPE

#define HAL_BUILD_TYPE ((DBG ? PRCB_BUILD_DEBUG : 0) | PRCB_BUILD_UNIPROCESSOR)

Definition at line 10 of file halp.h.

◆ HAL_DPC_REQUEST

#define HAL_DPC_REQUEST 1

Definition at line 43 of file halp.h.

◆ HAL_PROFILING_INTERVAL

#define HAL_PROFILING_INTERVAL 0

Definition at line 46 of file halp.h.

◆ HAL_PROFILING_MULTIPLIER

#define HAL_PROFILING_MULTIPLIER 1

Definition at line 47 of file halp.h.

◆ HalAddressToPde

#define HalAddressToPde ( x ) (PHARDWARE_PTE)MiAddressToPde(x)

Definition at line 522 of file halp.h.

◆ HalAddressToPte

#define HalAddressToPte ( x ) (PHARDWARE_PTE)MiAddressToPte(x)

Definition at line 523 of file halp.h.

◆ HALP_CARD_FEATURE_FULL_DECODE

#define HALP_CARD_FEATURE_FULL_DECODE 0x0001

Definition at line 510 of file halp.h.

◆ HALP_CHECK_CARD_REVISION_ID

#define HALP_CHECK_CARD_REVISION_ID 0x10000

Definition at line 515 of file halp.h.

◆ HALP_CHECK_CARD_SUBSYSTEM_ID

#define HALP_CHECK_CARD_SUBSYSTEM_ID 0x40000

Definition at line 517 of file halp.h.

◆ HALP_CHECK_CARD_SUBVENDOR_ID

#define HALP_CHECK_CARD_SUBVENDOR_ID 0x20000

Definition at line 516 of file halp.h.

◆ HALP_HACK_FLAGS

#define HALP_HACK_FLAGS ( x ) ((x) & 0xFFF)

Definition at line 505 of file halp.h.

◆ HALP_REVISION_FROM_HACK_FLAGS

#define HALP_REVISION_FROM_HACK_FLAGS ( x ) ((x) >> 24)

Definition at line 503 of file halp.h.

◆ HALP_REVISION_HACK_FLAGS

#define HALP_REVISION_HACK_FLAGS ( x ) ((x) >> 12)

Definition at line 504 of file halp.h.

◆ IDT_DEVICE

#define IDT_DEVICE 0x21

Definition at line 66 of file halp.h.

◆ IDT_INTERNAL

#define IDT_INTERNAL 0x11

Definition at line 65 of file halp.h.

◆ IDT_LATCHED

#define IDT_LATCHED 0x02

Definition at line 63 of file halp.h.

◆ IDT_READ_ONLY

#define IDT_READ_ONLY 0x04

Definition at line 64 of file halp.h.

◆ IDT_REGISTERED

#define IDT_REGISTERED 0x01

Definition at line 62 of file halp.h.

◆ INT_BCD

#define INT_BCD ( int ) (UCHAR)(((int / 10) << 4) + (int % 10))

Definition at line 71 of file halp.h.

◆ PIC1_CONTROL_PORT

#define PIC1_CONTROL_PORT 0x20

Definition at line 194 of file halp.h.

◆ PIC1_DATA_PORT

#define PIC1_DATA_PORT 0x21

Definition at line 195 of file halp.h.

◆ PIC2_CONTROL_PORT

#define PIC2_CONTROL_PORT 0xA0

Definition at line 196 of file halp.h.

◆ PIC2_DATA_PORT

#define PIC2_DATA_PORT 0xA1

Definition at line 197 of file halp.h.

◆ PIT_FREQUENCY

#define PIT_FREQUENCY 1193182

Definition at line 106 of file halp.h.

◆ RTC_REG_A_UIP

#define RTC_REG_A_UIP 0x80

Definition at line 53 of file halp.h.

◆ RTC_REG_B_PI

#define RTC_REG_B_PI 0x40

Definition at line 55 of file halp.h.

◆ RTC_REG_C_IRQ

#define RTC_REG_C_IRQ 0x80

Definition at line 57 of file halp.h.

◆ RTC_REGISTER_A

#define RTC_REGISTER_A 0x0A

Definition at line 52 of file halp.h.

◆ RTC_REGISTER_B

#define RTC_REGISTER_B 0x0B

Definition at line 54 of file halp.h.

◆ RTC_REGISTER_C

#define RTC_REGISTER_C 0x0C

Definition at line 56 of file halp.h.

◆ RTC_REGISTER_CENTURY

#define RTC_REGISTER_CENTURY 0x32

Definition at line 59 of file halp.h.

◆ RTC_REGISTER_D

#define RTC_REGISTER_D 0x0D

Definition at line 58 of file halp.h.

◆ SET_VIDEO_MODE

#define SET_VIDEO_MODE 0x00

Definition at line 82 of file halp.h.

◆ SYSTEM_CONTROL_PORT_A

#define SYSTEM_CONTROL_PORT_A 0x92

Definition at line 170 of file halp.h.

◆ SYSTEM_CONTROL_PORT_B

#define SYSTEM_CONTROL_PORT_B 0x61

Definition at line 171 of file halp.h.

◆ TIMER_CHANNEL0_DATA_PORT

#define TIMER_CHANNEL0_DATA_PORT 0x40

Definition at line 111 of file halp.h.

◆ TIMER_CHANNEL1_DATA_PORT

#define TIMER_CHANNEL1_DATA_PORT 0x41

Definition at line 112 of file halp.h.

◆ TIMER_CHANNEL2_DATA_PORT

#define TIMER_CHANNEL2_DATA_PORT 0x42

Definition at line 113 of file halp.h.

◆ TIMER_CONTROL_PORT

#define TIMER_CONTROL_PORT 0x43

Definition at line 114 of file halp.h.

◆ VIDEO_SERVICES

#define VIDEO_SERVICES 0x10

Definition at line 77 of file halp.h.

Typedef Documentation

◆ ADDRESS_USAGE

typedef struct _HalAddressUsage ADDRESS_USAGE

◆ EISA_ELCR

typedef union _EISA_ELCR EISA_ELCR

◆ HAL_BIOS_FRAME

typedef struct _HAL_BIOS_FRAME HAL_BIOS_FRAME

◆ I8259_EOI_MODE

typedef enum _I8259_EOI_MODE I8259_EOI_MODE

◆ I8259_ICW1

typedef union _I8259_ICW1 I8259_ICW1

◆ I8259_ICW1_INTERRUPT_MODE

typedef enum _I8259_ICW1_INTERRUPT_MODE I8259_ICW1_INTERRUPT_MODE

◆ I8259_ICW1_INTERVAL

typedef enum _I8259_ICW1_INTERVAL I8259_ICW1_INTERVAL

◆ I8259_ICW1_OPERATING_MODE

typedef enum _I8259_ICW1_OPERATING_MODE I8259_ICW1_OPERATING_MODE

◆ I8259_ICW2

typedef union _I8259_ICW2 I8259_ICW2

◆ I8259_ICW3

typedef union _I8259_ICW3 I8259_ICW3

◆ I8259_ICW4

typedef union _I8259_ICW4 I8259_ICW4

◆ I8259_ICW4_BUFFERED_MODE

typedef enum _I8259_ICW4_BUFFERED_MODE I8259_ICW4_BUFFERED_MODE

◆ I8259_ICW4_EOI_MODE

typedef enum _I8259_ICW4_EOI_MODE I8259_ICW4_EOI_MODE

◆ I8259_ICW4_SYSTEM_MODE

typedef enum _I8259_ICW4_SYSTEM_MODE I8259_ICW4_SYSTEM_MODE

◆ I8259_IDR

typedef I8259_ISR I8259_IDR

Definition at line 368 of file halp.h.

◆ I8259_ISR

typedef union _I8259_ISR I8259_ISR

◆ I8259_OCW2

typedef union _I8259_OCW2 I8259_OCW2

◆ I8259_OCW3

typedef union _I8259_OCW3 I8259_OCW3

◆ I8259_READ_REQUEST

typedef enum _I8259_READ_REQUEST I8259_READ_REQUEST

◆ IDTUsageFlags

typedef struct _IDTUsageFlags IDTUsageFlags

◆ PADDRESS_USAGE

typedef struct _HalAddressUsage * PADDRESS_USAGE

◆ PEISA_ELCR

typedef union _EISA_ELCR * PEISA_ELCR

◆ PHAL_BIOS_FRAME

typedef struct _HAL_BIOS_FRAME * PHAL_BIOS_FRAME

◆ PHAL_DISMISS_INTERRUPT

typedef BOOLEAN(NTAPI * PHAL_DISMISS_INTERRUPT) (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)

Definition at line 424 of file halp.h.

◆ PHAL_SW_INTERRUPT_HANDLER

typedef VOID(__cdecl * PHAL_SW_INTERRUPT_HANDLER) (VOID)

Definition at line 32 of file halp.h.

◆ PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY

typedef VOID(FASTCALL * PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY) (IN PKTRAP_FRAME TrapFrame)

Definition at line 38 of file halp.h.

◆ PI8259_ICW1

typedef union _I8259_ICW1 * PI8259_ICW1

◆ PI8259_ICW2

typedef union _I8259_ICW2 * PI8259_ICW2

◆ PI8259_ICW3

typedef union _I8259_ICW3 * PI8259_ICW3

◆ PI8259_ICW4

typedef union _I8259_ICW4 * PI8259_ICW4

◆ PI8259_IDR

typedef I8259_ISR * PI8259_IDR

Definition at line 368 of file halp.h.

◆ PI8259_ISR

typedef union _I8259_ISR * PI8259_ISR

◆ PI8259_OCW2

typedef union _I8259_OCW2 * PI8259_OCW2

◆ PI8259_OCW3

typedef union _I8259_OCW3 * PI8259_OCW3

◆ PIC_MASK

typedef struct _PIC_MASK PIC_MASK

◆ PPIC_MASK

typedef struct _PIC_MASK * PPIC_MASK

◆ PSYSTEM_CONTROL_PORT_B_REGISTER

typedef union _SYSTEM_CONTROL_PORT_B_REGISTER * PSYSTEM_CONTROL_PORT_B_REGISTER

◆ PTIMER_CONTROL_PORT_REGISTER

typedef union _TIMER_CONTROL_PORT_REGISTER * PTIMER_CONTROL_PORT_REGISTER

◆ SYSTEM_CONTROL_PORT_B_REGISTER

typedef union _SYSTEM_CONTROL_PORT_B_REGISTER SYSTEM_CONTROL_PORT_B_REGISTER

◆ TIMER_ACCESS_MODES

typedef enum _TIMER_ACCESS_MODES TIMER_ACCESS_MODES

◆ TIMER_CHANNELS

typedef enum _TIMER_CHANNELS TIMER_CHANNELS

◆ TIMER_CONTROL_PORT_REGISTER

typedef union _TIMER_CONTROL_PORT_REGISTER TIMER_CONTROL_PORT_REGISTER

◆ TIMER_OPERATING_MODES

typedef enum _TIMER_OPERATING_MODES TIMER_OPERATING_MODES

Enumeration Type Documentation

◆ _I8259_EOI_MODE

enum _I8259_EOI_MODE

Enumerator
RotateAutoEoiClear
NonSpecificEoi
InvalidEoiMode
SpecificEoi
RotateAutoEoiSet
RotateNonSpecific
SetPriority
RotateSpecific

Definition at line 248 of file halp.h.

 {
     RotateAutoEoiClear,
     NonSpecificEoi,
     InvalidEoiMode,
     SpecificEoi,
     RotateAutoEoiSet,
     RotateNonSpecific,
     SetPriority,
     RotateSpecific
 } I8259_EOI_MODE;

◆ _I8259_ICW1_INTERRUPT_MODE

enum _I8259_ICW1_INTERRUPT_MODE

Enumerator
EdgeTriggered
LevelTriggered

Definition at line 208 of file halp.h.

 {
     EdgeTriggered,
     LevelTriggered
 } I8259_ICW1_INTERRUPT_MODE;

◆ _I8259_ICW1_INTERVAL

enum _I8259_ICW1_INTERVAL

Enumerator
Interval8
Interval4

Definition at line 214 of file halp.h.

 {
     Interval8,
     Interval4
 } I8259_ICW1_INTERVAL;

◆ _I8259_ICW1_OPERATING_MODE

enum _I8259_ICW1_OPERATING_MODE

Enumerator
Cascade
Single

Definition at line 202 of file halp.h.

 {
     Cascade,
     Single
 } I8259_ICW1_OPERATING_MODE;

◆ _I8259_ICW4_BUFFERED_MODE

enum _I8259_ICW4_BUFFERED_MODE

Enumerator
NonBuffered
NonBuffered2
BufferedSlave
BufferedMaster

Definition at line 232 of file halp.h.

 {
     NonBuffered,
     NonBuffered2,
     BufferedSlave,
     BufferedMaster
 } I8259_ICW4_BUFFERED_MODE;

◆ _I8259_ICW4_EOI_MODE

enum _I8259_ICW4_EOI_MODE

Enumerator
NormalEoi
AutomaticEoi

Definition at line 226 of file halp.h.

 {
     NormalEoi,
     AutomaticEoi
 } I8259_ICW4_EOI_MODE;

◆ _I8259_ICW4_SYSTEM_MODE

enum _I8259_ICW4_SYSTEM_MODE

Enumerator
Mcs8085Mode
New8086Mode

Definition at line 220 of file halp.h.

 {
     Mcs8085Mode,
     New8086Mode
 } I8259_ICW4_SYSTEM_MODE;

◆ _I8259_READ_REQUEST

enum _I8259_READ_REQUEST

Enumerator
InvalidRequest
InvalidRequest2
ReadIdr
ReadIsr

Definition at line 240 of file halp.h.

 {
     InvalidRequest,
     InvalidRequest2,
     ReadIdr,
     ReadIsr
 } I8259_READ_REQUEST;

◆ _TIMER_ACCESS_MODES

enum _TIMER_ACCESS_MODES

Enumerator
PitAccessModeCounterLatch
PitAccessModeLow
PitAccessModeHigh
PitAccessModeLowHigh

Definition at line 136 of file halp.h.

 {
     PitAccessModeCounterLatch,
     PitAccessModeLow,
     PitAccessModeHigh,
     PitAccessModeLowHigh
 } TIMER_ACCESS_MODES;

◆ _TIMER_CHANNELS

enum _TIMER_CHANNELS

Enumerator
PitChannel0
PitChannel1
PitChannel2
PitReadBack

Definition at line 144 of file halp.h.

 {
     PitChannel0,
     PitChannel1,
     PitChannel2,
     PitReadBack
 } TIMER_CHANNELS;

◆ _TIMER_OPERATING_MODES

enum _TIMER_OPERATING_MODES

Enumerator
PitOperatingMode0
PitOperatingMode1
PitOperatingMode2
PitOperatingMode3
PitOperatingMode4
PitOperatingMode5
PitOperatingMode2Reserved
PitOperatingMode5Reserved

Definition at line 124 of file halp.h.

 {
     PitOperatingMode0,
     PitOperatingMode1,
     PitOperatingMode2,
     PitOperatingMode3,
     PitOperatingMode4,
     PitOperatingMode5,
     PitOperatingMode2Reserved,
     PitOperatingMode5Reserved
 } TIMER_OPERATING_MODES;

Function Documentation

◆ HaliHaltSystem()

VOID NTAPI HaliHaltSystem ( VOID )

Definition at line 22 of file processor.c.

 {
     /* Disable interrupts and halt the CPU */
     _disable();
     __halt();
 }

Referenced by HalInitSystem().

◆ HaliInitPnpDriver()

NTSTATUS NTAPI HaliInitPnpDriver ( VOID )

Definition at line 902 of file halpnpdd.c.

 {
     NTSTATUS Status;
     UNICODE_STRING DriverString;
     PAGED_CODE();
 
     /* Create the driver */
     RtlInitUnicodeString(&DriverString, L"\\Driver\\ACPI_HAL");
     Status = IoCreateDriver(&DriverString, HalpDriverEntry);
 
     /* Return status */
     return Status;
 }

Referenced by HalInitSystem().

◆ HaliQuerySystemInformation()

NTSTATUS NTAPI HaliQuerySystemInformation	(	IN HAL_QUERY_INFORMATION_CLASS	InformationClass,
		IN ULONG	BufferSize,
		IN OUT PVOID	Buffer,
		OUT PULONG	ReturnedLength
	)

Definition at line 19 of file sysinfo.c.

 {
     UNIMPLEMENTED;
     while (TRUE);
     return STATUS_NOT_IMPLEMENTED;
 }

Referenced by HalInitSystem().

◆ HaliSetSystemInformation()

NTSTATUS NTAPI HaliSetSystemInformation	(	IN HAL_SET_INFORMATION_CLASS	InformationClass,
		IN ULONG	BufferSize,
		IN OUT PVOID	Buffer
	)

Definition at line 31 of file sysinfo.c.

 {
     UNIMPLEMENTED;
     while (TRUE);
     return STATUS_NOT_IMPLEMENTED;
 }

Referenced by HalInitSystem().

◆ HalpAcquireCmosSpinLock()

VOID NTAPI HalpAcquireCmosSpinLock ( VOID )

Definition at line 227 of file spinlock.c.

 {
     ULONG_PTR Flags;
 
     /* Get flags and disable interrupts */
     Flags = __readeflags();
     _disable();
 
     /* Acquire the lock */
     KxAcquireSpinLock(&HalpSystemHardwareLock);
 
     /* We have the lock, save the flags now */
     HalpSystemHardwareFlags = Flags;
 }

Referenced by HalGetEnvironmentVariable(), HalMakeBeep(), HalpGetCmosData(), HalpInitializeClock(), HalpReboot(), HalpSetCmosData(), HalQueryRealTimeClock(), HalSetEnvironmentVariable(), HalSetRealTimeClock(), HalStartProfileInterrupt(), HalStopProfileInterrupt(), and RtcSetClockRate().

◆ HalpAllocateAdapterEx()

PADAPTER_OBJECT NTAPI HalpAllocateAdapterEx	(	ULONG	NumberOfMapRegisters,
		BOOLEAN	IsMaster,
		BOOLEAN	Dma32BitAddresses
	)

◆ HalpAllocPhysicalMemory()

ULONG64 NTAPI HalpAllocPhysicalMemory	(	IN PLOADER_PARAMETER_BLOCK	LoaderBlock,
		IN ULONG64	MaxAddress,
		IN PFN_NUMBER	PageCount,
		IN BOOLEAN	Aligned
	)

Definition at line 29 of file memory.c.

 {
     ULONG UsedDescriptors;
     ULONG64 PhysicalAddress;
     PFN_NUMBER MaxPage, BasePage, Alignment;
     PLIST_ENTRY NextEntry;
     PMEMORY_ALLOCATION_DESCRIPTOR MdBlock, NewBlock, FreeBlock;
 
     /* Highest page we'll go */
     MaxPage = MaxAddress >> PAGE_SHIFT;
 
     /* We need at least two blocks */
     if ((HalpUsedAllocDescriptors + 2) > 64) return 0;
 
     /* Remember how many we have now */
     UsedDescriptors = HalpUsedAllocDescriptors;
 
     /* Loop the loader block memory descriptors */
     NextEntry = LoaderBlock->MemoryDescriptorListHead.Flink;
     while (NextEntry != &LoaderBlock->MemoryDescriptorListHead)
     {
         /* Get the block */
         MdBlock = CONTAINING_RECORD(NextEntry,
                                     MEMORY_ALLOCATION_DESCRIPTOR,
                                     ListEntry);
 
         /* No alignment by default */
         Alignment = 0;
 
         /* Unless requested, in which case we use a 64KB block alignment */
         if (Aligned) Alignment = ((MdBlock->BasePage + 0x0F) & ~0x0F) - MdBlock->BasePage;
 
         /* Search for free memory */
         if ((MdBlock->MemoryType == LoaderFree) ||
             (MdBlock->MemoryType == LoaderFirmwareTemporary))
         {
             /* Make sure the page is within bounds, including alignment */
             BasePage = MdBlock->BasePage;
             if ((BasePage) &&
                 (MdBlock->PageCount >= PageCount + Alignment) &&
                 (BasePage + PageCount + Alignment < MaxPage))
             {
                 /* We found an address */
                 PhysicalAddress = ((ULONG64)BasePage + Alignment) << PAGE_SHIFT;
                 break;
             }
         }
 
         /* Keep trying */
         NextEntry = NextEntry->Flink;
     }
 
     /* If we didn't find anything, get out of here */
     if (NextEntry == &LoaderBlock->MemoryDescriptorListHead) return 0;
 
     /* Okay, now get a descriptor */
     NewBlock = &HalpAllocationDescriptorArray[HalpUsedAllocDescriptors];
     NewBlock->PageCount = (ULONG)PageCount;
     NewBlock->BasePage = MdBlock->BasePage + Alignment;
     NewBlock->MemoryType = LoaderHALCachedMemory;
 
     /* Update count */
     UsedDescriptors++;
     HalpUsedAllocDescriptors = UsedDescriptors;
 
     /* Check if we had any alignment */
     if (Alignment)
     {
         /* Check if we had leftovers */
         if (MdBlock->PageCount > (PageCount + Alignment))
         {
             /* Get the next descriptor */
             FreeBlock = &HalpAllocationDescriptorArray[UsedDescriptors];
             FreeBlock->PageCount = MdBlock->PageCount - Alignment - (ULONG)PageCount;
             FreeBlock->BasePage = MdBlock->BasePage + Alignment + (ULONG)PageCount;
 
             /* One more */
             HalpUsedAllocDescriptors++;
 
             /* Insert it into the list */
             InsertHeadList(&MdBlock->ListEntry, &FreeBlock->ListEntry);
         }
 
         /* Trim the original block to the alignment only */
         MdBlock->PageCount = Alignment;
 
         /* Insert the descriptor after the original one */
         InsertHeadList(&MdBlock->ListEntry, &NewBlock->ListEntry);
     }
     else
     {
         /* Consume memory from this block */
         MdBlock->BasePage += (ULONG)PageCount;
         MdBlock->PageCount -= (ULONG)PageCount;
 
         /* Insert the descriptor before the original one */
         InsertTailList(&MdBlock->ListEntry, &NewBlock->ListEntry);
 
         /* Remove the entry if the whole block was allocated */
         if (MdBlock->PageCount == 0) RemoveEntryList(&MdBlock->ListEntry);
     }
 
     /* Return the address */
     return PhysicalAddress;
 }

Referenced by HalpAcpiCopyBiosTable(), HalpAcpiFindRsdtPhase0(), and HalpSetupAcpiPhase0().

◆ HalpApcInterrupt()

VOID __cdecl HalpApcInterrupt ( VOID )

Referenced by HalpInitializePICs().

◆ HalpApcInterrupt2ndEntry()

DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry ( IN PKTRAP_FRAME TrapFrame )

Definition at line 1239 of file pic.c.

 {
     /* Do the work */
     _HalpApcInterruptHandler(TrapFrame);
 }

◆ HalpBiosDisplayReset()

BOOLEAN NTAPI HalpBiosDisplayReset ( VOID )

Definition at line 455 of file x86bios.c.

 {
 #if 0
     X86_BIOS_REGISTERS Registers;
     ULONG OldEflags;
 
     /* Save flags and disable interrupts */
     OldEflags = __readeflags();
     _disable();
 
     /* Set AH = 0 (Set video mode), AL = 0x12 (640x480x16 vga) */
     Registers.Eax = 0x12;
 
     /* Call INT 0x10 */
     x86BiosCall(0x10, &Registers);
 
     // FIXME: check result
 
     /* Restore previous flags */
     __writeeflags(OldEflags);
 #endif
     return TRUE;
 }

Referenced by HalInitializeBios(), and HalInitSystem().

◆ HalpBuildAddressMap()

INIT_FUNCTION VOID NTAPI HalpBuildAddressMap ( VOID )

Definition at line 944 of file halacpi.c.

 {
     /* ACPI is magic baby */
 }

Referenced by HalpReportResourceUsage().

◆ HalpCalibrateStallExecution()

VOID NTAPI HalpCalibrateStallExecution ( VOID )

Definition at line 100 of file hardware.c.

 {
     ULONG i;
     ULONG calib_bit;
     ULONG CurCount;
 
     /* Initialise timer interrupt with MILLISECOND ms interval        */
     WRITE_PORT_UCHAR((PUCHAR)0x43, 0x34);  /* binary, mode 2, LSB/MSB, ch 0 */
     WRITE_PORT_UCHAR((PUCHAR)0x40, LATCH & 0xff); /* LSB */
     WRITE_PORT_UCHAR((PUCHAR)0x40, LATCH >> 8); /* MSB */
 
     /* Stage 1:  Coarse calibration                                   */
 
     delay_count = 1;
 
     do
     {
         /* Next delay count to try */
         delay_count <<= 1;
 
         WaitFor8254Wraparound();
 
         /* Do the delay */
         __StallExecutionProcessor(delay_count);
 
         CurCount = Read8254Timer();
     }
     while (CurCount > LATCH / 2);
 
     /* Get bottom value for delay */
     delay_count >>= 1;
 
     /* Stage 2:  Fine calibration                                     */
 
     /* Which bit are we going to test */
     calib_bit = delay_count;
 
     for (i = 0; i < PRECISION; i++)
     {
         /* Next bit to calibrate */
         calib_bit >>= 1;
 
         /* If we have done all bits, stop */
         if (!calib_bit) break;
 
         /* Set the bit in delay_count */
         delay_count |= calib_bit;
 
         WaitFor8254Wraparound();
 
         /* Do the delay */
         __StallExecutionProcessor(delay_count);
 
         CurCount = Read8254Timer();
         /* If a tick has passed, turn the calibrated bit back off */
         if (CurCount <= LATCH / 2)
             delay_count &= ~calib_bit;
     }
 
     /* We're finished:  Do the finishing touches */
 
     /* Calculate delay_count for 1ms */
     delay_count /= (MILLISEC / 2);
 }

Referenced by HalInitSystem(), and MachInit().

◆ HalpCheckPowerButton()

VOID NTAPI HalpCheckPowerButton ( VOID )

Definition at line 20 of file misc.c.

 {
     /* Nothing to do on non-ACPI */
     return;
 }

Referenced by HalpRegisterKdSupportFunctions().

◆ HalpClockInterrupt()

VOID __cdecl HalpClockInterrupt ( VOID )

Definition at line 30 of file timer.c.

 {   
     /* Clear the interrupt */
     ASSERT(KeGetCurrentIrql() == CLOCK2_LEVEL);
     WRITE_REGISTER_ULONG(TIMER0_INT_CLEAR, 1);
     
     /* FIXME: Update HAL Perf counters */
     
     /* FIXME: Check if someone changed the clockrate */
     
     /* Call the kernel */
     KeUpdateSystemTime(KeGetCurrentThread()->TrapFrame,
                        HalpCurrentTimeIncrement,
                        CLOCK2_LEVEL);
 }

Referenced by HalInitSystem(), HalpInitializePICs(), HalpInitPhase0(), and HalpInitPhase1().

◆ HalpDebugPciDumpBus()

INIT_FUNCTION VOID NTAPI HalpDebugPciDumpBus	(	IN ULONG	i,
		IN ULONG	j,
		IN ULONG	k,
		IN PPCI_COMMON_CONFIG	PciData
	)

Definition at line 807 of file bussupp.c.

 {
     PCHAR p, ClassName, Boundary, SubClassName, VendorName, ProductName, SubVendorName;
     ULONG Length;
     CHAR LookupString[16] = "";
     CHAR bSubClassName[64] = "Unknown";
     CHAR bVendorName[64] = "";
     CHAR bProductName[128] = "Unknown device";
     CHAR bSubVendorName[128] = "Unknown";
     ULONG Size, Mem, b;
 
     /* Isolate the class name */
     sprintf(LookupString, "C %02x  ", PciData->BaseClass);
     ClassName = strstr((PCHAR)ClassTable, LookupString);
     if (ClassName)
     {
         /* Isolate the subclass name */
         ClassName += strlen("C 00  ");
         Boundary = strstr(ClassName, "\nC ");
         sprintf(LookupString, "\n\t%02x  ", PciData->SubClass);
         SubClassName = strstr(ClassName, LookupString);
         if (Boundary && SubClassName > Boundary)
         {
             SubClassName = NULL;
         }
         if (!SubClassName)
         {
             SubClassName = ClassName;
         }
         else
         {
             SubClassName += strlen("\n\t00  ");
         }
         /* Copy the subclass into our buffer */
         p = strpbrk(SubClassName, "\r\n");
         Length = p - SubClassName;
         if (Length >= sizeof(bSubClassName)) Length = sizeof(bSubClassName) - 1;
         strncpy(bSubClassName, SubClassName, Length);
         bSubClassName[Length] = '\0';
     }
 
     /* Isolate the vendor name */
     sprintf(LookupString, "\r\n%04x  ", PciData->VendorID);
     VendorName = strstr((PCHAR)VendorTable, LookupString);
     if (VendorName)
     {
         /* Copy the vendor name into our buffer */
         VendorName += strlen("\r\n0000  ");
         p = strpbrk(VendorName, "\r\n");
         Length = p - VendorName;
         if (Length >= sizeof(bVendorName)) Length = sizeof(bVendorName) - 1;
         strncpy(bVendorName, VendorName, Length);
         bVendorName[Length] = '\0';
         p += strlen("\r\n");
         while (*p == '\t' || *p == '#')
         {
             p = strpbrk(p, "\r\n");
             p += strlen("\r\n");
         }
         Boundary = p;
 
         /* Isolate the product name */
         sprintf(LookupString, "\t%04x  ", PciData->DeviceID);
         ProductName = strstr(VendorName, LookupString);
         if (Boundary && ProductName >= Boundary)
         {
             ProductName = NULL;
         }
         if (ProductName)
         {
             /* Copy the product name into our buffer */
             ProductName += strlen("\t0000  ");
             p = strpbrk(ProductName, "\r\n");
             Length = p - ProductName;
             if (Length >= sizeof(bProductName)) Length = sizeof(bProductName) - 1;
             strncpy(bProductName, ProductName, Length);
             bProductName[Length] = '\0';
             p += strlen("\r\n");
             while ((*p == '\t' && *(p + 1) == '\t') || *p == '#')
             {
                 p = strpbrk(p, "\r\n");
                 p += strlen("\r\n");
             }
             Boundary = p;
 
             /* Isolate the subvendor and subsystem name */
             sprintf(LookupString,
                     "\t\t%04x %04x  ",
                     PciData->u.type0.SubVendorID,
                     PciData->u.type0.SubSystemID);
             SubVendorName = strstr(ProductName, LookupString);
             if (Boundary && SubVendorName >= Boundary)
             {
                 SubVendorName = NULL;
             }
             if (SubVendorName)
             {
                 /* Copy the subvendor name into our buffer */
                 SubVendorName += strlen("\t\t0000 0000  ");
                 p = strpbrk(SubVendorName, "\r\n");
                 Length = p - SubVendorName;
                 if (Length >= sizeof(bSubVendorName)) Length = sizeof(bSubVendorName) - 1;
                 strncpy(bSubVendorName, SubVendorName, Length);
                 bSubVendorName[Length] = '\0';
             }
         }
     }
 
     /* Print out the data */
     DbgPrint("%02x:%02x.%x %s [%02x%02x]: %s %s [%04x:%04x] (rev %02x)\n"
              "\tSubsystem: %s [%04x:%04x]\n",
              i,
              j,
              k,
              bSubClassName,
              PciData->BaseClass,
              PciData->SubClass,
              bVendorName,
              bProductName,
              PciData->VendorID,
              PciData->DeviceID,
              PciData->RevisionID,
              bSubVendorName,
              PciData->u.type0.SubVendorID,
              PciData->u.type0.SubSystemID);
 
     /* Print out and decode flags */
     DbgPrint("\tFlags:");
     if (PciData->Command & PCI_ENABLE_BUS_MASTER) DbgPrint(" bus master,");
     if (PciData->Status & PCI_STATUS_66MHZ_CAPABLE) DbgPrint(" 66MHz,");
     if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x000) DbgPrint(" fast devsel,");
     if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x200) DbgPrint(" medium devsel,");
     if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x400) DbgPrint(" slow devsel,");
     if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x600) DbgPrint(" unknown devsel,");
     DbgPrint(" latency %d", PciData->LatencyTimer);
     if (PciData->u.type0.InterruptPin != 0 &&
         PciData->u.type0.InterruptLine != 0 &&
         PciData->u.type0.InterruptLine != 0xFF) DbgPrint(", IRQ %02d", PciData->u.type0.InterruptLine);
     else if (PciData->u.type0.InterruptPin != 0) DbgPrint(", IRQ assignment required");
     DbgPrint("\n");
 
     /* Scan addresses */
     Size = 0;
     for (b = 0; b < PCI_TYPE0_ADDRESSES; b++)
     {
         /* Check for a BAR */
         Mem = PciData->u.type0.BaseAddresses[b];
         if (Mem)
         {
             /* Decode the address type */
             if (Mem & PCI_ADDRESS_IO_SPACE)
             {
                 /* Guess the size */
                 Size = 1 << 2;
                 while (!(Mem & Size) && (Size)) Size <<= 1;
 
                 /* Print it out */
                 DbgPrint("\tI/O ports at %04lx", Mem & PCI_ADDRESS_IO_ADDRESS_MASK);
                 ShowSize(Size);
             }
             else
             {
                 /* Guess the size */
                 Size = 1 << 8;
                 while (!(Mem & Size) && (Size)) Size <<= 1;
 
                 /* Print it out */
                 DbgPrint("\tMemory at %08lx (%d-bit, %sprefetchable)",
                          Mem & PCI_ADDRESS_MEMORY_ADDRESS_MASK,
                          (Mem & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_32BIT ? 32 : 64,
                          (Mem & PCI_ADDRESS_MEMORY_PREFETCHABLE) ? "" : "non-");
                 ShowSize(Size);
             }
         }
     }
 }

Referenced by HalpInitializePciBus().

◆ HalpDismissIrq07()

BOOLEAN NTAPI HalpDismissIrq07	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 853 of file pic.c.

 {
     I8259_OCW3 Ocw3;
     I8259_ISR Isr;
 
     /* Request the ISR */
     Ocw3.Bits = 0;
     Ocw3.Sbo = 1;
     Ocw3.ReadRequest = ReadIsr;
     __outbyte(PIC1_CONTROL_PORT, Ocw3.Bits);
 
     /* Read the ISR */
     Isr.Bits = __inbyte(PIC1_CONTROL_PORT);
 
     /* Is IRQ 7 really active? If it isn't, this is spurious so fail */
     if (Isr.Irq7 == FALSE) return FALSE;
 
     /* Do normal interrupt dismiss */
     return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
 }

◆ HalpDismissIrq07Level()

BOOLEAN NTAPI HalpDismissIrq07Level	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 995 of file pic.c.

 {
     I8259_OCW3 Ocw3;
     I8259_ISR Isr;
 
     /* Request the ISR */
     Ocw3.Bits = 0;
     Ocw3.Sbo = 1;
     Ocw3.ReadRequest = ReadIsr;
     __outbyte(PIC1_CONTROL_PORT, Ocw3.Bits);
 
     /* Read the ISR */
     Isr.Bits = __inbyte(PIC1_CONTROL_PORT);
 
     /* Is IRQ 7 really active? If it isn't, this is spurious so fail */
     if (Isr.Irq7 == FALSE) return FALSE;
 
     /* Do normal interrupt dismiss */
     return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
 }

◆ HalpDismissIrq13()

BOOLEAN NTAPI HalpDismissIrq13	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 840 of file pic.c.

 {
     /* Clear the FPU busy latch */
     __outbyte(0xF0, 0);
 
     /* Do normal interrupt dismiss */
     return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
 }

◆ HalpDismissIrq13Level()

BOOLEAN NTAPI HalpDismissIrq13Level	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 982 of file pic.c.

 {
     /* Clear the FPU busy latch */
     __outbyte(0xF0, 0);
 
     /* Do normal interrupt dismiss */
     return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
 }

◆ HalpDismissIrq15()

BOOLEAN NTAPI HalpDismissIrq15	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 804 of file pic.c.

 {
     I8259_OCW3 Ocw3;
     I8259_OCW2 Ocw2;
     I8259_ISR Isr;
 
     /* Request the ISR */
     Ocw3.Bits = 0;
     Ocw3.Sbo = 1; /* This encodes an OCW3 vs. an OCW2 */
     Ocw3.ReadRequest = ReadIsr;
     __outbyte(PIC2_CONTROL_PORT, Ocw3.Bits);
 
     /* Read the ISR */
     Isr.Bits = __inbyte(PIC2_CONTROL_PORT);
 
     /* Is IRQ15 really active (this is IR7) */
     if (Isr.Irq7 == FALSE)
     {
         /* It isn't, so we have to EOI IRQ2 because this was cascaded */
         Ocw2.Bits = 0;
         Ocw2.EoiMode = SpecificEoi;
         __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | 2);
 
         /* And now fail since this was spurious */
         return FALSE;
     }
 
     /* Do normal interrupt dismiss */
     return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
 }

◆ HalpDismissIrq15Level()

BOOLEAN NTAPI HalpDismissIrq15Level	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 947 of file pic.c.

 {
     I8259_OCW3 Ocw3;
     I8259_OCW2 Ocw2;
     I8259_ISR Isr;
 
     /* Request the ISR */
     Ocw3.Bits = 0;
     Ocw3.Sbo = 1; /* This encodes an OCW3 vs. an OCW2 */
     Ocw3.ReadRequest = ReadIsr;
     __outbyte(PIC2_CONTROL_PORT, Ocw3.Bits);
 
     /* Read the ISR */
     Isr.Bits = __inbyte(PIC2_CONTROL_PORT);
 
     /* Is IRQ15 really active (this is IR7) */
     if (Isr.Irq7 == FALSE)
     {
         /* It isn't, so we have to EOI IRQ2 because this was cascaded */
         Ocw2.Bits = 0;
         Ocw2.EoiMode = SpecificEoi;
         __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | 2);
 
         /* And now fail since this was spurious */
         return FALSE;
     }
 
     /* Do normal interrupt dismiss */
     return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
 }

◆ HalpDismissIrqGeneric()

BOOLEAN NTAPI HalpDismissIrqGeneric	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 794 of file pic.c.

 {
     /* Run the inline code */
     return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
 }

◆ HalpDismissIrqLevel()

BOOLEAN NTAPI HalpDismissIrqLevel	(	IN KIRQL	Irql,
		IN ULONG	Irq,
		OUT PKIRQL	OldIrql
	)

Definition at line 937 of file pic.c.

 {
     /* Run the inline code */
     return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
 }

◆ HalpDispatchInterrupt()

VOID __cdecl HalpDispatchInterrupt ( VOID )

Referenced by HalpInitializePICs().

◆ HalpDispatchInterrupt2()

PHAL_SW_INTERRUPT_HANDLER __cdecl HalpDispatchInterrupt2 ( VOID )

Definition at line 1304 of file pic.c.

 {
     ULONG PendingIrqlMask, PendingIrql;
     KIRQL OldIrql;
     PIC_MASK Mask;
     PKPCR Pcr = KeGetPcr();
 
     /* Do the work */
     OldIrql = _HalpDispatchInterruptHandler();
 
     /* Restore IRQL */
     Pcr->Irql = OldIrql;
 
     /* Check for pending software interrupts and compare with current IRQL */
     PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[OldIrql];
     if (PendingIrqlMask)
     {
         /* Check if pending IRQL affects hardware state */
         BitScanReverse(&PendingIrql, PendingIrqlMask);
         if (PendingIrql > DISPATCH_LEVEL)
         {
             /* Set new PIC mask */
             Mask.Both = Pcr->IDR & 0xFFFF;
             __outbyte(PIC1_DATA_PORT, Mask.Master);
             __outbyte(PIC2_DATA_PORT, Mask.Slave);
 
             /* Clear IRR bit */
             Pcr->IRR ^= (1 << PendingIrql);
         }
 
         /* Now handle pending interrupt */
         return SWInterruptHandlerTable[PendingIrql];
     }
 
     return NULL;
 }

◆ HalpDispatchInterrupt2ndEntry()

DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry ( IN PKTRAP_FRAME TrapFrame )

Definition at line 1288 of file pic.c.

 {
     KIRQL CurrentIrql;
 
     /* Do the work */
     CurrentIrql = _HalpDispatchInterruptHandler();
 
     /* End the interrupt */
     HalpEndSoftwareInterrupt(CurrentIrql, TrapFrame);
 
     /* Exit the interrupt */
     KiEoiHelper(TrapFrame);
 }

◆ HalpEnableInterruptHandler()

INIT_FUNCTION VOID NTAPI HalpEnableInterruptHandler	(	IN UCHAR	Flags,
		IN ULONG	BusVector,
		IN ULONG	SystemVector,
		IN KIRQL	Irql,
		IN PVOID	Handler,
		IN KINTERRUPT_MODE	Mode
	)

Definition at line 49 of file usage.c.

 {
     /* Register the routine */
     ((PKIPCR)KeGetPcr())->InterruptRoutine[Irql] = Handler;
 }

Referenced by HalInitSystem(), HalpInitPhase0(), and HalpInitPhase1().

◆ HalpExitToV86()

VOID FASTCALL HalpExitToV86 ( PKTRAP_FRAME TrapFrame )

Referenced by HalpBiosCall().

◆ HalpFlushTLB()

VOID NTAPI HalpFlushTLB ( VOID )

Definition at line 163 of file misc.c.

 {
     ULONG_PTR Flags, Cr4;
     INT CpuInfo[4];
     ULONG_PTR PageDirectory;
 
     //
     // Disable interrupts
     //
     Flags = __readeflags();
     _disable();
 
     //
     // Get page table directory base
     //
     PageDirectory = __readcr3();
 
     //
     // Check for CPUID support
     //
     if (KeGetCurrentPrcb()->CpuID)
     {
         //
         // Check for global bit in CPU features
         //
         __cpuid(CpuInfo, 1);
         if (CpuInfo[3] & 0x2000)
         {
             //
             // Get current CR4 value
             //
             Cr4 = __readcr4();
 
             //
             // Disable global bit
             //
             __writecr4(Cr4 & ~CR4_PGE);
 
             //
             // Flush TLB and re-enable global bit
             //
             __writecr3(PageDirectory);
             __writecr4(Cr4);
 
             //
             // Restore interrupts
             //
             __writeeflags(Flags);
             return;
         }
     }
 
     //
     // Legacy: just flush TLB
     //
     __writecr3(PageDirectory);
     __writeeflags(Flags);
 }

Referenced by HalpMapPhysicalMemory64Vista(), HalpMapRealModeMemory(), HalpUnmapRealModeMemory(), and HalpUnmapVirtualAddressVista().

◆ HalpGetDebugPortTable()

INIT_FUNCTION BOOLEAN NTAPI HalpGetDebugPortTable ( VOID )

Definition at line 952 of file halacpi.c.

 {
     return ((HalpDebugPortTable) &&
             (HalpDebugPortTable->BaseAddress.AddressSpaceID == 1));
 }

Referenced by HalpReportResourceUsage().

◆ HalpGetNMICrashFlag()

INIT_FUNCTION VOID NTAPI HalpGetNMICrashFlag ( VOID )

Definition at line 571 of file usage.c.

 {
     UNICODE_STRING ValueName;
     UNICODE_STRING KeyName = RTL_CONSTANT_STRING(L"\\Registry\\Machine\\System\\CurrentControlSet\\Control\\CrashControl");
     OBJECT_ATTRIBUTES ObjectAttributes;
     ULONG ResultLength;
     HANDLE Handle;
     NTSTATUS Status;
     KEY_VALUE_PARTIAL_INFORMATION KeyValueInformation;
 
     /* Set default */
     HalpNMIDumpFlag = 0;
 
     /* Initialize attributes */
     InitializeObjectAttributes(&ObjectAttributes,
                                &KeyName,
                                OBJ_CASE_INSENSITIVE,
                                NULL,
                                NULL);
 
     /* Open crash key */
     Status = ZwOpenKey(&Handle, KEY_READ, &ObjectAttributes);
     if (NT_SUCCESS(Status))
     {
         /* Query key value */
         RtlInitUnicodeString(&ValueName, L"NMICrashDump");
         Status = ZwQueryValueKey(Handle,
                                  &ValueName,
                                  KeyValuePartialInformation,
                                  &KeyValueInformation,
                                  sizeof(KeyValueInformation),
                                  &ResultLength);
         if (NT_SUCCESS(Status))
         {
             /* Check for valid data */
             if (ResultLength == sizeof(KEY_VALUE_PARTIAL_INFORMATION))
             {
                 /* Read the flag */
                 HalpNMIDumpFlag = KeyValueInformation.Data[0];
             }
         }
 
         /* We're done */
         ZwClose(Handle);
     }
 }

Referenced by HalpInitializePciBus().

◆ HalpHardwareInterruptLevel()

VOID __cdecl HalpHardwareInterruptLevel ( VOID )

Referenced by HalEnableSystemInterrupt(), and HalpInitializePICs().

◆ HalpInitBusHandlers()

INIT_FUNCTION VOID NTAPI HalpInitBusHandlers ( VOID )

Definition at line 935 of file halacpi.c.

 {
     /* On ACPI, we only have a fake PCI bus to worry about */
     HalpInitNonBusHandler();
 }

Referenced by HalInitSystem().

◆ HalpInitDma()

INIT_FUNCTION VOID HalpInitDma ( VOID )

Definition at line 121 of file dma.c.

 {
    /*
     * Initialize the DMA Operation table
     */
    HalpDmaOperations.AllocateAdapterChannel = (PALLOCATE_ADAPTER_CHANNEL)IoAllocateAdapterChannel;
    HalpDmaOperations.FlushAdapterBuffers = (PFLUSH_ADAPTER_BUFFERS)IoFlushAdapterBuffers;
    HalpDmaOperations.FreeAdapterChannel = (PFREE_ADAPTER_CHANNEL)IoFreeAdapterChannel;
    HalpDmaOperations.FreeMapRegisters = (PFREE_MAP_REGISTERS)IoFreeMapRegisters;
    HalpDmaOperations.MapTransfer = (PMAP_TRANSFER)IoMapTransfer;
 
    /*
     * Check if Extended DMA is available. We're just going to do a random
     * read and write.
     */
 
    WRITE_PORT_UCHAR((PUCHAR)FIELD_OFFSET(EISA_CONTROL, DmaController2Pages.Channel2), 0x2A);
    if (READ_PORT_UCHAR((PUCHAR)FIELD_OFFSET(EISA_CONTROL, DmaController2Pages.Channel2)) == 0x2A)
       HalpEisaDma = TRUE;
 
    /*
     * Intialize all the global variables and allocate master adapter with
     * first map buffers.
     */
 
    InitializeListHead(&HalpDmaAdapterList);
    KeInitializeEvent(&HalpDmaLock, NotificationEvent, TRUE);
 
    HalpMasterAdapter = HalpDmaAllocateMasterAdapter();
 
    /*
     * Setup the HalDispatchTable callback for creating PnP DMA adapters. It's
     * used by IoGetDmaAdapter in the kernel.
     */
 
    HalGetDmaAdapter = HalpGetDmaAdapter;
 }

Referenced by HalInitSystem(), and HalpInitPhase1().

◆ HalpInitializeClock()

INIT_FUNCTION VOID NTAPI HalpInitializeClock ( VOID )

Definition at line 54 of file timer.c.

 {
     PKIPCR Pcr = (PKIPCR)KeGetPcr();
     ULONG ClockInterval;
     SP804_CONTROL_REGISTER ControlRegister;
     
     /* Setup the clock and profile interrupt */
     Pcr->InterruptRoutine[CLOCK2_LEVEL] = HalpStallInterrupt;
     
     /*
      * Configure the interval to 10ms
      * (INTERVAL (10ms) * TIMCLKfreq (1MHz))
      * --------------------------------------- == 10^4
      *  (TIMCLKENXdiv (1) * PRESCALEdiv (1))
      */
     ClockInterval = 0x2710;
     
     /* Configure the timer */
     ControlRegister.AsUlong = 0;
     ControlRegister.Wide = TRUE;
     ControlRegister.Periodic = TRUE;
     ControlRegister.Interrupt = TRUE;
     ControlRegister.Enabled = TRUE;
     
     /* Enable the timer */
     WRITE_REGISTER_ULONG(TIMER0_LOAD, ClockInterval);
     WRITE_REGISTER_ULONG(TIMER0_CONTROL, ControlRegister.AsUlong);
 }

Referenced by HalInitSystem().

◆ HalpInitializeCmos()

INIT_FUNCTION VOID NTAPI HalpInitializeCmos ( VOID )

Definition at line 160 of file cmos.c.

 {
     /* Set default century offset byte */
     HalpCmosCenturyOffset = 50;
 
     /* No support for EISA or MCA */
     ASSERT(HalpBusType == MACHINE_TYPE_ISA);
 }

Referenced by HalInitSystem().

◆ HalpInitializeLegacyPICs()

VOID NTAPI HalpInitializeLegacyPICs ( VOID )

Definition at line 18 of file pic.c.

 {
     I8259_ICW1 Icw1;
     I8259_ICW2 Icw2;
     I8259_ICW3 Icw3;
     I8259_ICW4 Icw4;
 
     ASSERT(!(__readeflags() & EFLAGS_INTERRUPT_MASK));
 
     /* Initialize ICW1 for master, interval 8, edge-triggered mode with ICW4 */
     Icw1.NeedIcw4 = TRUE;
     Icw1.OperatingMode = Cascade;
     Icw1.Interval = Interval8;
     Icw1.InterruptMode = EdgeTriggered;
     Icw1.Init = TRUE;
     Icw1.InterruptVectorAddress = 0;
     __outbyte(PIC1_CONTROL_PORT, Icw1.Bits);
 
     /* ICW2 - interrupt vector offset */
     Icw2.Bits = PRIMARY_VECTOR_BASE;
     __outbyte(PIC1_DATA_PORT, Icw2.Bits);
 
     /* Connect slave to IRQ 2 */
     Icw3.Bits = 0;
     Icw3.SlaveIrq2 = TRUE;
     __outbyte(PIC1_DATA_PORT, Icw3.Bits);
 
     /* Enable 8086 mode, non-automatic EOI, non-buffered mode, non special fully nested mode */
     Icw4.SystemMode = New8086Mode;
     Icw4.EoiMode = NormalEoi;
     Icw4.BufferedMode = NonBuffered;
     Icw4.SpecialFullyNestedMode = FALSE;
     Icw4.Reserved = 0;
     __outbyte(PIC1_DATA_PORT, Icw4.Bits);
 
     /* Mask all interrupts */
     __outbyte(PIC1_DATA_PORT, 0xFF);
 
     /* Initialize ICW1 for slave, interval 8, edge-triggered mode with ICW4 */
     Icw1.NeedIcw4 = TRUE;
     Icw1.InterruptMode = EdgeTriggered;
     Icw1.OperatingMode = Cascade;
     Icw1.Interval = Interval8;
     Icw1.Init = TRUE;
     Icw1.InterruptVectorAddress = 0; /* This is only used in MCS80/85 mode */
     __outbyte(PIC2_CONTROL_PORT, Icw1.Bits);
 
     /* Set interrupt vector base */
     Icw2.Bits = PRIMARY_VECTOR_BASE + 8;
     __outbyte(PIC2_DATA_PORT, Icw2.Bits);
 
     /* Slave ID */
     Icw3.Bits = 0;
     Icw3.SlaveId = 2;
     __outbyte(PIC2_DATA_PORT, Icw3.Bits);
 
     /* Enable 8086 mode, non-automatic EOI, non-buffered mode, non special fully nested mode */
     Icw4.SystemMode = New8086Mode;
     Icw4.EoiMode = NormalEoi;
     Icw4.BufferedMode = NonBuffered;
     Icw4.SpecialFullyNestedMode = FALSE;
     Icw4.Reserved = 0;
     __outbyte(PIC2_DATA_PORT, Icw4.Bits);
 
     /* Mask all interrupts */
     __outbyte(PIC2_DATA_PORT, 0xFF);
 }

Referenced by HalpInitializePICs().

◆ HalpInitializePICs()

VOID NTAPI HalpInitializePICs ( IN BOOLEAN EnableInterrupts )

Definition at line 445 of file apic.c.

 {
     ULONG_PTR EFlags;
 
     /* Save EFlags and disable interrupts */
     EFlags = __readeflags();
     _disable();
 
     /* Initialize and mask the PIC */
     HalpInitializeLegacyPICs();
 
     /* Initialize the I/O APIC */
     ApicInitializeIOApic();
 
     /* Manually reserve some vectors */
     HalpVectorToIndex[APIC_CLOCK_VECTOR] = 8;
     HalpVectorToIndex[APC_VECTOR] = 99;
     HalpVectorToIndex[DISPATCH_VECTOR] = 99;
 
     /* Set interrupt handlers in the IDT */
     KeRegisterInterruptHandler(APIC_CLOCK_VECTOR, HalpClockInterrupt);
 #ifndef _M_AMD64
     KeRegisterInterruptHandler(APC_VECTOR, HalpApcInterrupt);
     KeRegisterInterruptHandler(DISPATCH_VECTOR, HalpDispatchInterrupt);
 #endif
 
     /* Register the vectors for APC and dispatch interrupts */
     HalpRegisterVector(IDT_INTERNAL, 0, APC_VECTOR, APC_LEVEL);
     HalpRegisterVector(IDT_INTERNAL, 0, DISPATCH_VECTOR, DISPATCH_LEVEL);
 
     /* Restore interrupt state */
     if (EnableInterrupts) EFlags |= EFLAGS_INTERRUPT_MASK;
     __writeeflags(EFlags);
 }

Referenced by HalInitSystem().

◆ HalpInitPciBus()

VOID HalpInitPciBus ( VOID )

◆ HalpInitPhase0()

VOID HalpInitPhase0 ( PLOADER_PARAMETER_BLOCK LoaderBlock )

Definition at line 31 of file halinit_mp.c.

 {
    static BOOLEAN MPSInitialized = FALSE;
 
 
    /* Only initialize MP system once. Once called the first time,
       each subsequent call is part of the initialization sequence
       for an application processor. */
 
    DPRINT("HalpInitPhase0()\n");
 
 
    if (MPSInitialized)
    {
       ASSERT(FALSE);
    }
 
    MPSInitialized = TRUE;
 
    if (!HaliFindSmpConfig())
    {
       ASSERT(FALSE);
    }
 
    /* store the kernel base for later use */
    KernelBase = (ULONG_PTR)CONTAINING_RECORD(LoaderBlock->LoadOrderListHead.Flink, LDR_DATA_TABLE_ENTRY, InLoadOrderLinks)->DllBase;
 
 }

◆ HalpInitPhase1()

VOID HalpInitPhase1 ( VOID )

Definition at line 26 of file halinit_up.c.

 {
 
 }

◆ HalpInitProcessor()

VOID NTAPI HalpInitProcessor	(	IN ULONG	ProcessorNumber,
		IN PLOADER_PARAMETER_BLOCK	LoaderBlock
	)

Definition at line 28 of file halinit_apic.c.

 {
     /* Initialize the local APIC for this cpu */
     ApicInitializeLocalApic(ProcessorNumber);
 
     /* Initialize profiling data (but don't start it) */
     HalInitializeProfiling();
 
     /* Initialize the timer */
     //ApicInitializeTimer(ProcessorNumber);
 
 }

Referenced by HalInitializeProcessor().

◆ HalpIs16BitPortDecodeSupported()

INIT_FUNCTION ULONG NTAPI HalpIs16BitPortDecodeSupported ( VOID )

Definition at line 961 of file halacpi.c.

 {
     /* All ACPI systems are at least "EISA" so they support this */
     return CM_RESOURCE_PORT_16_BIT_DECODE;
 }

Referenced by HalpBuildPartialFromAddress().

◆ HalpMapPhysicalMemory64()

PVOID NTAPI HalpMapPhysicalMemory64	(	IN PHYSICAL_ADDRESS	PhysicalAddress,
		IN PFN_COUNT	PageCount
	)

Definition at line 28 of file misc.c.

 {
     /* Use kernel memory manager I/O map facilities */
     return MmMapIoSpace(PhysicalAddress,
                         NumberPage << PAGE_SHIFT,
                         MmNonCached);
 }

Referenced by HalpAcpiCopyBiosTable(), HalpAcpiFindRsdtPhase0(), HalpAcpiGetTableFromBios(), HalpAcpiTableCacheInit(), HalpReboot(), HalpRegisterKdSupportFunctions(), and HalpSetupAcpiPhase0().

◆ HalpMapPhysicalMemory64Vista()

PVOID NTAPI HalpMapPhysicalMemory64Vista	(	IN PHYSICAL_ADDRESS	PhysicalAddress,
		IN PFN_COUNT	PageCount,
		IN BOOLEAN	FlushCurrentTLB
	)

Definition at line 156 of file memory.c.

 {
     PHARDWARE_PTE PointerPte;
     PFN_NUMBER UsedPages = 0;
     PVOID VirtualAddress, BaseAddress;
 
     /* Start at the current HAL heap base */
     BaseAddress = HalpHeapStart;
     VirtualAddress = BaseAddress;
 
     /* Loop until we have all the pages required */
     while (UsedPages < PageCount)
     {
         /* If this overflows past the HAL heap, it means there's no space */
         if (VirtualAddress == NULL) return NULL;
 
         /* Get the PTE for this address */
         PointerPte = HalAddressToPte(VirtualAddress);
 
         /* Go to the next page */
         VirtualAddress = (PVOID)((ULONG_PTR)VirtualAddress + PAGE_SIZE);
 
         /* Check if the page is available */
         if (PointerPte->Valid)
         {
             /* PTE has data, skip it and start with a new base address */
             BaseAddress = VirtualAddress;
             UsedPages = 0;
             continue;
         }
 
         /* PTE is available, keep going on this run */
         UsedPages++;
     }
 
     /* Take the base address of the page plus the actual offset in the address */
     VirtualAddress = (PVOID)((ULONG_PTR)BaseAddress +
                              BYTE_OFFSET(PhysicalAddress.LowPart));
 
     /* If we are starting at the heap, move the heap */
     if (BaseAddress == HalpHeapStart)
     {
         /* Past this allocation */
         HalpHeapStart = (PVOID)((ULONG_PTR)BaseAddress + (PageCount * PAGE_SIZE));
     }
 
     /* Loop pages that can be mapped */
     while (UsedPages--)
     {
         /* Fill out the PTE */
         PointerPte = HalAddressToPte(BaseAddress);
         PointerPte->PageFrameNumber = (PFN_NUMBER)(PhysicalAddress.QuadPart >> PAGE_SHIFT);
         PointerPte->Valid = 1;
         PointerPte->Write = 1;
 
         /* Move to the next address */
         PhysicalAddress.QuadPart += PAGE_SIZE;
         BaseAddress = (PVOID)((ULONG_PTR)BaseAddress + PAGE_SIZE);
     }
 
     /* Flush the TLB and return the address */
     if (FlushCurrentTLB)
         HalpFlushTLB();
 
     return VirtualAddress;
 }

Referenced by HalpMapPhysicalMemory64(), and HalpRegisterKdSupportFunctions().

◆ HalpMarkAcpiHal()

INIT_FUNCTION NTSTATUS NTAPI HalpMarkAcpiHal ( VOID )

Definition at line 64 of file misc.c.

 {
     NTSTATUS Status;
     UNICODE_STRING KeyString;
     HANDLE KeyHandle;
     HANDLE Handle;
     ULONG Value = HalDisableFirmwareMapper ? 1 : 0;
 
     /* Open the control set key */
     RtlInitUnicodeString(&KeyString,
                          L"\\REGISTRY\\MACHINE\\SYSTEM\\CURRENTCONTROLSET");
     Status = HalpOpenRegistryKey(&Handle, 0, &KeyString, KEY_ALL_ACCESS, FALSE);
     if (NT_SUCCESS(Status))
     {
         /* Open the PNP key */
         RtlInitUnicodeString(&KeyString, L"Control\\Pnp");
         Status = HalpOpenRegistryKey(&KeyHandle,
                                      Handle,
                                      &KeyString,
                                      KEY_ALL_ACCESS,
                                      TRUE);
         /* Close root key */
         ZwClose(Handle);
 
         /* Check if PNP BIOS key exists */
         if (NT_SUCCESS(Status))
         {
             /* Set the disable value to false -- we need the mapper */
             RtlInitUnicodeString(&KeyString, L"DisableFirmwareMapper");
             Status = ZwSetValueKey(KeyHandle,
                                    &KeyString,
                                    0,
                                    REG_DWORD,
                                    &Value,
                                    sizeof(Value));
 
             /* Close subkey */
             ZwClose(KeyHandle);
         }
     }
 
     /* Return status */
     return Status;
 }

Referenced by HalpReportResourceUsage().

◆ HalpOpenRegistryKey()

NTSTATUS NTAPI HalpOpenRegistryKey	(	IN PHANDLE	KeyHandle,
		IN HANDLE	RootKey,
		IN PUNICODE_STRING	KeyName,
		IN ACCESS_MASK	DesiredAccess,
		IN BOOLEAN	Create
	)

Definition at line 111 of file misc.c.

 {
     NTSTATUS Status;
     ULONG Disposition;
     OBJECT_ATTRIBUTES ObjectAttributes;
 
     /* Setup the attributes we received */
     InitializeObjectAttributes(&ObjectAttributes,
                                KeyName,
                                OBJ_CASE_INSENSITIVE,
                                RootKey,
                                NULL);
 
     /* What to do? */
     if ( Create )
     {
         /* Create the key */
         Status = ZwCreateKey(KeyHandle,
                              DesiredAccess,
                              &ObjectAttributes,
                              0,
                              NULL,
                              REG_OPTION_VOLATILE,
                              &Disposition);
     }
     else
     {
         /* Open the key */
         Status = ZwOpenKey(KeyHandle, DesiredAccess, &ObjectAttributes);
     }
 
     /* We're done */
     return Status;
 }

Referenced by HalpMarkAcpiHal(), HalpMarkChipsetDecode(), and HalpReportSerialNumber().

◆ HalpProfileInterrupt()

VOID __cdecl HalpProfileInterrupt ( VOID )

◆ HalpQueryAcpiResourceRequirements()

NTSTATUS NTAPI HalpQueryAcpiResourceRequirements ( OUT PIO_RESOURCE_REQUIREMENTS_LIST * Requirements )

Definition at line 1016 of file halacpi.c.

 {
     PIO_RESOURCE_REQUIREMENTS_LIST RequirementsList;
     ULONG Count = 0, ListSize;
     NTSTATUS Status;
     PAGED_CODE();
 
     /* Get ACPI resources */
     HalpAcpiDetectResourceListSize(&Count);
     DPRINT("Resource count: %d\n", Count);
 
     /* Compute size of the list and allocate it */
     ListSize = FIELD_OFFSET(IO_RESOURCE_REQUIREMENTS_LIST, List[0].Descriptors) +
                (Count * sizeof(IO_RESOURCE_DESCRIPTOR));
     DPRINT("Resource list size: %d\n", ListSize);
     RequirementsList = ExAllocatePoolWithTag(PagedPool, ListSize, TAG_HAL);
     if (RequirementsList)
     {
         /* Initialize it */
         RtlZeroMemory(RequirementsList, ListSize);
         RequirementsList->ListSize = ListSize;
 
         /* Build it */
         Status = HalpBuildAcpiResourceList(RequirementsList);
         if (NT_SUCCESS(Status))
         {
             /* It worked, return it */
             *Requirements = RequirementsList;
 
             /* Validate the list */
             ASSERT(RequirementsList->List[0].Count == Count);
         }
         else
         {
             /* Fail */
             ExFreePoolWithTag(RequirementsList, TAG_HAL);
             Status = STATUS_NO_SUCH_DEVICE;
         }
     }
     else
     {
         /* Not enough memory */
         Status = STATUS_INSUFFICIENT_RESOURCES;
     }
 
     /* Return the status */
     return Status;
 }

Referenced by HalpQueryResourceRequirements(), and HalpQueryResources().

◆ HalpReadCmos()

UCHAR NTAPI HalpReadCmos ( IN UCHAR Reg )

Definition at line 24 of file cmos.c.

 {
     /* Select the register */
     WRITE_PORT_UCHAR(CMOS_CONTROL_PORT, Reg);
 
     /* Query the value */
     return READ_PORT_UCHAR(CMOS_DATA_PORT);
 }

Referenced by HalGetEnvironmentVariable(), HalpClockInterruptHandler(), HalpGetCmosData(), HalpInitializeClock(), HalpInitializeTsc(), HalQueryRealTimeClock(), HalSetEnvironmentVariable(), HalSetRealTimeClock(), HalStartProfileInterrupt(), HalStopProfileInterrupt(), and RtcSetClockRate().

◆ HalpRealModeStart()

VOID __cdecl HalpRealModeStart ( VOID )

Referenced by HalpBiosCall(), and HalpMapRealModeMemory().

◆ HalpRegisterKdSupportFunctions()

INIT_FUNCTION VOID NTAPI HalpRegisterKdSupportFunctions ( VOID )

Definition at line 23 of file bus.c.

 {
     /* Register PCI Device Functions */
     KdSetupPciDeviceForDebugging = HalpSetupPciDeviceForDebugging;
     KdReleasePciDeviceforDebugging = HalpReleasePciDeviceForDebugging;
 
     /* Register memory functions */
     KdMapPhysicalMemory64 = HalpMapPhysicalMemory64;
     KdUnmapVirtualAddress = HalpUnmapVirtualAddress;
 
     /* Register ACPI stub */
     KdCheckPowerButton = HalpCheckPowerButton;
 }

Referenced by HalInitializeProcessor().

◆ HalpRegisterVector()

INIT_FUNCTION VOID NTAPI HalpRegisterVector	(	IN UCHAR	Flags,
		IN ULONG	BusVector,
		IN ULONG	SystemVector,
		IN KIRQL	Irql
	)

Definition at line 34 of file usage.c.

 {
     /* Save the vector flags */
     HalpIDTUsageFlags[SystemVector].Flags = Flags;
 
     /* Save the vector data */
     HalpIDTUsage[SystemVector].Irql  = Irql;
     HalpIDTUsage[SystemVector].BusReleativeVector = BusVector;
 }

Referenced by HalpEnableInterruptHandler(), HalpInitializePICs(), and HalpReportResourceUsage().

◆ HalpReleaseCmosSpinLock()

VOID NTAPI HalpReleaseCmosSpinLock ( VOID )

Definition at line 244 of file spinlock.c.

 {
     ULONG_PTR Flags;
 
     /* Get the flags */
     Flags = HalpSystemHardwareFlags;
 
     /* Release the lock */
     KxReleaseSpinLock(&HalpSystemHardwareLock);
 
     /* Restore the flags */
     __writeeflags(Flags);
 }

Referenced by HalGetEnvironmentVariable(), HalMakeBeep(), HalpGetCmosData(), HalpInitializeClock(), HalpSetCmosData(), HalQueryRealTimeClock(), HalSetEnvironmentVariable(), HalSetRealTimeClock(), HalStartProfileInterrupt(), HalStopProfileInterrupt(), and RtcSetClockRate().

◆ HalpReleasePciDeviceForDebugging()

INIT_FUNCTION NTSTATUS NTAPI HalpReleasePciDeviceForDebugging ( IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice )

Definition at line 482 of file pci.c.

 {
     DPRINT1("Unimplemented!\n");
     return STATUS_NOT_IMPLEMENTED;
 }

Referenced by HalpRegisterKdSupportFunctions().

◆ HalpReportResourceUsage()

INIT_FUNCTION VOID NTAPI HalpReportResourceUsage	(	IN PUNICODE_STRING	HalName,
		IN INTERFACE_TYPE	InterfaceType
	)

Definition at line 26 of file usage.c.

 {
     DbgPrint("%wZ has been initialized\n", HalName);
 }

Referenced by HalReportResourceUsage().

◆ HalpReportSerialNumber()

INIT_FUNCTION VOID NTAPI HalpReportSerialNumber ( VOID )

Definition at line 33 of file misc.c.

 {
     NTSTATUS Status;
     UNICODE_STRING KeyString;
     HANDLE Handle;
 
     /* Make sure there is a serial number */
     if (!HalpSerialLen) return;
 
     /* Open the system key */
     RtlInitUnicodeString(&KeyString, L"\\Registry\\Machine\\Hardware\\Description\\System");
     Status = HalpOpenRegistryKey(&Handle, 0, &KeyString, KEY_ALL_ACCESS, FALSE);
     if (NT_SUCCESS(Status))
     {
         /* Add the serial number */
         RtlInitUnicodeString(&KeyString, L"Serial Number");
         ZwSetValueKey(Handle,
                       &KeyString,
                       0,
                       REG_BINARY,
                       HalpSerialNumber,
                       HalpSerialLen);
 
         /* Close the handle */
         ZwClose(Handle);
     }
 }

Referenced by HalpReportResourceUsage().

◆ HalpSetupPciDeviceForDebugging()

INIT_FUNCTION NTSTATUS NTAPI HalpSetupPciDeviceForDebugging	(	IN PVOID	LoaderBlock,
		IN OUT PDEBUG_DEVICE_DESCRIPTOR	PciDevice
	)

Definition at line 473 of file pci.c.

 {
     DPRINT1("Unimplemented!\n");
     return STATUS_NOT_IMPLEMENTED;
 }

Referenced by HalpRegisterKdSupportFunctions().

◆ HalpUnmapVirtualAddress()

VOID NTAPI HalpUnmapVirtualAddress	(	IN PVOID	VirtualAddress,
		IN PFN_COUNT	NumberPages
	)

Definition at line 39 of file misc.c.

 {
     /* Use kernel memory manager I/O map facilities */
     MmUnmapIoSpace(VirtualAddress, NumberPages << PAGE_SHIFT);
 }

Referenced by HalpAcpiGetTable(), HalpAcpiGetTableFromBios(), HalpAcpiTableCacheInit(), and HalpRegisterKdSupportFunctions().

◆ HalpUnmapVirtualAddressVista()

VOID NTAPI HalpUnmapVirtualAddressVista	(	IN PVOID	VirtualAddress,
		IN PFN_COUNT	NumberPages,
		IN BOOLEAN	FlushCurrentTLB
	)

Definition at line 227 of file memory.c.

 {
     PHARDWARE_PTE PointerPte;
     ULONG i;
 
     /* Only accept valid addresses */
     if (VirtualAddress < (PVOID)MM_HAL_VA_START) return;
 
     /* Align it down to page size */
     VirtualAddress = (PVOID)((ULONG_PTR)VirtualAddress & ~(PAGE_SIZE - 1));
 
     /* Loop PTEs */
     PointerPte = HalAddressToPte(VirtualAddress);
     for (i = 0; i < PageCount; i++)
     {
         *(PULONG)PointerPte = 0;
         PointerPte++;
     }
 
     /* Flush the TLB */
     if (FlushCurrentTLB)
         HalpFlushTLB();
 
     /* Put the heap back */
     if (HalpHeapStart > VirtualAddress) HalpHeapStart = VirtualAddress;
 }

Referenced by HalpRegisterKdSupportFunctions(), and HalpUnmapVirtualAddress().

◆ HalpWriteCmos()

VOID NTAPI HalpWriteCmos	(	IN UCHAR	Reg,
		IN UCHAR	Value
	)

Definition at line 35 of file cmos.c.

 {
     /* Select the register */
     WRITE_PORT_UCHAR(CMOS_CONTROL_PORT, Reg);
 
     /* Write the value */
     WRITE_PORT_UCHAR(CMOS_DATA_PORT, Value);
 }

Referenced by HalpInitializeClock(), HalpInitializeTsc(), HalpSetCmosData(), HalSetEnvironmentVariable(), HalSetRealTimeClock(), HalStartProfileInterrupt(), HalStopProfileInterrupt(), and RtcSetClockRate().

◆ KeUpdateSystemTime()

VOID FASTCALL KeUpdateSystemTime	(	IN PKTRAP_FRAME	TrapFrame,
		IN ULONG	Increment,
		IN KIRQL	OldIrql
	)

Definition at line 64 of file time.c.

 {
     PKPRCB Prcb = KeGetCurrentPrcb();
     ULARGE_INTEGER CurrentTime, InterruptTime;
     LONG OldTickOffset;
 
     /* Check if this tick is being skipped */
     if (Prcb->SkipTick)
     {
         /* Handle it next time */
         Prcb->SkipTick = FALSE;
 
         /* Increase interrupt count and end the interrupt */
         Prcb->InterruptCount++;
         KiEndInterrupt(Irql, TrapFrame);
 
         /* Note: non-x86 return back to the caller! */
         return;
     }
 
     /* Add the increment time to the shared data */
     InterruptTime.QuadPart = *(ULONGLONG*)&SharedUserData->InterruptTime;
     InterruptTime.QuadPart += Increment;
     KiWriteSystemTime(&SharedUserData->InterruptTime, InterruptTime);
 
     /* Check for timer expiration */
     KiCheckForTimerExpiration(Prcb, TrapFrame, InterruptTime);
 
     /* Update the tick offset */
     OldTickOffset = InterlockedExchangeAdd(&KiTickOffset, -(LONG)Increment);
 
     /* If the debugger is enabled, check for break-in request */
     if (KdDebuggerEnabled && KdPollBreakIn())
     {
         /* Break-in requested! */
         DbgBreakPointWithStatus(DBG_STATUS_CONTROL_C);
     }
 
     /* Check for full tick */
     if (OldTickOffset <= (LONG)Increment)
     {
         /* Update the system time */
         CurrentTime.QuadPart = *(ULONGLONG*)&SharedUserData->SystemTime;
         CurrentTime.QuadPart += KeTimeAdjustment;
         KiWriteSystemTime(&SharedUserData->SystemTime, CurrentTime);
 
         /* Update the tick count */
         CurrentTime.QuadPart = (*(ULONGLONG*)&KeTickCount) + 1;
         KiWriteSystemTime(&KeTickCount, CurrentTime);
 
         /* Update it in the shared user data */
         KiWriteSystemTime(&SharedUserData->TickCount, CurrentTime);
 
         /* Check for expiration with the new tick count as well */
         KiCheckForTimerExpiration(Prcb, TrapFrame, InterruptTime);
 
         /* Reset the tick offset */
         KiTickOffset += KeMaximumIncrement;
 
         /* Update processor/thread runtime */
         KeUpdateRunTime(TrapFrame, Irql);
     }
     else
     {
         /* Increase interrupt count only */
         Prcb->InterruptCount++;
     }
 
     /* Disable interrupts and end the interrupt */
     KiEndInterrupt(Irql, TrapFrame);
 }

Variable Documentation

◆ HalDisableFirmwareMapper

BOOLEAN HalDisableFirmwareMapper

Definition at line 43 of file halacpi.c.

Referenced by HalpMarkAcpiHal().

◆ HalHardwareIdString

PWCHAR HalHardwareIdString

Definition at line 44 of file halacpi.c.

Referenced by HalpQueryIdFdo().

◆ HalName

PWCHAR HalName

Definition at line 45 of file halacpi.c.

Referenced by HalpReportResourceUsage(), HalReportResourceUsage(), MiBuildImportsForBootDrivers(), and MmGetSystemRoutineAddress().

◆ HalpActiveProcessors

KAFFINITY HalpActiveProcessors

Definition at line 17 of file processor.c.

Referenced by HalInitializeProcessor(), and HalpBuildPartialFromIdt().

◆ HalpAddressUsageList

PADDRESS_USAGE HalpAddressUsageList

Definition at line 59 of file usage.c.

Referenced by HalInitSystem(), and HalpReportResourceUsage().

◆ HalpBuildType

const USHORT HalpBuildType

Definition at line 22 of file halinit_apic.c.

Referenced by HalInitSystem().

◆ HalpDefaultInterruptAffinity

KAFFINITY HalpDefaultInterruptAffinity

Definition at line 18 of file processor.c.

Referenced by HalInitializeProcessor(), and HalpGetRootInterruptVector().

◆ HalpDefaultIoSpace

ADDRESS_USAGE HalpDefaultIoSpace

Definition at line 81 of file usage.c.

Referenced by HalInitSystem().

◆ HalpIDTUsageFlags

IDTUsageFlags HalpIDTUsageFlags[MAXIMUM_IDTVECTOR+1]

Definition at line 19 of file usage.c.

Referenced by HalpBuildPartialFromIdt(), HalpGetSystemInterruptVector(), HalpRegisterVector(), and HalpReportResourceUsage().

◆ HalpNMIInProgress

BOOLEAN HalpNMIInProgress

Definition at line 22 of file misc.c.

Referenced by HalHandleNMI(), and HalpRestoreTrapHandlers().

◆ HalpPerfCounter

LARGE_INTEGER HalpPerfCounter

Definition at line 25 of file timer.c.

Referenced by KeQueryPerformanceCounter().

◆ HalpProfilingStopped

BOOLEAN HalpProfilingStopped

Definition at line 18 of file profil.c.

Referenced by HalSetProfileInterval(), HalStartProfileInterrupt(), and HalStopProfileInterrupt().

◆ HalpSystemHardwareLock

KSPIN_LOCK HalpSystemHardwareLock

Definition at line 18 of file cmos.c.

Referenced by HalInitSystem(), HalpAcquireCmosSpinLock(), and HalpReleaseCmosSpinLock().

Variables
BOOLEAN	HalpProfilingStopped

BOOLEAN	HalpNMIInProgress

ADDRESS_USAGE	HalpDefaultIoSpace

KSPIN_LOCK	HalpSystemHardwareLock

PADDRESS_USAGE	HalpAddressUsageList

LARGE_INTEGER	HalpPerfCounter

KAFFINITY	HalpActiveProcessors

BOOLEAN	HalDisableFirmwareMapper

PWCHAR	HalHardwareIdString

PWCHAR	HalName

KAFFINITY	HalpDefaultInterruptAffinity

IDTUsageFlags	HalpIDTUsageFlags [MAXIMUM_IDTVECTOR+1]

const USHORT	HalpBuildType

Classes

Macros

Typedefs

Enumerations

Functions

Variables

Macro Definition Documentation

◆ BCD_INT

◆ CMOS_CONTROL_PORT

◆ CMOS_DATA_PORT

◆ EISA_ELCR_MASTER

◆ EISA_ELCR_SLAVE

◆ GRAPHICS_MODE_12

◆ HAL_APC_REQUEST

◆ HAL_BUILD_TYPE

◆ HAL_DPC_REQUEST

◆ HAL_PROFILING_INTERVAL

◆ HAL_PROFILING_MULTIPLIER

◆ HalAddressToPde

◆ HalAddressToPte

◆ HALP_CARD_FEATURE_FULL_DECODE

◆ HALP_CHECK_CARD_REVISION_ID

◆ HALP_CHECK_CARD_SUBSYSTEM_ID

◆ HALP_CHECK_CARD_SUBVENDOR_ID

◆ HALP_HACK_FLAGS

◆ HALP_REVISION_FROM_HACK_FLAGS

◆ HALP_REVISION_HACK_FLAGS

◆ IDT_DEVICE

◆ IDT_INTERNAL

◆ IDT_LATCHED

◆ IDT_READ_ONLY

◆ IDT_REGISTERED

◆ INT_BCD

◆ PIC1_CONTROL_PORT

◆ PIC1_DATA_PORT

◆ PIC2_CONTROL_PORT

◆ PIC2_DATA_PORT

◆ PIT_FREQUENCY

◆ RTC_REG_A_UIP

◆ RTC_REG_B_PI

◆ RTC_REG_C_IRQ

◆ RTC_REGISTER_A

◆ RTC_REGISTER_B

◆ RTC_REGISTER_C

◆ RTC_REGISTER_CENTURY

◆ RTC_REGISTER_D

◆ SET_VIDEO_MODE

◆ SYSTEM_CONTROL_PORT_A

◆ SYSTEM_CONTROL_PORT_B

◆ TIMER_CHANNEL0_DATA_PORT

◆ TIMER_CHANNEL1_DATA_PORT

◆ TIMER_CHANNEL2_DATA_PORT

◆ TIMER_CONTROL_PORT

◆ VIDEO_SERVICES

Typedef Documentation

◆ ADDRESS_USAGE

◆ EISA_ELCR

◆ HAL_BIOS_FRAME

◆ I8259_EOI_MODE

◆ I8259_ICW1

◆ I8259_ICW1_INTERRUPT_MODE

◆ I8259_ICW1_INTERVAL

◆ I8259_ICW1_OPERATING_MODE

◆ I8259_ICW2

◆ I8259_ICW3

◆ I8259_ICW4

◆ I8259_ICW4_BUFFERED_MODE

◆ I8259_ICW4_EOI_MODE

◆ I8259_ICW4_SYSTEM_MODE

◆ I8259_IDR

◆ I8259_ISR

◆ I8259_OCW2

◆ I8259_OCW3

◆ I8259_READ_REQUEST

◆ IDTUsageFlags

◆ PADDRESS_USAGE

◆ PEISA_ELCR

◆ PHAL_BIOS_FRAME

◆ PHAL_DISMISS_INTERRUPT

◆ PHAL_SW_INTERRUPT_HANDLER