123 ParentBusInterfaceType,
244 L"\\REGISTRY\\MACHINE\\SYSTEM\\CURRENTCONTROLSET");
358 DbgPrint(
"HAL: Unnkown PCI type\n");
388 if (((PciHeader->u.type0.InterruptPin) &&
389 (PciHeader->u.type0.InterruptPin > 4)) ||
390 (PciHeader->u.type0.InterruptLine & 0x70))
400 Address = PciHeader->u.type0.BaseAddresses[
i];
445 L"\\REGISTRY\\MACHINE\\SYSTEM\\CURRENTCONTROLSET\\"
469 DbgPrint(
"\tFound HackFlags for your chipset\n");
471 DbgPrint(
"\t\tHack Flags: %lx (Hack Revision: %lx-Your Revision: %lx)\n",
502 ElementCount = PciRegistryInfo->ElementCount;
503 if (!ElementCount)
return FALSE;
506 CardDescriptor = &PciRegistryInfo->CardList[0];
507 for (
i = 0;
i < ElementCount;
i++, CardDescriptor++)
513 if ((CardDescriptor->
VendorID != PciData->VendorID) ||
514 (CardDescriptor->
DeviceID != PciData->DeviceID))
522 (CardDescriptor->
RevisionID != PciData->RevisionID))
550 (CardDescriptor->
SubsystemID != PciData->u.type0.SubSystemID))
586 if (PciData->VendorID == 0x1C1C)
return TRUE;
589 if ((PciData->VendorID == 0x10B9) &&
590 ((PciData->DeviceID == 0x5215) || (PciData->DeviceID == 0x5219)))
596 if ((PciData->VendorID == 0x1097) && (PciData->DeviceID == 0x38))
return TRUE;
599 if ((PciData->VendorID == 0xE11) && (PciData->DeviceID == 0xAE33))
return TRUE;
602 if ((PciData->VendorID == 0x1042) && (PciData->DeviceID == 0x1000))
return TRUE;
605 if ((PciData->VendorID == 0x1039) &&
606 ((PciData->DeviceID == 0x601) || (PciData->DeviceID == 0x5513)))
612 if ((PciData->VendorID == 0x10AD) &&
613 ((PciData->DeviceID == 0x1) || (PciData->DeviceID == 0x150)))
619 if ((PciData->VendorID == 0x1060) && (PciData->DeviceID == 0x101))
return TRUE;
652 PciSlot.
u.
bits.Reserved = 0;
653 for (
i = 0;
i < *BusCount;
i++)
662 PciSlot.
u.
bits.DeviceNumber =
j;
666 PciSlot.
u.
bits.FunctionNumber =
k;
682 if (!
WarningsGiven[2]++)
DPRINT1(
"Your machine has a PCI-to-PCI or CardBUS Bridge. PCI devices may fail!\n");
701 for (
i = 0;
i < BusCount;
i++)
711 if (!
WarningsGiven[0]++)
DPRINT1(
"Found parent bus (indicating PCI Bridge). PCI devices may fail!\n");
719 for (
i = 0;
i < BusCount;
i++)
735 if (!
WarningsGiven[1]++)
DPRINT1(
"Found parent PCI Bus (indicating PCI-to-PCI Bridge). PCI devices may fail!\n");
745 for (
i = 0;
i < BusCount;
i++)
751 DPRINT(
"Warning: Bus addresses not being optimized!\n");
766 else if (
x < 1048576)
770 else if (
x < 0x80000000)
785#include "pci_classes.h"
786#include "pci_vendors.h"
797 PCHAR p, ClassName, Boundary, SubClassName,
VendorName, ProductName, SubVendorName;
800 CHAR LookupString[16] =
"";
801 CHAR bSubClassName[64] =
"Unknown";
802 CHAR bVendorName[64] =
"";
803 CHAR bProductName[128] =
"Unknown device";
804 CHAR bSubVendorName[128] =
"Unknown";
807 HeaderType = (PciData->HeaderType & ~PCI_MULTIFUNCTION);
810 sprintf(LookupString,
"C %02x ", PciData->BaseClass);
811 ClassName =
strstr((
PCHAR)ClassTable, LookupString);
815 ClassName +=
strlen(
"C 00 ");
816 Boundary =
strstr(ClassName,
"\nC ");
817 sprintf(LookupString,
"\n\t%02x ", PciData->SubClass);
818 SubClassName =
strstr(ClassName, LookupString);
819 if (Boundary && SubClassName > Boundary)
825 SubClassName = ClassName;
829 SubClassName +=
strlen(
"\n\t00 ");
834 if (
Length >=
sizeof(bSubClassName))
Length =
sizeof(bSubClassName) - 1;
836 bSubClassName[
Length] =
'\0';
840 sprintf(LookupString,
"\r\n%04x ", PciData->VendorID);
848 if (
Length >=
sizeof(bVendorName))
Length =
sizeof(bVendorName) - 1;
850 bVendorName[
Length] =
'\0';
852 while (*
p ==
'\t' || *
p ==
'#')
860 sprintf(LookupString,
"\t%04x ", PciData->DeviceID);
862 if (Boundary && ProductName >= Boundary)
869 ProductName +=
strlen(
"\t0000 ");
872 if (
Length >=
sizeof(bProductName))
Length =
sizeof(bProductName) - 1;
874 bProductName[
Length] =
'\0';
876 while ((*
p ==
'\t' && *(
p + 1) ==
'\t') || *
p ==
'#')
882 SubVendorName =
NULL;
889 PciData->u.type0.SubVendorID,
890 PciData->u.type0.SubSystemID);
891 SubVendorName =
strstr(ProductName, LookupString);
892 if (Boundary && SubVendorName >= Boundary)
894 SubVendorName =
NULL;
900 SubVendorName +=
strlen(
"\t\t0000 0000 ");
903 if (
Length >=
sizeof(bSubVendorName))
Length =
sizeof(bSubVendorName) - 1;
905 bSubVendorName[
Length] =
'\0';
911 DbgPrint(
"%02x:%02x.%x %s [%02x%02x]: %s %s [%04x:%04x] (rev %02x)\n",
922 PciData->RevisionID);
926 DbgPrint(
"\tSubsystem: %s [%04x:%04x]\n",
928 PciData->u.type0.SubVendorID,
929 PciData->u.type0.SubSystemID);
940 DbgPrint(
" latency %d", PciData->LatencyTimer);
941 if (PciData->u.type0.InterruptPin != 0 &&
942 PciData->u.type0.InterruptLine != 0 &&
943 PciData->u.type0.InterruptLine != 0xFF)
DbgPrint(
", IRQ %02d", PciData->u.type0.InterruptLine);
944 else if (PciData->u.type0.InterruptPin != 0)
DbgPrint(
", IRQ assignment required");
950 DbgPrint(
" primary bus %d,", PciData->u.type1.PrimaryBus);
951 DbgPrint(
" secondary bus %d,", PciData->u.type1.SecondaryBus);
952 DbgPrint(
" subordinate bus %d,", PciData->u.type1.SubordinateBus);
953 DbgPrint(
" secondary latency %d", PciData->u.type1.SecondaryLatency);
963 Mem = PciData->u.type0.BaseAddresses[
b];
968 ULONG PciBar = 0xFFFFFFFF;
1004 DbgPrint(
"\tMemory at %08lx (%d-bit, %sprefetchable)",
1035 if (!PciRegistryInfo)
return;
1044 if ((PciRegistryInfo->
NoBuses) && (PciType == 2))
1047 PciSlot.
u.
bits.Reserved = 0;
1048 PciSlot.
u.
bits.FunctionNumber = 0;
1051 for (
i = 0;
i < 32;
i++)
1056 if (!BusHandler)
break;
1064 if (!BusHandler)
break;
1081 for (
i = 0;
i < PciRegistryInfo->
NoBuses;
i++)
1097 DbgPrint(
"\n====== PCI BUS HARDWARE DETECTION =======\n\n");
1098 PciSlot.
u.
bits.Reserved = 0;
1099 for (
i = 0;
i < PciRegistryInfo->
NoBuses;
i++)
1105 for (
j = 0;
j < 32;
j++)
1108 PciSlot.
u.
bits.DeviceNumber =
j;
1109 for (
k = 0;
k < 8;
k++)
1112 PciSlot.
u.
bits.FunctionNumber =
k;
1131 DbgPrint(
"\tDevice is a PCI Cardbus Bridge. It will not work!\n");
1139 if ((PciData->u.type1.InterruptPin) &&
1140 (PciData->u.type1.InterruptLine))
1143 if (PciData->u.type1.InterruptLine < 16)
1149 DbgPrint(
"\tDevice is using IRQ %d! ISA Cards using that IRQ may fail!\n",
1150 PciData->u.type1.InterruptLine);
1158 if (PciData->VendorID == 0x8086)
1161 if ((PciData->DeviceID == 0x04A3) &&
1162 (PciData->RevisionID < 0x11))
1165 DbgPrint(
"\tDevice is a broken Intel 82430 PCI Controller. It will not work!\n\n");
1170 if ((PciData->DeviceID == 0x0484) &&
1171 (PciData->RevisionID <= 3))
1174 DbgPrint(
"\tDevice is a broken Intel 82378 PCI-to-ISA Bridge. It will not work!\n\n");
1179 if ((PciData->DeviceID == 0x84C4) &&
1180 (PciData->RevisionID <= 4))
1182 DbgPrint(
"\tDevice is a Intel Orion 82450 PCI Bridge. It will not work!\n\n");
1188 if (!ExtendedAddressDecoding)
1196 DbgPrint(
"\tDevice has Extended Address Decoding. It may fail to work on older BIOSes!\n");
1197 ExtendedAddressDecoding =
TRUE;
1204 PciData->RevisionID,
1211 DbgPrint(
"This chipset has broken ACPI IRQ Routing! Be aware!\n\n");
1218 DbgPrint(
"This chipset has a broken ACPI timer! Be aware!\n\n");
1225 DbgPrint(
"This chipset has a broken PCI device which is incompatible with hibernation. Be aware!\n\n");
1232 DbgPrint(
"This chipset has a USB controller which generates SMIs. ReactOS will likely fail to boot!\n\n");
1251 DbgPrint(
"====== PCI BUS DETECTION COMPLETE =======\n\n");
1276#if (NTDDI_VERSION >= NTDDI_VISTA)
1357 if (ContextValue) NextEntry = NextEntry->
Flink;
1379 NextEntry = NextEntry->
Flink;
1446 (*ResourceList)->BusNumber);
1592 DPRINT1(
"Returning IRQL %lx, Vector %lx for Level/Vector: %lx/%lx\n",
1594 DPRINT1(
"Old HAL would've returned IRQL %lx and Vector %lx\n",
static const char VendorName[]
char * strstr(char *String1, char *String2)
ACPI_SIZE strlen(const char *String)
char * strncpy(char *DstString, const char *SrcString, ACPI_SIZE Count)
char * strpbrk(const char *String, const char *Delimiters)
ACPI_PHYSICAL_ADDRESS ACPI_SIZE BOOLEAN Warn UINT32 *TableIdx UINT32 ACPI_TABLE_HEADER *OutTableHeader ACPI_TABLE_HEADER **OutTable ACPI_HANDLE UINT32 ACPI_WALK_CALLBACK ACPI_WALK_CALLBACK void void **ReturnValue UINT32 ACPI_BUFFER *RetPathPtr ACPI_OBJECT_HANDLER Handler
#define PCI_TYPE1_DATA_PORT
#define PCI_TYPE1_ADDRESS_PORT
PBUS_HANDLER FASTCALL HaliReferenceHandlerForConfigSpace(IN BUS_DATA_TYPE ConfigType, IN ULONG BusNumber)
ULONG NTAPI HalpGetPCIIntOnISABus(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG BusInterruptLevel, IN ULONG BusInterruptVector, OUT PKIRQL Irql, OUT PKAFFINITY Affinity)
NTSTATUS NTAPI HalpAssignPCISlotResources(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PUNICODE_STRING RegistryPath, IN PUNICODE_STRING DriverClassName OPTIONAL, IN PDRIVER_OBJECT DriverObject, IN PDEVICE_OBJECT DeviceObject OPTIONAL, IN ULONG Slot, IN OUT PCM_RESOURCE_LIST *pAllocatedResources)
VOID NTAPI HalpPCIPin2ISALine(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PPCI_COMMON_CONFIG PciData)
ULONG NTAPI HalpNoBusData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
#define PCI_TYPE2_ADDRESS_BASE
#define PCI_TYPE2_CSE_PORT
ULONG NTAPI HalpcSetCmosData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
BOOLEAN NTAPI HalpTranslateIsaBusAddress(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
VOID NTAPI HalpPCIISALine2Pin(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PPCI_COMMON_CONFIG PciNewData, IN PPCI_COMMON_CONFIG PciOldData)
NTSTATUS NTAPI HalpAdjustPCIResourceList(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *pResourceList)
NTSTATUS NTAPI HalpGetISAFixedPCIIrq(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER PciSlot, OUT PSUPPORTED_RANGE *Range)
PCI_CONFIG_HANDLER PCIConfigHandler
VOID NTAPI HalpWritePCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
PCI_CONFIG_HANDLER PCIConfigHandlerType1
VOID NTAPI HalpReadPCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
VOID NTAPI HalpInitBusHandler(VOID)
PBUS_HANDLER NTAPI HalpContextToBusHandler(IN ULONG_PTR ContextValue)
ULONG NTAPI HalpcGetCmosData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
PPCI_REGISTRY_INFO_INTERNAL NTAPI HalpQueryPciRegistryInfo(VOID)
PCI_CONFIG_HANDLER PCIConfigHandlerType2
ULONG NTAPI HalpGetPCIData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootBusHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
BOOLEAN NTAPI HalpTranslateSystemBusAddress(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
ULONG NTAPI HalpGetSystemInterruptVector(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG BusInterruptLevel, IN ULONG BusInterruptVector, OUT PKIRQL Irql, OUT PKAFFINITY Affinity)
LIST_ENTRY HalpAllBusHandlers
#define PCI_TYPE2_FORWARD_PORT
ULONG NTAPI HalpSetPCIData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootBusHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
struct _PCIPBUSDATA * PPCIPBUSDATA
NTSTATUS NTAPI HalAdjustResourceList(IN PIO_RESOURCE_REQUIREMENTS_LIST *ResourceList)
BOOLEAN NTAPI HalpIsIdeDevice(IN PPCI_COMMON_CONFIG PciData)
ULONG NTAPI HalSetBusDataByOffset(IN BUS_DATA_TYPE BusDataType, IN ULONG BusNumber, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
BOOLEAN NTAPI HalpGetPciBridgeConfig(IN ULONG PciType, IN PUCHAR BusCount)
KSPIN_LOCK HalpPCIConfigLock
VOID NTAPI HalpRegisterKdSupportFunctions(VOID)
BOOLEAN NTAPI HalpIsValidPCIDevice(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot)
VOID NTAPI HalpInitializePciBus(VOID)
BOOLEAN NTAPI HalpIsRecognizedCard(IN PPCI_REGISTRY_INFO_INTERNAL PciRegistryInfo, IN PPCI_COMMON_CONFIG PciData, IN ULONG Flags)
BOOLEAN NTAPI HalpIsBridgeDevice(IN PPCI_COMMON_CONFIG PciData)
NTSTATUS NTAPI HalpMarkChipsetDecode(IN BOOLEAN OverrideEnable)
VOID NTAPI HalpRegisterInternalBusHandlers(VOID)
static BOOLEAN WarningsGiven[5]
VOID NTAPI HalpDebugPciDumpBus(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER PciSlot, IN ULONG i, IN ULONG j, IN ULONG k, IN PPCI_COMMON_CONFIG PciData)
NTSTATUS NTAPI HalpAssignSlotResources(IN PUNICODE_STRING RegistryPath, IN PUNICODE_STRING DriverClassName, IN PDRIVER_OBJECT DriverObject, IN PDEVICE_OBJECT DeviceObject, IN INTERFACE_TYPE BusType, IN ULONG BusNumber, IN ULONG SlotNumber, IN OUT PCM_RESOURCE_LIST *AllocatedResources)
VOID NTAPI HalpInitBusHandlers(VOID)
NTSTATUS NTAPI HalAssignSlotResources(IN PUNICODE_STRING RegistryPath, IN PUNICODE_STRING DriverClassName, IN PDRIVER_OBJECT DriverObject, IN PDEVICE_OBJECT DeviceObject, IN INTERFACE_TYPE BusType, IN ULONG BusNumber, IN ULONG SlotNumber, IN OUT PCM_RESOURCE_LIST *AllocatedResources)
VOID NTAPI ShowSize(IN ULONG Size)
PBUS_HANDLER NTAPI HalpAllocateAndInitPciBusHandler(IN ULONG PciType, IN ULONG BusNo, IN BOOLEAN TestAllocation)
PBUS_HANDLER NTAPI HalpAllocateBusHandler(IN INTERFACE_TYPE InterfaceType, IN BUS_DATA_TYPE BusDataType, IN ULONG BusNumber, IN INTERFACE_TYPE ParentBusInterfaceType, IN ULONG ParentBusNumber, IN ULONG BusSpecificData)
NTSTATUS NTAPI HalpGetChipHacks(IN USHORT VendorId, IN USHORT DeviceId, IN UCHAR RevisionId, IN PULONG HackFlags)
BOOLEAN NTAPI HaliFindBusAddressTranslation(IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress, IN OUT PULONG_PTR Context, IN BOOLEAN NextBus)
BOOLEAN NTAPI HalTranslateBusAddress(IN INTERFACE_TYPE InterfaceType, IN ULONG BusNumber, IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
BOOLEAN NTAPI HaliTranslateBusAddress(IN INTERFACE_TYPE InterfaceType, IN ULONG BusNumber, IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
VOID NTAPI HalpFixupPciSupportedRanges(IN ULONG BusCount)
ULONG NTAPI HalGetBusDataByOffset(IN BUS_DATA_TYPE BusDataType, IN ULONG BusNumber, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
ULONG NTAPI HalGetInterruptVector(IN INTERFACE_TYPE InterfaceType, IN ULONG BusNumber, IN ULONG BusInterruptLevel, IN ULONG BusInterruptVector, OUT PKIRQL Irql, OUT PKAFFINITY Affinity)
ULONG NTAPI HalGetBusData(IN BUS_DATA_TYPE BusDataType, IN ULONG BusNumber, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Length)
ULONG NTAPI HalSetBusData(IN BUS_DATA_TYPE BusDataType, IN ULONG BusNumber, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Length)
IN PUNICODE_STRING IN POBJECT_ATTRIBUTES ObjectAttributes
#define NT_SUCCESS(StatCode)
#define ExAllocatePoolWithTag(hernya, size, tag)
#define KeInitializeSpinLock(sl)
GLint GLint GLint GLint GLint x
GLboolean GLboolean GLboolean b
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble * u
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint GLint GLint j
PVOID NTAPI HalpMapPhysicalMemory64Vista(IN PHYSICAL_ADDRESS PhysicalAddress, IN PFN_COUNT PageCount, IN BOOLEAN FlushCurrentTLB)
VOID NTAPI HalpUnmapVirtualAddress(IN PVOID VirtualAddress, IN PFN_COUNT PageCount)
VOID NTAPI HalpUnmapVirtualAddressVista(IN PVOID VirtualAddress, IN PFN_COUNT PageCount, IN BOOLEAN FlushCurrentTLB)
PVOID NTAPI HalpMapPhysicalMemory64(IN PHYSICAL_ADDRESS PhysicalAddress, IN PFN_COUNT PageCount)
VOID NTAPI HalpCheckPowerButton(VOID)
NTSTATUS NTAPI HalpOpenRegistryKey(IN PHANDLE KeyHandle, IN HANDLE RootKey, IN PUNICODE_STRING KeyName, IN ACCESS_MASK DesiredAccess, IN BOOLEAN Create)
VOID NTAPI HalpGetNMICrashFlag(VOID)
#define VECTOR2IRQL(vector)
#define HALP_CHECK_CARD_REVISION_ID
#define HALP_CARD_FEATURE_FULL_DECODE
#define HALP_HACK_FLAGS(x)
#define HALP_CHECK_CARD_SUBVENDOR_ID
#define HALP_CHECK_CARD_SUBSYSTEM_ID
#define HALP_REVISION_FROM_HACK_FLAGS(x)
#define HALP_REVISION_HACK_FLAGS(x)
enum _INTERFACE_TYPE INTERFACE_TYPE
#define OBJ_CASE_INSENSITIVE
NTSYSAPI void WINAPI RtlInitializeBitMap(PRTL_BITMAP, PULONG, ULONG)
NTSTATUS NTAPI HalpReleasePciDeviceForDebugging(_Inout_ PDEBUG_DEVICE_DESCRIPTOR PciDevice)
Releases the PCI device MMIO mappings previously allocated with HalpSetupPciDeviceForDebugging().
NTSTATUS NTAPI HalpSetupPciDeviceForDebugging(_In_opt_ PVOID LoaderBlock, _Inout_ PDEBUG_DEVICE_DESCRIPTOR PciDevice)
Finds and fully initializes the PCI device associated with the supplied debug device descriptor.
#define ExFreePoolWithTag(_P, _T)
#define sprintf(buf, format,...)
#define InitializeObjectAttributes(p, n, a, r, s)
_Inout_opt_ PDEVICE_OBJECT _Inout_opt_ PDEVICE_OBJECT _Inout_opt_ PDEVICE_OBJECT _Inout_opt_ PCM_RESOURCE_LIST * AllocatedResources
_Must_inspect_result_ _Out_ PNDIS_STATUS _In_ NDIS_HANDLE _In_ ULONG _Out_ PNDIS_STRING _Out_ PNDIS_HANDLE KeyHandle
FORCEINLINE struct _KPRCB * KeGetCurrentPrcb(VOID)
#define KdUnmapVirtualAddress
#define HalRegisterBusHandler
#define KdMapPhysicalMemory64
#define KdSetupPciDeviceForDebugging
#define KdReleasePciDeviceforDebugging
#define KdCheckPowerButton
#define HalPciTranslateBusAddress
#define HalPciAssignSlotResources
#define HAL_PCI_CHIP_HACK_BROKEN_ACPI_TIMER
#define HAL_PCI_CHIP_HACK_DISABLE_ACPI_IRQ_ROUTING
#define HAL_PCI_CHIP_HACK_USB_SMI_DISABLE
#define HAL_PCI_CHIP_HACK_DISABLE_HIBERNATE
#define HAL_SUPPORTED_RANGE_VERSION
NTSYSAPI NTSTATUS NTAPI ZwClose(_In_ HANDLE Handle)
@ KeyValuePartialInformation
NTSYSAPI VOID NTAPI RtlInitUnicodeString(PUNICODE_STRING DestinationString, PCWSTR SourceString)
_In_ ULONG _In_ ULONG Offset
_In_ ULONG _In_ ULONG _In_ ULONG Length
_In_opt_ PENTER_STATE_SYSTEM_HANDLER _In_opt_ PVOID _In_ LONG _In_opt_ LONG volatile * Number
@ ConfigurationSpaceUndefined
enum _BUS_DATA_TYPE BUS_DATA_TYPE
PGETINTERRUPTVECTOR GetInterruptVector
PGETSETBUSDATA GetBusData
PSUPPORTED_RANGES BusAddresses
PTRANSLATEBUSADDRESS TranslateBusAddress
PASSIGNSLOTRESOURCES AssignSlotResources
struct _BUS_HANDLER * ParentHandler
PGETSETBUSDATA SetBusData
INTERFACE_TYPE InterfaceType
PADJUSTRESOURCELIST AdjustResourceList
struct _LIST_ENTRY * Flink
PciReadWriteConfig WriteConfig
PciReadWriteConfig ReadConfig
ULONG ConfiguredBits[PCI_MAX_DEVICES *PCI_MAX_FUNCTION/32]
union _PCIPBUSDATA::@1460 Config
struct _PCIPBUSDATA::@1460::@1462 Type2
RTL_BITMAP DeviceConfigured
struct _PCIPBUSDATA::@1460::@1461 Type1
struct _PCI_SLOT_NUMBER::@3820::@3821 bits
union _PCI_SLOT_NUMBER::@3820 u
SUPPORTED_RANGE PrefetchMemory
#define FIELD_OFFSET(t, f)
#define RtlCopyMemory(Destination, Source, Length)
#define RtlZeroMemory(Destination, Length)
#define CONTAINING_RECORD(address, type, field)
_In_ PDEVICE_OBJECT DeviceObject
_Must_inspect_result_ _In_ WDFDEVICE _In_ DEVICE_REGISTRY_PROPERTY _In_ ULONG _Out_ PULONG ResultLength
_Must_inspect_result_ _In_ WDFDEVICE _In_ PWDF_DEVICE_PROPERTY_DATA _In_ DEVPROPTYPE _In_ ULONG Size
_Must_inspect_result_ _In_ WDFDEVICE _In_ PCUNICODE_STRING KeyName
_Must_inspect_result_ _In_ PDRIVER_OBJECT _In_ PCUNICODE_STRING RegistryPath
_Must_inspect_result_ _In_ PDRIVER_OBJECT DriverObject
_Must_inspect_result_ _In_ WDFDEVICE _In_ LPCGUID InterfaceType
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING ValueName
_Must_inspect_result_ _In_ WDFIORESREQLIST _In_opt_ PWDF_OBJECT_ATTRIBUTES _Out_ WDFIORESLIST * ResourceList
_In_ WDFIORESREQLIST _In_ ULONG SlotNumber
_Must_inspect_result_ _In_ ULONG Flags
_In_opt_ PUNICODE_STRING DriverClassName
_In_ ULONG _In_ ULONG BusInterruptLevel
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG BusNumber
_In_ ULONG _In_ ULONG _In_ ULONG BusInterruptVector
_In_ ULONG _In_ ULONG _In_ ULONG _Out_ PKIRQL _Out_ PKAFFINITY Affinity
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE BusType
#define HalDereferenceBusHandler
#define HalReferenceHandlerForBus
_In_ ULONG _In_ PHYSICAL_ADDRESS BusAddress
_In_ ULONG _In_ PHYSICAL_ADDRESS _Inout_ PULONG _Out_ PPHYSICAL_ADDRESS TranslatedAddress
_In_ ULONG _In_ PHYSICAL_ADDRESS _Inout_ PULONG AddressSpace
#define PCI_INVALID_VENDORID
#define PCI_ADDRESS_IO_ADDRESS_MASK
#define PCI_ENABLE_BUS_MASTER
#define PCI_TYPE0_ADDRESSES
#define PCI_SUBCLASS_BR_PCI_TO_PCI
#define PCI_CLASS_MASS_STORAGE_CTLR
struct _PCI_COMMON_CONFIG * PPCI_COMMON_CONFIG
#define PCI_ADDRESS_IO_SPACE
#define PCI_CONFIGURATION_TYPE(PciData)
#define PCI_SUBCLASS_MSC_IDE_CTLR
#define PCI_TYPE1_ADDRESSES
#define PCI_STATUS_66MHZ_CAPABLE
#define PCI_STATUS_DEVSEL
#define PCI_ADDRESS_MEMORY_ADDRESS_MASK
#define PCI_COMMON_HDR_LENGTH
#define PCI_CLASS_BRIDGE_DEV
#define PCI_SUBCLASS_BR_CARDBUS
#define PCI_ADDRESS_MEMORY_PREFETCHABLE
#define PCI_ADDRESS_MEMORY_TYPE_MASK
#define PCI_CARDBUS_BRIDGE_TYPE
@ NonPagedPoolMustSucceed