ReactOS  0.4.13-dev-39-g8b6696f
pci.h
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1 /*
2  * PROJECT: ReactOS PCI Bus Driver
3  * LICENSE: BSD - See COPYING.ARM in the top level directory
4  * FILE: include/reactos/drivers/pci/pci.h
5  * PURPOSE: Internal, Shared, PCI Definitions
6  * PROGRAMMERS: ReactOS Portable Systems Group
7  */
8 
9 //
10 // PCI Hack Flags
11 //
12 #define PCI_HACK_LOCK_RESOURCES 0x0000000000000004LL
13 #define PCI_HACK_NO_ENUM_AT_ALL 0x0000000000000008LL
14 #define PCI_HACK_ENUM_NO_RESOURCE 0x0000000000000010LL
15 #define PCI_HACK_AVOID_D1D2_FOR_SLD 0x0000000000000020LL
16 #define PCI_HACK_NEVER_DISCONNECT 0x0000000000000040LL
17 #define PCI_HACK_DONT_DISABLE 0x0000000000000080LL
18 #define PCI_HACK_MULTIFUNCTION 0x0000000000000100LL
19 #define PCI_HACK_UNUSED_200 0x0000000000000200LL
20 #define PCI_HACK_IGNORE_NON_STICKY_ISA 0x0000000000000400LL
21 #define PCI_HACK_UNUSED_800 0x0000000000000800LL
22 #define PCI_HACK_DOUBLE_DECKER 0x0000000000001000LL
23 #define PCI_HACK_ONE_CHILD 0x0000000000002000LL
24 #define PCI_HACK_PRESERVE_COMMAND 0x0000000000004000LL
25 #define PCI_HACK_DEFAULT_CARDBUS_WINDOWS 0x0000000000008000LL
26 #define PCI_HACK_CB_SHARE_CMD_BITS 0x0000000000010000LL
27 #define PCI_HACK_IGNORE_ROOT_TOPOLOGY 0x0000000000020000LL
28 #define PCI_HACK_SUBTRACTIVE_DECODE 0x0000000000040000LL
29 #define PCI_HACK_NO_EXPRESS_CAP 0x0000000000080000LL
30 #define PCI_HACK_NO_ASPM_FOR_EXPRESS_LINK 0x0000000000100000LL
31 #define PCI_HACK_CLEAR_INT_DISABLE_FOR_MSI 0x0000000000200000LL
32 #define PCI_HACK_NO_SUBSYSTEM 0x0000000000400000LL
33 #define PCI_HACK_COMMAND_REWRITE 0x0000000000800000LL
34 #define PCI_HACK_AVOID_HARDWARE_ISA_BIT 0x0000000001000000LL
35 #define PCI_HACK_FORCE_BRIDGE_WINDOW_ALIGNMENT 0x0000000002000000LL
36 #define PCI_HACK_NOT_MSI_HT_CONVERTER 0x0000000004000000LL
37 #define PCI_HACK_PCI_HACK_SBR_ON_LINK_STATE_CHANGE 0x0000000008000000LL
38 #define PCI_HACK_PCI_HACK_LINK_DISABLE_ON_SLOT_PWRDN 0x0000000010000000LL
39 #define PCI_HACK_NO_PM_CAPS 0x0000000020000000LL
40 #define PCI_HACK_DONT_DISABLE_DECODES 0x0000000040000000LL
41 #define PCI_HACK_NO_SUBSYSTEM_AFTER_D3 0x0000000080000000LL
42 #define PCI_HACK_VIDEO_LEGACY_DECODE 0x0000000100000000LL
43 #define PCI_HACK_FAKE_CLASS_CODE 0x0000000200000000LL
44 #define PCI_HACK_UNUSED_40000000 0x0000000400000000LL
45 #define PCI_HACK_DISABLE_IDE_NATIVE_MODE 0x0000000800000000LL
46 #define PCI_HACK_FAIL_QUERY_REMOVE 0x0000001000000000LL
47 #define PCI_HACK_CRITICAL_DEVICE 0x0000002000000000LL
48 #define PCI_HACK_UNUSED_4000000000 0x0000004000000000LL
49 #define PCI_HACK_BROKEN_SUBTRACTIVE_DECODE 0x0000008000000000LL
50 #define PCI_HACK_NO_REVISION_AFTER_D3 0x0000010000000000LL
51 #define PCI_HACK_ENABLE_MSI_MAPPING 0x0000020000000000LL
52 #define PCI_HACK_DISABLE_PM_DOWNSTREAM_PCI_BRIDGE 0x0000040000000000LL
53 #define PCI_HACK_DISABLE_HOT_PLUG 0x0000080000000000LL
54 #define PCI_HACK_IGNORE_AER_CAPABILITY 0x0000100000000000LL
55 
56 //
57 // Bit encodes for PCI_COMMON_CONFIG.u.type1.BridgeControl
58 //
59 #define PCI_ENABLE_BRIDGE_PARITY_ERROR 0x0001
60 #define PCI_ENABLE_BRIDGE_SERR 0x0002
61 #define PCI_ENABLE_BRIDGE_ISA 0x0004
62 #define PCI_ENABLE_BRIDGE_VGA 0x0008
63 #define PCI_ENABLE_BRIDGE_MASTER_ABORT_SERR 0x0020
64 #define PCI_ASSERT_BRIDGE_RESET 0x0040
65 #define PCI_ENABLE_BRIDGE_VGA_16BIT 0x0010
66 
67 //
68 // PCI IRQ Routing Table in BIOS/Registry (Signature: PIR$)
69 //
70 #include <pshpack1.h>
71 typedef struct _PIN_INFO
72 {
76 
77 typedef struct _SLOT_INFO
78 {
85 
86 typedef struct _PCI_IRQ_ROUTING_TABLE
87 {
100 #include <poppack.h>
101 
102 //
103 // PCI Registry Information
104 //
105 typedef struct _PCI_REGISTRY_INFO
106 {
109  UCHAR NoBuses; // Number Of Buses
112 
113 //
114 // PCI Card Descriptor in Registry
115 //
116 typedef struct _PCI_CARD_DESCRIPTOR
117 {
126 
127 /* EOF */
USHORT Version
Definition: pci.h:89
#define ANYSIZE_ARRAY
Definition: typedefs.h:45
struct _PIN_INFO PIN_INFO
struct _PCI_REGISTRY_INFO PCI_REGISTRY_INFO
USHORT Reserved
Definition: pci.h:124
UCHAR HardwareMechanism
Definition: pci.h:110
UCHAR MinorRevision
Definition: pci.h:108
USHORT SubsystemVendorID
Definition: pci.h:122
USHORT SubsystemID
Definition: pci.h:123
Definition: pci.h:77
UCHAR BusNumber
Definition: pci.h:79
struct _PCI_IRQ_ROUTING_TABLE PCI_IRQ_ROUTING_TABLE
UCHAR MajorRevision
Definition: pci.h:107
UCHAR RouterDevFunc
Definition: pci.h:92
struct _PCI_CARD_DESCRIPTOR * PPCI_CARD_DESCRIPTOR
UCHAR DeviceNumber
Definition: pci.h:80
UCHAR Link
Definition: pci.h:73
_Reserved_ PVOID Reserved
Definition: winddi.h:3974
ULONG MiniportData
Definition: pci.h:95
USHORT TableSize
Definition: pci.h:90
PIN_INFO PinInfo[4]
Definition: pci.h:81
UCHAR Reserved
Definition: pci.h:83
struct _SLOT_INFO * PSLOT_INFO
UCHAR SlotNumber
Definition: pci.h:82
unsigned char UCHAR
Definition: xmlstorage.h:181
struct _PCI_IRQ_ROUTING_TABLE * PPCI_IRQ_ROUTING_TABLE
USHORT InterruptMap
Definition: pci.h:74
unsigned short USHORT
Definition: pedump.c:61
struct _PCI_CARD_DESCRIPTOR PCI_CARD_DESCRIPTOR
ULONG CompatibleRouter
Definition: pci.h:94
UCHAR NoBuses
Definition: pci.h:109
SLOT_INFO Slot[ANYSIZE_ARRAY]
Definition: pci.h:98
unsigned int ULONG
Definition: retypes.h:1
Definition: pci.h:71
struct _PCI_REGISTRY_INFO * PPCI_REGISTRY_INFO
USHORT DeviceID
Definition: pci.h:120
USHORT ExclusiveIRQs
Definition: pci.h:93
USHORT VendorID
Definition: pci.h:119
struct _SLOT_INFO SLOT_INFO
USHORT RevisionID
Definition: pci.h:121
struct _PIN_INFO * PPIN_INFO