apic.c File Reference

#include <hal.h>
#include "apicp.h"
#include <debug.h>

Include dependency graph for apic.c:

Go to the source code of this file.

Macros
#define	NDEBUG
#define	APIC_LAZY_IRQL
#define	ApicRaiseIrql   ApicSetIrql

Functions
FORCEINLINE ULONG	IOApicRead (UCHAR Register)
FORCEINLINE VOID	IOApicWrite (UCHAR Register, ULONG Value)
FORCEINLINE VOID	ApicWriteIORedirectionEntry (UCHAR Index, IOAPIC_REDIRECTION_REGISTER ReDirReg)
FORCEINLINE IOAPIC_REDIRECTION_REGISTER	ApicReadIORedirectionEntry (UCHAR Index)
FORCEINLINE VOID	ApicRequestSelfInterrupt (IN UCHAR Vector, UCHAR TriggerMode)
FORCEINLINE VOID	ApicSendEOI (void)
FORCEINLINE KIRQL	ApicGetProcessorIrql (VOID)
FORCEINLINE KIRQL	ApicGetCurrentIrql (VOID)
FORCEINLINE VOID	ApicSetIrql (KIRQL Irql)
FORCEINLINE VOID	ApicLowerIrql (KIRQL Irql)
UCHAR FASTCALL	HalpIrqToVector (UCHAR Irq)
KIRQL FASTCALL	HalpVectorToIrql (UCHAR Vector)
UCHAR FASTCALL	HalpVectorToIrq (UCHAR Vector)
VOID NTAPI	HalpSendEOI (VOID)
VOID NTAPI	ApicInitializeLocalApic (ULONG Cpu)
UCHAR NTAPI	HalpAllocateSystemInterrupt (_In_ UCHAR Irq, _In_ UCHAR Vector)
ULONG NTAPI	HalpGetRootInterruptVector (_In_ ULONG BusInterruptLevel, _In_ ULONG BusInterruptVector, _Out_ PKIRQL OutIrql, _Out_ PKAFFINITY OutAffinity)
VOID NTAPI	ApicInitializeIOApic (VOID)
VOID NTAPI	HalpInitializePICs (IN BOOLEAN EnableInterrupts)
VOID DECLSPEC_NORETURN FASTCALL	HalpApcInterruptHandler (IN PKTRAP_FRAME TrapFrame)
VOID DECLSPEC_NORETURN FASTCALL	HalpDispatchInterruptHandler (IN PKTRAP_FRAME TrapFrame)
VOID FASTCALL	HalRequestSoftwareInterrupt (IN KIRQL Irql)
VOID FASTCALL	HalClearSoftwareInterrupt (IN KIRQL Irql)
BOOLEAN NTAPI	HalEnableSystemInterrupt (IN ULONG Vector, IN KIRQL Irql, IN KINTERRUPT_MODE InterruptMode)
VOID NTAPI	HalDisableSystemInterrupt (IN ULONG Vector, IN KIRQL Irql)
BOOLEAN NTAPI	HalBeginSystemInterrupt (IN KIRQL Irql, IN ULONG Vector, OUT PKIRQL OldIrql)
VOID NTAPI	HalEndSystemInterrupt (IN KIRQL OldIrql, IN PKTRAP_FRAME TrapFrame)
KIRQL NTAPI	KeGetCurrentIrql (VOID)
VOID FASTCALL	KfLowerIrql (IN KIRQL OldIrql)
KIRQL FASTCALL	KfRaiseIrql (IN KIRQL NewIrql)
KIRQL NTAPI	KeRaiseIrqlToDpcLevel (VOID)
KIRQL NTAPI	KeRaiseIrqlToSynchLevel (VOID)

Variables
ULONG	ApicVersion
UCHAR	HalpVectorToIndex [256]
const UCHAR	HalpIRQLtoTPR [32]
const KIRQL	HalVectorToIRQL [16]

Macro Definition Documentation

APIC_LAZY_IRQL

#define APIC_LAZY_IRQL

Definition at line 22 of file apic.c.

ApicRaiseIrql

#define ApicRaiseIrql   ApicSetIrql

Definition at line 232 of file apic.c.

NDEBUG

#define NDEBUG

Definition at line 18 of file apic.c.

Function Documentation

ApicGetCurrentIrql()

FORCEINLINE KIRQL ApicGetCurrentIrql

(

VOID

)

Definition at line 206 of file apic.c.

{
#ifdef _M_AMD64
    return (KIRQL)__readcr8();
#elif defined(APIC_LAZY_IRQL)
    /* Return the field in the PCR */
    return (KIRQL)__readfsbyte(FIELD_OFFSET(KPCR, Irql));
#else
    /* Read the TPR and convert it to an IRQL */
    return TprToIrql(ApicRead(APIC_TPR));
#endif
}

Referenced by HalBeginSystemInterrupt(), HalpApcInterruptHandler(), HalpDispatchInterruptHandler(), KeGetCurrentIrql(), KfLowerIrql(), and KfRaiseIrql().

ApicGetProcessorIrql()

FORCEINLINE KIRQL ApicGetProcessorIrql

(

VOID

)

Definition at line 198 of file apic.c.

{
    /* Read the TPR and convert it to an IRQL */
    return TprToIrql(ApicRead(APIC_PPR));
}

Referenced by HalpApcInterruptHandler(), and HalpDispatchInterruptHandler().

ApicInitializeIOApic()

VOID NTAPI ApicInitializeIOApic

(

VOID

)

Definition at line 459 of file apic.c.

{
    PHARDWARE_PTE Pte;
    IOAPIC_REDIRECTION_REGISTER ReDirReg;
    UCHAR Index;
    ULONG Vector;

    /* Map the I/O Apic page */
    Pte = HalAddressToPte(IOAPIC_BASE);
    Pte->PageFrameNumber = IOAPIC_PHYS_BASE / PAGE_SIZE;
    Pte->Valid = 1;
    Pte->Write = 1;
    Pte->Owner = 1;
    Pte->CacheDisable = 1;
    Pte->Global = 1;
    _ReadWriteBarrier();

    /* Setup a redirection entry */
    ReDirReg.Vector = APIC_FREE_VECTOR;
    ReDirReg.DeliveryMode = APIC_MT_Fixed;
    ReDirReg.DestinationMode = APIC_DM_Physical;
    ReDirReg.DeliveryStatus = 0;
    ReDirReg.Polarity = 0;
    ReDirReg.RemoteIRR = 0;
    ReDirReg.TriggerMode = APIC_TGM_Edge;
    ReDirReg.Mask = 1;
    ReDirReg.Reserved = 0;
    ReDirReg.Destination = 0;

    /* Loop all table entries */
    for (Index = 0; Index < APIC_MAX_IRQ; Index++)
    {
        /* Initialize entry */
        ApicWriteIORedirectionEntry(Index, ReDirReg);
    }

    /* Init the vactor to index table */
    for (Vector = 0; Vector <= 255; Vector++)
    {
        HalpVectorToIndex[Vector] = APIC_FREE_VECTOR;
    }

    /* Enable the timer interrupt (but keep it masked) */
    ReDirReg.Vector = APIC_CLOCK_VECTOR;
    ReDirReg.DeliveryMode = APIC_MT_Fixed;
    ReDirReg.DestinationMode = APIC_DM_Physical;
    ReDirReg.TriggerMode = APIC_TGM_Edge;
    ReDirReg.Mask = 1;
    ReDirReg.Destination = ApicRead(APIC_ID);
    ApicWriteIORedirectionEntry(APIC_CLOCK_INDEX, ReDirReg);
}

Referenced by HalpInitializePICs().

ApicInitializeLocalApic()

VOID NTAPI ApicInitializeLocalApic

(

ULONG

Cpu

)

Definition at line 291 of file apic.c.

{
    APIC_BASE_ADRESS_REGISTER BaseRegister;
    APIC_SPURIOUS_INERRUPT_REGISTER SpIntRegister;
    LVT_REGISTER LvtEntry;

    /* Enable the APIC if it wasn't yet */
    BaseRegister.LongLong = __readmsr(MSR_APIC_BASE);
    BaseRegister.Enable = 1;
    BaseRegister.BootStrapCPUCore = (Cpu == 0);
    __writemsr(MSR_APIC_BASE, BaseRegister.LongLong);

    /* Set spurious vector and SoftwareEnable to 1 */
    SpIntRegister.Long = ApicRead(APIC_SIVR);
    SpIntRegister.Vector = APIC_SPURIOUS_VECTOR;
    SpIntRegister.SoftwareEnable = 1;
    SpIntRegister.FocusCPUCoreChecking = 0;
    ApicWrite(APIC_SIVR, SpIntRegister.Long);

    /* Read the version and save it globally */
    if (Cpu == 0) ApicVersion = ApicRead(APIC_VER);

    /* Set the mode to flat (max 8 CPUs supported!) */
    ApicWrite(APIC_DFR, APIC_DF_Flat);

    /* Set logical apic ID */
    ApicWrite(APIC_LDR, ApicLogicalId(Cpu) << 24);

    /* Set the spurious ISR */
    KeRegisterInterruptHandler(APIC_SPURIOUS_VECTOR, ApicSpuriousService);

    /* Create a template LVT */
    LvtEntry.Long = 0;
    LvtEntry.Vector = APIC_FREE_VECTOR;
    LvtEntry.MessageType = APIC_MT_Fixed;
    LvtEntry.DeliveryStatus = 0;
    LvtEntry.RemoteIRR = 0;
    LvtEntry.TriggerMode = APIC_TGM_Edge;
    LvtEntry.Mask = 1;
    LvtEntry.TimerMode = 0;

    /* Initialize and mask LVTs */
    ApicWrite(APIC_TMRLVTR, LvtEntry.Long);
    ApicWrite(APIC_THRMLVTR, LvtEntry.Long);
    ApicWrite(APIC_PCLVTR, LvtEntry.Long);
    ApicWrite(APIC_EXT0LVTR, LvtEntry.Long);
    ApicWrite(APIC_EXT1LVTR, LvtEntry.Long);
    ApicWrite(APIC_EXT2LVTR, LvtEntry.Long);
    ApicWrite(APIC_EXT3LVTR, LvtEntry.Long);

    /* LINT0 */
    LvtEntry.Vector = APIC_SPURIOUS_VECTOR;
    LvtEntry.MessageType = APIC_MT_ExtInt;
    ApicWrite(APIC_LINT0, LvtEntry.Long);

    /* Enable LINT1 (NMI) */
    LvtEntry.Mask = 0;
    LvtEntry.Vector = APIC_NMI_VECTOR;
    LvtEntry.MessageType = APIC_MT_NMI;
    LvtEntry.TriggerMode = APIC_TGM_Level;
    ApicWrite(APIC_LINT1, LvtEntry.Long);

    /* Enable error LVTR */
    LvtEntry.Vector = APIC_ERROR_VECTOR;
    LvtEntry.MessageType = APIC_MT_Fixed;
    ApicWrite(APIC_ERRLVTR, LvtEntry.Long);

    /* Set the IRQL from the PCR */
    ApicSetIrql(KeGetPcr()->Irql);
#ifdef APIC_LAZY_IRQL
    /* Save the new hard IRQL in the IRR field */
    KeGetPcr()->IRR = KeGetPcr()->Irql;
#endif
}

Referenced by HalpInitProcessor().

ApicLowerIrql()

FORCEINLINE VOID ApicLowerIrql

(

KIRQL

Irql

)

Definition at line 237 of file apic.c.

{
    __writefsbyte(FIELD_OFFSET(KPCR, Irql), Irql);

    /* Is the new Irql lower than set in the TPR? */
    if (Irql < KeGetPcr()->IRR)
    {
        /* Save the new hard IRQL in the IRR field */
        KeGetPcr()->IRR = Irql;

        /* Need to lower it back */
        ApicWrite(APIC_TPR, IrqlToTpr(Irql));
    }
}

Referenced by HalEndSystemInterrupt(), HalpApcInterruptHandler(), HalpDispatchInterruptHandler(), and KfLowerIrql().

ApicReadIORedirectionEntry()

FORCEINLINE IOAPIC_REDIRECTION_REGISTER ApicReadIORedirectionEntry

(

UCHAR

Index

)

Definition at line 125 of file apic.c.

{
    IOAPIC_REDIRECTION_REGISTER ReDirReg;

    ASSERT(Index < APIC_MAX_IRQ);
    ReDirReg.Long0 = IOApicRead(IOAPIC_REDTBL + 2 * Index);
    ReDirReg.Long1 = IOApicRead(IOAPIC_REDTBL + 2 * Index + 1);

    return ReDirReg;
}

Referenced by HalBeginSystemInterrupt(), and HalEnableSystemInterrupt().

ApicRequestSelfInterrupt()

FORCEINLINE VOID ApicRequestSelfInterrupt	(	IN UCHAR	Vector,
		UCHAR	TriggerMode
	)

Definition at line 139 of file apic.c.

{
    ULONG Flags;
    APIC_INTERRUPT_COMMAND_REGISTER Icr;
    APIC_INTERRUPT_COMMAND_REGISTER IcrStatus;

    /*
     * The IRR registers are spaced 16 bytes apart and hold 32 status bits each.
     * Pre-compute the register and bit that match our vector.
     */
    ULONG VectorHigh = Vector / 32;
    ULONG VectorLow = Vector % 32;
    ULONG Irr = APIC_IRR + 0x10 * VectorHigh;
    ULONG IrrBit = 1UL << VectorLow;

    /* Setup the command register */
    Icr.Long0 = 0;
    Icr.Vector = Vector;
    Icr.MessageType = APIC_MT_Fixed;
    Icr.TriggerMode = TriggerMode;
    Icr.DestinationShortHand = APIC_DSH_Self;

    /* Disable interrupts so that we can change IRR without being interrupted */
    Flags = __readeflags();
    _disable();

    /* Wait for the APIC to be idle */
    do
    {
        IcrStatus.Long0 = ApicRead(APIC_ICR0);
    } while (IcrStatus.DeliveryStatus);

    /* Write the low dword to send the interrupt */
    ApicWrite(APIC_ICR0, Icr.Long0);

    /* Wait until we see the interrupt request.
     * It will stay in requested state until we re-enable interrupts.
     */
    while (!(ApicRead(Irr) & IrrBit))
    {
        NOTHING;
    }

    /* Finally, restore the original interrupt state */
    if (Flags & EFLAGS_INTERRUPT_MASK)
    {
        _enable();
    }
}

Referenced by HalBeginSystemInterrupt(), and HalRequestSoftwareInterrupt().

ApicSendEOI()

FORCEINLINE VOID ApicSendEOI

(

void

)

Definition at line 191 of file apic.c.

{
    ApicWrite(APIC_EOI, 0);
}

Referenced by HalBeginSystemInterrupt(), HalEndSystemInterrupt(), HalpApcInterruptHandler(), HalpDispatchInterruptHandler(), and HalpSendEOI().

ApicSetIrql()

FORCEINLINE VOID ApicSetIrql

(

KIRQL

Irql

)

Definition at line 221 of file apic.c.

{
#ifdef _M_AMD64
    __writecr8(Irql);
#elif defined(APIC_LAZY_IRQL)
    __writefsbyte(FIELD_OFFSET(KPCR, Irql), Irql);
#else
    /* Convert IRQL and write the TPR */
    ApicWrite(APIC_TPR, IrqlToTpr(Irql));
#endif
}

Referenced by ApicInitializeLocalApic().

ApicWriteIORedirectionEntry()

FORCEINLINE VOID ApicWriteIORedirectionEntry	(	UCHAR	Index,
		IOAPIC_REDIRECTION_REGISTER	ReDirReg
	)

Definition at line 114 of file apic.c.

{
    ASSERT(Index < APIC_MAX_IRQ);
    IOApicWrite(IOAPIC_REDTBL + 2 * Index, ReDirReg.Long0);
    IOApicWrite(IOAPIC_REDTBL + 2 * Index + 1, ReDirReg.Long1);
}

Referenced by ApicInitializeIOApic(), HalEnableSystemInterrupt(), and HalpAllocateSystemInterrupt().

HalBeginSystemInterrupt()

BOOLEAN NTAPI HalBeginSystemInterrupt	(	IN KIRQL	Irql,
		IN ULONG	Vector,
		OUT PKIRQL	OldIrql
	)

Definition at line 747 of file apic.c.

{
    KIRQL CurrentIrql;

    /* Get the current IRQL */
    CurrentIrql = ApicGetCurrentIrql();

#ifdef APIC_LAZY_IRQL
    /* Check if this interrupt is allowed */
    if (CurrentIrql >= Irql)
    {
        IOAPIC_REDIRECTION_REGISTER RedirReg;
        UCHAR Index;

        /* It is not, set the real Irql in the TPR! */
        ApicWrite(APIC_TPR, IrqlToTpr(CurrentIrql));

        /* Save the new hard IRQL in the IRR field */
        KeGetPcr()->IRR = CurrentIrql;

        /* End this interrupt */
        ApicSendEOI();

        /* Get the irq for this vector */
        Index = HalpVectorToIndex[Vector];

        /* Check if it's valid */
        if (Index < APIC_MAX_IRQ)
        {
            /* Read the I/O redirection entry */
            RedirReg = ApicReadIORedirectionEntry(Index);

            /* Re-request the interrupt to be handled later */
            ApicRequestSelfInterrupt(Vector, (UCHAR)RedirReg.TriggerMode);
       }
       else
       {
            /* This should be a reserved vector! */
            ASSERT(Index == APIC_RESERVED_VECTOR);

            /* Re-request the interrupt to be handled later */
            ApicRequestSelfInterrupt(Vector, APIC_TGM_Edge);
       }

        /* Pretend it was a spurious interrupt */
        return FALSE;
    }
#endif
    /* Save the current IRQL */
    *OldIrql = CurrentIrql;

    /* Set the new IRQL */
    ApicRaiseIrql(Irql);

    /* Turn on interrupts */
    _enable();

    /* Success */
    return TRUE;
}

Referenced by HalpApcInterruptHandler(), HalpDispatchInterruptHandler(), and MpsTimerHandler().

HalClearSoftwareInterrupt()

VOID FASTCALL HalClearSoftwareInterrupt

(

IN KIRQL

Irql

)

Definition at line 658 of file apic.c.

{
    /* Nothing to do */
}

HalDisableSystemInterrupt()

VOID NTAPI HalDisableSystemInterrupt	(	IN ULONG	Vector,
		IN KIRQL	Irql
	)

Definition at line 723 of file apic.c.

{
    IOAPIC_REDIRECTION_REGISTER ReDirReg;
    UCHAR Index;
    ASSERT(Irql <= HIGH_LEVEL);
    ASSERT(Vector < RTL_NUMBER_OF(HalpVectorToIndex));

    Index = HalpVectorToIndex[Vector];

    /* Read lower dword of redirection entry */
    ReDirReg.Long0 = IOApicRead(IOAPIC_REDTBL + 2 * Index);

    /* Mask it */
    ReDirReg.Mask = 1;

    /* Write back lower dword */
    IOApicWrite(IOAPIC_REDTBL + 2 * Index, ReDirReg.Long0);
}

HalEnableSystemInterrupt()

BOOLEAN NTAPI HalEnableSystemInterrupt	(	IN ULONG	Vector,
		IN KIRQL	Irql,
		IN KINTERRUPT_MODE	InterruptMode
	)

Definition at line 669 of file apic.c.

{
    IOAPIC_REDIRECTION_REGISTER ReDirReg;
    PKPRCB Prcb = KeGetCurrentPrcb();
    UCHAR Index;
    ASSERT(Irql <= HIGH_LEVEL);
    ASSERT((IrqlToTpr(Irql) & 0xF0) == (Vector & 0xF0));

    /* Get the irq for this vector */
    Index = HalpVectorToIndex[Vector];

    /* Check if its valid */
    if (Index == APIC_FREE_VECTOR)
    {
        /* Interrupt is not in use */
        return FALSE;
    }

    /* Read the redirection entry */
    ReDirReg = ApicReadIORedirectionEntry(Index);

    /* Check if the interrupt was unused */
    if (ReDirReg.Vector != Vector)
    {
        ReDirReg.Vector = Vector;
        ReDirReg.DeliveryMode = APIC_MT_LowestPriority;
        ReDirReg.DestinationMode = APIC_DM_Logical;
        ReDirReg.Destination = 0;
    }

    /* Check if the destination is logical */
    if (ReDirReg.DestinationMode == APIC_DM_Logical)
    {
        /* Set the bit for this cpu */
        ReDirReg.Destination |= ApicLogicalId(Prcb->Number);
    }

    /* Set the trigger mode */
    ReDirReg.TriggerMode = 1 - InterruptMode;

    /* Now unmask it */
    ReDirReg.Mask = FALSE;

    /* Write back the entry */
    ApicWriteIORedirectionEntry(Index, ReDirReg);

    return TRUE;
}

HalEndSystemInterrupt()

VOID NTAPI HalEndSystemInterrupt	(	IN KIRQL	OldIrql,
		IN PKTRAP_FRAME	TrapFrame
	)

Definition at line 813 of file apic.c.

{
    /* Send an EOI */
    ApicSendEOI();

    /* Restore the old IRQL */
    ApicLowerIrql(OldIrql);
}

Referenced by MpsTimerHandler().

HalpAllocateSystemInterrupt()

UCHAR NTAPI HalpAllocateSystemInterrupt	(	_In_ UCHAR	Irq,
		_In_ UCHAR	Vector
	)

Definition at line 368 of file apic.c.

{
    IOAPIC_REDIRECTION_REGISTER ReDirReg;

    ASSERT(Irq < APIC_MAX_IRQ);
    ASSERT(HalpVectorToIndex[Vector] == APIC_FREE_VECTOR);

    /* Setup a redirection entry */
    ReDirReg.Vector = Vector;
    ReDirReg.DeliveryMode = APIC_MT_LowestPriority;
    ReDirReg.DestinationMode = APIC_DM_Logical;
    ReDirReg.DeliveryStatus = 0;
    ReDirReg.Polarity = 0;
    ReDirReg.RemoteIRR = 0;
    ReDirReg.TriggerMode = APIC_TGM_Edge;
    ReDirReg.Mask = 1;
    ReDirReg.Reserved = 0;
    ReDirReg.Destination = 0;

    /* Initialize entry */
    ApicWriteIORedirectionEntry(Irq, ReDirReg);

    /* Save irq in the table */
    HalpVectorToIndex[Vector] = Irq;

    return Vector;
}

Referenced by HalpGetRootInterruptVector().

HalpApcInterruptHandler()

VOID DECLSPEC_NORETURN FASTCALL HalpApcInterruptHandler

(

IN PKTRAP_FRAME

TrapFrame

)

Definition at line 556 of file apic.c.

{
    KPROCESSOR_MODE ProcessorMode;
    KIRQL OldIrql;
    ASSERT(ApicGetProcessorIrql() == APC_LEVEL);

   /* Enter trap */
    KiEnterInterruptTrap(TrapFrame);

#ifdef APIC_LAZY_IRQL
    if (!HalBeginSystemInterrupt(APC_LEVEL, APC_VECTOR, &OldIrql))
    {
        /* "Spurious" interrupt, exit the interrupt */
        KiEoiHelper(TrapFrame);
    }
#else
    /* Save the old IRQL */
    OldIrql = ApicGetCurrentIrql();
    ASSERT(OldIrql < APC_LEVEL);
#endif

    /* Raise to APC_LEVEL */
    ApicRaiseIrql(APC_LEVEL);

    /* End the interrupt */
    ApicSendEOI();

    /* Kernel or user APC? */
    if (KiUserTrap(TrapFrame)) ProcessorMode = UserMode;
    else if (TrapFrame->EFlags & EFLAGS_V86_MASK) ProcessorMode = UserMode;
    else ProcessorMode = KernelMode;

    /* Enable interrupts and call the kernel's APC interrupt handler */
    _enable();
    KiDeliverApc(ProcessorMode, NULL, TrapFrame);

    /* Disable interrupts */
    _disable();

    /* Restore the old IRQL */
    ApicLowerIrql(OldIrql);

    /* Exit the interrupt */
    KiEoiHelper(TrapFrame);
}

HalpDispatchInterruptHandler()

VOID DECLSPEC_NORETURN FASTCALL HalpDispatchInterruptHandler

(

IN PKTRAP_FRAME

TrapFrame

)

Definition at line 605 of file apic.c.

{
    KIRQL OldIrql;
    ASSERT(ApicGetProcessorIrql() == DISPATCH_LEVEL);

   /* Enter trap */
    KiEnterInterruptTrap(TrapFrame);

#ifdef APIC_LAZY_IRQL
    if (!HalBeginSystemInterrupt(DISPATCH_LEVEL, DISPATCH_VECTOR, &OldIrql))
    {
        /* "Spurious" interrupt, exit the interrupt */
        KiEoiHelper(TrapFrame);
    }
#else
    /* Get the current IRQL */
    OldIrql = ApicGetCurrentIrql();
    ASSERT(OldIrql < DISPATCH_LEVEL);
#endif

    /* Raise to DISPATCH_LEVEL */
    ApicRaiseIrql(DISPATCH_LEVEL);

    /* End the interrupt */
    ApicSendEOI();

    /* Enable interrupts and call the kernel's DPC interrupt handler */
    _enable();
    KiDispatchInterrupt();
    _disable();

    /* Restore the old IRQL */
    ApicLowerIrql(OldIrql);

    /* Exit the interrupt */
    KiEoiHelper(TrapFrame);
}

HalpGetRootInterruptVector()

ULONG NTAPI HalpGetRootInterruptVector	(	_In_ ULONG	BusInterruptLevel,
		_In_ ULONG	BusInterruptVector,
		_Out_ PKIRQL	OutIrql,
		_Out_ PKAFFINITY	OutAffinity
	)

Definition at line 400 of file apic.c.

{
    UCHAR Vector;
    KIRQL Irql;

    /* Get the vector currently registered */
    Vector = HalpIrqToVector(BusInterruptLevel);

    /* Check if it's used */
    if (Vector != APIC_FREE_VECTOR)
    {
        /* Calculate IRQL */
        NT_ASSERT(HalpVectorToIndex[Vector] == BusInterruptLevel);
        *OutIrql = HalpVectorToIrql(Vector);
    }
    else
    {
        ULONG Offset;

        /* Outer loop to find alternative slots, when all IRQLs are in use */
        for (Offset = 0; Offset < 15; Offset++)
        {
            /* Loop allowed IRQL range */
            for (Irql = CLOCK_LEVEL - 1; Irql >= CMCI_LEVEL; Irql--)
            {
                /* Calculate the vactor */
                Vector = IrqlToTpr(Irql) + Offset;

                /* Check if the vector is free */
                if (HalpVectorToIrq(Vector) == APIC_FREE_VECTOR)
                {
                    /* Found one, allocate the interrupt */
                    Vector = HalpAllocateSystemInterrupt(BusInterruptLevel, Vector);
                    *OutIrql = Irql;
                    goto Exit;
                }
            }
        }

        DPRINT1("Failed to get an interrupt vector for IRQ %lu\n", BusInterruptLevel);
        *OutAffinity = 0;
        *OutIrql = 0;
        return 0;
    }

Exit:

    *OutAffinity = HalpDefaultInterruptAffinity;
    ASSERT(HalpDefaultInterruptAffinity);

    return Vector;
}

Referenced by HalGetInterruptVector(), and HalpGetSystemInterruptVector().

HalpInitializePICs()

VOID NTAPI HalpInitializePICs

(

IN BOOLEAN

EnableInterrupts

)

Definition at line 513 of file apic.c.

{
    ULONG_PTR EFlags;

    /* Save EFlags and disable interrupts */
    EFlags = __readeflags();
    _disable();

    /* Initialize and mask the PIC */
    HalpInitializeLegacyPICs();

    /* Initialize the I/O APIC */
    ApicInitializeIOApic();

    /* Manually reserve some vectors */
    HalpVectorToIndex[APC_VECTOR] = APIC_RESERVED_VECTOR;
    HalpVectorToIndex[DISPATCH_VECTOR] = APIC_RESERVED_VECTOR;
    HalpVectorToIndex[APIC_CLOCK_VECTOR] = 8;
    HalpVectorToIndex[APIC_SPURIOUS_VECTOR] = APIC_RESERVED_VECTOR;

    /* Set interrupt handlers in the IDT */
    KeRegisterInterruptHandler(APIC_CLOCK_VECTOR, HalpClockInterrupt);
#ifndef _M_AMD64
    KeRegisterInterruptHandler(APC_VECTOR, HalpApcInterrupt);
    KeRegisterInterruptHandler(DISPATCH_VECTOR, HalpDispatchInterrupt);
#endif

    /* Register the vectors for APC and dispatch interrupts */
    HalpRegisterVector(IDT_INTERNAL, 0, APC_VECTOR, APC_LEVEL);
    HalpRegisterVector(IDT_INTERNAL, 0, DISPATCH_VECTOR, DISPATCH_LEVEL);

    /* Restore interrupt state */
    if (EnableInterrupts) EFlags |= EFLAGS_INTERRUPT_MASK;
    __writeeflags(EFlags);
}

HalpIrqToVector()

UCHAR FASTCALL HalpIrqToVector

(

UCHAR

Irq

)

Definition at line 257 of file apic.c.

{
    IOAPIC_REDIRECTION_REGISTER ReDirReg;

    /* Read low dword of the redirection entry */
    ReDirReg.Long0 = IOApicRead(IOAPIC_REDTBL + 2 * Irq);

    /* Return the vector */
    return (UCHAR)ReDirReg.Vector;
}

Referenced by HalpGetRootInterruptVector().

HalpSendEOI()

VOID NTAPI HalpSendEOI

(

VOID

)

Definition at line 284 of file apic.c.

{
    ApicSendEOI();
}

HalpVectorToIrq()

UCHAR FASTCALL HalpVectorToIrq

(

UCHAR

Vector

)

Definition at line 277 of file apic.c.

{
    return HalpVectorToIndex[Vector];
}

Referenced by HalpGetRootInterruptVector().

HalpVectorToIrql()

KIRQL FASTCALL HalpVectorToIrql

(

UCHAR

Vector

)

Definition at line 270 of file apic.c.

{
    return TprToIrql(Vector);
}

Referenced by HalpGetRootInterruptVector().

HalRequestSoftwareInterrupt()

VOID FASTCALL HalRequestSoftwareInterrupt

(

IN KIRQL

Irql

)

Definition at line 650 of file apic.c.

{
    /* Convert irql to vector and request an interrupt */
    ApicRequestSelfInterrupt(IrqlToSoftVector(Irql), APIC_TGM_Edge);
}

IOApicRead()

FORCEINLINE ULONG IOApicRead

(

UCHAR

Register

)

Definition at line 94 of file apic.c.

{
    /* Select the register, then do the read */
    ASSERT(Register <= 0x3F);
    WRITE_REGISTER_ULONG((PULONG)(IOAPIC_BASE + IOAPIC_IOREGSEL), Register);
    return READ_REGISTER_ULONG((PULONG)(IOAPIC_BASE + IOAPIC_IOWIN));
}

Referenced by ApicReadIORedirectionEntry(), HalDisableSystemInterrupt(), and HalpIrqToVector().

IOApicWrite()

FORCEINLINE VOID IOApicWrite	(	UCHAR	Register,
		ULONG	Value
	)

Definition at line 104 of file apic.c.

{
    /* Select the register, then do the write */
    ASSERT(Register <= 0x3F);
    WRITE_REGISTER_ULONG((PULONG)(IOAPIC_BASE + IOAPIC_IOREGSEL), Register);
    WRITE_REGISTER_ULONG((PULONG)(IOAPIC_BASE + IOAPIC_IOWIN), Value);
}

Referenced by ApicWriteIORedirectionEntry(), and HalDisableSystemInterrupt().

KeGetCurrentIrql()

KIRQL NTAPI KeGetCurrentIrql

(

VOID

)

Definition at line 829 of file apic.c.

{
    /* Read the current TPR and convert it to an IRQL */
    return ApicGetCurrentIrql();
}

KeRaiseIrqlToDpcLevel()

KIRQL NTAPI KeRaiseIrqlToDpcLevel

(

VOID

)

Definition at line 878 of file apic.c.

{
    return KfRaiseIrql(DISPATCH_LEVEL);
}

KeRaiseIrqlToSynchLevel()

KIRQL NTAPI KeRaiseIrqlToSynchLevel

(

VOID

)

Definition at line 885 of file apic.c.

{
    return KfRaiseIrql(SYNCH_LEVEL);
}

KfLowerIrql()

VOID FASTCALL KfLowerIrql

(

IN KIRQL

OldIrql

)

Definition at line 837 of file apic.c.

{
#if DBG
    /* Validate correct lower */
    if (OldIrql > ApicGetCurrentIrql())
    {
        /* Crash system */
        KeBugCheck(IRQL_NOT_LESS_OR_EQUAL);
    }
#endif
    /* Set the new IRQL */
    ApicLowerIrql(OldIrql);
}

KfRaiseIrql()

KIRQL FASTCALL KfRaiseIrql

(

IN KIRQL

NewIrql

)

Definition at line 854 of file apic.c.

{
    KIRQL OldIrql;

    /* Read the current IRQL */
    OldIrql = ApicGetCurrentIrql();
#if DBG
    /* Validate correct raise */
    if (OldIrql > NewIrql)
    {
        /* Crash system */
        KeBugCheck(IRQL_NOT_GREATER_OR_EQUAL);
    }
#endif
    /* Convert the new IRQL to a TPR value and write the register */
    ApicRaiseIrql(NewIrql);

    /* Return old IRQL */
    return OldIrql;
}

Referenced by KeRaiseIrqlToDpcLevel(), and KeRaiseIrqlToSynchLevel().

Variable Documentation

ApicVersion

ULONG ApicVersion

Definition at line 27 of file apic.c.

Referenced by ApicInitializeLocalApic().

HalpIRQLtoTPR

const UCHAR HalpIRQLtoTPR[32]

Definition at line 32 of file apic.c.

HalpVectorToIndex

UCHAR HalpVectorToIndex[256]

Definition at line 28 of file apic.c.

Referenced by ApicInitializeIOApic(), HalBeginSystemInterrupt(), HalDisableSystemInterrupt(), HalEnableSystemInterrupt(), HalpAllocateSystemInterrupt(), HalpGetRootInterruptVector(), HalpInitializePICs(), and HalpVectorToIrq().

HalVectorToIRQL

const KIRQL HalVectorToIRQL[16]

Initial value:

=
{
       0, 
    0xff, 
    0xff, 
       1, 
       2, 
       4, 
       5, 
       6, 
       7, 
       8, 
       9, 
      10, 
      27, 
      28, 
      29, 
      31, 
}

Definition at line 69 of file apic.c.