ReactOS  r76032
intrin_x86.h File Reference

Go to the source code of this file.

Macros

#define _ReturnAddress()   (__builtin_return_address(0))
 
#define _AddressOfReturnAddress()   (&(((void **)(__builtin_frame_address(0)))[1]))
 
#define _ReadBarrier   _ReadWriteBarrier
 
#define _WriteBarrier   _ReadWriteBarrier
 

Functions

void *__cdecl memmove (void *dest, const void *source, size_t num)
 
__INTRIN_INLINE void *__cdecl memcpy (void *dest, const void *source, size_t num)
 
__INTRIN_INLINE void _ReadWriteBarrier (void)
 
__INTRIN_INLINE void _mm_mfence (void)
 
__INTRIN_INLINE void _mm_lfence (void)
 
__INTRIN_INLINE void _mm_sfence (void)
 
__INTRIN_INLINE char _InterlockedCompareExchange8 (volatile char *Destination, char Exchange, char Comperand)
 
__INTRIN_INLINE short _InterlockedCompareExchange16 (volatile short *Destination, short Exchange, short Comperand)
 
__INTRIN_INLINE long _InterlockedCompareExchange (volatile long *Destination, long Exchange, long Comperand)
 
__INTRIN_INLINE void_InterlockedCompareExchangePointer (void *volatile *Destination, void *Exchange, void *Comperand)
 
__INTRIN_INLINE char _InterlockedExchange8 (volatile char *Target, char Value)
 
__INTRIN_INLINE short _InterlockedExchange16 (volatile short *Target, short Value)
 
__INTRIN_INLINE long _InterlockedExchange (volatile long *Target, long Value)
 
__INTRIN_INLINE void_InterlockedExchangePointer (void *volatile *Target, void *Value)
 
__INTRIN_INLINE char _InterlockedExchangeAdd8 (char volatile *Addend, char Value)
 
__INTRIN_INLINE short _InterlockedExchangeAdd16 (volatile short *Addend, short Value)
 
__INTRIN_INLINE long _InterlockedExchangeAdd (volatile long *Addend, long Value)
 
__INTRIN_INLINE char _InterlockedAnd8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedAnd16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedAnd (volatile long *value, long mask)
 
__INTRIN_INLINE char _InterlockedOr8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedOr16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedOr (volatile long *value, long mask)
 
__INTRIN_INLINE char _InterlockedXor8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedXor16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedXor (volatile long *value, long mask)
 
__INTRIN_INLINE long _InterlockedDecrement (volatile long *lpAddend)
 
__INTRIN_INLINE long _InterlockedIncrement (volatile long *lpAddend)
 
__INTRIN_INLINE short _InterlockedDecrement16 (volatile short *lpAddend)
 
__INTRIN_INLINE short _InterlockedIncrement16 (volatile short *lpAddend)
 
__INTRIN_INLINE long long _InterlockedCompareExchange64 (volatile long long *Destination, long long Exchange, long long Comperand)
 
__INTRIN_INLINE unsigned char _interlockedbittestandreset (volatile long *a, long b)
 
__INTRIN_INLINE unsigned char _interlockedbittestandset (volatile long *a, long b)
 
__INTRIN_INLINE void __stosb (unsigned char *Dest, unsigned char Data, size_t Count)
 
__INTRIN_INLINE void __stosw (unsigned short *Dest, unsigned short Data, size_t Count)
 
__INTRIN_INLINE void __stosd (unsigned long *Dest, unsigned long Data, size_t Count)
 
__INTRIN_INLINE void __movsb (unsigned char *Destination, const unsigned char *Source, size_t Count)
 
__INTRIN_INLINE void __movsw (unsigned short *Destination, const unsigned short *Source, size_t Count)
 
__INTRIN_INLINE void __movsd (unsigned long *Destination, const unsigned long *Source, size_t Count)
 
__INTRIN_INLINE void __writefsbyte (unsigned long Offset, unsigned char Data)
 
__INTRIN_INLINE void __writefsword (unsigned long Offset, unsigned short Data)
 
__INTRIN_INLINE void __writefsdword (unsigned long Offset, unsigned long Data)
 
__INTRIN_INLINE unsigned char __readfsbyte (unsigned long Offset)
 
__INTRIN_INLINE unsigned short __readfsword (unsigned long Offset)
 
__INTRIN_INLINE unsigned long __readfsdword (unsigned long Offset)
 
__INTRIN_INLINE void __incfsbyte (unsigned long Offset)
 
__INTRIN_INLINE void __incfsword (unsigned long Offset)
 
__INTRIN_INLINE void __incfsdword (unsigned long Offset)
 
__INTRIN_INLINE void __addfsbyte (unsigned long Offset, unsigned char Data)
 
__INTRIN_INLINE void __addfsword (unsigned long Offset, unsigned short Data)
 
__INTRIN_INLINE void __addfsdword (unsigned long Offset, unsigned long Data)
 
__INTRIN_INLINE unsigned char _BitScanForward (unsigned long *Index, unsigned long Mask)
 
__INTRIN_INLINE unsigned char _BitScanReverse (unsigned long *Index, unsigned long Mask)
 
__INTRIN_INLINE unsigned char _bittest (const long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandcomplement (long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandreset (long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandset (long *a, long b)
 
__INTRIN_INLINE unsigned char
__cdecl 
_rotl8 (unsigned char value, unsigned char shift)
 
__INTRIN_INLINE unsigned short
__cdecl 
_rotl16 (unsigned short value, unsigned char shift)
 
__INTRIN_INLINE unsigned int
__cdecl 
_rotl (unsigned int value, int shift)
 
__INTRIN_INLINE unsigned long
long __cdecl 
_rotl64 (unsigned long long value, int shift)
 
__INTRIN_INLINE unsigned int
__cdecl 
_rotr (unsigned int value, int shift)
 
__INTRIN_INLINE unsigned char
__cdecl 
_rotr8 (unsigned char value, unsigned char shift)
 
__INTRIN_INLINE unsigned short
__cdecl 
_rotr16 (unsigned short value, unsigned char shift)
 
__INTRIN_INLINE unsigned long
long __cdecl 
_rotr64 (unsigned long long value, int shift)
 
__INTRIN_INLINE unsigned long
__cdecl 
_lrotl (unsigned long value, int shift)
 
__INTRIN_INLINE unsigned long
__cdecl 
_lrotr (unsigned long value, int shift)
 
__INTRIN_INLINE unsigned long long __ll_lshift (unsigned long long Mask, int Bit)
 
__INTRIN_INLINE long long __ll_rshift (long long Mask, int Bit)
 
__INTRIN_INLINE unsigned long long __ull_rshift (unsigned long long Mask, int Bit)
 
__INTRIN_INLINE unsigned short
__cdecl 
_byteswap_ushort (unsigned short value)
 
__INTRIN_INLINE unsigned long
__cdecl 
_byteswap_ulong (unsigned long value)
 
__INTRIN_INLINE unsigned long
long __cdecl 
_byteswap_uint64 (unsigned long long value)
 
__INTRIN_INLINE unsigned int __lzcnt (unsigned int value)
 
__INTRIN_INLINE unsigned short __lzcnt16 (unsigned short value)
 
__INTRIN_INLINE unsigned int __popcnt (unsigned int value)
 
__INTRIN_INLINE unsigned short __popcnt16 (unsigned short value)
 
__INTRIN_INLINE long long __emul (int a, int b)
 
__INTRIN_INLINE unsigned long long __emulu (unsigned int a, unsigned int b)
 
__INTRIN_INLINE long long __cdecl _abs64 (long long value)
 
__INTRIN_INLINE unsigned char __inbyte (unsigned short Port)
 
__INTRIN_INLINE unsigned short __inword (unsigned short Port)
 
__INTRIN_INLINE unsigned long __indword (unsigned short Port)
 
__INTRIN_INLINE void __inbytestring (unsigned short Port, unsigned char *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __inwordstring (unsigned short Port, unsigned short *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __indwordstring (unsigned short Port, unsigned long *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outbyte (unsigned short Port, unsigned char Data)
 
__INTRIN_INLINE void __outword (unsigned short Port, unsigned short Data)
 
__INTRIN_INLINE void __outdword (unsigned short Port, unsigned long Data)
 
__INTRIN_INLINE void __outbytestring (unsigned short Port, unsigned char *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outwordstring (unsigned short Port, unsigned short *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outdwordstring (unsigned short Port, unsigned long *Buffer, unsigned long Count)
 
__INTRIN_INLINE int __cdecl _inp (unsigned short Port)
 
__INTRIN_INLINE unsigned short
__cdecl 
_inpw (unsigned short Port)
 
__INTRIN_INLINE unsigned long
__cdecl 
_inpd (unsigned short Port)
 
__INTRIN_INLINE int __cdecl _outp (unsigned short Port, int databyte)
 
__INTRIN_INLINE unsigned short
__cdecl 
_outpw (unsigned short Port, unsigned short dataword)
 
__INTRIN_INLINE unsigned long
__cdecl 
_outpd (unsigned short Port, unsigned long dataword)
 
__INTRIN_INLINE void __cpuid (int CPUInfo[4], int InfoType)
 
__INTRIN_INLINE void __cpuidex (int CPUInfo[4], int InfoType, int ECXValue)
 
__INTRIN_INLINE unsigned long long __rdtsc (void)
 
__INTRIN_INLINE void __writeeflags (uintptr_t Value)
 
__INTRIN_INLINE uintptr_t __readeflags (void)
 
__INTRIN_INLINE void __cdecl __debugbreak (void)
 
__INTRIN_INLINE void __ud2 (void)
 
__INTRIN_INLINE void __int2c (void)
 
__INTRIN_INLINE void __cdecl _disable (void)
 
__INTRIN_INLINE void __cdecl _enable (void)
 
__INTRIN_INLINE void __halt (void)
 
 __declspec (noreturn) __INTRIN_INLINE void __fastfail(unsigned int Code)
 
__INTRIN_INLINE void __writecr0 (unsigned int Data)
 
__INTRIN_INLINE void __writecr3 (unsigned int Data)
 
__INTRIN_INLINE void __writecr4 (unsigned int Data)
 
__INTRIN_INLINE void __writecr8 (unsigned int Data)
 
__INTRIN_INLINE unsigned long __readcr0 (void)
 
__INTRIN_INLINE unsigned long __readcr2 (void)
 
__INTRIN_INLINE unsigned long __readcr3 (void)
 
__INTRIN_INLINE unsigned long __readcr4 (void)
 
__INTRIN_INLINE unsigned long __readcr8 (void)
 
__INTRIN_INLINE unsigned int __readdr (unsigned int reg)
 
__INTRIN_INLINE void __writedr (unsigned reg, unsigned int value)
 
__INTRIN_INLINE void __invlpg (void *Address)
 
__INTRIN_INLINE unsigned long long __readmsr (unsigned long reg)
 
__INTRIN_INLINE void __writemsr (unsigned long Register, unsigned long long Value)
 
__INTRIN_INLINE unsigned long long __readpmc (unsigned long counter)
 
__INTRIN_INLINE unsigned long __segmentlimit (unsigned long a)
 
__INTRIN_INLINE void __wbinvd (void)
 
__INTRIN_INLINE void __lidt (void *Source)
 
__INTRIN_INLINE void __sidt (void *Destination)
 
__INTRIN_INLINE void _sgdt (void *Destination)
 
__INTRIN_INLINE void _mm_pause (void)
 
__INTRIN_INLINE void __nop (void)
 

Macro Definition Documentation

#define _AddressOfReturnAddress (   void)    (&(((void **)(__builtin_frame_address(0)))[1]))

Definition at line 82 of file intrin_x86.h.

#define _ReadBarrier   _ReadWriteBarrier

Definition at line 98 of file intrin_x86.h.

Referenced by _mm_lfence().

#define _ReturnAddress (   void)    (__builtin_return_address(0))

Definition at line 81 of file intrin_x86.h.

#define _WriteBarrier   _ReadWriteBarrier

Definition at line 99 of file intrin_x86.h.

Referenced by _mm_sfence().

Function Documentation

__INTRIN_INLINE void __addfsbyte ( unsigned long  Offset,
unsigned char  Data 
)

Definition at line 901 of file intrin_x86.h.

902 {
903  if(!__builtin_constant_p(Offset))
904  __asm__ __volatile__("addb %b[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
905  else
906  __asm__ __volatile__("addb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
907 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__INTRIN_INLINE void __addfsdword ( unsigned long  Offset,
unsigned long  Data 
)

Definition at line 917 of file intrin_x86.h.

918 {
919  if(!__builtin_constant_p(Offset))
920  __asm__ __volatile__("addl %k[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
921  else
922  __asm__ __volatile__("addl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
923 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__INTRIN_INLINE void __addfsword ( unsigned long  Offset,
unsigned short  Data 
)

Definition at line 909 of file intrin_x86.h.

910 {
911  if(!__builtin_constant_p(Offset))
912  __asm__ __volatile__("addw %w[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
913  else
914  __asm__ __volatile__("addw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
915 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__INTRIN_INLINE void __cpuid ( int  CPUInfo[4],
int  InfoType 
)

Definition at line 1428 of file intrin_x86.h.

1429 {
1430  __asm__ __volatile__("cpuid" : "=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3]) : "a" (InfoType));
1431 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
CPUINFO CPUInfo[]
Definition: parse.c:231
__INTRIN_INLINE void __cpuidex ( int  CPUInfo[4],
int  InfoType,
int  ECXValue 
)

Definition at line 1433 of file intrin_x86.h.

Referenced by BlArchCpuId().

1434 {
1435  __asm__ __volatile__("cpuid" : "=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3]) : "a" (InfoType), "c" (ECXValue));
1436 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
CPUINFO CPUInfo[]
Definition: parse.c:231
__INTRIN_INLINE void __cdecl __debugbreak ( void  )

Definition at line 1468 of file intrin_x86.h.

Referenced by __C_specific_handler(), __CxxFrameHandler(), __CxxFrameHandler3(), _assert(), _RTC_DefaultErrorFuncW(), _RTC_NumErrors(), _RTC_SetErrorFunc(), _RTC_SetErrorType(), _RTC_Shutdown(), _tWinMain(), BlStatusError(), BmfdLoadFontFile(), Catch_RTC_Failure(), DoCrashCommand(), DRIVER_Dispatch(), EMF_Update_MF_Xform(), EngBitBlt(), EnumParametersCallback(), FltpPostFsFilterOperation(), FltpPreFsFilterOperation(), FtfdEnablePDEV(), FtfdQueryFont(), FtfdQueryFontTree(), GetCallingConvention(), HalpProfileInterruptHandler(), HalRequestIpi(), KeConnectInterrupt(), KeDisconnectInterrupt(), KeSwitchKernelStack(), KeUserModeCallback(), KiCallUserMode(), KiDispatchException(), KiInterruptHandler(), KiRestoreProcessorControlState(), KiSaveProcessorControlState(), KiSystemCallHandler(), KiSystemService(), KmtCloseDriver(), KmtLoadDriver(), KmtOpenDriver(), KmtUnloadDriver(), KsecDeviceControl(), METADC_GetAndSetDCDWord(), MI_IS_MAPPED_PTE(), MiGetPteForProcess(), MmGetPageTableForProcess(), MmHapReportHeapCorruption(), MmIsDisabledPage(), MyReallocPool__(), NtCallbackReturn(), NtGdiClearBrushAttributes(), NtGdiSetBrushAttributes(), NtSetLdtEntries(), and WmipIoControl().

1469 {
1470  __asm__("int $3");
1471 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__declspec ( noreturn  )

Definition at line 1499 of file intrin_x86.h.

1501 {
1502  __asm__("int $0x29" : : "c"(Code) : "memory");
1503  __builtin_unreachable();
1504 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
#define Code
Definition: deflate.h:80
__INTRIN_INLINE long long __emul ( int  a,
int  b 
)

Definition at line 1269 of file intrin_x86.h.

1270 {
1271  long long retval;
1272  __asm__("imull %[b]" : "=A" (retval) : [a] "a" (a), [b] "rm" (b));
1273  return retval;
1274 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204
__INTRIN_INLINE unsigned long long __emulu ( unsigned int  a,
unsigned int  b 
)

Definition at line 1276 of file intrin_x86.h.

1277 {
1278  unsigned long long retval;
1279  __asm__("mull %[b]" : "=A" (retval) : [a] "a" (a), [b] "rm" (b));
1280  return retval;
1281 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204
__INTRIN_INLINE void __halt ( void  )

Definition at line 1494 of file intrin_x86.h.

Referenced by FrLdrBugCheckEx(), FrLdrBugCheckWithMessage(), HaliHaltSystem(), HalpReboot(), and HalProcessorIdle().

1495 {
1496  __asm__("hlt" : : : "memory");
1497 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned char __inbyte ( unsigned short  Port)

Definition at line 1308 of file intrin_x86.h.

Referenced by _inp().

1309 {
1310  unsigned char byte;
1311  __asm__ __volatile__("inb %w[Port], %b[byte]" : [byte] "=a" (byte) : [Port] "Nd" (Port));
1312  return byte;
1313 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
#define byte(x, n)
Definition: tomcrypt.h:118
__INTRIN_INLINE void __inbytestring ( unsigned short  Port,
unsigned char Buffer,
unsigned long  Count 
)

Definition at line 1329 of file intrin_x86.h.

1330 {
1331  __asm__ __volatile__
1332  (
1333  "rep; insb" :
1334  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1335  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1336  "memory"
1337  );
1338 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
Definition: bufpool.h:45
__INTRIN_INLINE void __incfsbyte ( unsigned long  Offset)

Definition at line 885 of file intrin_x86.h.

886 {
887  __asm__ __volatile__("incb %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
888 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__INTRIN_INLINE void __incfsdword ( unsigned long  Offset)

Definition at line 895 of file intrin_x86.h.

896 {
897  __asm__ __volatile__("incl %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
898 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__INTRIN_INLINE void __incfsword ( unsigned long  Offset)

Definition at line 890 of file intrin_x86.h.

891 {
892  __asm__ __volatile__("incw %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
893 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__INTRIN_INLINE unsigned long __indword ( unsigned short  Port)

Definition at line 1322 of file intrin_x86.h.

Referenced by _inpd().

1323 {
1324  unsigned long dword;
1325  __asm__ __volatile__("inl %w[Port], %k[dword]" : [dword] "=a" (dword) : [Port] "Nd" (Port));
1326  return dword;
1327 }
CPPORT Port[4]
Definition: headless.c:34
unsigned int dword
Definition: types.h:9
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __indwordstring ( unsigned short  Port,
unsigned long Buffer,
unsigned long  Count 
)

Definition at line 1351 of file intrin_x86.h.

1352 {
1353  __asm__ __volatile__
1354  (
1355  "rep; insl" :
1356  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1357  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1358  "memory"
1359  );
1360 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
Definition: bufpool.h:45
__INTRIN_INLINE void __int2c ( void  )

Definition at line 1479 of file intrin_x86.h.

1480 {
1481  __asm__("int $0x2c");
1482 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __invlpg ( void Address)

Definition at line 1758 of file intrin_x86.h.

Referenced by KeInvalidateTlbEntry(), KiMarkPageAsReadOnly(), MiFlushTlb(), MiFlushTlbIpiRoutine(), MmCreateProcessAddressSpace(), MmDefpFlushTlbEntry(), MmSetCleanPage(), and MmSetDirtyPage().

1759 {
1760  __asm__ __volatile__ ("invlpg (%[Address])" : : [Address] "b" (Address) : "memory");
1761 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned short __inword ( unsigned short  Port)

Definition at line 1315 of file intrin_x86.h.

Referenced by _inpw().

1316 {
1317  unsigned short word;
1318  __asm__ __volatile__("inw %w[Port], %w[word]" : [word] "=a" (word) : [Port] "Nd" (Port));
1319  return word;
1320 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
unsigned short word
Definition: types.h:8
__INTRIN_INLINE void __inwordstring ( unsigned short  Port,
unsigned short Buffer,
unsigned long  Count 
)

Definition at line 1340 of file intrin_x86.h.

1341 {
1342  __asm__ __volatile__
1343  (
1344  "rep; insw" :
1345  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1346  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1347  "memory"
1348  );
1349 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
Definition: bufpool.h:45
__INTRIN_INLINE void __lidt ( void Source)

Definition at line 1808 of file intrin_x86.h.

Referenced by Amd64SetupIdt(), BlpArchInitialize(), KeInitExceptions(), KiI386PentiumLockErrataFixup(), KiRestoreProcessorControlState(), and WinLdrSetProcessorContext().

1809 {
1810  __asm__ __volatile__("lidt %0" : : "m"(*(short*)Source));
1811 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned long long __ll_lshift ( unsigned long long  Mask,
int  Bit 
)

Definition at line 1154 of file intrin_x86.h.

1155 {
1156  unsigned long long retval = Mask;
1157 
1158  __asm__
1159  (
1160  "shldl %b[Bit], %%eax, %%edx; sall %b[Bit], %%eax" :
1161  "+A" (retval) :
1162  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1163  );
1164 
1165  return retval;
1166 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE long long __ll_rshift ( long long  Mask,
int  Bit 
)

Definition at line 1168 of file intrin_x86.h.

1169 {
1170  long long retval = Mask;
1171 
1172  __asm__
1173  (
1174  "shrdl %b[Bit], %%edx, %%eax; sarl %b[Bit], %%edx" :
1175  "+A" (retval) :
1176  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1177  );
1178 
1179  return retval;
1180 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned int __lzcnt ( unsigned int  value)

Definition at line 1235 of file intrin_x86.h.

1236 {
1237  return __builtin_clz(value);
1238 }
Definition: get.c:139
__INTRIN_INLINE unsigned short __lzcnt16 ( unsigned short  value)

Definition at line 1240 of file intrin_x86.h.

1241 {
1242  return __builtin_clz(value);
1243 }
Definition: get.c:139
__INTRIN_INLINE void __movsb ( unsigned char Destination,
const unsigned char Source,
size_t  Count 
)

Definition at line 711 of file intrin_x86.h.

712 {
713  __asm__ __volatile__
714  (
715  "rep; movsb" :
716  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
717  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
718  );
719 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875
__INTRIN_INLINE void __movsd ( unsigned long Destination,
const unsigned long Source,
size_t  Count 
)

Definition at line 731 of file intrin_x86.h.

732 {
733  __asm__ __volatile__
734  (
735  "rep; movsd" :
736  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
737  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
738  );
739 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875
__INTRIN_INLINE void __movsw ( unsigned short Destination,
const unsigned short Source,
size_t  Count 
)

Definition at line 721 of file intrin_x86.h.

722 {
723  __asm__ __volatile__
724  (
725  "rep; movsw" :
726  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
727  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
728  );
729 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875
__INTRIN_INLINE void __nop ( void  )

Definition at line 1830 of file intrin_x86.h.

Referenced by HalpRead8254Value().

1831 {
1832  __asm__ __volatile__("nop");
1833 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __outbyte ( unsigned short  Port,
unsigned char  Data 
)

Definition at line 1362 of file intrin_x86.h.

Referenced by _outp().

1363 {
1364  __asm__ __volatile__("outb %b[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1365 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __outbytestring ( unsigned short  Port,
unsigned char Buffer,
unsigned long  Count 
)

Definition at line 1377 of file intrin_x86.h.

1378 {
1379  __asm__ __volatile__("rep; outsb" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1380 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
Definition: bufpool.h:45
__INTRIN_INLINE void __outdword ( unsigned short  Port,
unsigned long  Data 
)

Definition at line 1372 of file intrin_x86.h.

Referenced by _outpd().

1373 {
1374  __asm__ __volatile__("outl %k[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1375 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __outdwordstring ( unsigned short  Port,
unsigned long Buffer,
unsigned long  Count 
)

Definition at line 1387 of file intrin_x86.h.

1388 {
1389  __asm__ __volatile__("rep; outsl" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1390 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
Definition: bufpool.h:45
__INTRIN_INLINE void __outword ( unsigned short  Port,
unsigned short  Data 
)

Definition at line 1367 of file intrin_x86.h.

Referenced by _outpw().

1368 {
1369  __asm__ __volatile__("outw %w[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1370 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __outwordstring ( unsigned short  Port,
unsigned short Buffer,
unsigned long  Count 
)

Definition at line 1382 of file intrin_x86.h.

1383 {
1384  __asm__ __volatile__("rep; outsw" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1385 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
Definition: bufpool.h:45
__INTRIN_INLINE unsigned int __popcnt ( unsigned int  value)

Definition at line 1245 of file intrin_x86.h.

1246 {
1247  return __builtin_popcount(value);
1248 }
Definition: get.c:139
__INTRIN_INLINE unsigned short __popcnt16 ( unsigned short  value)

Definition at line 1250 of file intrin_x86.h.

1251 {
1252  return __builtin_popcount(value);
1253 }
Definition: get.c:139
__INTRIN_INLINE unsigned long long __rdtsc ( void  )

Definition at line 1438 of file intrin_x86.h.

1439 {
1440 #ifdef __x86_64__
1441  unsigned long long low, high;
1442  __asm__ __volatile__("rdtsc" : "=a"(low), "=d"(high));
1443  return low | (high << 32);
1444 #else
1445  unsigned long long retval;
1446  __asm__ __volatile__("rdtsc" : "=A"(retval));
1447  return retval;
1448 #endif
1449 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned long __readcr0 ( void  )

Definition at line 1587 of file intrin_x86.h.

Referenced by ArchSwitchContext(), BlpArchEnableTranslation(), HalpBiosCall(), KiCoprocessorError(), KiFlushNPXState(), KiInitializeCpu(), KiIsNpxErrataPresent(), KiIsNpxPresent(), KiNpxHandler(), KiSaveProcessorControlState(), KiSetCR0Bits(), KiSwapContextEntry(), KiTrap07Handler(), KiTrap13Handler(), and WinLdrSetProcessorContext().

1588 {
1589  unsigned long value;
1590  __asm__ __volatile__("mov %%cr0, %[value]" : [value] "=r" (value));
1591  return value;
1592 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
__INTRIN_INLINE unsigned long __readcr2 ( void  )

Definition at line 1594 of file intrin_x86.h.

Referenced by KdbEnterDebuggerException(), KiSaveProcessorControlState(), and KiTrap0EHandler().

1595 {
1596  unsigned long value;
1597  __asm__ __volatile__("mov %%cr2, %[value]" : [value] "=r" (value));
1598  return value;
1599 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
__INTRIN_INLINE unsigned long __readcr3 ( void  )

Definition at line 1601 of file intrin_x86.h.

Referenced by HalpFlushTLB(), HalpReboot(), KdpTranslateAddress(), KeFlushCurrentTb(), KeFlushProcessTb(), Ki386EnableGlobalPage(), Ki386InitializeTss(), KiSaveProcessorControlState(), MiInitializePageTable(), and MmDefpFlushTlb().

1602 {
1603  unsigned long value;
1604  __asm__ __volatile__("mov %%cr3, %[value]" : [value] "=r" (value));
1605  return value;
1606 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
__INTRIN_INLINE unsigned long __readcr4 ( void  )

Definition at line 1608 of file intrin_x86.h.

Referenced by ArchInitializeContext(), ArchSwitchContext(), BlpArchEnableTranslation(), HalpFlushTLB(), KdpTranslateAddress(), KeFlushCurrentTb(), Ki386EnableDE(), Ki386EnableFxsr(), Ki386EnableGlobalPage(), Ki386EnableXMMIExceptions(), Ki386VdmEnablePentiumExtentions(), KiInitializeCpu(), KiSaveProcessorControlState(), MiInitializePageTable(), and MiUseLargeDriverPage().

1609 {
1610  unsigned long value;
1611  __asm__ __volatile__("mov %%cr4, %[value]" : [value] "=r" (value));
1612  return value;
1613 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
__INTRIN_INLINE unsigned long __readcr8 ( void  )

Definition at line 1615 of file intrin_x86.h.

Referenced by _IRQL_requires_max_(), ApicGetCurrentIrql(), and KiSaveProcessorControlState().

1616 {
1617  unsigned long value;
1618  __asm__ __volatile__("mov %%cr8, %[value]" : [value] "=r" (value));
1619  return value;
1620 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
__INTRIN_INLINE unsigned int __readdr ( unsigned int  reg)

Definition at line 1692 of file intrin_x86.h.

Referenced by KdpGdbEnterDebuggerException(), KiEnterV86Trap(), KiHandleDebugRegistersOnTrapEntry(), and KiSaveProcessorControlState().

1693 {
1694  unsigned int value;
1695  switch (reg)
1696  {
1697  case 0:
1698  __asm__ __volatile__("mov %%dr0, %[value]" : [value] "=r" (value));
1699  break;
1700  case 1:
1701  __asm__ __volatile__("mov %%dr1, %[value]" : [value] "=r" (value));
1702  break;
1703  case 2:
1704  __asm__ __volatile__("mov %%dr2, %[value]" : [value] "=r" (value));
1705  break;
1706  case 3:
1707  __asm__ __volatile__("mov %%dr3, %[value]" : [value] "=r" (value));
1708  break;
1709  case 4:
1710  __asm__ __volatile__("mov %%dr4, %[value]" : [value] "=r" (value));
1711  break;
1712  case 5:
1713  __asm__ __volatile__("mov %%dr5, %[value]" : [value] "=r" (value));
1714  break;
1715  case 6:
1716  __asm__ __volatile__("mov %%dr6, %[value]" : [value] "=r" (value));
1717  break;
1718  case 7:
1719  __asm__ __volatile__("mov %%dr7, %[value]" : [value] "=r" (value));
1720  break;
1721  }
1722  return value;
1723 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
static int reg
Definition: i386-dis.c:1275
__INTRIN_INLINE uintptr_t __readeflags ( void  )

Definition at line 1456 of file intrin_x86.h.

Referenced by HalBeginSystemInterrupt(), HalCalibratePerformanceCounter(), HalEndSystemInterrupt(), HalpAcquireCmosSpinLock(), HalpApcInterruptHandler(), HalpBiosCall(), HalpBiosDisplayReset(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializePICs(), HalpInitializeTsc(), HalpLowerIrql(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KeDisableInterrupts(), KeGetCurrentIrql(), KeQueryPerformanceCounter(), KeSetCurrentIrql(), KfLowerIrql(), KfRaiseIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiEnterV86Mode(), KiFlushNPXState(), KiSetProcessorType(), KiTrap02(), KmtAreInterruptsEnabled(), and Test_strlen().

1457 {
1458  uintptr_t retval;
1459  __asm__ __volatile__("pushf\n pop %0" : "=rm"(retval));
1460  return retval;
1461 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
unsigned int uintptr_t
Definition: crtdefs.h:300
__INTRIN_INLINE unsigned char __readfsbyte ( unsigned long  Offset)

Definition at line 864 of file intrin_x86.h.

865 {
866  unsigned char value;
867  __asm__ __volatile__("movb %%fs:%a[Offset], %b[value]" : [value] "=q" (value) : [Offset] "ir" (Offset));
868  return value;
869 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
GLsizei const GLfloat * value
Definition: glext.h:6069
__INTRIN_INLINE unsigned long __readfsdword ( unsigned long  Offset)

Definition at line 878 of file intrin_x86.h.

879 {
880  unsigned long value;
881  __asm__ __volatile__("movl %%fs:%a[Offset], %k[value]" : [value] "=r" (value) : [Offset] "ir" (Offset));
882  return value;
883 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
GLsizei const GLfloat * value
Definition: glext.h:6069
__INTRIN_INLINE unsigned short __readfsword ( unsigned long  Offset)

Definition at line 871 of file intrin_x86.h.

872 {
873  unsigned short value;
874  __asm__ __volatile__("movw %%fs:%a[Offset], %w[value]" : [value] "=r" (value) : [Offset] "ir" (Offset));
875  return value;
876 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
GLsizei const GLfloat * value
Definition: glext.h:6069
__INTRIN_INLINE unsigned long long __readmsr ( unsigned long  reg)

Definition at line 1766 of file intrin_x86.h.

1767 {
1768 #ifdef __x86_64__
1769  unsigned long low, high;
1770  __asm__ __volatile__("rdmsr" : "=a" (low), "=d" (high) : "c" (reg));
1771  return ((unsigned long long)high << 32) | low;
1772 #else
1773  unsigned long long retval;
1774  __asm__ __volatile__("rdmsr" : "=A" (retval) : "c" (reg));
1775  return retval;
1776 #endif
1777 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
static int reg
Definition: i386-dis.c:1275
__INTRIN_INLINE unsigned long long __readpmc ( unsigned long  counter)

Definition at line 1788 of file intrin_x86.h.

Referenced by KsecReadMachineSpecificCounters().

1789 {
1790  unsigned long long retval;
1791  __asm__ __volatile__("rdpmc" : "=A" (retval) : "c" (counter));
1792  return retval;
1793 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned long __segmentlimit ( unsigned long  a)

Definition at line 1796 of file intrin_x86.h.

1797 {
1798  unsigned long retval;
1799  __asm__ __volatile__("lsl %[a], %[retval]" : [retval] "=r" (retval) : [a] "rm" (a));
1800  return retval;
1801 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204
__INTRIN_INLINE void __sidt ( void Destination)

Definition at line 1813 of file intrin_x86.h.

Referenced by Amd64SetupIdt(), BlpArchInitialize(), ImgArchEfiStartBootApplication(), KdbpCmdGdtLdtIdt(), KdbpCmdRegs(), KdbpStepIntoInstruction(), KiGetMachineBootPointers(), KiI386PentiumLockErrataFixup(), KiInitializePcr(), KiSaveProcessorControlState(), Mmx86InitializeMemoryMap(), and WinLdrSetProcessorContext().

1814 {
1815  __asm__ __volatile__("sidt %0" : : "m"(*(short*)Destination) : "memory");
1816 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __stosb ( unsigned char Dest,
unsigned char  Data,
size_t  Count 
)

Definition at line 669 of file intrin_x86.h.

670 {
671  __asm__ __volatile__
672  (
673  "rep; stosb" :
674  [Dest] "=D" (Dest), [Count] "=c" (Count) :
675  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
676  );
677 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __stosd ( unsigned long Dest,
unsigned long  Data,
size_t  Count 
)

Definition at line 689 of file intrin_x86.h.

690 {
691  __asm__ __volatile__
692  (
693  "rep; stosl" :
694  [Dest] "=D" (Dest), [Count] "=c" (Count) :
695  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
696  );
697 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __stosw ( unsigned short Dest,
unsigned short  Data,
size_t  Count 
)

Definition at line 679 of file intrin_x86.h.

680 {
681  __asm__ __volatile__
682  (
683  "rep; stosw" :
684  [Dest] "=D" (Dest), [Count] "=c" (Count) :
685  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
686  );
687 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __ud2 ( void  )

Definition at line 1474 of file intrin_x86.h.

1475 {
1476  __asm__("ud2");
1477 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned long long __ull_rshift ( unsigned long long  Mask,
int  Bit 
)

Definition at line 1182 of file intrin_x86.h.

1183 {
1184  unsigned long long retval = Mask;
1185 
1186  __asm__
1187  (
1188  "shrdl %b[Bit], %%edx, %%eax; shrl %b[Bit], %%edx" :
1189  "+A" (retval) :
1190  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1191  );
1192 
1193  return retval;
1194 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __wbinvd ( void  )

Definition at line 1803 of file intrin_x86.h.

1804 {
1805  __asm__ __volatile__("wbinvd" : : : "memory");
1806 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __writecr0 ( unsigned int  Data)

Definition at line 1567 of file intrin_x86.h.

Referenced by ArchSwitchContext(), BlpArchEnableTranslation(), HalpBiosCall(), KiCoprocessorError(), KiFlushNPXState(), KiInitializeCpu(), KiIsNpxErrataPresent(), KiIsNpxPresent(), KiNpxHandler(), KiRestoreProcessorControlState(), KiSetCR0Bits(), KiSwapContextEntry(), KiTrap07Handler(), KiTrap13Handler(), and WinLdrSetProcessorContext().

1568 {
1569  __asm__("mov %[Data], %%cr0" : : [Data] "r" (Data) : "memory");
1570 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __writecr3 ( unsigned int  Data)

Definition at line 1572 of file intrin_x86.h.

Referenced by HalpFlushTLB(), HalpReboot(), handle_gdb_read_mem(), handle_gdb_write_mem(), KeFlushCurrentTb(), KeFlushProcessTb(), Ki386EnableGlobalPage(), KiRestoreProcessorControlState(), KiSwapContextExit(), KiSwapContextResume(), KiSwapProcess(), MmDefInitializeTranslation(), MmDefpFlushTlb(), ReadMemorySendHandler(), WinLdrSetProcessorContext(), and WriteMemorySendHandler().

1573 {
1574  __asm__("mov %[Data], %%cr3" : : [Data] "r" (Data) : "memory");
1575 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __writecr4 ( unsigned int  Data)

Definition at line 1577 of file intrin_x86.h.

Referenced by ArchInitializeContext(), ArchSwitchContext(), BlpArchEnableTranslation(), HalpFlushTLB(), KeFlushCurrentTb(), Ki386EnableDE(), Ki386EnableFxsr(), Ki386EnableGlobalPage(), Ki386EnableXMMIExceptions(), Ki386VdmEnablePentiumExtentions(), KiInitializeCpu(), KiRestoreProcessorControlState(), and MiInitializePageTable().

1578 {
1579  __asm__("mov %[Data], %%cr4" : : [Data] "r" (Data) : "memory");
1580 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __writecr8 ( unsigned int  Data)

Definition at line 1582 of file intrin_x86.h.

Referenced by ApicSetIrql(), KeSetCurrentIrql(), and KiRestoreProcessorControlState().

1583 {
1584  __asm__("mov %[Data], %%cr8" : : [Data] "r" (Data) : "memory");
1585 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __writedr ( unsigned  reg,
unsigned int  value 
)

Definition at line 1725 of file intrin_x86.h.

Referenced by GspUnloadBreakpoints(), KdpGdbEnterDebuggerException(), KiHandleDebugRegistersOnTrapEntry(), KiHandleDebugRegistersOnTrapExit(), KiRestoreProcessorControlState(), and KiSaveProcessorControlState().

1726 {
1727  switch (reg)
1728  {
1729  case 0:
1730  __asm__("mov %[value], %%dr0" : : [value] "r" (value) : "memory");
1731  break;
1732  case 1:
1733  __asm__("mov %[value], %%dr1" : : [value] "r" (value) : "memory");
1734  break;
1735  case 2:
1736  __asm__("mov %[value], %%dr2" : : [value] "r" (value) : "memory");
1737  break;
1738  case 3:
1739  __asm__("mov %[value], %%dr3" : : [value] "r" (value) : "memory");
1740  break;
1741  case 4:
1742  __asm__("mov %[value], %%dr4" : : [value] "r" (value) : "memory");
1743  break;
1744  case 5:
1745  __asm__("mov %[value], %%dr5" : : [value] "r" (value) : "memory");
1746  break;
1747  case 6:
1748  __asm__("mov %[value], %%dr6" : : [value] "r" (value) : "memory");
1749  break;
1750  case 7:
1751  __asm__("mov %[value], %%dr7" : : [value] "r" (value) : "memory");
1752  break;
1753  }
1754 }
Definition: get.c:139
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
static int reg
Definition: i386-dis.c:1275
__INTRIN_INLINE void __writeeflags ( uintptr_t  Value)

Definition at line 1451 of file intrin_x86.h.

Referenced by HalCalibratePerformanceCounter(), HalpBiosDisplayReset(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializePICs(), HalpInitializeTsc(), HalpReleaseCmosSpinLock(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KfLowerIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiFlushNPXState(), KiSetProcessorType(), KiTrap02(), Test_strlen(), and WinLdrSetProcessorContext().

1452 {
1453  __asm__ __volatile__("push %0\n popf" : : "rim"(Value));
1454 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
UINTN UINT8 Value
Definition: acefiex.h:751
__INTRIN_INLINE void __writefsbyte ( unsigned long  Offset,
unsigned char  Data 
)

Definition at line 849 of file intrin_x86.h.

850 {
851  __asm__ __volatile__("movb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
852 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__INTRIN_INLINE void __writefsdword ( unsigned long  Offset,
unsigned long  Data 
)

Definition at line 859 of file intrin_x86.h.

860 {
861  __asm__ __volatile__("movl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data) : "memory");
862 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__INTRIN_INLINE void __writefsword ( unsigned long  Offset,
unsigned short  Data 
)

Definition at line 854 of file intrin_x86.h.

855 {
856  __asm__ __volatile__("movw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data) : "memory");
857 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__INTRIN_INLINE void __writemsr ( unsigned long  Register,
unsigned long long  Value 
)

Definition at line 1779 of file intrin_x86.h.

1780 {
1781 #ifdef __x86_64__
1782  __asm__ __volatile__("wrmsr" : : "a" (Value), "d" (Value >> 32), "c" (Register));
1783 #else
1784  __asm__ __volatile__("wrmsr" : : "A" (Value), "c" (Register));
1785 #endif
1786 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
UINTN UINT8 Value
Definition: acefiex.h:751

Definition at line 1283 of file intrin_x86.h.

1284 {
1285  return (value >= 0) ? value : -value;
1286 }
Definition: get.c:139
GLsizei const GLfloat * value
Definition: glext.h:6069
__INTRIN_INLINE unsigned char _BitScanForward ( unsigned long Index,
unsigned long  Mask 
)

Definition at line 930 of file intrin_x86.h.

931 {
932  __asm__("bsfl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
933  return Mask ? 1 : 0;
934 }
_Must_inspect_result_ _In_ ULONG Index
Definition: fltkernel.h:1824
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned char _BitScanReverse ( unsigned long Index,
unsigned long  Mask 
)

Definition at line 936 of file intrin_x86.h.

937 {
938  __asm__("bsrl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
939  return Mask ? 1 : 0;
940 }
_Must_inspect_result_ _In_ ULONG Index
Definition: fltkernel.h:1824
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned char _bittest ( const long a,
long  b 
)

Definition at line 943 of file intrin_x86.h.

944 {
945  unsigned char retval;
946 
947  if(__builtin_constant_p(b))
948  __asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "mr" (*(a + (b / 32))), [b] "Ir" (b % 32));
949  else
950  __asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "m" (*a), [b] "r" (b));
951 
952  return retval;
953 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204
__INTRIN_INLINE unsigned char _bittestandcomplement ( long a,
long  b 
)

Definition at line 985 of file intrin_x86.h.

986 {
987  unsigned char retval;
988 
989  if(__builtin_constant_p(b))
990  __asm__("btc %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
991  else
992  __asm__("btc %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
993 
994  return retval;
995 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204
__INTRIN_INLINE unsigned char _bittestandreset ( long a,
long  b 
)

Definition at line 997 of file intrin_x86.h.

998 {
999  unsigned char retval;
1000 
1001  if(__builtin_constant_p(b))
1002  __asm__("btr %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1003  else
1004  __asm__("btr %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1005 
1006  return retval;
1007 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204
__INTRIN_INLINE unsigned char _bittestandset ( long a,
long  b 
)

Definition at line 1009 of file intrin_x86.h.

1010 {
1011  unsigned char retval;
1012 
1013  if(__builtin_constant_p(b))
1014  __asm__("bts %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1015  else
1016  __asm__("bts %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1017 
1018  return retval;
1019 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204
__INTRIN_INLINE unsigned long long __cdecl _byteswap_uint64 ( unsigned long long  value)

Definition at line 1218 of file intrin_x86.h.

1219 {
1220  union {
1221  unsigned long long int64part;
1222  struct {
1223  unsigned long lowpart;
1224  unsigned long hipart;
1225  };
1226  } retval;
1227  retval.int64part = value;
1228  __asm__("bswapl %[lowpart]\n"
1229  "bswapl %[hipart]\n"
1230  : [lowpart] "=r" (retval.hipart), [hipart] "=r" (retval.lowpart) : "[lowpart]" (retval.lowpart), "[hipart]" (retval.hipart) );
1231  return retval.int64part;
1232 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
__INTRIN_INLINE unsigned long __cdecl _byteswap_ulong ( unsigned long  value)

Definition at line 1203 of file intrin_x86.h.

1204 {
1205  unsigned long retval;
1206  __asm__("bswapl %[retval]" : [retval] "=r" (retval) : "[retval]" (value));
1207  return retval;
1208 }
Definition: get.c:139
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned short __cdecl _byteswap_ushort ( unsigned short  value)

Definition at line 1196 of file intrin_x86.h.

1197 {
1198  unsigned short retval;
1199  __asm__("rorw $8, %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value));
1200  return retval;
1201 }
Definition: get.c:139
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void __cdecl _disable ( void  )

Definition at line 1484 of file intrin_x86.h.

Referenced by _HalpApcInterruptHandler(), _HalpDispatchInterruptHandler(), acpi_suspend(), ArchSwitchContext(), BlpArchEnableTranslation(), CloseBitPlane(), ExAcquireResourceLock(), FrLdrBugCheckEx(), FrLdrBugCheckWithMessage(), HalCalibratePerformanceCounter(), HalDisableSystemInterrupt(), HalDisplayString(), HalEnableSystemInterrupt(), HaliHaltSystem(), HalpAcquireCmosSpinLock(), HalpApcInterruptHandler(), HalpBiosDisplayReset(), HalpDispatchInterruptHandler(), HalpEndSystemInterrupt(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializePICs(), HalpInitializeTsc(), HalpLowerIrql(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KeBugCheckWithTf(), KeDisableInterrupts(), KeEnterKernelDebugger(), KeGetCurrentIrql(), KeSetCurrentIrql(), KfLowerIrql(), KfRaiseIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiApcInterrupt(), KiCheckForApcDelivery(), KiCommonExit(), KiDispatchInterrupt(), KiDpcInterruptHandler(), KiEndInterrupt(), KiEnterV86Mode(), KiExitInterrupt(), KiExitSystemCallDebugChecks(), KiExitV86Trap(), KiFlushNPXState(), KiI386PentiumLockErrataFixup(), KiIdleLoop(), KiInterruptDispatch3(), KiIsNpxErrataPresent(), KiRetireDpcList(), KiSetupDecrementerTrap(), KiSwapContextEntry(), KiSystemService(), KiTimerExpiration(), KiTrap02(), KiTrap06Handler(), KiTrap07Handler(), KiTrap0DHandler(), KiUserModeCallout(), MpsTimerHandler(), NtCallbackReturn(), OpenBitPlane(), PopShutdownHandler(), sb16_play(), ScrIoControl(), ScrWrite(), and WinLdrSetProcessorContext().

1485 {
1486  __asm__("cli" : : : "memory");
1487 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")

Definition at line 1489 of file intrin_x86.h.

Referenced by _HalpApcInterruptHandler(), _HalpDismissIrqGeneric(), _HalpDismissIrqLevel(), _HalpDispatchInterruptHandler(), acpi_suspend(), ArchSwitchContext(), CloseBitPlane(), ExpInitializeExecutive(), ExReleaseResourceLock(), HalBeginSystemInterrupt(), HalDisableSystemInterrupt(), HalEnableSystemInterrupt(), HalpApcInterruptHandler(), HalpDispatchInterruptHandler(), HalpEndSystemInterrupt(), HalpInitializeTsc(), HalpInitPICs(), HalpLowerIrql(), HalProcessorIdle(), KdPollBreakIn(), KeGetCurrentIrql(), KeRemoveQueueDpc(), KeRestoreInterrupts(), KeSetCurrentIrql(), KeThawExecution(), KfLowerIrql(), KfRaiseIrql(), KiApcInterrupt(), KiCheckForApcDelivery(), KiDebugHandler(), KiDispatchInterrupt(), KiDpcInterruptHandler(), KiEnterV86Mode(), KiExitV86Mode(), KiExitV86Trap(), KiI386PentiumLockErrataFixup(), KiIdleLoop(), KiInitializeSystem(), KiInterruptDispatch3(), KiInterruptHandler(), KiIsNpxErrataPresent(), KiNpxHandler(), KiRetireDpcList(), KiSetupDecrementerTrap(), KiSwapContextEntry(), KiSystemCallHandler(), KiSystemService(), KiSystemServiceHandler(), KiSystemStartupBootStack(), KiTimerExpiration(), KiTrap00Handler(), KiTrap01Handler(), KiTrap04Handler(), KiTrap05Handler(), KiTrap06Handler(), KiTrap07Handler(), KiTrap09Handler(), KiTrap0DHandler(), KiTrap0EHandler(), KiTrap10Handler(), KiTrap11Handler(), KiTrap13Handler(), KiUserModeCallout(), MpsTimerHandler(), NtCallbackReturn(), OpenBitPlane(), sb16_play(), ScrIoControl(), and ScrWrite().

1490 {
1491  __asm__("sti" : : : "memory");
1492 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE int __cdecl _inp ( unsigned short  Port)

Definition at line 1392 of file intrin_x86.h.

1393 {
1394  return __inbyte(Port);
1395 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE unsigned char __inbyte(unsigned short Port)
Definition: intrin_x86.h:1308
__INTRIN_INLINE unsigned long __cdecl _inpd ( unsigned short  Port)

Definition at line 1402 of file intrin_x86.h.

1403 {
1404  return __indword(Port);
1405 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE unsigned long __indword(unsigned short Port)
Definition: intrin_x86.h:1322
__INTRIN_INLINE unsigned short __cdecl _inpw ( unsigned short  Port)

Definition at line 1397 of file intrin_x86.h.

1398 {
1399  return __inword(Port);
1400 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE unsigned short __inword(unsigned short Port)
Definition: intrin_x86.h:1315
__INTRIN_INLINE long _InterlockedAnd ( volatile long value,
long  mask 
)

Definition at line 435 of file intrin_x86.h.

436 {
437  long x;
438  long y;
439 
440  y = *value;
441 
442  do
443  {
444  x = y;
446  }
447  while(y != x);
448 
449  return y;
450 }
Definition: get.c:139
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:338
GLsizei const GLfloat * value
Definition: glext.h:6069
INT INT y
Definition: msvc.h:62
INT x
Definition: msvc.h:62
__INTRIN_INLINE short _InterlockedAnd16 ( volatile short value,
short  mask 
)

Definition at line 418 of file intrin_x86.h.

419 {
420  short x;
421  short y;
422 
423  y = *value;
424 
425  do
426  {
427  x = y;
429  }
430  while(y != x);
431 
432  return y;
433 }
Definition: get.c:139
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:331
GLsizei const GLfloat * value
Definition: glext.h:6069
INT INT y
Definition: msvc.h:62
INT x
Definition: msvc.h:62
__INTRIN_INLINE char _InterlockedAnd8 ( volatile char value,
char  mask 
)

Definition at line 401 of file intrin_x86.h.

402 {
403  char x;
404  char y;
405 
406  y = *value;
407 
408  do
409  {
410  x = y;
412  }
413  while(y != x);
414 
415  return y;
416 }
Definition: get.c:139
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:324
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
INT INT y
Definition: msvc.h:62
INT x
Definition: msvc.h:62
__INTRIN_INLINE unsigned char _interlockedbittestandreset ( volatile long a,
long  b 
)

Definition at line 634 of file intrin_x86.h.

635 {
636  unsigned char retval;
637  __asm__("lock; btrl %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval), [a] "+m" (*a) : [b] "Ir" (b) : "memory");
638  return retval;
639 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204
__INTRIN_INLINE unsigned char _interlockedbittestandset ( volatile long a,
long  b 
)

Definition at line 650 of file intrin_x86.h.

651 {
652  unsigned char retval;
653  __asm__("lock; btsl %[b], %[a]; setc %b[retval]" : [retval] "=q" (retval), [a] "+m" (*a) : [b] "Ir" (b) : "memory");
654  return retval;
655 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204
__INTRIN_INLINE long _InterlockedCompareExchange ( volatile long Destination,
long  Exchange,
long  Comperand 
)

Definition at line 338 of file intrin_x86.h.

Referenced by _InterlockedAnd(), _InterlockedOr(), and _InterlockedXor().

339 {
340  long retval = Comperand;
341  __asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange): "memory");
342  return retval;
343 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875
__INTRIN_INLINE short _InterlockedCompareExchange16 ( volatile short Destination,
short  Exchange,
short  Comperand 
)

Definition at line 331 of file intrin_x86.h.

Referenced by _InterlockedAnd16(), _InterlockedOr16(), and _InterlockedXor16().

332 {
333  short retval = Comperand;
334  __asm__("lock; cmpxchgw %w[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange): "memory");
335  return retval;
336 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875
__INTRIN_INLINE long long _InterlockedCompareExchange64 ( volatile long long Destination,
long long  Exchange,
long long  Comperand 
)

Definition at line 597 of file intrin_x86.h.

598 {
599  long long retval = Comperand;
600 
601  __asm__
602  (
603  "lock; cmpxchg8b %[Destination]" :
604  [retval] "+A" (retval) :
605  [Destination] "m" (*Destination),
606  "b" ((unsigned long)((Exchange >> 0) & 0xFFFFFFFF)),
607  "c" ((unsigned long)((Exchange >> 32) & 0xFFFFFFFF)) :
608  "memory"
609  );
610 
611  return retval;
612 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875
__INTRIN_INLINE char _InterlockedCompareExchange8 ( volatile char Destination,
char  Exchange,
char  Comperand 
)

Definition at line 324 of file intrin_x86.h.

Referenced by _InterlockedAnd8(), _InterlockedOr8(), and _InterlockedXor8().

325 {
326  char retval = Comperand;
327  __asm__("lock; cmpxchgb %b[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange) : "memory");
328  return retval;
329 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875
__INTRIN_INLINE void* _InterlockedCompareExchangePointer ( void *volatile Destination,
void Exchange,
void Comperand 
)

Definition at line 345 of file intrin_x86.h.

346 {
347  void * retval = (void *)Comperand;
348  __asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval] "=a" (retval) : "[retval]" (retval), [Destination] "m" (*Destination), [Exchange] "q" (Exchange) : "memory");
349  return retval;
350 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE long _InterlockedDecrement ( volatile long lpAddend)

Definition at line 554 of file intrin_x86.h.

555 {
556  return _InterlockedExchangeAdd(lpAddend, -1) - 1;
557 }
__INTRIN_INLINE long _InterlockedExchangeAdd(volatile long *Addend, long Value)
Definition: intrin_x86.h:394
__INTRIN_INLINE short _InterlockedDecrement16 ( volatile short lpAddend)

Definition at line 564 of file intrin_x86.h.

565 {
566  return _InterlockedExchangeAdd16(lpAddend, -1) - 1;
567 }
__INTRIN_INLINE short _InterlockedExchangeAdd16(volatile short *Addend, short Value)
Definition: intrin_x86.h:387
__INTRIN_INLINE long _InterlockedExchange ( volatile long Target,
long  Value 
)

Definition at line 366 of file intrin_x86.h.

367 {
368  long retval = Value;
369  __asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
370  return retval;
371 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_Must_inspect_result_ typedef _In_ ULONG _In_ BOOLEAN Target
Definition: iotypes.h:1067
UINTN UINT8 Value
Definition: acefiex.h:751
__INTRIN_INLINE short _InterlockedExchange16 ( volatile short Target,
short  Value 
)

Definition at line 359 of file intrin_x86.h.

360 {
361  short retval = Value;
362  __asm__("xchgw %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
363  return retval;
364 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_Must_inspect_result_ typedef _In_ ULONG _In_ BOOLEAN Target
Definition: iotypes.h:1067
UINTN UINT8 Value
Definition: acefiex.h:751
__INTRIN_INLINE char _InterlockedExchange8 ( volatile char Target,
char  Value 
)

Definition at line 352 of file intrin_x86.h.

353 {
354  char retval = Value;
355  __asm__("xchgb %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
356  return retval;
357 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
_Must_inspect_result_ typedef _In_ ULONG _In_ BOOLEAN Target
Definition: iotypes.h:1067
UINTN UINT8 Value
Definition: acefiex.h:751
__INTRIN_INLINE long _InterlockedExchangeAdd ( volatile long Addend,
long  Value 
)

Definition at line 394 of file intrin_x86.h.

Referenced by _InterlockedDecrement(), and _InterlockedIncrement().

395 {
396  long retval = Value;
397  __asm__("lock; xaddl %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
398  return retval;
399 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
UINTN UINT8 Value
Definition: acefiex.h:751
__INTRIN_INLINE short _InterlockedExchangeAdd16 ( volatile short Addend,
short  Value 
)

Definition at line 387 of file intrin_x86.h.

Referenced by _InterlockedDecrement16(), and _InterlockedIncrement16().

388 {
389  short retval = Value;
390  __asm__("lock; xaddw %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
391  return retval;
392 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
UINTN UINT8 Value
Definition: acefiex.h:751
__INTRIN_INLINE char _InterlockedExchangeAdd8 ( char volatile Addend,
char  Value 
)

Definition at line 380 of file intrin_x86.h.

381 {
382  char retval = Value;
383  __asm__("lock; xaddb %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
384  return retval;
385 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
UINTN UINT8 Value
Definition: acefiex.h:751
__INTRIN_INLINE void* _InterlockedExchangePointer ( void *volatile Target,
void Value 
)

Definition at line 373 of file intrin_x86.h.

374 {
375  void * retval = Value;
376  __asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
377  return retval;
378 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
UINTN UINT8 Value
Definition: acefiex.h:751
__INTRIN_INLINE long _InterlockedIncrement ( volatile long lpAddend)

Definition at line 559 of file intrin_x86.h.

560 {
561  return _InterlockedExchangeAdd(lpAddend, 1) + 1;
562 }
__INTRIN_INLINE long _InterlockedExchangeAdd(volatile long *Addend, long Value)
Definition: intrin_x86.h:394
__INTRIN_INLINE short _InterlockedIncrement16 ( volatile short lpAddend)

Definition at line 569 of file intrin_x86.h.

570 {
571  return _InterlockedExchangeAdd16(lpAddend, 1) + 1;
572 }
__INTRIN_INLINE short _InterlockedExchangeAdd16(volatile short *Addend, short Value)
Definition: intrin_x86.h:387
__INTRIN_INLINE long _InterlockedOr ( volatile long value,
long  mask 
)

Definition at line 486 of file intrin_x86.h.

487 {
488  long x;
489  long y;
490 
491  y = *value;
492 
493  do
494  {
495  x = y;
497  }
498  while(y != x);
499 
500  return y;
501 }
Definition: get.c:139
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:338
GLsizei const GLfloat * value
Definition: glext.h:6069
INT INT y
Definition: msvc.h:62
INT x
Definition: msvc.h:62
__INTRIN_INLINE short _InterlockedOr16 ( volatile short value,
short  mask 
)

Definition at line 469 of file intrin_x86.h.

470 {
471  short x;
472  short y;
473 
474  y = *value;
475 
476  do
477  {
478  x = y;
480  }
481  while(y != x);
482 
483  return y;
484 }
Definition: get.c:139
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:331
GLsizei const GLfloat * value
Definition: glext.h:6069
INT INT y
Definition: msvc.h:62
INT x
Definition: msvc.h:62
__INTRIN_INLINE char _InterlockedOr8 ( volatile char value,
char  mask 
)

Definition at line 452 of file intrin_x86.h.

453 {
454  char x;
455  char y;
456 
457  y = *value;
458 
459  do
460  {
461  x = y;
463  }
464  while(y != x);
465 
466  return y;
467 }
Definition: get.c:139
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:324
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
INT INT y
Definition: msvc.h:62
INT x
Definition: msvc.h:62
__INTRIN_INLINE long _InterlockedXor ( volatile long value,
long  mask 
)

Definition at line 537 of file intrin_x86.h.

538 {
539  long x;
540  long y;
541 
542  y = *value;
543 
544  do
545  {
546  x = y;
548  }
549  while(y != x);
550 
551  return y;
552 }
Definition: get.c:139
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:338
GLsizei const GLfloat * value
Definition: glext.h:6069
INT INT y
Definition: msvc.h:62
INT x
Definition: msvc.h:62
__INTRIN_INLINE short _InterlockedXor16 ( volatile short value,
short  mask 
)

Definition at line 520 of file intrin_x86.h.

521 {
522  short x;
523  short y;
524 
525  y = *value;
526 
527  do
528  {
529  x = y;
531  }
532  while(y != x);
533 
534  return y;
535 }
Definition: get.c:139
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:331
GLsizei const GLfloat * value
Definition: glext.h:6069
INT INT y
Definition: msvc.h:62
INT x
Definition: msvc.h:62
__INTRIN_INLINE char _InterlockedXor8 ( volatile char value,
char  mask 
)

Definition at line 503 of file intrin_x86.h.

504 {
505  char x;
506  char y;
507 
508  y = *value;
509 
510  do
511  {
512  x = y;
514  }
515  while(y != x);
516 
517  return y;
518 }
Definition: get.c:139
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:324
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
INT INT y
Definition: msvc.h:62
INT x
Definition: msvc.h:62
__INTRIN_INLINE unsigned long __cdecl _lrotl ( unsigned long  value,
int  shift 
)

Definition at line 1133 of file intrin_x86.h.

1134 {
1135  unsigned long retval;
1136  __asm__("roll %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1137  return retval;
1138 }
Definition: get.c:139
#define shift
Definition: input.c:1594
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned long __cdecl _lrotr ( unsigned long  value,
int  shift 
)

Definition at line 1140 of file intrin_x86.h.

1141 {
1142  unsigned long retval;
1143  __asm__("rorl %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1144  return retval;
1145 }
Definition: get.c:139
#define shift
Definition: input.c:1594
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void _mm_lfence ( void  )

Definition at line 106 of file intrin_x86.h.

107 {
108  _ReadBarrier();
109  __asm__ __volatile__("lfence");
110  _ReadBarrier();
111 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
#define _ReadBarrier
Definition: intrin_x86.h:98
__INTRIN_INLINE void _mm_mfence ( void  )

Definition at line 101 of file intrin_x86.h.

102 {
103  __asm__ __volatile__("mfence" : : : "memory");
104 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void _mm_pause ( void  )

Definition at line 1825 of file intrin_x86.h.

1826 {
1827  __asm__ __volatile__("pause" : : : "memory");
1828 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void _mm_sfence ( void  )

Definition at line 113 of file intrin_x86.h.

114 {
115  _WriteBarrier();
116  __asm__ __volatile__("sfence");
117  _WriteBarrier();
118 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
#define _WriteBarrier
Definition: intrin_x86.h:99
__INTRIN_INLINE int __cdecl _outp ( unsigned short  Port,
int  databyte 
)

Definition at line 1407 of file intrin_x86.h.

1408 {
1409  __outbyte(Port, (unsigned char)databyte);
1410  return databyte;
1411 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE void __outbyte(unsigned short Port, unsigned char Data)
Definition: intrin_x86.h:1362
__INTRIN_INLINE unsigned long __cdecl _outpd ( unsigned short  Port,
unsigned long  dataword 
)

Definition at line 1419 of file intrin_x86.h.

1420 {
1421  __outdword(Port, dataword);
1422  return dataword;
1423 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE void __outdword(unsigned short Port, unsigned long Data)
Definition: intrin_x86.h:1372
__INTRIN_INLINE unsigned short __cdecl _outpw ( unsigned short  Port,
unsigned short  dataword 
)

Definition at line 1413 of file intrin_x86.h.

1414 {
1415  __outword(Port, dataword);
1416  return dataword;
1417 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE void __outword(unsigned short Port, unsigned short Data)
Definition: intrin_x86.h:1367
__INTRIN_INLINE void _ReadWriteBarrier ( void  )

Definition at line 92 of file intrin_x86.h.

93 {
94  __asm__ __volatile__("" : : : "memory");
95 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned int __cdecl _rotl ( unsigned int  value,
int  shift 
)

Definition at line 1075 of file intrin_x86.h.

1076 {
1077  unsigned int retval;
1078  __asm__("roll %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1079  return retval;
1080 }
Definition: get.c:139
#define shift
Definition: input.c:1594
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned short __cdecl _rotl16 ( unsigned short  value,
unsigned char  shift 
)

Definition at line 1068 of file intrin_x86.h.

1069 {
1070  unsigned short retval;
1071  __asm__("rolw %b[shift], %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1072  return retval;
1073 }
Definition: get.c:139
#define shift
Definition: input.c:1594
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned long long __cdecl _rotl64 ( unsigned long long  value,
int  shift 
)

Definition at line 1090 of file intrin_x86.h.

1091 {
1092  /* FIXME: this is probably not optimal */
1093  return (value << shift) | (value >> (64 - shift));
1094 }
Definition: get.c:139
#define shift
Definition: input.c:1594
__INTRIN_INLINE unsigned char __cdecl _rotl8 ( unsigned char  value,
unsigned char  shift 
)

Definition at line 1061 of file intrin_x86.h.

1062 {
1063  unsigned char retval;
1064  __asm__("rolb %b[shift], %b[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1065  return retval;
1066 }
Definition: get.c:139
#define shift
Definition: input.c:1594
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
unsigned int _rotr ( unsigned int  value,
int  shift 
)

Definition at line 1097 of file intrin_x86.h.

1098 {
1099  unsigned int retval;
1100  __asm__("rorl %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1101  return retval;
1102 }
Definition: get.c:139
#define shift
Definition: input.c:1594
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned short __cdecl _rotr16 ( unsigned short  value,
unsigned char  shift 
)

Definition at line 1111 of file intrin_x86.h.

1112 {
1113  unsigned short retval;
1114  __asm__("rorw %b[shift], %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1115  return retval;
1116 }
Definition: get.c:139
#define shift
Definition: input.c:1594
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE unsigned long long __cdecl _rotr64 ( unsigned long long  value,
int  shift 
)

Definition at line 1126 of file intrin_x86.h.

1127 {
1128  /* FIXME: this is probably not optimal */
1129  return (value >> shift) | (value << (64 - shift));
1130 }
Definition: get.c:139
#define shift
Definition: input.c:1594
__INTRIN_INLINE unsigned char __cdecl _rotr8 ( unsigned char  value,
unsigned char  shift 
)

Definition at line 1104 of file intrin_x86.h.

1105 {
1106  unsigned char retval;
1107  __asm__("rorb %b[shift], %b[retval]" : [retval] "=qm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1108  return retval;
1109 }
Definition: get.c:139
#define shift
Definition: input.c:1594
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void _sgdt ( void Destination)

Definition at line 1818 of file intrin_x86.h.

Referenced by ImgArchEfiStartBootApplication(), and Mmx86InitializeMemoryMap().

1819 {
1820  __asm__ __volatile__("sgdt %0" : : "m"(*(short*)Destination) : "memory");
1821 }
__asm__("\t.globl GetPhys\n""GetPhys:\t\n""mflr 0\n\t""stwu 0,-16(1)\n\t""mfmsr 5\n\t""andi. 6,5,0xffef\n\t""mtmsr 6\n\t""isync\n\t""sync\n\t""lwz 3,0(3)\n\t""mtmsr 5\n\t""isync\n\t""sync\n\t""lwz 0,0(1)\n\t""addi 1,1,16\n\t""mtlr 0\n\t""blr")
__INTRIN_INLINE void* __cdecl memcpy ( void dest,
const void source,
size_t  num 
)

Definition at line 74 of file intrin_x86.h.

75 {
76  return memmove(dest, source, num);
77 }
GLuint GLuint num
Definition: glext.h:9618
void *__cdecl memmove(void *dest, const void *source, size_t num)
Definition: memmove.c:4
void* __cdecl memmove ( void dest,
const void source,
size_t  num 
)

Definition at line 4 of file memmove.c.

Referenced by memcpy().

5 {
6  char *char_dest = (char *)dest;
7  char *char_src = (char *)src;
8 
9  if ((char_dest <= char_src) || (char_dest >= (char_src+count)))
10  {
11  /* non-overlapping buffers */
12  while(count > 0)
13  {
14  *char_dest = *char_src;
15  char_dest++;
16  char_src++;
17  count--;
18  }
19  }
20  else
21  {
22  /* overlaping buffers */
23  char_dest = (char *)dest + count - 1;
24  char_src = (char *)src + count - 1;
25 
26  while(count > 0)
27  {
28  *char_dest = *char_src;
29  char_dest--;
30  char_src--;
31  count--;
32  }
33  }
34 
35  return dest;
36 }
GLuint const GLubyte GLvoid * src
Definition: s_context.h:57
GLfloat CONST GLvector4f CONST GLfloat GLvector4f * dest
Definition: m_xform.h:122
GLuint GLuint GLsizei count
Definition: gl.h:1545