ReactOS  0.4.15-dev-1386-g5cb9f87
intrin_x86.h File Reference

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Macros

#define _ReturnAddress()   (__builtin_return_address(0))
 
#define _AddressOfReturnAddress()   (&(((void **)(__builtin_frame_address(0)))[1]))
 
#define _ReadBarrier   _ReadWriteBarrier
 
#define _WriteBarrier   _ReadWriteBarrier
 

Functions

void *__cdecl memmove (void *dest, const void *source, size_t num)
 
__INTRIN_INLINE void *__cdecl memcpy (void *dest, const void *source, size_t num)
 
__INTRIN_INLINE void _ReadWriteBarrier (void)
 
__INTRIN_INLINE void _mm_mfence (void)
 
__INTRIN_INLINE void _mm_lfence (void)
 
__INTRIN_INLINE void _mm_sfence (void)
 
__INTRIN_INLINE char _InterlockedCompareExchange8 (volatile char *Destination, char Exchange, char Comperand)
 
__INTRIN_INLINE short _InterlockedCompareExchange16 (volatile short *Destination, short Exchange, short Comperand)
 
__INTRIN_INLINE long _InterlockedCompareExchange (volatile long *Destination, long Exchange, long Comperand)
 
__INTRIN_INLINE void_InterlockedCompareExchangePointer (void *volatile *Destination, void *Exchange, void *Comperand)
 
__INTRIN_INLINE char _InterlockedExchange8 (volatile char *Target, char Value)
 
__INTRIN_INLINE short _InterlockedExchange16 (volatile short *Target, short Value)
 
__INTRIN_INLINE long _InterlockedExchange (volatile long *Target, long Value)
 
__INTRIN_INLINE void_InterlockedExchangePointer (void *volatile *Target, void *Value)
 
__INTRIN_INLINE char _InterlockedExchangeAdd8 (char volatile *Addend, char Value)
 
__INTRIN_INLINE short _InterlockedExchangeAdd16 (volatile short *Addend, short Value)
 
__INTRIN_INLINE long _InterlockedExchangeAdd (volatile long *Addend, long Value)
 
__INTRIN_INLINE char _InterlockedAnd8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedAnd16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedAnd (volatile long *value, long mask)
 
__INTRIN_INLINE char _InterlockedOr8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedOr16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedOr (volatile long *value, long mask)
 
__INTRIN_INLINE char _InterlockedXor8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedXor16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedXor (volatile long *value, long mask)
 
__INTRIN_INLINE long _InterlockedDecrement (volatile long *lpAddend)
 
__INTRIN_INLINE long _InterlockedIncrement (volatile long *lpAddend)
 
__INTRIN_INLINE short _InterlockedDecrement16 (volatile short *lpAddend)
 
__INTRIN_INLINE short _InterlockedIncrement16 (volatile short *lpAddend)
 
__INTRIN_INLINE long long _InterlockedCompareExchange64 (volatile long long *Destination, long long Exchange, long long Comperand)
 
__INTRIN_INLINE unsigned char _interlockedbittestandreset (volatile long *a, long b)
 
__INTRIN_INLINE unsigned char _interlockedbittestandset (volatile long *a, long b)
 
__INTRIN_INLINE void __stosb (unsigned char *Dest, unsigned char Data, size_t Count)
 
__INTRIN_INLINE void __stosw (unsigned short *Dest, unsigned short Data, size_t Count)
 
__INTRIN_INLINE void __stosd (unsigned long *Dest, unsigned long Data, size_t Count)
 
__INTRIN_INLINE void __movsb (unsigned char *Destination, const unsigned char *Source, size_t Count)
 
__INTRIN_INLINE void __movsw (unsigned short *Destination, const unsigned short *Source, size_t Count)
 
__INTRIN_INLINE void __movsd (unsigned long *Destination, const unsigned long *Source, size_t Count)
 
__INTRIN_INLINE void __writefsbyte (unsigned long Offset, unsigned char Data)
 
__INTRIN_INLINE void __writefsword (unsigned long Offset, unsigned short Data)
 
__INTRIN_INLINE void __writefsdword (unsigned long Offset, unsigned long Data)
 
__INTRIN_INLINE unsigned char __readfsbyte (unsigned long Offset)
 
__INTRIN_INLINE unsigned short __readfsword (unsigned long Offset)
 
__INTRIN_INLINE unsigned long __readfsdword (unsigned long Offset)
 
__INTRIN_INLINE void __incfsbyte (unsigned long Offset)
 
__INTRIN_INLINE void __incfsword (unsigned long Offset)
 
__INTRIN_INLINE void __incfsdword (unsigned long Offset)
 
__INTRIN_INLINE void __addfsbyte (unsigned long Offset, unsigned char Data)
 
__INTRIN_INLINE void __addfsword (unsigned long Offset, unsigned short Data)
 
__INTRIN_INLINE void __addfsdword (unsigned long Offset, unsigned long Data)
 
__INTRIN_INLINE unsigned char _BitScanForward (unsigned long *Index, unsigned long Mask)
 
__INTRIN_INLINE unsigned char _BitScanReverse (unsigned long *Index, unsigned long Mask)
 
__INTRIN_INLINE unsigned char _bittest (const long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandcomplement (long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandreset (long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandset (long *a, long b)
 
__INTRIN_INLINE unsigned char __cdecl _rotl8 (unsigned char value, unsigned char shift)
 
__INTRIN_INLINE unsigned short __cdecl _rotl16 (unsigned short value, unsigned char shift)
 
__INTRIN_INLINE unsigned int __cdecl _rotl (unsigned int value, int shift)
 
__INTRIN_INLINE unsigned long long __cdecl _rotl64 (unsigned long long value, int shift)
 
__INTRIN_INLINE unsigned int __cdecl _rotr (unsigned int value, int shift)
 
__INTRIN_INLINE unsigned char __cdecl _rotr8 (unsigned char value, unsigned char shift)
 
__INTRIN_INLINE unsigned short __cdecl _rotr16 (unsigned short value, unsigned char shift)
 
__INTRIN_INLINE unsigned long long __cdecl _rotr64 (unsigned long long value, int shift)
 
__INTRIN_INLINE unsigned long __cdecl _lrotl (unsigned long value, int shift)
 
__INTRIN_INLINE unsigned long __cdecl _lrotr (unsigned long value, int shift)
 
__INTRIN_INLINE unsigned long long __ll_lshift (unsigned long long Mask, int Bit)
 
__INTRIN_INLINE long long __ll_rshift (long long Mask, int Bit)
 
__INTRIN_INLINE unsigned long long __ull_rshift (unsigned long long Mask, int Bit)
 
__INTRIN_INLINE unsigned short __cdecl _byteswap_ushort (unsigned short value)
 
__INTRIN_INLINE unsigned long __cdecl _byteswap_ulong (unsigned long value)
 
__INTRIN_INLINE unsigned long long __cdecl _byteswap_uint64 (unsigned long long value)
 
__INTRIN_INLINE unsigned int __lzcnt (unsigned int value)
 
__INTRIN_INLINE unsigned short __lzcnt16 (unsigned short value)
 
__INTRIN_INLINE unsigned int __popcnt (unsigned int value)
 
__INTRIN_INLINE unsigned short __popcnt16 (unsigned short value)
 
__INTRIN_INLINE long long __emul (int a, int b)
 
__INTRIN_INLINE unsigned long long __emulu (unsigned int a, unsigned int b)
 
__INTRIN_INLINE long long __cdecl _abs64 (long long value)
 
__INTRIN_INLINE unsigned char __inbyte (unsigned short Port)
 
__INTRIN_INLINE unsigned short __inword (unsigned short Port)
 
__INTRIN_INLINE unsigned long __indword (unsigned short Port)
 
__INTRIN_INLINE void __inbytestring (unsigned short Port, unsigned char *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __inwordstring (unsigned short Port, unsigned short *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __indwordstring (unsigned short Port, unsigned long *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outbyte (unsigned short Port, unsigned char Data)
 
__INTRIN_INLINE void __outword (unsigned short Port, unsigned short Data)
 
__INTRIN_INLINE void __outdword (unsigned short Port, unsigned long Data)
 
__INTRIN_INLINE void __outbytestring (unsigned short Port, unsigned char *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outwordstring (unsigned short Port, unsigned short *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outdwordstring (unsigned short Port, unsigned long *Buffer, unsigned long Count)
 
__INTRIN_INLINE int __cdecl _inp (unsigned short Port)
 
__INTRIN_INLINE unsigned short __cdecl _inpw (unsigned short Port)
 
__INTRIN_INLINE unsigned long __cdecl _inpd (unsigned short Port)
 
__INTRIN_INLINE int __cdecl _outp (unsigned short Port, int databyte)
 
__INTRIN_INLINE unsigned short __cdecl _outpw (unsigned short Port, unsigned short dataword)
 
__INTRIN_INLINE unsigned long __cdecl _outpd (unsigned short Port, unsigned long dataword)
 
__INTRIN_INLINE void __cpuid (int CPUInfo[4], int InfoType)
 
__INTRIN_INLINE void __cpuidex (int CPUInfo[4], int InfoType, int ECXValue)
 
__INTRIN_INLINE unsigned long long __rdtsc (void)
 
__INTRIN_INLINE void __writeeflags (uintptr_t Value)
 
__INTRIN_INLINE uintptr_t __readeflags (void)
 
__INTRIN_INLINE void __cdecl __debugbreak (void)
 
__INTRIN_INLINE void __ud2 (void)
 
__INTRIN_INLINE void __int2c (void)
 
__INTRIN_INLINE void __cdecl _disable (void)
 
__INTRIN_INLINE void __cdecl _enable (void)
 
__INTRIN_INLINE void __halt (void)
 
 __declspec (noreturn) __INTRIN_INLINE void __fastfail(unsigned int Code)
 
__INTRIN_INLINE void __writecr0 (unsigned int Data)
 
__INTRIN_INLINE void __writecr3 (unsigned int Data)
 
__INTRIN_INLINE void __writecr4 (unsigned int Data)
 
__INTRIN_INLINE unsigned long __readcr0 (void)
 
__INTRIN_INLINE unsigned long __readcr2 (void)
 
__INTRIN_INLINE unsigned long __readcr3 (void)
 
__INTRIN_INLINE unsigned long __readcr4 (void)
 
__INTRIN_INLINE unsigned int __readdr (unsigned int reg)
 
__INTRIN_INLINE void __writedr (unsigned reg, unsigned int value)
 
__INTRIN_INLINE void __invlpg (void *Address)
 
__INTRIN_INLINE unsigned long long __readmsr (unsigned long reg)
 
__INTRIN_INLINE void __writemsr (unsigned long Register, unsigned long long Value)
 
__INTRIN_INLINE unsigned long long __readpmc (unsigned long counter)
 
__INTRIN_INLINE unsigned long __segmentlimit (unsigned long a)
 
__INTRIN_INLINE void __wbinvd (void)
 
__INTRIN_INLINE void __lidt (void *Source)
 
__INTRIN_INLINE void __sidt (void *Destination)
 
__INTRIN_INLINE void _sgdt (void *Destination)
 
__INTRIN_INLINE void _mm_pause (void)
 
__INTRIN_INLINE void __nop (void)
 

Macro Definition Documentation

◆ _AddressOfReturnAddress

#define _AddressOfReturnAddress (   void)    (&(((void **)(__builtin_frame_address(0)))[1]))

Definition at line 82 of file intrin_x86.h.

◆ _ReadBarrier

#define _ReadBarrier   _ReadWriteBarrier

Definition at line 95 of file intrin_x86.h.

◆ _ReturnAddress

#define _ReturnAddress (   void)    (__builtin_return_address(0))

Definition at line 81 of file intrin_x86.h.

◆ _WriteBarrier

#define _WriteBarrier   _ReadWriteBarrier

Definition at line 96 of file intrin_x86.h.

Function Documentation

◆ __addfsbyte()

__INTRIN_INLINE void __addfsbyte ( unsigned long  Offset,
unsigned char  Data 
)

Definition at line 1002 of file intrin_x86.h.

1003 {
1004  if(!__builtin_constant_p(Offset))
1005  __asm__ __volatile__("addb %b[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
1006  else
1007  __asm__ __volatile__("addb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
1008 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __addfsdword()

__INTRIN_INLINE void __addfsdword ( unsigned long  Offset,
unsigned long  Data 
)

Definition at line 1018 of file intrin_x86.h.

1019 {
1020  if(!__builtin_constant_p(Offset))
1021  __asm__ __volatile__("addl %k[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
1022  else
1023  __asm__ __volatile__("addl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
1024 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __addfsword()

__INTRIN_INLINE void __addfsword ( unsigned long  Offset,
unsigned short  Data 
)

Definition at line 1010 of file intrin_x86.h.

1011 {
1012  if(!__builtin_constant_p(Offset))
1013  __asm__ __volatile__("addw %w[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
1014  else
1015  __asm__ __volatile__("addw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
1016 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __cpuid()

__INTRIN_INLINE void __cpuid ( int  CPUInfo[4],
int  InfoType 
)

Definition at line 1573 of file intrin_x86.h.

1574 {
1575  __asm__ __volatile__("cpuid" : "=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3]) : "a" (InfoType));
1576 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
CPUINFO CPUInfo[]
Definition: parse.c:231

◆ __cpuidex()

__INTRIN_INLINE void __cpuidex ( int  CPUInfo[4],
int  InfoType,
int  ECXValue 
)

Definition at line 1578 of file intrin_x86.h.

1579 {
1580  __asm__ __volatile__("cpuid" : "=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3]) : "a" (InfoType), "c" (ECXValue));
1581 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
CPUINFO CPUInfo[]
Definition: parse.c:231

Referenced by BlArchCpuId(), and ZSTD_cpuid().

◆ __debugbreak()

◆ __declspec()

__declspec ( noreturn  )

Definition at line 1649 of file intrin_x86.h.

1651 {
1652  __asm__("int $0x29" : : "c"(Code) : "memory");
1653  __builtin_unreachable();
1654 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ UCHAR _In_ UCHAR _In_ ULONG Code
Definition: wdfdevice.h:1697

◆ __emul()

__INTRIN_INLINE long long __emul ( int  a,
int  b 
)

Definition at line 1411 of file intrin_x86.h.

1412 {
1413  long long retval;
1414  __asm__("imull %[b]" : "=A" (retval) : [a] "a" (a), [b] "rm" (b));
1415  return retval;
1416 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ __emulu()

Definition at line 1420 of file intrin_x86.h.

1421 {
1422  unsigned long long retval;
1423  __asm__("mull %[b]" : "=A" (retval) : [a] "a" (a), [b] "rm" (b));
1424  return retval;
1425 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ __halt()

__INTRIN_INLINE void __halt ( void  )

Definition at line 1643 of file intrin_x86.h.

1644 {
1645  __asm__("hlt" : : : "memory");
1646 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by FrLdrBugCheckEx(), FrLdrBugCheckWithMessage(), HaliHaltSystem(), HalpReboot(), HalProcessorIdle(), HalpXboxPowerAction(), and MachInit().

◆ __inbyte()

Definition at line 1453 of file intrin_x86.h.

1454 {
1455  unsigned char byte;
1456  __asm__ __volatile__("inb %w[Port], %b[byte]" : [byte] "=a" (byte) : [Port] "Nd" (Port));
1457  return byte;
1458 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define byte(x, n)
Definition: tomcrypt.h:118

Referenced by _inp().

◆ __inbytestring()

__INTRIN_INLINE void __inbytestring ( unsigned short  Port,
unsigned char Buffer,
unsigned long  Count 
)

Definition at line 1474 of file intrin_x86.h.

1475 {
1476  __asm__ __volatile__
1477  (
1478  "rep; insb" :
1479  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1480  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1481  "memory"
1482  );
1483 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45
int Count
Definition: noreturn.cpp:7

◆ __incfsbyte()

__INTRIN_INLINE void __incfsbyte ( unsigned long  Offset)

Definition at line 986 of file intrin_x86.h.

987 {
988  __asm__ __volatile__("incb %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
989 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __incfsdword()

__INTRIN_INLINE void __incfsdword ( unsigned long  Offset)

Definition at line 996 of file intrin_x86.h.

997 {
998  __asm__ __volatile__("incl %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
999 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __incfsword()

__INTRIN_INLINE void __incfsword ( unsigned long  Offset)

Definition at line 991 of file intrin_x86.h.

992 {
993  __asm__ __volatile__("incw %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
994 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __indword()

Definition at line 1467 of file intrin_x86.h.

1468 {
1469  unsigned long dword;
1470  __asm__ __volatile__("inl %w[Port], %k[dword]" : [dword] "=a" (dword) : [Port] "Nd" (Port));
1471  return dword;
1472 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _inpd().

◆ __indwordstring()

__INTRIN_INLINE void __indwordstring ( unsigned short  Port,
unsigned long Buffer,
unsigned long  Count 
)

Definition at line 1496 of file intrin_x86.h.

1497 {
1498  __asm__ __volatile__
1499  (
1500  "rep; insl" :
1501  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1502  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1503  "memory"
1504  );
1505 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45
int Count
Definition: noreturn.cpp:7

◆ __int2c()

__INTRIN_INLINE void __int2c ( void  )

Definition at line 1627 of file intrin_x86.h.

1628 {
1629  __asm__("int $0x2c");
1630 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __invlpg()

__INTRIN_INLINE void __invlpg ( void Address)

Definition at line 1897 of file intrin_x86.h.

1898 {
1899  __asm__ __volatile__ ("invlpg (%[Address])" : : [Address] "b" (Address) : "memory");
1900 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static WCHAR Address[46]
Definition: ping.c:68

Referenced by KeInvalidateTlbEntry(), KiMarkPageAsReadOnly(), MiFlushTlb(), MiFlushTlbIpiRoutine(), MmCreateProcessAddressSpace(), MmDefpFlushTlbEntry(), MmSetCleanPage(), and MmSetDirtyPage().

◆ __inword()

Definition at line 1460 of file intrin_x86.h.

1461 {
1462  unsigned short word;
1463  __asm__ __volatile__("inw %w[Port], %w[word]" : [word] "=a" (word) : [Port] "Nd" (Port));
1464  return word;
1465 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
const WCHAR * word
Definition: lex.c:36

Referenced by _inpw().

◆ __inwordstring()

__INTRIN_INLINE void __inwordstring ( unsigned short  Port,
unsigned short Buffer,
unsigned long  Count 
)

Definition at line 1485 of file intrin_x86.h.

1486 {
1487  __asm__ __volatile__
1488  (
1489  "rep; insw" :
1490  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1491  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1492  "memory"
1493  );
1494 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45
int Count
Definition: noreturn.cpp:7

◆ __lidt()

__INTRIN_INLINE void __lidt ( void Source)

Definition at line 1947 of file intrin_x86.h.

1948 {
1949  __asm__ __volatile__("lidt %0" : : "m"(*(short*)Source));
1950 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3167

Referenced by Amd64SetupIdt(), BlpArchInitialize(), KeInitExceptions(), KiI386PentiumLockErrataFixup(), KiRestoreProcessorControlState(), and WinLdrSetProcessorContext().

◆ __ll_lshift()

__INTRIN_INLINE unsigned long long __ll_lshift ( unsigned long long  Mask,
int  Bit 
)

Definition at line 1287 of file intrin_x86.h.

1288 {
1289  unsigned long long retval = Mask;
1290 
1291  __asm__
1292  (
1293  "shldl %b[Bit], %%eax, %%edx; sall %b[Bit], %%eax" :
1294  "+A" (retval) :
1295  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1296  );
1297 
1298  return retval;
1299 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
processorSet Mask

◆ __ll_rshift()

__INTRIN_INLINE long long __ll_rshift ( long long  Mask,
int  Bit 
)

Definition at line 1301 of file intrin_x86.h.

1302 {
1303  long long retval = Mask;
1304 
1305  __asm__
1306  (
1307  "shrdl %b[Bit], %%edx, %%eax; sarl %b[Bit], %%edx" :
1308  "+A" (retval) :
1309  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1310  );
1311 
1312  return retval;
1313 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
processorSet Mask

◆ __lzcnt()

__INTRIN_INLINE unsigned int __lzcnt ( unsigned int  value)

Definition at line 1369 of file intrin_x86.h.

1370 {
1371  return __builtin_clz(value);
1372 }

◆ __lzcnt16()

Definition at line 1376 of file intrin_x86.h.

1377 {
1378  return __builtin_clz(value);
1379 }

◆ __movsb()

__INTRIN_INLINE void __movsb ( unsigned char Destination,
const unsigned char Source,
size_t  Count 
)

Definition at line 806 of file intrin_x86.h.

807 {
808  __asm__ __volatile__
809  (
810  "rep; movsb" :
811  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
812  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
813  );
814 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
int Count
Definition: noreturn.cpp:7
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3167

◆ __movsd()

__INTRIN_INLINE void __movsd ( unsigned long Destination,
const unsigned long Source,
size_t  Count 
)

Definition at line 826 of file intrin_x86.h.

827 {
828  __asm__ __volatile__
829  (
830  "rep; movsd" :
831  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
832  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
833  );
834 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
int Count
Definition: noreturn.cpp:7
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3167

◆ __movsw()

__INTRIN_INLINE void __movsw ( unsigned short Destination,
const unsigned short Source,
size_t  Count 
)

Definition at line 816 of file intrin_x86.h.

817 {
818  __asm__ __volatile__
819  (
820  "rep; movsw" :
821  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
822  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
823  );
824 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
int Count
Definition: noreturn.cpp:7
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3167

◆ __nop()

__INTRIN_INLINE void __nop ( void  )

Definition at line 1971 of file intrin_x86.h.

1972 {
1973  __asm__ __volatile__("nop");
1974 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by HalpRead8254Value().

◆ __outbyte()

__INTRIN_INLINE void __outbyte ( unsigned short  Port,
unsigned char  Data 
)

Definition at line 1507 of file intrin_x86.h.

1508 {
1509  __asm__ __volatile__("outb %b[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1510 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _outp().

◆ __outbytestring()

__INTRIN_INLINE void __outbytestring ( unsigned short  Port,
unsigned char Buffer,
unsigned long  Count 
)

Definition at line 1522 of file intrin_x86.h.

1523 {
1524  __asm__ __volatile__("rep; outsb" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1525 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45
int Count
Definition: noreturn.cpp:7

◆ __outdword()

__INTRIN_INLINE void __outdword ( unsigned short  Port,
unsigned long  Data 
)

Definition at line 1517 of file intrin_x86.h.

1518 {
1519  __asm__ __volatile__("outl %k[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1520 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _outpd().

◆ __outdwordstring()

__INTRIN_INLINE void __outdwordstring ( unsigned short  Port,
unsigned long Buffer,
unsigned long  Count 
)

Definition at line 1532 of file intrin_x86.h.

1533 {
1534  __asm__ __volatile__("rep; outsl" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1535 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45
int Count
Definition: noreturn.cpp:7

◆ __outword()

__INTRIN_INLINE void __outword ( unsigned short  Port,
unsigned short  Data 
)

Definition at line 1512 of file intrin_x86.h.

1513 {
1514  __asm__ __volatile__("outw %w[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1515 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _outpw().

◆ __outwordstring()

__INTRIN_INLINE void __outwordstring ( unsigned short  Port,
unsigned short Buffer,
unsigned long  Count 
)

Definition at line 1527 of file intrin_x86.h.

1528 {
1529  __asm__ __volatile__("rep; outsw" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1530 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45
int Count
Definition: noreturn.cpp:7

◆ __popcnt()

__INTRIN_INLINE unsigned int __popcnt ( unsigned int  value)

Definition at line 1383 of file intrin_x86.h.

1384 {
1385  return __builtin_popcount(value);
1386 }

◆ __popcnt16()

__INTRIN_INLINE unsigned short __popcnt16 ( unsigned short  value)

Definition at line 1390 of file intrin_x86.h.

1391 {
1392  return __builtin_popcount(value);
1393 }

◆ __rdtsc()

Definition at line 1584 of file intrin_x86.h.

1585 {
1586 #ifdef __x86_64__
1587  unsigned long long low, high;
1588  __asm__ __volatile__("rdtsc" : "=a"(low), "=d"(high));
1589  return low | (high << 32);
1590 #else
1591  unsigned long long retval;
1592  __asm__ __volatile__("rdtsc" : "=A"(retval));
1593  return retval;
1594 #endif
1595 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __readcr0()

__INTRIN_INLINE unsigned long __readcr0 ( void  )

Definition at line 1733 of file intrin_x86.h.

1734 {
1735  unsigned long value;
1736  __asm__ __volatile__("mov %%cr0, %[value]" : [value] "=r" (value));
1737  return value;
1738 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by ArchSwitchContext(), BlpArchEnableTranslation(), HalpBiosCall(), KiCoprocessorError(), KiFlushNPXState(), KiInitializeCpu(), KiIsNpxErrataPresent(), KiIsNpxPresent(), KiNpxHandler(), KiSaveProcessorControlState(), KiSetCR0Bits(), KiSwapContextEntry(), KiTrap07Handler(), KiTrap13Handler(), and WinLdrSetProcessorContext().

◆ __readcr2()

__INTRIN_INLINE unsigned long __readcr2 ( void  )

Definition at line 1740 of file intrin_x86.h.

1741 {
1742  unsigned long value;
1743  __asm__ __volatile__("mov %%cr2, %[value]" : [value] "=r" (value));
1744  return value;
1745 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by KdbEnterDebuggerException(), KiSaveProcessorControlState(), and KiTrap0EHandler().

◆ __readcr3()

__INTRIN_INLINE unsigned long __readcr3 ( void  )

Definition at line 1747 of file intrin_x86.h.

1748 {
1749  unsigned long value;
1750  __asm__ __volatile__("mov %%cr3, %[value]" : [value] "=r" (value));
1751  return value;
1752 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by HalpFlushTLB(), KdpTranslateAddress(), KeFlushCurrentTb(), KeFlushProcessTb(), Ki386EnableGlobalPage(), Ki386InitializeTss(), KiSaveProcessorControlState(), MiInitializePageTable(), and MmDefpFlushTlb().

◆ __readcr4()

__INTRIN_INLINE unsigned long __readcr4 ( void  )

Definition at line 1754 of file intrin_x86.h.

1755 {
1756  unsigned long value;
1757  __asm__ __volatile__("mov %%cr4, %[value]" : [value] "=r" (value));
1758  return value;
1759 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by ArchInitializeContext(), ArchRestoreProcessorFeatures(), ArchSwitchContext(), BlpArchEnableTranslation(), HalpFlushTLB(), KdpTranslateAddress(), KeFlushCurrentTb(), Ki386EnableDE(), Ki386EnableFxsr(), Ki386EnableGlobalPage(), Ki386EnableXMMIExceptions(), Ki386VdmEnablePentiumExtentions(), KiInitializeCpu(), KiSaveProcessorControlState(), MiInitializePageTable(), and MiUseLargeDriverPage().

◆ __readdr()

Definition at line 1831 of file intrin_x86.h.

1832 {
1833  unsigned int value;
1834  switch (reg)
1835  {
1836  case 0:
1837  __asm__ __volatile__("mov %%dr0, %[value]" : [value] "=r" (value));
1838  break;
1839  case 1:
1840  __asm__ __volatile__("mov %%dr1, %[value]" : [value] "=r" (value));
1841  break;
1842  case 2:
1843  __asm__ __volatile__("mov %%dr2, %[value]" : [value] "=r" (value));
1844  break;
1845  case 3:
1846  __asm__ __volatile__("mov %%dr3, %[value]" : [value] "=r" (value));
1847  break;
1848  case 4:
1849  __asm__ __volatile__("mov %%dr4, %[value]" : [value] "=r" (value));
1850  break;
1851  case 5:
1852  __asm__ __volatile__("mov %%dr5, %[value]" : [value] "=r" (value));
1853  break;
1854  case 6:
1855  __asm__ __volatile__("mov %%dr6, %[value]" : [value] "=r" (value));
1856  break;
1857  case 7:
1858  __asm__ __volatile__("mov %%dr7, %[value]" : [value] "=r" (value));
1859  break;
1860  }
1861  return value;
1862 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static int reg
Definition: i386-dis.c:1283
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by KiEnterV86Trap(), KiHandleDebugRegistersOnTrapEntry(), and KiSaveProcessorControlState().

◆ __readeflags()

__INTRIN_INLINE uintptr_t __readeflags ( void  )

Definition at line 1603 of file intrin_x86.h.

1604 {
1605  uintptr_t retval;
1606  __asm__ __volatile__("pushf\n pop %0" : "=rm"(retval));
1607  return retval;
1608 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
unsigned int uintptr_t
Definition: crtdefs.h:300

Referenced by HalBeginSystemInterrupt(), HalCalibratePerformanceCounter(), HalEndSystemInterrupt(), HalpAcquireCmosSpinLock(), HalpApcInterruptHandler(), HalpBiosCall(), HalpBiosDisplayReset(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializeLegacyPICs(), HalpInitializePICs(), HalpInitializeTsc(), HalpLowerIrql(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KeDisableInterrupts(), KeGetCurrentIrql(), KeQueryPerformanceCounter(), KeSetCurrentIrql(), KfLowerIrql(), KfRaiseIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiEnterV86Mode(), KiFlushNPXState(), KiSetProcessorType(), KiTrap02Handler(), KiTrap08Handler(), KmtAreInterruptsEnabled(), and Test_strlen().

◆ __readfsbyte()

__INTRIN_INLINE unsigned char __readfsbyte ( unsigned long  Offset)

Definition at line 960 of file intrin_x86.h.

961 {
962  unsigned char value;
963  __asm__ __volatile__("movb %%fs:%a[Offset], %b[value]" : [value] "=q" (value) : [Offset] "ir" (Offset));
964  return value;
965 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __readfsdword()

__INTRIN_INLINE unsigned long __readfsdword ( unsigned long  Offset)

Definition at line 978 of file intrin_x86.h.

979 {
980  unsigned long value;
981  __asm__ __volatile__("movl %%fs:%a[Offset], %k[value]" : [value] "=r" (value) : [Offset] "ir" (Offset));
982  return value;
983 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __readfsword()

__INTRIN_INLINE unsigned short __readfsword ( unsigned long  Offset)

Definition at line 969 of file intrin_x86.h.

970 {
971  unsigned short value;
972  __asm__ __volatile__("movw %%fs:%a[Offset], %w[value]" : [value] "=r" (value) : [Offset] "ir" (Offset));
973  return value;
974 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __readmsr()

Definition at line 1905 of file intrin_x86.h.

1906 {
1907 #ifdef __x86_64__
1908  unsigned long low, high;
1909  __asm__ __volatile__("rdmsr" : "=a" (low), "=d" (high) : "c" (reg));
1910  return ((unsigned long long)high << 32) | low;
1911 #else
1912  unsigned long long retval;
1913  __asm__ __volatile__("rdmsr" : "=A" (retval) : "c" (reg));
1914  return retval;
1915 #endif
1916 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static int reg
Definition: i386-dis.c:1283

◆ __readpmc()

__INTRIN_INLINE unsigned long long __readpmc ( unsigned long  counter)

Definition at line 1927 of file intrin_x86.h.

1928 {
1929  unsigned long long retval;
1930  __asm__ __volatile__("rdpmc" : "=A" (retval) : "c" (counter));
1931  return retval;
1932 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by KsecReadMachineSpecificCounters().

◆ __segmentlimit()

__INTRIN_INLINE unsigned long __segmentlimit ( unsigned long  a)

Definition at line 1935 of file intrin_x86.h.

1936 {
1937  unsigned long retval;
1938  __asm__ __volatile__("lsl %[a], %[retval]" : [retval] "=r" (retval) : [a] "rm" (a));
1939  return retval;
1940 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ __sidt()

__INTRIN_INLINE void __sidt ( void Destination)

Definition at line 1952 of file intrin_x86.h.

1953 {
1954  __asm__ __volatile__("sidt %0" : : "m"(*(short*)Destination) : "memory");
1955 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

Referenced by Amd64SetupIdt(), BlpArchInitialize(), ImgArchEfiStartBootApplication(), KdbpCmdGdtLdtIdt(), KdbpStepIntoInstruction(), KiGetMachineBootPointers(), KiI386PentiumLockErrataFixup(), KiInitializePcr(), KiSaveProcessorControlState(), Mmx86InitializeMemoryMap(), and WinLdrSetProcessorContext().

◆ __stosb()

__INTRIN_INLINE void __stosb ( unsigned char Dest,
unsigned char  Data,
size_t  Count 
)

Definition at line 763 of file intrin_x86.h.

764 {
765  __asm__ __volatile__
766  (
767  "rep; stosb" :
768  [Dest] "=D" (Dest), [Count] "=c" (Count) :
769  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
770  );
771 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
int Count
Definition: noreturn.cpp:7

◆ __stosd()

__INTRIN_INLINE void __stosd ( unsigned long Dest,
unsigned long  Data,
size_t  Count 
)

Definition at line 784 of file intrin_x86.h.

785 {
786  __asm__ __volatile__
787  (
788  "rep; stosl" :
789  [Dest] "=D" (Dest), [Count] "=c" (Count) :
790  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
791  );
792 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
int Count
Definition: noreturn.cpp:7

◆ __stosw()

__INTRIN_INLINE void __stosw ( unsigned short Dest,
unsigned short  Data,
size_t  Count 
)

Definition at line 774 of file intrin_x86.h.

775 {
776  __asm__ __volatile__
777  (
778  "rep; stosw" :
779  [Dest] "=D" (Dest), [Count] "=c" (Count) :
780  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
781  );
782 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
int Count
Definition: noreturn.cpp:7

◆ __ud2()

__INTRIN_INLINE void __ud2 ( void  )

Definition at line 1620 of file intrin_x86.h.

1621 {
1622  __asm__("ud2");
1623 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __ull_rshift()

__INTRIN_INLINE unsigned long long __ull_rshift ( unsigned long long  Mask,
int  Bit 
)

Definition at line 1315 of file intrin_x86.h.

1316 {
1317  unsigned long long retval = Mask;
1318 
1319  __asm__
1320  (
1321  "shrdl %b[Bit], %%edx, %%eax; shrl %b[Bit], %%edx" :
1322  "+A" (retval) :
1323  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1324  );
1325 
1326  return retval;
1327 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
processorSet Mask

◆ __wbinvd()

__INTRIN_INLINE void __wbinvd ( void  )

Definition at line 1942 of file intrin_x86.h.

1943 {
1944  __asm__ __volatile__("wbinvd" : : : "memory");
1945 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __writecr0()

__INTRIN_INLINE void __writecr0 ( unsigned int  Data)

Definition at line 1718 of file intrin_x86.h.

1719 {
1720  __asm__("mov %[Data], %%cr0" : : [Data] "r" (Data) : "memory");
1721 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by ArchSwitchContext(), BlpArchEnableTranslation(), HalpBiosCall(), KiCoprocessorError(), KiFlushNPXState(), KiInitializeCpu(), KiIsNpxErrataPresent(), KiIsNpxPresent(), KiNpxHandler(), KiRestoreProcessorControlState(), KiSetCR0Bits(), KiSwapContextEntry(), KiTrap07Handler(), KiTrap13Handler(), and WinLdrSetProcessorContext().

◆ __writecr3()

__INTRIN_INLINE void __writecr3 ( unsigned int  Data)

Definition at line 1723 of file intrin_x86.h.

1724 {
1725  __asm__("mov %[Data], %%cr3" : : [Data] "r" (Data) : "memory");
1726 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by HalpFlushTLB(), handle_gdb_read_mem(), handle_gdb_write_mem(), KeFlushCurrentTb(), KeFlushProcessTb(), Ki386EnableGlobalPage(), KiRestoreProcessorControlState(), KiSwapContextExit(), KiSwapContextResume(), KiSwapProcess(), MmDefInitializeTranslation(), MmDefpFlushTlb(), ReadMemorySendHandler(), WinLdrSetProcessorContext(), and WriteMemorySendHandler().

◆ __writecr4()

__INTRIN_INLINE void __writecr4 ( unsigned int  Data)

Definition at line 1728 of file intrin_x86.h.

1729 {
1730  __asm__("mov %[Data], %%cr4" : : [Data] "r" (Data) : "memory");
1731 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by ArchInitializeContext(), ArchRestoreProcessorFeatures(), ArchSwitchContext(), BlpArchEnableTranslation(), HalpFlushTLB(), KeFlushCurrentTb(), Ki386EnableDE(), Ki386EnableFxsr(), Ki386EnableGlobalPage(), Ki386EnableXMMIExceptions(), Ki386VdmEnablePentiumExtentions(), KiInitializeCpu(), KiRestoreProcessorControlState(), and MiInitializePageTable().

◆ __writedr()

__INTRIN_INLINE void __writedr ( unsigned  reg,
unsigned int  value 
)

Definition at line 1864 of file intrin_x86.h.

1865 {
1866  switch (reg)
1867  {
1868  case 0:
1869  __asm__("mov %[value], %%dr0" : : [value] "r" (value) : "memory");
1870  break;
1871  case 1:
1872  __asm__("mov %[value], %%dr1" : : [value] "r" (value) : "memory");
1873  break;
1874  case 2:
1875  __asm__("mov %[value], %%dr2" : : [value] "r" (value) : "memory");
1876  break;
1877  case 3:
1878  __asm__("mov %[value], %%dr3" : : [value] "r" (value) : "memory");
1879  break;
1880  case 4:
1881  __asm__("mov %[value], %%dr4" : : [value] "r" (value) : "memory");
1882  break;
1883  case 5:
1884  __asm__("mov %[value], %%dr5" : : [value] "r" (value) : "memory");
1885  break;
1886  case 6:
1887  __asm__("mov %[value], %%dr6" : : [value] "r" (value) : "memory");
1888  break;
1889  case 7:
1890  __asm__("mov %[value], %%dr7" : : [value] "r" (value) : "memory");
1891  break;
1892  }
1893 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static int reg
Definition: i386-dis.c:1283

Referenced by KiHandleDebugRegistersOnTrapEntry(), KiHandleDebugRegistersOnTrapExit(), KiRestoreProcessorControlState(), and KiSaveProcessorControlState().

◆ __writeeflags()

__INTRIN_INLINE void __writeeflags ( uintptr_t  Value)

Definition at line 1598 of file intrin_x86.h.

1599 {
1600  __asm__ __volatile__("push %0\n popf" : : "rim"(Value));
1601 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406

Referenced by HalCalibratePerformanceCounter(), HalpBiosDisplayReset(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializePICs(), HalpInitializeTsc(), HalpReleaseCmosSpinLock(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KfLowerIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiFlushNPXState(), KiSetProcessorType(), KiTrap02Handler(), KiTrap08Handler(), Test_strlen(), and WinLdrSetProcessorContext().

◆ __writefsbyte()

__INTRIN_INLINE void __writefsbyte ( unsigned long  Offset,
unsigned char  Data 
)

Definition at line 944 of file intrin_x86.h.

945 {
946  __asm__ __volatile__("movb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
947 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __writefsdword()

__INTRIN_INLINE void __writefsdword ( unsigned long  Offset,
unsigned long  Data 
)

Definition at line 954 of file intrin_x86.h.

955 {
956  __asm__ __volatile__("movl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data) : "memory");
957 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __writefsword()

__INTRIN_INLINE void __writefsword ( unsigned long  Offset,
unsigned short  Data 
)

Definition at line 949 of file intrin_x86.h.

950 {
951  __asm__ __volatile__("movw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data) : "memory");
952 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __writemsr()

__INTRIN_INLINE void __writemsr ( unsigned long  Register,
unsigned long long  Value 
)

Definition at line 1918 of file intrin_x86.h.

1919 {
1920 #ifdef __x86_64__
1921  __asm__ __volatile__("wrmsr" : : "a" (Value), "d" (Value >> 32), "c" (Register));
1922 #else
1923  __asm__ __volatile__("wrmsr" : : "A" (Value), "c" (Register));
1924 #endif
1925 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406

◆ _abs64()

Definition at line 1428 of file intrin_x86.h.

1429 {
1430  return (value >= 0) ? value : -value;
1431 }
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ _BitScanForward()

__INTRIN_INLINE unsigned char _BitScanForward ( unsigned long Index,
unsigned long  Mask 
)

Definition at line 1032 of file intrin_x86.h.

1033 {
1034  __asm__("bsfl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
1035  return Mask ? 1 : 0;
1036 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ WDFCOLLECTION _In_ ULONG Index
processorSet Mask

Referenced by GetBestRoute(), and ZSTD_NbCommonBytes().

◆ _BitScanReverse()

__INTRIN_INLINE unsigned char _BitScanReverse ( unsigned long Index,
unsigned long  Mask 
)

Definition at line 1040 of file intrin_x86.h.

1041 {
1042  __asm__("bsrl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
1043  return Mask ? 1 : 0;
1044 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ WDFCOLLECTION _In_ ULONG Index
processorSet Mask

Referenced by BIT_highbit32(), ZSTD_highbit32(), and ZSTD_NbCommonBytes().

◆ _bittest()

__INTRIN_INLINE unsigned char _bittest ( const long a,
long  b 
)

Definition at line 1049 of file intrin_x86.h.

1050 {
1051  unsigned char retval;
1052 
1053  if(__builtin_constant_p(b))
1054  __asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "mr" (*(a + (b / 32))), [b] "Ir" (b % 32));
1055  else
1056  __asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "m" (*a), [b] "r" (b));
1057 
1058  return retval;
1059 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _bittestandcomplement()

__INTRIN_INLINE unsigned char _bittestandcomplement ( long a,
long  b 
)

Definition at line 1093 of file intrin_x86.h.

1094 {
1095  unsigned char retval;
1096 
1097  if(__builtin_constant_p(b))
1098  __asm__("btc %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1099  else
1100  __asm__("btc %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1101 
1102  return retval;
1103 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _bittestandreset()

__INTRIN_INLINE unsigned char _bittestandreset ( long a,
long  b 
)

Definition at line 1107 of file intrin_x86.h.

1108 {
1109  unsigned char retval;
1110 
1111  if(__builtin_constant_p(b))
1112  __asm__("btr %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1113  else
1114  __asm__("btr %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1115 
1116  return retval;
1117 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _bittestandset()

__INTRIN_INLINE unsigned char _bittestandset ( long a,
long  b 
)

Definition at line 1121 of file intrin_x86.h.

1122 {
1123  unsigned char retval;
1124 
1125  if(__builtin_constant_p(b))
1126  __asm__("bts %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1127  else
1128  __asm__("bts %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1129 
1130  return retval;
1131 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _byteswap_uint64()

__INTRIN_INLINE unsigned long long __cdecl _byteswap_uint64 ( unsigned long long  value)

Definition at line 1351 of file intrin_x86.h.

1352 {
1353  union {
1354  unsigned long long int64part;
1355  struct {
1356  unsigned long lowpart;
1357  unsigned long hipart;
1358  };
1359  } retval;
1360  retval.int64part = value;
1361  __asm__("bswapl %[lowpart]\n"
1362  "bswapl %[hipart]\n"
1363  : [lowpart] "=r" (retval.hipart), [hipart] "=r" (retval.lowpart) : "[lowpart]" (retval.lowpart), "[hipart]" (retval.hipart) );
1364  return retval.int64part;
1365 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ _byteswap_ulong()

__INTRIN_INLINE unsigned long __cdecl _byteswap_ulong ( unsigned long  value)

Definition at line 1336 of file intrin_x86.h.

1337 {
1338  unsigned long retval;
1339  __asm__("bswapl %[retval]" : [retval] "=r" (retval) : "[retval]" (value));
1340  return retval;
1341 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _byteswap_ushort()

__INTRIN_INLINE unsigned short __cdecl _byteswap_ushort ( unsigned short  value)

Definition at line 1329 of file intrin_x86.h.

1330 {
1331  unsigned short retval;
1332  __asm__("rorw $8, %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value));
1333  return retval;
1334 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _disable()

__INTRIN_INLINE void __cdecl _disable ( void  )

Definition at line 1633 of file intrin_x86.h.

1634 {
1635  __asm__("cli" : : : "memory");
1636 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _HalpApcInterruptHandler(), _HalpDispatchInterruptHandler(), acpi_suspend(), ArchSwitchContext(), BlpArchEnableTranslation(), CloseBitPlane(), ExAcquireResourceLock(), FrLdrBugCheckEx(), FrLdrBugCheckWithMessage(), HalCalibratePerformanceCounter(), HalDisableSystemInterrupt(), HalDisplayString(), HalEnableSystemInterrupt(), HaliHaltSystem(), HalpAcquireCmosSpinLock(), HalpApcInterruptHandler(), HalpBiosDisplayReset(), HalpDispatchInterruptHandler(), HalpEndSystemInterrupt(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializePICs(), HalpInitializeTsc(), HalpLowerIrql(), HalpReboot(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KeBugCheckWithTf(), KeDisableInterrupts(), KeEnterKernelDebugger(), KeGetCurrentIrql(), KeSetCurrentIrql(), KfLowerIrql(), KfRaiseIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiApcInterrupt(), KiCheckForApcDelivery(), KiCommonExit(), KiDispatchInterrupt(), KiDpcInterruptHandler(), KiEndInterrupt(), KiEnterV86Mode(), KiExitInterrupt(), KiExitSystemCallDebugChecks(), KiExitV86Trap(), KiFlushNPXState(), KiI386PentiumLockErrataFixup(), KiIdleLoop(), KiInterruptDispatch3(), KiIsNpxErrataPresent(), KiRetireDpcList(), KiSetupDecrementerTrap(), KiSwapContextEntry(), KiSwitchKernelStack(), KiSystemService(), KiTimerExpiration(), KiTrap02Handler(), KiTrap06Handler(), KiTrap07Handler(), KiTrap08Handler(), KiTrap0DHandler(), KiUserModeCallout(), MachInit(), MpsTimerHandler(), NtCallbackReturn(), OpenBitPlane(), PopShutdownHandler(), sb16_play(), ScrAcquireOwnership(), ScrSetCursor(), ScrSetCursorShape(), and WinLdrSetProcessorContext().

◆ _enable()

Definition at line 1638 of file intrin_x86.h.

1639 {
1640  __asm__("sti" : : : "memory");
1641 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _HalpApcInterruptHandler(), _HalpDismissIrqGeneric(), _HalpDismissIrqLevel(), _HalpDispatchInterruptHandler(), acpi_suspend(), ArchSwitchContext(), CloseBitPlane(), ExpInitializeExecutive(), ExReleaseResourceLock(), HalBeginSystemInterrupt(), HalDisableSystemInterrupt(), HalEnableSystemInterrupt(), HalpApcInterruptHandler(), HalpDispatchInterruptHandler(), HalpEndSystemInterrupt(), HalpInitializeTsc(), HalpInitPICs(), HalpLowerIrql(), HalProcessorIdle(), KdPollBreakIn(), KeGetCurrentIrql(), KeRemoveQueueDpc(), KeRestoreInterrupts(), KeSetCurrentIrql(), KeThawExecution(), KfLowerIrql(), KfRaiseIrql(), KiApcInterrupt(), KiCheckForApcDelivery(), KiDebugHandler(), KiDispatchInterrupt(), KiDpcInterruptHandler(), KiEnterV86Mode(), KiExitV86Mode(), KiExitV86Trap(), KiI386PentiumLockErrataFixup(), KiIdleLoop(), KiInitializeSystem(), KiInterruptDispatch3(), KiInterruptHandler(), KiIsNpxErrataPresent(), KiNpxHandler(), KiRetireDpcList(), KiSetupDecrementerTrap(), KiSwapContextEntry(), KiSystemCallHandler(), KiSystemService(), KiSystemServiceHandler(), KiSystemStartupBootStack(), KiTimerExpiration(), KiTrap00Handler(), KiTrap01Handler(), KiTrap04Handler(), KiTrap05Handler(), KiTrap06Handler(), KiTrap07Handler(), KiTrap09Handler(), KiTrap0DHandler(), KiTrap0EHandler(), KiTrap10Handler(), KiTrap11Handler(), KiTrap13Handler(), KiUserModeCallout(), MpsTimerHandler(), NtCallbackReturn(), OpenBitPlane(), sb16_play(), ScrAcquireOwnership(), ScrSetCursor(), and ScrSetCursorShape().

◆ _inp()

Definition at line 1537 of file intrin_x86.h.

1538 {
1539  return __inbyte(Port);
1540 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE unsigned char __inbyte(unsigned short Port)
Definition: intrin_x86.h:1453

◆ _inpd()

Definition at line 1547 of file intrin_x86.h.

1548 {
1549  return __indword(Port);
1550 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE unsigned long __indword(unsigned short Port)
Definition: intrin_x86.h:1467

◆ _inpw()

Definition at line 1542 of file intrin_x86.h.

1543 {
1544  return __inword(Port);
1545 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE unsigned short __inword(unsigned short Port)
Definition: intrin_x86.h:1460

◆ _InterlockedAnd()

__INTRIN_INLINE long _InterlockedAnd ( volatile long value,
long  mask 
)

Definition at line 501 of file intrin_x86.h.

502 {
503  long x;
504  long y;
505 
506  y = *value;
507 
508  do
509  {
510  x = y;
512  }
513  while(y != x);
514 
515  return y;
516 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:382
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedAnd16()

__INTRIN_INLINE short _InterlockedAnd16 ( volatile short value,
short  mask 
)

Definition at line 482 of file intrin_x86.h.

483 {
484  short x;
485  short y;
486 
487  y = *value;
488 
489  do
490  {
491  x = y;
493  }
494  while(y != x);
495 
496  return y;
497 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:373
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedAnd8()

__INTRIN_INLINE char _InterlockedAnd8 ( volatile char value,
char  mask 
)

Definition at line 463 of file intrin_x86.h.

464 {
465  char x;
466  char y;
467 
468  y = *value;
469 
470  do
471  {
472  x = y;
474  }
475  while(y != x);
476 
477  return y;
478 }
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:364
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _interlockedbittestandreset()

__INTRIN_INLINE unsigned char _interlockedbittestandreset ( volatile long a,
long  b 
)

Definition at line 724 of file intrin_x86.h.

725 {
726  unsigned char retval;
727  __asm__("lock; btrl %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval), [a] "+m" (*a) : [b] "Ir" (b) : "memory");
728  return retval;
729 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _interlockedbittestandset()

__INTRIN_INLINE unsigned char _interlockedbittestandset ( volatile long a,
long  b 
)

Definition at line 742 of file intrin_x86.h.

743 {
744  unsigned char retval;
745  __asm__("lock; btsl %[b], %[a]; setc %b[retval]" : [retval] "=q" (retval), [a] "+m" (*a) : [b] "Ir" (b) : "memory");
746  return retval;
747 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _InterlockedCompareExchange()

__INTRIN_INLINE long _InterlockedCompareExchange ( volatile long Destination,
long  Exchange,
long  Comperand 
)

Definition at line 382 of file intrin_x86.h.

383 {
384  long retval = Comperand;
385  __asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange): "memory");
386  return retval;
387 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

Referenced by _InterlockedAnd(), _InterlockedOr(), and _InterlockedXor().

◆ _InterlockedCompareExchange16()

__INTRIN_INLINE short _InterlockedCompareExchange16 ( volatile short Destination,
short  Exchange,
short  Comperand 
)

Definition at line 373 of file intrin_x86.h.

374 {
375  short retval = Comperand;
376  __asm__("lock; cmpxchgw %w[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange): "memory");
377  return retval;
378 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

Referenced by _InterlockedAnd16(), _InterlockedOr16(), and _InterlockedXor16().

◆ _InterlockedCompareExchange64()

__INTRIN_INLINE long long _InterlockedCompareExchange64 ( volatile long long Destination,
long long  Exchange,
long long  Comperand 
)

Definition at line 685 of file intrin_x86.h.

686 {
687  long long retval = Comperand;
688 
689  __asm__
690  (
691  "lock; cmpxchg8b %[Destination]" :
692  [retval] "+A" (retval) :
693  [Destination] "m" (*Destination),
694  "b" ((unsigned long)((Exchange >> 0) & 0xFFFFFFFF)),
695  "c" ((unsigned long)((Exchange >> 32) & 0xFFFFFFFF)) :
696  "memory"
697  );
698 
699  return retval;
700 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

◆ _InterlockedCompareExchange8()

__INTRIN_INLINE char _InterlockedCompareExchange8 ( volatile char Destination,
char  Exchange,
char  Comperand 
)

Definition at line 364 of file intrin_x86.h.

365 {
366  char retval = Comperand;
367  __asm__("lock; cmpxchgb %b[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange) : "memory");
368  return retval;
369 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

Referenced by _InterlockedAnd8(), _InterlockedOr8(), and _InterlockedXor8().

◆ _InterlockedCompareExchangePointer()

__INTRIN_INLINE void* _InterlockedCompareExchangePointer ( void *volatile Destination,
void Exchange,
void Comperand 
)

Definition at line 391 of file intrin_x86.h.

392 {
393  void * retval = (void *)Comperand;
394  __asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval] "=a" (retval) : "[retval]" (retval), [Destination] "m" (*Destination), [Exchange] "q" (Exchange) : "memory");
395  return retval;
396 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

◆ _InterlockedDecrement()

__INTRIN_INLINE long _InterlockedDecrement ( volatile long lpAddend)

Definition at line 634 of file intrin_x86.h.

635 {
636  return _InterlockedExchangeAdd(lpAddend, -1) - 1;
637 }
__INTRIN_INLINE long _InterlockedExchangeAdd(volatile long *Addend, long Value)
Definition: intrin_x86.h:454

◆ _InterlockedDecrement16()

__INTRIN_INLINE short _InterlockedDecrement16 ( volatile short lpAddend)

Definition at line 648 of file intrin_x86.h.

649 {
650  return _InterlockedExchangeAdd16(lpAddend, -1) - 1;
651 }
__INTRIN_INLINE short _InterlockedExchangeAdd16(volatile short *Addend, short Value)
Definition: intrin_x86.h:445

◆ _InterlockedExchange()

__INTRIN_INLINE long _InterlockedExchange ( volatile long Target,
long  Value 
)

Definition at line 418 of file intrin_x86.h.

419 {
420  long retval = Value;
421  __asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
422  return retval;
423 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406
_In_ WDFIOTARGET Target
Definition: wdfrequest.h:306

◆ _InterlockedExchange16()

__INTRIN_INLINE short _InterlockedExchange16 ( volatile short Target,
short  Value 
)

Definition at line 409 of file intrin_x86.h.

410 {
411  short retval = Value;
412  __asm__("xchgw %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
413  return retval;
414 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406
_In_ WDFIOTARGET Target
Definition: wdfrequest.h:306

◆ _InterlockedExchange8()

__INTRIN_INLINE char _InterlockedExchange8 ( volatile char Target,
char  Value 
)

Definition at line 400 of file intrin_x86.h.

401 {
402  char retval = Value;
403  __asm__("xchgb %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
404  return retval;
405 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406
_In_ WDFIOTARGET Target
Definition: wdfrequest.h:306

◆ _InterlockedExchangeAdd()

__INTRIN_INLINE long _InterlockedExchangeAdd ( volatile long Addend,
long  Value 
)

Definition at line 454 of file intrin_x86.h.

455 {
456  long retval = Value;
457  __asm__("lock; xaddl %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
458  return retval;
459 }
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406

Referenced by _InterlockedDecrement(), and _InterlockedIncrement().

◆ _InterlockedExchangeAdd16()

__INTRIN_INLINE short _InterlockedExchangeAdd16 ( volatile short Addend,
short  Value 
)

Definition at line 445 of file intrin_x86.h.

446 {
447  short retval = Value;
448  __asm__("lock; xaddw %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
449  return retval;
450 }
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406

Referenced by _InterlockedDecrement16(), and _InterlockedIncrement16().

◆ _InterlockedExchangeAdd8()

__INTRIN_INLINE char _InterlockedExchangeAdd8 ( char volatile Addend,
char  Value 
)

Definition at line 436 of file intrin_x86.h.

437 {
438  char retval = Value;
439  __asm__("lock; xaddb %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
440  return retval;
441 }
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406

◆ _InterlockedExchangePointer()

__INTRIN_INLINE void* _InterlockedExchangePointer ( void *volatile Target,
void Value 
)

Definition at line 427 of file intrin_x86.h.

428 {
429  void * retval = Value;
430  __asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
431  return retval;
432 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406
_In_ WDFIOTARGET Target
Definition: wdfrequest.h:306

◆ _InterlockedIncrement()

__INTRIN_INLINE long _InterlockedIncrement ( volatile long lpAddend)

Definition at line 641 of file intrin_x86.h.

642 {
643  return _InterlockedExchangeAdd(lpAddend, 1) + 1;
644 }
__INTRIN_INLINE long _InterlockedExchangeAdd(volatile long *Addend, long Value)
Definition: intrin_x86.h:454

◆ _InterlockedIncrement16()

__INTRIN_INLINE short _InterlockedIncrement16 ( volatile short lpAddend)

Definition at line 655 of file intrin_x86.h.

656 {
657  return _InterlockedExchangeAdd16(lpAddend, 1) + 1;
658 }
__INTRIN_INLINE short _InterlockedExchangeAdd16(volatile short *Addend, short Value)
Definition: intrin_x86.h:445

◆ _InterlockedOr()

__INTRIN_INLINE long _InterlockedOr ( volatile long value,
long  mask 
)

Definition at line 558 of file intrin_x86.h.

559 {
560  long x;
561  long y;
562 
563  y = *value;
564 
565  do
566  {
567  x = y;
569  }
570  while(y != x);
571 
572  return y;
573 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:382
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedOr16()

__INTRIN_INLINE short _InterlockedOr16 ( volatile short value,
short  mask 
)

Definition at line 539 of file intrin_x86.h.

540 {
541  short x;
542  short y;
543 
544  y = *value;
545 
546  do
547  {
548  x = y;
550  }
551  while(y != x);
552 
553  return y;
554 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:373
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedOr8()

__INTRIN_INLINE char _InterlockedOr8 ( volatile char value,
char  mask 
)

Definition at line 520 of file intrin_x86.h.

521 {
522  char x;
523  char y;
524 
525  y = *value;
526 
527  do
528  {
529  x = y;
531  }
532  while(y != x);
533 
534  return y;
535 }
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:364
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedXor()

__INTRIN_INLINE long _InterlockedXor ( volatile long value,
long  mask 
)

Definition at line 615 of file intrin_x86.h.

616 {
617  long x;
618  long y;
619 
620  y = *value;
621 
622  do
623  {
624  x = y;
626  }
627  while(y != x);
628 
629  return y;
630 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:382
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedXor16()

__INTRIN_INLINE short _InterlockedXor16 ( volatile short value,
short  mask 
)

Definition at line 596 of file intrin_x86.h.

597 {
598  short x;
599  short y;
600 
601  y = *value;
602 
603  do
604  {
605  x = y;
607  }
608  while(y != x);
609 
610  return y;
611 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:373
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedXor8()

__INTRIN_INLINE char _InterlockedXor8 ( volatile char value,
char  mask 
)

Definition at line 577 of file intrin_x86.h.

578 {
579  char x;
580  char y;
581 
582  y = *value;
583 
584  do
585  {
586  x = y;
588  }
589  while(y != x);
590 
591  return y;
592 }
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:364
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _lrotl()

unsigned long _lrotl ( unsigned long  value,
int  shift 
)

Definition at line 1263 of file intrin_x86.h.

1264 {
1265  unsigned long retval;
1266  __asm__("roll %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1267  return retval;
1268 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _lrotr()

unsigned long _lrotr ( unsigned long  value,
int  shift 
)

Definition at line 1272 of file intrin_x86.h.

1273 {
1274  unsigned long retval;
1275  __asm__("rorl %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1276  return retval;
1277 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _mm_lfence()

__INTRIN_INLINE void _mm_lfence ( void  )

Definition at line 106 of file intrin_x86.h.

107 {
108  _ReadBarrier();
109  __asm__ __volatile__("lfence");
110  _ReadBarrier();
111 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define _ReadBarrier
Definition: intrin_x86.h:95

◆ _mm_mfence()

__INTRIN_INLINE void _mm_mfence ( void  )

Definition at line 99 of file intrin_x86.h.

100 {
101  __asm__ __volatile__("mfence" : : : "memory");
102 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _mm_pause()

__INTRIN_INLINE void _mm_pause ( void  )

Definition at line 1965 of file intrin_x86.h.

1966 {
1967  __asm__ __volatile__("pause" : : : "memory");
1968 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _mm_sfence()

__INTRIN_INLINE void _mm_sfence ( void  )

Definition at line 115 of file intrin_x86.h.

116 {
117  _WriteBarrier();
118  __asm__ __volatile__("sfence");
119  _WriteBarrier();
120 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define _WriteBarrier
Definition: intrin_x86.h:96

◆ _outp()

__INTRIN_INLINE int __cdecl _outp ( unsigned short  Port,
int  databyte 
)

Definition at line 1552 of file intrin_x86.h.

1553 {
1554  __outbyte(Port, (unsigned char)databyte);
1555  return databyte;
1556 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE void __outbyte(unsigned short Port, unsigned char Data)
Definition: intrin_x86.h:1507

◆ _outpd()

__INTRIN_INLINE unsigned long __cdecl _outpd ( unsigned short  Port,
unsigned long  dataword 
)

Definition at line 1564 of file intrin_x86.h.

1565 {
1566  __outdword(Port, dataword);
1567  return dataword;
1568 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE void __outdword(unsigned short Port, unsigned long Data)
Definition: intrin_x86.h:1517

◆ _outpw()

__INTRIN_INLINE unsigned short __cdecl _outpw ( unsigned short  Port,
unsigned short  dataword 
)

Definition at line 1558 of file intrin_x86.h.

1559 {
1560  __outword(Port, dataword);
1561  return dataword;
1562 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE void __outword(unsigned short Port, unsigned short Data)
Definition: intrin_x86.h:1512

◆ _ReadWriteBarrier()

__INTRIN_INLINE void _ReadWriteBarrier ( void  )

Definition at line 88 of file intrin_x86.h.

89 {
90  __asm__ __volatile__("" : : : "memory");
91 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotl()

__INTRIN_INLINE unsigned int __cdecl _rotl ( unsigned int  value,
int  shift 
)

Definition at line 1193 of file intrin_x86.h.

1194 {
1195  unsigned int retval;
1196  __asm__("roll %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1197  return retval;
1198 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotl16()

__INTRIN_INLINE unsigned short __cdecl _rotl16 ( unsigned short  value,
unsigned char  shift 
)

Definition at line 1184 of file intrin_x86.h.

1185 {
1186  unsigned short retval;
1187  __asm__("rolw %b[shift], %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1188  return retval;
1189 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotl64()

__INTRIN_INLINE unsigned long long __cdecl _rotl64 ( unsigned long long  value,
int  shift 
)

Definition at line 1210 of file intrin_x86.h.

1211 {
1212  /* FIXME: this is probably not optimal */
1213  return (value << shift) | (value >> (64 - shift));
1214 }
#define shift
Definition: input.c:1756

◆ _rotl8()

__INTRIN_INLINE unsigned char __cdecl _rotl8 ( unsigned char  value,
unsigned char  shift 
)

Definition at line 1175 of file intrin_x86.h.

1176 {
1177  unsigned char retval;
1178  __asm__("rolb %b[shift], %b[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1179  return retval;
1180 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotr()

unsigned int _rotr ( unsigned int  value,
int  shift 
)

Definition at line 1219 of file intrin_x86.h.

1220 {
1221  unsigned int retval;
1222  __asm__("rorl %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1223  return retval;
1224 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotr16()

__INTRIN_INLINE unsigned short __cdecl _rotr16 ( unsigned short  value,
unsigned char  shift 
)

Definition at line 1237 of file intrin_x86.h.

1238 {
1239  unsigned short retval;
1240  __asm__("rorw %b[shift], %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1241  return retval;
1242 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotr64()

__INTRIN_INLINE unsigned long long __cdecl _rotr64 ( unsigned long long  value,
int  shift 
)

Definition at line 1254 of file intrin_x86.h.

1255 {
1256  /* FIXME: this is probably not optimal */
1257  return (value >> shift) | (value << (64 - shift));
1258 }
#define shift
Definition: input.c:1756

◆ _rotr8()

__INTRIN_INLINE unsigned char __cdecl _rotr8 ( unsigned char  value,
unsigned char  shift 
)

Definition at line 1228 of file intrin_x86.h.

1229 {
1230  unsigned char retval;
1231  __asm__("rorb %b[shift], %b[retval]" : [retval] "=qm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1232  return retval;
1233 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _sgdt()

__INTRIN_INLINE void _sgdt ( void Destination)

Definition at line 1957 of file intrin_x86.h.

1958 {
1959  __asm__ __volatile__("sgdt %0" : : "m"(*(short*)Destination) : "memory");
1960 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

Referenced by ImgArchEfiStartBootApplication(), and Mmx86InitializeMemoryMap().

◆ memcpy()

__INTRIN_INLINE void* __cdecl memcpy ( void dest,
const void source,
size_t  num 
)

Definition at line 74 of file intrin_x86.h.

75 {
76  return memmove(dest, source, num);
77 }
GLuint GLuint num
Definition: glext.h:9618
void *__cdecl memmove(void *dest, const void *source, size_t num)
Definition: memmove.c:4
static char * dest
Definition: rtl.c:135

◆ memmove()

void* __cdecl memmove ( void dest,
const void source,
size_t  num 
)

Definition at line 4 of file memmove.c.

5 {
6  char *char_dest = (char *)dest;
7  char *char_src = (char *)src;
8 
9  if ((char_dest <= char_src) || (char_dest >= (char_src+count)))
10  {
11  /* non-overlapping buffers */
12  while(count > 0)
13  {
14  *char_dest = *char_src;
15  char_dest++;
16  char_src++;
17  count--;
18  }
19  }
20  else
21  {
22  /* overlaping buffers */
23  char_dest = (char *)dest + count - 1;
24  char_src = (char *)src + count - 1;
25 
26  while(count > 0)
27  {
28  *char_dest = *char_src;
29  char_dest--;
30  char_src--;
31  count--;
32  }
33  }
34 
35  return dest;
36 }
GLuint GLuint GLsizei count
Definition: gl.h:1545
GLenum src
Definition: glext.h:6340
static char * dest
Definition: rtl.c:135

Referenced by memcpy().