ReactOS  0.4.15-dev-2977-ge996662
intrin_x86.h File Reference

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Macros

#define _ReturnAddress()   (__builtin_return_address(0))
 
#define _AddressOfReturnAddress()   (&(((void **)(__builtin_frame_address(0)))[1]))
 
#define _ReadBarrier   _ReadWriteBarrier
 
#define _WriteBarrier   _ReadWriteBarrier
 

Functions

void *__cdecl memmove (void *dest, const void *source, size_t num)
 
__INTRIN_INLINE void *__cdecl memcpy (void *dest, const void *source, size_t num)
 
__INTRIN_INLINE void _ReadWriteBarrier (void)
 
__INTRIN_INLINE void _mm_mfence (void)
 
__INTRIN_INLINE void _mm_lfence (void)
 
__INTRIN_INLINE void _mm_sfence (void)
 
__INTRIN_INLINE char _InterlockedCompareExchange8 (volatile char *Destination, char Exchange, char Comperand)
 
__INTRIN_INLINE short _InterlockedCompareExchange16 (volatile short *Destination, short Exchange, short Comperand)
 
__INTRIN_INLINE long _InterlockedCompareExchange (volatile long *Destination, long Exchange, long Comperand)
 
__INTRIN_INLINE void_InterlockedCompareExchangePointer (void *volatile *Destination, void *Exchange, void *Comperand)
 
__INTRIN_INLINE char _InterlockedExchange8 (volatile char *Target, char Value)
 
__INTRIN_INLINE short _InterlockedExchange16 (volatile short *Target, short Value)
 
__INTRIN_INLINE long _InterlockedExchange (volatile long *Target, long Value)
 
__INTRIN_INLINE void_InterlockedExchangePointer (void *volatile *Target, void *Value)
 
__INTRIN_INLINE char _InterlockedExchangeAdd8 (char volatile *Addend, char Value)
 
__INTRIN_INLINE short _InterlockedExchangeAdd16 (volatile short *Addend, short Value)
 
__INTRIN_INLINE long _InterlockedExchangeAdd (volatile long *Addend, long Value)
 
__INTRIN_INLINE char _InterlockedAnd8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedAnd16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedAnd (volatile long *value, long mask)
 
__INTRIN_INLINE char _InterlockedOr8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedOr16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedOr (volatile long *value, long mask)
 
__INTRIN_INLINE char _InterlockedXor8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedXor16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedXor (volatile long *value, long mask)
 
__INTRIN_INLINE long _InterlockedDecrement (volatile long *lpAddend)
 
__INTRIN_INLINE long _InterlockedIncrement (volatile long *lpAddend)
 
__INTRIN_INLINE short _InterlockedDecrement16 (volatile short *lpAddend)
 
__INTRIN_INLINE short _InterlockedIncrement16 (volatile short *lpAddend)
 
__INTRIN_INLINE long long _InterlockedCompareExchange64 (volatile long long *Destination, long long Exchange, long long Comperand)
 
__INTRIN_INLINE unsigned char _interlockedbittestandreset (volatile long *a, long b)
 
__INTRIN_INLINE unsigned char _interlockedbittestandset (volatile long *a, long b)
 
__INTRIN_INLINE void __stosb (unsigned char *Dest, unsigned char Data, size_t Count)
 
__INTRIN_INLINE void __stosw (unsigned short *Dest, unsigned short Data, size_t Count)
 
__INTRIN_INLINE void __stosd (unsigned long *Dest, unsigned long Data, size_t Count)
 
__INTRIN_INLINE void __movsb (unsigned char *Destination, const unsigned char *Source, size_t Count)
 
__INTRIN_INLINE void __movsw (unsigned short *Destination, const unsigned short *Source, size_t Count)
 
__INTRIN_INLINE void __movsd (unsigned long *Destination, const unsigned long *Source, size_t Count)
 
__INTRIN_INLINE void __writefsbyte (unsigned long Offset, unsigned char Data)
 
__INTRIN_INLINE void __writefsword (unsigned long Offset, unsigned short Data)
 
__INTRIN_INLINE void __writefsdword (unsigned long Offset, unsigned long Data)
 
__INTRIN_INLINE unsigned char __readfsbyte (unsigned long Offset)
 
__INTRIN_INLINE unsigned short __readfsword (unsigned long Offset)
 
__INTRIN_INLINE unsigned long __readfsdword (unsigned long Offset)
 
__INTRIN_INLINE void __incfsbyte (unsigned long Offset)
 
__INTRIN_INLINE void __incfsword (unsigned long Offset)
 
__INTRIN_INLINE void __incfsdword (unsigned long Offset)
 
__INTRIN_INLINE void __addfsbyte (unsigned long Offset, unsigned char Data)
 
__INTRIN_INLINE void __addfsword (unsigned long Offset, unsigned short Data)
 
__INTRIN_INLINE void __addfsdword (unsigned long Offset, unsigned long Data)
 
__INTRIN_INLINE unsigned char _BitScanForward (unsigned long *Index, unsigned long Mask)
 
__INTRIN_INLINE unsigned char _BitScanReverse (unsigned long *Index, unsigned long Mask)
 
__INTRIN_INLINE unsigned char _bittest (const long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandcomplement (long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandreset (long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandset (long *a, long b)
 
__INTRIN_INLINE unsigned char __cdecl _rotl8 (unsigned char value, unsigned char shift)
 
__INTRIN_INLINE unsigned short __cdecl _rotl16 (unsigned short value, unsigned char shift)
 
__INTRIN_INLINE unsigned int __cdecl _rotl (unsigned int value, int shift)
 
__INTRIN_INLINE unsigned long long __cdecl _rotl64 (unsigned long long value, int shift)
 
__INTRIN_INLINE unsigned int __cdecl _rotr (unsigned int value, int shift)
 
__INTRIN_INLINE unsigned char __cdecl _rotr8 (unsigned char value, unsigned char shift)
 
__INTRIN_INLINE unsigned short __cdecl _rotr16 (unsigned short value, unsigned char shift)
 
__INTRIN_INLINE unsigned long long __cdecl _rotr64 (unsigned long long value, int shift)
 
__INTRIN_INLINE unsigned long __cdecl _lrotl (unsigned long value, int shift)
 
__INTRIN_INLINE unsigned long __cdecl _lrotr (unsigned long value, int shift)
 
__INTRIN_INLINE unsigned long long __ll_lshift (unsigned long long Mask, int Bit)
 
__INTRIN_INLINE long long __ll_rshift (long long Mask, int Bit)
 
__INTRIN_INLINE unsigned long long __ull_rshift (unsigned long long Mask, int Bit)
 
__INTRIN_INLINE unsigned short __cdecl _byteswap_ushort (unsigned short value)
 
__INTRIN_INLINE unsigned long __cdecl _byteswap_ulong (unsigned long value)
 
__INTRIN_INLINE unsigned long long __cdecl _byteswap_uint64 (unsigned long long value)
 
__INTRIN_INLINE unsigned int __lzcnt (unsigned int value)
 
__INTRIN_INLINE unsigned short __lzcnt16 (unsigned short value)
 
__INTRIN_INLINE unsigned int __popcnt (unsigned int value)
 
__INTRIN_INLINE unsigned short __popcnt16 (unsigned short value)
 
__INTRIN_INLINE long long __emul (int a, int b)
 
__INTRIN_INLINE unsigned long long __emulu (unsigned int a, unsigned int b)
 
__INTRIN_INLINE long long __cdecl _abs64 (long long value)
 
__INTRIN_INLINE unsigned char __inbyte (unsigned short Port)
 
__INTRIN_INLINE unsigned short __inword (unsigned short Port)
 
__INTRIN_INLINE unsigned long __indword (unsigned short Port)
 
__INTRIN_INLINE void __inbytestring (unsigned short Port, unsigned char *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __inwordstring (unsigned short Port, unsigned short *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __indwordstring (unsigned short Port, unsigned long *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outbyte (unsigned short Port, unsigned char Data)
 
__INTRIN_INLINE void __outword (unsigned short Port, unsigned short Data)
 
__INTRIN_INLINE void __outdword (unsigned short Port, unsigned long Data)
 
__INTRIN_INLINE void __outbytestring (unsigned short Port, unsigned char *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outwordstring (unsigned short Port, unsigned short *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outdwordstring (unsigned short Port, unsigned long *Buffer, unsigned long Count)
 
__INTRIN_INLINE int __cdecl _inp (unsigned short Port)
 
__INTRIN_INLINE unsigned short __cdecl _inpw (unsigned short Port)
 
__INTRIN_INLINE unsigned long __cdecl _inpd (unsigned short Port)
 
__INTRIN_INLINE int __cdecl _outp (unsigned short Port, int databyte)
 
__INTRIN_INLINE unsigned short __cdecl _outpw (unsigned short Port, unsigned short dataword)
 
__INTRIN_INLINE unsigned long __cdecl _outpd (unsigned short Port, unsigned long dataword)
 
__INTRIN_INLINE void __cpuid (int CPUInfo[4], int InfoType)
 
__INTRIN_INLINE void __cpuidex (int CPUInfo[4], int InfoType, int ECXValue)
 
__INTRIN_INLINE unsigned long long __rdtsc (void)
 
__INTRIN_INLINE void __writeeflags (uintptr_t Value)
 
__INTRIN_INLINE uintptr_t __readeflags (void)
 
__INTRIN_INLINE void __cdecl __debugbreak (void)
 
__INTRIN_INLINE void __ud2 (void)
 
__INTRIN_INLINE void __int2c (void)
 
__INTRIN_INLINE void __cdecl _disable (void)
 
__INTRIN_INLINE void __cdecl _enable (void)
 
__INTRIN_INLINE void __halt (void)
 
 __declspec (noreturn) __INTRIN_INLINE void __fastfail(unsigned int Code)
 
__INTRIN_INLINE void __writecr0 (unsigned int Data)
 
__INTRIN_INLINE void __writecr3 (unsigned int Data)
 
__INTRIN_INLINE void __writecr4 (unsigned int Data)
 
__INTRIN_INLINE unsigned long __readcr0 (void)
 
__INTRIN_INLINE unsigned long __readcr2 (void)
 
__INTRIN_INLINE unsigned long __readcr3 (void)
 
__INTRIN_INLINE unsigned long __readcr4 (void)
 
__INTRIN_INLINE unsigned int __readdr (unsigned int reg)
 
__INTRIN_INLINE void __writedr (unsigned reg, unsigned int value)
 
__INTRIN_INLINE void __invlpg (void *Address)
 
__INTRIN_INLINE unsigned long long __readmsr (unsigned long reg)
 
__INTRIN_INLINE void __writemsr (unsigned long Register, unsigned long long Value)
 
__INTRIN_INLINE unsigned long long __readpmc (unsigned long counter)
 
__INTRIN_INLINE unsigned long __segmentlimit (unsigned long a)
 
__INTRIN_INLINE void __wbinvd (void)
 
__INTRIN_INLINE void __lidt (void *Source)
 
__INTRIN_INLINE void __sidt (void *Destination)
 
__INTRIN_INLINE void _sgdt (void *Destination)
 
__INTRIN_INLINE void _mm_pause (void)
 
__INTRIN_INLINE void __nop (void)
 

Macro Definition Documentation

◆ _AddressOfReturnAddress

#define _AddressOfReturnAddress (   void)    (&(((void **)(__builtin_frame_address(0)))[1]))

Definition at line 82 of file intrin_x86.h.

◆ _ReadBarrier

#define _ReadBarrier   _ReadWriteBarrier

Definition at line 95 of file intrin_x86.h.

◆ _ReturnAddress

#define _ReturnAddress (   void)    (__builtin_return_address(0))

Definition at line 81 of file intrin_x86.h.

◆ _WriteBarrier

#define _WriteBarrier   _ReadWriteBarrier

Definition at line 96 of file intrin_x86.h.

Function Documentation

◆ __addfsbyte()

__INTRIN_INLINE void __addfsbyte ( unsigned long  Offset,
unsigned char  Data 
)

Definition at line 1017 of file intrin_x86.h.

1018 {
1019  if(!__builtin_constant_p(Offset))
1020  __asm__ __volatile__("addb %b[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
1021  else
1022  __asm__ __volatile__("addb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
1023 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __addfsdword()

__INTRIN_INLINE void __addfsdword ( unsigned long  Offset,
unsigned long  Data 
)

Definition at line 1033 of file intrin_x86.h.

1034 {
1035  if(!__builtin_constant_p(Offset))
1036  __asm__ __volatile__("addl %k[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
1037  else
1038  __asm__ __volatile__("addl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
1039 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __addfsword()

__INTRIN_INLINE void __addfsword ( unsigned long  Offset,
unsigned short  Data 
)

Definition at line 1025 of file intrin_x86.h.

1026 {
1027  if(!__builtin_constant_p(Offset))
1028  __asm__ __volatile__("addw %w[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
1029  else
1030  __asm__ __volatile__("addw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
1031 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __cpuid()

__INTRIN_INLINE void __cpuid ( int  CPUInfo[4],
int  InfoType 
)

Definition at line 1645 of file intrin_x86.h.

1646 {
1647  __asm__ __volatile__("cpuid" : "=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3]) : "a" (InfoType));
1648 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
CPUINFO CPUInfo[]
Definition: parse.c:231

◆ __cpuidex()

__INTRIN_INLINE void __cpuidex ( int  CPUInfo[4],
int  InfoType,
int  ECXValue 
)

Definition at line 1650 of file intrin_x86.h.

1651 {
1652  __asm__ __volatile__("cpuid" : "=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3]) : "a" (InfoType), "c" (ECXValue));
1653 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
CPUINFO CPUInfo[]
Definition: parse.c:231

Referenced by BlArchCpuId(), and ZSTD_cpuid().

◆ __debugbreak()

◆ __declspec()

__declspec ( noreturn  )

Definition at line 1721 of file intrin_x86.h.

1723 {
1724  __asm__("int $0x29" : : "c"(Code) : "memory");
1725  __builtin_unreachable();
1726 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ UCHAR _In_ UCHAR _In_ ULONG Code
Definition: wdfdevice.h:1697

◆ __emul()

__INTRIN_INLINE long long __emul ( int  a,
int  b 
)

Definition at line 1481 of file intrin_x86.h.

1482 {
1483  long long retval;
1484  __asm__("imull %[b]" : "=A" (retval) : [a] "a" (a), [b] "rm" (b));
1485  return retval;
1486 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ __emulu()

Definition at line 1490 of file intrin_x86.h.

1491 {
1492  unsigned long long retval;
1493  __asm__("mull %[b]" : "=A" (retval) : [a] "a" (a), [b] "rm" (b));
1494  return retval;
1495 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ __halt()

__INTRIN_INLINE void __halt ( void  )

Definition at line 1715 of file intrin_x86.h.

1716 {
1717  __asm__("hlt" : : : "memory");
1718 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by FrLdrBugCheckEx(), FrLdrBugCheckWithMessage(), HaliHaltSystem(), HalpReboot(), HalProcessorIdle(), HalpXboxPowerAction(), and MachInit().

◆ __inbyte()

Definition at line 1525 of file intrin_x86.h.

1526 {
1527  unsigned char byte;
1528  __asm__ __volatile__("inb %w[Port], %b[byte]" : [byte] "=a" (byte) : [Port] "Nd" (Port));
1529  return byte;
1530 }
CPPORT Port[4]
Definition: headless.c:35
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define byte(x, n)
Definition: tomcrypt.h:118

Referenced by _inp().

◆ __inbytestring()

__INTRIN_INLINE void __inbytestring ( unsigned short  Port,
unsigned char Buffer,
unsigned long  Count 
)

Definition at line 1546 of file intrin_x86.h.

1547 {
1548  __asm__ __volatile__
1549  (
1550  "rep; insb" :
1551  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1552  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1553  "memory"
1554  );
1555 }
CPPORT Port[4]
Definition: headless.c:35
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45
int Count
Definition: noreturn.cpp:7

◆ __incfsbyte()

__INTRIN_INLINE void __incfsbyte ( unsigned long  Offset)

Definition at line 1001 of file intrin_x86.h.

1002 {
1003  __asm__ __volatile__("incb %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
1004 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __incfsdword()

__INTRIN_INLINE void __incfsdword ( unsigned long  Offset)

Definition at line 1011 of file intrin_x86.h.

1012 {
1013  __asm__ __volatile__("incl %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
1014 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __incfsword()

__INTRIN_INLINE void __incfsword ( unsigned long  Offset)

Definition at line 1006 of file intrin_x86.h.

1007 {
1008  __asm__ __volatile__("incw %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
1009 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __indword()

Definition at line 1539 of file intrin_x86.h.

1540 {
1541  unsigned long dword;
1542  __asm__ __volatile__("inl %w[Port], %k[dword]" : [dword] "=a" (dword) : [Port] "Nd" (Port));
1543  return dword;
1544 }
CPPORT Port[4]
Definition: headless.c:35
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _inpd().

◆ __indwordstring()

__INTRIN_INLINE void __indwordstring ( unsigned short  Port,
unsigned long Buffer,
unsigned long  Count 
)

Definition at line 1568 of file intrin_x86.h.

1569 {
1570  __asm__ __volatile__
1571  (
1572  "rep; insl" :
1573  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1574  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1575  "memory"
1576  );
1577 }
CPPORT Port[4]
Definition: headless.c:35
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45
int Count
Definition: noreturn.cpp:7

◆ __int2c()

__INTRIN_INLINE void __int2c ( void  )

Definition at line 1699 of file intrin_x86.h.

1700 {
1701  __asm__("int $0x2c");
1702 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __invlpg()

__INTRIN_INLINE void __invlpg ( void Address)

Definition at line 1969 of file intrin_x86.h.

1970 {
1971  __asm__ __volatile__ ("invlpg (%[Address])" : : [Address] "b" (Address) : "memory");
1972 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static WCHAR Address[46]
Definition: ping.c:68

Referenced by KeInvalidateTlbEntry(), KiMarkPageAsReadOnly(), MiArchCreateProcessAddressSpace(), MiFlushTlb(), MiFlushTlbIpiRoutine(), and MmDefpFlushTlbEntry().

◆ __inword()

Definition at line 1532 of file intrin_x86.h.

1533 {
1534  unsigned short word;
1535  __asm__ __volatile__("inw %w[Port], %w[word]" : [word] "=a" (word) : [Port] "Nd" (Port));
1536  return word;
1537 }
CPPORT Port[4]
Definition: headless.c:35
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
const WCHAR * word
Definition: lex.c:36

Referenced by _inpw().

◆ __inwordstring()

__INTRIN_INLINE void __inwordstring ( unsigned short  Port,
unsigned short Buffer,
unsigned long  Count 
)

Definition at line 1557 of file intrin_x86.h.

1558 {
1559  __asm__ __volatile__
1560  (
1561  "rep; insw" :
1562  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1563  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1564  "memory"
1565  );
1566 }
CPPORT Port[4]
Definition: headless.c:35
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45
int Count
Definition: noreturn.cpp:7

◆ __lidt()

__INTRIN_INLINE void __lidt ( void Source)

Definition at line 2019 of file intrin_x86.h.

2020 {
2021  __asm__ __volatile__("lidt %0" : : "m"(*(short*)Source));
2022 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3167

Referenced by Amd64SetupIdt(), BlpArchInitialize(), KeInitExceptions(), KiI386PentiumLockErrataFixup(), KiRestoreProcessorControlState(), and WinLdrSetProcessorContext().

◆ __ll_lshift()

__INTRIN_INLINE unsigned long long __ll_lshift ( unsigned long long  Mask,
int  Bit 
)

Definition at line 1352 of file intrin_x86.h.

1353 {
1354  unsigned long long retval = Mask;
1355 
1356  __asm__
1357  (
1358  "shldl %b[Bit], %%eax, %%edx; sall %b[Bit], %%eax" :
1359  "+A" (retval) :
1360  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1361  );
1362 
1363  return retval;
1364 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
processorSet Mask

◆ __ll_rshift()

__INTRIN_INLINE long long __ll_rshift ( long long  Mask,
int  Bit 
)

Definition at line 1366 of file intrin_x86.h.

1367 {
1368  long long retval = Mask;
1369 
1370  __asm__
1371  (
1372  "shrdl %b[Bit], %%edx, %%eax; sarl %b[Bit], %%edx" :
1373  "+A" (retval) :
1374  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1375  );
1376 
1377  return retval;
1378 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
processorSet Mask

◆ __lzcnt()

__INTRIN_INLINE unsigned int __lzcnt ( unsigned int  value)

Definition at line 1435 of file intrin_x86.h.

1436 {
1437  return __builtin_clz(value);
1438 }
Definition: pdh_main.c:93

◆ __lzcnt16()

Definition at line 1442 of file intrin_x86.h.

1443 {
1444  return __builtin_clz(value);
1445 }
Definition: pdh_main.c:93

◆ __movsb()

__INTRIN_INLINE void __movsb ( unsigned char Destination,
const unsigned char Source,
size_t  Count 
)

Definition at line 813 of file intrin_x86.h.

814 {
815  __asm__ __volatile__
816  (
817  "rep; movsb" :
818  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
819  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
820  );
821 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
int Count
Definition: noreturn.cpp:7
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2950
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3167

◆ __movsd()

__INTRIN_INLINE void __movsd ( unsigned long Destination,
const unsigned long Source,
size_t  Count 
)

Definition at line 833 of file intrin_x86.h.

834 {
835  __asm__ __volatile__
836  (
837  "rep; movsd" :
838  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
839  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
840  );
841 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
int Count
Definition: noreturn.cpp:7
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2950
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3167

◆ __movsw()

__INTRIN_INLINE void __movsw ( unsigned short Destination,
const unsigned short Source,
size_t  Count 
)

Definition at line 823 of file intrin_x86.h.

824 {
825  __asm__ __volatile__
826  (
827  "rep; movsw" :
828  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
829  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
830  );
831 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
int Count
Definition: noreturn.cpp:7
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2950
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3167

◆ __nop()

__INTRIN_INLINE void __nop ( void  )

Definition at line 2043 of file intrin_x86.h.

2044 {
2045  __asm__ __volatile__("nop");
2046 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by HalpRead8254Value().

◆ __outbyte()

__INTRIN_INLINE void __outbyte ( unsigned short  Port,
unsigned char  Data 
)

Definition at line 1579 of file intrin_x86.h.

1580 {
1581  __asm__ __volatile__("outb %b[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1582 }
CPPORT Port[4]
Definition: headless.c:35
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _outp().

◆ __outbytestring()

__INTRIN_INLINE void __outbytestring ( unsigned short  Port,
unsigned char Buffer,
unsigned long  Count 
)

Definition at line 1594 of file intrin_x86.h.

1595 {
1596  __asm__ __volatile__("rep; outsb" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1597 }
CPPORT Port[4]
Definition: headless.c:35
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45
int Count
Definition: noreturn.cpp:7

◆ __outdword()

__INTRIN_INLINE void __outdword ( unsigned short  Port,
unsigned long  Data 
)

Definition at line 1589 of file intrin_x86.h.

1590 {
1591  __asm__ __volatile__("outl %k[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1592 }
CPPORT Port[4]
Definition: headless.c:35
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _outpd().

◆ __outdwordstring()

__INTRIN_INLINE void __outdwordstring ( unsigned short  Port,
unsigned long Buffer,
unsigned long  Count 
)

Definition at line 1604 of file intrin_x86.h.

1605 {
1606  __asm__ __volatile__("rep; outsl" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1607 }
CPPORT Port[4]
Definition: headless.c:35
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45
int Count
Definition: noreturn.cpp:7

◆ __outword()

__INTRIN_INLINE void __outword ( unsigned short  Port,
unsigned short  Data 
)

Definition at line 1584 of file intrin_x86.h.

1585 {
1586  __asm__ __volatile__("outw %w[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1587 }
CPPORT Port[4]
Definition: headless.c:35
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _outpw().

◆ __outwordstring()

__INTRIN_INLINE void __outwordstring ( unsigned short  Port,
unsigned short Buffer,
unsigned long  Count 
)

Definition at line 1599 of file intrin_x86.h.

1600 {
1601  __asm__ __volatile__("rep; outsw" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1602 }
CPPORT Port[4]
Definition: headless.c:35
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45
int Count
Definition: noreturn.cpp:7

◆ __popcnt()

__INTRIN_INLINE unsigned int __popcnt ( unsigned int  value)

Definition at line 1449 of file intrin_x86.h.

1450 {
1451  return __builtin_popcount(value);
1452 }
Definition: pdh_main.c:93

◆ __popcnt16()

__INTRIN_INLINE unsigned short __popcnt16 ( unsigned short  value)

Definition at line 1456 of file intrin_x86.h.

1457 {
1458  return __builtin_popcount(value);
1459 }
Definition: pdh_main.c:93

◆ __rdtsc()

Definition at line 1656 of file intrin_x86.h.

1657 {
1658 #ifdef __x86_64__
1659  unsigned long long low, high;
1660  __asm__ __volatile__("rdtsc" : "=a"(low), "=d"(high));
1661  return low | (high << 32);
1662 #else
1663  unsigned long long retval;
1664  __asm__ __volatile__("rdtsc" : "=A"(retval));
1665  return retval;
1666 #endif
1667 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __readcr0()

__INTRIN_INLINE unsigned long __readcr0 ( void  )

Definition at line 1805 of file intrin_x86.h.

1806 {
1807  unsigned long value;
1808  __asm__ __volatile__("mov %%cr0, %[value]" : [value] "=r" (value));
1809  return value;
1810 }
Definition: pdh_main.c:93
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by ArchSwitchContext(), BlpArchEnableTranslation(), HalpBiosCall(), KiCoprocessorError(), KiFlushNPXState(), KiInitializeCpu(), KiIsNpxErrataPresent(), KiIsNpxPresent(), KiNpxHandler(), KiSaveProcessorControlState(), KiSetCR0Bits(), KiSwapContextEntry(), KiTrap07Handler(), KiTrap13Handler(), and WinLdrSetProcessorContext().

◆ __readcr2()

__INTRIN_INLINE unsigned long __readcr2 ( void  )

Definition at line 1812 of file intrin_x86.h.

1813 {
1814  unsigned long value;
1815  __asm__ __volatile__("mov %%cr2, %[value]" : [value] "=r" (value));
1816  return value;
1817 }
Definition: pdh_main.c:93
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by KdbEnterDebuggerException(), KiSaveProcessorControlState(), and KiTrap0EHandler().

◆ __readcr3()

__INTRIN_INLINE unsigned long __readcr3 ( void  )

Definition at line 1819 of file intrin_x86.h.

1820 {
1821  unsigned long value;
1822  __asm__ __volatile__("mov %%cr3, %[value]" : [value] "=r" (value));
1823  return value;
1824 }
Definition: pdh_main.c:93
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by HalpFlushTLB(), KdpTranslateAddress(), KeFlushCurrentTb(), KeFlushProcessTb(), Ki386EnableGlobalPage(), Ki386InitializeTss(), KiSaveProcessorControlState(), MiInitializePageTable(), and MmDefpFlushTlb().

◆ __readcr4()

__INTRIN_INLINE unsigned long __readcr4 ( void  )

Definition at line 1826 of file intrin_x86.h.

1827 {
1828  unsigned long value;
1829  __asm__ __volatile__("mov %%cr4, %[value]" : [value] "=r" (value));
1830  return value;
1831 }
Definition: pdh_main.c:93
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by ArchInitializeContext(), ArchRestoreProcessorFeatures(), ArchSwitchContext(), BlpArchEnableTranslation(), HalpFlushTLB(), KdpTranslateAddress(), KeFlushCurrentTb(), Ki386EnableDE(), Ki386EnableFxsr(), Ki386EnableGlobalPage(), Ki386EnableXMMIExceptions(), Ki386VdmEnablePentiumExtentions(), KiInitializeCpu(), KiSaveProcessorControlState(), MiInitializePageTable(), and MiUseLargeDriverPage().

◆ __readdr()

Definition at line 1903 of file intrin_x86.h.

1904 {
1905  unsigned int value;
1906  switch (reg)
1907  {
1908  case 0:
1909  __asm__ __volatile__("mov %%dr0, %[value]" : [value] "=r" (value));
1910  break;
1911  case 1:
1912  __asm__ __volatile__("mov %%dr1, %[value]" : [value] "=r" (value));
1913  break;
1914  case 2:
1915  __asm__ __volatile__("mov %%dr2, %[value]" : [value] "=r" (value));
1916  break;
1917  case 3:
1918  __asm__ __volatile__("mov %%dr3, %[value]" : [value] "=r" (value));
1919  break;
1920  case 4:
1921  __asm__ __volatile__("mov %%dr4, %[value]" : [value] "=r" (value));
1922  break;
1923  case 5:
1924  __asm__ __volatile__("mov %%dr5, %[value]" : [value] "=r" (value));
1925  break;
1926  case 6:
1927  __asm__ __volatile__("mov %%dr6, %[value]" : [value] "=r" (value));
1928  break;
1929  case 7:
1930  __asm__ __volatile__("mov %%dr7, %[value]" : [value] "=r" (value));
1931  break;
1932  }
1933  return value;
1934 }
Definition: pdh_main.c:93
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static int reg
Definition: i386-dis.c:1283
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by KiEnterV86Trap(), KiHandleDebugRegistersOnTrapEntry(), and KiSaveProcessorControlState().

◆ __readeflags()

__INTRIN_INLINE uintptr_t __readeflags ( void  )

Definition at line 1675 of file intrin_x86.h.

1676 {
1677  uintptr_t retval;
1678  __asm__ __volatile__("pushf\n pop %0" : "=rm"(retval));
1679  return retval;
1680 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
unsigned int uintptr_t
Definition: crtdefs.h:312

Referenced by HalBeginSystemInterrupt(), HalCalibratePerformanceCounter(), HalEndSystemInterrupt(), HalpAcquireCmosSpinLock(), HalpApcInterruptHandler(), HalpBiosCall(), HalpBiosDisplayReset(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializeLegacyPICs(), HalpInitializePICs(), HalpInitializeTsc(), HalpLowerIrql(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KeDisableInterrupts(), KeGetCurrentIrql(), KeQueryPerformanceCounter(), KeSetCurrentIrql(), KfLowerIrql(), KfRaiseIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiEnterV86Mode(), KiFlushNPXState(), KiSetProcessorType(), KiTrap02Handler(), KiTrap08Handler(), KmtAreInterruptsEnabled(), and Test_strlen().

◆ __readfsbyte()

__INTRIN_INLINE unsigned char __readfsbyte ( unsigned long  Offset)

Definition at line 975 of file intrin_x86.h.

976 {
977  unsigned char value;
978  __asm__ __volatile__("movb %%fs:%a[Offset], %b[value]" : [value] "=q" (value) : [Offset] "ir" (Offset));
979  return value;
980 }
Definition: pdh_main.c:93
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __readfsdword()

__INTRIN_INLINE unsigned long __readfsdword ( unsigned long  Offset)

Definition at line 993 of file intrin_x86.h.

994 {
995  unsigned long value;
996  __asm__ __volatile__("movl %%fs:%a[Offset], %k[value]" : [value] "=r" (value) : [Offset] "ir" (Offset));
997  return value;
998 }
Definition: pdh_main.c:93
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __readfsword()

__INTRIN_INLINE unsigned short __readfsword ( unsigned long  Offset)

Definition at line 984 of file intrin_x86.h.

985 {
986  unsigned short value;
987  __asm__ __volatile__("movw %%fs:%a[Offset], %w[value]" : [value] "=r" (value) : [Offset] "ir" (Offset));
988  return value;
989 }
Definition: pdh_main.c:93
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __readmsr()

Definition at line 1977 of file intrin_x86.h.

1978 {
1979 #ifdef __x86_64__
1980  unsigned long low, high;
1981  __asm__ __volatile__("rdmsr" : "=a" (low), "=d" (high) : "c" (reg));
1982  return ((unsigned long long)high << 32) | low;
1983 #else
1984  unsigned long long retval;
1985  __asm__ __volatile__("rdmsr" : "=A" (retval) : "c" (reg));
1986  return retval;
1987 #endif
1988 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static int reg
Definition: i386-dis.c:1283

◆ __readpmc()

__INTRIN_INLINE unsigned long long __readpmc ( unsigned long  counter)

Definition at line 1999 of file intrin_x86.h.

2000 {
2001  unsigned long long retval;
2002  __asm__ __volatile__("rdpmc" : "=A" (retval) : "c" (counter));
2003  return retval;
2004 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by KsecReadMachineSpecificCounters().

◆ __segmentlimit()

__INTRIN_INLINE unsigned long __segmentlimit ( unsigned long  a)

Definition at line 2007 of file intrin_x86.h.

2008 {
2009  unsigned long retval;
2010  __asm__ __volatile__("lsl %[a], %[retval]" : [retval] "=r" (retval) : [a] "rm" (a));
2011  return retval;
2012 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ __sidt()

__INTRIN_INLINE void __sidt ( void Destination)

Definition at line 2024 of file intrin_x86.h.

2025 {
2026  __asm__ __volatile__("sidt %0" : : "m"(*(short*)Destination) : "memory");
2027 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2950

Referenced by Amd64SetupIdt(), BlpArchInitialize(), ImgArchEfiStartBootApplication(), KdbpCmdGdtLdtIdt(), KdbpStepIntoInstruction(), KiGetMachineBootPointers(), KiI386PentiumLockErrataFixup(), KiInitializePcr(), KiSaveProcessorControlState(), Mmx86InitializeMemoryMap(), and WinLdrSetProcessorContext().

◆ __stosb()

__INTRIN_INLINE void __stosb ( unsigned char Dest,
unsigned char  Data,
size_t  Count 
)

Definition at line 770 of file intrin_x86.h.

771 {
772  __asm__ __volatile__
773  (
774  "rep; stosb" :
775  [Dest] "=D" (Dest), [Count] "=c" (Count) :
776  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
777  );
778 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
int Count
Definition: noreturn.cpp:7

◆ __stosd()

__INTRIN_INLINE void __stosd ( unsigned long Dest,
unsigned long  Data,
size_t  Count 
)

Definition at line 791 of file intrin_x86.h.

792 {
793  __asm__ __volatile__
794  (
795  "rep; stosl" :
796  [Dest] "=D" (Dest), [Count] "=c" (Count) :
797  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
798  );
799 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
int Count
Definition: noreturn.cpp:7

◆ __stosw()

__INTRIN_INLINE void __stosw ( unsigned short Dest,
unsigned short  Data,
size_t  Count 
)

Definition at line 781 of file intrin_x86.h.

782 {
783  __asm__ __volatile__
784  (
785  "rep; stosw" :
786  [Dest] "=D" (Dest), [Count] "=c" (Count) :
787  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
788  );
789 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
int Count
Definition: noreturn.cpp:7

◆ __ud2()

__INTRIN_INLINE void __ud2 ( void  )

Definition at line 1692 of file intrin_x86.h.

1693 {
1694  __asm__("ud2");
1695 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __ull_rshift()

__INTRIN_INLINE unsigned long long __ull_rshift ( unsigned long long  Mask,
int  Bit 
)

Definition at line 1380 of file intrin_x86.h.

1381 {
1382  unsigned long long retval = Mask;
1383 
1384  __asm__
1385  (
1386  "shrdl %b[Bit], %%edx, %%eax; shrl %b[Bit], %%edx" :
1387  "+A" (retval) :
1388  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1389  );
1390 
1391  return retval;
1392 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
processorSet Mask

◆ __wbinvd()

__INTRIN_INLINE void __wbinvd ( void  )

Definition at line 2014 of file intrin_x86.h.

2015 {
2016  __asm__ __volatile__("wbinvd" : : : "memory");
2017 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __writecr0()

__INTRIN_INLINE void __writecr0 ( unsigned int  Data)

Definition at line 1790 of file intrin_x86.h.

1791 {
1792  __asm__("mov %[Data], %%cr0" : : [Data] "r" (Data) : "memory");
1793 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by ArchSwitchContext(), BlpArchEnableTranslation(), HalpBiosCall(), KiCoprocessorError(), KiFlushNPXState(), KiInitializeCpu(), KiIsNpxErrataPresent(), KiIsNpxPresent(), KiNpxHandler(), KiRestoreProcessorControlState(), KiSetCR0Bits(), KiSwapContextEntry(), KiTrap07Handler(), KiTrap13Handler(), and WinLdrSetProcessorContext().

◆ __writecr3()

__INTRIN_INLINE void __writecr3 ( unsigned int  Data)

Definition at line 1795 of file intrin_x86.h.

1796 {
1797  __asm__("mov %[Data], %%cr3" : : [Data] "r" (Data) : "memory");
1798 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by HalpFlushTLB(), handle_gdb_read_mem(), handle_gdb_write_mem(), KeFlushCurrentTb(), KeFlushProcessTb(), Ki386EnableGlobalPage(), KiRestoreProcessorControlState(), KiSwapContextExit(), KiSwapContextResume(), KiSwapProcess(), MmDefInitializeTranslation(), MmDefpFlushTlb(), ReadMemorySendHandler(), WinLdrSetProcessorContext(), and WriteMemorySendHandler().

◆ __writecr4()

__INTRIN_INLINE void __writecr4 ( unsigned int  Data)

Definition at line 1800 of file intrin_x86.h.

1801 {
1802  __asm__("mov %[Data], %%cr4" : : [Data] "r" (Data) : "memory");
1803 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by ArchInitializeContext(), ArchRestoreProcessorFeatures(), ArchSwitchContext(), BlpArchEnableTranslation(), HalpFlushTLB(), KeFlushCurrentTb(), Ki386EnableDE(), Ki386EnableFxsr(), Ki386EnableGlobalPage(), Ki386EnableXMMIExceptions(), Ki386VdmEnablePentiumExtentions(), KiInitializeCpu(), KiRestoreProcessorControlState(), and MiInitializePageTable().

◆ __writedr()

__INTRIN_INLINE void __writedr ( unsigned  reg,
unsigned int  value 
)

Definition at line 1936 of file intrin_x86.h.

1937 {
1938  switch (reg)
1939  {
1940  case 0:
1941  __asm__("mov %[value], %%dr0" : : [value] "r" (value) : "memory");
1942  break;
1943  case 1:
1944  __asm__("mov %[value], %%dr1" : : [value] "r" (value) : "memory");
1945  break;
1946  case 2:
1947  __asm__("mov %[value], %%dr2" : : [value] "r" (value) : "memory");
1948  break;
1949  case 3:
1950  __asm__("mov %[value], %%dr3" : : [value] "r" (value) : "memory");
1951  break;
1952  case 4:
1953  __asm__("mov %[value], %%dr4" : : [value] "r" (value) : "memory");
1954  break;
1955  case 5:
1956  __asm__("mov %[value], %%dr5" : : [value] "r" (value) : "memory");
1957  break;
1958  case 6:
1959  __asm__("mov %[value], %%dr6" : : [value] "r" (value) : "memory");
1960  break;
1961  case 7:
1962  __asm__("mov %[value], %%dr7" : : [value] "r" (value) : "memory");
1963  break;
1964  }
1965 }
Definition: pdh_main.c:93
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static int reg
Definition: i386-dis.c:1283

Referenced by KiHandleDebugRegistersOnTrapEntry(), KiHandleDebugRegistersOnTrapExit(), KiRestoreProcessorControlState(), and KiSaveProcessorControlState().

◆ __writeeflags()

__INTRIN_INLINE void __writeeflags ( uintptr_t  Value)

Definition at line 1670 of file intrin_x86.h.

1671 {
1672  __asm__ __volatile__("push %0\n popf" : : "rim"(Value));
1673 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406

Referenced by HalCalibratePerformanceCounter(), HalpBiosDisplayReset(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializePICs(), HalpInitializeTsc(), HalpReleaseCmosSpinLock(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KfLowerIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiFlushNPXState(), KiSetProcessorType(), KiTrap02Handler(), KiTrap08Handler(), Test_strlen(), and WinLdrSetProcessorContext().

◆ __writefsbyte()

__INTRIN_INLINE void __writefsbyte ( unsigned long  Offset,
unsigned char  Data 
)

Definition at line 959 of file intrin_x86.h.

960 {
961  __asm__ __volatile__("movb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
962 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __writefsdword()

__INTRIN_INLINE void __writefsdword ( unsigned long  Offset,
unsigned long  Data 
)

Definition at line 969 of file intrin_x86.h.

970 {
971  __asm__ __volatile__("movl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data) : "memory");
972 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __writefsword()

__INTRIN_INLINE void __writefsword ( unsigned long  Offset,
unsigned short  Data 
)

Definition at line 964 of file intrin_x86.h.

965 {
966  __asm__ __volatile__("movw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data) : "memory");
967 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

◆ __writemsr()

__INTRIN_INLINE void __writemsr ( unsigned long  Register,
unsigned long long  Value 
)

Definition at line 1990 of file intrin_x86.h.

1991 {
1992 #ifdef __x86_64__
1993  __asm__ __volatile__("wrmsr" : : "a" (Value), "d" (Value >> 32), "c" (Register));
1994 #else
1995  __asm__ __volatile__("wrmsr" : : "A" (Value), "c" (Register));
1996 #endif
1997 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406

◆ _abs64()

Definition at line 1498 of file intrin_x86.h.

1499 {
1500  return (value >= 0) ? value : -value;
1501 }
Definition: pdh_main.c:93
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ _BitScanForward()

__INTRIN_INLINE unsigned char _BitScanForward ( unsigned long Index,
unsigned long  Mask 
)

Definition at line 1047 of file intrin_x86.h.

1048 {
1049  __asm__("bsfl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
1050  return Mask ? 1 : 0;
1051 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ WDFCOLLECTION _In_ ULONG Index
processorSet Mask

Referenced by GetBestRoute(), MmMakeSegmentResident(), and ZSTD_NbCommonBytes().

◆ _BitScanReverse()

__INTRIN_INLINE unsigned char _BitScanReverse ( unsigned long Index,
unsigned long  Mask 
)

Definition at line 1055 of file intrin_x86.h.

1056 {
1057  __asm__("bsrl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
1058  return Mask ? 1 : 0;
1059 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ WDFCOLLECTION _In_ ULONG Index
processorSet Mask

Referenced by BIT_highbit32(), ZSTD_highbit32(), and ZSTD_NbCommonBytes().

◆ _bittest()

__INTRIN_INLINE unsigned char _bittest ( const long a,
long  b 
)

Definition at line 1064 of file intrin_x86.h.

1065 {
1066  unsigned char retval;
1067 
1068  if(__builtin_constant_p(b))
1069  __asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "mr" (*(a + (b / 32))), [b] "Ir" (b % 32));
1070  else
1071  __asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "m" (*a), [b] "r" (b));
1072 
1073  return retval;
1074 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _bittestandcomplement()

__INTRIN_INLINE unsigned char _bittestandcomplement ( long a,
long  b 
)

Definition at line 1114 of file intrin_x86.h.

1115 {
1116  unsigned char retval;
1117 
1118  if(__builtin_constant_p(b))
1119  __asm__("btc %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1120  else
1121  __asm__("btc %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1122 
1123  return retval;
1124 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _bittestandreset()

__INTRIN_INLINE unsigned char _bittestandreset ( long a,
long  b 
)

Definition at line 1128 of file intrin_x86.h.

1129 {
1130  unsigned char retval;
1131 
1132  if(__builtin_constant_p(b))
1133  __asm__("btr %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1134  else
1135  __asm__("btr %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1136 
1137  return retval;
1138 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _bittestandset()

__INTRIN_INLINE unsigned char _bittestandset ( long a,
long  b 
)

Definition at line 1142 of file intrin_x86.h.

1143 {
1144  unsigned char retval;
1145 
1146  if(__builtin_constant_p(b))
1147  __asm__("bts %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1148  else
1149  __asm__("bts %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1150 
1151  return retval;
1152 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _byteswap_uint64()

__INTRIN_INLINE unsigned long long __cdecl _byteswap_uint64 ( unsigned long long  value)

Definition at line 1417 of file intrin_x86.h.

1418 {
1419  union {
1420  unsigned long long int64part;
1421  struct {
1422  unsigned long lowpart;
1423  unsigned long hipart;
1424  };
1425  } retval;
1426  retval.int64part = value;
1427  __asm__("bswapl %[lowpart]\n"
1428  "bswapl %[hipart]\n"
1429  : [lowpart] "=r" (retval.hipart), [hipart] "=r" (retval.lowpart) : "[lowpart]" (retval.lowpart), "[hipart]" (retval.hipart) );
1430  return retval.int64part;
1431 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ _byteswap_ulong()

__INTRIN_INLINE unsigned long __cdecl _byteswap_ulong ( unsigned long  value)

Definition at line 1402 of file intrin_x86.h.

1403 {
1404  unsigned long retval;
1405  __asm__("bswapl %[retval]" : [retval] "=r" (retval) : "[retval]" (value));
1406  return retval;
1407 }
Definition: pdh_main.c:93
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _byteswap_ushort()

__INTRIN_INLINE unsigned short __cdecl _byteswap_ushort ( unsigned short  value)

Definition at line 1395 of file intrin_x86.h.

1396 {
1397  unsigned short retval;
1398  __asm__("rorw $8, %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value));
1399  return retval;
1400 }
Definition: pdh_main.c:93
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _disable()

__INTRIN_INLINE void __cdecl _disable ( void  )

Definition at line 1705 of file intrin_x86.h.

1706 {
1707  __asm__("cli" : : : "memory");
1708 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _HalpApcInterruptHandler(), _HalpDispatchInterruptHandler(), _Requires_lock_not_held_(), acpi_suspend(), ArchSwitchContext(), BlpArchEnableTranslation(), CloseBitPlane(), ExAcquireResourceLock(), FrLdrBugCheckEx(), FrLdrBugCheckWithMessage(), HalCalibratePerformanceCounter(), HalDisableSystemInterrupt(), HalDisplayString(), HalEnableSystemInterrupt(), HaliHaltSystem(), HalpAcquireCmosSpinLock(), HalpApcInterruptHandler(), HalpBiosDisplayReset(), HalpDispatchInterruptHandler(), HalpEndSystemInterrupt(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializePICs(), HalpInitializeTsc(), HalpLowerIrql(), HalpReboot(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KeBugCheckWithTf(), KeDisableInterrupts(), KeEnterKernelDebugger(), KeGetCurrentIrql(), KeSetCurrentIrql(), KfLowerIrql(), KfRaiseIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiApcInterrupt(), KiCheckForApcDelivery(), KiCommonExit(), KiDispatchInterrupt(), KiEndInterrupt(), KiEnterV86Mode(), KiExitInterrupt(), KiExitSystemCallDebugChecks(), KiExitV86Trap(), KiFlushNPXState(), KiI386PentiumLockErrataFixup(), KiIdleLoop(), KiInterruptDispatch3(), KiIsNpxErrataPresent(), KiRetireDpcList(), KiSetupDecrementerTrap(), KiSwapContextEntry(), KiSwitchKernelStack(), KiSystemService(), KiTimerExpiration(), KiTrap02Handler(), KiTrap06Handler(), KiTrap07Handler(), KiTrap08Handler(), KiTrap0DHandler(), KiUserModeCallout(), MachInit(), MpsTimerHandler(), NtCallbackReturn(), OpenBitPlane(), PopShutdownHandler(), sb16_play(), ScrAcquireOwnership(), ScrSetCursor(), ScrSetCursorShape(), and WinLdrSetProcessorContext().

◆ _enable()

Definition at line 1710 of file intrin_x86.h.

1711 {
1712  __asm__("sti" : : : "memory");
1713 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _HalpApcInterruptHandler(), _HalpDismissIrqGeneric(), _HalpDismissIrqLevel(), _HalpDispatchInterruptHandler(), _Requires_lock_not_held_(), acpi_suspend(), ArchSwitchContext(), CloseBitPlane(), ExpInitializeExecutive(), ExReleaseResourceLock(), HalBeginSystemInterrupt(), HalDisableSystemInterrupt(), HalEnableSystemInterrupt(), HalpApcInterruptHandler(), HalpDispatchInterruptHandler(), HalpEndSystemInterrupt(), HalpInitializeTsc(), HalpInitPICs(), HalpLowerIrql(), HalProcessorIdle(), KdPollBreakIn(), KeGetCurrentIrql(), KeRemoveQueueDpc(), KeRestoreInterrupts(), KeSetCurrentIrql(), KeThawExecution(), KfLowerIrql(), KfRaiseIrql(), KiApcInterrupt(), KiCheckForApcDelivery(), KiDebugHandler(), KiDispatchInterrupt(), KiEnterV86Mode(), KiExitV86Mode(), KiExitV86Trap(), KiI386PentiumLockErrataFixup(), KiIdleLoop(), KiInitializeSystem(), KiInterruptDispatch3(), KiInterruptHandler(), KiIsNpxErrataPresent(), KiNpxHandler(), KiRetireDpcList(), KiSetupDecrementerTrap(), KiSwapContextEntry(), KiSystemCallHandler(), KiSystemService(), KiSystemServiceHandler(), KiSystemStartupBootStack(), KiTimerExpiration(), KiTrap00Handler(), KiTrap01Handler(), KiTrap04Handler(), KiTrap05Handler(), KiTrap06Handler(), KiTrap07Handler(), KiTrap09Handler(), KiTrap0DHandler(), KiTrap0EHandler(), KiTrap10Handler(), KiTrap11Handler(), KiTrap13Handler(), KiUserModeCallout(), MpsTimerHandler(), NtCallbackReturn(), OpenBitPlane(), sb16_play(), ScrAcquireOwnership(), ScrSetCursor(), and ScrSetCursorShape().

◆ _inp()

Definition at line 1609 of file intrin_x86.h.

1610 {
1611  return __inbyte(Port);
1612 }
CPPORT Port[4]
Definition: headless.c:35
__INTRIN_INLINE unsigned char __inbyte(unsigned short Port)
Definition: intrin_x86.h:1525

◆ _inpd()

Definition at line 1619 of file intrin_x86.h.

1620 {
1621  return __indword(Port);
1622 }
CPPORT Port[4]
Definition: headless.c:35
__INTRIN_INLINE unsigned long __indword(unsigned short Port)
Definition: intrin_x86.h:1539

◆ _inpw()

Definition at line 1614 of file intrin_x86.h.

1615 {
1616  return __inword(Port);
1617 }
CPPORT Port[4]
Definition: headless.c:35
__INTRIN_INLINE unsigned short __inword(unsigned short Port)
Definition: intrin_x86.h:1532

◆ _InterlockedAnd()

__INTRIN_INLINE long _InterlockedAnd ( volatile long value,
long  mask 
)

Definition at line 505 of file intrin_x86.h.

506 {
507  long x;
508  long y;
509 
510  y = *value;
511 
512  do
513  {
514  x = y;
516  }
517  while(y != x);
518 
519  return y;
520 }
Definition: pdh_main.c:93
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:386
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedAnd16()

__INTRIN_INLINE short _InterlockedAnd16 ( volatile short value,
short  mask 
)

Definition at line 486 of file intrin_x86.h.

487 {
488  short x;
489  short y;
490 
491  y = *value;
492 
493  do
494  {
495  x = y;
497  }
498  while(y != x);
499 
500  return y;
501 }
Definition: pdh_main.c:93
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:377
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedAnd8()

__INTRIN_INLINE char _InterlockedAnd8 ( volatile char value,
char  mask 
)

Definition at line 467 of file intrin_x86.h.

468 {
469  char x;
470  char y;
471 
472  y = *value;
473 
474  do
475  {
476  x = y;
478  }
479  while(y != x);
480 
481  return y;
482 }
Definition: pdh_main.c:93
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:368
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _interlockedbittestandreset()

__INTRIN_INLINE unsigned char _interlockedbittestandreset ( volatile long a,
long  b 
)

Definition at line 730 of file intrin_x86.h.

731 {
732  unsigned char retval;
733  __asm__("lock; btrl %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval), [a] "+m" (*a) : [b] "Ir" (b) : "memory");
734  return retval;
735 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _interlockedbittestandset()

__INTRIN_INLINE unsigned char _interlockedbittestandset ( volatile long a,
long  b 
)

Definition at line 749 of file intrin_x86.h.

750 {
751  unsigned char retval;
752  __asm__("lock; btsl %[b], %[a]; setc %b[retval]" : [retval] "=q" (retval), [a] "+m" (*a) : [b] "Ir" (b) : "memory");
753  return retval;
754 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _InterlockedCompareExchange()

__INTRIN_INLINE long _InterlockedCompareExchange ( volatile long Destination,
long  Exchange,
long  Comperand 
)

Definition at line 386 of file intrin_x86.h.

387 {
388  long retval = Comperand;
389  __asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange): "memory");
390  return retval;
391 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2950

Referenced by _InterlockedAnd(), _InterlockedOr(), and _InterlockedXor().

◆ _InterlockedCompareExchange16()

__INTRIN_INLINE short _InterlockedCompareExchange16 ( volatile short Destination,
short  Exchange,
short  Comperand 
)

Definition at line 377 of file intrin_x86.h.

378 {
379  short retval = Comperand;
380  __asm__("lock; cmpxchgw %w[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange): "memory");
381  return retval;
382 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2950

Referenced by _InterlockedAnd16(), _InterlockedOr16(), and _InterlockedXor16().

◆ _InterlockedCompareExchange64()

__INTRIN_INLINE long long _InterlockedCompareExchange64 ( volatile long long Destination,
long long  Exchange,
long long  Comperand 
)

Definition at line 692 of file intrin_x86.h.

693 {
694  long long retval = Comperand;
695 
696  __asm__
697  (
698  "lock; cmpxchg8b %[Destination]" :
699  [retval] "+A" (retval) :
700  [Destination] "m" (*Destination),
701  "b" ((unsigned long)((Exchange >> 0) & 0xFFFFFFFF)),
702  "c" ((unsigned long)((Exchange >> 32) & 0xFFFFFFFF)) :
703  "memory"
704  );
705 
706  return retval;
707 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2950

◆ _InterlockedCompareExchange8()

__INTRIN_INLINE char _InterlockedCompareExchange8 ( volatile char Destination,
char  Exchange,
char  Comperand 
)

Definition at line 368 of file intrin_x86.h.

369 {
370  char retval = Comperand;
371  __asm__("lock; cmpxchgb %b[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange) : "memory");
372  return retval;
373 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2950

Referenced by _InterlockedAnd8(), _InterlockedOr8(), and _InterlockedXor8().

◆ _InterlockedCompareExchangePointer()

__INTRIN_INLINE void* _InterlockedCompareExchangePointer ( void *volatile Destination,
void Exchange,
void Comperand 
)

Definition at line 395 of file intrin_x86.h.

396 {
397  void * retval = (void *)Comperand;
398  __asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval] "=a" (retval) : "[retval]" (retval), [Destination] "m" (*Destination), [Exchange] "q" (Exchange) : "memory");
399  return retval;
400 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2950

◆ _InterlockedDecrement()

__INTRIN_INLINE long _InterlockedDecrement ( volatile long lpAddend)

Definition at line 638 of file intrin_x86.h.

639 {
640  return _InterlockedExchangeAdd(lpAddend, -1) - 1;
641 }
__INTRIN_INLINE long _InterlockedExchangeAdd(volatile long *Addend, long Value)
Definition: intrin_x86.h:458

◆ _InterlockedDecrement16()

__INTRIN_INLINE short _InterlockedDecrement16 ( volatile short lpAddend)

Definition at line 652 of file intrin_x86.h.

653 {
654  return _InterlockedExchangeAdd16(lpAddend, -1) - 1;
655 }
__INTRIN_INLINE short _InterlockedExchangeAdd16(volatile short *Addend, short Value)
Definition: intrin_x86.h:449

◆ _InterlockedExchange()

__INTRIN_INLINE long _InterlockedExchange ( volatile long Target,
long  Value 
)

Definition at line 422 of file intrin_x86.h.

423 {
424  long retval = Value;
425  __asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
426  return retval;
427 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406
_In_ WDFIOTARGET Target
Definition: wdfrequest.h:306

◆ _InterlockedExchange16()

__INTRIN_INLINE short _InterlockedExchange16 ( volatile short Target,
short  Value 
)

Definition at line 413 of file intrin_x86.h.

414 {
415  short retval = Value;
416  __asm__("xchgw %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
417  return retval;
418 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406
_In_ WDFIOTARGET Target
Definition: wdfrequest.h:306

◆ _InterlockedExchange8()

__INTRIN_INLINE char _InterlockedExchange8 ( volatile char Target,
char  Value 
)

Definition at line 404 of file intrin_x86.h.

405 {
406  char retval = Value;
407  __asm__("xchgb %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
408  return retval;
409 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406
_In_ WDFIOTARGET Target
Definition: wdfrequest.h:306

◆ _InterlockedExchangeAdd()

__INTRIN_INLINE long _InterlockedExchangeAdd ( volatile long Addend,
long  Value 
)

Definition at line 458 of file intrin_x86.h.

459 {
460  long retval = Value;
461  __asm__("lock; xaddl %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
462  return retval;
463 }
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406

Referenced by _InterlockedDecrement(), and _InterlockedIncrement().

◆ _InterlockedExchangeAdd16()

__INTRIN_INLINE short _InterlockedExchangeAdd16 ( volatile short Addend,
short  Value 
)

Definition at line 449 of file intrin_x86.h.

450 {
451  short retval = Value;
452  __asm__("lock; xaddw %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
453  return retval;
454 }
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406

Referenced by _InterlockedDecrement16(), and _InterlockedIncrement16().

◆ _InterlockedExchangeAdd8()

__INTRIN_INLINE char _InterlockedExchangeAdd8 ( char volatile Addend,
char  Value 
)

Definition at line 440 of file intrin_x86.h.

441 {
442  char retval = Value;
443  __asm__("lock; xaddb %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
444  return retval;
445 }
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406

◆ _InterlockedExchangePointer()

__INTRIN_INLINE void* _InterlockedExchangePointer ( void *volatile Target,
void Value 
)

Definition at line 431 of file intrin_x86.h.

432 {
433  void * retval = Value;
434  __asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
435  return retval;
436 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:406
_In_ WDFIOTARGET Target
Definition: wdfrequest.h:306

◆ _InterlockedIncrement()

__INTRIN_INLINE long _InterlockedIncrement ( volatile long lpAddend)

Definition at line 645 of file intrin_x86.h.

646 {
647  return _InterlockedExchangeAdd(lpAddend, 1) + 1;
648 }
__INTRIN_INLINE long _InterlockedExchangeAdd(volatile long *Addend, long Value)
Definition: intrin_x86.h:458

◆ _InterlockedIncrement16()

__INTRIN_INLINE short _InterlockedIncrement16 ( volatile short lpAddend)

Definition at line 659 of file intrin_x86.h.

660 {
661  return _InterlockedExchangeAdd16(lpAddend, 1) + 1;
662 }
__INTRIN_INLINE short _InterlockedExchangeAdd16(volatile short *Addend, short Value)
Definition: intrin_x86.h:449

◆ _InterlockedOr()

__INTRIN_INLINE long _InterlockedOr ( volatile long value,
long  mask 
)

Definition at line 562 of file intrin_x86.h.

563 {
564  long x;
565  long y;
566 
567  y = *value;
568 
569  do
570  {
571  x = y;
573  }
574  while(y != x);
575 
576  return y;
577 }
Definition: pdh_main.c:93
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:386
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedOr16()

__INTRIN_INLINE short _InterlockedOr16 ( volatile short value,
short  mask 
)

Definition at line 543 of file intrin_x86.h.

544 {
545  short x;
546  short y;
547 
548  y = *value;
549 
550  do
551  {
552  x = y;
554  }
555  while(y != x);
556 
557  return y;
558 }
Definition: pdh_main.c:93
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:377
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedOr8()

__INTRIN_INLINE char _InterlockedOr8 ( volatile char value,
char  mask 
)

Definition at line 524 of file intrin_x86.h.

525 {
526  char x;
527  char y;
528 
529  y = *value;
530 
531  do
532  {
533  x = y;
535  }
536  while(y != x);
537 
538  return y;
539 }
Definition: pdh_main.c:93
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:368
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedXor()

__INTRIN_INLINE long _InterlockedXor ( volatile long value,
long  mask 
)

Definition at line 619 of file intrin_x86.h.

620 {
621  long x;
622  long y;
623 
624  y = *value;
625 
626  do
627  {
628  x = y;
630  }
631  while(y != x);
632 
633  return y;
634 }
Definition: pdh_main.c:93
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:386
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedXor16()

__INTRIN_INLINE short _InterlockedXor16 ( volatile short value,
short  mask 
)

Definition at line 600 of file intrin_x86.h.

601 {
602  short x;
603  short y;
604 
605  y = *value;
606 
607  do
608  {
609  x = y;
611  }
612  while(y != x);
613 
614  return y;
615 }
Definition: pdh_main.c:93
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:377
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedXor8()

__INTRIN_INLINE char _InterlockedXor8 ( volatile char value,
char  mask 
)

Definition at line 581 of file intrin_x86.h.

582 {
583  char x;
584  char y;
585 
586  y = *value;
587 
588  do
589  {
590  x = y;
592  }
593  while(y != x);
594 
595  return y;
596 }
Definition: pdh_main.c:93
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:368
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _lrotl()

unsigned long _lrotl ( unsigned long  value,
int  shift 
)

Definition at line 1288 of file intrin_x86.h.

1289 {
1290  unsigned long retval;
1291  __asm__("roll %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1292  return retval;
1293 }
Definition: pdh_main.c:93
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _lrotr()

unsigned long _lrotr ( unsigned long  value,
int  shift 
)

Definition at line 1297 of file intrin_x86.h.

1298 {
1299  unsigned long retval;
1300  __asm__("rorl %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1301  return retval;
1302 }
Definition: pdh_main.c:93
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _mm_lfence()

__INTRIN_INLINE void _mm_lfence ( void  )

Definition at line 106 of file intrin_x86.h.

107 {
108  _ReadBarrier();
109  __asm__ __volatile__("lfence");
110  _ReadBarrier();
111 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define _ReadBarrier
Definition: intrin_x86.h:95

◆ _mm_mfence()

__INTRIN_INLINE void _mm_mfence ( void  )

Definition at line 99 of file intrin_x86.h.

100 {
101  __asm__ __volatile__("mfence" : : : "memory");
102 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _mm_pause()

__INTRIN_INLINE void _mm_pause ( void  )

Definition at line 2037 of file intrin_x86.h.

2038 {
2039  __asm__ __volatile__("pause" : : : "memory");
2040 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _mm_sfence()

__INTRIN_INLINE void _mm_sfence ( void  )

Definition at line 115 of file intrin_x86.h.

116 {
117  _WriteBarrier();
118  __asm__ __volatile__("sfence");
119  _WriteBarrier();
120 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define _WriteBarrier
Definition: intrin_x86.h:96

◆ _outp()

__INTRIN_INLINE int __cdecl _outp ( unsigned short  Port,
int  databyte 
)

Definition at line 1624 of file intrin_x86.h.

1625 {
1626  __outbyte(Port, (unsigned char)databyte);
1627  return databyte;
1628 }
CPPORT Port[4]
Definition: headless.c:35
__INTRIN_INLINE void __outbyte(unsigned short Port, unsigned char Data)
Definition: intrin_x86.h:1579

◆ _outpd()

__INTRIN_INLINE unsigned long __cdecl _outpd ( unsigned short  Port,
unsigned long  dataword 
)

Definition at line 1636 of file intrin_x86.h.

1637 {
1638  __outdword(Port, dataword);
1639  return dataword;
1640 }
CPPORT Port[4]
Definition: headless.c:35
__INTRIN_INLINE void __outdword(unsigned short Port, unsigned long Data)
Definition: intrin_x86.h:1589

◆ _outpw()

__INTRIN_INLINE unsigned short __cdecl _outpw ( unsigned short  Port,
unsigned short  dataword 
)

Definition at line 1630 of file intrin_x86.h.

1631 {
1632  __outword(Port, dataword);
1633  return dataword;
1634 }
CPPORT Port[4]
Definition: headless.c:35
__INTRIN_INLINE void __outword(unsigned short Port, unsigned short Data)
Definition: intrin_x86.h:1584

◆ _ReadWriteBarrier()

__INTRIN_INLINE void _ReadWriteBarrier ( void  )

Definition at line 88 of file intrin_x86.h.

89 {
90  __asm__ __volatile__("" : : : "memory");
91 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotl()

__INTRIN_INLINE unsigned int __cdecl _rotl ( unsigned int  value,
int  shift 
)

Definition at line 1218 of file intrin_x86.h.

1219 {
1220  unsigned int retval;
1221  __asm__("roll %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1222  return retval;
1223 }
Definition: pdh_main.c:93
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotl16()

__INTRIN_INLINE unsigned short __cdecl _rotl16 ( unsigned short  value,
unsigned char  shift 
)

Definition at line 1209 of file intrin_x86.h.

1210 {
1211  unsigned short retval;
1212  __asm__("rolw %b[shift], %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1213  return retval;
1214 }
Definition: pdh_main.c:93
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotl64()

__INTRIN_INLINE unsigned long long __cdecl _rotl64 ( unsigned long long  value,
int  shift 
)

Definition at line 1235 of file intrin_x86.h.

1236 {
1237  /* FIXME: this is probably not optimal */
1238  return (value << shift) | (value >> (64 - shift));
1239 }
Definition: pdh_main.c:93
#define shift
Definition: input.c:1756

◆ _rotl8()

__INTRIN_INLINE unsigned char __cdecl _rotl8 ( unsigned char  value,
unsigned char  shift 
)

Definition at line 1200 of file intrin_x86.h.

1201 {
1202  unsigned char retval;
1203  __asm__("rolb %b[shift], %b[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1204  return retval;
1205 }
Definition: pdh_main.c:93
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotr()

unsigned int _rotr ( unsigned int  value,
int  shift 
)

Definition at line 1244 of file intrin_x86.h.

1245 {
1246  unsigned int retval;
1247  __asm__("rorl %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1248  return retval;
1249 }
Definition: pdh_main.c:93
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotr16()

__INTRIN_INLINE unsigned short __cdecl _rotr16 ( unsigned short  value,
unsigned char  shift 
)

Definition at line 1262 of file intrin_x86.h.

1263 {
1264  unsigned short retval;
1265  __asm__("rorw %b[shift], %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1266  return retval;
1267 }
Definition: pdh_main.c:93
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotr64()

__INTRIN_INLINE unsigned long long __cdecl _rotr64 ( unsigned long long  value,
int  shift 
)

Definition at line 1279 of file intrin_x86.h.

1280 {
1281  /* FIXME: this is probably not optimal */
1282  return (value >> shift) | (value << (64 - shift));
1283 }
Definition: pdh_main.c:93
#define shift
Definition: input.c:1756

◆ _rotr8()

__INTRIN_INLINE unsigned char __cdecl _rotr8 ( unsigned char  value,
unsigned char  shift 
)

Definition at line 1253 of file intrin_x86.h.

1254 {
1255  unsigned char retval;
1256  __asm__("rorb %b[shift], %b[retval]" : [retval] "=qm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1257  return retval;
1258 }
Definition: pdh_main.c:93
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _sgdt()

__INTRIN_INLINE void _sgdt ( void Destination)

Definition at line 2029 of file intrin_x86.h.

2030 {
2031  __asm__ __volatile__("sgdt %0" : : "m"(*(short*)Destination) : "memory");
2032 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2950

Referenced by ImgArchEfiStartBootApplication(), and Mmx86InitializeMemoryMap().

◆ memcpy()

__INTRIN_INLINE void* __cdecl memcpy ( void dest,
const void source,
size_t  num 
)

Definition at line 74 of file intrin_x86.h.

75 {
76  return memmove(dest, source, num);
77 }
GLuint GLuint num
Definition: glext.h:9618
void *__cdecl memmove(void *dest, const void *source, size_t num)
Definition: memmove.c:8
static char * dest
Definition: rtl.c:135

◆ memmove()

void* __cdecl memmove ( void dest,
const void source,
size_t  num 
)

Definition at line 8 of file memmove.c.

9 {
10  char *char_dest = (char *)dest;
11  char *char_src = (char *)src;
12 
13  if ((char_dest <= char_src) || (char_dest >= (char_src+count)))
14  {
15  /* non-overlapping buffers */
16  while(count > 0)
17  {
18  *char_dest = *char_src;
19  char_dest++;
20  char_src++;
21  count--;
22  }
23  }
24  else
25  {
26  /* overlaping buffers */
27  char_dest = (char *)dest + count - 1;
28  char_src = (char *)src + count - 1;
29 
30  while(count > 0)
31  {
32  *char_dest = *char_src;
33  char_dest--;
34  char_src--;
35  count--;
36  }
37  }
38 
39  return dest;
40 }
GLuint GLuint GLsizei count
Definition: gl.h:1545
GLenum src
Definition: glext.h:6340
static char * dest
Definition: rtl.c:135

Referenced by memcpy().