ReactOS  0.4.13-dev-79-gcd489d8
intrin_x86.h File Reference

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Macros

#define _ReturnAddress()   (__builtin_return_address(0))
 
#define _AddressOfReturnAddress()   (&(((void **)(__builtin_frame_address(0)))[1]))
 
#define _ReadBarrier   _ReadWriteBarrier
 
#define _WriteBarrier   _ReadWriteBarrier
 

Functions

void *__cdecl memmove (void *dest, const void *source, size_t num)
 
__INTRIN_INLINE void *__cdecl memcpy (void *dest, const void *source, size_t num)
 
__INTRIN_INLINE void _ReadWriteBarrier (void)
 
__INTRIN_INLINE void _mm_mfence (void)
 
__INTRIN_INLINE void _mm_lfence (void)
 
__INTRIN_INLINE void _mm_sfence (void)
 
__INTRIN_INLINE char _InterlockedCompareExchange8 (volatile char *Destination, char Exchange, char Comperand)
 
__INTRIN_INLINE short _InterlockedCompareExchange16 (volatile short *Destination, short Exchange, short Comperand)
 
__INTRIN_INLINE long _InterlockedCompareExchange (volatile long *Destination, long Exchange, long Comperand)
 
__INTRIN_INLINE void_InterlockedCompareExchangePointer (void *volatile *Destination, void *Exchange, void *Comperand)
 
__INTRIN_INLINE char _InterlockedExchange8 (volatile char *Target, char Value)
 
__INTRIN_INLINE short _InterlockedExchange16 (volatile short *Target, short Value)
 
__INTRIN_INLINE long _InterlockedExchange (volatile long *Target, long Value)
 
__INTRIN_INLINE void_InterlockedExchangePointer (void *volatile *Target, void *Value)
 
__INTRIN_INLINE char _InterlockedExchangeAdd8 (char volatile *Addend, char Value)
 
__INTRIN_INLINE short _InterlockedExchangeAdd16 (volatile short *Addend, short Value)
 
__INTRIN_INLINE long _InterlockedExchangeAdd (volatile long *Addend, long Value)
 
__INTRIN_INLINE char _InterlockedAnd8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedAnd16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedAnd (volatile long *value, long mask)
 
__INTRIN_INLINE char _InterlockedOr8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedOr16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedOr (volatile long *value, long mask)
 
__INTRIN_INLINE char _InterlockedXor8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedXor16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedXor (volatile long *value, long mask)
 
__INTRIN_INLINE long _InterlockedDecrement (volatile long *lpAddend)
 
__INTRIN_INLINE long _InterlockedIncrement (volatile long *lpAddend)
 
__INTRIN_INLINE short _InterlockedDecrement16 (volatile short *lpAddend)
 
__INTRIN_INLINE short _InterlockedIncrement16 (volatile short *lpAddend)
 
__INTRIN_INLINE long long _InterlockedCompareExchange64 (volatile long long *Destination, long long Exchange, long long Comperand)
 
__INTRIN_INLINE unsigned char _interlockedbittestandreset (volatile long *a, long b)
 
__INTRIN_INLINE unsigned char _interlockedbittestandset (volatile long *a, long b)
 
__INTRIN_INLINE void __stosb (unsigned char *Dest, unsigned char Data, size_t Count)
 
__INTRIN_INLINE void __stosw (unsigned short *Dest, unsigned short Data, size_t Count)
 
__INTRIN_INLINE void __stosd (unsigned long *Dest, unsigned long Data, size_t Count)
 
__INTRIN_INLINE void __movsb (unsigned char *Destination, const unsigned char *Source, size_t Count)
 
__INTRIN_INLINE void __movsw (unsigned short *Destination, const unsigned short *Source, size_t Count)
 
__INTRIN_INLINE void __movsd (unsigned long *Destination, const unsigned long *Source, size_t Count)
 
__INTRIN_INLINE void __writefsbyte (unsigned long Offset, unsigned char Data)
 
__INTRIN_INLINE void __writefsword (unsigned long Offset, unsigned short Data)
 
__INTRIN_INLINE void __writefsdword (unsigned long Offset, unsigned long Data)
 
__INTRIN_INLINE unsigned char __readfsbyte (unsigned long Offset)
 
__INTRIN_INLINE unsigned short __readfsword (unsigned long Offset)
 
__INTRIN_INLINE unsigned long __readfsdword (unsigned long Offset)
 
__INTRIN_INLINE void __incfsbyte (unsigned long Offset)
 
__INTRIN_INLINE void __incfsword (unsigned long Offset)
 
__INTRIN_INLINE void __incfsdword (unsigned long Offset)
 
__INTRIN_INLINE void __addfsbyte (unsigned long Offset, unsigned char Data)
 
__INTRIN_INLINE void __addfsword (unsigned long Offset, unsigned short Data)
 
__INTRIN_INLINE void __addfsdword (unsigned long Offset, unsigned long Data)
 
__INTRIN_INLINE unsigned char _BitScanForward (unsigned long *Index, unsigned long Mask)
 
__INTRIN_INLINE unsigned char _BitScanReverse (unsigned long *Index, unsigned long Mask)
 
__INTRIN_INLINE unsigned char _bittest (const long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandcomplement (long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandreset (long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandset (long *a, long b)
 
__INTRIN_INLINE unsigned char __cdecl _rotl8 (unsigned char value, unsigned char shift)
 
__INTRIN_INLINE unsigned short __cdecl _rotl16 (unsigned short value, unsigned char shift)
 
__INTRIN_INLINE unsigned int __cdecl _rotl (unsigned int value, int shift)
 
__INTRIN_INLINE unsigned long long __cdecl _rotl64 (unsigned long long value, int shift)
 
__INTRIN_INLINE unsigned int __cdecl _rotr (unsigned int value, int shift)
 
__INTRIN_INLINE unsigned char __cdecl _rotr8 (unsigned char value, unsigned char shift)
 
__INTRIN_INLINE unsigned short __cdecl _rotr16 (unsigned short value, unsigned char shift)
 
__INTRIN_INLINE unsigned long long __cdecl _rotr64 (unsigned long long value, int shift)
 
__INTRIN_INLINE unsigned long __cdecl _lrotl (unsigned long value, int shift)
 
__INTRIN_INLINE unsigned long __cdecl _lrotr (unsigned long value, int shift)
 
__INTRIN_INLINE unsigned long long __ll_lshift (unsigned long long Mask, int Bit)
 
__INTRIN_INLINE long long __ll_rshift (long long Mask, int Bit)
 
__INTRIN_INLINE unsigned long long __ull_rshift (unsigned long long Mask, int Bit)
 
__INTRIN_INLINE unsigned short __cdecl _byteswap_ushort (unsigned short value)
 
__INTRIN_INLINE unsigned long __cdecl _byteswap_ulong (unsigned long value)
 
__INTRIN_INLINE unsigned long long __cdecl _byteswap_uint64 (unsigned long long value)
 
__INTRIN_INLINE unsigned int __lzcnt (unsigned int value)
 
__INTRIN_INLINE unsigned short __lzcnt16 (unsigned short value)
 
__INTRIN_INLINE unsigned int __popcnt (unsigned int value)
 
__INTRIN_INLINE unsigned short __popcnt16 (unsigned short value)
 
__INTRIN_INLINE long long __emul (int a, int b)
 
__INTRIN_INLINE unsigned long long __emulu (unsigned int a, unsigned int b)
 
__INTRIN_INLINE long long __cdecl _abs64 (long long value)
 
__INTRIN_INLINE unsigned char __inbyte (unsigned short Port)
 
__INTRIN_INLINE unsigned short __inword (unsigned short Port)
 
__INTRIN_INLINE unsigned long __indword (unsigned short Port)
 
__INTRIN_INLINE void __inbytestring (unsigned short Port, unsigned char *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __inwordstring (unsigned short Port, unsigned short *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __indwordstring (unsigned short Port, unsigned long *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outbyte (unsigned short Port, unsigned char Data)
 
__INTRIN_INLINE void __outword (unsigned short Port, unsigned short Data)
 
__INTRIN_INLINE void __outdword (unsigned short Port, unsigned long Data)
 
__INTRIN_INLINE void __outbytestring (unsigned short Port, unsigned char *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outwordstring (unsigned short Port, unsigned short *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outdwordstring (unsigned short Port, unsigned long *Buffer, unsigned long Count)
 
__INTRIN_INLINE int __cdecl _inp (unsigned short Port)
 
__INTRIN_INLINE unsigned short __cdecl _inpw (unsigned short Port)
 
__INTRIN_INLINE unsigned long __cdecl _inpd (unsigned short Port)
 
__INTRIN_INLINE int __cdecl _outp (unsigned short Port, int databyte)
 
__INTRIN_INLINE unsigned short __cdecl _outpw (unsigned short Port, unsigned short dataword)
 
__INTRIN_INLINE unsigned long __cdecl _outpd (unsigned short Port, unsigned long dataword)
 
__INTRIN_INLINE void __cpuid (int CPUInfo[4], int InfoType)
 
__INTRIN_INLINE void __cpuidex (int CPUInfo[4], int InfoType, int ECXValue)
 
__INTRIN_INLINE unsigned long long __rdtsc (void)
 
__INTRIN_INLINE void __writeeflags (uintptr_t Value)
 
__INTRIN_INLINE uintptr_t __readeflags (void)
 
__INTRIN_INLINE void __cdecl __debugbreak (void)
 
__INTRIN_INLINE void __ud2 (void)
 
__INTRIN_INLINE void __int2c (void)
 
__INTRIN_INLINE void __cdecl _disable (void)
 
__INTRIN_INLINE void __cdecl _enable (void)
 
__INTRIN_INLINE void __halt (void)
 
 __declspec (noreturn) __INTRIN_INLINE void __fastfail(unsigned int Code)
 
__INTRIN_INLINE void __writecr0 (unsigned int Data)
 
__INTRIN_INLINE void __writecr3 (unsigned int Data)
 
__INTRIN_INLINE void __writecr4 (unsigned int Data)
 
__INTRIN_INLINE void __writecr8 (unsigned int Data)
 
__INTRIN_INLINE unsigned long __readcr0 (void)
 
__INTRIN_INLINE unsigned long __readcr2 (void)
 
__INTRIN_INLINE unsigned long __readcr3 (void)
 
__INTRIN_INLINE unsigned long __readcr4 (void)
 
__INTRIN_INLINE unsigned long __readcr8 (void)
 
__INTRIN_INLINE unsigned int __readdr (unsigned int reg)
 
__INTRIN_INLINE void __writedr (unsigned reg, unsigned int value)
 
__INTRIN_INLINE void __invlpg (void *Address)
 
__INTRIN_INLINE unsigned long long __readmsr (unsigned long reg)
 
__INTRIN_INLINE void __writemsr (unsigned long Register, unsigned long long Value)
 
__INTRIN_INLINE unsigned long long __readpmc (unsigned long counter)
 
__INTRIN_INLINE unsigned long __segmentlimit (unsigned long a)
 
__INTRIN_INLINE void __wbinvd (void)
 
__INTRIN_INLINE void __lidt (void *Source)
 
__INTRIN_INLINE void __sidt (void *Destination)
 
__INTRIN_INLINE void _sgdt (void *Destination)
 
__INTRIN_INLINE void _mm_pause (void)
 
__INTRIN_INLINE void __nop (void)
 

Macro Definition Documentation

◆ _AddressOfReturnAddress

#define _AddressOfReturnAddress (   void)    (&(((void **)(__builtin_frame_address(0)))[1]))

Definition at line 82 of file intrin_x86.h.

◆ _ReadBarrier

#define _ReadBarrier   _ReadWriteBarrier

Definition at line 95 of file intrin_x86.h.

◆ _ReturnAddress

#define _ReturnAddress (   void)    (__builtin_return_address(0))

Definition at line 81 of file intrin_x86.h.

◆ _WriteBarrier

#define _WriteBarrier   _ReadWriteBarrier

Definition at line 96 of file intrin_x86.h.

Function Documentation

◆ __addfsbyte()

__INTRIN_INLINE void __addfsbyte ( unsigned long  Offset,
unsigned char  Data 
)

Definition at line 966 of file intrin_x86.h.

967 {
968  if(!__builtin_constant_p(Offset))
969  __asm__ __volatile__("addb %b[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
970  else
971  __asm__ __volatile__("addb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
972 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __addfsdword()

__INTRIN_INLINE void __addfsdword ( unsigned long  Offset,
unsigned long  Data 
)

Definition at line 982 of file intrin_x86.h.

983 {
984  if(!__builtin_constant_p(Offset))
985  __asm__ __volatile__("addl %k[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
986  else
987  __asm__ __volatile__("addl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
988 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __addfsword()

__INTRIN_INLINE void __addfsword ( unsigned long  Offset,
unsigned short  Data 
)

Definition at line 974 of file intrin_x86.h.

975 {
976  if(!__builtin_constant_p(Offset))
977  __asm__ __volatile__("addw %w[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
978  else
979  __asm__ __volatile__("addw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
980 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __cpuid()

__INTRIN_INLINE void __cpuid ( int  CPUInfo[4],
int  InfoType 
)

Definition at line 1525 of file intrin_x86.h.

1526 {
1527  __asm__ __volatile__("cpuid" : "=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3]) : "a" (InfoType));
1528 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
CPUINFO CPUInfo[]
Definition: parse.c:231

◆ __cpuidex()

__INTRIN_INLINE void __cpuidex ( int  CPUInfo[4],
int  InfoType,
int  ECXValue 
)

Definition at line 1530 of file intrin_x86.h.

1531 {
1532  __asm__ __volatile__("cpuid" : "=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3]) : "a" (InfoType), "c" (ECXValue));
1533 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
CPUINFO CPUInfo[]
Definition: parse.c:231

Referenced by BlArchCpuId(), and ZSTD_cpuid().

◆ __debugbreak()

__INTRIN_INLINE void __cdecl __debugbreak ( void  )

Definition at line 1565 of file intrin_x86.h.

1566 {
1567  __asm__("int $3");
1568 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by __C_specific_handler(), __CxxFrameHandler(), __CxxFrameHandler3(), _assert(), _RTC_DefaultErrorFuncW(), _RTC_NumErrors(), _RTC_SetErrorFunc(), _RTC_SetErrorType(), _RTC_Shutdown(), _tWinMain(), BlStatusError(), BmfdLoadFontFile(), Catch_RTC_Failure(), DoCrashCommand(), DRIVER_Dispatch(), EngBitBlt(), EnumParametersCallback(), FltpMiniFilterDriverUnload(), FltpPostFsFilterOperation(), FltpPreFsFilterOperation(), FtfdEnablePDEV(), FtfdQueryFont(), FtfdQueryFontTree(), GetCallingConvention(), HalpProfileInterruptHandler(), HalRequestIpi(), KeConnectInterrupt(), KeDisconnectInterrupt(), KeSwitchKernelStack(), KeUserModeCallback(), KiCallUserMode(), KiDispatchException(), KiInterruptHandler(), KiRestoreProcessorControlState(), KiSaveProcessorControlState(), KiSystemCallHandler(), KiSystemService(), KmtCloseDriver(), KmtFltLoadDriver(), KmtFltUnloadDriver(), KmtLoadDriver(), KmtOpenDriver(), KmtUnloadDriver(), KsecDeviceControl(), METADC_GetAndSetDCDWord(), MI_IS_MAPPED_PTE(), MiGetPteForProcess(), MmGetPageTableForProcess(), MmHapReportHeapCorruption(), MyReallocPool__(), NtCallbackReturn(), NtGdiClearBrushAttributes(), NtGdiSetBrushAttributes(), NtSetLdtEntries(), RtlAssert(), RtlUnwindEx(), and WmipIoControl().

◆ __declspec()

__declspec ( noreturn  )

Definition at line 1601 of file intrin_x86.h.

1603 {
1604  __asm__("int $0x29" : : "c"(Code) : "memory");
1605  __builtin_unreachable();
1606 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define Code
Definition: deflate.h:80

◆ __emul()

__INTRIN_INLINE long long __emul ( int  a,
int  b 
)

Definition at line 1363 of file intrin_x86.h.

1364 {
1365  long long retval;
1366  __asm__("imull %[b]" : "=A" (retval) : [a] "a" (a), [b] "rm" (b));
1367  return retval;
1368 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ __emulu()

__INTRIN_INLINE unsigned long long __emulu ( unsigned int  a,
unsigned int  b 
)

Definition at line 1372 of file intrin_x86.h.

1373 {
1374  unsigned long long retval;
1375  __asm__("mull %[b]" : "=A" (retval) : [a] "a" (a), [b] "rm" (b));
1376  return retval;
1377 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ __halt()

__INTRIN_INLINE void __halt ( void  )

Definition at line 1595 of file intrin_x86.h.

1596 {
1597  __asm__("hlt" : : : "memory");
1598 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by FrLdrBugCheckEx(), FrLdrBugCheckWithMessage(), HaliHaltSystem(), HalpReboot(), and HalProcessorIdle().

◆ __inbyte()

__INTRIN_INLINE unsigned char __inbyte ( unsigned short  Port)

Definition at line 1405 of file intrin_x86.h.

1406 {
1407  unsigned char byte;
1408  __asm__ __volatile__("inb %w[Port], %b[byte]" : [byte] "=a" (byte) : [Port] "Nd" (Port));
1409  return byte;
1410 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define byte(x, n)
Definition: tomcrypt.h:118

Referenced by _inp().

◆ __inbytestring()

__INTRIN_INLINE void __inbytestring ( unsigned short  Port,
unsigned char Buffer,
unsigned long  Count 
)

Definition at line 1426 of file intrin_x86.h.

1427 {
1428  __asm__ __volatile__
1429  (
1430  "rep; insb" :
1431  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1432  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1433  "memory"
1434  );
1435 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45

◆ __incfsbyte()

__INTRIN_INLINE void __incfsbyte ( unsigned long  Offset)

Definition at line 950 of file intrin_x86.h.

951 {
952  __asm__ __volatile__("incb %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
953 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __incfsdword()

__INTRIN_INLINE void __incfsdword ( unsigned long  Offset)

Definition at line 960 of file intrin_x86.h.

961 {
962  __asm__ __volatile__("incl %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
963 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __incfsword()

__INTRIN_INLINE void __incfsword ( unsigned long  Offset)

Definition at line 955 of file intrin_x86.h.

956 {
957  __asm__ __volatile__("incw %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
958 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __indword()

__INTRIN_INLINE unsigned long __indword ( unsigned short  Port)

Definition at line 1419 of file intrin_x86.h.

1420 {
1421  unsigned long dword;
1422  __asm__ __volatile__("inl %w[Port], %k[dword]" : [dword] "=a" (dword) : [Port] "Nd" (Port));
1423  return dword;
1424 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _inpd().

◆ __indwordstring()

__INTRIN_INLINE void __indwordstring ( unsigned short  Port,
unsigned long Buffer,
unsigned long  Count 
)

Definition at line 1448 of file intrin_x86.h.

1449 {
1450  __asm__ __volatile__
1451  (
1452  "rep; insl" :
1453  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1454  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1455  "memory"
1456  );
1457 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45

◆ __int2c()

__INTRIN_INLINE void __int2c ( void  )

Definition at line 1579 of file intrin_x86.h.

1580 {
1581  __asm__("int $0x2c");
1582 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __invlpg()

__INTRIN_INLINE void __invlpg ( void Address)

Definition at line 1865 of file intrin_x86.h.

1866 {
1867  __asm__ __volatile__ ("invlpg (%[Address])" : : [Address] "b" (Address) : "memory");
1868 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static WCHAR Address[46]
Definition: ping.c:68

Referenced by KeInvalidateTlbEntry(), KiMarkPageAsReadOnly(), MiFlushTlb(), MiFlushTlbIpiRoutine(), MmCreateProcessAddressSpace(), MmDefpFlushTlbEntry(), MmSetCleanPage(), and MmSetDirtyPage().

◆ __inword()

__INTRIN_INLINE unsigned short __inword ( unsigned short  Port)

Definition at line 1412 of file intrin_x86.h.

1413 {
1414  unsigned short word;
1415  __asm__ __volatile__("inw %w[Port], %w[word]" : [word] "=a" (word) : [Port] "Nd" (Port));
1416  return word;
1417 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
const WCHAR * word
Definition: lex.c:78

Referenced by _inpw().

◆ __inwordstring()

__INTRIN_INLINE void __inwordstring ( unsigned short  Port,
unsigned short Buffer,
unsigned long  Count 
)

Definition at line 1437 of file intrin_x86.h.

1438 {
1439  __asm__ __volatile__
1440  (
1441  "rep; insw" :
1442  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1443  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1444  "memory"
1445  );
1446 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45

◆ __lidt()

__INTRIN_INLINE void __lidt ( void Source)

Definition at line 1915 of file intrin_x86.h.

1916 {
1917  __asm__ __volatile__("lidt %0" : : "m"(*(short*)Source));
1918 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3149

Referenced by Amd64SetupIdt(), BlpArchInitialize(), KeInitExceptions(), KiI386PentiumLockErrataFixup(), KiRestoreProcessorControlState(), and WinLdrSetProcessorContext().

◆ __ll_lshift()

__INTRIN_INLINE unsigned long long __ll_lshift ( unsigned long long  Mask,
int  Bit 
)

Definition at line 1243 of file intrin_x86.h.

1244 {
1245  unsigned long long retval = Mask;
1246 
1247  __asm__
1248  (
1249  "shldl %b[Bit], %%eax, %%edx; sall %b[Bit], %%eax" :
1250  "+A" (retval) :
1251  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1252  );
1253 
1254  return retval;
1255 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __ll_rshift()

__INTRIN_INLINE long long __ll_rshift ( long long  Mask,
int  Bit 
)

Definition at line 1257 of file intrin_x86.h.

1258 {
1259  long long retval = Mask;
1260 
1261  __asm__
1262  (
1263  "shrdl %b[Bit], %%edx, %%eax; sarl %b[Bit], %%edx" :
1264  "+A" (retval) :
1265  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1266  );
1267 
1268  return retval;
1269 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __lzcnt()

__INTRIN_INLINE unsigned int __lzcnt ( unsigned int  value)

Definition at line 1324 of file intrin_x86.h.

1325 {
1326  return __builtin_clz(value);
1327 }

◆ __lzcnt16()

__INTRIN_INLINE unsigned short __lzcnt16 ( unsigned short  value)

Definition at line 1329 of file intrin_x86.h.

1330 {
1331  return __builtin_clz(value);
1332 }

◆ __movsb()

__INTRIN_INLINE void __movsb ( unsigned char Destination,
const unsigned char Source,
size_t  Count 
)

Definition at line 770 of file intrin_x86.h.

771 {
772  __asm__ __volatile__
773  (
774  "rep; movsb" :
775  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
776  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
777  );
778 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3149

◆ __movsd()

__INTRIN_INLINE void __movsd ( unsigned long Destination,
const unsigned long Source,
size_t  Count 
)

Definition at line 790 of file intrin_x86.h.

791 {
792  __asm__ __volatile__
793  (
794  "rep; movsd" :
795  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
796  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
797  );
798 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3149

◆ __movsw()

__INTRIN_INLINE void __movsw ( unsigned short Destination,
const unsigned short Source,
size_t  Count 
)

Definition at line 780 of file intrin_x86.h.

781 {
782  __asm__ __volatile__
783  (
784  "rep; movsw" :
785  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
786  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
787  );
788 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3149

◆ __nop()

__INTRIN_INLINE void __nop ( void  )

Definition at line 1939 of file intrin_x86.h.

1940 {
1941  __asm__ __volatile__("nop");
1942 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by HalpRead8254Value().

◆ __outbyte()

__INTRIN_INLINE void __outbyte ( unsigned short  Port,
unsigned char  Data 
)

Definition at line 1459 of file intrin_x86.h.

1460 {
1461  __asm__ __volatile__("outb %b[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1462 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _outp().

◆ __outbytestring()

__INTRIN_INLINE void __outbytestring ( unsigned short  Port,
unsigned char Buffer,
unsigned long  Count 
)

Definition at line 1474 of file intrin_x86.h.

1475 {
1476  __asm__ __volatile__("rep; outsb" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1477 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45

◆ __outdword()

__INTRIN_INLINE void __outdword ( unsigned short  Port,
unsigned long  Data 
)

Definition at line 1469 of file intrin_x86.h.

1470 {
1471  __asm__ __volatile__("outl %k[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1472 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _outpd().

◆ __outdwordstring()

__INTRIN_INLINE void __outdwordstring ( unsigned short  Port,
unsigned long Buffer,
unsigned long  Count 
)

Definition at line 1484 of file intrin_x86.h.

1485 {
1486  __asm__ __volatile__("rep; outsl" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1487 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45

◆ __outword()

__INTRIN_INLINE void __outword ( unsigned short  Port,
unsigned short  Data 
)

Definition at line 1464 of file intrin_x86.h.

1465 {
1466  __asm__ __volatile__("outw %w[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1467 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _outpw().

◆ __outwordstring()

__INTRIN_INLINE void __outwordstring ( unsigned short  Port,
unsigned short Buffer,
unsigned long  Count 
)

Definition at line 1479 of file intrin_x86.h.

1480 {
1481  __asm__ __volatile__("rep; outsw" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1482 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45

◆ __popcnt()

__INTRIN_INLINE unsigned int __popcnt ( unsigned int  value)

Definition at line 1335 of file intrin_x86.h.

1336 {
1337  return __builtin_popcount(value);
1338 }

◆ __popcnt16()

__INTRIN_INLINE unsigned short __popcnt16 ( unsigned short  value)

Definition at line 1342 of file intrin_x86.h.

1343 {
1344  return __builtin_popcount(value);
1345 }

◆ __rdtsc()

__INTRIN_INLINE unsigned long long __rdtsc ( void  )

Definition at line 1536 of file intrin_x86.h.

1537 {
1538 #ifdef __x86_64__
1539  unsigned long long low, high;
1540  __asm__ __volatile__("rdtsc" : "=a"(low), "=d"(high));
1541  return low | (high << 32);
1542 #else
1543  unsigned long long retval;
1544  __asm__ __volatile__("rdtsc" : "=A"(retval));
1545  return retval;
1546 #endif
1547 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __readcr0()

__INTRIN_INLINE unsigned long __readcr0 ( void  )

Definition at line 1692 of file intrin_x86.h.

1693 {
1694  unsigned long value;
1695  __asm__ __volatile__("mov %%cr0, %[value]" : [value] "=r" (value));
1696  return value;
1697 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by ArchSwitchContext(), BlpArchEnableTranslation(), HalpBiosCall(), KdbpTrapFrameToKdbTrapFrame(), KiCoprocessorError(), KiFlushNPXState(), KiInitializeCpu(), KiIsNpxErrataPresent(), KiIsNpxPresent(), KiNpxHandler(), KiSaveProcessorControlState(), KiSetCR0Bits(), KiSwapContextEntry(), KiTrap07Handler(), KiTrap13Handler(), and WinLdrSetProcessorContext().

◆ __readcr2()

__INTRIN_INLINE unsigned long __readcr2 ( void  )

Definition at line 1699 of file intrin_x86.h.

1700 {
1701  unsigned long value;
1702  __asm__ __volatile__("mov %%cr2, %[value]" : [value] "=r" (value));
1703  return value;
1704 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by KdbEnterDebuggerException(), KdbpTrapFrameToKdbTrapFrame(), KiSaveProcessorControlState(), and KiTrap0EHandler().

◆ __readcr3()

__INTRIN_INLINE unsigned long __readcr3 ( void  )

Definition at line 1706 of file intrin_x86.h.

1707 {
1708  unsigned long value;
1709  __asm__ __volatile__("mov %%cr3, %[value]" : [value] "=r" (value));
1710  return value;
1711 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by HalpFlushTLB(), KdbpTrapFrameToKdbTrapFrame(), KdpTranslateAddress(), KeFlushCurrentTb(), KeFlushProcessTb(), Ki386EnableGlobalPage(), Ki386InitializeTss(), KiSaveProcessorControlState(), MiInitializePageTable(), and MmDefpFlushTlb().

◆ __readcr4()

__INTRIN_INLINE unsigned long __readcr4 ( void  )

Definition at line 1713 of file intrin_x86.h.

1714 {
1715  unsigned long value;
1716  __asm__ __volatile__("mov %%cr4, %[value]" : [value] "=r" (value));
1717  return value;
1718 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by ArchInitializeContext(), ArchRestoreProcessorFeatures(), ArchSwitchContext(), BlpArchEnableTranslation(), HalpFlushTLB(), KdbpTrapFrameToKdbTrapFrame(), KdpTranslateAddress(), KeFlushCurrentTb(), Ki386EnableDE(), Ki386EnableFxsr(), Ki386EnableGlobalPage(), Ki386EnableXMMIExceptions(), Ki386VdmEnablePentiumExtentions(), KiInitializeCpu(), KiSaveProcessorControlState(), MiInitializePageTable(), and MiUseLargeDriverPage().

◆ __readcr8()

__INTRIN_INLINE unsigned long __readcr8 ( void  )

Definition at line 1721 of file intrin_x86.h.

1722 {
1723  unsigned long value;
1724  __asm__ __volatile__("mov %%cr8, %[value]" : [value] "=r" (value));
1725  return value;
1726 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by _IRQL_requires_max_(), ApicGetCurrentIrql(), and KiSaveProcessorControlState().

◆ __readdr()

__INTRIN_INLINE unsigned int __readdr ( unsigned int  reg)

Definition at line 1799 of file intrin_x86.h.

1800 {
1801  unsigned int value;
1802  switch (reg)
1803  {
1804  case 0:
1805  __asm__ __volatile__("mov %%dr0, %[value]" : [value] "=r" (value));
1806  break;
1807  case 1:
1808  __asm__ __volatile__("mov %%dr1, %[value]" : [value] "=r" (value));
1809  break;
1810  case 2:
1811  __asm__ __volatile__("mov %%dr2, %[value]" : [value] "=r" (value));
1812  break;
1813  case 3:
1814  __asm__ __volatile__("mov %%dr3, %[value]" : [value] "=r" (value));
1815  break;
1816  case 4:
1817  __asm__ __volatile__("mov %%dr4, %[value]" : [value] "=r" (value));
1818  break;
1819  case 5:
1820  __asm__ __volatile__("mov %%dr5, %[value]" : [value] "=r" (value));
1821  break;
1822  case 6:
1823  __asm__ __volatile__("mov %%dr6, %[value]" : [value] "=r" (value));
1824  break;
1825  case 7:
1826  __asm__ __volatile__("mov %%dr7, %[value]" : [value] "=r" (value));
1827  break;
1828  }
1829  return value;
1830 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
static int reg
Definition: i386-dis.c:1275

Referenced by KdpGdbEnterDebuggerException(), KiEnterV86Trap(), KiHandleDebugRegistersOnTrapEntry(), and KiSaveProcessorControlState().

◆ __readeflags()

__INTRIN_INLINE uintptr_t __readeflags ( void  )

Definition at line 1555 of file intrin_x86.h.

1556 {
1557  uintptr_t retval;
1558  __asm__ __volatile__("pushf\n pop %0" : "=rm"(retval));
1559  return retval;
1560 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
unsigned int uintptr_t
Definition: crtdefs.h:300

Referenced by HalBeginSystemInterrupt(), HalCalibratePerformanceCounter(), HalEndSystemInterrupt(), HalpAcquireCmosSpinLock(), HalpApcInterruptHandler(), HalpBiosCall(), HalpBiosDisplayReset(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializeLegacyPICs(), HalpInitializePICs(), HalpInitializeTsc(), HalpLowerIrql(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KeDisableInterrupts(), KeGetCurrentIrql(), KeQueryPerformanceCounter(), KeSetCurrentIrql(), KfLowerIrql(), KfRaiseIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiEnterV86Mode(), KiFlushNPXState(), KiSetProcessorType(), KiTrap02(), KmtAreInterruptsEnabled(), and Test_strlen().

◆ __readfsbyte()

__INTRIN_INLINE unsigned char __readfsbyte ( unsigned long  Offset)

Definition at line 924 of file intrin_x86.h.

925 {
926  unsigned char value;
927  __asm__ __volatile__("movb %%fs:%a[Offset], %b[value]" : [value] "=q" (value) : [Offset] "ir" (Offset));
928  return value;
929 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ __readfsdword()

__INTRIN_INLINE unsigned long __readfsdword ( unsigned long  Offset)

Definition at line 942 of file intrin_x86.h.

943 {
944  unsigned long value;
945  __asm__ __volatile__("movl %%fs:%a[Offset], %k[value]" : [value] "=r" (value) : [Offset] "ir" (Offset));
946  return value;
947 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ __readfsword()

__INTRIN_INLINE unsigned short __readfsword ( unsigned long  Offset)

Definition at line 933 of file intrin_x86.h.

934 {
935  unsigned short value;
936  __asm__ __volatile__("movw %%fs:%a[Offset], %w[value]" : [value] "=r" (value) : [Offset] "ir" (Offset));
937  return value;
938 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ __readmsr()

__INTRIN_INLINE unsigned long long __readmsr ( unsigned long  reg)

Definition at line 1873 of file intrin_x86.h.

1874 {
1875 #ifdef __x86_64__
1876  unsigned long low, high;
1877  __asm__ __volatile__("rdmsr" : "=a" (low), "=d" (high) : "c" (reg));
1878  return ((unsigned long long)high << 32) | low;
1879 #else
1880  unsigned long long retval;
1881  __asm__ __volatile__("rdmsr" : "=A" (retval) : "c" (reg));
1882  return retval;
1883 #endif
1884 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static int reg
Definition: i386-dis.c:1275

◆ __readpmc()

__INTRIN_INLINE unsigned long long __readpmc ( unsigned long  counter)

Definition at line 1895 of file intrin_x86.h.

1896 {
1897  unsigned long long retval;
1898  __asm__ __volatile__("rdpmc" : "=A" (retval) : "c" (counter));
1899  return retval;
1900 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by KsecReadMachineSpecificCounters().

◆ __segmentlimit()

__INTRIN_INLINE unsigned long __segmentlimit ( unsigned long  a)

Definition at line 1903 of file intrin_x86.h.

1904 {
1905  unsigned long retval;
1906  __asm__ __volatile__("lsl %[a], %[retval]" : [retval] "=r" (retval) : [a] "rm" (a));
1907  return retval;
1908 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ __sidt()

__INTRIN_INLINE void __sidt ( void Destination)

Definition at line 1920 of file intrin_x86.h.

1921 {
1922  __asm__ __volatile__("sidt %0" : : "m"(*(short*)Destination) : "memory");
1923 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875

Referenced by Amd64SetupIdt(), BlpArchInitialize(), ImgArchEfiStartBootApplication(), KdbpCmdGdtLdtIdt(), KdbpCmdRegs(), KdbpStepIntoInstruction(), KiGetMachineBootPointers(), KiI386PentiumLockErrataFixup(), KiInitializePcr(), KiSaveProcessorControlState(), Mmx86InitializeMemoryMap(), and WinLdrSetProcessorContext().

◆ __stosb()

__INTRIN_INLINE void __stosb ( unsigned char Dest,
unsigned char  Data,
size_t  Count 
)

Definition at line 727 of file intrin_x86.h.

728 {
729  __asm__ __volatile__
730  (
731  "rep; stosb" :
732  [Dest] "=D" (Dest), [Count] "=c" (Count) :
733  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
734  );
735 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __stosd()

__INTRIN_INLINE void __stosd ( unsigned long Dest,
unsigned long  Data,
size_t  Count 
)

Definition at line 748 of file intrin_x86.h.

749 {
750  __asm__ __volatile__
751  (
752  "rep; stosl" :
753  [Dest] "=D" (Dest), [Count] "=c" (Count) :
754  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
755  );
756 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __stosw()

__INTRIN_INLINE void __stosw ( unsigned short Dest,
unsigned short  Data,
size_t  Count 
)

Definition at line 738 of file intrin_x86.h.

739 {
740  __asm__ __volatile__
741  (
742  "rep; stosw" :
743  [Dest] "=D" (Dest), [Count] "=c" (Count) :
744  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
745  );
746 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1015
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __ud2()

__INTRIN_INLINE void __ud2 ( void  )

Definition at line 1572 of file intrin_x86.h.

1573 {
1574  __asm__("ud2");
1575 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __ull_rshift()

__INTRIN_INLINE unsigned long long __ull_rshift ( unsigned long long  Mask,
int  Bit 
)

Definition at line 1271 of file intrin_x86.h.

1272 {
1273  unsigned long long retval = Mask;
1274 
1275  __asm__
1276  (
1277  "shrdl %b[Bit], %%edx, %%eax; shrl %b[Bit], %%edx" :
1278  "+A" (retval) :
1279  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1280  );
1281 
1282  return retval;
1283 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __wbinvd()

__INTRIN_INLINE void __wbinvd ( void  )

Definition at line 1910 of file intrin_x86.h.

1911 {
1912  __asm__ __volatile__("wbinvd" : : : "memory");
1913 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __writecr0()

__INTRIN_INLINE void __writecr0 ( unsigned int  Data)

Definition at line 1670 of file intrin_x86.h.

1671 {
1672  __asm__("mov %[Data], %%cr0" : : [Data] "r" (Data) : "memory");
1673 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by ArchSwitchContext(), BlpArchEnableTranslation(), HalpBiosCall(), KiCoprocessorError(), KiFlushNPXState(), KiInitializeCpu(), KiIsNpxErrataPresent(), KiIsNpxPresent(), KiNpxHandler(), KiRestoreProcessorControlState(), KiSetCR0Bits(), KiSwapContextEntry(), KiTrap07Handler(), KiTrap13Handler(), and WinLdrSetProcessorContext().

◆ __writecr3()

__INTRIN_INLINE void __writecr3 ( unsigned int  Data)

Definition at line 1675 of file intrin_x86.h.

1676 {
1677  __asm__("mov %[Data], %%cr3" : : [Data] "r" (Data) : "memory");
1678 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by HalpFlushTLB(), handle_gdb_read_mem(), handle_gdb_write_mem(), KeFlushCurrentTb(), KeFlushProcessTb(), Ki386EnableGlobalPage(), KiRestoreProcessorControlState(), KiSwapContextExit(), KiSwapContextResume(), KiSwapProcess(), MmDefInitializeTranslation(), MmDefpFlushTlb(), ReadMemorySendHandler(), WinLdrSetProcessorContext(), and WriteMemorySendHandler().

◆ __writecr4()

__INTRIN_INLINE void __writecr4 ( unsigned int  Data)

Definition at line 1680 of file intrin_x86.h.

1681 {
1682  __asm__("mov %[Data], %%cr4" : : [Data] "r" (Data) : "memory");
1683 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by ArchInitializeContext(), ArchRestoreProcessorFeatures(), ArchSwitchContext(), BlpArchEnableTranslation(), HalpFlushTLB(), KeFlushCurrentTb(), Ki386EnableDE(), Ki386EnableFxsr(), Ki386EnableGlobalPage(), Ki386EnableXMMIExceptions(), Ki386VdmEnablePentiumExtentions(), KiInitializeCpu(), KiRestoreProcessorControlState(), and MiInitializePageTable().

◆ __writecr8()

__INTRIN_INLINE void __writecr8 ( unsigned int  Data)

Definition at line 1686 of file intrin_x86.h.

1687 {
1688  __asm__("mov %[Data], %%cr8" : : [Data] "r" (Data) : "memory");
1689 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by ApicSetIrql(), KeSetCurrentIrql(), and KiRestoreProcessorControlState().

◆ __writedr()

__INTRIN_INLINE void __writedr ( unsigned  reg,
unsigned int  value 
)

Definition at line 1832 of file intrin_x86.h.

1833 {
1834  switch (reg)
1835  {
1836  case 0:
1837  __asm__("mov %[value], %%dr0" : : [value] "r" (value) : "memory");
1838  break;
1839  case 1:
1840  __asm__("mov %[value], %%dr1" : : [value] "r" (value) : "memory");
1841  break;
1842  case 2:
1843  __asm__("mov %[value], %%dr2" : : [value] "r" (value) : "memory");
1844  break;
1845  case 3:
1846  __asm__("mov %[value], %%dr3" : : [value] "r" (value) : "memory");
1847  break;
1848  case 4:
1849  __asm__("mov %[value], %%dr4" : : [value] "r" (value) : "memory");
1850  break;
1851  case 5:
1852  __asm__("mov %[value], %%dr5" : : [value] "r" (value) : "memory");
1853  break;
1854  case 6:
1855  __asm__("mov %[value], %%dr6" : : [value] "r" (value) : "memory");
1856  break;
1857  case 7:
1858  __asm__("mov %[value], %%dr7" : : [value] "r" (value) : "memory");
1859  break;
1860  }
1861 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static int reg
Definition: i386-dis.c:1275

Referenced by GspUnloadBreakpoints(), KdpGdbEnterDebuggerException(), KiHandleDebugRegistersOnTrapEntry(), KiHandleDebugRegistersOnTrapExit(), KiRestoreProcessorControlState(), and KiSaveProcessorControlState().

◆ __writeeflags()

__INTRIN_INLINE void __writeeflags ( uintptr_t  Value)

Definition at line 1550 of file intrin_x86.h.

1551 {
1552  __asm__ __volatile__("push %0\n popf" : : "rim"(Value));
1553 }
_In_opt_ ULONG _Out_ PULONG Value
Definition: rtlfuncs.h:2327
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by HalCalibratePerformanceCounter(), HalpBiosDisplayReset(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializePICs(), HalpInitializeTsc(), HalpReleaseCmosSpinLock(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KfLowerIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiFlushNPXState(), KiSetProcessorType(), KiTrap02(), Test_strlen(), and WinLdrSetProcessorContext().

◆ __writefsbyte()

__INTRIN_INLINE void __writefsbyte ( unsigned long  Offset,
unsigned char  Data 
)

Definition at line 908 of file intrin_x86.h.

909 {
910  __asm__ __volatile__("movb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
911 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __writefsdword()

__INTRIN_INLINE void __writefsdword ( unsigned long  Offset,
unsigned long  Data 
)

Definition at line 918 of file intrin_x86.h.

919 {
920  __asm__ __volatile__("movl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data) : "memory");
921 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __writefsword()

__INTRIN_INLINE void __writefsword ( unsigned long  Offset,
unsigned short  Data 
)

Definition at line 913 of file intrin_x86.h.

914 {
915  __asm__ __volatile__("movw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data) : "memory");
916 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __writemsr()

__INTRIN_INLINE void __writemsr ( unsigned long  Register,
unsigned long long  Value 
)

Definition at line 1886 of file intrin_x86.h.

1887 {
1888 #ifdef __x86_64__
1889  __asm__ __volatile__("wrmsr" : : "a" (Value), "d" (Value >> 32), "c" (Register));
1890 #else
1891  __asm__ __volatile__("wrmsr" : : "A" (Value), "c" (Register));
1892 #endif
1893 }
_In_opt_ ULONG _Out_ PULONG Value
Definition: rtlfuncs.h:2327
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _abs64()

Definition at line 1380 of file intrin_x86.h.

1381 {
1382  return (value >= 0) ? value : -value;
1383 }
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ _BitScanForward()

__INTRIN_INLINE unsigned char _BitScanForward ( unsigned long Index,
unsigned long  Mask 
)

Definition at line 996 of file intrin_x86.h.

997 {
998  __asm__("bsfl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
999  return Mask ? 1 : 0;
1000 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static const UCHAR Index[8]
Definition: usbohci.c:18

Referenced by GetBestRoute(), and ZSTD_NbCommonBytes().

◆ _BitScanReverse()

__INTRIN_INLINE unsigned char _BitScanReverse ( unsigned long Index,
unsigned long  Mask 
)

Definition at line 1004 of file intrin_x86.h.

1005 {
1006  __asm__("bsrl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
1007  return Mask ? 1 : 0;
1008 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static const UCHAR Index[8]
Definition: usbohci.c:18

Referenced by BIT_highbit32(), ZSTD_highbit32(), and ZSTD_NbCommonBytes().

◆ _bittest()

__INTRIN_INLINE unsigned char _bittest ( const long a,
long  b 
)

Definition at line 1012 of file intrin_x86.h.

1013 {
1014  unsigned char retval;
1015 
1016  if(__builtin_constant_p(b))
1017  __asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "mr" (*(a + (b / 32))), [b] "Ir" (b % 32));
1018  else
1019  __asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "m" (*a), [b] "r" (b));
1020 
1021  return retval;
1022 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _bittestandcomplement()

__INTRIN_INLINE unsigned char _bittestandcomplement ( long a,
long  b 
)

Definition at line 1054 of file intrin_x86.h.

1055 {
1056  unsigned char retval;
1057 
1058  if(__builtin_constant_p(b))
1059  __asm__("btc %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1060  else
1061  __asm__("btc %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1062 
1063  return retval;
1064 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _bittestandreset()

__INTRIN_INLINE unsigned char _bittestandreset ( long a,
long  b 
)

Definition at line 1066 of file intrin_x86.h.

1067 {
1068  unsigned char retval;
1069 
1070  if(__builtin_constant_p(b))
1071  __asm__("btr %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1072  else
1073  __asm__("btr %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1074 
1075  return retval;
1076 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _bittestandset()

__INTRIN_INLINE unsigned char _bittestandset ( long a,
long  b 
)

Definition at line 1078 of file intrin_x86.h.

1079 {
1080  unsigned char retval;
1081 
1082  if(__builtin_constant_p(b))
1083  __asm__("bts %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1084  else
1085  __asm__("bts %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1086 
1087  return retval;
1088 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _byteswap_uint64()

__INTRIN_INLINE unsigned long long __cdecl _byteswap_uint64 ( unsigned long long  value)

Definition at line 1307 of file intrin_x86.h.

1308 {
1309  union {
1310  unsigned long long int64part;
1311  struct {
1312  unsigned long lowpart;
1313  unsigned long hipart;
1314  };
1315  } retval;
1316  retval.int64part = value;
1317  __asm__("bswapl %[lowpart]\n"
1318  "bswapl %[hipart]\n"
1319  : [lowpart] "=r" (retval.hipart), [hipart] "=r" (retval.lowpart) : "[lowpart]" (retval.lowpart), "[hipart]" (retval.hipart) );
1320  return retval.int64part;
1321 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ _byteswap_ulong()

__INTRIN_INLINE unsigned long __cdecl _byteswap_ulong ( unsigned long  value)

Definition at line 1292 of file intrin_x86.h.

1293 {
1294  unsigned long retval;
1295  __asm__("bswapl %[retval]" : [retval] "=r" (retval) : "[retval]" (value));
1296  return retval;
1297 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _byteswap_ushort()

__INTRIN_INLINE unsigned short __cdecl _byteswap_ushort ( unsigned short  value)

Definition at line 1285 of file intrin_x86.h.

1286 {
1287  unsigned short retval;
1288  __asm__("rorw $8, %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value));
1289  return retval;
1290 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _disable()

__INTRIN_INLINE void __cdecl _disable ( void  )

Definition at line 1585 of file intrin_x86.h.

1586 {
1587  __asm__("cli" : : : "memory");
1588 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _HalpApcInterruptHandler(), _HalpDispatchInterruptHandler(), acpi_suspend(), ArchSwitchContext(), BlpArchEnableTranslation(), CloseBitPlane(), ExAcquireResourceLock(), FrLdrBugCheckEx(), FrLdrBugCheckWithMessage(), HalCalibratePerformanceCounter(), HalDisableSystemInterrupt(), HalDisplayString(), HalEnableSystemInterrupt(), HaliHaltSystem(), HalpAcquireCmosSpinLock(), HalpApcInterruptHandler(), HalpBiosDisplayReset(), HalpDispatchInterruptHandler(), HalpEndSystemInterrupt(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializePICs(), HalpInitializeTsc(), HalpLowerIrql(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KeBugCheckWithTf(), KeDisableInterrupts(), KeEnterKernelDebugger(), KeGetCurrentIrql(), KeSetCurrentIrql(), KfLowerIrql(), KfRaiseIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiApcInterrupt(), KiCheckForApcDelivery(), KiCommonExit(), KiDispatchInterrupt(), KiDpcInterruptHandler(), KiEndInterrupt(), KiEnterV86Mode(), KiExitInterrupt(), KiExitSystemCallDebugChecks(), KiExitV86Trap(), KiFlushNPXState(), KiI386PentiumLockErrataFixup(), KiIdleLoop(), KiInterruptDispatch3(), KiIsNpxErrataPresent(), KiRetireDpcList(), KiSetupDecrementerTrap(), KiSwapContextEntry(), KiSystemService(), KiTimerExpiration(), KiTrap02(), KiTrap06Handler(), KiTrap07Handler(), KiTrap0DHandler(), KiUserModeCallout(), MpsTimerHandler(), NtCallbackReturn(), OpenBitPlane(), PopShutdownHandler(), sb16_play(), ScrIoControl(), ScrWrite(), and WinLdrSetProcessorContext().

◆ _enable()

Definition at line 1590 of file intrin_x86.h.

1591 {
1592  __asm__("sti" : : : "memory");
1593 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _HalpApcInterruptHandler(), _HalpDismissIrqGeneric(), _HalpDismissIrqLevel(), _HalpDispatchInterruptHandler(), acpi_suspend(), ArchSwitchContext(), CloseBitPlane(), ExpInitializeExecutive(), ExReleaseResourceLock(), HalBeginSystemInterrupt(), HalDisableSystemInterrupt(), HalEnableSystemInterrupt(), HalpApcInterruptHandler(), HalpDispatchInterruptHandler(), HalpEndSystemInterrupt(), HalpInitializeTsc(), HalpInitPICs(), HalpLowerIrql(), HalProcessorIdle(), KdPollBreakIn(), KeGetCurrentIrql(), KeRemoveQueueDpc(), KeRestoreInterrupts(), KeSetCurrentIrql(), KeThawExecution(), KfLowerIrql(), KfRaiseIrql(), KiApcInterrupt(), KiCheckForApcDelivery(), KiDebugHandler(), KiDispatchInterrupt(), KiDpcInterruptHandler(), KiEnterV86Mode(), KiExitV86Mode(), KiExitV86Trap(), KiI386PentiumLockErrataFixup(), KiIdleLoop(), KiInitializeSystem(), KiInterruptDispatch3(), KiInterruptHandler(), KiIsNpxErrataPresent(), KiNpxHandler(), KiRetireDpcList(), KiSetupDecrementerTrap(), KiSwapContextEntry(), KiSystemCallHandler(), KiSystemService(), KiSystemServiceHandler(), KiSystemStartupBootStack(), KiTimerExpiration(), KiTrap00Handler(), KiTrap01Handler(), KiTrap04Handler(), KiTrap05Handler(), KiTrap06Handler(), KiTrap07Handler(), KiTrap09Handler(), KiTrap0DHandler(), KiTrap0EHandler(), KiTrap10Handler(), KiTrap11Handler(), KiTrap13Handler(), KiUserModeCallout(), MpsTimerHandler(), NtCallbackReturn(), OpenBitPlane(), sb16_play(), ScrIoControl(), and ScrWrite().

◆ _inp()

__INTRIN_INLINE int __cdecl _inp ( unsigned short  Port)

Definition at line 1489 of file intrin_x86.h.

1490 {
1491  return __inbyte(Port);
1492 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE unsigned char __inbyte(unsigned short Port)
Definition: intrin_x86.h:1405

◆ _inpd()

__INTRIN_INLINE unsigned long __cdecl _inpd ( unsigned short  Port)

Definition at line 1499 of file intrin_x86.h.

1500 {
1501  return __indword(Port);
1502 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE unsigned long __indword(unsigned short Port)
Definition: intrin_x86.h:1419

◆ _inpw()

__INTRIN_INLINE unsigned short __cdecl _inpw ( unsigned short  Port)

Definition at line 1494 of file intrin_x86.h.

1495 {
1496  return __inword(Port);
1497 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE unsigned short __inword(unsigned short Port)
Definition: intrin_x86.h:1412

◆ _InterlockedAnd()

__INTRIN_INLINE long _InterlockedAnd ( volatile long value,
long  mask 
)

Definition at line 467 of file intrin_x86.h.

468 {
469  long x;
470  long y;
471 
472  y = *value;
473 
474  do
475  {
476  x = y;
478  }
479  while(y != x);
480 
481  return y;
482 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:348
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedAnd16()

__INTRIN_INLINE short _InterlockedAnd16 ( volatile short value,
short  mask 
)

Definition at line 448 of file intrin_x86.h.

449 {
450  short x;
451  short y;
452 
453  y = *value;
454 
455  do
456  {
457  x = y;
459  }
460  while(y != x);
461 
462  return y;
463 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:339
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedAnd8()

__INTRIN_INLINE char _InterlockedAnd8 ( volatile char value,
char  mask 
)

Definition at line 429 of file intrin_x86.h.

430 {
431  char x;
432  char y;
433 
434  y = *value;
435 
436  do
437  {
438  x = y;
440  }
441  while(y != x);
442 
443  return y;
444 }
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:330
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _interlockedbittestandreset()

__INTRIN_INLINE unsigned char _interlockedbittestandreset ( volatile long a,
long  b 
)

Definition at line 689 of file intrin_x86.h.

690 {
691  unsigned char retval;
692  __asm__("lock; btrl %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval), [a] "+m" (*a) : [b] "Ir" (b) : "memory");
693  return retval;
694 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _interlockedbittestandset()

__INTRIN_INLINE unsigned char _interlockedbittestandset ( volatile long a,
long  b 
)

Definition at line 706 of file intrin_x86.h.

707 {
708  unsigned char retval;
709  __asm__("lock; btsl %[b], %[a]; setc %b[retval]" : [retval] "=q" (retval), [a] "+m" (*a) : [b] "Ir" (b) : "memory");
710  return retval;
711 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _InterlockedCompareExchange()

__INTRIN_INLINE long _InterlockedCompareExchange ( volatile long Destination,
long  Exchange,
long  Comperand 
)

Definition at line 348 of file intrin_x86.h.

349 {
350  long retval = Comperand;
351  __asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange): "memory");
352  return retval;
353 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875

Referenced by _InterlockedAnd(), _InterlockedOr(), and _InterlockedXor().

◆ _InterlockedCompareExchange16()

__INTRIN_INLINE short _InterlockedCompareExchange16 ( volatile short Destination,
short  Exchange,
short  Comperand 
)

Definition at line 339 of file intrin_x86.h.

340 {
341  short retval = Comperand;
342  __asm__("lock; cmpxchgw %w[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange): "memory");
343  return retval;
344 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875

Referenced by _InterlockedAnd16(), _InterlockedOr16(), and _InterlockedXor16().

◆ _InterlockedCompareExchange64()

__INTRIN_INLINE long long _InterlockedCompareExchange64 ( volatile long long Destination,
long long  Exchange,
long long  Comperand 
)

Definition at line 651 of file intrin_x86.h.

652 {
653  long long retval = Comperand;
654 
655  __asm__
656  (
657  "lock; cmpxchg8b %[Destination]" :
658  [retval] "+A" (retval) :
659  [Destination] "m" (*Destination),
660  "b" ((unsigned long)((Exchange >> 0) & 0xFFFFFFFF)),
661  "c" ((unsigned long)((Exchange >> 32) & 0xFFFFFFFF)) :
662  "memory"
663  );
664 
665  return retval;
666 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875

◆ _InterlockedCompareExchange8()

__INTRIN_INLINE char _InterlockedCompareExchange8 ( volatile char Destination,
char  Exchange,
char  Comperand 
)

Definition at line 330 of file intrin_x86.h.

331 {
332  char retval = Comperand;
333  __asm__("lock; cmpxchgb %b[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange) : "memory");
334  return retval;
335 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875

Referenced by _InterlockedAnd8(), _InterlockedOr8(), and _InterlockedXor8().

◆ _InterlockedCompareExchangePointer()

__INTRIN_INLINE void* _InterlockedCompareExchangePointer ( void *volatile Destination,
void Exchange,
void Comperand 
)

Definition at line 357 of file intrin_x86.h.

358 {
359  void * retval = (void *)Comperand;
360  __asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval] "=a" (retval) : "[retval]" (retval), [Destination] "m" (*Destination), [Exchange] "q" (Exchange) : "memory");
361  return retval;
362 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875

◆ _InterlockedDecrement()

__INTRIN_INLINE long _InterlockedDecrement ( volatile long lpAddend)

Definition at line 600 of file intrin_x86.h.

601 {
602  return _InterlockedExchangeAdd(lpAddend, -1) - 1;
603 }
__INTRIN_INLINE long _InterlockedExchangeAdd(volatile long *Addend, long Value)
Definition: intrin_x86.h:420

◆ _InterlockedDecrement16()

__INTRIN_INLINE short _InterlockedDecrement16 ( volatile short lpAddend)

Definition at line 614 of file intrin_x86.h.

615 {
616  return _InterlockedExchangeAdd16(lpAddend, -1) - 1;
617 }
__INTRIN_INLINE short _InterlockedExchangeAdd16(volatile short *Addend, short Value)
Definition: intrin_x86.h:411

◆ _InterlockedExchange()

__INTRIN_INLINE long _InterlockedExchange ( volatile long Target,
long  Value 
)

Definition at line 384 of file intrin_x86.h.

385 {
386  long retval = Value;
387  __asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
388  return retval;
389 }
_In_opt_ ULONG _Out_ PULONG Value
Definition: rtlfuncs.h:2327
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ typedef _In_ ULONG _In_ BOOLEAN Target
Definition: iotypes.h:1067

◆ _InterlockedExchange16()

__INTRIN_INLINE short _InterlockedExchange16 ( volatile short Target,
short  Value 
)

Definition at line 375 of file intrin_x86.h.

376 {
377  short retval = Value;
378  __asm__("xchgw %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
379  return retval;
380 }
_In_opt_ ULONG _Out_ PULONG Value
Definition: rtlfuncs.h:2327
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ typedef _In_ ULONG _In_ BOOLEAN Target
Definition: iotypes.h:1067

◆ _InterlockedExchange8()

__INTRIN_INLINE char _InterlockedExchange8 ( volatile char Target,
char  Value 
)

Definition at line 366 of file intrin_x86.h.

367 {
368  char retval = Value;
369  __asm__("xchgb %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
370  return retval;
371 }
_In_opt_ ULONG _Out_ PULONG Value
Definition: rtlfuncs.h:2327
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ typedef _In_ ULONG _In_ BOOLEAN Target
Definition: iotypes.h:1067

◆ _InterlockedExchangeAdd()

__INTRIN_INLINE long _InterlockedExchangeAdd ( volatile long Addend,
long  Value 
)

Definition at line 420 of file intrin_x86.h.

421 {
422  long retval = Value;
423  __asm__("lock; xaddl %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
424  return retval;
425 }
_In_opt_ ULONG _Out_ PULONG Value
Definition: rtlfuncs.h:2327
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _InterlockedDecrement(), and _InterlockedIncrement().

◆ _InterlockedExchangeAdd16()

__INTRIN_INLINE short _InterlockedExchangeAdd16 ( volatile short Addend,
short  Value 
)

Definition at line 411 of file intrin_x86.h.

412 {
413  short retval = Value;
414  __asm__("lock; xaddw %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
415  return retval;
416 }
_In_opt_ ULONG _Out_ PULONG Value
Definition: rtlfuncs.h:2327
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _InterlockedDecrement16(), and _InterlockedIncrement16().

◆ _InterlockedExchangeAdd8()

__INTRIN_INLINE char _InterlockedExchangeAdd8 ( char volatile Addend,
char  Value 
)

Definition at line 402 of file intrin_x86.h.

403 {
404  char retval = Value;
405  __asm__("lock; xaddb %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
406  return retval;
407 }
_In_opt_ ULONG _Out_ PULONG Value
Definition: rtlfuncs.h:2327
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _InterlockedExchangePointer()

__INTRIN_INLINE void* _InterlockedExchangePointer ( void *volatile Target,
void Value 
)

Definition at line 393 of file intrin_x86.h.

394 {
395  void * retval = Value;
396  __asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
397  return retval;
398 }
_In_opt_ ULONG _Out_ PULONG Value
Definition: rtlfuncs.h:2327
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ typedef _In_ ULONG _In_ BOOLEAN Target
Definition: iotypes.h:1067

◆ _InterlockedIncrement()

__INTRIN_INLINE long _InterlockedIncrement ( volatile long lpAddend)

Definition at line 607 of file intrin_x86.h.

608 {
609  return _InterlockedExchangeAdd(lpAddend, 1) + 1;
610 }
__INTRIN_INLINE long _InterlockedExchangeAdd(volatile long *Addend, long Value)
Definition: intrin_x86.h:420

◆ _InterlockedIncrement16()

__INTRIN_INLINE short _InterlockedIncrement16 ( volatile short lpAddend)

Definition at line 621 of file intrin_x86.h.

622 {
623  return _InterlockedExchangeAdd16(lpAddend, 1) + 1;
624 }
__INTRIN_INLINE short _InterlockedExchangeAdd16(volatile short *Addend, short Value)
Definition: intrin_x86.h:411

◆ _InterlockedOr()

__INTRIN_INLINE long _InterlockedOr ( volatile long value,
long  mask 
)

Definition at line 524 of file intrin_x86.h.

525 {
526  long x;
527  long y;
528 
529  y = *value;
530 
531  do
532  {
533  x = y;
535  }
536  while(y != x);
537 
538  return y;
539 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:348
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedOr16()

__INTRIN_INLINE short _InterlockedOr16 ( volatile short value,
short  mask 
)

Definition at line 505 of file intrin_x86.h.

506 {
507  short x;
508  short y;
509 
510  y = *value;
511 
512  do
513  {
514  x = y;
516  }
517  while(y != x);
518 
519  return y;
520 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:339
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedOr8()

__INTRIN_INLINE char _InterlockedOr8 ( volatile char value,
char  mask 
)

Definition at line 486 of file intrin_x86.h.

487 {
488  char x;
489  char y;
490 
491  y = *value;
492 
493  do
494  {
495  x = y;
497  }
498  while(y != x);
499 
500  return y;
501 }
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:330
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedXor()

__INTRIN_INLINE long _InterlockedXor ( volatile long value,
long  mask 
)

Definition at line 581 of file intrin_x86.h.

582 {
583  long x;
584  long y;
585 
586  y = *value;
587 
588  do
589  {
590  x = y;
592  }
593  while(y != x);
594 
595  return y;
596 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:348
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedXor16()

__INTRIN_INLINE short _InterlockedXor16 ( volatile short value,
short  mask 
)

Definition at line 562 of file intrin_x86.h.

563 {
564  short x;
565  short y;
566 
567  y = *value;
568 
569  do
570  {
571  x = y;
573  }
574  while(y != x);
575 
576  return y;
577 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:339
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedXor8()

__INTRIN_INLINE char _InterlockedXor8 ( volatile char value,
char  mask 
)

Definition at line 543 of file intrin_x86.h.

544 {
545  char x;
546  char y;
547 
548  y = *value;
549 
550  do
551  {
552  x = y;
554  }
555  while(y != x);
556 
557  return y;
558 }
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:330
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _lrotl()

__INTRIN_INLINE unsigned long __cdecl _lrotl ( unsigned long  value,
int  shift 
)

Definition at line 1219 of file intrin_x86.h.

1220 {
1221  unsigned long retval;
1222  __asm__("roll %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1223  return retval;
1224 }
#define shift
Definition: input.c:1668
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _lrotr()

unsigned long _lrotr ( unsigned long  value,
int  shift 
)

Definition at line 1228 of file intrin_x86.h.

1229 {
1230  unsigned long retval;
1231  __asm__("rorl %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1232  return retval;
1233 }
#define shift
Definition: input.c:1668
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _mm_lfence()

__INTRIN_INLINE void _mm_lfence ( void  )

Definition at line 106 of file intrin_x86.h.

107 {
108  _ReadBarrier();
109  __asm__ __volatile__("lfence");
110  _ReadBarrier();
111 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define _ReadBarrier
Definition: intrin_x86.h:95

◆ _mm_mfence()

__INTRIN_INLINE void _mm_mfence ( void  )

Definition at line 99 of file intrin_x86.h.

100 {
101  __asm__ __volatile__("mfence" : : : "memory");
102 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _mm_pause()

__INTRIN_INLINE void _mm_pause ( void  )

Definition at line 1933 of file intrin_x86.h.

1934 {
1935  __asm__ __volatile__("pause" : : : "memory");
1936 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _mm_sfence()

__INTRIN_INLINE void _mm_sfence ( void  )

Definition at line 115 of file intrin_x86.h.

116 {
117  _WriteBarrier();
118  __asm__ __volatile__("sfence");
119  _WriteBarrier();
120 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define _WriteBarrier
Definition: intrin_x86.h:96

◆ _outp()

__INTRIN_INLINE int __cdecl _outp ( unsigned short  Port,
int  databyte 
)

Definition at line 1504 of file intrin_x86.h.

1505 {
1506  __outbyte(Port, (unsigned char)databyte);
1507  return databyte;
1508 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE void __outbyte(unsigned short Port, unsigned char Data)
Definition: intrin_x86.h:1459

◆ _outpd()

__INTRIN_INLINE unsigned long __cdecl _outpd ( unsigned short  Port,
unsigned long  dataword 
)

Definition at line 1516 of file intrin_x86.h.

1517 {
1518  __outdword(Port, dataword);
1519  return dataword;
1520 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE void __outdword(unsigned short Port, unsigned long Data)
Definition: intrin_x86.h:1469

◆ _outpw()

__INTRIN_INLINE unsigned short __cdecl _outpw ( unsigned short  Port,
unsigned short  dataword 
)

Definition at line 1510 of file intrin_x86.h.

1511 {
1512  __outword(Port, dataword);
1513  return dataword;
1514 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE void __outword(unsigned short Port, unsigned short Data)
Definition: intrin_x86.h:1464

◆ _ReadWriteBarrier()

__INTRIN_INLINE void _ReadWriteBarrier ( void  )

Definition at line 88 of file intrin_x86.h.

89 {
90  __asm__ __volatile__("" : : : "memory");
91 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotl()

__INTRIN_INLINE unsigned int __cdecl _rotl ( unsigned int  value,
int  shift 
)

Definition at line 1149 of file intrin_x86.h.

1150 {
1151  unsigned int retval;
1152  __asm__("roll %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1153  return retval;
1154 }
#define shift
Definition: input.c:1668
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotl16()

__INTRIN_INLINE unsigned short __cdecl _rotl16 ( unsigned short  value,
unsigned char  shift 
)

Definition at line 1140 of file intrin_x86.h.

1141 {
1142  unsigned short retval;
1143  __asm__("rolw %b[shift], %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1144  return retval;
1145 }
#define shift
Definition: input.c:1668
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotl64()

__INTRIN_INLINE unsigned long long __cdecl _rotl64 ( unsigned long long  value,
int  shift 
)

Definition at line 1166 of file intrin_x86.h.

1167 {
1168  /* FIXME: this is probably not optimal */
1169  return (value << shift) | (value >> (64 - shift));
1170 }
#define shift
Definition: input.c:1668

◆ _rotl8()

__INTRIN_INLINE unsigned char __cdecl _rotl8 ( unsigned char  value,
unsigned char  shift 
)

Definition at line 1131 of file intrin_x86.h.

1132 {
1133  unsigned char retval;
1134  __asm__("rolb %b[shift], %b[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1135  return retval;
1136 }
#define shift
Definition: input.c:1668
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotr()

unsigned int _rotr ( unsigned int  value,
int  shift 
)

Definition at line 1175 of file intrin_x86.h.

1176 {
1177  unsigned int retval;
1178  __asm__("rorl %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1179  return retval;
1180 }
#define shift
Definition: input.c:1668
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotr16()

__INTRIN_INLINE unsigned short __cdecl _rotr16 ( unsigned short  value,
unsigned char  shift 
)

Definition at line 1193 of file intrin_x86.h.

1194 {
1195  unsigned short retval;
1196  __asm__("rorw %b[shift], %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1197  return retval;
1198 }
#define shift
Definition: input.c:1668
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotr64()

__INTRIN_INLINE unsigned long long __cdecl _rotr64 ( unsigned long long  value,
int  shift 
)

Definition at line 1210 of file intrin_x86.h.

1211 {
1212  /* FIXME: this is probably not optimal */
1213  return (value >> shift) | (value << (64 - shift));
1214 }
#define shift
Definition: input.c:1668

◆ _rotr8()

__INTRIN_INLINE unsigned char __cdecl _rotr8 ( unsigned char  value,
unsigned char  shift 
)

Definition at line 1184 of file intrin_x86.h.

1185 {
1186  unsigned char retval;
1187  __asm__("rorb %b[shift], %b[retval]" : [retval] "=qm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1188  return retval;
1189 }
#define shift
Definition: input.c:1668
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _sgdt()

__INTRIN_INLINE void _sgdt ( void Destination)

Definition at line 1925 of file intrin_x86.h.

1926 {
1927  __asm__ __volatile__("sgdt %0" : : "m"(*(short*)Destination) : "memory");
1928 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2875

Referenced by ImgArchEfiStartBootApplication(), and Mmx86InitializeMemoryMap().

◆ memcpy()

__INTRIN_INLINE void* __cdecl memcpy ( void dest,
const void source,
size_t  num 
)

Definition at line 74 of file intrin_x86.h.

75 {
76  return memmove(dest, source, num);
77 }
GLuint GLuint num
Definition: glext.h:9618
void *__cdecl memmove(void *dest, const void *source, size_t num)
Definition: memmove.c:4
static char * dest
Definition: rtl.c:135

◆ memmove()

void* __cdecl memmove ( void dest,
const void source,
size_t  num 
)

Definition at line 4 of file memmove.c.

5 {
6  char *char_dest = (char *)dest;
7  char *char_src = (char *)src;
8 
9  if ((char_dest <= char_src) || (char_dest >= (char_src+count)))
10  {
11  /* non-overlapping buffers */
12  while(count > 0)
13  {
14  *char_dest = *char_src;
15  char_dest++;
16  char_src++;
17  count--;
18  }
19  }
20  else
21  {
22  /* overlaping buffers */
23  char_dest = (char *)dest + count - 1;
24  char_src = (char *)src + count - 1;
25 
26  while(count > 0)
27  {
28  *char_dest = *char_src;
29  char_dest--;
30  char_src--;
31  count--;
32  }
33  }
34 
35  return dest;
36 }
GLuint GLuint GLsizei count
Definition: gl.h:1545
GLenum src
Definition: glext.h:6340
static char * dest
Definition: rtl.c:135

Referenced by memcpy().