ReactOS  0.4.15-dev-985-gd905dd5
intrin_x86.h File Reference

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Macros

#define _ReturnAddress()   (__builtin_return_address(0))
 
#define _AddressOfReturnAddress()   (&(((void **)(__builtin_frame_address(0)))[1]))
 
#define _ReadBarrier   _ReadWriteBarrier
 
#define _WriteBarrier   _ReadWriteBarrier
 

Functions

void *__cdecl memmove (void *dest, const void *source, size_t num)
 
__INTRIN_INLINE void *__cdecl memcpy (void *dest, const void *source, size_t num)
 
__INTRIN_INLINE void _ReadWriteBarrier (void)
 
__INTRIN_INLINE void _mm_mfence (void)
 
__INTRIN_INLINE void _mm_lfence (void)
 
__INTRIN_INLINE void _mm_sfence (void)
 
__INTRIN_INLINE char _InterlockedCompareExchange8 (volatile char *Destination, char Exchange, char Comperand)
 
__INTRIN_INLINE short _InterlockedCompareExchange16 (volatile short *Destination, short Exchange, short Comperand)
 
__INTRIN_INLINE long _InterlockedCompareExchange (volatile long *Destination, long Exchange, long Comperand)
 
__INTRIN_INLINE void_InterlockedCompareExchangePointer (void *volatile *Destination, void *Exchange, void *Comperand)
 
__INTRIN_INLINE char _InterlockedExchange8 (volatile char *Target, char Value)
 
__INTRIN_INLINE short _InterlockedExchange16 (volatile short *Target, short Value)
 
__INTRIN_INLINE long _InterlockedExchange (volatile long *Target, long Value)
 
__INTRIN_INLINE void_InterlockedExchangePointer (void *volatile *Target, void *Value)
 
__INTRIN_INLINE char _InterlockedExchangeAdd8 (char volatile *Addend, char Value)
 
__INTRIN_INLINE short _InterlockedExchangeAdd16 (volatile short *Addend, short Value)
 
__INTRIN_INLINE long _InterlockedExchangeAdd (volatile long *Addend, long Value)
 
__INTRIN_INLINE char _InterlockedAnd8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedAnd16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedAnd (volatile long *value, long mask)
 
__INTRIN_INLINE char _InterlockedOr8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedOr16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedOr (volatile long *value, long mask)
 
__INTRIN_INLINE char _InterlockedXor8 (volatile char *value, char mask)
 
__INTRIN_INLINE short _InterlockedXor16 (volatile short *value, short mask)
 
__INTRIN_INLINE long _InterlockedXor (volatile long *value, long mask)
 
__INTRIN_INLINE long _InterlockedDecrement (volatile long *lpAddend)
 
__INTRIN_INLINE long _InterlockedIncrement (volatile long *lpAddend)
 
__INTRIN_INLINE short _InterlockedDecrement16 (volatile short *lpAddend)
 
__INTRIN_INLINE short _InterlockedIncrement16 (volatile short *lpAddend)
 
__INTRIN_INLINE long long _InterlockedCompareExchange64 (volatile long long *Destination, long long Exchange, long long Comperand)
 
__INTRIN_INLINE unsigned char _interlockedbittestandreset (volatile long *a, long b)
 
__INTRIN_INLINE unsigned char _interlockedbittestandset (volatile long *a, long b)
 
__INTRIN_INLINE void __stosb (unsigned char *Dest, unsigned char Data, size_t Count)
 
__INTRIN_INLINE void __stosw (unsigned short *Dest, unsigned short Data, size_t Count)
 
__INTRIN_INLINE void __stosd (unsigned long *Dest, unsigned long Data, size_t Count)
 
__INTRIN_INLINE void __movsb (unsigned char *Destination, const unsigned char *Source, size_t Count)
 
__INTRIN_INLINE void __movsw (unsigned short *Destination, const unsigned short *Source, size_t Count)
 
__INTRIN_INLINE void __movsd (unsigned long *Destination, const unsigned long *Source, size_t Count)
 
__INTRIN_INLINE void __writefsbyte (unsigned long Offset, unsigned char Data)
 
__INTRIN_INLINE void __writefsword (unsigned long Offset, unsigned short Data)
 
__INTRIN_INLINE void __writefsdword (unsigned long Offset, unsigned long Data)
 
__INTRIN_INLINE unsigned char __readfsbyte (unsigned long Offset)
 
__INTRIN_INLINE unsigned short __readfsword (unsigned long Offset)
 
__INTRIN_INLINE unsigned long __readfsdword (unsigned long Offset)
 
__INTRIN_INLINE void __incfsbyte (unsigned long Offset)
 
__INTRIN_INLINE void __incfsword (unsigned long Offset)
 
__INTRIN_INLINE void __incfsdword (unsigned long Offset)
 
__INTRIN_INLINE void __addfsbyte (unsigned long Offset, unsigned char Data)
 
__INTRIN_INLINE void __addfsword (unsigned long Offset, unsigned short Data)
 
__INTRIN_INLINE void __addfsdword (unsigned long Offset, unsigned long Data)
 
__INTRIN_INLINE unsigned char _BitScanForward (unsigned long *Index, unsigned long Mask)
 
__INTRIN_INLINE unsigned char _BitScanReverse (unsigned long *Index, unsigned long Mask)
 
__INTRIN_INLINE unsigned char _bittest (const long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandcomplement (long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandreset (long *a, long b)
 
__INTRIN_INLINE unsigned char _bittestandset (long *a, long b)
 
__INTRIN_INLINE unsigned char __cdecl _rotl8 (unsigned char value, unsigned char shift)
 
__INTRIN_INLINE unsigned short __cdecl _rotl16 (unsigned short value, unsigned char shift)
 
__INTRIN_INLINE unsigned int __cdecl _rotl (unsigned int value, int shift)
 
__INTRIN_INLINE unsigned long long __cdecl _rotl64 (unsigned long long value, int shift)
 
__INTRIN_INLINE unsigned int __cdecl _rotr (unsigned int value, int shift)
 
__INTRIN_INLINE unsigned char __cdecl _rotr8 (unsigned char value, unsigned char shift)
 
__INTRIN_INLINE unsigned short __cdecl _rotr16 (unsigned short value, unsigned char shift)
 
__INTRIN_INLINE unsigned long long __cdecl _rotr64 (unsigned long long value, int shift)
 
__INTRIN_INLINE unsigned long __cdecl _lrotl (unsigned long value, int shift)
 
__INTRIN_INLINE unsigned long __cdecl _lrotr (unsigned long value, int shift)
 
__INTRIN_INLINE unsigned long long __ll_lshift (unsigned long long Mask, int Bit)
 
__INTRIN_INLINE long long __ll_rshift (long long Mask, int Bit)
 
__INTRIN_INLINE unsigned long long __ull_rshift (unsigned long long Mask, int Bit)
 
__INTRIN_INLINE unsigned short __cdecl _byteswap_ushort (unsigned short value)
 
__INTRIN_INLINE unsigned long __cdecl _byteswap_ulong (unsigned long value)
 
__INTRIN_INLINE unsigned long long __cdecl _byteswap_uint64 (unsigned long long value)
 
__INTRIN_INLINE unsigned int __lzcnt (unsigned int value)
 
__INTRIN_INLINE unsigned short __lzcnt16 (unsigned short value)
 
__INTRIN_INLINE unsigned int __popcnt (unsigned int value)
 
__INTRIN_INLINE unsigned short __popcnt16 (unsigned short value)
 
__INTRIN_INLINE long long __emul (int a, int b)
 
__INTRIN_INLINE unsigned long long __emulu (unsigned int a, unsigned int b)
 
__INTRIN_INLINE long long __cdecl _abs64 (long long value)
 
__INTRIN_INLINE unsigned char __inbyte (unsigned short Port)
 
__INTRIN_INLINE unsigned short __inword (unsigned short Port)
 
__INTRIN_INLINE unsigned long __indword (unsigned short Port)
 
__INTRIN_INLINE void __inbytestring (unsigned short Port, unsigned char *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __inwordstring (unsigned short Port, unsigned short *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __indwordstring (unsigned short Port, unsigned long *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outbyte (unsigned short Port, unsigned char Data)
 
__INTRIN_INLINE void __outword (unsigned short Port, unsigned short Data)
 
__INTRIN_INLINE void __outdword (unsigned short Port, unsigned long Data)
 
__INTRIN_INLINE void __outbytestring (unsigned short Port, unsigned char *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outwordstring (unsigned short Port, unsigned short *Buffer, unsigned long Count)
 
__INTRIN_INLINE void __outdwordstring (unsigned short Port, unsigned long *Buffer, unsigned long Count)
 
__INTRIN_INLINE int __cdecl _inp (unsigned short Port)
 
__INTRIN_INLINE unsigned short __cdecl _inpw (unsigned short Port)
 
__INTRIN_INLINE unsigned long __cdecl _inpd (unsigned short Port)
 
__INTRIN_INLINE int __cdecl _outp (unsigned short Port, int databyte)
 
__INTRIN_INLINE unsigned short __cdecl _outpw (unsigned short Port, unsigned short dataword)
 
__INTRIN_INLINE unsigned long __cdecl _outpd (unsigned short Port, unsigned long dataword)
 
__INTRIN_INLINE void __cpuid (int CPUInfo[4], int InfoType)
 
__INTRIN_INLINE void __cpuidex (int CPUInfo[4], int InfoType, int ECXValue)
 
__INTRIN_INLINE unsigned long long __rdtsc (void)
 
__INTRIN_INLINE void __writeeflags (uintptr_t Value)
 
__INTRIN_INLINE uintptr_t __readeflags (void)
 
__INTRIN_INLINE void __cdecl __debugbreak (void)
 
__INTRIN_INLINE void __ud2 (void)
 
__INTRIN_INLINE void __int2c (void)
 
__INTRIN_INLINE void __cdecl _disable (void)
 
__INTRIN_INLINE void __cdecl _enable (void)
 
__INTRIN_INLINE void __halt (void)
 
 __declspec (noreturn) __INTRIN_INLINE void __fastfail(unsigned int Code)
 
__INTRIN_INLINE void __writecr0 (unsigned int Data)
 
__INTRIN_INLINE void __writecr3 (unsigned int Data)
 
__INTRIN_INLINE void __writecr4 (unsigned int Data)
 
__INTRIN_INLINE void __writecr8 (unsigned int Data)
 
__INTRIN_INLINE unsigned long __readcr0 (void)
 
__INTRIN_INLINE unsigned long __readcr2 (void)
 
__INTRIN_INLINE unsigned long __readcr3 (void)
 
__INTRIN_INLINE unsigned long __readcr4 (void)
 
__INTRIN_INLINE unsigned long __readcr8 (void)
 
__INTRIN_INLINE unsigned int __readdr (unsigned int reg)
 
__INTRIN_INLINE void __writedr (unsigned reg, unsigned int value)
 
__INTRIN_INLINE void __invlpg (void *Address)
 
__INTRIN_INLINE unsigned long long __readmsr (unsigned long reg)
 
__INTRIN_INLINE void __writemsr (unsigned long Register, unsigned long long Value)
 
__INTRIN_INLINE unsigned long long __readpmc (unsigned long counter)
 
__INTRIN_INLINE unsigned long __segmentlimit (unsigned long a)
 
__INTRIN_INLINE void __wbinvd (void)
 
__INTRIN_INLINE void __lidt (void *Source)
 
__INTRIN_INLINE void __sidt (void *Destination)
 
__INTRIN_INLINE void _sgdt (void *Destination)
 
__INTRIN_INLINE void _mm_pause (void)
 
__INTRIN_INLINE void __nop (void)
 

Macro Definition Documentation

◆ _AddressOfReturnAddress

#define _AddressOfReturnAddress (   void)    (&(((void **)(__builtin_frame_address(0)))[1]))

Definition at line 82 of file intrin_x86.h.

◆ _ReadBarrier

#define _ReadBarrier   _ReadWriteBarrier

Definition at line 95 of file intrin_x86.h.

◆ _ReturnAddress

#define _ReturnAddress (   void)    (__builtin_return_address(0))

Definition at line 81 of file intrin_x86.h.

◆ _WriteBarrier

#define _WriteBarrier   _ReadWriteBarrier

Definition at line 96 of file intrin_x86.h.

Function Documentation

◆ __addfsbyte()

__INTRIN_INLINE void __addfsbyte ( unsigned long  Offset,
unsigned char  Data 
)

Definition at line 968 of file intrin_x86.h.

969 {
970  if(!__builtin_constant_p(Offset))
971  __asm__ __volatile__("addb %b[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
972  else
973  __asm__ __volatile__("addb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
974 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __addfsdword()

__INTRIN_INLINE void __addfsdword ( unsigned long  Offset,
unsigned long  Data 
)

Definition at line 984 of file intrin_x86.h.

985 {
986  if(!__builtin_constant_p(Offset))
987  __asm__ __volatile__("addl %k[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
988  else
989  __asm__ __volatile__("addl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
990 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __addfsword()

__INTRIN_INLINE void __addfsword ( unsigned long  Offset,
unsigned short  Data 
)

Definition at line 976 of file intrin_x86.h.

977 {
978  if(!__builtin_constant_p(Offset))
979  __asm__ __volatile__("addw %w[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset) : "memory");
980  else
981  __asm__ __volatile__("addw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
982 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __cpuid()

__INTRIN_INLINE void __cpuid ( int  CPUInfo[4],
int  InfoType 
)

Definition at line 1539 of file intrin_x86.h.

1540 {
1541  __asm__ __volatile__("cpuid" : "=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3]) : "a" (InfoType));
1542 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
CPUINFO CPUInfo[]
Definition: parse.c:231

◆ __cpuidex()

__INTRIN_INLINE void __cpuidex ( int  CPUInfo[4],
int  InfoType,
int  ECXValue 
)

Definition at line 1544 of file intrin_x86.h.

1545 {
1546  __asm__ __volatile__("cpuid" : "=a" (CPUInfo[0]), "=b" (CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3]) : "a" (InfoType), "c" (ECXValue));
1547 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
CPUINFO CPUInfo[]
Definition: parse.c:231

Referenced by BlArchCpuId(), and ZSTD_cpuid().

◆ __debugbreak()

__INTRIN_INLINE void __cdecl __debugbreak ( void  )

Definition at line 1579 of file intrin_x86.h.

1580 {
1581  __asm__("int $3");
1582 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by __C_specific_handler(), __CxxFrameHandler3(), _assert(), _RTC_DefaultErrorFuncW(), _RTC_NumErrors(), _RTC_SetErrorFunc(), _RTC_SetErrorType(), _RTC_Shutdown(), _tWinMain(), BlStatusError(), BmfdLoadFontFile(), Catch_RTC_Failure(), DoCrashCommand(), DRIVER_Dispatch(), EngBitBlt(), EnumParametersCallback(), FltpMiniFilterDriverUnload(), FltpPostFsFilterOperation(), FltpPreFsFilterOperation(), FtfdEnablePDEV(), FtfdQueryFont(), FtfdQueryFontTree(), GetCallingConvention(), HalpProfileInterruptHandler(), HalRequestIpi(), KeConnectInterrupt(), KeDisconnectInterrupt(), KeSwitchKernelStack(), KeUserModeCallback(), KiCallUserMode(), KiDispatchException(), KiInterruptHandler(), KiRestoreProcessorControlState(), KiSaveProcessorControlState(), KiSystemCallHandler(), KiSystemService(), KmtCloseDriver(), KmtFltLoadDriver(), KmtFltUnloadDriver(), KmtLoadDriver(), KmtOpenDriver(), KsecDeviceControl(), METADC_GetAndSetDCDWord(), MI_IS_MAPPED_PTE(), MiGetPteForProcess(), MmGetPageTableForProcess(), MmHapReportHeapCorruption(), MyReallocPool__(), NtCallbackReturn(), NtSetLdtEntries(), RtlAssert(), RtlUnwindEx(), and WmipIoControl().

◆ __declspec()

__declspec ( noreturn  )

Definition at line 1615 of file intrin_x86.h.

1617 {
1618  __asm__("int $0x29" : : "c"(Code) : "memory");
1619  __builtin_unreachable();
1620 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define Code
Definition: deflate.h:80

◆ __emul()

__INTRIN_INLINE long long __emul ( int  a,
int  b 
)

Definition at line 1377 of file intrin_x86.h.

1378 {
1379  long long retval;
1380  __asm__("imull %[b]" : "=A" (retval) : [a] "a" (a), [b] "rm" (b));
1381  return retval;
1382 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ __emulu()

Definition at line 1386 of file intrin_x86.h.

1387 {
1388  unsigned long long retval;
1389  __asm__("mull %[b]" : "=A" (retval) : [a] "a" (a), [b] "rm" (b));
1390  return retval;
1391 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ __halt()

__INTRIN_INLINE void __halt ( void  )

Definition at line 1609 of file intrin_x86.h.

1610 {
1611  __asm__("hlt" : : : "memory");
1612 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by FrLdrBugCheckEx(), FrLdrBugCheckWithMessage(), HaliHaltSystem(), HalpReboot(), HalProcessorIdle(), HalpXboxPowerAction(), and MachInit().

◆ __inbyte()

Definition at line 1419 of file intrin_x86.h.

1420 {
1421  unsigned char byte;
1422  __asm__ __volatile__("inb %w[Port], %b[byte]" : [byte] "=a" (byte) : [Port] "Nd" (Port));
1423  return byte;
1424 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define byte(x, n)
Definition: tomcrypt.h:118

Referenced by _inp().

◆ __inbytestring()

__INTRIN_INLINE void __inbytestring ( unsigned short  Port,
unsigned char Buffer,
unsigned long  Count 
)

Definition at line 1440 of file intrin_x86.h.

1441 {
1442  __asm__ __volatile__
1443  (
1444  "rep; insb" :
1445  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1446  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1447  "memory"
1448  );
1449 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1173
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45

◆ __incfsbyte()

__INTRIN_INLINE void __incfsbyte ( unsigned long  Offset)

Definition at line 952 of file intrin_x86.h.

953 {
954  __asm__ __volatile__("incb %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
955 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __incfsdword()

__INTRIN_INLINE void __incfsdword ( unsigned long  Offset)

Definition at line 962 of file intrin_x86.h.

963 {
964  __asm__ __volatile__("incl %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
965 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __incfsword()

__INTRIN_INLINE void __incfsword ( unsigned long  Offset)

Definition at line 957 of file intrin_x86.h.

958 {
959  __asm__ __volatile__("incw %%fs:%a[Offset]" : : [Offset] "ir" (Offset) : "memory");
960 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __indword()

Definition at line 1433 of file intrin_x86.h.

1434 {
1435  unsigned long dword;
1436  __asm__ __volatile__("inl %w[Port], %k[dword]" : [dword] "=a" (dword) : [Port] "Nd" (Port));
1437  return dword;
1438 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _inpd().

◆ __indwordstring()

__INTRIN_INLINE void __indwordstring ( unsigned short  Port,
unsigned long Buffer,
unsigned long  Count 
)

Definition at line 1462 of file intrin_x86.h.

1463 {
1464  __asm__ __volatile__
1465  (
1466  "rep; insl" :
1467  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1468  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1469  "memory"
1470  );
1471 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1173
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45

◆ __int2c()

__INTRIN_INLINE void __int2c ( void  )

Definition at line 1593 of file intrin_x86.h.

1594 {
1595  __asm__("int $0x2c");
1596 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __invlpg()

__INTRIN_INLINE void __invlpg ( void Address)

Definition at line 1879 of file intrin_x86.h.

1880 {
1881  __asm__ __volatile__ ("invlpg (%[Address])" : : [Address] "b" (Address) : "memory");
1882 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static WCHAR Address[46]
Definition: ping.c:68

Referenced by KeInvalidateTlbEntry(), KiMarkPageAsReadOnly(), MiFlushTlb(), MiFlushTlbIpiRoutine(), MmCreateProcessAddressSpace(), MmDefpFlushTlbEntry(), MmSetCleanPage(), and MmSetDirtyPage().

◆ __inword()

Definition at line 1426 of file intrin_x86.h.

1427 {
1428  unsigned short word;
1429  __asm__ __volatile__("inw %w[Port], %w[word]" : [word] "=a" (word) : [Port] "Nd" (Port));
1430  return word;
1431 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
const WCHAR * word
Definition: lex.c:36

Referenced by _inpw().

◆ __inwordstring()

__INTRIN_INLINE void __inwordstring ( unsigned short  Port,
unsigned short Buffer,
unsigned long  Count 
)

Definition at line 1451 of file intrin_x86.h.

1452 {
1453  __asm__ __volatile__
1454  (
1455  "rep; insw" :
1456  [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
1457  "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
1458  "memory"
1459  );
1460 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1173
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45

◆ __lidt()

__INTRIN_INLINE void __lidt ( void Source)

Definition at line 1929 of file intrin_x86.h.

1930 {
1931  __asm__ __volatile__("lidt %0" : : "m"(*(short*)Source));
1932 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3167

Referenced by Amd64SetupIdt(), BlpArchInitialize(), KeInitExceptions(), KiI386PentiumLockErrataFixup(), KiRestoreProcessorControlState(), and WinLdrSetProcessorContext().

◆ __ll_lshift()

__INTRIN_INLINE unsigned long long __ll_lshift ( unsigned long long  Mask,
int  Bit 
)

Definition at line 1253 of file intrin_x86.h.

1254 {
1255  unsigned long long retval = Mask;
1256 
1257  __asm__
1258  (
1259  "shldl %b[Bit], %%eax, %%edx; sall %b[Bit], %%eax" :
1260  "+A" (retval) :
1261  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1262  );
1263 
1264  return retval;
1265 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __ll_rshift()

__INTRIN_INLINE long long __ll_rshift ( long long  Mask,
int  Bit 
)

Definition at line 1267 of file intrin_x86.h.

1268 {
1269  long long retval = Mask;
1270 
1271  __asm__
1272  (
1273  "shrdl %b[Bit], %%edx, %%eax; sarl %b[Bit], %%edx" :
1274  "+A" (retval) :
1275  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1276  );
1277 
1278  return retval;
1279 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __lzcnt()

__INTRIN_INLINE unsigned int __lzcnt ( unsigned int  value)

Definition at line 1335 of file intrin_x86.h.

1336 {
1337  return __builtin_clz(value);
1338 }

◆ __lzcnt16()

Definition at line 1342 of file intrin_x86.h.

1343 {
1344  return __builtin_clz(value);
1345 }

◆ __movsb()

__INTRIN_INLINE void __movsb ( unsigned char Destination,
const unsigned char Source,
size_t  Count 
)

Definition at line 772 of file intrin_x86.h.

773 {
774  __asm__ __volatile__
775  (
776  "rep; movsb" :
777  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
778  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
779  );
780 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1173
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3167

◆ __movsd()

__INTRIN_INLINE void __movsd ( unsigned long Destination,
const unsigned long Source,
size_t  Count 
)

Definition at line 792 of file intrin_x86.h.

793 {
794  __asm__ __volatile__
795  (
796  "rep; movsd" :
797  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
798  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
799  );
800 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1173
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3167

◆ __movsw()

__INTRIN_INLINE void __movsw ( unsigned short Destination,
const unsigned short Source,
size_t  Count 
)

Definition at line 782 of file intrin_x86.h.

783 {
784  __asm__ __volatile__
785  (
786  "rep; movsw" :
787  [Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
788  "[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
789  );
790 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1173
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3167

◆ __nop()

__INTRIN_INLINE void __nop ( void  )

Definition at line 1953 of file intrin_x86.h.

1954 {
1955  __asm__ __volatile__("nop");
1956 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by HalpRead8254Value().

◆ __outbyte()

__INTRIN_INLINE void __outbyte ( unsigned short  Port,
unsigned char  Data 
)

Definition at line 1473 of file intrin_x86.h.

1474 {
1475  __asm__ __volatile__("outb %b[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1476 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _outp().

◆ __outbytestring()

__INTRIN_INLINE void __outbytestring ( unsigned short  Port,
unsigned char Buffer,
unsigned long  Count 
)

Definition at line 1488 of file intrin_x86.h.

1489 {
1490  __asm__ __volatile__("rep; outsb" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1491 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1173
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45

◆ __outdword()

__INTRIN_INLINE void __outdword ( unsigned short  Port,
unsigned long  Data 
)

Definition at line 1483 of file intrin_x86.h.

1484 {
1485  __asm__ __volatile__("outl %k[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1486 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _outpd().

◆ __outdwordstring()

__INTRIN_INLINE void __outdwordstring ( unsigned short  Port,
unsigned long Buffer,
unsigned long  Count 
)

Definition at line 1498 of file intrin_x86.h.

1499 {
1500  __asm__ __volatile__("rep; outsl" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1501 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1173
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45

◆ __outword()

__INTRIN_INLINE void __outword ( unsigned short  Port,
unsigned short  Data 
)

Definition at line 1478 of file intrin_x86.h.

1479 {
1480  __asm__ __volatile__("outw %w[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
1481 }
CPPORT Port[4]
Definition: headless.c:34
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _outpw().

◆ __outwordstring()

__INTRIN_INLINE void __outwordstring ( unsigned short  Port,
unsigned short Buffer,
unsigned long  Count 
)

Definition at line 1493 of file intrin_x86.h.

1494 {
1495  __asm__ __volatile__("rep; outsw" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
1496 }
CPPORT Port[4]
Definition: headless.c:34
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1173
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
Definition: bufpool.h:45

◆ __popcnt()

__INTRIN_INLINE unsigned int __popcnt ( unsigned int  value)

Definition at line 1349 of file intrin_x86.h.

1350 {
1351  return __builtin_popcount(value);
1352 }

◆ __popcnt16()

__INTRIN_INLINE unsigned short __popcnt16 ( unsigned short  value)

Definition at line 1356 of file intrin_x86.h.

1357 {
1358  return __builtin_popcount(value);
1359 }

◆ __rdtsc()

Definition at line 1550 of file intrin_x86.h.

1551 {
1552 #ifdef __x86_64__
1553  unsigned long long low, high;
1554  __asm__ __volatile__("rdtsc" : "=a"(low), "=d"(high));
1555  return low | (high << 32);
1556 #else
1557  unsigned long long retval;
1558  __asm__ __volatile__("rdtsc" : "=A"(retval));
1559  return retval;
1560 #endif
1561 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __readcr0()

__INTRIN_INLINE unsigned long __readcr0 ( void  )

Definition at line 1706 of file intrin_x86.h.

1707 {
1708  unsigned long value;
1709  __asm__ __volatile__("mov %%cr0, %[value]" : [value] "=r" (value));
1710  return value;
1711 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by ArchSwitchContext(), BlpArchEnableTranslation(), HalpBiosCall(), KdbpTrapFrameToKdbTrapFrame(), KiCoprocessorError(), KiFlushNPXState(), KiInitializeCpu(), KiIsNpxErrataPresent(), KiIsNpxPresent(), KiNpxHandler(), KiSaveProcessorControlState(), KiSetCR0Bits(), KiSwapContextEntry(), KiTrap07Handler(), KiTrap13Handler(), and WinLdrSetProcessorContext().

◆ __readcr2()

__INTRIN_INLINE unsigned long __readcr2 ( void  )

Definition at line 1713 of file intrin_x86.h.

1714 {
1715  unsigned long value;
1716  __asm__ __volatile__("mov %%cr2, %[value]" : [value] "=r" (value));
1717  return value;
1718 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by KdbEnterDebuggerException(), KdbpTrapFrameToKdbTrapFrame(), KiSaveProcessorControlState(), and KiTrap0EHandler().

◆ __readcr3()

__INTRIN_INLINE unsigned long __readcr3 ( void  )

Definition at line 1720 of file intrin_x86.h.

1721 {
1722  unsigned long value;
1723  __asm__ __volatile__("mov %%cr3, %[value]" : [value] "=r" (value));
1724  return value;
1725 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by HalpFlushTLB(), KdbpTrapFrameToKdbTrapFrame(), KdpTranslateAddress(), KeFlushCurrentTb(), KeFlushProcessTb(), Ki386EnableGlobalPage(), Ki386InitializeTss(), KiSaveProcessorControlState(), MiInitializePageTable(), and MmDefpFlushTlb().

◆ __readcr4()

__INTRIN_INLINE unsigned long __readcr4 ( void  )

Definition at line 1727 of file intrin_x86.h.

1728 {
1729  unsigned long value;
1730  __asm__ __volatile__("mov %%cr4, %[value]" : [value] "=r" (value));
1731  return value;
1732 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by ArchInitializeContext(), ArchRestoreProcessorFeatures(), ArchSwitchContext(), BlpArchEnableTranslation(), HalpFlushTLB(), KdbpTrapFrameToKdbTrapFrame(), KdpTranslateAddress(), KeFlushCurrentTb(), Ki386EnableDE(), Ki386EnableFxsr(), Ki386EnableGlobalPage(), Ki386EnableXMMIExceptions(), Ki386VdmEnablePentiumExtentions(), KiInitializeCpu(), KiSaveProcessorControlState(), MiInitializePageTable(), and MiUseLargeDriverPage().

◆ __readcr8()

__INTRIN_INLINE unsigned long __readcr8 ( void  )

Definition at line 1735 of file intrin_x86.h.

1736 {
1737  unsigned long value;
1738  __asm__ __volatile__("mov %%cr8, %[value]" : [value] "=r" (value));
1739  return value;
1740 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

Referenced by _IRQL_requires_max_(), ApicGetCurrentIrql(), and KiSaveProcessorControlState().

◆ __readdr()

Definition at line 1813 of file intrin_x86.h.

1814 {
1815  unsigned int value;
1816  switch (reg)
1817  {
1818  case 0:
1819  __asm__ __volatile__("mov %%dr0, %[value]" : [value] "=r" (value));
1820  break;
1821  case 1:
1822  __asm__ __volatile__("mov %%dr1, %[value]" : [value] "=r" (value));
1823  break;
1824  case 2:
1825  __asm__ __volatile__("mov %%dr2, %[value]" : [value] "=r" (value));
1826  break;
1827  case 3:
1828  __asm__ __volatile__("mov %%dr3, %[value]" : [value] "=r" (value));
1829  break;
1830  case 4:
1831  __asm__ __volatile__("mov %%dr4, %[value]" : [value] "=r" (value));
1832  break;
1833  case 5:
1834  __asm__ __volatile__("mov %%dr5, %[value]" : [value] "=r" (value));
1835  break;
1836  case 6:
1837  __asm__ __volatile__("mov %%dr6, %[value]" : [value] "=r" (value));
1838  break;
1839  case 7:
1840  __asm__ __volatile__("mov %%dr7, %[value]" : [value] "=r" (value));
1841  break;
1842  }
1843  return value;
1844 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069
static int reg
Definition: i386-dis.c:1275

Referenced by KdpGdbEnterDebuggerException(), KiEnterV86Trap(), KiHandleDebugRegistersOnTrapEntry(), and KiSaveProcessorControlState().

◆ __readeflags()

__INTRIN_INLINE uintptr_t __readeflags ( void  )

Definition at line 1569 of file intrin_x86.h.

1570 {
1571  uintptr_t retval;
1572  __asm__ __volatile__("pushf\n pop %0" : "=rm"(retval));
1573  return retval;
1574 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
unsigned int uintptr_t
Definition: crtdefs.h:300

Referenced by HalBeginSystemInterrupt(), HalCalibratePerformanceCounter(), HalEndSystemInterrupt(), HalpAcquireCmosSpinLock(), HalpApcInterruptHandler(), HalpBiosCall(), HalpBiosDisplayReset(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializeLegacyPICs(), HalpInitializePICs(), HalpInitializeTsc(), HalpLowerIrql(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KeDisableInterrupts(), KeGetCurrentIrql(), KeQueryPerformanceCounter(), KeSetCurrentIrql(), KfLowerIrql(), KfRaiseIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiEnterV86Mode(), KiFlushNPXState(), KiSetProcessorType(), KiTrap02Handler(), KiTrap08Handler(), KmtAreInterruptsEnabled(), and Test_strlen().

◆ __readfsbyte()

__INTRIN_INLINE unsigned char __readfsbyte ( unsigned long  Offset)

Definition at line 926 of file intrin_x86.h.

927 {
928  unsigned char value;
929  __asm__ __volatile__("movb %%fs:%a[Offset], %b[value]" : [value] "=q" (value) : [Offset] "ir" (Offset));
930  return value;
931 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ __readfsdword()

__INTRIN_INLINE unsigned long __readfsdword ( unsigned long  Offset)

Definition at line 944 of file intrin_x86.h.

945 {
946  unsigned long value;
947  __asm__ __volatile__("movl %%fs:%a[Offset], %k[value]" : [value] "=r" (value) : [Offset] "ir" (Offset));
948  return value;
949 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ __readfsword()

__INTRIN_INLINE unsigned short __readfsword ( unsigned long  Offset)

Definition at line 935 of file intrin_x86.h.

936 {
937  unsigned short value;
938  __asm__ __volatile__("movw %%fs:%a[Offset], %w[value]" : [value] "=r" (value) : [Offset] "ir" (Offset));
939  return value;
940 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ __readmsr()

Definition at line 1887 of file intrin_x86.h.

1888 {
1889 #ifdef __x86_64__
1890  unsigned long low, high;
1891  __asm__ __volatile__("rdmsr" : "=a" (low), "=d" (high) : "c" (reg));
1892  return ((unsigned long long)high << 32) | low;
1893 #else
1894  unsigned long long retval;
1895  __asm__ __volatile__("rdmsr" : "=A" (retval) : "c" (reg));
1896  return retval;
1897 #endif
1898 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static int reg
Definition: i386-dis.c:1275

◆ __readpmc()

__INTRIN_INLINE unsigned long long __readpmc ( unsigned long  counter)

Definition at line 1909 of file intrin_x86.h.

1910 {
1911  unsigned long long retval;
1912  __asm__ __volatile__("rdpmc" : "=A" (retval) : "c" (counter));
1913  return retval;
1914 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by KsecReadMachineSpecificCounters().

◆ __segmentlimit()

__INTRIN_INLINE unsigned long __segmentlimit ( unsigned long  a)

Definition at line 1917 of file intrin_x86.h.

1918 {
1919  unsigned long retval;
1920  __asm__ __volatile__("lsl %[a], %[retval]" : [retval] "=r" (retval) : [a] "rm" (a));
1921  return retval;
1922 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ __sidt()

__INTRIN_INLINE void __sidt ( void Destination)

Definition at line 1934 of file intrin_x86.h.

1935 {
1936  __asm__ __volatile__("sidt %0" : : "m"(*(short*)Destination) : "memory");
1937 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

Referenced by Amd64SetupIdt(), BlpArchInitialize(), ImgArchEfiStartBootApplication(), KdbpCmdGdtLdtIdt(), KdbpCmdRegs(), KdbpStepIntoInstruction(), KiGetMachineBootPointers(), KiI386PentiumLockErrataFixup(), KiInitializePcr(), KiSaveProcessorControlState(), Mmx86InitializeMemoryMap(), and WinLdrSetProcessorContext().

◆ __stosb()

__INTRIN_INLINE void __stosb ( unsigned char Dest,
unsigned char  Data,
size_t  Count 
)

Definition at line 729 of file intrin_x86.h.

730 {
731  __asm__ __volatile__
732  (
733  "rep; stosb" :
734  [Dest] "=D" (Dest), [Count] "=c" (Count) :
735  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
736  );
737 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1173
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __stosd()

__INTRIN_INLINE void __stosd ( unsigned long Dest,
unsigned long  Data,
size_t  Count 
)

Definition at line 750 of file intrin_x86.h.

751 {
752  __asm__ __volatile__
753  (
754  "rep; stosl" :
755  [Dest] "=D" (Dest), [Count] "=c" (Count) :
756  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
757  );
758 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1173
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __stosw()

__INTRIN_INLINE void __stosw ( unsigned short Dest,
unsigned short  Data,
size_t  Count 
)

Definition at line 740 of file intrin_x86.h.

741 {
742  __asm__ __volatile__
743  (
744  "rep; stosw" :
745  [Dest] "=D" (Dest), [Count] "=c" (Count) :
746  "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
747  );
748 }
_Inout_ __drv_aliasesMem PSLIST_ENTRY _Inout_ PSLIST_ENTRY _In_ ULONG Count
Definition: exfuncs.h:1173
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __ud2()

__INTRIN_INLINE void __ud2 ( void  )

Definition at line 1586 of file intrin_x86.h.

1587 {
1588  __asm__("ud2");
1589 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __ull_rshift()

__INTRIN_INLINE unsigned long long __ull_rshift ( unsigned long long  Mask,
int  Bit 
)

Definition at line 1281 of file intrin_x86.h.

1282 {
1283  unsigned long long retval = Mask;
1284 
1285  __asm__
1286  (
1287  "shrdl %b[Bit], %%edx, %%eax; shrl %b[Bit], %%edx" :
1288  "+A" (retval) :
1289  [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
1290  );
1291 
1292  return retval;
1293 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __wbinvd()

__INTRIN_INLINE void __wbinvd ( void  )

Definition at line 1924 of file intrin_x86.h.

1925 {
1926  __asm__ __volatile__("wbinvd" : : : "memory");
1927 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __writecr0()

__INTRIN_INLINE void __writecr0 ( unsigned int  Data)

Definition at line 1684 of file intrin_x86.h.

1685 {
1686  __asm__("mov %[Data], %%cr0" : : [Data] "r" (Data) : "memory");
1687 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by ArchSwitchContext(), BlpArchEnableTranslation(), HalpBiosCall(), KiCoprocessorError(), KiFlushNPXState(), KiInitializeCpu(), KiIsNpxErrataPresent(), KiIsNpxPresent(), KiNpxHandler(), KiRestoreProcessorControlState(), KiSetCR0Bits(), KiSwapContextEntry(), KiTrap07Handler(), KiTrap13Handler(), and WinLdrSetProcessorContext().

◆ __writecr3()

__INTRIN_INLINE void __writecr3 ( unsigned int  Data)

Definition at line 1689 of file intrin_x86.h.

1690 {
1691  __asm__("mov %[Data], %%cr3" : : [Data] "r" (Data) : "memory");
1692 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by HalpFlushTLB(), handle_gdb_read_mem(), handle_gdb_write_mem(), KeFlushCurrentTb(), KeFlushProcessTb(), Ki386EnableGlobalPage(), KiRestoreProcessorControlState(), KiSwapContextExit(), KiSwapContextResume(), KiSwapProcess(), MmDefInitializeTranslation(), MmDefpFlushTlb(), ReadMemorySendHandler(), WinLdrSetProcessorContext(), and WriteMemorySendHandler().

◆ __writecr4()

__INTRIN_INLINE void __writecr4 ( unsigned int  Data)

Definition at line 1694 of file intrin_x86.h.

1695 {
1696  __asm__("mov %[Data], %%cr4" : : [Data] "r" (Data) : "memory");
1697 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by ArchInitializeContext(), ArchRestoreProcessorFeatures(), ArchSwitchContext(), BlpArchEnableTranslation(), HalpFlushTLB(), KeFlushCurrentTb(), Ki386EnableDE(), Ki386EnableFxsr(), Ki386EnableGlobalPage(), Ki386EnableXMMIExceptions(), Ki386VdmEnablePentiumExtentions(), KiInitializeCpu(), KiRestoreProcessorControlState(), and MiInitializePageTable().

◆ __writecr8()

__INTRIN_INLINE void __writecr8 ( unsigned int  Data)

Definition at line 1700 of file intrin_x86.h.

1701 {
1702  __asm__("mov %[Data], %%cr8" : : [Data] "r" (Data) : "memory");
1703 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by ApicSetIrql(), KeSetCurrentIrql(), and KiRestoreProcessorControlState().

◆ __writedr()

__INTRIN_INLINE void __writedr ( unsigned  reg,
unsigned int  value 
)

Definition at line 1846 of file intrin_x86.h.

1847 {
1848  switch (reg)
1849  {
1850  case 0:
1851  __asm__("mov %[value], %%dr0" : : [value] "r" (value) : "memory");
1852  break;
1853  case 1:
1854  __asm__("mov %[value], %%dr1" : : [value] "r" (value) : "memory");
1855  break;
1856  case 2:
1857  __asm__("mov %[value], %%dr2" : : [value] "r" (value) : "memory");
1858  break;
1859  case 3:
1860  __asm__("mov %[value], %%dr3" : : [value] "r" (value) : "memory");
1861  break;
1862  case 4:
1863  __asm__("mov %[value], %%dr4" : : [value] "r" (value) : "memory");
1864  break;
1865  case 5:
1866  __asm__("mov %[value], %%dr5" : : [value] "r" (value) : "memory");
1867  break;
1868  case 6:
1869  __asm__("mov %[value], %%dr6" : : [value] "r" (value) : "memory");
1870  break;
1871  case 7:
1872  __asm__("mov %[value], %%dr7" : : [value] "r" (value) : "memory");
1873  break;
1874  }
1875 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static int reg
Definition: i386-dis.c:1275

Referenced by GspUnloadBreakpoints(), KdpGdbEnterDebuggerException(), KiHandleDebugRegistersOnTrapEntry(), KiHandleDebugRegistersOnTrapExit(), KiRestoreProcessorControlState(), and KiSaveProcessorControlState().

◆ __writeeflags()

__INTRIN_INLINE void __writeeflags ( uintptr_t  Value)

Definition at line 1564 of file intrin_x86.h.

1565 {
1566  __asm__ __volatile__("push %0\n popf" : : "rim"(Value));
1567 }
IN UCHAR Value
Definition: halp.h:394
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by HalCalibratePerformanceCounter(), HalpBiosDisplayReset(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializePICs(), HalpInitializeTsc(), HalpReleaseCmosSpinLock(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KfLowerIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiFlushNPXState(), KiSetProcessorType(), KiTrap02Handler(), KiTrap08Handler(), Test_strlen(), and WinLdrSetProcessorContext().

◆ __writefsbyte()

__INTRIN_INLINE void __writefsbyte ( unsigned long  Offset,
unsigned char  Data 
)

Definition at line 910 of file intrin_x86.h.

911 {
912  __asm__ __volatile__("movb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data) : "memory");
913 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __writefsdword()

__INTRIN_INLINE void __writefsdword ( unsigned long  Offset,
unsigned long  Data 
)

Definition at line 920 of file intrin_x86.h.

921 {
922  __asm__ __volatile__("movl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data) : "memory");
923 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __writefsword()

__INTRIN_INLINE void __writefsword ( unsigned long  Offset,
unsigned short  Data 
)

Definition at line 915 of file intrin_x86.h.

916 {
917  __asm__ __volatile__("movw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "ir" (Data) : "memory");
918 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ __writemsr()

__INTRIN_INLINE void __writemsr ( unsigned long  Register,
unsigned long long  Value 
)

Definition at line 1900 of file intrin_x86.h.

1901 {
1902 #ifdef __x86_64__
1903  __asm__ __volatile__("wrmsr" : : "a" (Value), "d" (Value >> 32), "c" (Register));
1904 #else
1905  __asm__ __volatile__("wrmsr" : : "A" (Value), "c" (Register));
1906 #endif
1907 }
IN UCHAR Value
Definition: halp.h:394
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _abs64()

Definition at line 1394 of file intrin_x86.h.

1395 {
1396  return (value >= 0) ? value : -value;
1397 }
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ _BitScanForward()

__INTRIN_INLINE unsigned char _BitScanForward ( unsigned long Index,
unsigned long  Mask 
)

Definition at line 998 of file intrin_x86.h.

999 {
1000  __asm__("bsfl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
1001  return Mask ? 1 : 0;
1002 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static const UCHAR Index[8]
Definition: usbohci.c:18

Referenced by GetBestRoute(), and ZSTD_NbCommonBytes().

◆ _BitScanReverse()

__INTRIN_INLINE unsigned char _BitScanReverse ( unsigned long Index,
unsigned long  Mask 
)

Definition at line 1006 of file intrin_x86.h.

1007 {
1008  __asm__("bsrl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
1009  return Mask ? 1 : 0;
1010 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
static const UCHAR Index[8]
Definition: usbohci.c:18

Referenced by BIT_highbit32(), ZSTD_highbit32(), and ZSTD_NbCommonBytes().

◆ _bittest()

__INTRIN_INLINE unsigned char _bittest ( const long a,
long  b 
)

Definition at line 1015 of file intrin_x86.h.

1016 {
1017  unsigned char retval;
1018 
1019  if(__builtin_constant_p(b))
1020  __asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "mr" (*(a + (b / 32))), [b] "Ir" (b % 32));
1021  else
1022  __asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "m" (*a), [b] "r" (b));
1023 
1024  return retval;
1025 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _bittestandcomplement()

__INTRIN_INLINE unsigned char _bittestandcomplement ( long a,
long  b 
)

Definition at line 1059 of file intrin_x86.h.

1060 {
1061  unsigned char retval;
1062 
1063  if(__builtin_constant_p(b))
1064  __asm__("btc %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1065  else
1066  __asm__("btc %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1067 
1068  return retval;
1069 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _bittestandreset()

__INTRIN_INLINE unsigned char _bittestandreset ( long a,
long  b 
)

Definition at line 1073 of file intrin_x86.h.

1074 {
1075  unsigned char retval;
1076 
1077  if(__builtin_constant_p(b))
1078  __asm__("btr %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1079  else
1080  __asm__("btr %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1081 
1082  return retval;
1083 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _bittestandset()

__INTRIN_INLINE unsigned char _bittestandset ( long a,
long  b 
)

Definition at line 1087 of file intrin_x86.h.

1088 {
1089  unsigned char retval;
1090 
1091  if(__builtin_constant_p(b))
1092  __asm__("bts %[b], %[a]; setb %b[retval]" : [a] "+mr" (*(a + (b / 32))), [retval] "=q" (retval) : [b] "Ir" (b % 32));
1093  else
1094  __asm__("bts %[b], %[a]; setb %b[retval]" : [a] "+m" (*a), [retval] "=q" (retval) : [b] "r" (b));
1095 
1096  return retval;
1097 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _byteswap_uint64()

__INTRIN_INLINE unsigned long long __cdecl _byteswap_uint64 ( unsigned long long  value)

Definition at line 1317 of file intrin_x86.h.

1318 {
1319  union {
1320  unsigned long long int64part;
1321  struct {
1322  unsigned long lowpart;
1323  unsigned long hipart;
1324  };
1325  } retval;
1326  retval.int64part = value;
1327  __asm__("bswapl %[lowpart]\n"
1328  "bswapl %[hipart]\n"
1329  : [lowpart] "=r" (retval.hipart), [hipart] "=r" (retval.lowpart) : "[lowpart]" (retval.lowpart), "[hipart]" (retval.hipart) );
1330  return retval.int64part;
1331 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLsizei const GLfloat * value
Definition: glext.h:6069

◆ _byteswap_ulong()

__INTRIN_INLINE unsigned long __cdecl _byteswap_ulong ( unsigned long  value)

Definition at line 1302 of file intrin_x86.h.

1303 {
1304  unsigned long retval;
1305  __asm__("bswapl %[retval]" : [retval] "=r" (retval) : "[retval]" (value));
1306  return retval;
1307 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _byteswap_ushort()

__INTRIN_INLINE unsigned short __cdecl _byteswap_ushort ( unsigned short  value)

Definition at line 1295 of file intrin_x86.h.

1296 {
1297  unsigned short retval;
1298  __asm__("rorw $8, %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value));
1299  return retval;
1300 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _disable()

__INTRIN_INLINE void __cdecl _disable ( void  )

Definition at line 1599 of file intrin_x86.h.

1600 {
1601  __asm__("cli" : : : "memory");
1602 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _HalpApcInterruptHandler(), _HalpDispatchInterruptHandler(), acpi_suspend(), ArchSwitchContext(), BlpArchEnableTranslation(), CloseBitPlane(), ExAcquireResourceLock(), FrLdrBugCheckEx(), FrLdrBugCheckWithMessage(), HalCalibratePerformanceCounter(), HalDisableSystemInterrupt(), HalDisplayString(), HalEnableSystemInterrupt(), HaliHaltSystem(), HalpAcquireCmosSpinLock(), HalpApcInterruptHandler(), HalpBiosDisplayReset(), HalpDispatchInterruptHandler(), HalpEndSystemInterrupt(), HalpFlushTLB(), HalpInitializeClock(), HalpInitializePICs(), HalpInitializeTsc(), HalpLowerIrql(), HalpReboot(), HalpSetTimerRollOver(), HalRequestSoftwareInterrupt(), KdbEnterDebuggerException(), KdbpCliInit(), KeBugCheckWithTf(), KeDisableInterrupts(), KeEnterKernelDebugger(), KeGetCurrentIrql(), KeSetCurrentIrql(), KfLowerIrql(), KfRaiseIrql(), Ki386AdjustEsp0(), Ki386VdmEnablePentiumExtentions(), KiApcInterrupt(), KiCheckForApcDelivery(), KiCommonExit(), KiDispatchInterrupt(), KiDpcInterruptHandler(), KiEndInterrupt(), KiEnterV86Mode(), KiExitInterrupt(), KiExitSystemCallDebugChecks(), KiExitV86Trap(), KiFlushNPXState(), KiI386PentiumLockErrataFixup(), KiIdleLoop(), KiInterruptDispatch3(), KiIsNpxErrataPresent(), KiRetireDpcList(), KiSetupDecrementerTrap(), KiSwapContextEntry(), KiSystemService(), KiTimerExpiration(), KiTrap02Handler(), KiTrap06Handler(), KiTrap07Handler(), KiTrap08Handler(), KiTrap0DHandler(), KiUserModeCallout(), MachInit(), MpsTimerHandler(), NtCallbackReturn(), OpenBitPlane(), PopShutdownHandler(), sb16_play(), ScrAcquireOwnership(), ScrSetCursor(), ScrSetCursorShape(), and WinLdrSetProcessorContext().

◆ _enable()

Definition at line 1604 of file intrin_x86.h.

1605 {
1606  __asm__("sti" : : : "memory");
1607 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _HalpApcInterruptHandler(), _HalpDismissIrqGeneric(), _HalpDismissIrqLevel(), _HalpDispatchInterruptHandler(), acpi_suspend(), ArchSwitchContext(), CloseBitPlane(), ExpInitializeExecutive(), ExReleaseResourceLock(), HalBeginSystemInterrupt(), HalDisableSystemInterrupt(), HalEnableSystemInterrupt(), HalpApcInterruptHandler(), HalpDispatchInterruptHandler(), HalpEndSystemInterrupt(), HalpInitializeTsc(), HalpInitPICs(), HalpLowerIrql(), HalProcessorIdle(), KdPollBreakIn(), KeGetCurrentIrql(), KeRemoveQueueDpc(), KeRestoreInterrupts(), KeSetCurrentIrql(), KeThawExecution(), KfLowerIrql(), KfRaiseIrql(), KiApcInterrupt(), KiCheckForApcDelivery(), KiDebugHandler(), KiDispatchInterrupt(), KiDpcInterruptHandler(), KiEnterV86Mode(), KiExitV86Mode(), KiExitV86Trap(), KiI386PentiumLockErrataFixup(), KiIdleLoop(), KiInitializeSystem(), KiInterruptDispatch3(), KiInterruptHandler(), KiIsNpxErrataPresent(), KiNpxHandler(), KiRetireDpcList(), KiSetupDecrementerTrap(), KiSwapContextEntry(), KiSystemCallHandler(), KiSystemService(), KiSystemServiceHandler(), KiSystemStartupBootStack(), KiTimerExpiration(), KiTrap00Handler(), KiTrap01Handler(), KiTrap04Handler(), KiTrap05Handler(), KiTrap06Handler(), KiTrap07Handler(), KiTrap09Handler(), KiTrap0DHandler(), KiTrap0EHandler(), KiTrap10Handler(), KiTrap11Handler(), KiTrap13Handler(), KiUserModeCallout(), MpsTimerHandler(), NtCallbackReturn(), OpenBitPlane(), sb16_play(), ScrAcquireOwnership(), ScrSetCursor(), and ScrSetCursorShape().

◆ _inp()

Definition at line 1503 of file intrin_x86.h.

1504 {
1505  return __inbyte(Port);
1506 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE unsigned char __inbyte(unsigned short Port)
Definition: intrin_x86.h:1419

◆ _inpd()

Definition at line 1513 of file intrin_x86.h.

1514 {
1515  return __indword(Port);
1516 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE unsigned long __indword(unsigned short Port)
Definition: intrin_x86.h:1433

◆ _inpw()

Definition at line 1508 of file intrin_x86.h.

1509 {
1510  return __inword(Port);
1511 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE unsigned short __inword(unsigned short Port)
Definition: intrin_x86.h:1426

◆ _InterlockedAnd()

__INTRIN_INLINE long _InterlockedAnd ( volatile long value,
long  mask 
)

Definition at line 467 of file intrin_x86.h.

468 {
469  long x;
470  long y;
471 
472  y = *value;
473 
474  do
475  {
476  x = y;
478  }
479  while(y != x);
480 
481  return y;
482 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:348
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedAnd16()

__INTRIN_INLINE short _InterlockedAnd16 ( volatile short value,
short  mask 
)

Definition at line 448 of file intrin_x86.h.

449 {
450  short x;
451  short y;
452 
453  y = *value;
454 
455  do
456  {
457  x = y;
459  }
460  while(y != x);
461 
462  return y;
463 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:339
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedAnd8()

__INTRIN_INLINE char _InterlockedAnd8 ( volatile char value,
char  mask 
)

Definition at line 429 of file intrin_x86.h.

430 {
431  char x;
432  char y;
433 
434  y = *value;
435 
436  do
437  {
438  x = y;
440  }
441  while(y != x);
442 
443  return y;
444 }
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:330
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _interlockedbittestandreset()

__INTRIN_INLINE unsigned char _interlockedbittestandreset ( volatile long a,
long  b 
)

Definition at line 690 of file intrin_x86.h.

691 {
692  unsigned char retval;
693  __asm__("lock; btrl %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval), [a] "+m" (*a) : [b] "Ir" (b) : "memory");
694  return retval;
695 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _interlockedbittestandset()

__INTRIN_INLINE unsigned char _interlockedbittestandset ( volatile long a,
long  b 
)

Definition at line 708 of file intrin_x86.h.

709 {
710  unsigned char retval;
711  __asm__("lock; btsl %[b], %[a]; setc %b[retval]" : [retval] "=q" (retval), [a] "+m" (*a) : [b] "Ir" (b) : "memory");
712  return retval;
713 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204

◆ _InterlockedCompareExchange()

__INTRIN_INLINE long _InterlockedCompareExchange ( volatile long Destination,
long  Exchange,
long  Comperand 
)

Definition at line 348 of file intrin_x86.h.

349 {
350  long retval = Comperand;
351  __asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange): "memory");
352  return retval;
353 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

Referenced by _InterlockedAnd(), _InterlockedOr(), and _InterlockedXor().

◆ _InterlockedCompareExchange16()

__INTRIN_INLINE short _InterlockedCompareExchange16 ( volatile short Destination,
short  Exchange,
short  Comperand 
)

Definition at line 339 of file intrin_x86.h.

340 {
341  short retval = Comperand;
342  __asm__("lock; cmpxchgw %w[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange): "memory");
343  return retval;
344 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

Referenced by _InterlockedAnd16(), _InterlockedOr16(), and _InterlockedXor16().

◆ _InterlockedCompareExchange64()

__INTRIN_INLINE long long _InterlockedCompareExchange64 ( volatile long long Destination,
long long  Exchange,
long long  Comperand 
)

Definition at line 651 of file intrin_x86.h.

652 {
653  long long retval = Comperand;
654 
655  __asm__
656  (
657  "lock; cmpxchg8b %[Destination]" :
658  [retval] "+A" (retval) :
659  [Destination] "m" (*Destination),
660  "b" ((unsigned long)((Exchange >> 0) & 0xFFFFFFFF)),
661  "c" ((unsigned long)((Exchange >> 32) & 0xFFFFFFFF)) :
662  "memory"
663  );
664 
665  return retval;
666 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

◆ _InterlockedCompareExchange8()

__INTRIN_INLINE char _InterlockedCompareExchange8 ( volatile char Destination,
char  Exchange,
char  Comperand 
)

Definition at line 330 of file intrin_x86.h.

331 {
332  char retval = Comperand;
333  __asm__("lock; cmpxchgb %b[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange) : "memory");
334  return retval;
335 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

Referenced by _InterlockedAnd8(), _InterlockedOr8(), and _InterlockedXor8().

◆ _InterlockedCompareExchangePointer()

__INTRIN_INLINE void* _InterlockedCompareExchangePointer ( void *volatile Destination,
void Exchange,
void Comperand 
)

Definition at line 357 of file intrin_x86.h.

358 {
359  void * retval = (void *)Comperand;
360  __asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval] "=a" (retval) : "[retval]" (retval), [Destination] "m" (*Destination), [Exchange] "q" (Exchange) : "memory");
361  return retval;
362 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

◆ _InterlockedDecrement()

__INTRIN_INLINE long _InterlockedDecrement ( volatile long lpAddend)

Definition at line 600 of file intrin_x86.h.

601 {
602  return _InterlockedExchangeAdd(lpAddend, -1) - 1;
603 }
__INTRIN_INLINE long _InterlockedExchangeAdd(volatile long *Addend, long Value)
Definition: intrin_x86.h:420

◆ _InterlockedDecrement16()

__INTRIN_INLINE short _InterlockedDecrement16 ( volatile short lpAddend)

Definition at line 614 of file intrin_x86.h.

615 {
616  return _InterlockedExchangeAdd16(lpAddend, -1) - 1;
617 }
__INTRIN_INLINE short _InterlockedExchangeAdd16(volatile short *Addend, short Value)
Definition: intrin_x86.h:411

◆ _InterlockedExchange()

__INTRIN_INLINE long _InterlockedExchange ( volatile long Target,
long  Value 
)

Definition at line 384 of file intrin_x86.h.

385 {
386  long retval = Value;
387  __asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
388  return retval;
389 }
IN UCHAR Value
Definition: halp.h:394
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ typedef _In_ ULONG _In_ BOOLEAN Target
Definition: iotypes.h:1072

◆ _InterlockedExchange16()

__INTRIN_INLINE short _InterlockedExchange16 ( volatile short Target,
short  Value 
)

Definition at line 375 of file intrin_x86.h.

376 {
377  short retval = Value;
378  __asm__("xchgw %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
379  return retval;
380 }
IN UCHAR Value
Definition: halp.h:394
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ typedef _In_ ULONG _In_ BOOLEAN Target
Definition: iotypes.h:1072

◆ _InterlockedExchange8()

__INTRIN_INLINE char _InterlockedExchange8 ( volatile char Target,
char  Value 
)

Definition at line 366 of file intrin_x86.h.

367 {
368  char retval = Value;
369  __asm__("xchgb %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
370  return retval;
371 }
IN UCHAR Value
Definition: halp.h:394
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ typedef _In_ ULONG _In_ BOOLEAN Target
Definition: iotypes.h:1072

◆ _InterlockedExchangeAdd()

__INTRIN_INLINE long _InterlockedExchangeAdd ( volatile long Addend,
long  Value 
)

Definition at line 420 of file intrin_x86.h.

421 {
422  long retval = Value;
423  __asm__("lock; xaddl %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
424  return retval;
425 }
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
IN UCHAR Value
Definition: halp.h:394
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _InterlockedDecrement(), and _InterlockedIncrement().

◆ _InterlockedExchangeAdd16()

__INTRIN_INLINE short _InterlockedExchangeAdd16 ( volatile short Addend,
short  Value 
)

Definition at line 411 of file intrin_x86.h.

412 {
413  short retval = Value;
414  __asm__("lock; xaddw %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
415  return retval;
416 }
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
IN UCHAR Value
Definition: halp.h:394
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

Referenced by _InterlockedDecrement16(), and _InterlockedIncrement16().

◆ _InterlockedExchangeAdd8()

__INTRIN_INLINE char _InterlockedExchangeAdd8 ( char volatile Addend,
char  Value 
)

Definition at line 402 of file intrin_x86.h.

403 {
404  char retval = Value;
405  __asm__("lock; xaddb %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
406  return retval;
407 }
IN OUT PLONG Addend
Definition: CrNtStubs.h:22
IN UCHAR Value
Definition: halp.h:394
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _InterlockedExchangePointer()

__INTRIN_INLINE void* _InterlockedExchangePointer ( void *volatile Target,
void Value 
)

Definition at line 393 of file intrin_x86.h.

394 {
395  void * retval = Value;
396  __asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
397  return retval;
398 }
IN UCHAR Value
Definition: halp.h:394
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_Must_inspect_result_ typedef _In_ ULONG _In_ BOOLEAN Target
Definition: iotypes.h:1072

◆ _InterlockedIncrement()

__INTRIN_INLINE long _InterlockedIncrement ( volatile long lpAddend)

Definition at line 607 of file intrin_x86.h.

608 {
609  return _InterlockedExchangeAdd(lpAddend, 1) + 1;
610 }
__INTRIN_INLINE long _InterlockedExchangeAdd(volatile long *Addend, long Value)
Definition: intrin_x86.h:420

◆ _InterlockedIncrement16()

__INTRIN_INLINE short _InterlockedIncrement16 ( volatile short lpAddend)

Definition at line 621 of file intrin_x86.h.

622 {
623  return _InterlockedExchangeAdd16(lpAddend, 1) + 1;
624 }
__INTRIN_INLINE short _InterlockedExchangeAdd16(volatile short *Addend, short Value)
Definition: intrin_x86.h:411

◆ _InterlockedOr()

__INTRIN_INLINE long _InterlockedOr ( volatile long value,
long  mask 
)

Definition at line 524 of file intrin_x86.h.

525 {
526  long x;
527  long y;
528 
529  y = *value;
530 
531  do
532  {
533  x = y;
535  }
536  while(y != x);
537 
538  return y;
539 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:348
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedOr16()

__INTRIN_INLINE short _InterlockedOr16 ( volatile short value,
short  mask 
)

Definition at line 505 of file intrin_x86.h.

506 {
507  short x;
508  short y;
509 
510  y = *value;
511 
512  do
513  {
514  x = y;
516  }
517  while(y != x);
518 
519  return y;
520 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:339
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedOr8()

__INTRIN_INLINE char _InterlockedOr8 ( volatile char value,
char  mask 
)

Definition at line 486 of file intrin_x86.h.

487 {
488  char x;
489  char y;
490 
491  y = *value;
492 
493  do
494  {
495  x = y;
497  }
498  while(y != x);
499 
500  return y;
501 }
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:330
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedXor()

__INTRIN_INLINE long _InterlockedXor ( volatile long value,
long  mask 
)

Definition at line 581 of file intrin_x86.h.

582 {
583  long x;
584  long y;
585 
586  y = *value;
587 
588  do
589  {
590  x = y;
592  }
593  while(y != x);
594 
595  return y;
596 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE long _InterlockedCompareExchange(volatile long *Destination, long Exchange, long Comperand)
Definition: intrin_x86.h:348
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedXor16()

__INTRIN_INLINE short _InterlockedXor16 ( volatile short value,
short  mask 
)

Definition at line 562 of file intrin_x86.h.

563 {
564  short x;
565  short y;
566 
567  y = *value;
568 
569  do
570  {
571  x = y;
573  }
574  while(y != x);
575 
576  return y;
577 }
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
__INTRIN_INLINE short _InterlockedCompareExchange16(volatile short *Destination, short Exchange, short Comperand)
Definition: intrin_x86.h:339
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _InterlockedXor8()

__INTRIN_INLINE char _InterlockedXor8 ( volatile char value,
char  mask 
)

Definition at line 543 of file intrin_x86.h.

544 {
545  char x;
546  char y;
547 
548  y = *value;
549 
550  do
551  {
552  x = y;
554  }
555  while(y != x);
556 
557  return y;
558 }
__INTRIN_INLINE char _InterlockedCompareExchange8(volatile char *Destination, char Exchange, char Comperand)
Definition: intrin_x86.h:330
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
GLenum GLint GLuint mask
Definition: glext.h:6028
GLsizei const GLfloat * value
Definition: glext.h:6069
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548

◆ _lrotl()

__INTRIN_INLINE unsigned long __cdecl _lrotl ( unsigned long  value,
int  shift 
)

Definition at line 1229 of file intrin_x86.h.

1230 {
1231  unsigned long retval;
1232  __asm__("roll %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1233  return retval;
1234 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _lrotr()

unsigned long _lrotr ( unsigned long  value,
int  shift 
)

Definition at line 1238 of file intrin_x86.h.

1239 {
1240  unsigned long retval;
1241  __asm__("rorl %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1242  return retval;
1243 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _mm_lfence()

__INTRIN_INLINE void _mm_lfence ( void  )

Definition at line 106 of file intrin_x86.h.

107 {
108  _ReadBarrier();
109  __asm__ __volatile__("lfence");
110  _ReadBarrier();
111 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define _ReadBarrier
Definition: intrin_x86.h:95

◆ _mm_mfence()

__INTRIN_INLINE void _mm_mfence ( void  )

Definition at line 99 of file intrin_x86.h.

100 {
101  __asm__ __volatile__("mfence" : : : "memory");
102 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _mm_pause()

__INTRIN_INLINE void _mm_pause ( void  )

Definition at line 1947 of file intrin_x86.h.

1948 {
1949  __asm__ __volatile__("pause" : : : "memory");
1950 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _mm_sfence()

__INTRIN_INLINE void _mm_sfence ( void  )

Definition at line 115 of file intrin_x86.h.

116 {
117  _WriteBarrier();
118  __asm__ __volatile__("sfence");
119  _WriteBarrier();
120 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
#define _WriteBarrier
Definition: intrin_x86.h:96

◆ _outp()

__INTRIN_INLINE int __cdecl _outp ( unsigned short  Port,
int  databyte 
)

Definition at line 1518 of file intrin_x86.h.

1519 {
1520  __outbyte(Port, (unsigned char)databyte);
1521  return databyte;
1522 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE void __outbyte(unsigned short Port, unsigned char Data)
Definition: intrin_x86.h:1473

◆ _outpd()

__INTRIN_INLINE unsigned long __cdecl _outpd ( unsigned short  Port,
unsigned long  dataword 
)

Definition at line 1530 of file intrin_x86.h.

1531 {
1532  __outdword(Port, dataword);
1533  return dataword;
1534 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE void __outdword(unsigned short Port, unsigned long Data)
Definition: intrin_x86.h:1483

◆ _outpw()

__INTRIN_INLINE unsigned short __cdecl _outpw ( unsigned short  Port,
unsigned short  dataword 
)

Definition at line 1524 of file intrin_x86.h.

1525 {
1526  __outword(Port, dataword);
1527  return dataword;
1528 }
CPPORT Port[4]
Definition: headless.c:34
__INTRIN_INLINE void __outword(unsigned short Port, unsigned short Data)
Definition: intrin_x86.h:1478

◆ _ReadWriteBarrier()

__INTRIN_INLINE void _ReadWriteBarrier ( void  )

Definition at line 88 of file intrin_x86.h.

89 {
90  __asm__ __volatile__("" : : : "memory");
91 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotl()

__INTRIN_INLINE unsigned int __cdecl _rotl ( unsigned int  value,
int  shift 
)

Definition at line 1159 of file intrin_x86.h.

1160 {
1161  unsigned int retval;
1162  __asm__("roll %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1163  return retval;
1164 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotl16()

__INTRIN_INLINE unsigned short __cdecl _rotl16 ( unsigned short  value,
unsigned char  shift 
)

Definition at line 1150 of file intrin_x86.h.

1151 {
1152  unsigned short retval;
1153  __asm__("rolw %b[shift], %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1154  return retval;
1155 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotl64()

__INTRIN_INLINE unsigned long long __cdecl _rotl64 ( unsigned long long  value,
int  shift 
)

Definition at line 1176 of file intrin_x86.h.

1177 {
1178  /* FIXME: this is probably not optimal */
1179  return (value << shift) | (value >> (64 - shift));
1180 }
#define shift
Definition: input.c:1756

◆ _rotl8()

__INTRIN_INLINE unsigned char __cdecl _rotl8 ( unsigned char  value,
unsigned char  shift 
)

Definition at line 1141 of file intrin_x86.h.

1142 {
1143  unsigned char retval;
1144  __asm__("rolb %b[shift], %b[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1145  return retval;
1146 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotr()

unsigned int _rotr ( unsigned int  value,
int  shift 
)

Definition at line 1185 of file intrin_x86.h.

1186 {
1187  unsigned int retval;
1188  __asm__("rorl %b[shift], %k[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1189  return retval;
1190 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotr16()

__INTRIN_INLINE unsigned short __cdecl _rotr16 ( unsigned short  value,
unsigned char  shift 
)

Definition at line 1203 of file intrin_x86.h.

1204 {
1205  unsigned short retval;
1206  __asm__("rorw %b[shift], %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1207  return retval;
1208 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _rotr64()

__INTRIN_INLINE unsigned long long __cdecl _rotr64 ( unsigned long long  value,
int  shift 
)

Definition at line 1220 of file intrin_x86.h.

1221 {
1222  /* FIXME: this is probably not optimal */
1223  return (value >> shift) | (value << (64 - shift));
1224 }
#define shift
Definition: input.c:1756

◆ _rotr8()

__INTRIN_INLINE unsigned char __cdecl _rotr8 ( unsigned char  value,
unsigned char  shift 
)

Definition at line 1194 of file intrin_x86.h.

1195 {
1196  unsigned char retval;
1197  __asm__("rorb %b[shift], %b[retval]" : [retval] "=qm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
1198  return retval;
1199 }
#define shift
Definition: input.c:1756
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")

◆ _sgdt()

__INTRIN_INLINE void _sgdt ( void Destination)

Definition at line 1939 of file intrin_x86.h.

1940 {
1941  __asm__ __volatile__("sgdt %0" : : "m"(*(short*)Destination) : "memory");
1942 }
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:2937

Referenced by ImgArchEfiStartBootApplication(), and Mmx86InitializeMemoryMap().

◆ memcpy()

__INTRIN_INLINE void* __cdecl memcpy ( void dest,
const void source,
size_t  num 
)

Definition at line 74 of file intrin_x86.h.

75 {
76  return memmove(dest, source, num);
77 }
GLuint GLuint num
Definition: glext.h:9618
void *__cdecl memmove(void *dest, const void *source, size_t num)
Definition: memmove.c:4
static char * dest
Definition: rtl.c:135

◆ memmove()

void* __cdecl memmove ( void dest,
const void source,
size_t  num 
)

Definition at line 4 of file memmove.c.

5 {
6  char *char_dest = (char *)dest;
7  char *char_src = (char *)src;
8 
9  if ((char_dest <= char_src) || (char_dest >= (char_src+count)))
10  {
11  /* non-overlapping buffers */
12  while(count > 0)
13  {
14  *char_dest = *char_src;
15  char_dest++;
16  char_src++;
17  count--;
18  }
19  }
20  else
21  {
22  /* overlaping buffers */
23  char_dest = (char *)dest + count - 1;
24  char_src = (char *)src + count - 1;
25 
26  while(count > 0)
27  {
28  *char_dest = *char_src;
29  char_dest--;
30  char_src--;
31  count--;
32  }
33  }
34 
35  return dest;
36 }
GLuint GLuint GLsizei count
Definition: gl.h:1545
GLenum src
Definition: glext.h:6340
static char * dest
Definition: rtl.c:135

Referenced by memcpy().