ReactOS 0.4.15-dev-8390-g075894b
kiinit.c
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1/*
2 * PROJECT: ReactOS Kernel
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: ntoskrnl/ke/arm/kiinit.c
5 * PURPOSE: Implements the kernel entry point for ARM machines
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9/* INCLUDES *******************************************************************/
10
11#include <ntoskrnl.h>
12#define NDEBUG
13#include <debug.h>
14
15VOID
19 UCHAR ByteToSend
20);
21
22/* GLOBALS ********************************************************************/
23
30#define __ARMV6__ KeIsArmV6
31
32/* FUNCTIONS ******************************************************************/
33
34VOID
37{
38 /* There is nothing to do on ARM */
39 return;
40}
41
42VOID
45 IN PKTHREAD InitThread,
46 IN PVOID IdleStack,
47 IN PKPRCB Prcb,
49 IN PLOADER_PARAMETER_BLOCK LoaderBlock)
50{
51 PKIPCR Pcr = (PKIPCR)KeGetPcr();
52 ULONG PageDirectory[2];
53 ULONG i;
54
55 /* Set the default NX policy (opt-in) */
56 SharedUserData->NXSupportPolicy = NX_SUPPORT_POLICY_OPTIN;
57
58 /* Initialize spinlocks and DPC data */
60
61 /* Set stack pointers */
62 //Pcr->InitialStack = IdleStack;
63 Pcr->Prcb.SpBase = IdleStack; // ???
64
65 /* Check if this is the Boot CPU */
66 if (!Number)
67 {
68 /* Setup the unexpected interrupt */
70 for (i = 0; i < 4; i++)
71 {
72 /* Copy the template code */
74 }
75
76 /* Set DMA coherency */
78
79 /* Sweep D-Cache */
81
82 /* Set boot-level flags */
84 KeFeatureBits = 0;
88#if 0
89 /* Set the current MP Master KPRCB to the Boot PRCB */
90 Prcb->MultiThreadSetMaster = Prcb;
91#endif
92 /* Lower to APC_LEVEL */
94
95 /* Initialize portable parts of the OS */
97
98 /* Initialize the Idle Process and the Process Listhead */
100 PageDirectory[0] = 0;
101 PageDirectory[1] = 0;
102 KeInitializeProcess(InitProcess,
103 0,
105 PageDirectory,
106 FALSE);
107 InitProcess->QuantumReset = MAXCHAR;
108 }
109 else
110 {
111 /* FIXME-V6: See if we want to support MP */
112 DPRINT1("ARM MPCore not supported\n");
113 }
114
115 /* Setup the Idle Thread */
116 KeInitializeThread(InitProcess,
117 InitThread,
118 NULL,
119 NULL,
120 NULL,
121 NULL,
122 NULL,
123 IdleStack);
124 InitThread->NextProcessor = Number;
125 InitThread->Priority = HIGH_PRIORITY;
126 InitThread->State = Running;
127 InitThread->Affinity = 1 << Number;
128 InitThread->WaitIrql = DISPATCH_LEVEL;
129 InitProcess->ActiveProcessors = 1 << Number;
130
131 /* HACK for MmUpdatePageDir */
132 ((PETHREAD)InitThread)->ThreadsProcess = (PEPROCESS)InitProcess;
133
134 /* Set up the thread-related fields in the PRCB */
135 Prcb->CurrentThread = InitThread;
136 Prcb->NextThread = NULL;
137 Prcb->IdleThread = InitThread;
138
139 /* Initialize the Kernel Executive */
140 ExpInitializeExecutive(Number, LoaderBlock);
141
142 /* Only do this on the boot CPU */
143 if (!Number)
144 {
145 /* Calculate the time reciprocal */
149
150 /* Update DPC Values in case they got updated by the executive */
151 Prcb->MaximumDpcQueueDepth = KiMaximumDpcQueueDepth;
152 Prcb->MinimumDpcRate = KiMinimumDpcRate;
153 Prcb->AdjustDpcThreshold = KiAdjustDpcThreshold;
154 }
155
156 /* Raise to Dispatch */
158
159 /* Set the Idle Priority to 0. This will jump into Phase 1 */
160 KeSetPriorityThread(InitThread, 0);
161
162 /* If there's no thread scheduled, put this CPU in the Idle summary */
163 KiAcquirePrcbLock(Prcb);
164 if (!Prcb->NextThread) KiIdleSummary |= 1 << Number;
165 KiReleasePrcbLock(Prcb);
166
167 /* Raise back to HIGH_LEVEL and clear the PRCB for the loader block */
169 LoaderBlock->Prcb = 0;
170}
171
172//C_ASSERT((PKIPCR)KeGetPcr() == (PKIPCR)0xFFDFF000);
173//C_ASSERT((FIELD_OFFSET(KIPCR, FirstLevelDcacheSize) & 4) == 0);
174//C_ASSERT(sizeof(KIPCR) <= PAGE_SIZE);
175
176VOID
177NTAPI
178KiInitializePcr(IN ULONG ProcessorNumber,
179 IN PKIPCR Pcr,
180 IN PKTHREAD IdleThread,
181 IN PVOID PanicStack,
182 IN PVOID InterruptStack)
183{
184 ULONG i;
185
186 /* Set the Current Thread */
187 Pcr->Prcb.CurrentThread = IdleThread;
188
189 /* Set pointers to ourselves */
190 Pcr->Self = (PKPCR)Pcr;
191 Pcr->CurrentPrcb = &Pcr->Prcb;
192
193 /* Set the PCR Version */
194 Pcr->MajorVersion = PCR_MAJOR_VERSION;
195 Pcr->MinorVersion = PCR_MINOR_VERSION;
196
197 /* Set the PCRB Version */
198 Pcr->Prcb.MajorVersion = PRCB_MAJOR_VERSION;
199 Pcr->Prcb.MinorVersion = PRCB_MINOR_VERSION;
200
201 /* Set the Build Type */
202 Pcr->Prcb.BuildType = 0;
203#ifndef CONFIG_SMP
204 Pcr->Prcb.BuildType |= PRCB_BUILD_UNIPROCESSOR;
205#endif
206#if DBG
207 Pcr->Prcb.BuildType |= PRCB_BUILD_DEBUG;
208#endif
209
210 /* Set the Processor Number and current Processor Mask */
211 Pcr->Prcb.Number = (UCHAR)ProcessorNumber;
212 Pcr->Prcb.SetMember = 1 << ProcessorNumber;
213
214 /* Set the PRCB for this Processor */
215 KiProcessorBlock[ProcessorNumber] = Pcr->CurrentPrcb;
216
217 /* Start us out at PASSIVE_LEVEL */
218 Pcr->CurrentIrql = PASSIVE_LEVEL;
219
220 /* Set the stacks */
221 Pcr->Prcb.PanicStackBase = (ULONG)PanicStack;
222 Pcr->Prcb.IsrStack = InterruptStack;
223#if 0
224 /* Setup the processor set */
225 Pcr->Prcb.MultiThreadProcessorSet = Pcr->Prcb.SetMember;
226#endif
227
228 /* Copy cache information from the loader block */
229 Pcr->Prcb.Cache[FirstLevelDcache].Type = CacheData;
230 Pcr->Prcb.Cache[FirstLevelDcache].Level = 1;
231 Pcr->Prcb.Cache[FirstLevelDcache].Associativity = 0; // FIXME
232 Pcr->Prcb.Cache[FirstLevelDcache].LineSize = KeLoaderBlock->u.Arm.FirstLevelDcacheFillSize;
233 Pcr->Prcb.Cache[FirstLevelDcache].Size = KeLoaderBlock->u.Arm.FirstLevelDcacheSize;
234
235 Pcr->Prcb.Cache[SecondLevelDcache].Type = CacheData;
236 Pcr->Prcb.Cache[SecondLevelDcache].Level = 2;
237 Pcr->Prcb.Cache[SecondLevelDcache].Associativity = 0; // FIXME
238 Pcr->Prcb.Cache[SecondLevelDcache].LineSize = KeLoaderBlock->u.Arm.SecondLevelDcacheFillSize;
239 Pcr->Prcb.Cache[SecondLevelDcache].Size = KeLoaderBlock->u.Arm.SecondLevelDcacheSize;
240
241 Pcr->Prcb.Cache[FirstLevelIcache].Type = CacheInstruction;
242 Pcr->Prcb.Cache[FirstLevelIcache].Level = 1;
243 Pcr->Prcb.Cache[FirstLevelIcache].Associativity = 0; // FIXME
244 Pcr->Prcb.Cache[FirstLevelIcache].LineSize = KeLoaderBlock->u.Arm.FirstLevelIcacheFillSize;
245 Pcr->Prcb.Cache[FirstLevelIcache].Size = KeLoaderBlock->u.Arm.FirstLevelIcacheSize;
246
247 Pcr->Prcb.Cache[SecondLevelIcache].Type = CacheInstruction;
248 Pcr->Prcb.Cache[SecondLevelIcache].Level = 2;
249 Pcr->Prcb.Cache[SecondLevelIcache].Associativity = 0; // FIXME
250 Pcr->Prcb.Cache[SecondLevelIcache].LineSize = KeLoaderBlock->u.Arm.SecondLevelIcacheFillSize;
251 Pcr->Prcb.Cache[SecondLevelIcache].Size = KeLoaderBlock->u.Arm.SecondLevelIcacheSize;
252
253 /* Set global d-cache fill and alignment values */
254 if (Pcr->Prcb.Cache[SecondLevelDcache].Size == 0)
255 {
256 /* Use the first level */
257 Pcr->Prcb.Cache[GlobalDcache] = Pcr->Prcb.Cache[FirstLevelDcache];
258 }
259 else
260 {
261 /* Use the second level */
262 Pcr->Prcb.Cache[GlobalDcache] = Pcr->Prcb.Cache[SecondLevelDcache];
263 }
264
265 /* Set the alignment */
266 //Pcr->DcacheAlignment = Pcr->DcacheFillSize - 1;
267
268 /* Set global i-cache fill and alignment values */
269 if (Pcr->Prcb.Cache[SecondLevelIcache].Size == 0)
270 {
271 /* Use the first level */
272 Pcr->Prcb.Cache[GlobalIcache] = Pcr->Prcb.Cache[FirstLevelIcache];
273 }
274 else
275 {
276 /* Use the second level */
277 Pcr->Prcb.Cache[GlobalIcache] = Pcr->Prcb.Cache[SecondLevelIcache];
278 }
279
280 /* Set the alignment */
281 //Pcr->IcacheAlignment = Pcr->IcacheFillSize - 1;
282
283 /* Set processor information */
284 //Pcr->ProcessorId = KeArmIdCodeRegisterGet().AsUlong;
285
286 /* Set all interrupt routines to unexpected interrupts as well */
287 for (i = 0; i < MAXIMUM_VECTOR; i++)
288 {
289 /* Point to the same template */
291 }
292
293 /* Set default stall factor */
294 Pcr->StallScaleFactor = 50;
295
296 /* Setup software interrupts */
298 Pcr->Idt[APC_LEVEL] = KiApcInterrupt;
300#if 0
301 Pcr->ReservedVectors = (1 << PASSIVE_LEVEL) |
302 (1 << APC_LEVEL) |
303 (1 << DISPATCH_LEVEL) |
304 (1 << IPI_LEVEL);
305#endif
306}
307
308VOID
310{
311 /* Detect ARM version */
313
314 /* Set the number of TLB entries and ASIDs */
316 if (__ARMV6__)
317 {
318 /* 256 ASIDs on v6/v7 */
319 KeNumberProcessIds = 256;
320 }
321 else
322 {
323 /* The TLB is VIVT on v4/v5 */
325 }
326}
327
329VOID
331{
332 ULONG Cpu;
333 PKTHREAD InitialThread;
334 PKPROCESS InitialProcess;
335 ARM_CONTROL_REGISTER ControlRegister;
336 PKIPCR Pcr = (PKIPCR)KeGetPcr();
338
339 /* Flush the TLB */
340 KeFlushTb();
341
342 /* Save the loader block and get the current CPU */
343 KeLoaderBlock = LoaderBlock;
344 Cpu = KeNumberProcessors;
345
346 /* Save the initial thread and process */
347 InitialThread = (PKTHREAD)LoaderBlock->Thread;
348 InitialProcess = (PKPROCESS)LoaderBlock->Process;
349
350 /* Clean the APC List Head */
351 InitializeListHead(&InitialThread->ApcState.ApcListHead[KernelMode]);
352
353 /* Initialize the machine type */
355
356 /* Skip initial setup if this isn't the Boot CPU */
357 if (Cpu) goto AppCpuInit;
358
359 /* Initialize the PCR */
361 KiInitializePcr(Cpu,
362 Pcr,
363 InitialThread,
364 (PVOID)LoaderBlock->u.Arm.PanicStack,
365 (PVOID)LoaderBlock->u.Arm.InterruptStack);
366
367 /* Now sweep caches */
370
371 /* Set us as the current process */
372 InitialThread->ApcState.Process = InitialProcess;
373
374AppCpuInit:
375 /* Setup CPU-related fields */
376 Pcr->Prcb.Number = Cpu;
377 Pcr->Prcb.SetMember = 1 << Cpu;
378
379 /* Initialize the Processor with HAL */
381
382 /* Set active processors */
385
386 /* Check if this is the boot CPU */
387 if (!Cpu)
388 {
389 /* Initialize debugging system */
391
392 /* Check for break-in */
394 }
395
396 /* Raise to HIGH_LEVEL */
398
399 /* Set the exception address to high */
400 ControlRegister = KeArmControlRegisterGet();
401 ControlRegister.HighVectors = TRUE;
402 KeArmControlRegisterSet(ControlRegister);
403
404 /* Setup the exception vector table */
405 RtlCopyMemory((PVOID)0xFFFF0000, &KiArmVectorTable, 14 * sizeof(PVOID));
406
407 /* Initialize the rest of the kernel now */
408 KiInitializeKernel((PKPROCESS)LoaderBlock->Process,
409 (PKTHREAD)LoaderBlock->Thread,
410 (PVOID)LoaderBlock->KernelStack,
411 &Pcr->Prcb,
412 Pcr->Prcb.Number,
414
415 /* Set the priority of this thread to 0 */
417 Thread->Priority = 0;
418
419 /* Force interrupts enabled and lower IRQL back to DISPATCH_LEVEL */
420 _enable();
422
423 /* Set the right wait IRQL */
424 Thread->WaitIrql = DISPATCH_LEVEL;
425
426 /* Jump into the idle loop */
427 KiIdleLoop();
428}
429
430ULONG
431DbgPrintEarly(const char *fmt, ...)
432{
434 unsigned int i;
435 char Buffer[1024];
437
438 va_start(args, fmt);
439 i = vsprintf(Buffer, fmt, args);
440 va_end(args);
441
442 /* Output the message */
443 while (*String != 0)
444 {
445 if (*String == '\n')
446 {
447 KdPortPutByteEx(NULL, '\r');
448 }
450 String++;
451 }
452
453 return STATUS_SUCCESS;
454}
unsigned char BOOLEAN
char * va_list
Definition: acmsvcex.h:78
#define va_end(ap)
Definition: acmsvcex.h:90
#define va_start(ap, A)
Definition: acmsvcex.h:91
static VOID KiInitializePcr(_Out_ PKIPCR Pcr, _In_ ULONG ProcessorNumber, _In_ PKGDTENTRY64 GdtBase, _In_ PKIDTENTRY64 IdtBase, _In_ PKTSS64 TssBase, _In_ PKTHREAD IdleThread, _In_ PVOID DpcStack)
Definition: kiinit.c:92
VOID NTAPI KiInitMachineDependent(VOID)
Definition: kiinit.c:48
FORCEINLINE VOID KeArmControlRegisterSet(IN ARM_CONTROL_REGISTER ControlRegister)
Definition: intrin_i.h:135
FORCEINLINE ARM_ID_CODE_REGISTER KeArmIdCodeRegisterGet(VOID)
Definition: intrin_i.h:31
FORCEINLINE ARM_CONTROL_REGISTER KeArmControlRegisterGet(VOID)
Definition: intrin_i.h:18
BOOLEAN KeIsArmV6
Definition: kiinit.c:25
VOID NTAPI KiInitializeKernel(IN PKPROCESS InitProcess, IN PKTHREAD InitThread, IN PVOID IdleStack, IN PKPRCB Prcb, IN CCHAR Number, IN PLOADER_PARAMETER_BLOCK LoaderBlock)
Definition: kiinit.c:44
VOID KiInitializeMachineType(VOID)
Definition: kiinit.c:309
ULONG KeNumberTbEntries
Definition: kiinit.c:27
PVOID KiArmVectorTable
DECLSPEC_NORETURN VOID KiInitializeSystem(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
Definition: kiinit.c:330
ULONG DbgPrintEarly(const char *fmt,...)
Definition: kiinit.c:431
ULONG ProcessCount
Definition: kiinit.c:28
KINTERRUPT KxUnexpectedInterrupt
Definition: kiinit.c:24
ULONG KeNumberProcessIds
Definition: kiinit.c:26
#define __ARMV6__
Definition: kiinit.c:30
VOID NTAPI KdPortPutByteEx(PCPPORT PortInformation, UCHAR ByteToSend)
VOID NTAPI KiDispatchInterrupt(VOID)
Definition: thrdini.c:305
#define DPRINT1
Definition: precomp.h:8
#define MAXULONG_PTR
Definition: basetsd.h:103
Definition: bufpool.h:45
#define NULL
Definition: types.h:112
#define TRUE
Definition: types.h:120
#define FALSE
Definition: types.h:117
IN CINT OUT PVOID PortInformation
Definition: dumpinfo.c:40
#define PASSIVE_LEVEL
Definition: env_spec_w32.h:693
#define IPI_LEVEL
Definition: env_spec_w32.h:701
#define HIGH_LEVEL
Definition: env_spec_w32.h:703
#define APC_LEVEL
Definition: env_spec_w32.h:695
#define PAGE_SIZE
Definition: env_spec_w32.h:49
#define KeLowerIrql(oldIrql)
Definition: env_spec_w32.h:602
#define InitializeListHead(ListHead)
Definition: env_spec_w32.h:944
#define DISPATCH_LEVEL
Definition: env_spec_w32.h:696
_In_opt_ PFILE_OBJECT _In_opt_ PETHREAD Thread
Definition: fltkernel.h:2653
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
VOID FASTCALL KfLowerIrql(IN KIRQL NewIrql)
Definition: pic.c:232
KIRQL FASTCALL KfRaiseIrql(IN KIRQL NewIrql)
Definition: pic.c:187
VOID HalSweepDcache(VOID)
Definition: processor.c:107
VOID HalSweepIcache(VOID)
Definition: processor.c:135
VOID NTAPI HalInitializeProcessor(IN ULONG ProcessorNumber, IN PLOADER_PARAMETER_BLOCK LoaderBlock)
Definition: processor.c:48
#define KeGetCurrentThread
Definition: hal.h:55
int __cdecl vsprintf(char *_Dest, const char *_Format, va_list _Args)
Definition: sprintf.c:733
#define HIGH_PRIORITY
void __cdecl _enable(void)
Definition: intrin_arm.h:373
BOOLEAN NTAPI KdInitSystem(_In_ ULONG BootPhase, _In_opt_ PLOADER_PARAMETER_BLOCK LoaderBlock)
Definition: kdinit.c:142
BOOLEAN NTAPI KdPollBreakIn(VOID)
Definition: kdlock.c:75
FORCEINLINE VOID KiReleasePrcbLock(IN PKPRCB Prcb)
Definition: ke_x.h:230
FORCEINLINE VOID KiAcquirePrcbLock(IN PKPRCB Prcb)
Definition: ke_x.h:220
CCHAR KeNumberProcessors
Definition: krnlinit.c:35
PLOADER_PARAMETER_BLOCK KeLoaderBlock
Definition: krnlinit.c:29
#define KernelMode
Definition: asm.h:34
#define PRCB_MINOR_VERSION
Definition: ketypes.h:321
#define PRCB_MAJOR_VERSION
Definition: ketypes.h:322
struct _KIPCR * PKIPCR
#define PRCB_BUILD_UNIPROCESSOR
Definition: ketypes.h:324
#define PRCB_BUILD_DEBUG
Definition: ketypes.h:323
@ GlobalDcache
Definition: ketypes.h:742
@ SecondLevelIcache
Definition: ketypes.h:741
@ FirstLevelIcache
Definition: ketypes.h:740
@ SecondLevelDcache
Definition: ketypes.h:739
@ FirstLevelDcache
Definition: ketypes.h:738
@ GlobalIcache
Definition: ketypes.h:743
#define KeGetPcr()
Definition: ketypes.h:81
#define DBG_STATUS_CONTROL_C
Definition: kdtypes.h:39
#define PROCESSOR_ARCHITECTURE_ARM
Definition: ketypes.h:110
@ Running
Definition: ketypes.h:390
struct _KTHREAD * PKTHREAD
Definition: nt_native.h:28
struct _EPROCESS * PEPROCESS
Definition: nt_native.h:30
struct _ETHREAD * PETHREAD
Definition: nt_native.h:29
#define DECLSPEC_NORETURN
Definition: ntbasedef.h:176
VOID NTAPI ExpInitializeExecutive(IN ULONG Cpu, IN PLOADER_PARAMETER_BLOCK LoaderBlock)
Definition: init.c:923
VOID KiApcInterrupt(VOID)
Definition: trapc.c:229
VOID KeFlushTb(VOID)
Definition: cpu.c:36
#define MAXIMUM_VECTOR
Definition: ke.h:26
VOID KiPassiveRelease(VOID)
LARGE_INTEGER KiTimeIncrementReciprocal
Definition: timerobj.c:18
ULONG KiAdjustDpcThreshold
Definition: dpc.c:21
PKPRCB KiProcessorBlock[]
Definition: krnlinit.c:32
ULONG KiMaximumDpcQueueDepth
Definition: dpc.c:19
VOID __cdecl KiInterruptTemplate(VOID)
KAFFINITY KiIdleSummary
Definition: thrdschd.c:25
VOID NTAPI KeInitializeThread(IN PKPROCESS Process, IN OUT PKTHREAD Thread, IN PKSYSTEM_ROUTINE SystemRoutine, IN PKSTART_ROUTINE StartRoutine, IN PVOID StartContext, IN PCONTEXT Context, IN PVOID Teb, IN PVOID KernelStack)
Definition: thrdobj.c:891
KAFFINITY KeActiveProcessors
Definition: krnlinit.c:23
ULONG KeFeatureBits
Definition: krnlinit.c:22
UCHAR KiTimeIncrementShiftCount
Definition: timerobj.c:19
USHORT KeProcessorLevel
Definition: krnlinit.c:20
ULONG KiMinimumDpcRate
Definition: dpc.c:20
DECLSPEC_NORETURN VOID KiIdleLoop(VOID)
Definition: stubs.c:99
VOID NTAPI KiInitSystem(VOID)
Definition: krnlinit.c:71
LARGE_INTEGER NTAPI KiComputeReciprocal(IN LONG Divisor, OUT PUCHAR Shift)
Definition: krnlinit.c:123
VOID NTAPI KeInitializeProcess(struct _KPROCESS *Process, KPRIORITY Priority, KAFFINITY Affinity, PULONG_PTR DirectoryTableBase, IN BOOLEAN Enable)
USHORT KeProcessorRevision
Definition: krnlinit.c:21
VOID NTAPI KiInitSpinLocks(IN PKPRCB Prcb, IN CCHAR Number)
Definition: krnlinit.c:187
LIST_ENTRY KiProcessListHead
Definition: procobj.c:18
USHORT KeProcessorArchitecture
Definition: krnlinit.c:19
ULONG KiDmaIoCoherency
Definition: cpu.c:29
VOID KiUnexpectedInterrupt(VOID)
Definition: interrupt.c:51
ULONG KeMaximumIncrement
Definition: clock.c:20
_In_opt_ PENTER_STATE_SYSTEM_HANDLER _In_opt_ PVOID _In_ LONG _In_opt_ LONG volatile * Number
Definition: ntpoapi.h:207
unsigned short USHORT
Definition: pedump.c:61
#define PCR_MINOR_VERSION
Definition: ke.h:290
struct _KPCR * PKPCR
#define PCR_MAJOR_VERSION
Definition: ke.h:291
#define SharedUserData
#define args
Definition: format.c:66
#define STATUS_SUCCESS
Definition: shellext.h:65
ULONG Cp15_Cr0_CpuId
Definition: ketypes.h:409
PKINTERRUPT_ROUTINE DispatchAddress
Definition: ketypes.h:947
ULONG DispatchCode[DISPATCH_LENGTH]
Definition: ketypes.h:968
KPRCB Prcb
Definition: ketypes.h:976
UINT64 SetMember
Definition: ketypes.h:662
PVOID SpBase
Definition: ketypes.h:838
USHORT Number
Definition: ketypes.h:643
KPROCESSOR_STATE ProcessorState
Definition: ketypes.h:663
KARM_ARCH_STATE ArchState
Definition: ketypes.h:652
KAPC_STATE ApcState
Definition: ketypes.h:1778
ARM_LOADER_BLOCK Arm
Definition: arc.h:566
union _LOADER_PARAMETER_BLOCK::@3373 u
Definition: match.c:390
Definition: dsound.c:943
KPRIORITY NTAPI KeSetPriorityThread(IN PKTHREAD Thread, IN KPRIORITY Priority)
Definition: thrdobj.c:1319
uint32_t * PULONG
Definition: typedefs.h:59
#define NTAPI
Definition: typedefs.h:36
void * PVOID
Definition: typedefs.h:50
#define RtlCopyMemory(Destination, Source, Length)
Definition: typedefs.h:263
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:262
#define IN
Definition: typedefs.h:39
uint32_t ULONG
Definition: typedefs.h:59
char CCHAR
Definition: typedefs.h:51
char * PCHAR
Definition: typedefs.h:51
__analysis_noreturn NTSYSAPI VOID NTAPI DbgBreakPointWithStatus(_In_ ULONG Status)
#define MAXCHAR
Definition: umtypes.h:112
_Must_inspect_result_ _In_ WDFDEVICE _In_ WDFSTRING String
Definition: wdfdevice.h:2433
@ CacheInstruction
Definition: ketypes.h:45
@ CacheData
Definition: ketypes.h:46
#define NX_SUPPORT_POLICY_OPTIN
Definition: ketypes.h:1262
unsigned char UCHAR
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