ReactOS 0.4.15-dev-7887-g64a59a1
cpu.c
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1/*
2 * PROJECT: ReactOS Kernel
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: ntoskrnl/ke/arm/cpu.c
5 * PURPOSE: Implements routines for ARM CPU support
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9/* INCLUDES *******************************************************************/
10
11#include <ntoskrnl.h>
12#define NDEBUG
13#include <debug.h>
14
15/* GLOBALS ********************************************************************/
16
21ULONG KeLargestCacheLine = 64; // FIXME: It depends
22
23/* FUNCTIONS ******************************************************************/
24
25VOID
27 IN PVOID Virtual)
28{
29 //
30 // Just invalidate it
31 //
33}
34
35VOID
37{
38 //
39 // Flush the entire TLB
40 //
42}
43
44VOID
47{
48 //
49 // Rename?
50 //
51 KeFlushTb();
52}
53
54VOID
58{
59 /* Not using XMMI in this routine */
61}
62
63VOID
66{
67 //
68 // Save some critical stuff we use
69 //
71#if 0
72 ProcessorState->SpecialRegisters.ControlRegister = KeArmControlRegisterGet();
73 ProcessorState->SpecialRegisters.LockdownRegister = KeArmLockdownRegisterGet();
74 ProcessorState->SpecialRegisters.CacheRegister = KeArmCacheRegisterGet();
75 ProcessorState->SpecialRegisters.StatusRegister = KeArmStatusRegisterGet();
76#endif
77}
78
79VOID
82{
84#if 0
85 KeArmControlRegisterSet(ProcessorState->SpecialRegisters.ControlRegister);
86 KeArmLockdownRegisterSet(ProcessorState->SpecialRegisters.LockdownRegister);
87 KeArmCacheRegisterSet(ProcessorState->SpecialRegisters.CacheRegister);
88 KeArmStatusRegisterSet(ProcessorState->SpecialRegisters.StatusRegister);
89#endif
90}
91
95{
96 //
97 // Invalidate D cache and I cache
98 //
100 return TRUE;
101}
102
103
104/* PUBLIC FUNCTIONS ***********************************************************/
105
106/*
107 * @implemented
108 */
109ULONG
110NTAPI
112{
113 /* Return the global variable */
114 return KeLargestCacheLine;
115}
116
117/*
118 * @implemented
119 */
120VOID
121NTAPI
123 IN BOOLEAN AllProcessors)
124{
126
127 //
128 // Raise the IRQL for the TB Flush
129 //
131
132 //
133 // Flush the TB for the Current CPU
134 //
136
137 //
138 // Return to Original IRQL
139 //
141}
142
143/*
144 * @implemented
145 */
146VOID
147NTAPI
149{
150 //
151 // Save the coherency globally
152 //
153 KiDmaIoCoherency = Coherency;
154}
155
156/*
157 * @implemented
158 */
160NTAPI
162{
163 PAGED_CODE();
164
165 //
166 // Simply return the number of active processors
167 //
168 return KeActiveProcessors;
169}
170
171/*
172 * @implemented
173 */
174VOID
177{
178 //
179 // Capture the context
180 //
181 RtlCaptureContext(&State->ContextFrame);
182
183 //
184 // Capture the control state
185 //
187}
188
189VOID
190NTAPI
192 _In_ PMDL Mdl,
193 _In_ BOOLEAN ReadOperation,
194 _In_ BOOLEAN DmaOperation)
195{
197}
198
199/* SYSTEM CALLS NOT VALID ON THIS CPU *****************************************/
200
201/*
202 * @implemented
203 */
205NTAPI
207 IN PVOID ControlData)
208{
209 //
210 // Does not exist on ARM
211 //
213}
214
216NTAPI
218 IN LDT_ENTRY LdtEntry1,
219 IN ULONG Selector2,
220 IN LDT_ENTRY LdtEntry2)
221{
222 //
223 // Does not exist on ARM
224 //
226}
#define PAGED_CODE()
unsigned char BOOLEAN
#define __cdecl
Definition: accygwin.h:79
FORCEINLINE VOID KeArmControlRegisterSet(IN ARM_CONTROL_REGISTER ControlRegister)
Definition: intrin_i.h:135
FORCEINLINE ARM_LOCKDOWN_REGISTER KeArmLockdownRegisterGet(VOID)
Definition: intrin_i.h:83
FORCEINLINE ARM_CACHE_REGISTER KeArmCacheRegisterGet(VOID)
Definition: intrin_i.h:109
FORCEINLINE ARM_CONTROL_REGISTER KeArmControlRegisterGet(VOID)
Definition: intrin_i.h:18
FORCEINLINE VOID KeArmInvalidateAllCaches(VOID)
Definition: intrin_i.h:195
FORCEINLINE VOID KeArmInvalidateTlbEntry(IN PVOID Address)
Definition: intrin_i.h:185
FORCEINLINE ARM_STATUS_REGISTER KeArmStatusRegisterGet(VOID)
Definition: intrin_i.h:122
FORCEINLINE VOID KeArmFlushTlb(VOID)
Definition: intrin_i.h:175
FORCEINLINE VOID KeArmLockdownRegisterSet(IN ARM_LOCKDOWN_REGISTER LockdownRegister)
Definition: intrin_i.h:165
@ Invalid
Definition: asmpp.cpp:30
LONG NTSTATUS
Definition: precomp.h:26
#define TRUE
Definition: types.h:120
ULONG_PTR KAFFINITY
Definition: compat.h:85
UCHAR KIRQL
Definition: env_spec_w32.h:591
#define KeLowerIrql(oldIrql)
Definition: env_spec_w32.h:602
KIRQL NTAPI KeRaiseIrqlToSynchLevel(VOID)
Definition: pic.c:156
NTSYSAPI void WINAPI DbgBreakPoint(void)
void __cdecl __debugbreak(void)
Definition: intrin_ppc.h:698
#define _In_
Definition: ms_sal.h:308
NTSYSAPI VOID NTAPI RtlCaptureContext(_Out_ PCONTEXT ContextRecord)
#define FASTCALL
Definition: nt_native.h:50
KAFFINITY KeActiveProcessors
Definition: krnlinit.c:23
ULONG NTAPI KeGetRecommendedSharedDataAlignment(VOID)
Definition: cpu.c:675
VOID NTAPI KiRestoreProcessorControlState(PKPROCESSOR_STATE ProcessorState)
Definition: cpu.c:534
VOID NTAPI KeFlushCurrentTb(VOID)
Definition: cpu.c:526
VOID NTAPI KeFlushEntireTb(IN BOOLEAN Invalid, IN BOOLEAN AllProcessors)
Definition: cpu.c:617
ULONG KeLargestCacheLine
Definition: cpu.c:28
VOID __cdecl KeSaveStateForHibernate(IN PKPROCESSOR_STATE State)
Definition: cpu.c:686
BOOLEAN NTAPI KeInvalidateAllCaches(VOID)
Definition: cpu.c:663
VOID NTAPI KeSetDmaIoCoherency(IN ULONG Coherency)
Definition: cpu.c:700
VOID NTAPI KiSaveProcessorControlState(OUT PKPROCESSOR_STATE ProcessorState)
Definition: cpu.c:576
ULONG KiDmaIoCoherency
Definition: cpu.c:29
KAFFINITY NTAPI KeQueryActiveProcessors(VOID)
Definition: cpu.c:637
VOID KeFlushTb(VOID)
Definition: cpu.c:36
NTSTATUS NTAPI NtSetLdtEntries(IN ULONG Selector1, IN LDT_ENTRY LdtEntry1, IN ULONG Selector2, IN LDT_ENTRY LdtEntry2)
Definition: cpu.c:217
VOID KiFlushSingleTb(IN BOOLEAN Invalid, IN PVOID Virtual)
Definition: cpu.c:26
ULONG KeFixedTbEntries
Definition: cpu.c:17
NTSTATUS NTAPI NtVdmControl(IN ULONG ControlCode, IN PVOID ControlData)
Definition: cpu.c:206
ULONG KeDcacheFlushCount
Definition: cpu.c:20
VOID FASTCALL KeZeroPages(IN PVOID Address, IN ULONG Size)
Definition: cpu.c:56
ULONG KeIcacheFlushCount
Definition: cpu.c:19
#define STATUS_NOT_IMPLEMENTED
Definition: ntstatus.h:239
static WCHAR Address[46]
Definition: ping.c:68
#define KeFlushIoBuffers(_Mdl, _ReadOperation, _DmaOperation)
Definition: ke.h:174
KSPECIAL_REGISTERS SpecialRegisters
Definition: ketypes.h:600
Definition: compat.h:777
#define NTAPI
Definition: typedefs.h:36
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:262
#define IN
Definition: typedefs.h:39
uint32_t ULONG
Definition: typedefs.h:59
#define OUT
Definition: typedefs.h:40
_Must_inspect_result_ _In_ WDFDEVICE _In_ PWDF_DEVICE_PROPERTY_DATA _In_ DEVPROPTYPE _In_ ULONG Size
Definition: wdfdevice.h:4533
_In_ WDFDEVICE _In_ PVOID _In_opt_ PMDL Mdl
_IRQL_requires_same_ typedef _In_ ULONG ControlCode
Definition: wmitypes.h:55
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:778