ReactOS  0.4.14-dev-317-g96040ec
processor.c File Reference
#include <hal.h>
#include <debug.h>
Include dependency graph for processor.c:

Go to the source code of this file.

Macros

#define NDEBUG
 

Functions

VOID HalpIdentifyProcessor (VOID)
 
VOID NTAPI HalInitializeProcessor (IN ULONG ProcessorNumber, IN PLOADER_PARAMETER_BLOCK LoaderBlock)
 
BOOLEAN NTAPI HalAllProcessorsStarted (VOID)
 
BOOLEAN NTAPI HalStartNextProcessor (IN PLOADER_PARAMETER_BLOCK LoaderBlock, IN PKPROCESSOR_STATE ProcessorState)
 
VOID NTAPI HalProcessorIdle (VOID)
 
VOID NTAPI HalRequestIpi (KAFFINITY TargetProcessors)
 
VOID HalSweepDcache (VOID)
 
VOID HalSweepIcache (VOID)
 

Variables

LONG HalpActiveProcessors
 
KAFFINITY HalpDefaultInterruptAffinity
 
BOOLEAN HalpProcessorIdentified
 
BOOLEAN HalpTestCleanSupported
 

Macro Definition Documentation

◆ NDEBUG

#define NDEBUG

Definition at line 12 of file processor.c.

Function Documentation

◆ HalAllProcessorsStarted()

BOOLEAN NTAPI HalAllProcessorsStarted ( VOID  )

Definition at line 60 of file processor.c.

61 {
62  /* Do nothing */
63  return TRUE;
64 }
#define TRUE
Definition: types.h:120

Referenced by Phase1InitializationDiscard().

◆ HalInitializeProcessor()

VOID NTAPI HalInitializeProcessor ( IN ULONG  ProcessorNumber,
IN PLOADER_PARAMETER_BLOCK  LoaderBlock 
)

Definition at line 48 of file processor.c.

50 {
51  /* Do nothing */
52  return;
53 }

Referenced by KiInitializeSystem(), KiSystemStartup(), and KiSystemStartupReal().

◆ HalpIdentifyProcessor()

VOID HalpIdentifyProcessor ( VOID  )

Definition at line 25 of file processor.c.

26 {
27  ARM_ID_CODE_REGISTER IdRegister;
28 
29  /* Don't do it again */
31 
32  // fixfix: Use Pcr->ProcessorId
33 
34  /* Read the ID Code */
35  IdRegister = KeArmIdCodeRegisterGet();
36 
37  /* Architecture "6" CPUs support test-and-clean (926EJ-S and 1026EJ-S) */
38  HalpTestCleanSupported = (IdRegister.Architecture == 6);
39 }
#define TRUE
Definition: types.h:120
BOOLEAN HalpTestCleanSupported
Definition: processor.c:20
BOOLEAN HalpProcessorIdentified
Definition: processor.c:19
FORCEINLINE ARM_ID_CODE_REGISTER KeArmIdCodeRegisterGet(VOID)
Definition: intrin_i.h:31

Referenced by HalSweepDcache().

◆ HalProcessorIdle()

VOID NTAPI HalProcessorIdle ( VOID  )

Definition at line 83 of file processor.c.

84 {
85  /* Enable interrupts and halt the processor */
86  _enable();
88  while (TRUE);
89 }
#define TRUE
Definition: types.h:120
void __cdecl _enable(void)
Definition: intrin_arm.h:373
#define UNIMPLEMENTED
Definition: debug.h:114

Referenced by PopIdle0().

◆ HalRequestIpi()

VOID NTAPI HalRequestIpi ( KAFFINITY  TargetProcessors)

Definition at line 96 of file processor.c.

97 {
98  /* Not implemented on UP */
100  while (TRUE);
101 }
#define TRUE
Definition: types.h:120
#define UNIMPLEMENTED
Definition: debug.h:114

◆ HalStartNextProcessor()

BOOLEAN NTAPI HalStartNextProcessor ( IN PLOADER_PARAMETER_BLOCK  LoaderBlock,
IN PKPROCESSOR_STATE  ProcessorState 
)

Definition at line 71 of file processor.c.

73 {
74  /* Ready to start */
75  return FALSE;
76 }

◆ HalSweepDcache()

VOID HalSweepDcache ( VOID  )

Definition at line 107 of file processor.c.

108 {
109  /*
110  * We get called very early on, before HalInitSystem or any of the Hal*
111  * processor routines, so we need to figure out what CPU we're on.
112  */
114 
115  /*
116  * Check if we can do it the ARMv5TE-J way
117  */
119  {
120  /* Test, clean, flush D-Cache */
121  __asm__ __volatile__ ("1: mrc p15, 0, pc, c7, c14, 3; bne 1b");
122  }
123  else
124  {
125  /* We need to do it it by set/way. For now always call ARMv7 function */
126  //extern VOID v7_flush_dcache_all(VOID);
127  //v7_flush_dcache_all();
128  }
129 }
BOOLEAN HalpTestCleanSupported
Definition: processor.c:20
BOOLEAN HalpProcessorIdentified
Definition: processor.c:19
__asm__("\t.globl GetPhys\n" "GetPhys:\t\n" "mflr 0\n\t" "stwu 0,-16(1)\n\t" "mfmsr 5\n\t" "andi. 6,5,0xffef\n\t" "mtmsr 6\n\t" "isync\n\t" "sync\n\t" "lwz 3,0(3)\n\t" "mtmsr 5\n\t" "isync\n\t" "sync\n\t" "lwz 0,0(1)\n\t" "addi 1,1,16\n\t" "mtlr 0\n\t" "blr")
VOID HalpIdentifyProcessor(VOID)
Definition: processor.c:25

Referenced by KiInitializeKernel(), and KiInitializeSystem().

◆ HalSweepIcache()

VOID HalSweepIcache ( VOID  )

Definition at line 135 of file processor.c.

136 {
137  /* All ARM cores support the same Icache flush command */
139 }
FORCEINLINE VOID KeArmFlushIcache(VOID)
Definition: intrin_i.h:205

Referenced by KiInitializeSystem().

Variable Documentation

◆ HalpActiveProcessors

LONG HalpActiveProcessors

Definition at line 17 of file processor.c.

Referenced by HalInitializeProcessor(), and HalpBuildPartialFromIdt().

◆ HalpDefaultInterruptAffinity

KAFFINITY HalpDefaultInterruptAffinity

Definition at line 18 of file processor.c.

Referenced by HalInitializeProcessor(), and HalpGetRootInterruptVector().

◆ HalpProcessorIdentified

BOOLEAN HalpProcessorIdentified

Definition at line 19 of file processor.c.

Referenced by HalpIdentifyProcessor(), and HalSweepDcache().

◆ HalpTestCleanSupported

BOOLEAN HalpTestCleanSupported

Definition at line 20 of file processor.c.

Referenced by HalpIdentifyProcessor(), and HalSweepDcache().