ReactOS 0.4.15-dev-6057-gd708c79
pic.c File Reference
#include <hal.h>
#include <debug.h>
Include dependency graph for pic.c:

Go to the source code of this file.

Macros

#define NDEBUG
 

Functions

VOID NTAPI HalpEndSoftwareInterrupt (IN KIRQL OldIrql, IN PKTRAP_FRAME TrapFrame)
 
 HalpDelayedHardwareInterrupt (0)
 
 HalpDelayedHardwareInterrupt (1)
 
 HalpDelayedHardwareInterrupt (2)
 
 HalpDelayedHardwareInterrupt (3)
 
 HalpDelayedHardwareInterrupt (4)
 
 HalpDelayedHardwareInterrupt (5)
 
 HalpDelayedHardwareInterrupt (6)
 
 HalpDelayedHardwareInterrupt (7)
 
 HalpDelayedHardwareInterrupt (8)
 
 HalpDelayedHardwareInterrupt (9)
 
 HalpDelayedHardwareInterrupt (10)
 
 HalpDelayedHardwareInterrupt (11)
 
 HalpDelayedHardwareInterrupt (12)
 
 HalpDelayedHardwareInterrupt (13)
 
 HalpDelayedHardwareInterrupt (14)
 
 HalpDelayedHardwareInterrupt (15)
 
VOID NTAPI HalpInitializePICs (IN BOOLEAN EnableInterrupts)
 
UCHAR FASTCALL HalpIrqToVector (UCHAR Irq)
 
UCHAR FASTCALL HalpVectorToIrq (UCHAR Vector)
 
KIRQL FASTCALL HalpVectorToIrql (UCHAR Vector)
 
KIRQL NTAPI KeGetCurrentIrql (VOID)
 
KIRQL NTAPI KeRaiseIrqlToDpcLevel (VOID)
 
KIRQL NTAPI KeRaiseIrqlToSynchLevel (VOID)
 
KIRQL FASTCALL KfRaiseIrql (IN KIRQL NewIrql)
 
VOID FASTCALL KfLowerIrql (IN KIRQL OldIrql)
 
VOID FASTCALL HalRequestSoftwareInterrupt (IN KIRQL Irql)
 
VOID FASTCALL HalClearSoftwareInterrupt (IN KIRQL Irql)
 
PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY FASTCALL HalpEndSoftwareInterrupt2 (IN KIRQL OldIrql, IN PKTRAP_FRAME TrapFrame)
 
FORCEINLINE BOOLEAN _HalpDismissIrqGeneric (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrqGeneric (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq15 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq13 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq07 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
FORCEINLINE BOOLEAN _HalpDismissIrqLevel (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrqLevel (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq15Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq13Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq07Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
PHAL_SW_INTERRUPT_HANDLER __cdecl HalpHardwareInterruptLevel2 (VOID)
 
BOOLEAN NTAPI HalEnableSystemInterrupt (IN ULONG Vector, IN KIRQL Irql, IN KINTERRUPT_MODE InterruptMode)
 
VOID NTAPI HalDisableSystemInterrupt (IN ULONG Vector, IN KIRQL Irql)
 
BOOLEAN NTAPI HalBeginSystemInterrupt (IN KIRQL Irql, IN ULONG Vector, OUT PKIRQL OldIrql)
 
PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY FASTCALL HalEndSystemInterrupt2 (IN KIRQL OldIrql, IN PKTRAP_FRAME TrapFrame)
 
FORCEINLINE DECLSPEC_NORETURN VOID _HalpApcInterruptHandler (IN PKTRAP_FRAME TrapFrame)
 
DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry (IN PKTRAP_FRAME TrapFrame)
 
DECLSPEC_NORETURN VOID FASTCALL HalpApcInterruptHandler (IN PKTRAP_FRAME TrapFrame)
 
FORCEINLINE KIRQL _HalpDispatchInterruptHandler (VOID)
 
DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry (IN PKTRAP_FRAME TrapFrame)
 
PHAL_SW_INTERRUPT_HANDLER __cdecl HalpDispatchInterrupt2 (VOID)
 
ULONG NTAPI HalpGetRootInterruptVector (IN ULONG BusInterruptLevel, IN ULONG BusInterruptVector, OUT PKIRQL Irql, OUT PKAFFINITY Affinity)
 

Variables

PHAL_DISMISS_INTERRUPT HalpSpecialDismissTable [16]
 
PHAL_DISMISS_INTERRUPT HalpSpecialDismissLevelTable [16]
 
ULONG KiI8259MaskTable [32]
 
ULONG FindHigherIrqlMask [32]
 
KIRQL SWInterruptLookUpTable [8]
 
PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable [20]
 
PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY SWInterruptHandlerTable2 [3]
 
LONG HalpEisaELCR
 

Macro Definition Documentation

◆ NDEBUG

#define NDEBUG

Definition at line 12 of file pic.c.

Function Documentation

◆ _HalpApcInterruptHandler()

FORCEINLINE DECLSPEC_NORETURN VOID _HalpApcInterruptHandler ( IN PKTRAP_FRAME  TrapFrame)

Definition at line 1104 of file pic.c.

1105{
1106 KIRQL CurrentIrql;
1107 PKPCR Pcr = KeGetPcr();
1108
1109 /* Save the current IRQL and update it */
1110 CurrentIrql = Pcr->Irql;
1111 Pcr->Irql = APC_LEVEL;
1112
1113 /* Remove DPC from IRR */
1114 Pcr->IRR &= ~(1 << APC_LEVEL);
1115
1116 /* Enable interrupts and call the kernel's APC interrupt handler */
1117 _enable();
1118 KiDeliverApc(((KiUserTrap(TrapFrame)) || (TrapFrame->EFlags & EFLAGS_V86_MASK)) ?
1120 NULL,
1121 TrapFrame);
1122
1123 /* Disable interrupts and end the interrupt */
1124 _disable();
1125 HalpEndSoftwareInterrupt(CurrentIrql, TrapFrame);
1126
1127 /* Exit the interrupt */
1128 KiEoiHelper(TrapFrame);
1129}
#define NULL
Definition: types.h:112
UCHAR KIRQL
Definition: env_spec_w32.h:591
#define APC_LEVEL
Definition: env_spec_w32.h:695
VOID NTAPI HalpEndSoftwareInterrupt(IN KIRQL OldIrql, IN PKTRAP_FRAME TrapFrame)
void __cdecl _disable(void)
Definition: intrin_arm.h:365
void __cdecl _enable(void)
Definition: intrin_arm.h:373
#define KernelMode
Definition: asm.h:34
#define UserMode
Definition: asm.h:35
#define EFLAGS_V86_MASK
Definition: ketypes.h:132
FORCEINLINE BOOLEAN KiUserTrap(IN PKTRAP_FRAME TrapFrame)
Definition: ke.h:364
DECLSPEC_NORETURN VOID FASTCALL KiEoiHelper(IN PKTRAP_FRAME TrapFrame)
Definition: traphdlr.c:126
VOID NTAPI KiDeliverApc(IN KPROCESSOR_MODE DeliveryMode, IN PKEXCEPTION_FRAME ExceptionFrame, IN PKTRAP_FRAME TrapFrame)
Definition: apc.c:302
#define KeGetPcr()
Definition: ke.h:26
Definition: ke.h:290
ULONG IRR
Definition: ke.h:22
KIRQL Irql
Definition: ke.h:307

Referenced by HalpApcInterrupt2ndEntry(), and HalpApcInterruptHandler().

◆ _HalpDismissIrqGeneric()

FORCEINLINE BOOLEAN _HalpDismissIrqGeneric ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 553 of file pic.c.

556{
558 KIRQL CurrentIrql;
559 I8259_OCW2 Ocw2;
560 PKPCR Pcr = KeGetPcr();
561
562 /* First save current IRQL and compare it to the requested one */
563 CurrentIrql = Pcr->Irql;
564
565 /* Check if this interrupt is really allowed to happen */
566 if (Irql > CurrentIrql)
567 {
568 /* Set the new IRQL and return the current one */
569 Pcr->Irql = Irql;
570 *OldIrql = CurrentIrql;
571
572 /* Prepare OCW2 for EOI */
573 Ocw2.Bits = 0;
574 Ocw2.EoiMode = SpecificEoi;
575
576 /* Check which PIC needs the EOI */
577 if (Irq >= 8)
578 {
579#if defined(SARCH_PC98)
580 I8259_OCW3 Ocw3;
582
583 /* Send the EOI for the IRQ */
584 __outbyte(PIC2_CONTROL_PORT, Ocw2.Bits | ((Irq - 8) & 0xFF));
585
586 /* Request the ISR */
587 Ocw3.Bits = 0;
588 Ocw3.Sbo = 1;
589 Ocw3.ReadRequest = ReadIsr;
591
592 /* Read the ISR */
594
595 /* Check if the interrupt serviced was the only one from the slave PIC */
596 if (Isr.Bits == 0)
597 {
598 /* If ISR is empty, send the EOI for cascade IRQ on the master PIC */
600 }
601#else
602 /* Send the EOI for the IRQ */
603 __outbyte(PIC2_CONTROL_PORT, Ocw2.Bits | ((Irq - 8) & 0xFF));
604
605 /* Send the EOI for cascade IRQ on the master PIC */
607#endif
608 }
609 else
610 {
611 /* Send the EOI for the IRQ */
612 __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | (Irq & 0xFF));
613 }
614
615 /* Enable interrupts and return success */
616 _enable();
617 return TRUE;
618 }
619
620 /* Update the IRR so that we deliver this interrupt when the IRQL is proper */
621 Pcr->IRR |= (1 << (Irq + 4));
622
623 /* Set new PIC mask to real IRQL level, since the optimization is lost now */
624 Mask.Both = (KiI8259MaskTable[CurrentIrql] | Pcr->IDR) & 0xFFFF;
627
628 /* Now lie and say this was spurious */
629 return FALSE;
630}
_Out_ PKIRQL Irql
Definition: csq.h:179
#define TRUE
Definition: types.h:120
#define FALSE
Definition: types.h:117
static BOOLEAN NTAPI Isr(PKINTERRUPT Interrupt, PVOID ServiceContext)
Definition: floppy.c:581
unsigned int Mask
Definition: fpcontrol.c:82
ULONG KiI8259MaskTable[32]
Definition: irql.c:15
#define PIC1_DATA_PORT
Definition: halhw.h:151
#define PIC2_DATA_PORT
Definition: halhw.h:153
#define PIC_CASCADE_IRQ
Definition: halhw.h:156
#define PIC2_CONTROL_PORT
Definition: halhw.h:152
@ SpecificEoi
Definition: halhw.h:213
#define PIC1_CONTROL_PORT
Definition: halhw.h:150
@ ReadIsr
Definition: halhw.h:205
PPC_QUAL unsigned char __inbyte(const unsigned long Port)
Definition: intrin_ppc.h:539
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
ULONG IDR
Definition: ke.h:23
UCHAR EoiMode
Definition: halhw.h:290
UCHAR Bits
Definition: halhw.h:292
UCHAR Sbo
Definition: halhw.h:301
UCHAR ReadRequest
Definition: halhw.h:299
UCHAR Bits
Definition: halhw.h:306
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:792

Referenced by HalpDismissIrq07(), HalpDismissIrq13(), HalpDismissIrq15(), and HalpDismissIrqGeneric().

◆ _HalpDismissIrqLevel()

FORCEINLINE BOOLEAN _HalpDismissIrqLevel ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 735 of file pic.c.

738{
740 KIRQL CurrentIrql;
741 I8259_OCW2 Ocw2;
742 PKPCR Pcr = KeGetPcr();
743
744 /* Update the PIC */
745 Mask.Both = (KiI8259MaskTable[Irql] | Pcr->IDR) & 0xFFFF;
748
749 /* Update the IRR so that we clear this interrupt when the IRQL is proper */
750 Pcr->IRR |= (1 << (Irq + 4));
751
752 /* Save current IRQL */
753 CurrentIrql = Pcr->Irql;
754
755 /* Prepare OCW2 for EOI */
756 Ocw2.Bits = 0;
757 Ocw2.EoiMode = SpecificEoi;
758
759 /* Check which PIC needs the EOI */
760 if (Irq >= 8)
761 {
762#if defined(SARCH_PC98)
763 I8259_OCW3 Ocw3;
765
766 /* Send the EOI for the IRQ */
767 __outbyte(PIC2_CONTROL_PORT, Ocw2.Bits | ((Irq - 8) & 0xFF));
768
769 /* Request the ISR */
770 Ocw3.Bits = 0;
771 Ocw3.Sbo = 1;
772 Ocw3.ReadRequest = ReadIsr;
774
775 /* Read the ISR */
777
778 /* Check if the interrupt serviced was the only one from the slave PIC */
779 if (Isr.Bits == 0)
780 {
781 /* If ISR is empty, send the EOI for cascade IRQ on the master PIC */
783 }
784#else
785 /* Send the EOI for the IRQ */
786 __outbyte(PIC2_CONTROL_PORT, Ocw2.Bits | ((Irq - 8) & 0xFF));
787
788 /* Send the EOI for cascade IRQ on the master PIC */
790#endif
791 }
792 else
793 {
794 /* Send the EOI for the IRQ */
795 __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | (Irq & 0xFF));
796 }
797
798 /* Check if this interrupt should be allowed to happen */
799 if (Irql > CurrentIrql)
800 {
801 /* Set the new IRQL and return the current one */
802 Pcr->Irql = Irql;
803 *OldIrql = CurrentIrql;
804
805 /* Enable interrupts and return success */
806 _enable();
807 return TRUE;
808 }
809
810 /* Now lie and say this was spurious */
811 return FALSE;
812}

Referenced by HalpDismissIrq07Level(), HalpDismissIrq13Level(), HalpDismissIrq15Level(), and HalpDismissIrqLevel().

◆ _HalpDispatchInterruptHandler()

FORCEINLINE KIRQL _HalpDispatchInterruptHandler ( VOID  )

Definition at line 1159 of file pic.c.

1160{
1161 KIRQL CurrentIrql;
1162 PKPCR Pcr = KeGetPcr();
1163
1164 /* Save the current IRQL and update it */
1165 CurrentIrql = Pcr->Irql;
1166 Pcr->Irql = DISPATCH_LEVEL;
1167
1168 /* Remove DPC from IRR */
1169 Pcr->IRR &= ~(1 << DISPATCH_LEVEL);
1170
1171 /* Enable interrupts and call the kernel's DPC interrupt handler */
1172 _enable();
1174 _disable();
1175
1176 /* Return IRQL */
1177 return CurrentIrql;
1178}
VOID NTAPI KiDispatchInterrupt(VOID)
Definition: thrdini.c:295
#define DISPATCH_LEVEL
Definition: env_spec_w32.h:696

Referenced by HalpDispatchInterrupt2(), and HalpDispatchInterrupt2ndEntry().

◆ HalBeginSystemInterrupt()

BOOLEAN NTAPI HalBeginSystemInterrupt ( IN KIRQL  Irql,
IN ULONG  Vector,
OUT PKIRQL  OldIrql 
)

Definition at line 1025 of file pic.c.

1028{
1029 ULONG Irq;
1030
1031 /* Get the IRQ and call the proper routine to handle it */
1033 return HalpSpecialDismissTable[Irq](Irql, Irq, OldIrql);
1034}
PHAL_DISMISS_INTERRUPT HalpSpecialDismissTable[16]
Definition: pic.c:55
#define PRIMARY_VECTOR_BASE
Definition: halp.h:16
uint32_t ULONG
Definition: typedefs.h:59

◆ HalClearSoftwareInterrupt()

VOID FASTCALL HalClearSoftwareInterrupt ( IN KIRQL  Irql)

Definition at line 489 of file pic.c.

490{
491 /* Mask out the requested bit */
492 KeGetPcr()->IRR &= ~(1 << Irql);
493}

◆ HalDisableSystemInterrupt()

VOID NTAPI HalDisableSystemInterrupt ( IN ULONG  Vector,
IN KIRQL  Irql 
)

Definition at line 990 of file pic.c.

992{
993 ULONG IrqMask;
994 PIC_MASK PicMask;
995
996 /* Compute new combined IRQ mask */
997 IrqMask = 1 << (Vector - PRIMARY_VECTOR_BASE);
998
999 /* Disable interrupts */
1000 _disable();
1001
1002 /* Update software IDR */
1003 KeGetPcr()->IDR |= IrqMask;
1004
1005 /* Read current interrupt mask */
1006 PicMask.Master = __inbyte(PIC1_DATA_PORT);
1007 PicMask.Slave = __inbyte(PIC2_DATA_PORT);
1008
1009 /* Add the new disabled interrupt */
1010 PicMask.Both |= IrqMask;
1011
1012 /* Write new interrupt mask */
1014 __outbyte(PIC2_DATA_PORT, PicMask.Slave);
1015
1016 /* Bring interrupts back */
1017 _enable();
1018}
UCHAR Slave
Definition: halhw.h:371
USHORT Both
Definition: halhw.h:373
UCHAR Master
Definition: halhw.h:370

◆ HalEnableSystemInterrupt()

BOOLEAN NTAPI HalEnableSystemInterrupt ( IN ULONG  Vector,
IN KIRQL  Irql,
IN KINTERRUPT_MODE  InterruptMode 
)

Definition at line 947 of file pic.c.

950{
951 ULONG Irq;
952 PKPCR Pcr = KeGetPcr();
953 PIC_MASK PicMask;
954
955 /* Validate the IRQ */
957 if (Irq >= CLOCK2_LEVEL) return FALSE;
958
959 /* Check for level interrupt */
961 {
962 /* Switch handler to level */
964
965 /* Switch dismiss to level */
967 }
968
969 /* Disable interrupts */
970 _disable();
971
972 /* Update software IDR */
973 Pcr->IDR &= ~(1 << Irq);
974
975 /* Set new PIC mask */
976 PicMask.Both = (KiI8259MaskTable[Pcr->Irql] | Pcr->IDR) & 0xFFFF;
979
980 /* Enable interrupts and exit */
981 _enable();
982 return TRUE;
983}
#define CLOCK2_LEVEL
Definition: env_spec_w32.h:700
PHAL_DISMISS_INTERRUPT HalpSpecialDismissLevelTable[16]
Definition: pic.c:87
PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable[20]
Definition: pic.c:182
VOID __cdecl HalpHardwareInterruptLevel(VOID)
@ LevelSensitive
Definition: miniport.h:80
_In_ PKSERVICE_ROUTINE _In_opt_ PVOID _In_opt_ PKSPIN_LOCK _In_ ULONG _In_ KIRQL _In_ KIRQL _In_ KINTERRUPT_MODE InterruptMode
Definition: iofuncs.h:806

◆ HalEndSystemInterrupt2()

PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY FASTCALL HalEndSystemInterrupt2 ( IN KIRQL  OldIrql,
IN PKTRAP_FRAME  TrapFrame 
)

Definition at line 1041 of file pic.c.

1043{
1044 ULONG PendingIrql, PendingIrqlMask, PendingIrqMask;
1045 PKPCR Pcr = KeGetPcr();
1046 PIC_MASK Mask;
1047
1048 /* Set old IRQL */
1049 Pcr->Irql = OldIrql;
1050
1051 /* Check for pending software interrupts and compare with current IRQL */
1052 PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[OldIrql];
1053 if (PendingIrqlMask)
1054 {
1055 /* Check for in-service delayed interrupt */
1056 if (Pcr->IrrActive & 0xFFFFFFF0) return NULL;
1057
1058 /* Loop checking for pending interrupts */
1059 while (TRUE)
1060 {
1061 /* Check if pending IRQL affects hardware state */
1062 BitScanReverse(&PendingIrql, PendingIrqlMask);
1063 if (PendingIrql > DISPATCH_LEVEL)
1064 {
1065 /* Set new PIC mask */
1066 Mask.Both = Pcr->IDR & 0xFFFF;
1067 __outbyte(PIC1_DATA_PORT, Mask.Master);
1069
1070 /* Now check if this specific interrupt is already in-service */
1071 PendingIrqMask = (1 << PendingIrql);
1072 if (Pcr->IrrActive & PendingIrqMask) return NULL;
1073
1074 /* Set active bit otherwise, and clear it from IRR */
1075 Pcr->IrrActive |= PendingIrqMask;
1076 Pcr->IRR ^= PendingIrqMask;
1077
1078 /* Handle delayed hardware interrupt */
1079 SWInterruptHandlerTable[PendingIrql]();
1080
1081 /* Handling complete */
1082 Pcr->IrrActive ^= PendingIrqMask;
1083
1084 /* Check if there's still interrupts pending */
1085 PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[Pcr->Irql];
1086 if (!PendingIrqlMask) break;
1087 }
1088 else
1089 {
1090 /* Now handle pending software interrupt */
1091 return SWInterruptHandlerTable2[PendingIrql];
1092 }
1093 }
1094 }
1095
1096 return NULL;
1097}
ULONG FindHigherIrqlMask[32]
Definition: irql.c:70
PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY SWInterruptHandlerTable2[3]
Definition: pic.c:207
#define BitScanReverse
Definition: interlocked.h:6
ULONG IrrActive
Definition: ke.h:50

◆ HalpApcInterrupt2ndEntry()

DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry ( IN PKTRAP_FRAME  TrapFrame)

Definition at line 1134 of file pic.c.

1135{
1136 /* Do the work */
1137 _HalpApcInterruptHandler(TrapFrame);
1138}
FORCEINLINE DECLSPEC_NORETURN VOID _HalpApcInterruptHandler(IN PKTRAP_FRAME TrapFrame)
Definition: pic.c:1104

◆ HalpApcInterruptHandler()

DECLSPEC_NORETURN VOID FASTCALL HalpApcInterruptHandler ( IN PKTRAP_FRAME  TrapFrame)

Definition at line 1143 of file pic.c.

1144{
1145 /* Set up a fake INT Stack */
1146 TrapFrame->EFlags = __readeflags();
1147 TrapFrame->SegCs = KGDT_R0_CODE;
1148 TrapFrame->Eip = TrapFrame->Eax;
1149
1150 /* Build the trap frame */
1151 KiEnterInterruptTrap(TrapFrame);
1152
1153 /* Do the work */
1154 _HalpApcInterruptHandler(TrapFrame);
1155}
__INTRIN_INLINE uintptr_t __readeflags(void)
Definition: intrin_x86.h:1674
#define KGDT_R0_CODE
Definition: ketypes.h:75
FORCEINLINE VOID KiEnterInterruptTrap(IN PKTRAP_FRAME TrapFrame)
Definition: trap_x.h:368

◆ HalpDelayedHardwareInterrupt() [1/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [2/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [3/16]

HalpDelayedHardwareInterrupt ( 10  )

◆ HalpDelayedHardwareInterrupt() [4/16]

HalpDelayedHardwareInterrupt ( 11  )

◆ HalpDelayedHardwareInterrupt() [5/16]

HalpDelayedHardwareInterrupt ( 12  )

◆ HalpDelayedHardwareInterrupt() [6/16]

HalpDelayedHardwareInterrupt ( 13  )

◆ HalpDelayedHardwareInterrupt() [7/16]

HalpDelayedHardwareInterrupt ( 14  )

◆ HalpDelayedHardwareInterrupt() [8/16]

HalpDelayedHardwareInterrupt ( 15  )

◆ HalpDelayedHardwareInterrupt() [9/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [10/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [11/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [12/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [13/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [14/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [15/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [16/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDismissIrq07()

BOOLEAN NTAPI HalpDismissIrq07 ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 708 of file pic.c.

711{
712 I8259_OCW3 Ocw3;
714
715 /* Request the ISR */
716 Ocw3.Bits = 0;
717 Ocw3.Sbo = 1;
718 Ocw3.ReadRequest = ReadIsr;
720
721 /* Read the ISR */
723
724 /* Is IRQ 7 really active? If it isn't, this is spurious so fail */
725 if (Isr.Irq7 == FALSE) return FALSE;
726
727 /* Do normal interrupt dismiss */
728 return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
729}
FORCEINLINE BOOLEAN _HalpDismissIrqGeneric(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:553

◆ HalpDismissIrq07Level()

BOOLEAN NTAPI HalpDismissIrq07Level ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 890 of file pic.c.

893{
894 I8259_OCW3 Ocw3;
896
897 /* Request the ISR */
898 Ocw3.Bits = 0;
899 Ocw3.Sbo = 1;
900 Ocw3.ReadRequest = ReadIsr;
902
903 /* Read the ISR */
905
906 /* Is IRQ 7 really active? If it isn't, this is spurious so fail */
907 if (Isr.Irq7 == FALSE) return FALSE;
908
909 /* Do normal interrupt dismiss */
910 return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
911}
FORCEINLINE BOOLEAN _HalpDismissIrqLevel(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:735

◆ HalpDismissIrq13()

BOOLEAN NTAPI HalpDismissIrq13 ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 679 of file pic.c.

682{
683 /* Clear the FPU busy latch */
684 __outbyte(0xF0, 0);
685
686 /* Do normal interrupt dismiss */
687 return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
688}

◆ HalpDismissIrq13Level()

BOOLEAN NTAPI HalpDismissIrq13Level ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 861 of file pic.c.

864{
865 /* Clear the FPU busy latch */
866 __outbyte(0xF0, 0);
867
868 /* Do normal interrupt dismiss */
869 return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
870}

◆ HalpDismissIrq15()

BOOLEAN NTAPI HalpDismissIrq15 ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 644 of file pic.c.

647{
648 I8259_OCW3 Ocw3;
649 I8259_OCW2 Ocw2;
651
652 /* Request the ISR */
653 Ocw3.Bits = 0;
654 Ocw3.Sbo = 1; /* This encodes an OCW3 vs. an OCW2 */
655 Ocw3.ReadRequest = ReadIsr;
657
658 /* Read the ISR */
660
661 /* Is IRQ15 really active (this is IR7) */
662 if (Isr.Irq7 == FALSE)
663 {
664 /* It isn't, so we have to EOI cascade IRQ */
665 Ocw2.Bits = 0;
666 Ocw2.EoiMode = SpecificEoi;
668
669 /* And now fail since this was spurious */
670 return FALSE;
671 }
672
673 /* Do normal interrupt dismiss */
674 return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
675}

◆ HalpDismissIrq15Level()

BOOLEAN NTAPI HalpDismissIrq15Level ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 826 of file pic.c.

829{
830 I8259_OCW3 Ocw3;
831 I8259_OCW2 Ocw2;
833
834 /* Request the ISR */
835 Ocw3.Bits = 0;
836 Ocw3.Sbo = 1; /* This encodes an OCW3 vs. an OCW2 */
837 Ocw3.ReadRequest = ReadIsr;
839
840 /* Read the ISR */
842
843 /* Is IRQ15 really active (this is IR7) */
844 if (Isr.Irq7 == FALSE)
845 {
846 /* It isn't, so we have to EOI cascade IRQ */
847 Ocw2.Bits = 0;
848 Ocw2.EoiMode = SpecificEoi;
850
851 /* And now fail since this was spurious */
852 return FALSE;
853 }
854
855 /* Do normal interrupt dismiss */
856 return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
857}

◆ HalpDismissIrqGeneric()

BOOLEAN NTAPI HalpDismissIrqGeneric ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 634 of file pic.c.

637{
638 /* Run the inline code */
639 return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
640}

◆ HalpDismissIrqLevel()

BOOLEAN NTAPI HalpDismissIrqLevel ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 816 of file pic.c.

819{
820 /* Run the inline code */
821 return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
822}

◆ HalpDispatchInterrupt2()

PHAL_SW_INTERRUPT_HANDLER __cdecl HalpDispatchInterrupt2 ( VOID  )

Definition at line 1199 of file pic.c.

1200{
1201 ULONG PendingIrqlMask, PendingIrql;
1202 KIRQL OldIrql;
1203 PIC_MASK Mask;
1204 PKPCR Pcr = KeGetPcr();
1205
1206 /* Do the work */
1208
1209 /* Restore IRQL */
1210 Pcr->Irql = OldIrql;
1211
1212 /* Check for pending software interrupts and compare with current IRQL */
1213 PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[OldIrql];
1214 if (PendingIrqlMask)
1215 {
1216 /* Check if pending IRQL affects hardware state */
1217 BitScanReverse(&PendingIrql, PendingIrqlMask);
1218 if (PendingIrql > DISPATCH_LEVEL)
1219 {
1220 /* Set new PIC mask */
1221 Mask.Both = Pcr->IDR & 0xFFFF;
1222 __outbyte(PIC1_DATA_PORT, Mask.Master);
1224
1225 /* Clear IRR bit */
1226 Pcr->IRR ^= (1 << PendingIrql);
1227 }
1228
1229 /* Now handle pending interrupt */
1230 return SWInterruptHandlerTable[PendingIrql];
1231 }
1232
1233 return NULL;
1234}
FORCEINLINE KIRQL _HalpDispatchInterruptHandler(VOID)
Definition: pic.c:1159

◆ HalpDispatchInterrupt2ndEntry()

DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry ( IN PKTRAP_FRAME  TrapFrame)

Definition at line 1183 of file pic.c.

1184{
1185 KIRQL CurrentIrql;
1186
1187 /* Do the work */
1188 CurrentIrql = _HalpDispatchInterruptHandler();
1189
1190 /* End the interrupt */
1191 HalpEndSoftwareInterrupt(CurrentIrql, TrapFrame);
1192
1193 /* Exit the interrupt */
1194 KiEoiHelper(TrapFrame);
1195}

◆ HalpEndSoftwareInterrupt()

VOID NTAPI HalpEndSoftwareInterrupt ( IN KIRQL  OldIrql,
IN PKTRAP_FRAME  TrapFrame 
)

◆ HalpEndSoftwareInterrupt2()

PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY FASTCALL HalpEndSoftwareInterrupt2 ( IN KIRQL  OldIrql,
IN PKTRAP_FRAME  TrapFrame 
)

Definition at line 497 of file pic.c.

499{
500 ULONG PendingIrql, PendingIrqlMask, PendingIrqMask;
501 PKPCR Pcr = KeGetPcr();
503
504 UNREFERENCED_PARAMETER(TrapFrame);
505
506 /* Set old IRQL */
507 Pcr->Irql = OldIrql;
508
509 /* Loop checking for pending interrupts */
510 while (TRUE)
511 {
512 /* Check for pending software interrupts and compare with current IRQL */
513 PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[OldIrql];
514 if (!PendingIrqlMask) return NULL;
515
516 /* Check for in-service delayed interrupt */
517 if (Pcr->IrrActive & 0xFFFFFFF0) return NULL;
518
519 /* Check if pending IRQL affects hardware state */
520 BitScanReverse(&PendingIrql, PendingIrqlMask);
521 if (PendingIrql > DISPATCH_LEVEL)
522 {
523 /* Set new PIC mask */
524 Mask.Both = Pcr->IDR & 0xFFFF;
527
528 /* Set active bit otherwise, and clear it from IRR */
529 PendingIrqMask = (1 << PendingIrql);
530 Pcr->IrrActive |= PendingIrqMask;
531 Pcr->IRR ^= PendingIrqMask;
532
533 /* Handle delayed hardware interrupt */
534 SWInterruptHandlerTable[PendingIrql]();
535
536 /* Handling complete */
537 Pcr->IrrActive ^= PendingIrqMask;
538 }
539 else
540 {
541 /* No need to loop checking for hardware interrupts */
542 return SWInterruptHandlerTable2[PendingIrql];
543 }
544 }
545
546 return NULL;
547}
#define UNREFERENCED_PARAMETER(P)
Definition: ntbasedef.h:317

◆ HalpGetRootInterruptVector()

ULONG NTAPI HalpGetRootInterruptVector ( IN ULONG  BusInterruptLevel,
IN ULONG  BusInterruptVector,
OUT PKIRQL  Irql,
OUT PKAFFINITY  Affinity 
)

Definition at line 1238 of file pic.c.

1242{
1243 UCHAR SystemVector;
1244
1245 /* Validate the IRQ */
1246 if (BusInterruptLevel > 23)
1247 {
1248 /* Invalid vector */
1249 DPRINT1("IRQ %lx is too high!\n", BusInterruptLevel);
1250 return 0;
1251 }
1252
1253 /* Get the system vector */
1254 SystemVector = HalpIrqToVector((UCHAR)BusInterruptLevel);
1255
1256 /* Return the IRQL and affinity */
1257 *Irql = HalpVectorToIrql(SystemVector);
1260
1261 /* Return the vector */
1262 return SystemVector;
1263}
#define DPRINT1
Definition: precomp.h:8
KAFFINITY HalpDefaultInterruptAffinity
Definition: processor.c:18
UCHAR FASTCALL HalpIrqToVector(UCHAR Irq)
Definition: pic.c:285
KIRQL FASTCALL HalpVectorToIrql(UCHAR Vector)
Definition: pic.c:299
#define ASSERT(a)
Definition: mode.c:44
_In_ ULONG _In_ ULONG BusInterruptLevel
Definition: halfuncs.h:171
_In_ ULONG _In_ ULONG _In_ ULONG _Out_ PKIRQL _Out_ PKAFFINITY Affinity
Definition: halfuncs.h:174
unsigned char UCHAR
Definition: xmlstorage.h:181

◆ HalpHardwareInterruptLevel2()

PHAL_SW_INTERRUPT_HANDLER __cdecl HalpHardwareInterruptLevel2 ( VOID  )

Definition at line 915 of file pic.c.

916{
917 PKPCR Pcr = KeGetPcr();
918 ULONG PendingIrqlMask, PendingIrql;
919
920 /* Check for pending software interrupts and compare with current IRQL */
921 PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[Pcr->Irql];
922 if (PendingIrqlMask)
923 {
924 /* Check for in-service delayed interrupt */
925 if (Pcr->IrrActive & 0xFFFFFFF0) return NULL;
926
927 /* Check if pending IRQL affects hardware state */
928 BitScanReverse(&PendingIrql, PendingIrqlMask);
929
930 /* Clear IRR bit */
931 Pcr->IRR ^= (1 << PendingIrql);
932
933 /* Now handle pending interrupt */
934 return SWInterruptHandlerTable[PendingIrql];
935 }
936
937 return NULL;
938}

◆ HalpInitializePICs()

VOID NTAPI HalpInitializePICs ( IN BOOLEAN  EnableInterrupts)

Definition at line 220 of file pic.c.

221{
222 ULONG EFlags;
223 EISA_ELCR Elcr;
224 ULONG i, j;
225 BOOLEAN ElcrFound;
226
227 /* Save EFlags and disable interrupts */
228 EFlags = __readeflags();
229 _disable();
230
231 /* Initialize and mask the PIC */
233
234 /* Read EISA Edge/Level Register for master and slave */
236
237#if defined(SARCH_PC98)
238 /* Force defaults when ELCR is not supported */
239 if (Elcr.Bits == 0xFFFF)
240 {
241 Elcr.Master.Irq0Level = 0;
242 Elcr.Master.Irq1Level = 0;
243 Elcr.Master.Irq7Level = 0;
244 Elcr.Slave.Irq8Level = 0;
245 }
246 ElcrFound = TRUE;
247#else
248 /* IRQs 0, 1, 2, 8, and 13 are system-reserved and must be edge */
249 ElcrFound = (!(Elcr.Master.Irq0Level) && !(Elcr.Master.Irq1Level) && !(Elcr.Master.Irq2Level) &&
250 !(Elcr.Slave.Irq8Level) && !(Elcr.Slave.Irq13Level));
251#endif
252
253 if (ElcrFound)
254 {
255 /* ELCR is as it's supposed to be, save it */
256 HalpEisaELCR = Elcr.Bits;
257
258 /* Scan for level interrupts */
259 for (i = 1, j = 0; j < 16; i <<= 1, j++)
260 {
261 if (HalpEisaELCR & i)
262 {
263 /* Switch handler to level */
265
266 /* Switch dismiss to level */
268 }
269 }
270 }
271
272 /* Report cascade IRQ usage */
276 HIGH_LEVEL);
277
278 /* Restore interrupt state */
280 __writeeflags(EFlags);
281}
unsigned char BOOLEAN
static NTSTATUS EnableInterrupts(IN PPORT_DEVICE_EXTENSION DeviceExtension, IN UCHAR FlagsToDisable, IN UCHAR FlagsToEnable)
Definition: pnp.c:380
#define HIGH_LEVEL
Definition: env_spec_w32.h:703
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint GLint GLint j
Definition: glfuncs.h:250
VOID NTAPI HalpRegisterVector(IN UCHAR Flags, IN ULONG BusVector, IN ULONG SystemVector, IN KIRQL Irql)
Definition: usage.c:34
VOID NTAPI HalpInitializeLegacyPICs(VOID)
Definition: pic.c:18
LONG HalpEisaELCR
Definition: pic.c:214
#define IDT_INTERNAL
Definition: halp.h:21
#define EISA_ELCR_SLAVE
Definition: halhw.h:334
#define EISA_ELCR_MASTER
Definition: halhw.h:333
__INTRIN_INLINE void __writeeflags(uintptr_t Value)
Definition: intrin_x86.h:1669
#define EFLAGS_INTERRUPT_MASK
Definition: ketypes.h:126
struct _EISA_ELCR::@1499::@1502 Slave
USHORT Bits
Definition: halhw.h:363
struct _EISA_ELCR::@1499::@1501 Master

◆ HalpIrqToVector()

UCHAR FASTCALL HalpIrqToVector ( UCHAR  Irq)

Definition at line 285 of file pic.c.

286{
287 return (PRIMARY_VECTOR_BASE + Irq);
288}

Referenced by HalpGetRootInterruptVector().

◆ HalpVectorToIrq()

UCHAR FASTCALL HalpVectorToIrq ( UCHAR  Vector)

Definition at line 292 of file pic.c.

293{
294 return (Vector - PRIMARY_VECTOR_BASE);
295}

◆ HalpVectorToIrql()

KIRQL FASTCALL HalpVectorToIrql ( UCHAR  Vector)

Definition at line 299 of file pic.c.

300{
302}
#define PROFILE_LEVEL
Definition: env_spec_w32.h:698

Referenced by HalpGetRootInterruptVector().

◆ HalRequestSoftwareInterrupt()

VOID FASTCALL HalRequestSoftwareInterrupt ( IN KIRQL  Irql)

Definition at line 463 of file pic.c.

464{
465 ULONG EFlags;
466 PKPCR Pcr = KeGetPcr();
467 KIRQL PendingIrql;
468
469 /* Save EFlags and disable interrupts */
470 EFlags = __readeflags();
471 _disable();
472
473 /* Mask out the requested bit */
474 Pcr->IRR |= (1 << Irql);
475
476 /* Check for pending software interrupts and compare with current IRQL */
477 PendingIrql = SWInterruptLookUpTable[Pcr->IRR & 3];
478 if (PendingIrql > Pcr->Irql) SWInterruptHandlerTable[PendingIrql]();
479
480 /* Restore interrupt state */
481 __writeeflags(EFlags);
482}
KIRQL SWInterruptLookUpTable[8]
Definition: pic.c:122

◆ KeGetCurrentIrql()

KIRQL NTAPI KeGetCurrentIrql ( VOID  )

Definition at line 311 of file pic.c.

312{
313 /* Return the IRQL */
314 return KeGetPcr()->Irql;
315}

◆ KeRaiseIrqlToDpcLevel()

KIRQL NTAPI KeRaiseIrqlToDpcLevel ( VOID  )

Definition at line 322 of file pic.c.

323{
324 PKPCR Pcr = KeGetPcr();
325 KIRQL CurrentIrql;
326
327 /* Save and update IRQL */
328 CurrentIrql = Pcr->Irql;
329 Pcr->Irql = DISPATCH_LEVEL;
330
331#if DBG
332 /* Validate correct raise */
333 if (CurrentIrql > DISPATCH_LEVEL) KeBugCheck(IRQL_NOT_GREATER_OR_EQUAL);
334#endif
335
336 /* Return the previous value */
337 return CurrentIrql;
338}
DECLSPEC_NORETURN VOID NTAPI KeBugCheck(ULONG BugCheckCode)
Definition: bug.c:1431

◆ KeRaiseIrqlToSynchLevel()

KIRQL NTAPI KeRaiseIrqlToSynchLevel ( VOID  )

Definition at line 345 of file pic.c.

346{
347 PKPCR Pcr = KeGetPcr();
348 KIRQL CurrentIrql;
349
350 /* Save and update IRQL */
351 CurrentIrql = Pcr->Irql;
352 Pcr->Irql = SYNCH_LEVEL;
353
354#if DBG
355 /* Validate correct raise */
356 if (CurrentIrql > SYNCH_LEVEL)
357 {
358 /* Crash system */
359 KeBugCheckEx(IRQL_NOT_GREATER_OR_EQUAL,
360 CurrentIrql,
362 0,
363 1);
364 }
365#endif
366
367 /* Return the previous value */
368 return CurrentIrql;
369}
#define SYNCH_LEVEL
Definition: env_spec_w32.h:704
VOID NTAPI KeBugCheckEx(_In_ ULONG BugCheckCode, _In_ ULONG_PTR BugCheckParameter1, _In_ ULONG_PTR BugCheckParameter2, _In_ ULONG_PTR BugCheckParameter3, _In_ ULONG_PTR BugCheckParameter4)
Definition: rtlcompat.c:108

◆ KfLowerIrql()

VOID FASTCALL KfLowerIrql ( IN KIRQL  OldIrql)

Definition at line 407 of file pic.c.

408{
409 ULONG EFlags;
410 ULONG PendingIrql, PendingIrqlMask;
411 PKPCR Pcr = KeGetPcr();
413
414#if DBG
415 /* Validate correct lower */
416 if (OldIrql > Pcr->Irql)
417 {
418 /* Crash system */
419 Pcr->Irql = HIGH_LEVEL;
420 KeBugCheck(IRQL_NOT_LESS_OR_EQUAL);
421 }
422#endif
423
424 /* Save EFlags and disable interrupts */
425 EFlags = __readeflags();
426 _disable();
427
428 /* Set old IRQL */
429 Pcr->Irql = OldIrql;
430
431 /* Check for pending software interrupts and compare with current IRQL */
432 PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[OldIrql];
433 if (PendingIrqlMask)
434 {
435 /* Check if pending IRQL affects hardware state */
436 BitScanReverse(&PendingIrql, PendingIrqlMask);
437 if (PendingIrql > DISPATCH_LEVEL)
438 {
439 /* Set new PIC mask */
440 Mask.Both = Pcr->IDR & 0xFFFF;
443
444 /* Clear IRR bit */
445 Pcr->IRR ^= (1 << PendingIrql);
446 }
447
448 /* Now handle pending interrupt */
449 SWInterruptHandlerTable[PendingIrql]();
450 }
451
452 /* Restore interrupt state */
453 __writeeflags(EFlags);
454}

◆ KfRaiseIrql()

KIRQL FASTCALL KfRaiseIrql ( IN KIRQL  NewIrql)

Definition at line 376 of file pic.c.

377{
378 PKPCR Pcr = KeGetPcr();
379 KIRQL CurrentIrql;
380
381 /* Read current IRQL */
382 CurrentIrql = Pcr->Irql;
383
384#if DBG
385 /* Validate correct raise */
386 if (CurrentIrql > NewIrql)
387 {
388 /* Crash system */
389 Pcr->Irql = PASSIVE_LEVEL;
390 KeBugCheck(IRQL_NOT_GREATER_OR_EQUAL);
391 }
392#endif
393
394 /* Set new IRQL */
395 Pcr->Irql = NewIrql;
396
397 /* Return old IRQL */
398 return CurrentIrql;
399}
#define PASSIVE_LEVEL
Definition: env_spec_w32.h:693
_Requires_lock_held_ SpinLock _Releases_lock_ SpinLock _In_ _IRQL_restores_ KIRQL NewIrql
Definition: ke.h:114

Variable Documentation

◆ FindHigherIrqlMask

ULONG FindHigherIrqlMask[32]
extern

◆ HalpEisaELCR

LONG HalpEisaELCR

Definition at line 214 of file pic.c.

Referenced by HalpInitializePICs().

◆ HalpSpecialDismissLevelTable

PHAL_DISMISS_INTERRUPT HalpSpecialDismissLevelTable[16]
Initial value:
=
{
}
BOOLEAN NTAPI HalpDismissIrq13Level(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:861
BOOLEAN NTAPI HalpDismissIrqLevel(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:816
BOOLEAN NTAPI HalpDismissIrq15Level(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:826
BOOLEAN NTAPI HalpDismissIrq07Level(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:890

Definition at line 87 of file pic.c.

Referenced by HalEnableSystemInterrupt(), and HalpInitializePICs().

◆ HalpSpecialDismissTable

PHAL_DISMISS_INTERRUPT HalpSpecialDismissTable[16]
Initial value:
=
{
}
BOOLEAN NTAPI HalpDismissIrq13(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:679
BOOLEAN NTAPI HalpDismissIrq07(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:708
BOOLEAN NTAPI HalpDismissIrq15(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:644
BOOLEAN NTAPI HalpDismissIrqGeneric(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:634

Definition at line 55 of file pic.c.

Referenced by HalBeginSystemInterrupt(), HalEnableSystemInterrupt(), and HalpInitializePICs().

◆ KiI8259MaskTable

ULONG KiI8259MaskTable[32]
extern

Definition at line 15 of file irql.c.

Referenced by _HalpDismissIrqGeneric(), _HalpDismissIrqLevel(), and HalEnableSystemInterrupt().

◆ SWInterruptHandlerTable

PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable[20]
Initial value:
=
{
HalpHardwareInterrupt0,
HalpHardwareInterrupt1,
HalpHardwareInterrupt2,
HalpHardwareInterrupt3,
HalpHardwareInterrupt4,
HalpHardwareInterrupt5,
HalpHardwareInterrupt6,
HalpHardwareInterrupt7,
HalpHardwareInterrupt8,
HalpHardwareInterrupt9,
HalpHardwareInterrupt10,
HalpHardwareInterrupt11,
HalpHardwareInterrupt12,
HalpHardwareInterrupt13,
HalpHardwareInterrupt14,
HalpHardwareInterrupt15
}
VOID __cdecl HalpDispatchInterrupt(VOID)
VOID(__cdecl * PHAL_SW_INTERRUPT_HANDLER)(VOID)
Definition: halp.h:32
VOID __cdecl HalpApcInterrupt(VOID)
VOID KiUnexpectedInterrupt(VOID)
Definition: interrupt.c:51

Definition at line 182 of file pic.c.

Referenced by HalEnableSystemInterrupt(), HalEndSystemInterrupt2(), HalpDispatchInterrupt2(), HalpEndSoftwareInterrupt2(), HalpHardwareInterruptLevel2(), HalpInitializePICs(), HalRequestSoftwareInterrupt(), and KfLowerIrql().

◆ SWInterruptHandlerTable2

PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY SWInterruptHandlerTable2[3]
Initial value:
=
{
}
DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry(IN PKTRAP_FRAME TrapFrame)
Definition: pic.c:1183
DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry(IN PKTRAP_FRAME TrapFrame)
Definition: pic.c:1134
VOID(FASTCALL * PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY)(IN PKTRAP_FRAME TrapFrame)
Definition: halp.h:38

Definition at line 207 of file pic.c.

Referenced by HalEndSystemInterrupt2(), and HalpEndSoftwareInterrupt2().

◆ SWInterruptLookUpTable

KIRQL SWInterruptLookUpTable[8]