#include "stdafx.h"
Include dependency graph for id_ata.cpp:
Go to the source code of this file.
Macros | |
| #define | RESET_COMPLETE_CURRENT 0x00 |
| #define | RESET_COMPLETE_ALL 0x01 |
| #define | RESET_COMPLETE_NONE 0x02 |
| #define | RETTYPE_XXableInterrupts VOID |
| #define | RETVAL_XXableInterrupts |
| #define | ITEMS_TO_QUERY 2 |
| #define | AtapiWritePortN_template(_type, _Type, sz) |
| #define | AtapiWritePortExN_template(_type, _Type, sz) |
| #define | AtapiReadPortN_template(_type, _Type, sz) |
| #define | AtapiReadPortExN_template(_type, _Type, sz) |
| #define | AtapiReadPortBufferN_template(_type, _Type, sz) |
| #define | AtapiWritePortBufferN_template(_type, _Type, sz) |
| #define | SetCheckPoint(cp) |
| #define | ITEMS_TO_QUERY 2 |
| #define | DEBUG_MSG_BUFFER_SIZE 512 |
Variables | |
| static const CHAR | ver_string [] = "\n\nATAPI IDE MiniPort Driver (UniATA) v 0." UNIATA_VER_STR "\n" |
| static const CHAR | uniata_comm_name [] = UNIATA_COMM_PORT_VENDOR_STR " \n" |
| UNICODE_STRING | SavedRegPath |
| WCHAR | SavedRegPathBuffer [256] |
| ULONG | SkipRaids = 1 |
| ULONG | ForceSimplex = 0 |
| LONGLONG | g_Perf = 0 |
| ULONG | g_PerfDt = 0 |
| ULONG | g_WaitBusyInISR = 1 |
| ULONG | g_opt_WaitBusyResetCount = 10000 |
| ULONG | g_opt_WaitBusyCount = 200 |
| ULONG | g_opt_WaitBusyDelay = 10 |
| ULONG | g_opt_WaitDrqDelay = 10 |
| ULONG | g_opt_WaitBusyLongCount = 2000 |
| ULONG | g_opt_WaitBusyLongDelay = 250 |
| ULONG | g_opt_MaxIsrWait = 40 |
| ULONG | g_opt_DriveSelectNanoDelay = 0 |
| BOOLEAN | g_opt_AtapiSendDisableIntr = 0 |
| BOOLEAN | g_opt_AtapiDmaRawRead = 1 |
| BOOLEAN | g_opt_AtapiNoDma = FALSE |
| BOOLEAN | g_opt_BochsDmaReadWorkaround = FALSE |
| BOOLEAN | hasPCI = FALSE |
| ULONG | g_opt_VirtualMachine = 0 |
| BOOLEAN | InDriverEntry = TRUE |
| BOOLEAN | g_Dump = FALSE |
| BOOLEAN | g_opt_Verbose = 0 |
| BOOLEAN | WinVer_WDM_Model = FALSE |
| ULONG | CPU_num = 1 |
| UCHAR | g_foo = 0 |
Macro Definition Documentation
◆ AtapiReadPortBufferN_template
| #define AtapiReadPortBufferN_template | ( | _type, | |
| _Type, | |||
| sz | |||
| ) |
Definition at line 404 of file id_ata.cpp.
◆ AtapiReadPortExN_template
| #define AtapiReadPortExN_template | ( | _type, | |
| _Type, | |||
| sz | |||
| ) |
Value:
_type \
DDKFASTAPI \
AtapiReadPortEx##sz( \
IN PHW_CHANNEL chan, \
IN ULONGIO_PTR _port, \
) \
{ \
if(_port >= IDX_MAX_REG) { \
} else \
if(chan) { \
res = &chan->RegTranslation[_port]; \
} else { \
KdPrint(("invalid io read request @ ch %x, res* %x, offs %x\n", chan, _port, offs)); \
return (_type)(-1); \
} \
if(res->Proc) { \
KdPrint(("PROC io read request @ ch %x, res* %x, offs %x\n", chan, _port, offs)); \
ASSERT(FALSE); /* We should never get here */ \
} \
if(!res->MemIo) { \
} else { \
/*KdPrint(("r_mem @ (%x) %x\n", _port, port));*/ \
} \
}
struct _IORES * PIORES
Definition: bsmaster.h:1019
Definition: bsmaster.h:1004
Definition at line 369 of file id_ata.cpp.
◆ AtapiReadPortN_template
| #define AtapiReadPortN_template | ( | _type, | |
| _Type, | |||
| sz | |||
| ) |
Value:
_type \
DDKFASTAPI \
AtapiReadPort##sz( \
IN PHW_CHANNEL chan, \
IN ULONGIO_PTR _port \
) \
{ \
if(_port >= IDX_MAX_REG) { \
} else \
if(chan) { \
res = &chan->RegTranslation[_port]; \
} else { \
KdPrint(("invalid io read request @ ch %x, res* %x\n", chan, _port)); \
return (_type)(-1); \
} \
if(res->Proc) { \
KdPrint(("PROC io read request @ ch %x, res* %x\n", chan, _port)); \
ASSERT(FALSE); /* We should never get here */ \
} \
if(!res->MemIo) { \
/*KdPrint(("r_io @ (%x) %x\n", _port, res->Addr));*/ \
} else { \
/*KdPrint(("r_mem @ (%x) %x\n", _port, res->Addr));*/ \
} \
}
Definition at line 334 of file id_ata.cpp.
◆ AtapiWritePortBufferN_template
| #define AtapiWritePortBufferN_template | ( | _type, | |
| _Type, | |||
| sz | |||
| ) |
Definition at line 449 of file id_ata.cpp.
◆ AtapiWritePortExN_template
| #define AtapiWritePortExN_template | ( | _type, | |
| _Type, | |||
| sz | |||
| ) |
Definition at line 297 of file id_ata.cpp.
◆ AtapiWritePortN_template
| #define AtapiWritePortN_template | ( | _type, | |
| _Type, | |||
| sz | |||
| ) |
Value:
VOID \
DDKFASTAPI \
AtapiWritePort##sz( \
IN PHW_CHANNEL chan, \
IN ULONGIO_PTR _port, \
) \
{ \
if(_port >= IDX_MAX_REG) { \
} else \
if(chan) { \
res = &chan->RegTranslation[_port]; \
} else { \
KdPrint(("invalid io write request @ ch %x, res* %x\n", chan, _port)); \
return; \
} \
if(res->Proc) { \
KdPrint(("PROC io write request @ ch %x, res* %x\n", chan, _port)); \
ASSERT(FALSE); /* We should never get here */ \
} \
if(!res->MemIo) { \
} else { \
/*KdPrint(("r_mem @ (%x) %x\n", _port, port));*/ \
} \
return; \
}
Definition at line 261 of file id_ata.cpp.
◆ DEBUG_MSG_BUFFER_SIZE
| #define DEBUG_MSG_BUFFER_SIZE 512 |
Definition at line 11693 of file id_ata.cpp.
◆ ITEMS_TO_QUERY [1/2]
| #define ITEMS_TO_QUERY 2 |
◆ ITEMS_TO_QUERY [2/2]
| #define ITEMS_TO_QUERY 2 |
◆ RESET_COMPLETE_ALL
| #define RESET_COMPLETE_ALL 0x01 |
Definition at line 144 of file id_ata.cpp.
◆ RESET_COMPLETE_CURRENT
| #define RESET_COMPLETE_CURRENT 0x00 |
Definition at line 143 of file id_ata.cpp.
◆ RESET_COMPLETE_NONE
| #define RESET_COMPLETE_NONE 0x02 |
Definition at line 145 of file id_ata.cpp.
◆ RETTYPE_XXableInterrupts
Definition at line 159 of file id_ata.cpp.
◆ RETVAL_XXableInterrupts
| #define RETVAL_XXableInterrupts |
Definition at line 160 of file id_ata.cpp.
◆ SetCheckPoint
Definition at line 8228 of file id_ata.cpp.
Function Documentation
◆ _PrintNtConsole()
Definition at line 11698 of file id_ata.cpp.
11702{
11703 //int len;
11705// UNICODE_STRING msgBuff;
11708
11709 /*len =*/ _vsnprintf((PCHAR)&dbg_print_tmp_buff[0], DEBUG_MSG_BUFFER_SIZE-1, DebugMessage, ap);
11710
11711 dbg_print_tmp_buff[DEBUG_MSG_BUFFER_SIZE-1] = 0;
11712
11713 //DbgPrint(((PCHAR)&(dbg_print_tmp_buff[0]))); // already done in KdPrint macro
11714 HalDisplayString(dbg_print_tmp_buff);
11715
11716#ifdef _DEBUG
11719 }
11720#endif // _DEBUG
11721
11723
11724} // end PrintNtConsole()
NTHALAPI VOID NTAPI HalDisplayString(PUCHAR String)
ULONG g_LogToDisplay
Referenced by DriverEntry().
◆ AtaCommand()
| UCHAR NTAPI AtaCommand | ( | IN PHW_DEVICE_EXTENSION | deviceExtension, |
| IN ULONG | DeviceNumber, | ||
| IN ULONG | lChannel, | ||
| IN UCHAR | command, | ||
| IN USHORT | cylinder, | ||
| IN UCHAR | head, | ||
| IN UCHAR | sector, | ||
| IN UCHAR | count, | ||
| IN UCHAR | feature, | ||
| IN ULONG | wait_flags | ||
| ) |
Definition at line 1168 of file id_ata.cpp.
1180{
1183 command,
1186 } else {
1189 NULL,
1190 0,
1191 command,
1193 count,
1194 feature,
1195 0 /* ahci flags */ ,
1196 wait_flags,
1197 1000 /* timeout 1 sec */
1198 );
1199
1200 }
1201} // end AtaCommand()
UCHAR NTAPI AtaCommand48(IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG DeviceNumber, IN ULONG lChannel, IN UCHAR command, IN ULONGLONG lba, IN USHORT count, IN USHORT feature, IN ULONG wait_flags)
Definition: id_ata.cpp:968
UCHAR NTAPI UniataAhciSendPIOCommand(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber, IN PSCSI_REQUEST_BLOCK Srb, IN PUCHAR data, IN ULONG length, IN UCHAR command, IN ULONGLONG lba, IN USHORT bcount, IN USHORT feature, IN USHORT ahci_flags, IN ULONG wait_flags, IN ULONG timeout)
Definition: id_sata.cpp:1538
Definition: srb.h:248
Definition: tnmain.cpp:425
Referenced by AtapiHwInitialize__(), AtapiStartIo__(), IdeMediaStatus(), IdeSendCommand(), IdeSendSmartCommand(), IssueIdentify(), MapError(), and SetDriveParameters().
◆ AtaCommand48()
| UCHAR NTAPI AtaCommand48 | ( | IN PHW_DEVICE_EXTENSION | deviceExtension, |
| IN ULONG | DeviceNumber, | ||
| IN ULONG | lChannel, | ||
| IN UCHAR | command, | ||
| IN ULONGLONG | lba, | ||
| IN USHORT | count, | ||
| IN USHORT | feature, | ||
| IN ULONG | wait_flags | ||
| ) |
Definition at line 968 of file id_ata.cpp.
978{
979 PHW_CHANNEL chan = &(deviceExtension->chan[lChannel]);
980 UCHAR statusByte;
982 PUCHAR plba;
983
984 KdPrint2((PRINT_PREFIX "AtaCommand48: cntrlr %#x:%#x dev %#x, cmd %#x, lba %#I64x count %#x feature %#x\n",
985 deviceExtension->DevIndex, deviceExtension->Channel, DeviceNumber, command, lba, count, feature ));
986
988 //PIDE_AHCI_CMD AHCI_CMD = &(chan->AhciCtlBlock->cmd);
989
991
994 NULL,
995 0,
996 command,
998 feature,
999 0 /* ahci flags */ ,
1000 wait_flags,
1001 1000 /* timeout 1 sec */
1002 );
1003
1004 return statusByte;
1005 }
1006
1008
1009 statusByte = WaitOnBusy(chan);
1010
1011 /* ready to issue command ? */
1014 return statusByte;
1015 }
1016 // !!! We should not check ERROR condition here
1017 // ERROR bit may be asserted durring previous operation
1018 // and not cleared after SELECT
1019
1020 //>>>>>> NV: 2006/08/03
1021 if(((AtaCommandFlags[command] & (ATA_CMD_FLAG_LBAIOsupp|ATA_CMD_FLAG_FUA)) == ATA_CMD_FLAG_LBAIOsupp) &&
1025 //return SRB_STATUS_ERROR;
1026 }
1027 //<<<<<< NV: 2006/08/03
1028
1029 /* only use 48bit addressing if needed because of the overhead */
1032
1034 /* translate command into 48bit version */
1037 } else {
1040 }
1041
1044
1055
1056 //KdPrint2((PRINT_PREFIX "AtaCommand48: dev %#x USE_LBA48 (2)\n", DeviceNumber ));
1057 AtapiWritePort1(chan, IDX_IO1_o_DriveSelect, IDE_USE_LBA | (DeviceNumber ? IDE_DRIVE_2 : IDE_DRIVE_1) );
1058 } else {
1059
1061 chan->ChannelCtrlFlags &= ~CTRFLAGS_LBA48;
1062
1063 //if(feature ||
1064 // (chan->lun[DeviceNumber]->DeviceFlags & (DFLAGS_ATAPI_DEVICE | DFLAGS_TAPE_DEVICE | DFLAGS_LBA_ENABLED))) {
1066 //}
1072 //KdPrint2((PRINT_PREFIX "AtaCommand28: dev %#x USE_LBA\n", DeviceNumber ));
1073 AtapiWritePort1(chan, IDX_IO1_o_DriveSelect, (UCHAR)(plba[3] & 0xf) | IDE_USE_LBA | (DeviceNumber ? IDE_DRIVE_SELECT_2 : IDE_DRIVE_SELECT_1) );
1074 } else {
1075 //KdPrint2((PRINT_PREFIX "AtaCommand28: dev %#x USE_CHS\n", DeviceNumber ));
1076 AtapiWritePort1(chan, IDX_IO1_o_DriveSelect, (UCHAR)(plba[3] & 0xf) | (DeviceNumber ? IDE_DRIVE_SELECT_2 : IDE_DRIVE_SELECT_1) );
1077 }
1078 }
1079
1080 // write command code to device
1082
1083 switch (wait_flags) {
1085
1086 // caller requested wait for interrupt
1088 WaitOnBusy(chan);
1089 statusByte = WaitForDrq(chan);
1091 break;
1092 AtapiStallExecution(500);
1094 }
1095
1096 return statusByte;
1097
1099
1100 // caller requested wait for entering Wait state
1102
1103 GetStatus(chan, statusByte);
1104 statusByte = UniataIsIdle(deviceExtension, statusByte);
1106 // no drive ?
1107 break;
1108 } else
1110 break;
1111 } else
1113 AtapiStallExecution(100);
1114 continue;
1115 } else
1117 break;
1118 } else {
1119 //if(deviceExtension->HwFlags & UNIATA_SATA) {
1121 break;
1122 }
1123 AtapiStallExecution(100);
1124 }
1125 }
1126 //statusByte |= IDE_STATUS_BUSY;
1127 break;
1128
1130 statusByte = WaitOnBusyLong(chan);
1131 break;
1133 statusByte = WaitOnBaseBusyLong(chan);
1134 break;
1136 GetStatus(chan, statusByte);
1140 break;
1141 }
1143 statusByte &= ~IDE_STATUS_ERROR;
1144
1145 } else {
1146 //KdPrint2((PRINT_PREFIX " send Status %#x\n", statusByte));
1147 }
1149 // !!!!!
1151 CHECK_INTR_IDLE);
1152
1153 statusByte = IDE_STATUS_SUCCESS;
1154 break;
1155 }
1156
1157 //KdPrint2((PRINT_PREFIX " Status %#x\n", statusByte));
1158
1159 return statusByte;
1160} // end AtaCommand48()
bool NTAPI CheckIfBadBlock(IN PHW_LU_EXTENSION LunExt, IN ULONGLONG lba, IN ULONG count)
Definition: id_badblock.cpp:251
VOID DDKFASTAPI AtapiWritePort1(IN PHW_CHANNEL chan, IN ULONGIO_PTR port, IN UCHAR data)
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
UCHAR DDKFASTAPI SelectDrive(IN PHW_CHANNEL chan, IN ULONG DeviceNumber)
Definition: id_ata.cpp:621
UCHAR DDKFASTAPI UniataIsIdle(IN struct _HW_DEVICE_EXTENSION *deviceExtension, IN UCHAR Status)
Definition: id_ata.cpp:742
UCHAR DDKFASTAPI WaitOnBaseBusyLong(IN PHW_CHANNEL chan)
Definition: id_ata.cpp:718
VOID UniataExpectChannelInterrupt(IN struct _HW_CHANNEL *chan, IN BOOLEAN Expecting)
Definition: id_ata.cpp:4492
__inline BOOLEAN UniataIsSATARangeAvailable(IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG lChannel)
Definition: id_sata.h:91
#define lba
Referenced by AtaCommand(), IdeReadWrite(), IdeVerify(), and IssueIdentify().
◆ AtapiAdapterControl()
| SCSI_ADAPTER_CONTROL_STATUS NTAPI AtapiAdapterControl | ( | IN PVOID | HwDeviceExtension, |
| IN SCSI_ADAPTER_CONTROL_TYPE | ControlType, | ||
| IN PVOID | Parameters | ||
| ) |
Definition at line 11594 of file id_ata.cpp.
11599{
11601 PSCSI_SUPPORTED_CONTROL_TYPE_LIST pControlTypeList;
11605
11607
11608 switch(ControlType) {
11616 };
11617
11620
11622
11624 lim = pControlTypeList->MaxControlType;
11625 }
11626
11629 }
11630
11631 break;
11632
11633 }
11635
11637 // Shut down all interrupts on the adapter. They'll get re-enabled
11638 // by the initialization routines.
11642 }
11644 // we must never get here for non-PCI
11647 }
11648 break;
11649 }
11651
11653 // Enable all the interrupts on the adapter while port driver call
11654 // for power up an HBA that was shut down for power management
11655
11664 }
11666 // we must never get here for non-PCI
11668 }
11669 }
11670
11671 break;
11672 }
11673
11674 default: {
11677 }
11678 }
11679
11681} // end AtapiAdapterControl()
struct _HW_DEVICE_EXTENSION * PHW_DEVICE_EXTENSION
NTSTATUS NTAPI UniataConnectIntr2(IN PVOID HwDeviceExtension)
Definition: id_probe.cpp:2050
NTSTATUS NTAPI UniataDisconnectIntr2(IN PVOID HwDeviceExtension)
Definition: id_probe.cpp:2172
BOOLEAN NTAPI AtapiChipInit(IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG c)
Definition: id_init.cpp:1886
struct _SCSI_SUPPORTED_CONTROL_TYPE_LIST * PSCSI_SUPPORTED_CONTROL_TYPE_LIST
BOOLEAN NTAPI AtapiResetController(IN PVOID HwDeviceExtension, IN ULONG PathId)
Definition: id_ata.cpp:2411
VOID NTAPI AtapiEnableInterrupts(IN PVOID HwDeviceExtension, IN ULONG c)
Definition: id_ata.cpp:4397
VOID NTAPI AtapiHwInitialize__(IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG lChannel)
Definition: id_ata.cpp:3378
VOID NTAPI AtapiDisableInterrupts(IN PVOID HwDeviceExtension, IN ULONG c)
Definition: id_ata.cpp:4457
Definition: atapi.c:22
INTERFACE_TYPE AdapterInterfaceType
Definition: bsmaster.h:1316
Definition: srb.h:206
OUT BOOLEAN SupportedTypeList[0]
Definition: srb.h:221
_Must_inspect_result_ _In_ WDFQUEUE _In_opt_ WDFREQUEST _In_opt_ WDFFILEOBJECT _Inout_opt_ PWDF_REQUEST_PARAMETERS Parameters
Definition: wdfio.h:869
Referenced by DriverEntry().
◆ AtapiCallBack__()
Definition at line 3872 of file id_ata.cpp.
3876{
3877
3881
3883 UCHAR statusByte;
3884
3886 // If the last command was DSC restrictive, see if it's set. If so, the device is
3887 // ready for a new request. Otherwise, reset the timer and come back to here later.
3888
3889 // If ISR decided to wait for BUSY or DRQ in DPC, we shall also get here.
3890 // In this case chan->ExpectingInterrupt == TRUE, but interrupts are disabled, thus,
3891 // we shall have no problem with interrupt handler.
3898 }
3899 goto ReturnCallback;
3900 }
3901
3902#ifdef _DEBUG
3905 }
3906#endif
3908 goto ReturnEnableIntr;
3909 }
3910 GetStatus(chan, statusByte);
3912
3916
3918 AtapiDmaDBSync(chan, srb);
3919 UniataRemoveRequest(chan, srb);
3921 // Clear current SRB.
3923 srb = UniataGetCurRequest(chan);
3924 } else {
3925 srb = NULL;
3926 }
3928
3929 // Ask for next request.
3931 deviceExtension,
3932 PathId,
3933 TargetId,
3934 Lun);
3936
3937 if(srb) {
3939 }
3940
3941 } else {
3943 srb->Cdb[0]));
3944
3945 AtapiQueueTimerDpc(HwDeviceExtension, lChannel,
3946 AtapiCallBack_X,
3947 1000);
3948
3949 goto ReturnCallback;
3950 }
3951
3952ReturnEnableIntr:
3953
3956 //ASSERT(KeGetCurrentIrql() <= DISPATCH_LEVEL);
3957#ifdef UNIATA_USE_XXableInterrupts
3959 // must be called on DISPATCH_LEVEL
3961 AtapiEnableInterrupts__);
3962#else
3963 AtapiEnableInterrupts(HwDeviceExtension, lChannel);
3965 CHECK_INTR_IDLE);
3966 // Will raise IRQL to DIRQL
3967 AtapiQueueTimerDpc(HwDeviceExtension, lChannel,
3968 AtapiEnableInterrupts__,
3969 1);
3971#endif // UNIATA_USE_XXableInterrupts
3972 } else {
3973 //ASSERT(!deviceExtension->simplexOnly);
3974 }
3975
3976ReturnCallback:
3977
3978 // Check other channel
3979 // In simplex mode no interrupts must appear on other channels
3982
3984 continue;
3985 }
3986
3988
3992 {
3993 //ASSERT(!deviceExtension->simplexOnly);
3997 }
3998 }
3999 }
4001 return;
4002
4003} // end AtapiCallBack__()
VOID __cdecl ScsiPortNotification(IN SCSI_NOTIFICATION_TYPE NotificationType, IN PVOID HwDeviceExtension, IN ...)
Definition: scsiport.c:1345
BOOLEAN NTAPI AtapiDmaDBSync(PHW_CHANNEL chan, PSCSI_REQUEST_BLOCK Srb)
Definition: id_dma.cpp:532
_In_ ULONG _In_ BOOLEAN _In_ ULONG _In_ UCHAR _In_ UCHAR _In_ UCHAR Lun
Definition: classpnp.h:1315
_In_ ULONG _In_ BOOLEAN _In_ ULONG _In_ UCHAR _In_ UCHAR TargetId
Definition: classpnp.h:1314
RETTYPE_XXableInterrupts NTAPI AtapiEnableInterrupts__(IN PVOID HwDeviceExtension)
Definition: id_ata.cpp:4333
VOID NTAPI AtapiQueueTimerDpc(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN PHW_TIMER HwScsiTimer, IN ULONG MiniportTimerValue)
Definition: id_ata.cpp:1378
BOOLEAN NTAPI AtapiStartIo__(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb, IN BOOLEAN TopLevel)
Definition: id_ata.cpp:9288
BOOLEAN NTAPI AtapiInterrupt__(IN PVOID HwDeviceExtension, IN UCHAR c)
Definition: id_ata.cpp:4981
VOID NTAPI UniataRemoveRequest(IN PHW_CHANNEL chan, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_queue.cpp:265
PSCSI_REQUEST_BLOCK NTAPI UniataGetCurRequest(IN PHW_CHANNEL chan)
Definition: id_queue.cpp:358
Referenced by AtapiCallBack_X().
◆ AtapiCallBack_X()
Definition at line 4007 of file id_ata.cpp.
4010{
4011 AtapiCallBack__(HwDeviceExtension, (UCHAR)((PHW_DEVICE_EXTENSION)HwDeviceExtension)->ActiveDpcChan);
4012} // end AtapiCallBack_X()
VOID NTAPI AtapiCallBack__(IN PVOID HwDeviceExtension, IN UCHAR lChannel)
Definition: id_ata.cpp:3872
Referenced by AtapiCallBack__(), and AtapiInterrupt__().
◆ AtapiCheckInterrupt__()
- clear interrupt and get status */
Definition at line 4512 of file id_ata.cpp.
4516{
4519 PHW_LU_EXTENSION LunExt;
4520
4523
4525 ULONG pr_status = 0;
4526 UCHAR dma_status = 0;
4527 UCHAR reg8 = 0;
4528 ULONG reg32 = 0;
4529 UCHAR statusByte = 0;
4533 UCHAR Channel;
4534 UCHAR lChannel;
4538// ULONG k;
4539 UCHAR interruptReason;
4542
4544
4545 lChannel = c;
4548
4549 //KdPrint2((PRINT_PREFIX "AtapiCheckInterrupt__ chan %#x:\n", chan));
4550 //KdPrint2((PRINT_PREFIX "AtapiCheckInterrupt__ (%d/%d):\n", Channel, chan->cur_cdev));
4551
4553 UniataIsSATARangeAvailable(deviceExtension, lChannel)) {
4554
4556 return OurInterrupt;
4557 }
4558
4566 //deviceExtension->ExpectingInterrupt++; // will be updated in ISR on ReturnEnableInterrupts
4567 OurInterrupt = INTERRUPT_REASON_OUR;
4568 } else
4569 if((statusByte & (IDE_STATUS_BUSY | IDE_STATUS_DRDY)) == (IDE_STATUS_BUSY | IDE_STATUS_DRDY) ) {
4571 OurInterrupt = INTERRUPT_REASON_OUR;
4572 } else
4575 OurInterrupt = INTERRUPT_REASON_OUR;
4576 } else {
4578 OurInterrupt = INTERRUPT_REASON_OUR;
4579 }
4580 }
4581 return OurInterrupt;
4582 }
4583
4585 DmaTransfer = TRUE;
4586 KdPrint2((PRINT_PREFIX " cntrlr %#x:%#x, lch %#x DmaTransfer = TRUE\n", deviceExtension->DevIndex,
4588 } else {
4589 KdPrint2((PRINT_PREFIX " cntrlr %#x:%#x, lch %#x DmaTransfer = FALSE\n", deviceExtension->DevIndex,
4591 dma_status = GetDmaStatus(deviceExtension, lChannel);
4593 }
4594
4595 // do controller-specific interrupt servicing staff
4598 goto check_unknown;
4599 }
4600
4601 // Attention !
4602 // We can catch (BM_STATUS_ACTIVE + BM_STATUS_INTR) when operation is actually completed
4603 // Such behavior was observed with Intel ICH-xxx chips
4604 // This condition shall also be treated as 'our interrupt' because of BM_STATUS_INTR flag
4605
4606 switch(VendorID) {
4607
4609 switch(ChipType) {
4613 if (!DmaTransfer)
4614 break;
4616 ((Channel) ? 0x00004000 : 0x00000400))) {
4619 }
4620 break;
4624 if (!DmaTransfer)
4625 break;
4629 }
4630 break;
4635
4637 // our
4638 } else {
4641 }
4642
4644 break;
4645
4646 pr_status = AtapiReadPortEx4(chan, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressBM_0),stat_reg);
4647 AtapiWritePortEx4(chan, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressBM_0),stat_reg, (pr_status & (0x11 << Channel)));
4648 if(pr_status & (0x11 << Channel)) {
4649 // TODO: reset channel
4652 }
4654 // Connect event
4657 }
4659 OurInterrupt = INTERRUPT_REASON_UNEXPECTED;
4660 } else {
4662 }
4663
4665 break; }
4666 }
4667 break; }
4670 break;
4671
4673
4676
4677 /* get and clear interrupt status */
4680 AtapiWritePortEx4(chan, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0),offs, (0x0fUL << shift) | 0x00f000f0);
4681 } else {
4683 AtapiWritePortEx1(chan, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0),offs, (0x0f << shift));
4684 }
4686
4687 /* check for and handle connect events */
4690 }
4691 /* check for and handle disconnect events */
4693 !((pr_status & (0x04UL << shift) &&
4696 }
4697 /* do we have any device action ? */
4701 OurInterrupt = INTERRUPT_REASON_UNEXPECTED;
4702 } else {
4704 }
4705 }
4706
4707 break; }
4711 // fall to SiI
4712 } else {
4713 break;
4714 }
4716
4718
4721 if(reg32 == 0xffffffff) {
4724 }
4725 if(!(reg32 & (BM_DS0_SII_DMA_SATA_IRQ | BM_DS0_SII_DMA_COMPLETE | BM_DS0_SII_IRQ | BM_DS0_SII_DMA_ENABLE | BM_DS0_SII_DMA_ERROR))) {
4728 }
4729
4732
4733 /* SIEN doesn't mask SATA IRQs on some 3112s. Those
4734 * controllers continue to assert IRQ as long as
4735 * SError bits are pending. Clear SError immediately.
4736 */
4738 OurInterrupt = INTERRUPT_REASON_UNEXPECTED;
4739 }
4740 }
4741 }
4742
4743 if (!DmaTransfer)
4744 break;
4747 return OurInterrupt;
4748 }
4750 goto skip_dma_stat_check;
4751
4752 } else {
4754 break;
4755 GetPciConfig1(0x71, reg8);
4757 if (!(reg8 &
4758 (Channel ? 0x08 : 0x04))) {
4760 }
4761 if (!DmaTransfer) {
4763 OurInterrupt = INTERRUPT_REASON_UNEXPECTED;
4764 }
4765 SetPciConfig1(0x71, (Channel ? 0x08 : 0x04));
4766 }
4767 break;
4768
4770 if (!DmaTransfer)
4771 break;
4772 //dma_status = GetDmaStatus(deviceExtension, lChannel);
4776 }
4778 AtapiStallExecution(1);
4781 goto skip_dma_stat_check;
4785 // Do nothing here
4786 } else
4789 OurInterrupt = INTERRUPT_REASON_UNEXPECTED;
4790 }
4793 OurInterrupt = INTERRUPT_REASON_UNEXPECTED;
4794 }
4795 }
4796 }
4797 }
4798 break;
4799 default:
4802 // Do nothing here
4803 } else
4806 OurInterrupt = INTERRUPT_REASON_UNEXPECTED;
4807 }
4808 }
4809 }
4810 }
4811check_unknown:
4813 if (DmaTransfer) {
4818 OurInterrupt = INTERRUPT_REASON_UNEXPECTED;
4819 } else {
4821 GetStatus(chan, statusByte);
4822 StatusValid = 1;
4826 OurInterrupt = INTERRUPT_REASON_UNEXPECTED;
4827 } else
4830 (dma_status == BM_STATUS_ACTIVE)) {
4832 // some devices interrupts on each block transfer even in DMA mode
4836 //GetBaseStatus(chan, statusByte);
4837 //return INTERRUPT_REASON_IGNORE;
4838 SingleBlockIntr = TRUE;
4839 }
4840 } else {
4842 }
4843 }
4844 }
4845 } else {
4847 // bullshit, we have DMA interrupt, but had never initiate DMA operation
4850 // catch it !
4851 OurInterrupt = INTERRUPT_REASON_UNEXPECTED;
4852 }
4853 }
4854skip_dma_stat_check:
4856 AtapiStallExecution(1);
4857 }
4858
4859 /* if drive is busy it didn't interrupt */
4860 /* the exception is DCS + BSY state of ATAPI devices */
4861 if(!StatusValid) {
4863 GetStatus(chan, statusByte);
4864 }
4867 } else {
4869 }
4871 // interrupt from empty controller ?
4872 } else
4876 return OurInterrupt;
4877 }
4878
4881 } else {
4884 }
4889 }
4893 }
4894
4895 EarlyIntr = TRUE;
4896
4899 /* clear interrupt and get status */
4900 GetBaseStatus(chan, statusByte);
4903 }
4906 }
4907
4909 GetStatus(chan, statusByte);
4915 }
4919 }
4920 }
4921
4922 }
4923
4924 /* clear interrupt and get status */
4925 GetBaseStatus(chan, statusByte);
4928 // interrupt from empty controller ?
4929 } else
4932 return OurInterrupt;
4933 }
4934
4935#ifndef UNIATA_PIO_ONLY
4936 if(DmaTransfer) {
4939 } else {
4942
4943 //ASSERT(AtaReq);
4944
4945 if(SingleBlockIntr) {
4947 } else {
4949 }
4950 if(AtaReq) {
4951 AtaReq->ReqState = SingleBlockIntr ? REQ_STATE_ATAPI_EXPECTING_DATA_INTR2 : REQ_STATE_EARLY_INTR;
4952 }
4953 }
4954 }
4955#endif //
4956
4958
4960
4963 } else {
4965 return OurInterrupt;
4966 }
4969 return OurInterrupt;
4970 }
4971 //ASSERT(!chan->queue_depth || chan->cur_req);
4972
4975
4976} // end AtapiCheckInterrupt__()
UCHAR NTAPI AtapiDmaDone(IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG lChannel, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_dma.cpp:685
VOID DDKFASTAPI AtapiWritePortEx1(IN PHW_CHANNEL chan, IN ULONGIO_PTR port, IN ULONG offs, IN UCHAR data)
UCHAR DDKFASTAPI AtapiReadPort1(IN PHW_CHANNEL chan, IN ULONGIO_PTR port)
ULONG DDKFASTAPI AtapiReadPort4(IN PHW_CHANNEL chan, IN ULONGIO_PTR port)
#define REQ_STATE_ATAPI_EXPECTING_DATA_INTR2
Definition: bsmaster.h:953
VOID DDKFASTAPI AtapiWritePortEx4(IN PHW_CHANNEL chan, IN ULONGIO_PTR port, IN ULONG offs, IN ULONG data)
ULONG DDKFASTAPI AtapiReadPortEx4(IN PHW_CHANNEL chan, IN ULONGIO_PTR port, IN ULONG offs)
VOID DDKFASTAPI AtapiWritePort4(IN PHW_CHANNEL chan, IN ULONGIO_PTR port, IN ULONG data)
union _ATA_REQ * PATA_REQ
UCHAR DDKFASTAPI AtapiReadPortEx1(IN PHW_CHANNEL chan, IN ULONGIO_PTR port, IN ULONG offs)
ULONG NTAPI UniataAhciWaitReady(IN PHW_CHANNEL chan, IN ULONG timeout)
Definition: id_sata.cpp:1853
UCHAR NTAPI UniataAhciStatus(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber)
Definition: id_sata.cpp:1131
BOOLEAN NTAPI UniataSataClearErr(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN BOOLEAN do_connect, IN ULONG pm_port)
Definition: id_sata.cpp:186
UCHAR NTAPI UniataAhciWaitCommandReady(IN PHW_CHANNEL chan, IN ULONG timeout)
Definition: id_sata.cpp:1434
ULONG NTAPI UniataSataReadPort4(IN PHW_CHANNEL chan, IN ULONG io_port_ndx, IN ULONG pm_port)
Definition: id_sata.cpp:270
BOOLEAN NTAPI UniataSataEvent(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG Action, IN ULONG pm_port)
Definition: id_sata.cpp:233
__inline BOOLEAN UniataAhciChanImplemented(IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG c)
Definition: id_sata.h:415
struct _HW_DEVICE_EXTENSION * DeviceExtension
Definition: bsmaster.h:1087
Definition: atapi.c:163
Definition: bsmaster.h:870
Referenced by AtapiInterrupt(), AtapiInterrupt2(), and IdeSendCommand().
◆ AtapiDisableInterrupts()
Definition at line 4457 of file id_ata.cpp.
4461{
4463 PHW_CHANNEL chan;
4466 return;
4467 }
4470 // mark channel as busy
4474 } else {
4475 //SelectDrive(chan, 0);
4478 //if(chan->NumberLuns) {
4479 // SelectDrive(chan, 1);
4480 // AtapiWritePort1(chan, IDX_IO2_o_Control,
4481 // IDE_DC_DISABLE_INTERRUPTS /*| IDE_DC_A_4BIT*/ );
4482 // SelectDrive(chan, chan->cur_cdev);
4483 //}
4484 }
4486 }
4487
4488 return;
4489} // end AtapiDisableInterrupts()
__inline VOID UniataAhciWriteChannelPort4(IN PHW_CHANNEL chan, IN ULONG io_port_ndx, IN ULONG data)
Definition: id_sata.h:302
Referenced by AtapiAdapterControl(), AtapiHwInitialize__(), AtapiInterrupt(), AtapiInterrupt__(), AtapiResetController__(), AtapiSendCommand(), AtapiStartIo__(), AtaSetTransferMode(), FindDevices(), IdeSendCommand(), IssueIdentify(), and UniataUserDeviceReset().
◆ AtapiEnableInterrupts()
Definition at line 4397 of file id_ata.cpp.
4401{
4403 PHW_CHANNEL chan;
4404 //UCHAR statusByte;
4405
4408 return;
4409 }
4413 return;
4414 }
4415
4425 ATA_AHCI_P_IX_DI |
4428 );
4429 } else {
4430 //SelectDrive(chan, 0);
4431 //GetBaseStatus(chan, statusByte);
4433 0 | IDE_DC_A_4BIT );
4434 //if(chan->NumberLuns) {
4435 // SelectDrive(chan, 1);
4436 // GetBaseStatus(chan, statusByte);
4437 // AtapiWritePort1(chan, IDX_IO2_o_Control,
4438 // IDE_DC_A_4BIT );
4439 // SelectDrive(chan, chan->cur_cdev);
4440 //}
4441 }
4442 chan->ChannelCtrlFlags &= ~CTRFLAGS_INTR_DISABLED;
4443 } else {
4445 // keep interrupts disabled
4447 } else {
4450 }
4451 }
4452 return;
4453} // end AtapiEnableInterrupts()
Referenced by AtapiAdapterControl(), AtapiCallBack__(), AtapiEnableInterrupts__(), AtapiHwInitialize__(), AtapiInterrupt(), AtapiInterrupt__(), AtapiResetController__(), AtapiSendCommand(), AtapiStartIo__(), AtaSetTransferMode(), FindDevices(), IdeSendCommand(), IssueIdentify(), and UniataUserDeviceReset().
◆ AtapiEnableInterrupts__()
| RETTYPE_XXableInterrupts NTAPI AtapiEnableInterrupts__ | ( | IN PVOID | HwDeviceExtension | ) |
Definition at line 4333 of file id_ata.cpp.
4336{
4341
4345
4347 // enable intrs on requested channel
4348 chan->ChannelCtrlFlags &= ~CTRFLAGS_ENABLE_INTR_REQ;
4351 CHECK_INTR_IDLE);
4352
4353 // check if current or other channel(s) interrupted
4354 //AtapiInterrupt(HwDeviceExtension);
4355
4357 break;
4358 }
4359 } else {
4360 // check if other channel(s) interrupted
4361 // must do nothing in simplex mode
4365 continue;
4366 }
4367 //ASSERT(!deviceExtension->simplexOnly);
4371 }
4372 }
4373 }
4374 // In simplex mode next command must be sent to device here
4376 PSCSI_REQUEST_BLOCK srb;
4377 chan = UniataGetNextChannel(chan);
4378 if(chan) {
4379 srb = UniataGetCurRequest(chan);
4380 } else {
4381 srb = NULL;
4382 }
4383 if(srb) {
4385 }
4386 }
4387
4389
4390} // end AtapiEnableInterrupts__()
PHW_CHANNEL NTAPI UniataGetNextChannel(IN PHW_CHANNEL chan)
Definition: id_queue.cpp:376
Referenced by AtapiCallBack__(), and AtapiInterrupt__().
◆ AtapiHardReset()
| VOID DDKFASTAPI AtapiHardReset | ( | IN struct _HW_CHANNEL * | chan, |
| IN BOOLEAN | DisableInterrupts, | ||
| IN ULONG | Delay | ||
| ) |
Definition at line 948 of file id_ata.cpp.
953{
956 (DisableInterrupts ? IDE_DC_DISABLE_INTERRUPTS : 0));
957 chan->last_devsel = -1;
958 AtapiStallExecution(Delay);
960} // end AtapiHardReset()
Referenced by AtapiResetController__(), CheckDevice(), and FindDevices().
◆ AtapiHwInitialize()
Definition at line 3342 of file id_ata.cpp.
3345{
3349
3351
3354 }
3359 }
3360
3361 /* do extra chipset specific setups */
3363/*
3364 if(deviceExtension->Isr2DevObj && (deviceExtension->HwFlags & UNIATA_SATA)) {
3365 KdPrint2((PRINT_PREFIX " enable ISR2 to catch unexpected interrupts\n"));
3366 BMList[deviceExtension->DevIndex].Isr2Enable = TRUE;
3367 }
3368*/
3371 }
3374} // end AtapiHwInitialize()
BOOLEAN NTAPI AtapiResetController__(IN PVOID HwDeviceExtension, IN ULONG PathId, IN UCHAR CompleteType)
Definition: id_ata.cpp:2422
Referenced by DriverEntry().
◆ AtapiHwInitialize__()
Definition at line 3378 of file id_ata.cpp.
3382{
3384 UCHAR statusByte, errorByte;
3385 PHW_CHANNEL chan = &(deviceExtension->chan[lChannel]);
3386 PHW_LU_EXTENSION LunExt;
3387// ULONG tmp32;
3388 ULONG PreferedMode = 0xffffffff;
3389
3391 !UniataAhciChanImplemented(deviceExtension, lChannel)) {
3392 return;
3393 }
3394
3396 FindDevices(deviceExtension, 0, lChannel);
3397
3399
3401
3403 // skip empty slots
3405 continue;
3406 }
3407
3408 AtapiDisableInterrupts(deviceExtension, lChannel);
3409 AtapiStallExecution(1);
3410
3412
3414 // Enable media status notification
3416
3417 // If supported, setup Multi-block transfers.
3419 IDE_COMMAND_SET_MULTIPLE, 0, 0, 0,
3421
3422 // Check for errors. Reset the value to 0 (disable MultiBlock) if the
3423 // command was aborted.
3425
3426 // Read the error register.
3428
3429 KdPrint2((PRINT_PREFIX "AtapiHwInitialize: Error setting multiple mode. Status %#x, error byte %#x\n",
3430 statusByte,
3431 errorByte));
3432
3434 IDE_COMMAND_SET_MULTIPLE, 0, 0, 0,
3435 0, 0, ATA_WAIT_BASE_READY);
3436
3438 // Read the error register.
3440
3441 KdPrint2((PRINT_PREFIX "AtapiHwInitialize: Error disabling multiple mode. Status %#x, error byte %#x\n",
3442 statusByte,
3443 errorByte));
3444 }
3445 // Adjust the devExt. value, if necessary.
3446 LunExt->MaximumBlockXfer = 0;
3447
3448 } else {
3450 "AtapiHwInitialize: Using Multiblock on Device %d. Blocks / int - %d\n",
3451 i,
3452 LunExt->MaximumBlockXfer));
3453 }
3454
3456
3459 // If supported, setup read/write cacheing
3461 IDE_COMMAND_SET_FEATURES, 0, 0, 0,
3463
3464 // Check for errors.
3467 "AtapiHwInitialize: Enable read/write cacheing on Device %d failed\n",
3468 i));
3469 LunExt->DeviceFlags &= ~DFLAGS_RCACHE_ENABLED;
3470 } else {
3472 }
3473 } else {
3476 IDE_COMMAND_SET_FEATURES, 0, 0, 0,
3478 LunExt->DeviceFlags &= ~DFLAGS_RCACHE_ENABLED;
3479 }
3483 // If supported & allowed, setup write cacheing
3485 IDE_COMMAND_SET_FEATURES, 0, 0, 0,
3487 // Check for errors.
3490 "AtapiHwInitialize: Enable write cacheing on Device %d failed\n",
3491 i));
3492 LunExt->DeviceFlags &= ~DFLAGS_WCACHE_ENABLED;
3493 } else {
3495 }
3496 } else {
3499 IDE_COMMAND_SET_FEATURES, 0, 0, 0,
3501 LunExt->DeviceFlags &= ~DFLAGS_WCACHE_ENABLED;
3502 }
3503 }
3504
3505 if(/*LunExt->IdentifyData.FeaturesSupport.PowerMngt ||*/
3506 LunExt->IdentifyData.FeaturesSupport.APM) {
3507
3510 // setup APM
3512 IDE_COMMAND_SET_FEATURES, 0, 0, 0,
3514 // Check for errors.
3517 "AtapiHwInitialize: Enable APM on Device %d failed\n",
3518 i));
3519 }
3520 } else {
3523 IDE_COMMAND_SET_FEATURES, 0, 0, 0,
3525 }
3526 }
3530 // setup acoustic mgmt
3532 IDE_COMMAND_SET_FEATURES, 0, 0, 0,
3534 // Check for errors.
3537 "AtapiHwInitialize: Enable Acoustic Mgmt on Device %d failed\n",
3538 i));
3539 }
3540 } else {
3543 IDE_COMMAND_SET_FEATURES, 0, 0, 0,
3545 }
3546 }
3549 // setup standby timer
3551 IDE_COMMAND_IDLE, 0, 0, 0,
3553 // Check for errors.
3556 "AtapiHwInitialize: standby timer on Device %d failed\n",
3557 i));
3558 }
3559 }
3560 }
3561
3563
3565 //BOOLEAN isSanyo = FALSE;
3566 CCHAR vendorId[26];
3567
3569
3570 // Attempt to identify any special-case devices - psuedo-atapi changers, atapi changers, etc.
3572
3573 // Build a buffer based on the identify data.
3575 }
3576
3578
3579 // Inquiry string for older model had a '-', newer is '_'
3580 if (vendorId[12] == 'C') {
3581
3582 // Torisan changer. Set the bit. This will be used in several places
3583 // acting like 1) a multi-lun device and 2) building the 'special' TUR's.
3585 LunExt->DiscsPresent = 3;
3586 //isSanyo = TRUE;
3587 }
3588 }
3589 }
3590
3591 PreferedMode = LunExt->opt_MaxTransferMode;
3594 PreferedMode = chan->MaxTransferMode;
3595 }
3596
3600 }
3601
3603 LunExt->LimitedTransferMode =
3604 LunExt->TransferMode =
3605 (CHAR)PreferedMode;
3606
3607 AtapiDmaInit__(deviceExtension, LunExt);
3608
3609 LunExt->LimitedTransferMode =
3610 LunExt->TransferMode;
3612
3613 // We need to get our device ready for action before
3614 // returning from this function
3615
3616 // According to the atapi spec 2.5 or 2.6, an atapi device
3617 // clears its status BSY bit when it is ready for atapi commands.
3618 // However, some devices (Panasonic SQ-TC500N) are still
3619 // not ready even when the status BSY is clear. They don't react
3620 // to atapi commands.
3621 //
3622 // Since there is really no other indication that tells us
3623 // the drive is really ready for action. We are going to check BSY
3624 // is clear and then just wait for an arbitrary amount of time!
3625 //
3627 ULONG waitCount;
3628
3629 // have to get out of the loop sometime!
3630 // 10000 * 100us = 1000,000us = 1000ms = 1s
3631 waitCount = 10000;
3632 GetStatus(chan, statusByte);
3634 waitCount = 0;
3635 }
3637
3639 // Wait for Busy to drop.
3640 AtapiStallExecution(100);
3641 GetStatus(chan, statusByte);
3642 waitCount--;
3643 }
3644
3645 // 5000 * 100us = 500,000us = 500ms = 0.5s
3647 waitCount = 5000;
3648 do {
3649 AtapiStallExecution(100);
3650 } while (waitCount--);
3651 }
3652 }
3653 GetBaseStatus(chan, statusByte);
3654 AtapiEnableInterrupts(deviceExtension, lChannel);
3655 AtapiStallExecution(10);
3656 }
3657
3658 return;
3659
3660} // end AtapiHwInitialize__()
#define CHAR(Char)
VOID NTAPI AtapiDmaInit__(IN PHW_DEVICE_EXTENSION deviceExtension, IN PHW_LU_EXTENSION LunExt)
Definition: id_dma.cpp:857
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint GLint GLint j
Definition: glfuncs.h:250
UCHAR NTAPI AtaCommand(IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG DeviceNumber, IN ULONG lChannel, IN UCHAR command, IN USHORT cylinder, IN UCHAR head, IN UCHAR sector, IN UCHAR count, IN UCHAR feature, IN ULONG wait_flags)
Definition: id_ata.cpp:1168
VOID NTAPI IdeMediaStatus(BOOLEAN EnableMSN, IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber)
Definition: id_ata.cpp:9069
Referenced by AtapiAdapterControl(), AtapiHwInitialize(), and AtapiResetController__().
◆ AtapiHwInitializeChanger()
| VOID NTAPI AtapiHwInitializeChanger | ( | IN PVOID | HwDeviceExtension, |
| IN PSCSI_REQUEST_BLOCK | Srb, | ||
| IN PMECHANICAL_STATUS_INFORMATION_HEADER | MechanismStatus | ||
| ) |
Definition at line 3667 of file id_ata.cpp.
3671{
3677
3678 if (MechanismStatus) {
3679 LunExt->DiscsPresent = MechanismStatus->NumberAvailableSlots;
3682 }
3683 }
3684 return;
3685} // end AtapiHwInitializeChanger()
Referenced by AtapiInterrupt__().
◆ AtapiInterrupt()
Definition at line 4033 of file id_ata.cpp.
4036{
4040 ULONG c_state;
4041 ULONG i_res = 0;
4043 //BOOLEAN checked[AHCI_MAX_PORT];
4044 ULONG hIS;
4045 ULONG checked;
4046
4049
4051 // AHCI may generate state change notification, never skip this check
4053 KdPrint2((PRINT_PREFIX "AtapiInterrupt(base): AHCI: hIS=%x cntrlr %#x chan %#x\n",hIS, deviceExtension->DevIndex, deviceExtension->Channel));
4054 if(!hIS) {
4056 }
4057 // assume all non-interrupted ports to be already checked
4058 checked = ~hIS;
4059 // assume all not implemented ports to be already checked
4060 checked |= ~deviceExtension->AHCI_PI;
4061 } else {
4062 checked = 0; // assume all ports are not checked
4063 }
4064
4066 // if we do not expect interrupt, exit now,
4067 // but keep in mind that it can be unexpected one
4068 // Note: this is just a hint, not exact counter
4070 //deviceExtension->ExpectingInterrupt++;
4071 //return FALSE;
4072 }
4073 // clear this flag now, it can be set again in sub-calls
4074 deviceExtension->ExpectingInterrupt=0;
4075
4076
4077// for(_c=0; _c<deviceExtension->NumberChannels; _c++) {
4078// checked[_c] = (UCHAR)((hIS >> _c) & 0x01);
4079// }
4080
4081// fc =
4083 //KdPrint2((PRINT_PREFIX "AtapiInterrupt(base): pass %d\n", pass));
4085 // we catched some expected interrupts now.
4086 // do not touch unexpected until next ISR call
4087 break;
4088 }
4090
4092
4094 continue;
4095
4096 // check non-empty and expecting interrupt channels first
4098 continue;
4099
4101
4102 KdPrint2((PRINT_PREFIX "AtapiInterrupt(base): cntrlr %#x chan %#x\n",deviceExtension->DevIndex, c));
4103
4105 // we get here on idle channels or when ISR is posted to DPC
4107 continue;
4108 }
4109 // lock channel. Wait, while 2nd ISR checks interrupt on this channel
4110 do {
4112 // c_state = deviceExtension->chan[c].CheckIntr;
4113 // if (deviceExtension->chan[c].CheckIntr == CHECK_INTR_DETECTED) {
4114 // deviceExtension->chan[c].CheckIntr = CHECK_INTR_ACTIVE;
4115 // }
4116 c_state =
4121 // c_state = deviceExtension->chan[c].CheckIntr;
4122 // if (deviceExtension->chan[c].CheckIntr == CHECK_INTR_IDLE) {
4123 // deviceExtension->chan[c].CheckIntr = CHECK_INTR_ACTIVE
4124 // }
4125 c_state =
4129 }
4132 // check if already serviced
4135 continue;
4136 }
4137
4140
4144 //return TRUE;
4146 continue;
4147 }
4148 // disable interrupts on other channel of legacy mode
4149 // ISA-bridged onboard controller
4151 ((WinVer_Id() > WinVer_NT) && BMList[deviceExtension->DevIndex].MasterDev)*/) {
4153 }
4154
4160 } else {
4163 }
4164
4165 // re-enable interrupts on other channel
4167 ((WinVer_Id() > WinVer_NT) && BMList[deviceExtension->DevIndex].MasterDev)*/) {
4169 }
4170
4171 } else {
4174 }
4175
4176 }
4177 }
4180 deviceExtension->FirstChannelToCheck++;
4182 deviceExtension->FirstChannelToCheck = 0;
4183 }
4185} // end AtapiInterrupt()
BOOLEAN NTAPI AtapiCheckInterrupt__(IN PVOID HwDeviceExtension, IN UCHAR c)
Definition: id_ata.cpp:4512
#define UniataAhciReadHostPort4(deviceExtension, io_port_ndx)
Definition: id_sata.h:313
Referenced by DriverEntry().
◆ AtapiInterrupt2()
Definition at line 4192 of file id_ata.cpp.
4196{
4197 // This ISR is intended to catch interrupts when we are already in other ISR instance
4198 // for the same device. This may happen when we have multiple channels,
4199 // especially on SMP machines
4200
4205 ULONG c_count = 0;
4206 ULONG i_res;
4207 ULONG hIS;
4208 ULONG checked;
4209
4210 // we should never get here for ISA/MCA
4212 KdPrint2((PRINT_PREFIX "AtapiInterrupt2: NOT ACTIVE cntrlr %#x chan %#x\n",deviceExtension->DevIndex, deviceExtension->Channel));
4214 }
4215
4217 // AHCI may generate state change notification, never skip this check
4219 KdPrint2((PRINT_PREFIX "AtapiInterrupt2: AHCI: hIS=%x cntrlr %#x chan %#x\n",hIS, deviceExtension->DevIndex, deviceExtension->Channel));
4220 if(!hIS) {
4222 }
4223 // assume all non-interrupted ports to be already checked
4224 checked = ~hIS;
4225 // assume all not implemented ports to be already checked
4226 checked |= ~deviceExtension->AHCI_PI;
4227
4228 } else {
4229 checked = 0; // assume all ports are not checked
4230 }
4233 deviceExtension->ExpectingInterrupt++;
4235 }
4236 //deviceExtension->ExpectingInterrupt = 0;
4237
4239 KdPrint2((PRINT_PREFIX "AtapiInterrupt2: cntrlr %#x chan %#x\n",deviceExtension->DevIndex, c));
4240
4242 continue;
4243
4245
4248 continue;
4249 }
4250
4254 {
4256 // hunt on unexpected intr (Some devices generate double interrupts,
4257 // some controllers (at least CMD649) interrupt twice with small delay.
4258 // If interrupts are disabled, they queue interrupt and re-issue it later,
4259 // when we do not expect it.
4260 continue;
4261 }
4262
4263 c_count++;
4265
4271 }
4272
4275 } else {
4277 }
4278 }
4281 // there is an active ISR/DPC for one channel, but
4282 // we have an interrupt from another one
4283 // Lets inform current ISR/DPC about new interrupt
4285 } else {
4287 }
4290
4291} // end AtapiInterrupt2()
struct _ISR2_DEVICE_EXTENSION * PISR2_DEVICE_EXTENSION
Definition: bsmaster.h:1350
PHW_DEVICE_EXTENSION HwDeviceExtension
Definition: bsmaster.h:1351
Referenced by UniataConnectIntr2().
◆ AtapiInterrupt__()
atapiDev &&
deviceExtension->DWordIO
Definition at line 4981 of file id_ata.cpp.
4985{
4988 // Get current Srb
4991
4994 UCHAR dma_status = 0;
4997 UCHAR statusByte = 0,interruptReason;
4998
5000
5001#ifdef _DEBUG
5002 UCHAR Channel;
5003#endif //_DEBUG
5004 UCHAR lChannel;
5008 ULONG TimerValue = 1000;
5009 ULONG TotalTimerValue = 0;
5010#ifdef UNIATA_USE_XXableInterrupts
5012#else
5014#endif // UNIATA_USE_XXableInterrupts
5016// BOOLEAN RestoreUseDpc = FALSE;
5020
5022 if(InDpc) {
5024 //ASSERT((chan->ChannelCtrlFlags & CTRFLAGS_INTR_DISABLED));
5025 }
5026
5031 //ULONG ldev;
5032 PHW_LU_EXTENSION LunExt;
5033
5034 lChannel = c;
5035
5036#ifdef _DEBUG
5038
5039 KdPrint2((PRINT_PREFIX " cntrlr %#x:%d, irql %#x, c %d\n", deviceExtension->DevIndex, Channel, KeGetCurrentIrql(), c));
5040#endif //_DEBUG
5041
5045 DmaTransfer = TRUE;
5047 }
5048
5049 if (srb) {
5053 } else {
5055 TargetId =
5056 Lun = 0;
5057 goto enqueue_next_req;
5058 }
5059
5060 //ldev = GET_LDEV2(PathId, TargetId, Lun);
5065
5066 // check if we are in ISR DPC
5067 if(InDpc) {
5069 goto ServiceInterrupt;
5070 }
5071
5072 if (DmaTransfer) {
5073 dma_status = GetDmaStatus(deviceExtension, lChannel);
5074 }
5075
5077
5080 }
5081
5082 // change request state
5083 if(AtaReq) {
5084 OldReqState = AtaReq->ReqState;
5087 }
5088
5089 // We don't want using DPC for fast operations, like
5090 // DMA completion, sending CDB, short ATAPI transfers, etc.
5091 // !!!! BUT !!!!
5092 // We MUST use DPC, because of interprocessor synchronization
5093 // on multiprocessor platforms
5094
5095 if(DmaTransfer)
5096 goto ServiceInterrupt;
5097
5098 switch(OldReqState) {
5106 goto ServiceInterrupt;
5110 }
5111
5114 UseDpc = FALSE;
5115 }
5116
5117#ifndef UNIATA_CORE
5118
5119 if(!UseDpc)
5120 goto ServiceInterrupt;
5121
5122#ifdef UNIATA_USE_XXableInterrupts
5123 if(InDpc) {
5126 // shall never get here
5127 TimerValue = 1;
5128 goto CallTimerDpc;
5129 }
5130
5132 if(AtaReq) {
5135 } else {
5137 }
5138#else
5140 goto ServiceInterrupt;
5141#endif // UNIATA_USE_XXableInterrupts
5142
5143PostToDpc:
5144
5145 // Attention !!!
5146 // AtapiInterruptDpc() is called on DISPATCH_LEVEL
5147 // We always get here when are called from timer callback, which is invoked on DRQL.
5148 // It is intended to lower IRQL and let other interrupts to be serviced while we are waiting for BUSY release
5149
5151 // disable interrupts for this channel,
5152 // but avoid recursion and double-disable
5155 AtapiDisableInterrupts(deviceExtension, lChannel);
5156 }
5157 // go to ISR DPC
5159
5160#ifdef UNIATA_USE_XXableInterrupts
5161 // Will lower IRQL to DISPATCH_LEVEL
5165#else
5166 // Will raise IRQL to DIRQL
5168 AtapiInterruptDpc,
5169 TimerValue);
5171#endif // UNIATA_USE_XXableInterrupts
5173
5174#ifndef UNIATA_CORE
5175CallTimerDpc:
5177CallTimerDpc2:
5179 // we must block interrupts from this channel
5180 // If device generate new interrupt before we get to DPC,
5181 // ISR will assume, that it is NOT our interrupt
5182 AtapiDisableInterrupts(deviceExtension, lChannel);
5183 // We should not clean ExpectingInterrupt flag on channel, since it is used in DPC
5184 }
5185 // Will raise IRQL to DIRQL
5187 AtapiCallBack_X,
5188 TimerValue);
5190#endif //UNIATA_CORE
5191
5192ServiceInterrupt:
5193
5194 if(AtaReq && InDpc) {
5197 goto PIO_wait_DRQ0;
5199 goto PIO_wait_busy;
5201 goto PIO_wait_DRQ;
5203 goto continue_err;
5206 // continue normal execution
5207 break;
5208 }
5209 }
5210#else
5211ServiceInterrupt:
5212#endif //UNIATA_CORE
5213/*
5214 // make additional delay for old devices (if we are not in DPC)
5215 if((!LunExt->IdentifyData.MajorRevision || (deviceExtension->lun[DeviceNumber].TransferMode < ATA_PIO4))
5216 &&
5217 !InDpc &&
5218 !atapiDev &&
5219 !(deviceExtension->HwFlags & UNIATA_SATA)
5220 ) {
5221 KdPrint2((PRINT_PREFIX " additional delay 10us for old devices\n"));
5222 AtapiStallExecution(10);
5223 }
5224*/
5225
5226 /* clear interrupt and get status */
5230
5231 if(chan->AhciLastIS & ~(ATA_AHCI_P_IX_DHR | ATA_AHCI_P_IX_PS | ATA_AHCI_P_IX_DS | ATA_AHCI_P_IX_SDB)) {
5233 chan->AhciLastIS & ~(ATA_AHCI_P_IX_DHR | ATA_AHCI_P_IX_PS | ATA_AHCI_P_IX_DS | ATA_AHCI_P_IX_SDB),
5234 chan->AhciLastSError));
5236
5238 !(statusByte & IDE_STATUS_ERROR) &&
5239 !chan->AhciLastSError &&
5241 ) {
5243 // continue processing in regular way
5244 } else {
5245
5246 //KdPrint3((PRINT_PREFIX "Err mask (%#x)\n", chan->AhciLastIS & ~ATA_AHCI_P_IX_OF));
5247 // We have some other error except Overflow
5248 // Just signal ERROR, operation will be aborted in ERROR branch.
5249 statusByte |= IDE_STATUS_ERROR;
5251 if(chan->AhciLastSError & (ATA_SE_HANDSHAKE_ERR | ATA_SE_LINKSEQ_ERR | ATA_SE_TRANSPORT_ERR | ATA_SE_UNKNOWN_FIS)) {
5254 }
5255 }
5256 } else {
5257 // We have only Overflow. Abort operation and continue
5258#ifdef _DEBUG
5259 UniataDumpAhciPortRegs(chan);
5260#endif
5263 }
5264#ifdef _DEBUG
5265 UniataDumpAhciPortRegs(chan);
5266#endif
5267 UniataAhciWaitCommandReady(chan, 10);
5268 }
5269 }
5270
5271 } else {
5272 GetBaseStatus(chan, statusByte);
5273 }
5274 if(atapiDev) {
5276 } else {
5278 }
5279
5280 if(!UseDpc) {
5282 InDpc = TRUE;
5283 }
5284
5285 if (!atapiDev) {
5286 // IDE
5289 } else
5292 // Crashdump is polling and we got caught with busy asserted.
5293 // Just go away, and we will be polled again shortly.
5295 goto ReturnEnableIntr;
5296 }
5297try_dpc_wait:
5298 // Ensure BUSY is non-asserted.
5299 // make a very small idle before falling to DPC
5300 k = (InDpc && UseDpc) ? 1000 : 2;
5301
5303
5304 GetBaseStatus(chan, statusByte);
5306 break;
5307 }
5308 AtapiStallExecution(10);
5309 }
5310
5312
5314
5315 TimerValue = 50;
5317
5318#ifndef UNIATA_CORE
5319 goto PostToDpc;
5320#else //UNIATA_CORE
5321 AtapiStallExecution(TimerValue);
5322 goto ServiceInterrupt;
5323#endif //UNIATA_CORE
5324 } else
5326 // reset the controller.
5328 " Resetting due to BUSY on entry - %#x.\n",
5329 statusByte));
5330 goto IntrPrepareResetController;
5331 }
5332 }
5333 } else {
5334 // ATAPI
5336 InDpc &&
5339 ) {
5340 //KdPrint2((PRINT_PREFIX " additional delay 10us for old devices (2)\n"));
5341 //AtapiStallExecution(10);
5342 }
5345 } else {
5348 }
5349
5351 //if(chan->ChannelCtrlFlags & CTRFLAGS_DSC_BSY) {}
5352/*
5353#ifndef UNIATA_CORE
5354 // This is just workaround
5355 // We should DISABLE interrupts before entering WAIT state
5356 UniataExpectChannelInterrupt(chan, TRUE);
5357#endif //UNIATA_CORE
5358*/
5359 KdPrint3((PRINT_PREFIX " BUSY on ATAPI device, waiting %d us\n", LunExt->AtapiReadyWaitDelay));
5360#ifndef UNIATA_CORE
5361 if(LunExt->AtapiReadyWaitDelay && (LunExt->AtapiReadyWaitDelay > g_opt_MaxIsrWait) && !InDpc && UseDpc) {
5362 TimerValue = LunExt->AtapiReadyWaitDelay;
5365 goto CallTimerDpc2;
5366 }
5367#endif //UNIATA_CORE
5368 TimerValue = 10;
5370 GetBaseStatus(chan, statusByte);
5376 break;
5377 }
5378 TotalTimerValue += TimerValue;
5381 if(!InDpc) {
5383 TimerValue = 100;
5385 } else {
5387 TimerValue = 1000;
5389 }
5390#ifndef UNIATA_CORE
5391 if(UseDpc) {
5393 LunExt->AtapiReadyWaitDelay = TotalTimerValue*2/3;
5394 }
5395 goto CallTimerDpc2;
5396 }
5397#endif //UNIATA_CORE
5398 }
5399
5400 AtapiStallExecution(TimerValue);
5401 TimerValue += 10;
5402 }
5404 LunExt->AtapiReadyWaitDelay = TotalTimerValue*2/3;
5406 }
5409 goto try_dpc_wait;
5410 }
5411 }
5412 }
5413
5415 switch(OldReqState) {
5418
5422 }
5423 break;
5424 }
5425 }
5426
5427//retry_check:
5428 // Check for error conditions.
5430 (dma_status & BM_STATUS_ERR)) {
5431
5434 // wait ready
5435#ifdef _DEBUG
5436 UniataDumpAhciPortRegs(chan);
5437#endif
5440 }
5441 // clear interrupts again
5442 UniataAhciWaitCommandReady(chan, 10);
5443#ifdef _DEBUG
5444 UniataDumpAhciPortRegs(chan);
5445#endif
5452 }
5453 }
5454#ifdef _DEBUG
5455 UniataDumpAhciPortRegs(chan);
5456#endif
5457 } else {
5459 }
5461/*
5462 if(error & IDE_STATUS_CORRECTED_ERROR) {
5463 KdPrint2((PRINT_PREFIX "AtapiInterrupt: (corrected)\n"));
5464 statusByte &= ~IDE_STATUS_ERROR;
5465 goto retry_check;
5466 }
5467*/
5468 if(AtaReq) {
5470 } else {
5472 }
5473
5476 } else
5477 if(!atapiDev) {
5479 AtapiStallExecution(100);
5480 } else {
5482 AtapiStallExecution(10);
5483 }
5484continue_err:
5485
5488
5490 GetBaseStatus(chan, statusByte);
5492 AtapiStallExecution(50);
5493 } else {
5494 break;
5495 }
5496 }
5497
5498 if (!atapiDev) {
5499 /* if this is a UDMA CRC error, reinject request */
5500
5501 AtaReq->retry++;
5503#ifdef IO_STATISTICS
5505#endif //IO_STATISTICS
5506 if(DmaTransfer /*&&
5507 (error & IDE_ERROR_ICRC)*/) {
5510//fallback_pio:
5512 //AtaReq->Flags &= ~REQ_FLAG_DMA_OPERATION;
5513 // Downrate will happen in AtapiDmaReinit(), try UDMA-2 for HDD only
5515 }
5517 goto reenqueue_req;
5518 }
5519 } else {
5521 AtaReq->retry++;
5522 }
5524 }
5525 }
5526 } else {
5529
5532 // Do nothing here
5533 } else
5536 }
5537 }
5538
5542//fallback_pio:
5543 // Downrate will happen in AtapiDmaReinit(), use PIO immediately for ATAPI
5544 AtaReq->Flags &= ~REQ_FLAG_DMA_OPERATION;
5546// LunExt->DeviceFlags |= DFLAGS_FORCE_DOWNRATE;
5548 goto reenqueue_req;
5549 }
5550 } else {
5552 AtaReq->retry++;
5553 }
5555 }
5556 }
5557
5560 // Fail this request.
5563 } else {
5565 }
5566 } else
5570 } else
5572#ifdef IO_STATISTICS
5575 AtaReq->retry,
5577 LunExt->BlockIoCount
5578 ));
5582 ) {
5583#else
5585#endif //IO_STATISTICS
5587 LunExt->LimitedTransferMode =
5588 LunExt->TransferMode;
5589 }
5590 }
5591#ifdef IO_STATISTICS
5593 // we need stats for Read/Write operations
5594 LunExt->BlockIoCount++;
5595 }
5596 LunExt->IoCount++;
5597#endif //IO_STATISTICS
5598
5599continue_PIO:
5600
5601 // check reason for this interrupt.
5602 if (atapiDev) {
5603
5605 // ATAPI branch
5606
5609 if(DmaTransfer) {
5610 wordsThisInterrupt = DEV_BSIZE/2*512;
5611 } else {
5612 wordsThisInterrupt = DEV_BSIZE/2;
5613 }
5614
5615 } else {
5616
5617 // ATA branch
5618
5619 if(DmaTransfer) {
5620 // simulate DRQ for DMA transfers
5621 statusByte |= IDE_STATUS_DRQ;
5622 }
5624
5625 if(DmaTransfer) {
5626 wordsThisInterrupt = DEV_BSIZE/2*512;
5627 } else
5630 }
5631
5633
5634 interruptReason = ATAPI_IR_IO_toHost;
5635
5637 interruptReason = ATAPI_IR_IO_toDev;
5638
5639 } else {
5642 }
5643
5645
5646 //AtapiEnableInterrupts(deviceExtension, lChannel);
5649
5650 } else {
5651
5654
5655 // Funky behaviour seen with PCI IDE (not all, just one).
5656PIO_wait_DRQ0:
5657 // The ISR hits with DRQ low, but comes up later.
5659 GetBaseStatus(chan, statusByte);
5661 break;
5662 }
5663 if(!InDpc) {
5664 // goto DPC
5666 TimerValue = 100;
5668#ifndef UNIATA_CORE
5669 goto PostToDpc;
5670#else //UNIATA_CORE
5671 AtapiStallExecution(TimerValue);
5672 goto ServiceInterrupt;
5673#endif //UNIATA_CORE
5674 }
5675 AtapiStallExecution(100);
5676 }
5678 // reset the controller.
5680 statusByte));
5681IntrPrepareResetController:
5683 goto ReturnEnableIntr;
5684
5685 } else {
5686 interruptReason = (srb->SrbFlags & SRB_FLAGS_DATA_IN) ? ATAPI_IR_IO_toHost : ATAPI_IR_IO_toDev;
5687 }
5688
5689 } else {
5690 // Command complete - verify, write, or the SMART enable/disable.
5691 // Also get_media_status
5693 }
5694 }
5695 }
5696
5697 KdPrint2((PRINT_PREFIX "AtapiInterrupt: i-reason=%d, status=%#x\n", interruptReason, statusByte));
5699 KdPrint2((PRINT_PREFIX " AHCI path, WordsTransfered %x, WordsLeft %x\n", AtaReq->WordsTransfered, AtaReq->WordsLeft));
5700/* if(chan->AhciLastIS & ATA_AHCI_P_IX_OF) {
5701 //status = SRB_STATUS_DATA_OVERRUN;
5702 DataOverrun = TRUE;
5703 } else {
5704 status = SRB_STATUS_SUCCESS;
5705 }*/
5707 AtaReq->WordsLeft = 0;
5708 } else {
5710 }
5711 //if(AtaReq->WordsLeft && (status == SRB_STATUS_SUCCESS)) {
5712 // status = SRB_STATUS_DATA_OVERRUN;
5713 //}
5715 chan->ChannelCtrlFlags &= ~CTRFLAGS_DMA_OPERATION;
5717 } else
5720 AtapiDmaDBPreSync(HwDeviceExtension, chan, srb);
5721 }
5722 // Write the packet.
5724 // Send CDB to device.
5726 LunExt->IdentifyData.AtapiCmdSize ? 8 : 6,
5729
5733 }
5734
5735 goto ReturnEnableIntr;
5736
5738
5739 // Write the data.
5740 if (atapiDev) {
5741
5742 // Pick up bytes to transfer and convert to words.
5743 wordCount =
5745
5746 wordCount |=
5748
5749 // Covert bytes to words.
5750 wordCount >>= 1;
5752
5755 "AtapiInterrupt: %d words requested; %d words xferred\n",
5756 AtaReq->WordsLeft,
5757 wordCount));
5758 }
5759
5760 // Verify this makes sense.
5762 wordCount = AtaReq->WordsLeft;
5764 "AtapiInterrupt: Write underrun\n"));
5765 DataOverrun = TRUE;
5766 }
5767
5768 } else {
5769
5770 // IDE path. Check if words left is at least DEV_BSIZE/2 = 256.
5772 // Transfer only words requested.
5773 wordCount = AtaReq->WordsLeft;
5774 } else {
5775 // Transfer next block.
5776 wordCount = wordsThisInterrupt;
5777 }
5778 }
5779
5780 if (DmaTransfer &&
5782 //ASSERT(AtaReq->WordsLeft == wordCount);
5787 AtaReq->WordsLeft -= wordCount;
5788 AtaReq->WordsTransfered += wordCount;
5790 goto ReturnEnableIntr;
5791 }
5793 }
5795 AtaReq->WordsLeft = 0;
5797 chan->ChannelCtrlFlags &= ~CTRFLAGS_DMA_OPERATION;
5799 }
5800
5801 // Ensure that this is a write command.
5803
5805 "AtapiInterrupt: Write interrupt\n"));
5806
5807 statusByte = WaitOnBusy(chan);
5808
5810 || (wordCount & 1)) {
5811
5812 WriteBuffer(chan,
5813 AtaReq->DataBuffer,
5814 wordCount,
5815 UniataGetPioTiming(LunExt));
5816 } else {
5817
5818 WriteBuffer2(chan,
5820 wordCount / 2,
5821 UniataGetPioTiming(LunExt));
5822 }
5823 } else {
5824
5826 "AtapiInterrupt: Int reason %#x, but srb is for a read %#x.\n",
5827 interruptReason,
5828 srb));
5829
5830 // Fail this request.
5833 // some devices feel bad after incorrect commands and may need reset
5835 "AtapiInterrupt: Try ATAPI reset\n"));
5836
5837 AtapiDisableInterrupts(deviceExtension, lChannel);
5839 AtapiEnableInterrupts(deviceExtension, lChannel);
5842
5843// goto IntrPrepareResetController;
5844 }
5846 }
5847 // Advance data buffer pointer and bytes left.
5848 AtaReq->DataBuffer += wordCount;
5849 AtaReq->WordsLeft -= wordCount;
5850 AtaReq->WordsTransfered += wordCount;
5851
5852 if (atapiDev) {
5854 }
5855
5856 goto ReturnEnableIntr;
5857
5859
5860continue_read_drq:
5861
5862 if (atapiDev) {
5863
5864 // Pick up bytes to transfer and convert to words.
5865 wordCount =
5868
5869 // Convert bytes to words.
5871 wordCount >>= 1;
5872 /*
5873 When ATAPI 64k PIO read is requested we may have 0xfffe byte
5874 count reported for 0x10000 bytes in single interrupt.
5875 It is not allowed to read entire 64k block with DwordIo intead of
5876 wait for last word.
5877 */
5880 "AtapiInterrupt: %d words requested; %d words xferred\n",
5881 AtaReq->WordsLeft,
5882 wordCount));
5883 }
5884
5885 // Verify this makes sense.
5887 wordCount = AtaReq->WordsLeft;
5888 DataOverrun = TRUE;
5889 }
5890
5891 } else {
5892
5893 // Check if words left is at least 256.
5895 // Transfer only words requested.
5896 wordCount = AtaReq->WordsLeft;
5897 } else {
5898 // Transfer next block.
5899 wordCount = wordsThisInterrupt;
5900 }
5901 }
5902
5903 if(DmaTransfer &&
5909 AtaReq->WordsLeft -= wordCount;
5910 AtaReq->WordsTransfered += wordCount;
5912 goto ReturnEnableIntr;
5913 }
5915 }
5916 //ASSERT(AtaReq->WordsLeft == wordCount);
5918 AtaReq->WordsLeft = 0;
5920 chan->ChannelCtrlFlags &= ~CTRFLAGS_DMA_OPERATION;
5922 }
5923 // Ensure that this is a read command.
5925
5926/* KdPrint2((
5927 "AtapiInterrupt: Read interrupt\n"));*/
5928
5929 statusByte = WaitOnBusy(chan);
5930
5933 "IdeIntr: unaligned ATAPI %#x Words\n", wordCount));
5934 } else
5937 "IdeIntr: pre-Read %#x Dwords\n", wordCount/2));
5938
5939 ReadBuffer2(chan,
5941 wordCount / 2,
5942 UniataGetPioTiming(LunExt));
5943 // Advance data buffer pointer and bytes left.
5944 AtaReq->DataBuffer += wordCount & ~1;
5945 AtaReq->WordsLeft -= wordCount & ~1;
5946 AtaReq->WordsTransfered += wordCount & ~1;
5947 wordCount &= 1;
5948 }
5949 if (wordCount) {
5951 "IdeIntr: Read %#x words\n", wordCount));
5952
5953 ReadBuffer(chan,
5954 AtaReq->DataBuffer,
5955 wordCount,
5956 UniataGetPioTiming(LunExt));
5957 }
5958
5959 KdPrint2(("IdeIntr: PIO Read AtaReq->DataBuffer %#x, srb->DataBuffer %#x\n", AtaReq->DataBuffer, (srb ? srb->DataBuffer : (void*)-1) ));
5960 //KdDump(AtaReq->DataBuffer, wordCount*2);
5963 }
5964
5965 GetBaseStatus(chan, statusByte);
5967
5968 if(DataOverrun) {
5970 AtapiSuckPort2(chan);
5971 GetBaseStatus(chan, statusByte);
5972 }
5973
5976 AtapiStallExecution(10);
5977 GetBaseStatus(chan, statusByte);
5979 break;
5980 }
5981 }
5982 }
5983
5984 } else {
5985
5987 "AtapiInterrupt: Int reason %#x, but srb is for a read %#x.\n",
5988 interruptReason,
5989 srb));
5990
5991 // Fail this request.
5994 }
5995//continue_atapi_pio_read:
5996 // Advance data buffer pointer and bytes left.
5997 AtaReq->DataBuffer += wordCount;
5998 AtaReq->WordsLeft -= wordCount;
5999 AtaReq->WordsTransfered += wordCount;
6000
6001 // Check for read command complete.
6003
6005 if (atapiDev) {
6006
6008
6009 // Work around to make many atapi devices return correct sector size
6010 // of 2048. Also certain devices will have sector count == 0x00, check
6011 // for that also.
6013
6017 }
6018
6021 }
6022#ifndef UNIATA_INIT_CHANGERS
6023 else
6025
6027 // Bingo!!
6028 AtapiHwInitializeChanger (HwDeviceExtension,
6029 srb,
6033 }
6034#endif // UNIATA_INIT_CHANGERS
6035 }
6036 GetStatus(chan, statusByte);
6038 // Assume command is completed if BUSY is cleared
6039 // and all data read
6040 // Optionally, we may receive COMPLETE interrupt later and
6041 // treat it as unexpected
6043
6046 }
6047
6048 } else {
6049
6050 /*
6051 // Completion for IDE drives.
6052 if (AtaReq->WordsLeft) {
6053 status = SRB_STATUS_DATA_OVERRUN;
6054 } else {
6055 status = SRB_STATUS_SUCCESS;
6056 }
6057
6058 goto CompleteRequest;
6059 */
6062
6063 }
6064 } else {
6065 if (atapiDev) {
6067 GetStatus(chan, statusByte);
6069 // Assume command is completed if BUSY is cleared
6070 // even if NOT all data read
6071 // Optionally, we may receive COMPLETE interrupt later and
6072 // treat it as unexpected
6073 KdPrint2((PRINT_PREFIX "AtapiInterrupt: early complete + underrun ? status %x\n", statusByte));
6074
6077 }
6078 } else {
6082 goto continue_read_drq;
6083 }
6084 }
6085 }
6086
6087 goto ReturnEnableIntr;
6088
6089 } else if (interruptReason == (ATAPI_IR_IO_toHost | ATAPI_IR_COD_Cmd) && !(statusByte & IDE_STATUS_DRQ)) {
6090
6092 // Command complete. We exactly know this because of IReason.
6093
6094 if(DmaTransfer) {
6097 AtaReq->WordsLeft = 0;
6098 } else {
6100
6101 wordCount = AtaReq->WordsLeft;
6102 // Advance data buffer pointer and bytes left.
6103 AtaReq->DataBuffer += wordCount;
6104 AtaReq->WordsLeft -= wordCount;
6105 AtaReq->WordsTransfered += wordCount;
6106
6107 KdPrint2((PRINT_PREFIX "AtapiInterrupt: wordCount %#x, WordsTransfered %#x\n", wordCount, AtaReq->WordsTransfered));
6108
6109 }
6110 //if (AtaReq->WordsLeft) {
6111 // status = SRB_STATUS_DATA_OVERRUN;
6112 //} else {
6114 //}
6115
6116#ifdef UNIATA_DUMP_ATAPI
6117 if(srb &&
6119 UCHAR ScsiCommand;
6121 PCHAR CdbData;
6122 PCHAR ModeSelectData;
6123 ULONG CdbDataLen;
6125
6130
6131 if(CdbDataLen > 0x1000) {
6132 CdbDataLen = 0x1000;
6133 }
6134
6143
6147 ModeSelectData = CdbData+4;
6148 KdDump(CdbData, CdbDataLen);
6149 } else
6153 ModeSelectData = CdbData+8;
6154 KdDump(CdbData, CdbDataLen);
6155 } else {
6158 KdDump(CdbData, CdbDataLen);
6159 }
6160 }
6162 }
6163#endif //UNIATA_DUMP_ATAPI
6164
6165CompleteRequest:
6166
6168 // Check and see if we are processing our secret (mechanism status/request sense) srb
6169
6173 }
6174
6176
6177 ULONG srbStatus;
6178
6181#ifdef UNIATA_INIT_CHANGERS
6182 // We can get here only when UNIATA_INIT_CHANGERS is defined
6185 // Bingo!!
6186 AtapiHwInitializeChanger (HwDeviceExtension,
6187 srb,
6189
6190 // Get ready to issue the original srb
6193
6194 } else {
6195 // failed! Get the sense key and maybe try again
6197 HwDeviceExtension,
6198 AtaReq->OriginalSrb);
6199 }
6200/*
6201 // do not enable interrupts in DPC, do not waste time, do it now!
6202 if(UseDpc && chan->DisableIntr) {
6203 AtapiEnableInterrupts(HwDeviceExtension, c);
6204 UseDpc = FALSE;
6205 RestoreUseDpc = TRUE;
6206 }
6207*/
6209
6210 KdPrint3((PRINT_PREFIX "AtapiInterrupt: chan->ExpectingInterrupt %d (1)\n", chan->ExpectingInterrupt));
6211
6214 goto ReturnEnableIntr;
6215 }
6216/*
6217 if(RestoreUseDpc) {
6218 // restore state on error
6219 UseDpc = TRUE;
6220 AtapiDisableInterrupts(HwDeviceExtension, c);
6221 }
6222*/
6223#else
6226#endif // UNIATA_INIT_CHANGERS
6227 } else { // srb->Cdb[0] == SCSIOP_REQUEST_SENSE)
6228
6230#ifdef __REACTOS__
6231 (void)senseData;
6232#endif
6233
6236 // Check to see if we at least get mininum number of bytes
6238 (FIELD_OFFSET (SENSE_DATA, AdditionalSenseLength) + sizeof(senseData->AdditionalSenseLength))) {
6240 }
6241 }
6242
6244#ifndef UNIATA_CORE
6245#ifdef UNIATA_INIT_CHANGERS
6247 FALSE &&
6248 chan->MechStatusRetryCount) {
6249
6250 KdPrint3((PRINT_PREFIX "AtapiInterrupt: MechStatusRetryCount %#x\n", chan->MechStatusRetryCount));
6251 // The sense key doesn't say the last request is illegal, so try again
6252 chan->MechStatusRetryCount--;
6254 HwDeviceExtension,
6255 AtaReq->OriginalSrb);
6256 } else
6257#endif // UNIATA_INIT_CHANGERS
6258 {
6259 // Get ready to issue the original srb
6262 }
6263#endif //UNIATA_CORE
6264/*
6265 // do not enable interrupts in DPC, do not waste time, do it now!
6266 if(UseDpc && chan->DisableIntr) {
6267 AtapiEnableInterrupts(HwDeviceExtension, c);
6268 UseDpc = FALSE;
6269 RestoreUseDpc = TRUE;
6270 }
6271*/
6273
6274 KdPrint3((PRINT_PREFIX "AtapiInterrupt: chan->ExpectingInterrupt %d (2)\n", chan->ExpectingInterrupt));
6275
6278 goto ReturnEnableIntr;
6279 }
6280/*
6281 if(RestoreUseDpc) {
6282 // restore state on error
6283 UseDpc = TRUE;
6284 AtapiDisableInterrupts(HwDeviceExtension, c);
6285 }
6286*/
6287 }
6288 }
6289
6290 // If we get here, it means AtapiSendCommand() has failed
6291 // Can't recover. Pretend the original srb has failed and complete it.
6292
6294
6298 }
6299
6300 KdPrint2((PRINT_PREFIX "AtapiInterrupt: chan->ExpectingInterrupt %d (3)\n", chan->ExpectingInterrupt));
6301
6302 // fake an error and read no data
6304 srb->ScsiStatus = 0;
6308
6310
6311 // Map error to specific SRB status and handle request sense.
6314 srb);
6315
6317
6318 } else if(!DmaTransfer) {
6319
6321 // Command complete.
6322PIO_wait_busy:
6324 // Wait for busy to drop.
6326 GetBaseStatus(chan, statusByte);
6328 break;
6329 }
6330 if(!InDpc) {
6331 // goto DPC
6333 TimerValue = 200;
6335#ifndef UNIATA_CORE
6336 goto PostToDpc;
6337#else //UNIATA_CORE
6338 AtapiStallExecution(TimerValue);
6339 goto ServiceInterrupt;
6340#endif //UNIATA_CORE
6341 }
6342 AtapiStallExecution(100);
6343 }
6344
6346
6347 // reset the controller.
6349 "AtapiInterrupt: Resetting due to BSY still up - %#x.\n",
6350 statusByte));
6351 goto IntrPrepareResetController;
6352 }
6353 // Check to see if DRQ is still up.
6356 if(srb) {
6359 } else {
6361 }
6362 } else {
6364 }
6365 if(AtaReq) {
6367 } else {
6369 }
6371 !(LunExt->DeviceFlags & (DFLAGS_ATAPI_DEVICE | DFLAGS_TAPE_DEVICE | DFLAGS_LBA_ENABLED))*/) {
6373 goto continue_PIO;
6374 }
6375 }
6376 //if (atapiDev && (statusByte & IDE_STATUS_DRQ)) {}
6377 //if ((statusByte & IDE_STATUS_DRQ)) {}
6380
6381PIO_wait_DRQ:
6384 GetBaseStatus(chan, statusByte);
6386 break;
6387 }
6388 if(!InDpc) {
6389 // goto DPC
6392 TimerValue = 100;
6393#ifndef UNIATA_CORE
6394 goto PostToDpc;
6395#else //UNIATA_CORE
6396 AtapiStallExecution(TimerValue);
6397 goto ServiceInterrupt;
6398#endif //UNIATA_CORE
6399 }
6400 AtapiStallExecution(100);
6401 }
6402
6404 // reset the controller.
6406 statusByte));
6407 goto IntrPrepareResetController;
6408 }
6409 }
6410 if(atapiDev) {
6413 //KdDump(srb->DataBuffer, srb->DataTransferLength);
6414 }
6415 if(!AtapiDmaPioSync(HwDeviceExtension, srb, (PUCHAR)(srb->DataBuffer), srb->DataTransferLength)) {
6417 }
6418 }
6419
6420 // Clear interrupt expecting flag.
6422 // clear this flag now, it can be set again in sub-calls
6424 CHECK_INTR_IDLE);
6425
6426 // Sanity check that there is a current request.
6428 // Set status in SRB.
6430
6431 // Check for underflow.
6433
6434 KdPrint2((PRINT_PREFIX "AtapiInterrupt: Check for underflow, AtaReq->WordsLeft %x\n", AtaReq->WordsLeft));
6435 // Subtract out residual words and update if filemark hit,
6436 // setmark hit , end of data, end of media...
6440 } else {
6441 srb->DataTransferLength = 0;
6442 }
6443 } else {
6445 }
6446 }
6448 //if(!(deviceExtension->HwFlags & UNIATA_AHCI) && !atapiDev) {
6449 // // This should be set in UniataAhciEndTransaction() for AHCI
6450 // AtaReq->WordsTransfered += AtaReq->bcount * DEV_BSIZE/2;
6451 //}
6452 if(!atapiDev &&
6456 AtaReq->Flags &= ~REQ_FLAG_DMA_OPERATION;
6458 goto reenqueue_req;
6459 } else {
6462 }
6463 }
6464
6466
6467CompleteRDP:
6468 // Indicate command complete.
6471IntrCompleteReq:
6472
6474 srb->SenseInfoBuffer &&
6476
6478
6480 senseBuffer->ErrorCode = 0;
6481 senseBuffer->Valid = 1;
6482 senseBuffer->AdditionalSenseLength = 0xb;
6483 senseBuffer->SenseKey = 0;
6484 senseBuffer->AdditionalSenseCode = 0;
6485 senseBuffer->AdditionalSenseCodeQualifier = 0;
6486
6488 }
6489 AtapiDmaDBSync(chan, srb);
6491 UniataRemoveRequest(chan, srb);
6494 deviceExtension,
6495 srb);
6496 }
6497 } else {
6498
6500
6504 }
6505
6506 if(!AtapiStringCmp( (PCHAR)(((PSRB_IO_CONTROL)(srb->DataBuffer))->Signature),"SCSIDISK",sizeof("SCSIDISK")-1)) {
6507
6508 PSENDCMDOUTPARAMS cmdOutParameters = (PSENDCMDOUTPARAMS)(((PUCHAR)srb->DataBuffer) + sizeof(SRB_IO_CONTROL));
6509 // Build the SMART status block depending upon the completion status.
6510 cmdOutParameters->cBufferSize = wordCount;
6513
6514 // If the sub-command is return smart status, jam the value from cylinder low and high, into the
6515 // data buffer.
6518
6519 regs->bOpFlags = 0;
6520 UniataSnapAtaRegs(chan, 0, regs);
6521
6524
6525 cmdOutParameters->cBufferSize = 8;
6526 }
6528 }
6529 // Indicate command complete.
6530 goto IntrCompleteReq;
6531 }
6532
6533 } else {
6534
6536 }
6537
6539 // Check DSC
6541 GetBaseStatus(chan, statusByte);
6545 goto CompleteRDP;
6546 } else
6550 goto CompleteRDP;
6551 }
6552 AtapiStallExecution(50);
6553 }
6554 }
6555 // RDP can be cleared since previous check
6558
6559 TimerValue = 2000;
6560#ifndef UNIATA_CORE
6561 goto CallTimerDpc;
6562#else //UNIATA_CORE
6563 AtapiStallExecution(TimerValue);
6564 goto ServiceInterrupt;
6565#endif //UNIATA_CORE
6566 }
6567
6568// ASSERT(KeGetCurrentIrql() == DISPATCH_LEVEL);
6569enqueue_next_req:
6570 // Get next request
6571 srb = UniataGetCurRequest(chan);
6572
6573reenqueue_req:
6574
6575#ifndef UNIATA_CORE
6577 if(!srb) {
6579 deviceExtension,
6580 NULL);
6581 } else {
6583 deviceExtension,
6584 PathId,
6585 TargetId,
6586 Lun);
6587 // in simplex mode next command must NOT be sent here
6590 }
6591 }
6592 // Try to get SRB fron any non-empty queue (later)
6594 NoStartIo = FALSE;
6595 }
6596#endif //UNIATA_CORE
6597
6598 goto ReturnEnableIntr;
6599
6600 } else {
6601
6602 // Unexpected int. Catch it
6603 KdPrint2((PRINT_PREFIX "AtapiInterrupt: Unexpected ATAPI interrupt. InterruptReason %#x. Status %#x.\n",
6604 interruptReason,
6605 statusByte));
6606
6609 statusByte = WaitForDrq(chan);
6611 goto continue_PIO;
6612 }
6613 }
6614 }
6615
6617 AtaReq->WordsLeft == 0) {
6620 chan->ChannelCtrlFlags &= ~CTRFLAGS_DMA_OPERATION;
6622 }
6623 }
6624
6625ReturnEnableIntr:
6626
6628 //UniataExpectChannelInterrupt(chan, TRUE); // device may interrupt
6630 if(UseDpc) {
6633#ifdef UNIATA_USE_XXableInterrupts
6634 //ASSERT(KeGetCurrentIrql() <= DISPATCH_LEVEL);
6636 // must be called on DISPATCH_LEVEL
6638 AtapiEnableInterrupts__);
6639#else
6642 CHECK_INTR_IDLE);
6643 // Will raise IRQL to DIRQL
6644#ifndef UNIATA_CORE
6645 AtapiQueueTimerDpc(HwDeviceExtension, lChannel,
6646 AtapiEnableInterrupts__,
6647 1);
6648#endif // UNIATA_CORE
6650#endif // UNIATA_USE_XXableInterrupts
6651 }
6652 }
6653
6655 // in simplex mode next command must be sent here if
6656 // DPC is not used
6657 KdPrint2((PRINT_PREFIX "AtapiInterrupt: exiting, UseDpc=%d, NoStartIo=%d\n", UseDpc, NoStartIo));
6658
6659#ifndef UNIATA_CORE
6660 if(!UseDpc && /*deviceExtension->simplexOnly &&*/ !NoStartIo) {
6661 chan = UniataGetNextChannel(chan);
6662 if(chan) {
6663 srb = UniataGetCurRequest(chan);
6664 } else {
6665 srb = NULL;
6666 }
6668 if(srb) {
6670 }
6671 }
6672#endif //UNIATA_CORE
6674
6675} // end AtapiInterrupt__()
struct _SENDCMDOUTPARAMS * PSENDCMDOUTPARAMS
#define REQ_STATE_ATAPI_EXPECTING_DATA_INTR
Definition: bsmaster.h:952
BOOLEAN NTAPI AtapiDmaDBPreSync(IN PVOID HwDeviceExtension, PHW_CHANNEL chan, PSCSI_REQUEST_BLOCK Srb)
Definition: id_dma.cpp:553
#define REQ_STATE_ATAPI_EXPECTING_CMD_INTR
Definition: bsmaster.h:951
BOOLEAN NTAPI AtapiDmaPioSync(PVOID HwDeviceExtension, PSCSI_REQUEST_BLOCK Srb, PUCHAR data, ULONG count)
Definition: id_dma.cpp:467
VOID NTAPI AtapiDmaStart(IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG lChannel, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_dma.cpp:588
struct _SENSE_DATA * PSENSE_DATA
union _CDB * PCDB
struct _MODE_PARAMETER_HEADER * PMODE_PARAMETER_HEADER
NTSTATUS NTAPI CompleteRequest(IN PIRP Irp, IN NTSTATUS Status, IN ULONG_PTR Information)
Definition: dispatch.c:19
ULONG NTAPI AtapiSendCommand(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb, IN ULONG CmdAction)
Definition: id_ata.cpp:7377
VOID NTAPI UniataSnapAtaRegs(IN PHW_CHANNEL chan, IN ULONG DeviceNumber, IN OUT PIDEREGS_EX regs)
Definition: id_ata.cpp:1476
PSCSI_REQUEST_BLOCK NTAPI BuildRequestSenseSrb(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_ata.cpp:11245
VOID NTAPI AtapiHwInitializeChanger(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb, IN PMECHANICAL_STATUS_INFORMATION_HEADER MechanismStatus)
Definition: id_ata.cpp:3667
ULONG NTAPI MapError(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_ata.cpp:2951
RETTYPE_XXableInterrupts NTAPI AtapiInterruptDpc(IN PVOID HwDeviceExtension)
Definition: id_ata.cpp:4295
PSCSI_REQUEST_BLOCK NTAPI BuildMechanismStatusSrb(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_ata.cpp:11201
BOOLEAN NTAPI UniataAhciAbortOperation(IN PHW_CHANNEL chan)
Definition: id_sata.cpp:1765
UCHAR NTAPI UniataAhciEndTransaction(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_sata.cpp:2294
struct _SRB_IO_CONTROL SRB_IO_CONTROL
Definition: uata_ctl.h:234
Definition: cdrw_hw.h:2504
Definition: helper.h:24
Definition: cdrw_hw.h:1163
UCHAR AdditionalSenseCodeQualifier
Definition: cdrw_hw.h:1176
Definition: scsi_port.h:124
struct _IDEREGS_EX * PIDEREGS_EX
struct _ATA_REQ::@1284::@1286::@1290::@1293 ahci
Definition: cdrw_hw.h:28
struct _CDB::_CDB6 CDB6
Referenced by AtapiCallBack__(), AtapiEnableInterrupts__(), AtapiInterrupt(), and AtapiInterruptDpc().
◆ AtapiInterruptDpc()
| RETTYPE_XXableInterrupts NTAPI AtapiInterruptDpc | ( | IN PVOID | HwDeviceExtension | ) |
Definition at line 4295 of file id_ata.cpp.
4298{
4301
4304
4306
4310 {
4311 continue;
4312 }
4313
4314 } else {
4316 }
4317/*
4318 if(OldReqState != REQ_STATE_DPC_INTR_REQ) {
4319 AtapiDisableInterrupts(deviceExtension, lChannel);
4320 }
4321*/
4325 }
4326 }
4328} // end AtapiInterruptDpc()
Referenced by AtapiInterrupt__().
◆ AtaPio2Mode()
Definition at line 1205 of file id_ata.cpp.
1206{
1207 switch (pio) {
1215 }
1216} // end AtaPio2Mode()
◆ AtaPioMode()
| LONG NTAPI AtaPioMode | ( | PIDENTIFY_DATA2 | ident | ) |
Definition at line 1220 of file id_ata.cpp.
1221{
1224 return 5;
1226 return 4;
1228 return 3;
1229 }
1231 return 2;
1233 return 1;
1235 return 0;
1237} // end AtaPioMode()
Referenced by AtapiDmaInit__(), AtapiDmaReinit(), and AtaSetTransferMode().
◆ AtapiParseArgumentString()
Definition at line 3705 of file id_ata.cpp.
3709{
3710 PCCH cptr;
3711 PCCH kptr;
3713 ULONG stringLength = 0;
3714 ULONG keyWordLength = 0;
3716
3718 return 0;
3719 }
3720 if (!KeyWord) {
3721 return 0;
3722 }
3723
3724 // Calculate the string length and lower case all characters.
3725 cptr = String;
3726 while (*cptr++) {
3727 stringLength++;
3728 }
3729
3730 // Calculate the keyword length.
3731 kptr = KeyWord;
3732 while (*kptr++) {
3733 keyWordLength++;
3734 }
3735
3736 if (keyWordLength > stringLength) {
3737
3738 // Can't possibly have a match.
3739 return 0;
3740 }
3741
3742 // Now setup and start the compare.
3743 cptr = String;
3744
3745ContinueSearch:
3746
3747 // The input string may start with white space. Skip it.
3748 while (*cptr == ' ' || *cptr == '\t') {
3749 cptr++;
3750 }
3751
3752 if (*cptr == '\0') {
3753 // end of string.
3754 return 0;
3755 }
3756
3757 kptr = KeyWord;
3758 while ((*cptr == *kptr) ||
3759 (*cptr >= 'A' && *cptr <= 'Z' && *cptr + ('a' - 'A') == *kptr) ||
3760 (*cptr >= 'a' && *cptr <= 'z' && *cptr - ('a' - 'A') == *kptr)) {
3761 cptr++;
3762 kptr++;
3763
3764 if (*cptr == '\0') {
3765 // end of string
3766 return 0;
3767 }
3768 }
3769
3770 if (*kptr == '\0') {
3771
3772 // May have a match backup and check for blank or equals.
3773 while (*cptr == ' ' || *cptr == '\t') {
3774 cptr++;
3775 }
3776
3777 // Found a match. Make sure there is an equals.
3778 if (*cptr != '=') {
3779
3780 // Not a match so move to the next semicolon.
3781 while (*cptr) {
3782 if (*cptr++ == ';') {
3783 goto ContinueSearch;
3784 }
3785 }
3786 return 0;
3787 }
3788 // Skip the equals sign.
3789 cptr++;
3790
3791 // Skip white space.
3792 while ((*cptr == ' ') || (*cptr == '\t')) {
3793 cptr++;
3794 }
3795
3796 if (*cptr == '\0') {
3797 // Early end of string, return not found
3798 return 0;
3799 }
3800
3801 if (*cptr == ';') {
3802 // This isn't it either.
3803 cptr++;
3804 goto ContinueSearch;
3805 }
3806
3807 value = 0;
3808 if ((*cptr == '0') && ((*(cptr + 1) == 'x') || (*(cptr + 1) == 'X'))) {
3809 // Value is in Hex. Skip the "0x"
3810 cptr += 2;
3812
3816 break;
3817 }
3818
3821 } else {
3826 } else {
3827 // Syntax error, return not found.
3828 return 0;
3829 }
3830 }
3831 }
3832 } else {
3833
3834 // Value is in Decimal.
3836
3840 break;
3841 }
3842
3845 } else {
3846
3847 // Syntax error return not found.
3848 return 0;
3849 }
3850 }
3851 }
3852
3854 } else {
3855
3856 // Not a match check for ';' to continue search.
3857 while (*cptr) {
3858 if (*cptr++ == ';') {
3859 goto ContinueSearch;
3860 }
3861 }
3862
3863 return 0;
3864 }
3865} // end AtapiParseArgumentString()_
Definition: pdh_main.c:96
◆ AtapiQueueTimerDpc()
| VOID NTAPI AtapiQueueTimerDpc | ( | IN PVOID | HwDeviceExtension, |
| IN ULONG | lChannel, | ||
| IN PHW_TIMER | HwScsiTimer, | ||
| IN ULONG | MiniportTimerValue | ||
| ) |
Definition at line 1378 of file id_ata.cpp.
1384{
1387 LARGE_INTEGER time2;
1389 PHW_CHANNEL prev_chan;
1390 PHW_CHANNEL chan;
1391// BOOLEAN UseRequestTimerCall = TRUE;
1392
1393 KdPrint2((PRINT_PREFIX "AtapiQueueTimerDpc: dt=%d for lChn %#x\n", MiniportTimerValue, lChannel));
1395 time2 = time;
1396 KdPrint2((PRINT_PREFIX "AtapiQueueTimerDpc: KeQuerySystemTime=%#x%#x\n", time.HighPart, time.LowPart));
1397 time.QuadPart += MiniportTimerValue*10;
1398 KdPrint2((PRINT_PREFIX "AtapiQueueTimerDpc: KeQuerySystemTime2=%#x%#x\n", time.HighPart, time.LowPart));
1399
1400 KdPrint2((PRINT_PREFIX " ActiveDpcChan=%d, FirstDpcChan=%d\n", deviceExtension->ActiveDpcChan, deviceExtension->FirstDpcChan));
1401
1403 chan = prev_chan = NULL;
1405 prev_chan = chan;
1408 break;
1409 }
1411 }
1412 chan = &(deviceExtension->chan[lChannel]);
1413 if(!prev_chan) {
1414 deviceExtension->FirstDpcChan = lChannel;
1415 } else {
1416 prev_chan->NextDpcChan = lChannel;
1417 }
1419 chan->HwScsiTimer = HwScsiTimer;
1421
1422 KdPrint2((PRINT_PREFIX "AtapiQueueTimerDpc: KeQuerySystemTime3=%#x%#x\n", time2.HighPart, time2.LowPart));
1424 MiniportTimerValue = 1;
1425 } else {
1427 }
1428
1429 KdPrint2((PRINT_PREFIX "AtapiQueueTimerDpc: dt=%d for lChn %#x\n", MiniportTimerValue, lChannel));
1431 AtapiTimerDpc,
1432 MiniportTimerValue);
1433
1434} // end AtapiQueueTimerDpc()
Definition: typedefs.h:103
Referenced by AtapiCallBack__(), and AtapiInterrupt__().
◆ AtapiReadPortBufferN_template() [1/2]
◆ AtapiReadPortBufferN_template() [2/2]
◆ AtapiReadPortExN_template() [1/2]
◆ AtapiReadPortExN_template() [2/2]
◆ AtapiReadPortN_template() [1/3]
◆ AtapiReadPortN_template() [2/3]
◆ AtapiReadPortN_template() [3/3]
◆ AtapiRegCheckDevLunValue()
| ULONG NTAPI AtapiRegCheckDevLunValue | ( | IN PVOID | HwDeviceExtension, |
| IN PCWCH | NamePrefix, | ||
| IN ULONG | chan, | ||
| IN ULONG | dev, | ||
| IN PCWSTR | Name, | ||
| IN ULONG | Default | ||
| ) |
Definition at line 11289 of file id_ata.cpp.
11297{
11298 WCHAR namex[160];
11300
11303
11312 }
11313 }
11315} // end AtapiRegCheckDevLunValue()
ULONG NTAPI AtapiRegCheckParameterValue(IN PVOID HwDeviceExtension, IN PCWSTR PathSuffix, IN PCWSTR Name, IN ULONG Default)
Definition: id_ata.cpp:11518
Definition: volpropsheet.cpp:158
Referenced by AtapiRegCheckDevValue().
◆ AtapiRegCheckDevValue()
| ULONG NTAPI AtapiRegCheckDevValue | ( | IN PVOID | HwDeviceExtension, |
| IN ULONG | chan, | ||
| IN ULONG | dev, | ||
| IN PCWSTR | Name, | ||
| IN ULONG | Default | ||
| ) |
Definition at line 11359 of file id_ata.cpp.
11366{
11368// WCHAR name0[11];
11369// WCHAR name1[11+4+5];
11370// WCHAR name2[11+4+4+10];
11371// WCHAR name3[11+4+4+5+20];
11372// WCHAR name3[11+4+4+5+20+1];
11373 WCHAR namex[160];
11374
11375 WCHAR namev[16];
11376 WCHAR named[16];
11378
11383
11385
11387
11388 if(deviceExtension) {
11389 VendorID = deviceExtension->DevID & 0xffff;
11392 HwFlags = deviceExtension->HwFlags;
11393 } else {
11394 VendorID = 0xffff;
11395 DeviceID = 0xffff;
11396 SlotNumber = 0xffffffff;
11397 HwFlags = 0;
11398 }
11399
11402
11403 if(deviceExtension) {
11404
11410 }
11416 }
11422 }
11423
11425 // PCI
11430
11435
11436
11440
11444
11448
11452 } else
11454 // Isa
11459
11464
11469
11470 } else
11472 // MicroChannel
11477
11482
11487
11488 }
11489 }
11490
11493
11494} // end AtapiRegCheckDevValue()
ULONG NTAPI AtapiRegCheckDevLunValue(IN PVOID HwDeviceExtension, IN PCWCH NamePrefix, IN ULONG chan, IN ULONG dev, IN PCWSTR Name, IN ULONG Default)
Definition: id_ata.cpp:11289
_Must_inspect_result_ _In_ PWDFDEVICE_INIT _In_ PCUNICODE_STRING DeviceID
Definition: wdfpdo.h:278
Referenced by AtapiFindIsaController(), AtapiReadChipConfig(), DriverEntry(), UniataAhciDetect(), UniAtaAhciValidateVersion(), UniataChipDetect(), UniataChipDetectChannels(), UniataEnumBusMasterController__(), UniataFindBusMasterController(), and UniAtaReadLunConfig().
◆ AtapiRegCheckParameterValue()
| ULONG NTAPI AtapiRegCheckParameterValue | ( | IN PVOID | HwDeviceExtension, |
| IN PCWSTR | PathSuffix, | ||
| IN PCWSTR | Name, | ||
| IN ULONG | Default | ||
| ) |
Definition at line 11518 of file id_ata.cpp.
11524{
11525#define ITEMS_TO_QUERY 2 // always 1 greater than what is searched
11526
11527// PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
11530
11532
11533// LONG tmp = 0;
11535
11537
11538 UNICODE_STRING paramPath;
11539
11541 goto failed;
11542 }
11543
11544 // <SavedRegPath><PathSuffix> -> <Name>
11545// KdPrint(( "AtapiCheckRegValue: %ws -> %ws\n", PathSuffix, Name));
11546// KdPrint(( "AtapiCheckRegValue: RegistryPath %ws\n", RegistryPath->Buffer));
11547
11548 paramPath.Length = 0;
11555 }
11556
11561
11562 // Check for the Xxx value.
11564
11567 parameters[0].EntryContext = &doRun;
11571
11576 }
11577
11579
11581failed:
11582 doRun = Default;
11583 }
11584
11585 return doRun;
11586
11587#undef ITEMS_TO_QUERY
11588
11589} // end AtapiRegCheckParameterValue()
NTSTATUS RtlAppendUnicodeToString(IN PUNICODE_STRING Str1, IN PWSTR Str2)
Definition: string_lib.cpp:62
#define ITEMS_TO_QUERY
_CRTIMP size_t __cdecl wcslen(_In_z_ const wchar_t *_Str)
NTSYSAPI NTSTATUS WINAPI RtlQueryRegistryValues(ULONG, PCWSTR, PRTL_QUERY_REGISTRY_TABLE, PVOID, PVOID)
Definition: nt_native.h:108
Definition: env_spec_w32.h:368
_Must_inspect_result_ _In_ PDRIVER_OBJECT _In_ PCUNICODE_STRING RegistryPath
Definition: wdfdriver.h:215
Referenced by AtapiRegCheckDevLunValue(), and DriverEntry().
◆ AtapiRegGetStringParameterValue()
| BOOLEAN NTAPI AtapiRegGetStringParameterValue | ( | IN PWSTR | RegistryPath, |
| IN PWSTR | Name, | ||
| IN PWCHAR | Str, | ||
| IN ULONG | MaxLen | ||
| ) |
Definition at line 198 of file id_ata.cpp.
204{
205#define ITEMS_TO_QUERY 2 // always 1 greater than what is searched
208 UNICODE_STRING ustr;
209
211 ustr.Length =
214
217 parameters[0].EntryContext = &ustr;
220 parameters[0].DefaultLength = MaxLen;
221
224
227
229
230#undef ITEMS_TO_QUERY
231} // end AtapiRegGetStringParameterValue()
◆ AtapiResetController()
Definition at line 2411 of file id_ata.cpp.
2415{
2418} // end AtapiResetController()
Referenced by AtapiAdapterControl(), and DriverEntry().
◆ AtapiResetController__()
| BOOLEAN NTAPI AtapiResetController__ | ( | IN PVOID | HwDeviceExtension, |
| IN ULONG | PathId, | ||
| IN UCHAR | CompleteType | ||
| ) |
Definition at line 2422 of file id_ata.cpp.
2427{
2432 ULONG MaxLuns;
2433 UCHAR statusByte;
2434 PSCSI_REQUEST_BLOCK CurSrb;
2435 ULONG ChannelCtrlFlags;
2436 UCHAR dma_status = 0;
2437
2441#ifdef _DEBUG
2443#endif
2444 //ULONG RevID = deviceExtension->RevID;
2446 //UCHAR tmp8;
2447 USHORT tmp16;
2448
2449 KdPrint2((PRINT_PREFIX "AtapiResetController: Reset IDE %#x/%#x @ %#x\n", VendorID, DeviceID, slotNumber));
2450 KdPrint2((PRINT_PREFIX "simplexOnly %d, VM %x\n", deviceExtension->simplexOnly, g_opt_VirtualMachine));
2451
2453 // we shall reset both channels on SimplexOnly devices,
2454 // It's not worth doing so on normal controllers
2457 } else {
2458 j=0;
2459 numberChannels = deviceExtension->NumberChannels;
2460 }
2461
2463
2464 KdPrint2((PRINT_PREFIX "AtapiResetController: Reset lchannel %d[%d]\n", j, deviceExtension->Channel));
2466 MaxLuns = chan->NumberLuns;
2467 // Save control flags
2468 ChannelCtrlFlags = chan->ChannelCtrlFlags;
2469 KdPrint2((PRINT_PREFIX " CompleteType %#x, Luns %d, chan %#x, sptr %#x, flags %#x\n", CompleteType, MaxLuns, chan, &chan, ChannelCtrlFlags));
2470 //MaxLuns = (chan->ChannelCtrlFlags & CTRFLAGS_NO_SLAVE) ? 1 : 2;
2472#ifndef UNIATA_CORE
2474
2475 PHW_LU_EXTENSION LunExt;
2477
2481
2485
2489 }
2490 }
2491 // Check and see if we are processing an internal srb
2497 // NOTE: internal SRB doesn't get to SRB queue !!!
2498 CurSrb = AtaReq->Srb;
2499 }
2500
2501 // Remove current request from queue
2502 UniataRemoveRequest(chan, CurSrb);
2503
2504 // Check if request is in progress.
2506 if (CurSrb) {
2507 // Complete outstanding request with SRB_STATUS_BUS_RESET.
2511
2512 CurSrb->SrbStatus = ((CompleteType == RESET_COMPLETE_ALL) ? SRB_STATUS_BUS_RESET : SRB_STATUS_ABORTED) | SRB_STATUS_AUTOSENSE_VALID;
2514
2516
2518 KdPrint2((PRINT_PREFIX " senseBuffer %#x, chan %#x, ReqFlags %#x\n", senseBuffer, chan, AtaReq->Flags));
2519
2520 senseBuffer->ErrorCode = 0x70;
2521 senseBuffer->Valid = 1;
2522 senseBuffer->AdditionalSenseLength = 0xb;
2524 KdPrint2((PRINT_PREFIX "AtapiResetController: report SCSI_SENSE_UNIT_ATTENTION + SCSI_ADSENSE_BUS_RESET\n"));
2528 } else {
2531 senseBuffer->AdditionalSenseCode = 0;
2532 senseBuffer->AdditionalSenseCodeQualifier = 0;
2533 }
2534 }
2535
2541 //KdPrint2((PRINT_PREFIX "AtaReq->Flags & REQ_FLAG_RW_MASK = %x (%x)\n", (AtaReq->Flags & REQ_FLAG_RW_MASK), REQ_FLAG_READ));
2542 //KdPrint2((PRINT_PREFIX "ChannelCtrlFlags & CTRFLAGS_DMA_OPERATION = %x (%x)\n", ChannelCtrlFlags & CTRFLAGS_DMA_ACTIVE, CTRFLAGS_DMA_OPERATION));
2543 //KdPrint2((PRINT_PREFIX "g_opt_VirtualMachine = %x (%x)\n", g_opt_VirtualMachine, VM_BOCHS));
2545 (ChannelCtrlFlags & CTRFLAGS_DMA_OPERATION) &&
2550 } else {
2552 }
2553 } else
2560 (ChannelCtrlFlags & CTRFLAGS_DMA_OPERATION) &&
2563 //g_opt_BochsDmaReadWorkaround = TRUE;
2565 } else {
2567 }
2568 } else {
2569 LunExt->errRetry = 0;
2570 }
2571
2572 // Clear request tracking fields.
2573 AtaReq->WordsLeft = 0;
2575 AtaReq->TransferLength = 0;
2577
2579 deviceExtension,
2580 CurSrb);
2581
2582 // Indicate ready for next request.
2584 deviceExtension,
2585 CurPathId,
2586 TargetId,
2587 Lun);
2588 }
2590 break;
2591 } // end while()
2592#endif //UNIATA_CORE
2593 } // end if (!CompleteType != RESET_COMPLETE_NONE)
2594
2595 // Clear expecting interrupt flag.
2600 CHECK_INTR_IDLE);
2601
2604 }
2605 // Reset controller
2609#ifdef _DEBUG
2610 UniataDumpAhciPortRegs(chan);
2611#endif
2614 } else {
2616 continue;
2617 }
2618 } else {
2623 switch(VendorID) {
2626 ULONG pshift;
2629 goto default_reset;
2630 }
2632 goto default_reset;
2633 }
2634
2635#if 0
2636 /* ICH6 & ICH7 in compat mode has 4 SATA ports as master/slave on 2 ch's */
2639 } else {
2640 /* ICH5 in compat mode has SATA ports as master/slave on 1 channel */
2641 GetPciConfig1(0x90, tmp8);
2642 if(tmp8 & 0x04) {
2643 mask = 0x0003;
2644 } else {
2646 }
2647 }
2648#else
2650 if (MaxLuns > 1) {
2652 }
2653#endif
2655 AtapiStallExecution(10);
2657 timeout = 100;
2658
2659 /* Wait up to 1 sec for "connect well". */
2661 pshift = 8;
2662 } else {
2663 pshift = 4;
2664 }
2666 GetPciConfig2(0x92, tmp16);
2668 GetBaseStatus(chan, statusByte);
2670 break;
2671 }
2672 }
2673 AtapiStallExecution(10000);
2674 }
2675 break; }
2679 goto default_reset;
2680 break; }
2681#if 0
2685 goto default_reset;
2686 break; }
2687#else
2689 ULONG offs;
2693 goto default_reset;
2694 }
2695 offs = (ChipFlags & NV4OFF) ? 0x0440 : 0x0010;
2696
2698 /* disable device and PHY state change interrupts */
2702 AtapiReadPortEx4(NULL, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0),offs+4) & ((~(ULONG)0x0000000d) << (!Channel*16)) );
2703 } else {
2705 AtapiReadPortEx1(NULL, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0),offs+1) & ((~(UCHAR)0x0d) << (!Channel*4)) );
2706 }
2708
2710 /* enable device and PHY state change interrupts */
2713 AtapiReadPortEx4(NULL, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0),offs+4) | (((ULONG)0x0000000d) << (!Channel*16)) );
2714 } else {
2716 AtapiReadPortEx1(NULL, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0),offs+1) | (((UCHAR)0x0d) << (!Channel*4)) );
2717 }
2718
2721 goto default_reset;
2722 }
2723 break; }
2724#endif //0
2729 goto default_reset;
2730 offset = ((Channel & 1) << 7) + ((Channel & 2) << 8);
2731 /* disable PHY state change interrupt */
2732 AtapiWritePortEx4(NULL, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0), 0x148 + offset, 0);
2733
2735
2736 /* reset controller part for this channel */
2738 AtapiReadPortEx4(NULL, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0), 0x48) | (0xc0 >> Channel));
2739 AtapiStallExecution(1000);
2741 AtapiReadPortEx4(NULL, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0), 0x48) & ~(0xc0 >> Channel));
2742
2743
2744 break; }
2746 break; }
2747 default:
2751 }
2752default_reset:
2753/*
2754 AtapiWritePort1(chan, IDX_IO2_o_Control, IDE_DC_DISABLE_INTERRUPTS |
2755 IDE_DC_RESET_CONTROLLER );
2756 chan->last_devsel = -1;
2757 KdPrint2((PRINT_PREFIX " wait a little\n"));
2758 AtapiStallExecution(10000);
2759 // Disable interrupts
2760 KdPrint2((PRINT_PREFIX " disable intr\n"));
2761 AtapiDisableInterrupts(deviceExtension, j);
2762 AtapiStallExecution(100);
2763 KdPrint2((PRINT_PREFIX " re-enable intr\n"));
2764 AtapiEnableInterrupts(deviceExtension, j);
2765 KdPrint2((PRINT_PREFIX " wait a little (2)\n"));
2766 AtapiStallExecution(100000);
2767*/
2771 AtapiStallExecution(100);
2775
2776 break;
2777 } // end switch()
2778
2779 //if(!(ChipFlags & UNIATA_SATA)) {}
2781 // Reset DMA engine if active
2786 (dma_status & BM_STATUS_INTR)) {
2788 }
2789 }
2790 } // ATA vs AHCI
2791
2792 // all these shall be performed inside AtapiHwInitialize__() ?
2793#if 1
2795 // Do special processing for ATAPI and IDE disk devices.
2797
2798 // Check if device present.
2804 // everything is done in UniataAhciReset()
2806 continue;
2807 }
2808#ifdef NAVO_TEST
2809 continue;
2810#else //NAVO_TEST
2811 //if(!CheckDevice(HwDeviceExtension, i, j, FALSE))
2813 continue;
2814 }
2816 continue;
2817 }
2818 } else {
2820 // everything is done in UniataAhciReset()
2822
2827 FALSE)) {
2830 }
2831 continue;
2832 }
2836 }
2837#endif //NAVO_TEST
2838 }
2839
2841 AtapiStallExecution(10);
2842 statusByte = WaitOnBusyLong(chan);
2843 statusByte = UniataIsIdle(deviceExtension, statusByte);
2846 "no drive, status %#x\n",
2847 statusByte));
2849 } else
2850 // Check for ATAPI disk.
2852 // Issue soft reset and issue identify.
2853 GetStatus(chan, statusByte);
2855 statusByte));
2856
2860
2861 GetStatus(chan, statusByte);
2862
2867 // device reset in progress, perform additional wait
2869 k = 30 * 1000;
2871 k--)
2872 {
2873 AtapiStallExecution(150);
2874 }
2876 GetStatus(chan, statusByte);
2877 }
2878 }
2880
2881 IssueIdentify(HwDeviceExtension,
2884 } else {
2885
2887 "AtapiResetController: Status after soft reset %#x\n",
2888 statusByte));
2889 }
2890 GetBaseStatus(chan, statusByte);
2891
2892 } else {
2893 // Issue identify and reinit after channel reset.
2894
2896 statusByte != IDE_STATUS_SUCCESS &&
2897 statusByte != IDE_STATUS_DRDY) {
2898// result2 = FALSE;
2900 } else
2904// result2 = FALSE;
2906 } else
2907 // Set disk geometry parameters.
2910 }
2911 GetBaseStatus(chan, statusByte);
2912 }
2913 // force DMA mode reinit
2916 }
2917#endif //0
2918
2919 // Enable interrupts, note, we can have here recursive disable
2920 AtapiStallExecution(10);
2921 KdPrint2((PRINT_PREFIX "AtapiResetController: deviceExtension->chan[%d].DisableIntr %d -> 1\n",
2922 j,
2923 chan->DisableIntr));
2925
2926 // Call the HwInitialize routine to setup multi-block.
2928 } // for(channel)
2930
2932
2933} // end AtapiResetController__()
BOOLEAN NTAPI SetDriveParameters(IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG lChannel)
Definition: id_ata.cpp:2338
BOOLEAN NTAPI IssueIdentify(IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG lChannel, IN UCHAR Command, IN BOOLEAN NoSetup)
Definition: id_ata.cpp:1529
VOID DDKFASTAPI AtapiHardReset(IN struct _HW_CHANNEL *chan, IN BOOLEAN DisableInterrupts, IN ULONG Delay)
Definition: id_ata.cpp:948
VOID NTAPI UniataAhciReset(IN PVOID HwDeviceExtension, IN ULONG lChannel)
Definition: id_sata.cpp:1925
UCHAR NTAPI UniataSataPhyEnable(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG pm_port, IN BOOLEAN doReset)
Definition: id_sata.cpp:124
Definition: dhcpd.h:248
ULONG NTAPI CheckDevice(IN PVOID HwDeviceExtension, IN ULONG Channel, IN ULONG deviceNumber, IN BOOLEAN ResetBus)
Definition: id_probe.cpp:2897
ULONG NTAPI UniataAnybodyHome(IN PVOID HwDeviceExtension, IN ULONG Channel, IN ULONG deviceNumber)
Definition: id_probe.cpp:2778
Referenced by AtapiHwInitialize(), AtapiInterrupt__(), AtapiResetController(), AtapiStartIo__(), IdeSendCommand(), and UniataUserDeviceReset().
◆ AtapiSendCommand()
| ULONG NTAPI AtapiSendCommand | ( | IN PVOID | HwDeviceExtension, |
| IN PSCSI_REQUEST_BLOCK | Srb, | ||
| IN ULONG | CmdAction | ||
| ) |
Definition at line 7377 of file id_ata.cpp.
7382{
7387 PHW_LU_EXTENSION LunExt;
7388 //ULONG ldev = GET_LDEV(Srb);
7391 UCHAR statusByte,statusByte0,byteCountLow,byteCountHigh;
7392 UCHAR interruptReason;
7397 UCHAR FeatureReg=0;
7398
7400
7401 KdPrint3((PRINT_PREFIX "AtapiSendCommand: req state %#x, Action %x\n", AtaReq->ReqState, CmdAction));
7404
7405
7406#ifdef UNIATA_DUMP_ATAPI
7408 UCHAR ScsiCommand;
7410 PCHAR CdbData;
7411 PCHAR ModeSelectData;
7412 ULONG CdbDataLen;
7413
7418
7419 if(CdbDataLen > 0x1000) {
7420 CdbDataLen = 0x1000;
7421 }
7422
7431
7438 ));
7439 } else
7446 ));
7447 } else
7458 ));
7459 } else
7463 ModeSelectData = CdbData+4;
7464 KdDump(CdbData, CdbDataLen);
7465 } else
7469 ModeSelectData = CdbData+8;
7470 KdDump(CdbData, CdbDataLen);
7471 } else {
7474 KdDump(CdbData, CdbDataLen);
7475 }
7476 }
7478 }
7479#endif //UNIATA_DUMP_ATAPI
7480
7481
7484
7494 // all right
7495 break;
7499 // all right
7500 break;
7501 }
7502 /* FALL THROUGH */
7503 default:
7506 }
7507 //
7508#ifdef UNIATA_INIT_CHANGERS
7510 !AtaReq->OriginalSrb) {
7513 }
7514#endif // UNIATA_INIT_CHANGERS
7515 }
7516
7517#ifndef UNIATA_CORE
7518 // standard atapi.sys claims:
7519
7520 // We need to know how many platters our atapi cd-rom device might have.
7521 // Before anyone tries to send a srb to our target for the first time,
7522 // we must "secretly" send down a separate mechanism status srb in order to
7523 // initialize our device extension changer data. That's how we know how
7524 // many platters our target has.
7525
7526 // BUT!
7527 // some devices freeze (sometimes) forever on this command
7528 // Let CD-ROM driver send this command itself, if it find it necessary
7529 // We shall just parse output (if any)
7530
7531#ifdef UNIATA_INIT_CHANGERS
7533 !AtaReq->OriginalSrb) {
7534
7535 ULONG srbStatus;
7536
7538 // Set this flag now. If the device hangs on the mech. status
7539 // command, we will not have the chance to set it.
7541
7542 chan->MechStatusRetryCount = 3;
7545 HwDeviceExtension,
7546 Srb);
7547
7552 return srbStatus;
7553 } else {
7554
7555 // failed! Get the sense key and maybe try again
7557 AtaReq->OriginalSrb);
7558
7560
7561 KdPrint3((PRINT_PREFIX "AtapiSendCommand: chan->ExpectingInterrupt %d (1)\n", chan->ExpectingInterrupt));
7562
7565 return srbStatus;
7566 }
7567
7568 // failed again ? should not get here
7571 // fall out
7572 }
7573 }
7574#endif // UNIATA_INIT_CHANGERS
7575#endif //UNIATA_CORE
7576
7579
7580 KdPrint2((PRINT_PREFIX "AtapiSendCommand: prepare..., ATAPI CMD %x (Cdb %x)\n", Srb->Cdb[0], &(Srb->Cdb)));
7581
7586 }
7587
7588 // Set data buffer pointer and words left.
7593 // reset this to force PRD init. May be already setup by recursive SRB
7594 AtaReq->dma_entries = 0;
7595
7596 // check if reorderable
7600
7603 goto GetLba2;
7604
7607
7609 goto GetLba;
7610
7613
7615GetLba:
7617GetLba2:
7619 AtaReq->Flags &= ~REQ_FLAG_RW_MASK;
7624 break;
7625 default:
7626 AtaReq->Flags &= ~REQ_FLAG_RW_MASK;
7629 } else
7633 } else
7637 }
7638 break;
7639 }
7640
7641 // check if DMA read/write
7644 use_dma = FALSE;
7645 } else
7648 use_dma = TRUE;
7649 goto setup_dma;
7650 } else
7651/* if((deviceExtension->HwFlags & UNIATA_SATA) && (LunExt->OrigTransferMode >= ATA_DMA)) {
7652 KdPrint2((PRINT_PREFIX "AtapiSendCommand: force use dma (sata)\n"));
7653 use_dma = TRUE;
7654 goto setup_dma;
7655 } else*/
7658 } else
7661 // try use DMA if TransferLength is 16-byte aligned
7668 break;
7669 /* FALLTHROUGH */
7674
7676call_dma_setup:
7679 use_dma = TRUE;
7680 } else
7684 /*((Srb->DataTransferLength + DEV_BSIZE-1) & ~(DEV_BSIZE-1))*/
7685 )) {
7687 use_dma = TRUE;
7688 }
7689 }
7690 break;
7694 goto call_dma_setup;
7695 break;
7696 default:
7697
7700 // read operation
7701 use_dma = TRUE;
7702 } else {
7703 // write operation
7706 use_dma = FALSE;
7707 } else {
7708 use_dma = TRUE;
7709 }
7710 }
7711 }
7712 break;
7713 }
7714 // try setup DMA
7715setup_dma:
7716 if(use_dma) {
7719 //use_dma = TRUE;
7720 } else
7725 use_dma = FALSE;
7726 } else {
7728 }
7729 }
7730 } else {
7731 KdPrint2((PRINT_PREFIX "AtapiSendCommand: zero/unaligned transfer %x, no DMA setup\n", AtaReq->TransferLength));
7732 }
7733
7734
7736
7737 UniataAhciSetupCmdPtr(AtaReq);
7738
7741 use_dma = FALSE;
7742 } else
7748 }
7749 if(!use_dma) {
7750 AtaReq->Flags &= ~REQ_FLAG_DMA_OPERATION;
7751 } else {
7752 FeatureReg |= ATA_F_DMA;
7756 FeatureReg |= ATA_F_DMAREAD;
7757 }
7758 }
7759 }
7760
7762 // this is done in UniataAhciSetupFIS_H2D()
7763 //RtlZeroMemory(&(AtaReq->ahci.ahci_cmd_ptr->cfis), sizeof(AtaReq->ahci_cmd0.cfis));
7765
7767 &(AtaReq->ahci.ahci_cmd_ptr->cfis[0]),
7769 0 /* lba */,
7771 FeatureReg/* feature */
7772 );
7773
7774 if(!fis_size) {
7777 }
7778
7782 fis_size, DeviceNumber);
7783
7785 }
7786
7787 } else {
7789 // if this is queued request, reinit DMA and check
7790 // if DMA mode is still available
7792 AtapiDmaReinit(deviceExtension, LunExt, AtaReq);
7793 if (/*EnableDma &&*/
7796 use_dma = TRUE;
7797 } else {
7798 AtaReq->Flags &= ~REQ_FLAG_DMA_OPERATION;
7800 use_dma = FALSE;
7801 }
7802 dma_reinited = TRUE;
7803 }
7804 }
7805
7809 }
7813 }
7814
7817 use_dma = FALSE;
7818 AtaReq->Flags &= ~REQ_FLAG_DMA_OPERATION;
7819 AtapiDmaReinit(deviceExtension, LunExt, AtaReq);
7821 if(!dma_reinited) {
7823 AtapiDmaReinit(deviceExtension, LunExt, AtaReq);
7824 if (/*EnableDma &&*/
7826 use_dma = TRUE;
7827 } else {
7828 AtaReq->Flags &= ~REQ_FLAG_DMA_OPERATION;
7829 use_dma = FALSE;
7830 }
7831 }
7832 } else {
7834 use_dma = FALSE;
7835 AtaReq->Flags &= ~REQ_FLAG_DMA_OPERATION;
7838 AtapiDmaReinit(deviceExtension, LunExt, AtaReq);
7839 }
7840 }
7844 }
7845
7847
7850
7851 // Make sure command is to ATAPI device.
7855
7856 // Indicate no device found at this address.
7859 }
7863 }
7864
7868 }
7869retry:
7870 // Select device 0 or 1. Or more for PM
7872
7873 // Verify that controller is ready for next command.
7874 GetStatus(chan, statusByte);
7876
7879 goto make_reset;
7880 }
7884 } else {
7886 // We have to make reset here, since we are expecting device to be available
7887 //return SRB_STATUS_BUSY; // this cause queue freeze
7888 goto make_reset;
7889 }
7890 }
7893 // Check if command list is free
7896 // controller is busy, however we expect it to be free
7898 goto make_reset;
7899 }
7900 }
7903
7905 // Read the error reg. to clear it and fail this request.
7908 } else {
7910 }
7911 }
7912 // If a tape drive doesn't have DSC set and the last command is restrictive, don't send
7913 // the next command. See discussion of Restrictive Delayed Process commands in QIC-157.
7916
7917 AtapiStallExecution(200);
7918 KdPrint2((PRINT_PREFIX "AtapiSendCommand: DSC not set. %#x => SRB_STATUS_PENDING\n",statusByte));
7921 }
7922
7926 } else {
7928 }
7930
7931 KdPrint3((PRINT_PREFIX "AtapiSendCommand: Entered with status (%#x). Attempting to recover.\n",
7932 statusByte));
7933 // Try to drain the data that one preliminary device thinks that it has
7934 // to transfer. Hopefully this random assertion of DRQ will not be present
7935 // in production devices.
7936 statusByte = AtapiSuckPort2(chan);
7937/*
7938 for (i = 0; i < 0x10000; i++) {
7939 GetStatus(chan, statusByte);
7940 if(statusByte & IDE_STATUS_DRQ) {
7941 AtapiReadPort2(chan, IDX_IO1_i_Data);
7942 } else {
7943 break;
7944 }
7945 }
7946*/
7949make_reset:
7950 AtapiDisableInterrupts(deviceExtension, lChannel);
7951
7953
7955 // Re-initialize Atapi device.
7957/*
7958 IssueIdentify(HwDeviceExtension, DeviceNumber, GET_CHANNEL(Srb),
7959 IDE_COMMAND_ATAPI_IDENTIFY, FALSE);
7960*/
7961 // Inform the port driver that the bus has been reset.
7963 // Clean up device extension fields that AtapiStartIo won't.
7967 CHECK_INTR_IDLE);
7968
7969 AtapiEnableInterrupts(deviceExtension, lChannel);
7970/*
7971 AtaReq->ReqState = REQ_STATE_TRANSFER_COMPLETE;
7972 return SRB_STATUS_BUS_RESET;
7973*/
7974 if(!retried) {
7976 retried = TRUE;
7977 goto retry;
7978 }
7982 }
7983 }
7984
7986 // As the cdrom driver sets the LUN field in the cdb, it must be removed.
7989 // Torisan changer. TUR's are overloaded to be platter switches.
7991 }
7992 }
7993
7994 // SETUP DMA !!!!!
7995
7996 if(use_dma) {
7998 } else {
7999 chan->ChannelCtrlFlags &= ~CTRFLAGS_DMA_OPERATION;
8000 }
8001
8004 //AtaReq->Flags = ~REQ_FLAG_DMA_OPERATION; // keep proped DMA flag for proper RETRY handling
8008 }
8009
8010 statusByte = WaitOnBusy(chan);
8012 statusByte));
8013
8014 if(use_dma) {
8015 FeatureReg |= ATA_F_DMA;
8018 FeatureReg |= ATA_F_DMAREAD;
8019 }
8020 }
8021 }
8022
8023 // Write transfer byte count to registers.
8025 byteCountLow = byteCountHigh = 0xFF;
8026 } else {
8029 }
8030
8031 KdPrint3((PRINT_PREFIX "AtapiSendCommand: F:%#x, CntHL:%#x:%#x.\n", FeatureReg, byteCountHigh, byteCountLow));
8032
8034 // This device interrupts when ready to receive the packet.
8036 statusByte));
8037
8041 CHECK_INTR_IDLE);
8042 // inform driver that packet command must be sent in ISR
8044 } else {
8045 // This device quickly sets DRQ when ready to receive the packet.
8047 statusByte));
8048
8052 CHECK_INTR_IDLE);
8053
8055 AtapiDisableInterrupts(deviceExtension, lChannel);
8056 }
8057 // remember status. Later we may check if error appeared after cmd packet
8058 statusByte0 = statusByte;
8059 }
8060
8061 // must be already selected, experimental for ROS BUG-9119
8062 //AtapiWritePort1(chan, IDX_IO1_o_DriveSelect, IDE_USE_LBA | (DeviceNumber ? IDE_DRIVE_2 : IDE_DRIVE_1) );
8065 //AtapiWritePort1(chan, IDX_ATAPI_IO1_o_Unused0, 0); // experimental for ROS BUG-9119
8066 //AtapiWritePort1(chan, IDX_ATAPI_IO1_o_Unused1, 0); // experimental for ROS BUG-9119
8069 // Write ATAPI packet command.
8070 AtapiWritePort1(chan, IDX_ATAPI_IO1_o_Command /*IDX_IO1_o_Command*/, IDE_COMMAND_ATAPI_PACKET);
8071
8073 // Wait for interrupt and send PACKET there
8076 }
8077
8078 WaitOnBusy(chan);
8079/*
8080 // Wait for DRQ.
8081 statusByte = WaitForDrq(chan);
8082
8083 // Need to read status register and clear interrupt (if any)
8084 GetBaseStatus(chan, statusByte);
8085
8086 if (!(statusByte & IDE_STATUS_DRQ)) {
8087 if(g_opt_AtapiSendDisableIntr) {
8088 AtapiEnableInterrupts(deviceExtension, lChannel);
8089 }
8090 KdPrint3((PRINT_PREFIX "AtapiSendCommand: DRQ never asserted (%#x)\n", statusByte));
8091 AtaReq->ReqState = REQ_STATE_TRANSFER_COMPLETE;
8092 return SRB_STATUS_ERROR;
8093 }
8094*/
8095 GetStatus(chan, statusByte);
8097
8098 //statusByte = WaitOnBaseBusy(chan);
8099
8100 // Indicate expecting an interrupt and wait for it.
8102
8105 GetStatus(chan, statusByte);
8106 } else {
8107 GetBaseStatus(chan, statusByte);
8108 }
8110 //KdPrint3((PRINT_PREFIX "AtapiSendCommand: iReason %x (%d)\n", interruptReason, i));
8113 break;
8114 }
8116#ifdef _DEBUG
8117// KdPrint3((PRINT_PREFIX "AtapiSendCommand: wait CoD, status (%#x)\n", interruptReason));
8118#endif // _DEBUG
8119 }
8126 AtapiEnableInterrupts(deviceExtension, lChannel);
8127 }
8131 if(statusByte >> 4) {
8132 GetBaseStatus(chan, statusByte);
8135 }
8136 goto make_reset;
8137// AtaReq->ReqState = REQ_STATE_TRANSFER_COMPLETE;
8138// return SRB_STATUS_ERROR;
8139 } else {
8140 KdPrint3((PRINT_PREFIX "AtapiSendCommand: ready for packet, status %#x, i=%d\n", interruptReason, i));
8141 }
8142 // clear interrupt
8143 GetBaseStatus(chan, statusByte);
8144
8147 }
8149 AtapiEnableInterrupts(deviceExtension, lChannel);
8150 }
8151
8152 // Send CDB to device.
8153 WriteBuffer(chan,
8155 LunExt->IdentifyData.AtapiCmdSize ? 8 : 6,
8157
8158 GetStatus(chan, statusByte);
8160
8161 // When we operate in DMA mode, we should not start transfer when there is an error on entry
8162 // Interrupt may never come in such case.
8164
8165 GetBaseStatus(chan, statusByte);
8167
8170
8171 // TODO: we should check interruptReason and decide what to do now
8172
8173 // Read the error reg. to clear it and fail this request.
8176 }
8178 // Some devices require this. If error condition is not checked in such a way,
8179 // device may not operate correctly and would be treated as failed
8180 // (and finally invisible for OS)
8182 // Read the error reg. to clear it and fail this request.
8185 if(statusByte >> 4) {
8186 GetBaseStatus(chan, statusByte);
8189 }
8190 }
8191
8194 }
8195
8197 CHECK_INTR_IDLE);
8199
8200 KdPrint3((PRINT_PREFIX "AtapiSendCommand: ExpectingInterrupt (%#x)\n", chan->ExpectingInterrupt));
8201
8204
8205} // end AtapiSendCommand()
BOOLEAN NTAPI AtapiDmaSetup(IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG lChannel, IN PSCSI_REQUEST_BLOCK Srb, IN PUCHAR data, IN ULONG count)
Definition: id_dma.cpp:247
VOID NTAPI AtapiDmaReinit(IN PHW_DEVICE_EXTENSION deviceExtension, IN PHW_LU_EXTENSION LunExt, IN PATA_REQ AtaReq)
Definition: id_dma.cpp:754
ULONG NTAPI UniataAhciSetupFIS_H2D(IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG DeviceNumber, IN ULONG lChannel, OUT PUCHAR fis, IN UCHAR command, IN ULONGLONG lba, IN USHORT count, IN USHORT feature)
Definition: id_sata.cpp:1241
UCHAR NTAPI UniataAhciBeginTransaction(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_sata.cpp:2171
__inline ULONG UniataAhciReadChannelPort4(IN PHW_CHANNEL chan, IN ULONG io_port_ndx)
Definition: id_sata.h:290
__inline USHORT UniAtaAhciAdjustIoFlags(IN UCHAR command, IN USHORT ahci_flags, IN ULONG fis_size, IN ULONG DeviceNumber)
Definition: id_sata.h:357
BOOLEAN opt_AtapiDmaControlCmd
Definition: bsmaster.h:1337
BOOLEAN opt_AtapiDmaZeroTransfer
Definition: bsmaster.h:1336
struct _CDB::_CDB16READWRITE CDB16READWRITE
struct _CDB::_WRITE_CD WRITE_CD
struct _CDB::_CDB12READWRITE CDB12READWRITE
Referenced by AtapiInterrupt__(), AtapiSendCommand(), and AtapiStartIo__().
◆ AtapiSoftReset()
| VOID DDKFASTAPI AtapiSoftReset | ( | IN PHW_CHANNEL | chan, |
| IN ULONG | DeviceNumber | ||
| ) |
Definition at line 840 of file id_ata.cpp.
844{
845 //ULONG c = chan->lChannel;
847 UCHAR dma_status = 0;
849 UCHAR statusByte0, statusByte2;
850
853 return;
854 }
855
856 GetBaseStatus(chan, statusByte2);
860 // For ESDI/MFM
862 AtapiStallExecution(10000);
864 AtapiStallExecution(999);
865 }
866/* } else
867 // Seems to be unnecessary, verified by KtP
868 if(!hasPCI) {
869 // original atapi.sys behavior for old ISA-only hardware
870 AtapiStallExecution(10000);
871 AtapiWritePort1(chan, IDX_IO1_o_Command, IDE_COMMAND_ATAPI_RESET);
872 for (i = 0; i < 1000; i++) {
873 AtapiStallExecution(999);
874 } */
875 } else {
876 AtapiStallExecution(500);
877 GetBaseStatus(chan, statusByte2);
878 statusByte0 = statusByte2;
880
881 // Do not wait for BUSY assertion if it was initially set, jump to
882 // BUSY release wait loop
884 // Wait for BUSY assertion, in some cases delay may occure
885 // 100ms should be enough
887 i = 100;
888 } else {
889 i = 10*1000;
890 }
893 i--)
894 {
897 break;
898 }
899 AtapiStallExecution(10);
900 }
901 }
902
903 i = 30 * 1000;
904 // ReactOS modification: Already stop looping when we know that the drive has finished resetting.
905 // Not all controllers clear the IDE_STATUS_BUSY flag (e.g. not the VMware one), so ensure that
906 // the maximum waiting time (30 * i = 0.9 seconds) does not exceed the one of the original
907 // implementation. (which is around 1 second)
909 i--)
910 {
911 AtapiStallExecution(30);
912 }
915 }
916
917 chan->last_devsel = -1; // make sure proper drive would be selected
919 WaitOnBusy(chan);
920 GetBaseStatus(chan, statusByte2);
921 AtapiStallExecution(500);
922
923 GetBaseStatus(chan, statusByte2);
924 if(chan && chan->DeviceExtension) {
925 dma_status = GetDmaStatus(chan->DeviceExtension, chan->lChannel);
927 } else {
929 }
931 // bullshit, we have DMA interrupt, but had never initiate DMA operation
934 GetBaseStatus(chan, statusByte2);
935 }
937 UniataSataClearErr(chan->DeviceExtension, chan->lChannel, UNIATA_SATA_IGNORE_CONNECT, DeviceNumber);
938/* if(!(chan->ChannelCtrlFlags & CTRFLAGS_NO_SLAVE)) {
939 UniataSataClearErr(chan->DeviceExtension, chan->lChannel, UNIATA_SATA_IGNORE_CONNECT, 1);
940 }*/
941 }
942 return;
943
944} // end AtapiSoftReset()
ULONG NTAPI UniataAhciSoftReset(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber)
Definition: id_sata.cpp:1787
◆ AtapiStartIo()
Definition at line 9278 of file id_ata.cpp.
Referenced by DriverEntry().
◆ AtapiStartIo__()
| BOOLEAN NTAPI AtapiStartIo__ | ( | IN PVOID | HwDeviceExtension, |
| IN PSCSI_REQUEST_BLOCK | Srb, | ||
| IN BOOLEAN | TopLevel | ||
| ) |
Definition at line 9288 of file id_ata.cpp.
9293{
9295 UCHAR lChannel;
9296 PHW_CHANNEL chan;
9297 PHW_LU_EXTENSION LunExt;
9299 //ULONG ldev;
9304 PATA_REQ AtaReq;
9305 PSCSI_REQUEST_BLOCK tmpSrb;
9307 BOOLEAN atapiDev;
9309
9310 // deviceExtension->Isr2DevObj must always be NULL for non-PCI
9314 }
9315// deviceExtension->QueueNewIrql = max(deviceExtension->QueueNewIrql, KeGetCurrentIrql());
9316
9317/* KeBugCheckEx(0xc000000e,
9318 (Srb->PathId<<16) | (Srb->TargetId<<8) | (Srb->Lun),
9319 Srb->Function,
9320 TopLevel, 0x80000001);
9321*/
9324 //RtlZeroMemory(Srb->SrbExtension, sizeof(ATA_REQ));
9326 }
9327
9328 do { // fetch all queued commands for the channel (if valid)
9329
9331 //ldev = GET_LDEV(Srb);
9332 chan = NULL;
9333 LunExt = NULL;
9335 commPort = FALSE;
9336
9337 //ASSERT(deviceExtension);
9338 //ASSERT(chan);
9339
9341 "** AtapiStartIo: Function %#x, PATH:LUN:TID = %#x:%#x:%#x\n",
9343 KdPrint2((PRINT_PREFIX " DeviceID+VendorID/Rev %#x/%#x\n", deviceExtension->DevID, deviceExtension->RevID));
9344
9349 ) {
9350 // This is our virtual device
9352 "AtapiStartIo: Communication port\n"));
9354
9358wrong_buffer_size:
9360 goto complete_req;
9361 }
9362
9364
9366 " INQUIRY\n"));
9367 // Zero INQUIRY data structure.
9369
9371
9372 // Fill in vendor identification fields.
9374
9376 goto complete_req;
9377 }
9378 commPort = TRUE;
9379 /* Pass IOCTL request down */
9380 } else
9384
9386 chan = NULL;
9387 }
9388
9389reject_srb:
9390 //if(!CheckDevice(HwDeviceExtension, lChannel, DeviceNumber, FALSE)) {
9392 "AtapiStartIo: SRB rejected\n"));
9393 // Indicate no device found at this address.
9396 goto complete_req;
9397 //}
9398 } else
9400 !UniataAhciChanImplemented(deviceExtension, lChannel)) {
9401 chan = NULL;
9402 }
9403
9404 if(!commPort) {
9405 chan = &(deviceExtension->chan[lChannel]);
9407 if(!LunExt) {
9408 goto reject_srb;
9409 }
9411 } else {
9412 atapiDev = FALSE;
9413 }
9414
9415#ifdef _DEBUG
9416 if(!commPort && !LunExt) {
9417#if 0
9419 deviceExtension,
9420 chan, DeviceNumber,
9421 deviceExtension->NumberChannels);
9426#endif //0
9427/*
9428 int i;
9429 for(i=0; i<1000; i++) {
9430 AtapiStallExecution(3*1000);
9431 }
9432*/
9433 goto reject_srb;
9434 }
9435#endif //_DEBUG
9436
9437 // Determine which function.
9439
9441
9444 // let passthrough go
9445 } else
9447 // let INQUIRY go
9448 } else {
9449
9450 //if(!CheckDevice(HwDeviceExtension, lChannel, DeviceNumber, FALSE)) {
9452 "AtapiStartIo: EXECUTE_SCSI rejected (2)\n"));
9453 // Indicate no device found at this address.
9456 break;
9457 //}
9458 }
9459 } else {
9461 " SRB %#x, CDB %#x, AtaReq %#x, SCmd %#x\n", Srb, &(Srb->Cdb), Srb->SrbExtension, Srb->Cdb[0]));
9462 }
9463/*
9464 __try {
9465 if(Srb->DataTransferLength) {
9466 UCHAR a;
9467 a = ((PUCHAR)(Srb->DataBuffer))[0];
9468 g_foo += a;
9469 }
9470 } __except(EXCEPTION_EXECUTE_HANDLER) {
9471 KdPrint3((PRINT_PREFIX
9472 "AtapiStartIo: Bad data buffer -> EXECUTE_SCSI rejected\n"));
9473 // Indicate no device found at this address.
9474 KdPrint3((PRINT_PREFIX "SRB_STATUS_ERROR\n"));
9475 status = SRB_STATUS_ERROR;
9476 KdPrint2((PRINT_PREFIX " *** Exception...\n"));
9477 ASSERT(FALSE);
9478 break;
9479 }
9480*/
9482
9483 if(PostReq) {
9484
9486 if (atapiDev &&
9489
9491 } else {
9494 }
9495 /*KeBugCheckEx(0xc000000e,
9496 (Srb->PathId<<16) | (Srb->TargetId<<8) | (Srb->Lun),
9497 Srb->Function,
9498 status, 0x80000001);*/
9501 // Insert requests AFTER they have been initialized on
9502 // CMD_ACTION_PREPARE stage
9503 // we should not check TopLevel here (it is always TRUE)
9504 //ASSERT(chan->lun[GET_CDEV(Srb)]);
9506
9508
9509 } else {
9510
9511 // Send command to device.
9517 //ASSERT(!AtaReq->Flags);
9518 //ASSERT(chan->lun[GET_CDEV(Srb)]);
9520// AtaReq = (PATA_REQ)(Srb->SrbExtension);
9521 //ASSERT(!AtaReq->Flags);
9523 //ASSERT(!AtaReq->Flags);
9524 }
9525
9526#ifndef NAVO_TEST
9528 if(!LunExt) {
9529 goto reject_srb;
9530 }
9534 goto reject_srb;
9535 }
9536 }
9538 goto reject_srb;
9539 }
9540 } else
9542 // allow
9543 } else {
9544 goto reject_srb;
9545 }
9546 }
9547#endif //NAVO_TEST
9548
9549 if(atapiDev &&
9551 (Srb->Cdb[0] != SCSIOP_REPORT_LUNS)*/) {
9553#ifdef __REACTOS__
9555
9561 {
9563 CCHAR vendorId[26];
9564
9565 // Attempt to identify known broken CD/DVD drives
9567 {
9568 // Build a buffer based on the identify data.
9570 }
9571
9572 // Emulate INQUIRY support for broken CD/DVD drives (e.g. Microsoft Xbox).
9573 // Currently we implement it by explicitly checking the drive name from ATA IDENTIFY PACKET.
9578 {
9579 // TODO:
9580 // Better send INQUIRY and then check for chan->ReturningMediaStatus >> 4 == SCSI_SENSE_ILLEGAL_REQUEST
9581 // in AtapiInterrupt__() and emulate the response only in this case.
9582
9583 // If this hack stays for long enough, consider adding Xbox 360 drive names to the condition,
9584 // as they are affected by the same problem.
9585
9586 // See https://jira.reactos.org/browse/CORE-16692
9590
9591 // Zero INQUIRY data structure.
9593
9594 // This is ATAPI CD- or DVD-ROM.
9596
9597 // Set the removable bit, if applicable.
9600 "RemovableMedia\n"));
9601 inquiryData->RemovableMedia = 1;
9602 }
9603 // Set the Relative Addressing (LBA) bit, if applicable.
9605 inquiryData->RelativeAddressing = 1;
9607 "RelativeAddressing\n"));
9608 }
9609 // Set the CommandQueue bit
9610 inquiryData->CommandQueue = 1;
9611
9612 // Fill in vendor identification fields.
9613 FillDeviceIdentificationString(inquiryData, identifyData);
9614
9615 // Move firmware revision from IDENTIFY data to
9616 // product revision in INQUIRY data.
9619 }
9620
9622 }
9623 }
9624
9626#endif
9628 } else {
9630/* {
9631 ULONG __ebp__ = 0;
9632 ULONG __esp__ = 0;
9633
9634 KdPrint2((PRINT_PREFIX "** before IdeSendCommand:\n"));
9635 __asm {
9636 mov eax,ebp
9637 mov __ebp__, eax
9638 mov eax,esp
9639 mov __esp__, eax
9640 }
9641 KdPrint2((PRINT_PREFIX "** before Ide: EBP:%#x ESP:%#x\n", __ebp__, __esp__));
9642 }*/
9644 }
9645/* KeBugCheckEx(0xc000000e,
9646 (Srb->PathId<<16) | (Srb->TargetId<<8) | (Srb->Lun),
9647 Srb->Function,
9648 status, 0x80000002);*/
9649
9650 }
9651//skip_exec:
9653
9654 break;
9655
9657
9660 // Verify that SRB to abort is still outstanding.
9662 !chan->queue_depth) {
9663
9665
9666 // Complete abort SRB.
9668 break;
9669 }
9670
9675 // Log reset failure.
9677 "ScsiPortLogError: devExt %#x, Srb %#x, P:T:D=%d:%d:%d, MsgId %#x (%d)\n",
9679 ));
9682
9683 } else {
9685 }
9686 } else {
9690
9692
9693 senseBuffer->ErrorCode = 0;
9694 senseBuffer->Valid = 1;
9695 senseBuffer->AdditionalSenseLength = 0xb;
9697 senseBuffer->AdditionalSenseCode = 0;
9698 senseBuffer->AdditionalSenseCodeQualifier = 0;
9699
9701 }
9702 AtapiDmaDBSync(chan, tmpSrb);
9703 UniataRemoveRequest(chan, tmpSrb);
9704 // Indicate command complete.
9706 deviceExtension,
9707 tmpSrb);
9709 }
9710 break;
9711
9712 // Abort function indicates that a request timed out.
9713 // Call reset routine. Card will only be reset if
9714 // status indicates something is wrong.
9715 // Fall through to reset code.
9716
9719
9720 // Reset single device.
9721 // For now we support only Lun=0
9722
9723 // Note: reset is immediate command, it cannot be queued since it is usually used to
9724 // revert not-responding device to operational state
9726 UniataUserDeviceReset(deviceExtension, LunExt, lChannel);
9728 break;
9729
9731do_bus_reset:
9732 // Reset Atapi and SCSI bus.
9733
9734 // Note: reset is immediate command, it cannot be queued since it is usually used to
9735 // revert not- responding device to operational state
9739 // Log reset failure.
9741 "ScsiPortLogError: devExt %#x, Srb %#x, P:T:D=%d:%d:%d, MsgId %#x (%d) - (2)\n",
9743 ));
9746
9747 } else {
9749 }
9750
9751 break;
9752
9754
9758 } else
9759 if(atapiDev) {
9760 // FLUSH ATAPI device - do nothing
9762 } else {
9763 // FLUSH IDE/ATA device
9765 AtapiDisableInterrupts(deviceExtension, lChannel);
9768 // If supported & allowed, reset write cacheing
9770
9771 // Disable write cache
9773 IDE_COMMAND_SET_FEATURES, 0, 0, 0,
9775 // Check for errors.
9778 "AtapiHwInitialize: Disable write cacheing on Device %d failed\n",
9779 DeviceNumber));
9780 }
9781 LunExt->DeviceFlags &= ~DFLAGS_WCACHE_ENABLED;
9782
9783 // Re-enable write cache
9785 IDE_COMMAND_SET_FEATURES, 0, 0, 0,
9787 // Check for errors.
9790 "AtapiHwInitialize: Enable write cacheing on Device %d failed\n",
9791 DeviceNumber));
9792 LunExt->DeviceFlags &= ~DFLAGS_WCACHE_ENABLED;
9793 } else {
9795 }
9796 }
9797
9798 AtapiEnableInterrupts(deviceExtension, lChannel);
9799 }
9801
9802 break;
9803
9805
9808 break;
9809
9811
9813
9815
9817
9818 if(!AtapiStringCmp( (PCHAR)(((PSRB_IO_CONTROL)(Srb->DataBuffer))->Signature),"SCSIDISK",sizeof("SCSIDISK")-1)) {
9819
9821
9823 goto wrong_buffer_size;
9824 }
9825
9826 // extract bogus bus address
9829 PGETVERSIONINPARAMS versionParameters = (PGETVERSIONINPARAMS)(((PUCHAR)Srb->DataBuffer) + sizeof(SRB_IO_CONTROL));
9830
9832 goto wrong_buffer_size;
9833 }
9834
9835 targetId = versionParameters->bIDEDeviceMap;
9837 break; }
9850 {
9851 PSENDCMDINPARAMS cmdInParameters = (PSENDCMDINPARAMS)(((PUCHAR)Srb->DataBuffer) + sizeof(SRB_IO_CONTROL));
9852
9854 goto wrong_buffer_size;
9855 }
9856
9857 targetId = cmdInParameters->bDriveNumber;
9859 break; }
9860 default:
9861invalid_request:
9865 goto complete_req;
9866 } // end switch()
9867
9868 // adjust (if necessary) bus address
9870
9871 // This is done because of how the IOCTL_SCSI_MINIPORT
9872 // determines 'targetid's'. Disk.sys places the real target id value
9873 // in the DeviceMap field. Once we do some parameter checking, the value passed
9874 // back to the application will be determined.
9875
9877 // do this for legacy controllers and legacy callers
9879 DeviceNumber = (targetId & 0x01);
9880 lChannel = 0;
9881 } else
9882 if(commPort) {
9883 // do this for smartmontools, sending IOCTLs to PhysicalDrive%d
9884 // due to DISK.SYS design bug, we have invalid SCSI address in SRB
9887 lChannel = (UCHAR)targetId / 2;
9888 DeviceNumber = 0;
9889 } else {
9890 lChannel = (UCHAR)(targetId / 2);
9891 DeviceNumber = targetId & 0x01;
9892 }
9893 } else {
9894 // otherwise assume lChannel and DeviceNumber from Srb are ok
9895 }
9899 "AtapiStartIo: SCSIDISK IOCTL for non-exestent drive %d -> EXECUTE_SCSI rejected (2)\n",
9900 targetId));
9901 // Indicate no device found at this address.
9902 goto reject_srb;
9903 }
9905 chan = &(deviceExtension->chan[lChannel]);
9907 if(!LunExt) {
9908 goto reject_srb;
9909 }
9911
9913 goto reject_srb;
9914 }
9915 }
9916
9919
9920 PGETVERSIONINPARAMS versionParameters = (PGETVERSIONINPARAMS)(((PUCHAR)Srb->DataBuffer) + sizeof(SRB_IO_CONTROL));
9921 UCHAR deviceNumberMap;
9922
9924
9925 // Version and revision per SMART 1.03
9926
9927 versionParameters->bVersion = 1;
9928 versionParameters->bRevision = 1;
9929 versionParameters->bReserved = 0;
9930
9931 // Indicate that support for IDE IDENTIFY, ATAPI IDENTIFY and SMART commands.
9933
9934 if (atapiDev) {
9935 goto invalid_request;
9936 }
9937
9938 // NOTE: This will only set the bit
9939 // corresponding to this drive's target id.
9940 // The bit mask is as follows:
9941 //
9942 // -Sec Pri
9943 // S M S M
9944 // 3 2 1 0
9945
9947 deviceNumberMap = 1 << lChannel;
9948 DeviceNumber = 0;
9949 } else
9952 deviceNumberMap = 1 << DeviceNumber;
9953 } else {
9954 deviceNumberMap = 4 << DeviceNumber;
9955 }
9956 } else {
9957 deviceNumberMap = 1 << (DeviceNumber+lChannel*2);
9958 }
9959
9960 versionParameters->bIDEDeviceMap = deviceNumberMap;
9961
9963 break;
9964 }
9965
9967
9968 PSENDCMDOUTPARAMS cmdOutParameters = (PSENDCMDOUTPARAMS)(((PUCHAR)Srb->DataBuffer) + sizeof(SRB_IO_CONTROL));
9969 SENDCMDINPARAMS cmdInParameters = *(PSENDCMDINPARAMS)(((PUCHAR)Srb->DataBuffer) + sizeof(SRB_IO_CONTROL));
9970
9972 // Extract the target.
9974
9977 if(atapiDev) {
9979 goto invalid_request;
9980 }
9981 /* FALL THROUGH */
9983
9984 if(!atapiDev &&
9987 goto invalid_request;
9988 }
9989
9991 // Zero the output buffer
9993/* for (i = 0; i < (sizeof(SENDCMDOUTPARAMS) + IDENTIFY_BUFFER_SIZE - 1); i++) {
9994 ((PUCHAR)cmdOutParameters)[i] = 0;
9995 }*/
9996
9997 // Build status block.
10001
10002 // Extract the identify data from the device extension.
10004 cmdOutParameters->cBufferSize);
10005
10008 // adjust checksum if it is possible
10011
10014 }
10017 }
10019
10021
10022 break;
10023 default:
10027 break;
10028 }
10029 break;
10030 }
10031/*
10032 case IOCTL_SCSI_MINIPORT_READ_SMART_ATTRIBS:
10033 case IOCTL_SCSI_MINIPORT_READ_SMART_THRESHOLDS:
10034 case IOCTL_SCSI_MINIPORT_ENABLE_SMART:
10035 case IOCTL_SCSI_MINIPORT_DISABLE_SMART:
10036 case IOCTL_SCSI_MINIPORT_RETURN_STATUS:
10037 case IOCTL_SCSI_MINIPORT_ENABLE_DISABLE_AUTOSAVE:
10038 case IOCTL_SCSI_MINIPORT_SAVE_ATTRIBUTE_VALUES:
10039 case IOCTL_SCSI_MINIPORT_EXECUTE_OFFLINE_DIAGS:
10040*/
10041 default:
10042 // *all* IOCTLs here are SMART
10043 if(commPort) {
10045 "AtapiStartIo: SCSIDISK Smart IOCTL for commPort -> EXECUTE_SCSI rejected (3)\n"));
10046 }
10047 if (atapiDev) {
10048 goto invalid_request;
10049 }
10050
10052
10057 }
10058
10059 if(PostReq) {
10060
10063
10065 } else {
10066
10068 }
10069 break;
10070
10071 // we should not get here, checked above
10072/* default :
10073 KdPrint2((PRINT_PREFIX "AtapiStartIo: invalid IoControl %#x for SCSIDISK signature\n",
10074 ((PSRB_IO_CONTROL)(Srb->DataBuffer))->ControlCode ));
10075 status = SRB_STATUS_INVALID_REQUEST;
10076 break;
10077*/
10078 }
10079 } else
10080 if(!AtapiStringCmp( (PCHAR)(((PSRB_IO_CONTROL)(Srb->DataBuffer))->Signature),"-UNIATA-", sizeof("-UNIATA-")-1)) {
10081
10083 //ULONG ldev = GET_LDEV2(AtaCtl->addr.PathId, AtaCtl->addr.TargetId, 0);
10085 BOOLEAN bad_ldev;
10087
10089 //chan = &(deviceExtension->chan[lChannel]);
10093 goto wrong_buffer_size;
10094 }
10095
10099
10100 chan = NULL;
10101 bad_ldev = TRUE;
10102 LunExt = NULL;
10103
10104 } else {
10105 bad_ldev = FALSE;
10107 chan = &(deviceExtension->chan[lChannel]);
10109 }
10110
10111 KdPrint2((PRINT_PREFIX "AtapiStartIo: -UNIATA- %#x, dev %#x\n", AtaCtl->hdr.ControlCode, DeviceNumber));
10112
10113 /* check for valid LUN */
10117 // this would be BUS reset
10118 if(bad_ldev &&
10122 )) {
10124 DeviceNumber < deviceExtension->NumberLuns) { // AtaCtl->addr.TargetId != 0xff
10126 chan = &(deviceExtension->chan[lChannel]);
10128 // OK
10129 } else {
10130 goto handle_bad_ldev;
10131 }
10132 } else {
10134 chan = &(deviceExtension->chan[lChannel]);
10135 }
10136 break;
10141// case IOCTL_SCSI_MINIPORT_UNIATA_REG_IO:
10142 if(bad_ldev) {
10143handle_bad_ldev:
10145 "AtapiStartIo: bad_ldev -> IOCTL SRB rejected\n"));
10146 // Indicate no device found at this address.
10147 goto reject_srb;
10148 }
10149 }
10150
10151 /* check if queueing is necessary */
10155 break;
10156 }
10157 goto uata_ctl_queue;
10162 goto wrong_buffer_size;
10163 }
10165 break;
10166 }
10167 goto uata_ctl_queue;
10169 //case IOCTL_SCSI_MINIPORT_UNIATA_RESET_DEVICE: reset must be processed immediately
10170uata_ctl_queue:
10173
10178 }
10179 if(PostReq) {
10182
10184 goto complete_req;
10185 }
10186 } // end switch (AtaCtl->hdr.ControlCode)
10187
10188 /* process request */
10191
10193
10197 goto wrong_buffer_size;
10198 }
10202 LunExt->DeviceFlags &= ~DFLAGS_HIDDEN;
10203 } else {
10204 }
10205 }
10206
10208 AtapiStallExecution(1000 * 1000);
10209 }
10210
10211 FindDevices(HwDeviceExtension,
10213 ? UNIATA_FIND_DEV_UNHIDE : 0,
10216
10217 break;
10218
10220
10221 KdPrint2((PRINT_PREFIX "AtapiStartIo: remove %#x:%#x\n", AtaCtl->addr.PathId, AtaCtl->addr.TargetId));
10222
10226 goto wrong_buffer_size;
10227 }
10228 LunExt->DeviceFlags = 0;
10231 //LunExt->DeviceFlags |= DFLAGS_HIDDEN;
10232 UniataForgetDevice(LunExt);
10233 }
10234
10236 AtapiStallExecution(1000 * 1000);
10237 }
10238
10240 break;
10241 }
10243
10245
10249 goto wrong_buffer_size;
10250 }
10253 }
10257 LunExt->OrigTransferMode) {
10258 // check for incorrect value
10259 LunExt->LimitedTransferMode =
10260 LunExt->OrigTransferMode;
10261 }
10262 }
10264
10267 AtapiDmaInit__(deviceExtension, LunExt);
10268 }
10269/* LunExt->TransferMode =
10270 LunExt->LimitedTransferMode = (UCHAR)(setTransferMode->Mode);*/
10272 break;
10273 }
10275
10277
10281 goto wrong_buffer_size;
10282 }
10287
10289 break;
10290 }
10292
10294
10298 goto wrong_buffer_size;
10299 }
10305
10307 break;
10308 }
10310
10312
10316 goto wrong_buffer_size;
10317 }
10319
10342 }
10346
10348
10349 // zero tail
10352
10355 PHW_CHANNEL cur_chan;
10368 //ChanInfo->opt_MaxTransferMode = cur_chan->opt_MaxTransferMode;
10369 ChanInfo++;
10370 }
10371 AtaCtl->AdapterInfo.ChanInfoValid = TRUE;
10372 AtaCtl->AdapterInfo.ChanHeaderLength = sizeof(*ChanInfo);
10373 }
10374
10376 break;
10377 }
10379
10381
10382 ForgetBadBlocks(LunExt);
10383
10385 break;
10386 }
10388
10390
10391 if(bad_ldev) {
10392 goto do_bus_reset;
10393 } else {
10394 UniataUserDeviceReset(deviceExtension, LunExt, AtaCtl->addr.PathId);
10395 }
10396
10398 break;
10399 }
10400 default :
10402 AtaCtl->hdr.ControlCode ));
10404 break;
10405 }
10406
10407 } else {
10408 KdPrint2((PRINT_PREFIX "AtapiStartIo: IoControl signature incorrect. Send %s, expected %s or %s\n",
10410 "SCSIDISK", "-UNIATA-"));
10411
10413 break;
10414 }
10415
10416 break;
10417 } // end SRB_FUNCTION_IO_CONTROL
10418 default:
10419
10421 // Indicate unsupported command.
10423
10424// break;
10425
10426 } // end switch
10427
10428complete_req:
10429
10433
10435
10437 "AtapiStartIo: Srb %#x complete with status %#x\n",
10438 Srb,
10439 status));
10440
10441 // Set status in SRB.
10443
10447 }
10450 // Indicate command complete.
10453 deviceExtension,
10454 Srb);
10455
10457 // Remove current Srb & get next one
10461 // current request is under precessing, thus
10462 // we should do nothing here
10464 }
10465 }
10467 if(!chan) {
10468 //ASSERT(TopLevel);
10469 }
10470 }
10472
10474
10476 // Indicate ready for next request.
10478 deviceExtension,
10479 NULL);
10480
10482 deviceExtension,
10483 PathId,
10484 TargetId,
10485 Lun);
10486
10488
10489} // end AtapiStartIo__()
void NTAPI ForgetBadBlocks(IN PHW_LU_EXTENSION LunExt)
Definition: id_badblock.cpp:237
struct _SENDCMDINPARAMS SENDCMDINPARAMS
struct _SENDCMDINPARAMS * PSENDCMDINPARAMS
VOID NTAPI ScsiPortLogError(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb OPTIONAL, IN UCHAR PathId, IN UCHAR TargetId, IN UCHAR Lun, IN ULONG ErrorCode, IN ULONG UniqueId)
Definition: scsiport.c:1320
VOID NTAPI ScsiPortMoveMemory(IN PVOID WriteBuffer, IN PVOID ReadBuffer, IN ULONG Length)
Definition: scsiport.c:1335
PSCSI_REQUEST_BLOCK NTAPI ScsiPortGetSrb(IN PVOID DeviceExtension, IN UCHAR PathId, IN UCHAR TargetId, IN UCHAR Lun, IN LONG QueueTag)
Definition: scsiport.c:662
struct _INQUIRYDATA * PINQUIRYDATA
#define IOCTL_SCSI_MINIPORT_SAVE_ATTRIBUTE_VALUES
Definition: cdrw_hw.h:1465
#define IOCTL_SCSI_MINIPORT_READ_SMART_ATTRIBS
Definition: cdrw_hw.h:1459
#define IOCTL_SCSI_MINIPORT_DISABLE_SMART
Definition: cdrw_hw.h:1462
#define IOCTL_SCSI_MINIPORT_ENABLE_DISABLE_AUTOSAVE
Definition: cdrw_hw.h:1464
#define IOCTL_SCSI_MINIPORT_EXECUTE_OFFLINE_DIAGS
Definition: cdrw_hw.h:1466
#define IOCTL_SCSI_MINIPORT_READ_SMART_THRESHOLDS
Definition: cdrw_hw.h:1460
#define IOCTL_SCSI_MINIPORT_RETURN_STATUS
Definition: cdrw_hw.h:1463
#define IOCTL_SCSI_MINIPORT_SMART_VERSION
Definition: cdrw_hw.h:1457
#define IOCTL_SCSI_MINIPORT_WRITE_SMART_LOG
Definition: scsi.h:1421
#define IOCTL_SCSI_MINIPORT_ENABLE_DISABLE_AUTO_OFFLINE
Definition: scsi.h:1419
ULONG NTAPI IdeSendSmartCommand(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb, IN ULONG targetId)
Definition: id_ata.cpp:6697
VOID NTAPI UniataUserDeviceReset(PHW_DEVICE_EXTENSION deviceExtension, PHW_LU_EXTENSION LunExt, ULONG lChannel)
Definition: id_ata.cpp:9198
ULONG NTAPI IdeSendCommand(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb, IN ULONG CmdAction)
Definition: id_ata.cpp:8233
BOOLEAN NTAPI UniataNeedQueueing(PHW_DEVICE_EXTENSION deviceExtension, PHW_CHANNEL chan, BOOLEAN TopLevel)
Definition: id_ata.cpp:9224
VOID NTAPI UniataQueueRequest(IN PHW_CHANNEL chan, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_queue.cpp:93
struct _GETVERSIONINPARAMS GETVERSIONINPARAMS
struct _GETVERSIONINPARAMS * PGETVERSIONINPARAMS
Definition: uata_ctl.h:103
Definition: ntdddisk.h:660
INTERFACE_TYPE OrigAdapterInterfaceType
Definition: bsmaster.h:1315
Definition: atapi.h:248
Definition: cdrw_hw.h:1115
Definition: helper.h:30
Definition: uata_ctl.h:294
#define IOCTL_SCSI_MINIPORT_UNIATA_GET_VERSION
Definition: uata_ctl.h:69
struct _ADAPTERINFO ADAPTERINFO
#define IOCTL_SCSI_MINIPORT_UNIATA_SET_MAX_MODE
Definition: uata_ctl.h:62
#define IOCTL_SCSI_MINIPORT_UNIATA_DELETE_DEVICE
Definition: uata_ctl.h:61
#define IOCTL_SCSI_MINIPORT_UNIATA_FIND_DEVICES
Definition: uata_ctl.h:60
#define IOCTL_SCSI_MINIPORT_UNIATA_RESETBB
Definition: uata_ctl.h:66
#define IOCTL_SCSI_MINIPORT_UNIATA_GET_MODE
Definition: uata_ctl.h:63
struct _UNIATA_CTL * PUNIATA_CTL
#define IOCTL_SCSI_MINIPORT_UNIATA_RESET_DEVICE
Definition: uata_ctl.h:67
struct _CHANINFO * PCHANINFO
#define IOCTL_SCSI_MINIPORT_UNIATA_ADAPTER_INFO
Definition: uata_ctl.h:64
struct _GETDRVVERSION GETDRVVERSION
Referenced by AtapiCallBack__(), AtapiEnableInterrupts__(), AtapiInterrupt__(), and AtapiStartIo().
◆ AtapiSuckPort2()
| UCHAR DDKFASTAPI AtapiSuckPort2 | ( | IN PHW_CHANNEL | chan | ) |
Definition at line 503 of file id_ata.cpp.
506{
507 UCHAR statusByte;
509
510 // Assume, proper drive is already seleted
511 WaitOnBusyLong(chan);
513
514 GetStatus(chan, statusByte);
516 // Suck out any remaining bytes and throw away.
519 } else {
520 break;
521 }
522 }
525 }
526 return statusByte;
527} // AtapiSuckPort2()
USHORT DDKFASTAPI AtapiReadPort2(IN PHW_CHANNEL chan, IN ULONGIO_PTR port)
Referenced by AtapiInterrupt__(), AtapiSendCommand(), AtapiSuckPortBuffer2(), IdeSendCommand(), and IssueIdentify().
◆ AtapiSuckPortBuffer2()
| ULONG DDKFASTAPI AtapiSuckPortBuffer2 | ( | IN PHW_CHANNEL | chan, |
| IN PUSHORT | Buffer, | ||
| IN ULONG | Count | ||
| ) |
Definition at line 531 of file id_ata.cpp.
536{
537 UCHAR statusByte;
541
542 // Assume, proper drive is already seleted
543 WaitOnBusyLong(chan);
545
546 GetStatus(chan, statusByte);
548 // Suck out any remaining bytes and throw away.
550 (*Buffer) = data;
551 Count--;
552 Buffer++;
554 retry = FALSE;
555 } else {
558 WaitForDrq(chan);
559 retry = TRUE;
560 }
561 break;
562 }
563 }
567 AtapiSuckPort2(chan);
568 }
569 }
571} // AtapiSuckPortBuffer2()
Definition: bufpool.h:45
◆ AtapiTimerDpc()
Definition at line 1298 of file id_ata.cpp.
1301{
1303 PHW_TIMER HwScsiTimer;
1305 ULONG MiniportTimerValue;
1307 ULONG lChannel;
1308 PHW_CHANNEL chan;
1309
1311
1315 return;
1316 }
1317 chan = &(deviceExtension->chan[lChannel]);
1318
1320
1321 HwScsiTimer = chan->HwScsiTimer;
1323
1326 recall = TRUE;
1327 }
1328
1329 HwScsiTimer(HwDeviceExtension);
1330
1332
1336 deviceExtension->FirstDpcChan =
1338 return;
1339 }
1340
1342 KdPrint2((PRINT_PREFIX "AtapiTimerDpc: KeQuerySystemTime=%#x%#x\n", time.HighPart, time.LowPart));
1343
1344 chan = &deviceExtension->chan[lChannel];
1346 // call now
1349 continue;
1350 }
1351 break;
1352 }
1353
1354 if(recall) {
1357 if(!MiniportTimerValue)
1358 MiniportTimerValue = 1;
1359
1362 AtapiTimerDpc,
1363 MiniportTimerValue
1364 );
1365 }
1366 return;
1367
1368} // end AtapiTimerDpc()
Referenced by AtapiQueueTimerDpc(), and AtapiTimerDpc().
◆ AtapiWritePortBufferN_template() [1/2]
◆ AtapiWritePortBufferN_template() [2/2]
◆ AtapiWritePortExN_template() [1/2]
◆ AtapiWritePortExN_template() [2/2]
◆ AtapiWritePortN_template() [1/3]
◆ AtapiWritePortN_template() [2/3]
◆ AtapiWritePortN_template() [3/3]
◆ AtaSAmode()
| LONG NTAPI AtaSAmode | ( | PIDENTIFY_DATA2 | ident | ) |
Definition at line 1277 of file id_ata.cpp.
1277 {
1279 ident->SataCapabilities == 0xffff) {
1281 }
1284 } else
1287 } else
1290 }
1292} // end AtaSAmode()
◆ AtaUmode()
| LONG NTAPI AtaUmode | ( | PIDENTIFY_DATA2 | ident | ) |
Definition at line 1254 of file id_ata.cpp.
1255{
1259 return 6;
1261 return 5;
1263 return 4;
1265 return 3;
1267 return 2;
1269 return 1;
1271 return 0;
1273} // end AtaUmode()
Referenced by AtapiDmaInit__(), AtapiDmaReinit(), and AtaSetTransferMode().
◆ AtaWmode()
| LONG NTAPI AtaWmode | ( | PIDENTIFY_DATA2 | ident | ) |
Definition at line 1241 of file id_ata.cpp.
1242{
1244 return 2;
1246 return 1;
1248 return 0;
1250} // end AtaWmode()
Referenced by AtapiDmaInit__(), AtapiDmaReinit(), and AtaSetTransferMode().
◆ BuildMechanismStatusSrb()
| PSCSI_REQUEST_BLOCK NTAPI BuildMechanismStatusSrb | ( | IN PVOID | HwDeviceExtension, |
| IN PSCSI_REQUEST_BLOCK | Srb | ||
| ) |
Definition at line 11201 of file id_ata.cpp.
11205{
11207 PSCSI_REQUEST_BLOCK srb;
11208 PCDB cdb;
11210
11212
11214
11217 srb->Function = SRB_FUNCTION_EXECUTE_SCSI;
11219
11220 // Set flags to disable synchronous negociation.
11222
11223 // Set timeout to 4 seconds.
11224 srb->TimeOutValue = 4;
11225
11226 srb->CdbLength = 6;
11229 srb->SrbExtension = AtaReq;
11230
11231 // Set CDB operation code.
11232 cdb = (PCDB)srb->Cdb;
11235
11237
11238 return srb;
11239} // end BuildMechanismStatusSrb()
struct _MECHANICAL_STATUS_INFORMATION_HEADER MECHANICAL_STATUS_INFORMATION_HEADER
struct _SCSI_REQUEST_BLOCK SCSI_REQUEST_BLOCK
MECHANICAL_STATUS_INFORMATION_HEADER MechStatusData
Definition: bsmaster.h:1052
struct _CDB::_MECH_STATUS MECH_STATUS
Referenced by AtapiInterrupt__(), and AtapiSendCommand().
◆ BuildRequestSenseSrb()
| PSCSI_REQUEST_BLOCK NTAPI BuildRequestSenseSrb | ( | IN PVOID | HwDeviceExtension, |
| IN PSCSI_REQUEST_BLOCK | Srb | ||
| ) |
Definition at line 11245 of file id_ata.cpp.
11249{
11251 PSCSI_REQUEST_BLOCK srb;
11252 PCDB cdb;
11254
11256
11258
11261 srb->Function = SRB_FUNCTION_EXECUTE_SCSI;
11263
11264 // Set flags to disable synchronous negociation.
11266
11267 // Set timeout to 2 seconds.
11268 srb->TimeOutValue = 4;
11269
11270 srb->CdbLength = 6;
11273 srb->SrbExtension = AtaReq;
11274
11275 // Set CDB operation code.
11276 cdb = (PCDB)srb->Cdb;
11279
11281
11282 return srb;
11283} // end BuildRequestSenseSrb()
struct _SENSE_DATA SENSE_DATA
struct _CDB::_CDB6INQUIRY CDB6INQUIRY
Referenced by AtapiInterrupt__(), and AtapiSendCommand().
◆ DriverEntry()
Definition at line 10676 of file id_ata.cpp.
10680{
10681 HW_INITIALIZATION_DATA_COMMON hwInitializationData;
10682 ULONG adapterCount;
10684 ULONG statusToReturn, newStatus;
10687// WCHAR a;
10688#ifndef USE_REACTOS_DDK
10690#endif
10691
10697
10698 LARGE_INTEGER t0, t1;
10699
10701 //a = (WCHAR)strlen(ver_string);
10702
10703 statusToReturn = 0xffffffff;
10704
10705 // Zero out structure.
10707
10708 // Set size of hwInitializationData.
10709 hwInitializationData.comm.HwInitializationDataSize =
10710 sizeof(hwInitializationData.comm) +
10711// sizeof(hwInitializationData.nt4) +
10713 KdPrint(("HwInitializationDataSize = %x\n", hwInitializationData.comm.HwInitializationDataSize));
10714
10715 // Set entry points.
10720
10721 // Specify size of extensions.
10725
10726 // Indicate PIO device.
10727 hwInitializationData.comm.MapBuffers = TRUE;
10728
10729 // Request and parse arument string.
10731 // Zero out structure.
10732 hwInitializationData.comm.NumberOfAccessRanges = 2;
10733 hwInitializationData.comm.HwFindAdapter = AtapiReadArgumentString;
10735 Argument2,
10736 &hwInitializationData.comm,
10737 &adapterCount);
10738
10740 Connect_DbgPrint();
10741 g_opt_Verbose = (BOOLEAN)AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"PrintLogo", 0);
10744 }
10745 IgnoreIsaCompatiblePci = (BOOLEAN)AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"IgnoreIsaCompatiblePci", IgnoreIsaCompatiblePci) ? TRUE : FALSE;
10746 IgnoreNativePci = (BOOLEAN)AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"IgnoreNativePci", IgnoreNativePci) ? TRUE : FALSE;
10747 } else {
10749 }
10750
10753#ifdef USE_REACTOS_DDK
10755 MajorVersion=0x04;
10756 MinorVersion=0x01;
10757 BuildNumber=1;
10759#else
10760 // we are here for the 1st time
10761 // init CrossNT and get OS version
10764 //HalDisplayString((PUCHAR)"DbgPrnHkInitialize: CrNtInit failed\n");
10766 }
10768#endif // USE_REACTOS_DDK
10769 KdPrint(("UniATA Init: OS ver %x.%x (%d), %d CPU(s)\n", MajorVersion, MinorVersion, BuildNumber, CPU_num));
10770
10771 KeQuerySystemTime(&t0);
10772 do {
10773 KeQuerySystemTime(&t1);
10775 t0=t1;
10776 g_Perf=0;
10777 do {
10778 KeQuerySystemTime(&t1);
10779 g_Perf++;
10783 } else {
10785 ReEnter = TRUE;
10786 }
10787
10788 // (re)read bad block list
10790
10791 if(!ReEnter) {
10792 // init ATA command translation table
10793 //UniataInitAtaCommands();
10794
10795 // get registry path to settings
10802 }
10803
10805#ifndef __REACTOS__
10807#else
10809#endif
10812 }
10813#ifndef __REACTOS__
10815#else
10817#endif
10820 }
10821 }
10822
10823 SkipRaids = AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"SkipRaids", 1);
10824 ForceSimplex = AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"ForceSimplex", 0);
10825#ifdef _DEBUG
10826 g_LogToDisplay = AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"LogToDisplay", 0);
10827#endif //_DEBUG
10828
10829 // Set PnP-specific API
10832 hwInitializationData.comm.NeedPhysicalAddresses = TRUE;
10835 }
10836
10838 if(!ReEnter) {
10839
10840 g_opt_VirtualMachine = AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"VirtualMachineType", g_opt_VirtualMachine);
10842 g_opt_VirtualMachine = 0;
10843 }
10844 if(AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"VirtualBox", (g_opt_VirtualMachine == VM_VBOX))) {
10846 }
10847 // Pre-scan PCI bus, also check if we are under VM
10848 // But do not perform scan if PCI bus is claimed as unused
10849 if(!IgnoreIsaCompatiblePci || !IgnoreNativePci) {
10852 }
10853
10857 // adjust options for VirtualBox
10858 g_opt_WaitBusyCount = 20000;
10859 g_opt_WaitBusyDelay = 150;
10860 g_opt_WaitDrqDelay = 100;
10861 g_opt_WaitBusyLongCount = 20000;
10862 g_opt_MaxIsrWait = 200;
10865 break;
10869 }
10870
10873 // old slow machine, adjust timings (us)
10874 g_opt_WaitBusyResetCount = 20000;
10875 g_opt_WaitBusyCount = 20000;
10876 g_opt_WaitBusyDelay = 150;
10877 g_opt_WaitDrqDelay = 100;
10878 g_opt_WaitBusyLongCount = 20000;
10879 g_opt_MaxIsrWait = 200;
10880 g_opt_DriveSelectNanoDelay = 400;
10881 }
10883 g_opt_DriveSelectNanoDelay = 0;
10884 }
10887 }
10888
10889 g_opt_WaitBusyCount = AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"WaitBusyCount", g_opt_WaitBusyCount); // 200 vs 20000
10890 g_opt_WaitBusyDelay = AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"WaitBusyDelay", g_opt_WaitBusyDelay); // 10 vs 150
10891 g_opt_WaitDrqDelay = AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"WaitDrqDelay", g_opt_WaitDrqDelay); // 10 vs 100
10892 g_opt_WaitBusyLongCount = AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"WaitBusyLongCount", g_opt_WaitBusyLongCount); // 2000 vs 20000
10893 g_opt_WaitBusyLongDelay = AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"WaitBusyLongDelay", g_opt_WaitBusyLongDelay); // 250 vs 250
10894 g_opt_AtapiSendDisableIntr = (BOOLEAN)AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"AtapiSendDisableIntr", g_opt_AtapiSendDisableIntr) ? TRUE : FALSE; // 1 vs 0
10895 g_opt_AtapiDmaRawRead = (BOOLEAN)AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"AtapiDmaRawRead", g_opt_AtapiDmaRawRead) ? TRUE : FALSE; // 1 vs 0
10896 g_opt_AtapiNoDma = (BOOLEAN)AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"AtapiNoDma", g_opt_AtapiNoDma) ? TRUE : FALSE; // 1 vs 0
10897 g_opt_MaxIsrWait = AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"MaxIsrWait", g_opt_MaxIsrWait); // 40 vs xxx
10898 g_opt_DriveSelectNanoDelay = AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"DriveSelectNanoDelay", g_opt_DriveSelectNanoDelay);
10899 } // end !re-enter
10900
10901 // Look for legacy ISA-bridged PCI IDE controller (onboard)
10902 KdPrint2((PRINT_PREFIX "\n\nATAPI IDE: Look for legacy ISA-bridged PCI IDE controller (onboard)\n"));
10905
10908 break;
10909 }
10910 if(IgnoreIsaCompatiblePci) {
10911 break;
10912 }
10913 if(ReEnter) {
10917 statusToReturn =
10918 newStatus = STATUS_SUCCESS;
10919 }
10920 continue;
10921 }
10922 //BMList[i].AltInitMasterDev = (UCHAR)0xff;
10923
10925 PrimaryClaimed = TRUE;
10927 SecondaryClaimed = TRUE;
10928 pref_alt = 0;
10929
10932
10933 // We just want to claim our PCI device in compatible mode, since we shall not
10934 // tell system that we use it inside HwInitialize
10935 // Even more, we shall cheat system, that work with ISA
10936 // Note: this call may (but not 'must' or 'can') cause IO resource
10937 // reallocation and switch to native mode if HAL supports this
10939 // Special check for NT3.51/NT4 (not ReactOS !!!)
10941 //(BMList[i].ChanInitOk & 0x40) &&
10942 /*CPU_num > 1 &&*/
10944 // Some NT3/4 SMP (but not only) HALs cannot reallocate IO resources of
10945 // BusMaster PCI controller
10946 // Since nobody claimed Primary/Secondary yet, try init and claim them
10947 // However it is not 100% safe way, especially under ReactOS, which doesn't resolve
10948 // conflicts yet.
10949 // We relay on ScsiPort internal checks
10950 KdPrint2((PRINT_PREFIX "Can't acquire PCI part of BusMaster on SMP NT3/4 system, try init anyway.\n"));
10951 newStatus = STATUS_SUCCESS;
10952 // Prefer alternative init method (try to change Isa -> PCI in ConfigInfo first)
10953 pref_alt = 1;
10954 }
10957 break;
10958 }
10959 }
10960
10963 }
10964
10966
10968 // check is channel is manually excluded
10970 break;
10971 }
10973 if(PrimaryClaimed) {
10975 continue;
10976 }
10977 } else
10979 if(SecondaryClaimed) {
10981 continue;
10982 }
10983 }
10984
10986 // do not even try if already claimed
10989 } else
10992 }
10993 }
10995 hwInitializationData.comm.HwFindAdapter = UniataFindBusMasterController;
10996 } else {
10997 // in WDM model things are different....
10998 hwInitializationData.comm.HwFindAdapter = (c == 0) ?
11000 }
11001 hwInitializationData.comm.NumberOfAccessRanges = 6;
11002 hwInitializationData.comm.AdapterInterfaceType = Isa;
11003
11006 }
11007
11010 Argument2,
11011 &hwInitializationData.comm,
11014 if (newStatus < statusToReturn) {
11015 statusToReturn = newStatus;
11016 }
11019 // This should be done in HwInitialize under w2k+ to ensure that
11020 // channel is actually initialized
11022 } else {
11025 }
11026 }
11027/*
11028 if(BMList[i].MasterDev && (WinVer_Id() > WinVer_NT)) {
11029 c = 1; // this will break our for()
11030 BMList[i].ChanInitOk |= 0x01 << c;
11031 }
11032*/
11033 }
11034 }
11035/* if(WinVer_Id() >= WinVer_2k) {
11036 // the following didn't work under higher OSes,
11037 // until we move setting of FLAGS to HwInit
11038 KdPrint2((PRINT_PREFIX "make still one attempt\n"));
11039 continue;
11040 }*/
11042 // Under NT we receive status immediately, so
11043 // we can omit alternative init method if STATUS_SUCCESS returned.
11044 // Under w2k+ we relay on flags, set in HwInitialize.
11046 break;
11047 } else
11049 // try AltInit if HwInit was not called immediately under w2k+
11051 } else {
11052 // if (WinVer_Id() == WinVer_NT) and some error occured
11053 // try alternative init method
11055 }
11056 } // for(alt...)
11060 } else {
11062 }
11063 }
11064
11065 }
11066
11067/* KeBugCheckEx(0xc000000e,
11068 (i << 16) | BMList[0].ChanInitOk,
11069 c,
11070 newStatus, statusToReturn);*/
11071
11072 // Look for PCI IDE controller
11076
11077 if(IgnoreNativePci) {
11078 break;
11079 }
11080/* if(BMList[i].MasterDev)
11081 continue;*/
11088 }
11089
11090 hwInitializationData.comm.HwFindAdapter = UniataFindBusMasterController;
11091 hwInitializationData.comm.NumberOfAccessRanges = 6;
11092 hwInitializationData.comm.AdapterInterfaceType = PCIBus;
11093
11098
11100
11102 hwInitializationData.comm.VendorId,
11103 hwInitializationData.comm.DeviceId));
11105 Argument2,
11106 &hwInitializationData.comm,
11110 // Note: this is actually a BUG in scsiport.sys
11111 // It stops scanning PCI bus when reaches empty PCI Function inside Slot
11112 // However, this PCI Slot may have higher non-empty Functions
11113 // UniATA will perform all staff instead of ScsiPort under NT,
11114 // but for ReactOS it is better to patch ScsiPort.
11116 hwInitializationData.comm.AdapterInterfaceType = Isa;
11118 Argument2,
11119 &hwInitializationData.comm,
11122 }
11123 if (newStatus < statusToReturn)
11124 statusToReturn = newStatus;
11125
11129 } else {
11131 }
11132 }
11133
11134 }
11135
11136/* KeBugCheckEx(0xc000000e,
11137 i,
11138 c,
11139 newStatus, statusToReturn);*/
11140
11141 // --------------
11142
11143 hwInitializationData.comm.VendorId = 0;
11144 hwInitializationData.comm.VendorIdLength = 0;
11145 hwInitializationData.comm.DeviceId = 0;
11146 hwInitializationData.comm.DeviceIdLength = 0;
11147
11149 hwInitializationData.comm.SrbExtensionSize = //FIELD_OFFSET(ATA_REQ, ata);
11152 }
11153
11154 // The adapter count is used by the find adapter routine to track how
11155 // which adapter addresses have been tested.
11156
11157 // Indicate 2 access ranges and reset FindAdapter.
11158 hwInitializationData.comm.NumberOfAccessRanges = 2;
11159 hwInitializationData.comm.HwFindAdapter = AtapiFindIsaController;
11160
11162 // Indicate ISA bustype.
11163 hwInitializationData.comm.AdapterInterfaceType = Isa;
11164 adapterCount = 0;
11165
11166 // Call initialization for ISA bustype.
11169 Argument2,
11170 &hwInitializationData.comm,
11171 &adapterCount);
11173 if (newStatus < statusToReturn)
11174 statusToReturn = newStatus;
11175 }
11177 // Set up for MCA
11179 hwInitializationData.comm.AdapterInterfaceType = MicroChannel;
11180 adapterCount = 0;
11181
11183 Argument2,
11184 &hwInitializationData.comm,
11185 &adapterCount);
11187 if (newStatus < statusToReturn)
11188 statusToReturn = newStatus;
11189 }
11191
11192 KdPrint2((PRINT_PREFIX "\n\nLeave UNIATA MiniPort DriverEntry with status %#x\n", statusToReturn));
11193
11194 return statusToReturn;
11195
11196} // end DriverEntry()
struct _HW_LU_EXTENSION HW_LU_EXTENSION
struct _HW_DEVICE_EXTENSION HW_DEVICE_EXTENSION
ULONG NTAPI ScsiPortInitialize(IN PVOID Argument1, IN PVOID Argument2, IN PHW_INITIALIZATION_DATA HwInitializationData, IN PVOID HwContext OPTIONAL)
Definition: scsiport.c:1154
ULONG NTAPI UniataFindCompatBusMasterController1(IN PVOID HwDeviceExtension, IN PVOID Context, IN PVOID BusInformation, IN PCHAR ArgumentString, IN OUT PPORT_CONFIGURATION_INFORMATION ConfigInfo, OUT PBOOLEAN Again)
Definition: id_probe.cpp:924
ULONG NTAPI UniataFindCompatBusMasterController2(IN PVOID HwDeviceExtension, IN PVOID Context, IN PVOID BusInformation, IN PCHAR ArgumentString, IN OUT PPORT_CONFIGURATION_INFORMATION ConfigInfo, OUT PBOOLEAN Again)
Definition: id_probe.cpp:945
ULONG NTAPI UniataFindBusMasterController(IN PVOID HwDeviceExtension, IN PVOID Context, IN PVOID BusInformation, IN PCHAR ArgumentString, IN OUT PPORT_CONFIGURATION_INFORMATION ConfigInfo, OUT PBOOLEAN Again)
Definition: id_probe.cpp:988
union _ATA_REQ ATA_REQ
VOID NTAPI UniataEnumBusMasterController(IN PVOID DriverObject, PVOID Argument2)
Definition: id_probe.cpp:245
BOOLEAN(NTAPI * PHW_STARTIO)(IN PVOID DeviceExtension, IN PSCSI_REQUEST_BLOCK Srb)
Definition: srb.h:443
BOOLEAN(NTAPI * PHW_RESET_BUS)(IN PVOID DeviceExtension, IN ULONG PathId)
Definition: srb.h:479
SCSI_ADAPTER_CONTROL_STATUS(NTAPI * PHW_ADAPTER_CONTROL)(IN PVOID DeviceExtension, IN SCSI_ADAPTER_CONTROL_TYPE ControlType, IN PVOID Parameters)
Definition: srb.h:494
NTSTATUS CrNtInit(IN PDRIVER_OBJECT DriverObject, IN PUNICODE_STRING RegistryPath)
ULONG NTAPI AtapiRegCheckDevValue(IN PVOID HwDeviceExtension, IN ULONG chan, IN ULONG dev, IN PCWSTR Name, IN ULONG Default)
Definition: id_ata.cpp:11359
SCSI_ADAPTER_CONTROL_STATUS NTAPI AtapiAdapterControl(IN PVOID HwDeviceExtension, IN SCSI_ADAPTER_CONTROL_TYPE ControlType, IN PVOID Parameters)
Definition: id_ata.cpp:11594
BOOLEAN NTAPI AtapiHwInitialize(IN PVOID HwDeviceExtension)
Definition: id_ata.cpp:3342
BOOLEAN NTAPI AtapiStartIo(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_ata.cpp:9278
PCONFIGURATION_INFORMATION NTAPI IoGetConfigurationInformation(VOID)
Returns a pointer to the I/O manager's global configuration information structure.
Definition: iorsrce.c:998
Definition: iotypes.h:4477
BOOLEAN AtDiskPrimaryAddressClaimed
Definition: iotypes.h:4485
BOOLEAN AtDiskSecondaryAddressClaimed
Definition: iotypes.h:4486
Definition: srb.h:600
ULONG NTAPI AtapiReadArgumentString(IN PVOID HwDeviceExtension, IN PVOID Context, IN PVOID BusInformation, IN PCHAR ArgumentString, IN OUT PPORT_CONFIGURATION_INFORMATION ConfigInfo, OUT PBOOLEAN Again)
Definition: id_probe.cpp:2754
ULONG NTAPI AtapiFindIsaController(IN PVOID HwDeviceExtension, IN PVOID Context, IN PVOID BusInformation, IN PCHAR ArgumentString, IN OUT PPORT_CONFIGURATION_INFORMATION ConfigInfo, OUT PBOOLEAN Again)
Definition: id_probe.cpp:2243
struct _DRIVER_OBJECT * PDRIVER_OBJECT
◆ EncodeVendorStr()
Definition at line 11319 of file id_ata.cpp.
◆ HalDisplayString()
◆ IdeBuildSenseBuffer()
Definition at line 9145 of file id_ata.cpp.
9149{
9151// ULONG status;
9154
9155 if (senseBuffer){
9156
9158
9159 senseBuffer->ErrorCode = 0x70;
9160 senseBuffer->Valid = 1;
9161 senseBuffer->AdditionalSenseLength = 0xb;
9164 senseBuffer->AdditionalSenseCodeQualifier = 0;
9166
9167 senseBuffer->ErrorCode = 0x70;
9168 senseBuffer->Valid = 1;
9169 senseBuffer->AdditionalSenseLength = 0xb;
9172 senseBuffer->AdditionalSenseCodeQualifier = 0;
9174
9175 senseBuffer->ErrorCode = 0x70;
9176 senseBuffer->Valid = 1;
9177 senseBuffer->AdditionalSenseLength = 0xb;
9180 senseBuffer->AdditionalSenseCodeQualifier = 0;
9182
9183 senseBuffer->ErrorCode = 0x70;
9184 senseBuffer->Valid = 1;
9185 senseBuffer->AdditionalSenseLength = 0xb;
9187 senseBuffer->AdditionalSenseCode = 0;
9188 senseBuffer->AdditionalSenseCodeQualifier = 0;
9189 }
9191 }
9193
9194}// End of IdeBuildSenseBuffer
Referenced by IdeSendCommand().
◆ IdeMediaStatus()
| VOID NTAPI IdeMediaStatus | ( | BOOLEAN | EnableMSN, |
| IN PVOID | HwDeviceExtension, | ||
| IN ULONG | lChannel, | ||
| IN ULONG | DeviceNumber | ||
| ) |
Definition at line 9069 of file id_ata.cpp.
9075{
9077 PHW_CHANNEL chan;
9078 UCHAR statusByte,errorByte;
9079
9080 chan = &(deviceExtension->chan[lChannel]);
9082
9084
9085 // If supported enable Media Status Notification support
9087
9088 // enable
9090 IDE_COMMAND_SET_FEATURES, 0, 0, 0,
9092
9094 // Read the error register.
9096
9098 "IdeMediaStatus: Error enabling media status. Status %#x, error byte %#x\n",
9099 statusByte,
9100 errorByte));
9101 } else {
9104 chan->ReturningMediaStatus = 0;
9105
9106 }
9107
9108 }
9109 } else { // end if EnableMSN == TRUE
9110
9111 // disable if previously enabled
9113
9115 IDE_COMMAND_SET_FEATURES, 0, 0, 0,
9118 }
9119
9120
9121 }
9122
9123
9124} // end IdeMediaStatus()
Referenced by AtapiHwInitialize__().
◆ IdeReadWrite()
| ULONG NTAPI IdeReadWrite | ( | IN PVOID | HwDeviceExtension, |
| IN PSCSI_REQUEST_BLOCK | Srb, | ||
| IN ULONG | CmdAction | ||
| ) |
Definition at line 6905 of file id_ata.cpp.
6910{
6914 PHW_LU_EXTENSION LunExt;
6916 //ULONG ldev = GET_LDEV(Srb);
6918 ULONGLONG startingSector=0;
6919 ULONG max_bcount = 0;
6920 ULONG wordCount = 0;
6921 UCHAR statusByte,statusByte2;
6925 ULONG fis_size;
6926
6929
6932
6938 } else {
6941 }
6942 }
6943
6944 // Set data buffer pointer and words left.
6945 AtaReq->Flags &= ~REQ_FLAG_DMA_OPERATION;
6946
6949 startingSector = (UniAtaCalculateLBARegsBack(LunExt, AtaReq->lba)) /* latest lba */ + AtaReq->bcount /* previous bcount */;
6950 AtaReq->bcount = (AtaReq->TransferLength - AtaReq->WordsTransfered*2 + DEV_BSIZE-1) / DEV_BSIZE;
6951 KdPrint2((PRINT_PREFIX "IdeReadWrite (Chained REQ): Starting sector %I64x, OrigWordsRequested %#x, WordsTransfered %#x, DevSize %#x\n",
6952 startingSector,
6953 AtaReq->TransferLength/2,
6954 AtaReq->WordsTransfered,
6955 AtaReq->bcount));
6956 } else {
6959 // Set up 1st block.
6964 //return SRB_STATUS_ERROR;
6965 }
6966 // FALLTHROUGH
6970 break;
6974 //return SRB_STATUS_ERROR;
6975 }
6976 // FALLTHROUGH
6980 break;
6985 break;
6986 }
6987 KdPrint2((PRINT_PREFIX "IdeReadWrite (Orig REQ): Starting sector %I64x, OrigWordsRequested %#x, DevSize %#x\n",
6988 startingSector,
6989 AtaReq->TransferLength/2,
6990 AtaReq->bcount));
6991 }
6993
6994 if(max_bcount) {
6996 }
6999
7000 KdPrint2((PRINT_PREFIX "IdeReadWrite (REQ): Starting sector is %I64x, Number of WORDS %#x, DevSize %#x\n",
7001 startingSector,
7002 AtaReq->WordsLeft,
7003 AtaReq->bcount));
7004
7008 /* AtaReq->bcount && */ // errRetry can be set only for non-zero bcount
7015 }
7016 LunExt->errRetry = 0;
7017 }
7018
7019 // assume best case here
7020 // we cannot reinit Dma until previous request is completed
7022 UniataAhciSetupCmdPtr(AtaReq);
7028 }
7029 } else
7031 use_dma = TRUE;
7032 // this will set REQ_FLAG_DMA_OPERATION in AtaReq->Flags on success
7036 use_dma = FALSE;
7037 }
7038 }
7039
7043
7045 &(AtaReq->ahci.ahci_cmd_ptr->cfis[0]),
7047 lba,
7049 0
7050 /*,(AtaReq->Flags & REQ_FLAG_READ) ? 0 : ATA_AHCI_CMD_WRITE*/
7051 );
7052
7053 if(!fis_size) {
7056 }
7057
7058 AtaReq->ahci.io_cmd_flags = UniAtaAhciAdjustIoFlags(0, (AtaReq->Flags & REQ_FLAG_READ) ? 0 : ATA_AHCI_CMD_WRITE, fis_size, DeviceNumber);
7060 }
7061
7063
7064 } else { // exec_only
7067
7069 use_dma = TRUE;
7070 }
7071 }
7073
7075 }
7076
7077 // if this is queued request, reinit DMA and check
7078 // if DMA mode is still available
7079 AtapiDmaReinit(deviceExtension, LunExt, AtaReq);
7080 if (/*EnableDma &&*/
7082 use_dma = TRUE;
7083 } else {
7084 AtaReq->Flags &= ~REQ_FLAG_DMA_OPERATION;
7085 use_dma = FALSE;
7086 }
7087
7088 // Check if write request.
7090
7091 // Prepare read command.
7092 if(use_dma) {
7094 } else
7097 } else {
7099 }
7100 } else {
7101
7102 // Prepare write command.
7103 if (use_dma) {
7106 } else
7109
7111 // Transfer only words requested.
7112 wordCount = AtaReq->WordsLeft;
7113 }
7115
7116 } else {
7117 wordCount = DEV_BSIZE/2;
7119 }
7120 }
7121
7122 // Send IO command.
7123 KdPrint2((PRINT_PREFIX "IdeReadWrite: Lba %#I64x, Count %#x(%#x)\n", lba, ((Srb->DataTransferLength + 0x1FF) / 0x200),
7125 if(use_dma) {
7127 } else {
7128 chan->ChannelCtrlFlags &= ~CTRFLAGS_DMA_OPERATION;
7129 }
7130
7132 // AHCI doesn't distinguish DMA and PIO
7133 //AtapiDmaStart(HwDeviceExtension, DeviceNumber, lChannel, Srb);
7137 CHECK_INTR_IDLE);
7139 }
7140
7142 use_dma) {
7143 if(use_dma) {
7149 }
7150 }
7154// (UCHAR)((wordCount*2 + DEV_BSIZE-1) / DEV_BSIZE),
7155 0, ATA_IMMEDIATE);
7156/* if(statusByte2 != IDE_STATUS_WRONG) {
7157 GetStatus(chan, statusByte2);
7158 }*/
7160 // Unfortunately, we cannot handle errors in such a way in real life (except known bad blocks).
7161 // Because some devices doesn't reset ERR from previous command immediately after getting new one.
7162 // On the other hand we cannot wait here because of possible timeout condition
7166 }
7167 if(use_dma) {
7170 //GetStatus(chan, statusByte2);
7172 }
7173 }
7175 }
7176
7180// (UCHAR)((wordCount*2 + DEV_BSIZE-1) / DEV_BSIZE),
7181 0, ATA_WAIT_INTR);
7182
7184 statusByte == IDE_STATUS_WRONG) {
7185
7188 "IdeReadWrite: error sending command (%#x)\n",
7189 statusByte));
7190 } else {
7192 "IdeReadWrite: DRQ never asserted (%#x)\n",
7193 statusByte));
7194 }
7195
7196 AtaReq->WordsLeft = 0;
7197
7198 // Clear interrupt expecting flag.
7201 CHECK_INTR_IDLE);
7202
7203 // Clear current SRB.
7205
7207 }
7208
7211 CHECK_INTR_IDLE);
7212
7213 // Write next DEV_BSIZE/2*N words.
7216 "IdeReadWrite: Write %#x words\n", wordCount));
7217
7218 WriteBuffer(chan,
7219 AtaReq->DataBuffer,
7220 wordCount,
7221 UniataGetPioTiming(LunExt));
7222
7223 } else {
7224
7226 "IdeReadWrite: Write %#x Dwords\n", wordCount/2));
7227
7228 WriteBuffer2(chan,
7230 wordCount / 2,
7231 UniataGetPioTiming(LunExt));
7232 }
7233
7234 // Adjust buffer address and words left count.
7235 AtaReq->WordsLeft -= wordCount;
7236 AtaReq->DataBuffer += wordCount;
7237 AtaReq->WordsTransfered += wordCount;
7238
7239 // Wait for interrupt.
7241
7242} // end IdeReadWrite()
ULONGLONG NTAPI UniAtaCalculateLBARegsBack(PHW_LU_EXTENSION LunExt, ULONGLONG lba)
Definition: id_ata.cpp:6860
ULONGLONG NTAPI UniAtaCalculateLBARegs(PHW_LU_EXTENSION LunExt, ULONGLONG startingSector, PULONG max_bcount)
Definition: id_ata.cpp:6819
Definition: ftp_var.h:139
Referenced by IdeSendCommand().
◆ IdeSendCommand()
| ULONG NTAPI IdeSendCommand | ( | IN PVOID | HwDeviceExtension, |
| IN PSCSI_REQUEST_BLOCK | Srb, | ||
| IN ULONG | CmdAction | ||
| ) |
Definition at line 8233 of file id_ata.cpp.
8238{
8239 SetCheckPoint(1);
8241 SetCheckPoint(2);
8242
8244 SetCheckPoint(3);
8245 UCHAR lChannel;
8246 PHW_CHANNEL chan;
8247 PCDB cdb;
8248 PHW_LU_EXTENSION LunExt;
8249
8250 SetCheckPoint(4);
8251
8252 UCHAR statusByte,errorByte;
8256 PMODE_PARAMETER_HEADER modeData;
8257 //ULONG ldev;
8259 PATA_REQ AtaReq;
8261
8262 SetCheckPoint(5);
8263 //ULONG __ebp__ = 0;
8264
8265 SetCheckPoint(0x20);
8267/* __asm {
8268 mov eax,ebp
8269 mov __ebp__, eax
8270 }*/
8271 /*KdPrint2((PRINT_PREFIX "** Ide: Command EBP %#x, pCdb %#x, cmd %#x\n",
8272 __ebp__, &(Srb->Cdb[0]), Srb->Cdb[0]));
8273 KdPrint2((PRINT_PREFIX "** Ide: Command %s\n",
8274 (CmdAction == CMD_ACTION_PREPARE) ? "Prep " : ""));
8275 KdPrint2((PRINT_PREFIX "** Ide: Command Srb %#x\n",
8276 Srb));
8277 KdPrint2((PRINT_PREFIX "** Ide: Command SrbExt %#x\n",
8278 Srb->SrbExtension));
8279 KdPrint2((PRINT_PREFIX "** Ide: Command to device %d\n",
8280 Srb->TargetId));*/
8281
8282 SetCheckPoint(0x30);
8284
8286 &AtaReq));
8288 AtaReq));
8290
8292 chan = &(deviceExtension->chan[lChannel]);
8293 //ldev = GET_LDEV(Srb);
8296
8297 SetCheckPoint(0x40);
8300
8302
8307 // ok
8308 } else {
8309 goto default_no_prep;
8310 }
8311#ifdef NAVO_TEST
8313#endif //NAVO_TEST
8322 // all right
8324 SetCheckPoint(50);
8325 break;
8326 default:
8327default_no_prep:
8328 SetCheckPoint(0);
8331 }
8332 }
8333
8337
8339 "IdeSendCommand: SCSIOP_INQUIRY PATH:LUN:TID = %#x:%#x:%#x\n",
8341 // Filter out wrong TIDs.
8345
8347 "IdeSendCommand: SCSIOP_INQUIRY rejected\n"));
8348 // Indicate no device found at this address.
8350 break;
8351
8352 } else {
8353
8355 "IdeSendCommand: SCSIOP_INQUIRY ok\n"));
8358
8360
8363 "IdeSendCommand: SCSIOP_INQUIRY rejected (2)\n"));
8364 // Indicate no device found at this address.
8365#ifndef NAVO_TEST
8367 break;
8368 }
8369 } else {
8372 "IdeSendCommand: SCSIOP_INQUIRY device have gone\n"));
8373 // Indicate no device found at this address.
8375#endif //NAVO_TEST
8377 break;
8378 }
8379 }
8380
8381 // Zero INQUIRY data structure.
8383
8384 // Standard IDE interface only supports disks.
8386
8387 // Set the removable bit, if applicable.
8390 "RemovableMedia\n"));
8391 inquiryData->RemovableMedia = 1;
8392 }
8393 // Set the Relative Addressing (LBA) bit, if applicable.
8395 inquiryData->RelativeAddressing = 1;
8397 "RelativeAddressing\n"));
8398 }
8399 // Set the CommandQueue bit
8400 inquiryData->CommandQueue = 1;
8401
8402 // Fill in vendor identification fields.
8403#ifdef __REACTOS__
8404 FillDeviceIdentificationString(inquiryData, identifyData);
8405#else
8407 MOV_DW_SWP(inquiryData->DeviceIdentificationString[i], ((PUCHAR)identifyData->ModelNumber)[i]);
8408 }
8409#endif
8410/*
8411 // Initialize unused portion of product id.
8412 for (i = 0; i < 4; i++) {
8413 inquiryData->ProductId[12+i] = ' ';
8414 }
8415*/
8416 // Move firmware revision from IDENTIFY data to
8417 // product revision in INQUIRY data.
8420 }
8421
8423 }
8424
8425 break;
8426
8428
8429 ULONG alen;
8430 PREPORT_LUNS_INFO_HDR LunInfo;
8431
8433 "IdeSendCommand: SCSIOP_REPORT_LUNS PATH:LUN:TID = %#x:%#x:%#x\n",
8435
8437
8438 if(alen < 16) {
8439 goto invalid_cdb;
8440 }
8441 alen = 8;
8442
8444 RtlZeroMemory(LunInfo, 16);
8445
8449
8450 break; }
8451
8453
8455 "IdeSendCommand: SCSIOP_MODE_SENSE PATH:LUN:TID = %#x:%#x:%#x\n",
8457
8459 PMODE_POWER_CONDITION_PAGE modeData;
8460
8465 } else {
8468#ifdef __REACTOS__
8470#else
8472#endif
8477 }
8478 } else
8480 PMODE_CACHING_PAGE modeData;
8481
8486 } else {
8494 }
8495 } else
8497
8498 // This is used to determine if the media is write-protected.
8499 // Since IDE does not support mode sense then we will modify just the portion we need
8500 // so the higher level driver can determine if media is protected.
8501
8502 //SelectDrive(chan, DeviceNumber);
8503 //AtapiWritePort1(chan, IDX_IO1_o_Command,IDE_COMMAND_GET_MEDIA_STATUS);
8504 //statusByte = WaitOnBusy(chan);
8505 statusByte = AtaCommand(deviceExtension, DeviceNumber, lChannel, IDE_COMMAND_GET_MEDIA_STATUS, 0, 0, 0, 0, 0, ATA_WAIT_READY);
8506
8508
8509 // no error occured return success, media is not protected
8512 CHECK_INTR_IDLE);
8514
8515 } else {
8516
8517 // error occured, handle it locally, clear interrupt
8519
8520 GetBaseStatus(chan, statusByte);
8523 CHECK_INTR_IDLE);
8525
8527
8528 //media is write-protected, set bit in mode sense buffer
8530
8532 modeData->DeviceSpecificParameter |= MODE_DSP_WRITE_PROTECT;
8533 }
8534 }
8536 } else {
8538 }
8539 break;
8540
8542
8544 "IdeSendCommand: SCSIOP_TEST_UNIT_READY PATH:LUN:TID = %#x:%#x:%#x\n",
8547
8548 // Select device 0 or 1.
8549 //SelectDrive(chan, DeviceNumber);
8550 //AtapiWritePort1(chan, IDX_IO1_o_Command,IDE_COMMAND_GET_MEDIA_STATUS);
8551 // Wait for busy. If media has not changed, return success
8552 //statusByte = WaitOnBusy(chan);
8553 statusByte = AtaCommand(deviceExtension, DeviceNumber, lChannel, IDE_COMMAND_GET_MEDIA_STATUS, 0, 0, 0, 0, 0, ATA_WAIT_READY);
8554
8558 CHECK_INTR_IDLE);
8560 } else {
8563
8564 // Special case: If current media is write-protected,
8565 // the 0xDA command will always fail since the write-protect bit
8566 // is sticky,so we can ignore this error
8567 GetBaseStatus(chan, statusByte);
8570 CHECK_INTR_IDLE);
8572
8573 } else {
8574
8575 // Request sense buffer to be build
8578 CHECK_INTR_IDLE);
8580 }
8581 }
8582 } else {
8584 }
8585
8586 break;
8587
8589
8591 "** IdeSendCommand: SCSIOP_READ_CAPACITY PATH:LUN:TID = %#x:%#x:%#x\n",
8593 // Claim 512 byte blocks (big-endian).
8594 //((PREAD_CAPACITY_DATA)Srb->DataBuffer)->BytesPerBlock = 0x20000;
8598
8599 // Calculate last sector.
8604 }
8605 i--;
8606
8607 //((PREAD_CAPACITY_DATA)Srb->DataBuffer)->LogicalBlockAddress =
8608 // (((PUCHAR)&i)[0] << 24) | (((PUCHAR)&i)[1] << 16) |
8609 // (((PUCHAR)&i)[2] << 8) | ((PUCHAR)&i)[3];
8610
8612
8614 "** IDE disk %#x - #sectors %#x, #heads %#x, #cylinders %#x\n",
8619
8620
8622 break;
8623
8625
8628 "** IdeSendCommand: SCSIOP_READ_CAPACITY PATH:LUN:TID = %#x:%#x:%#x\n",
8630 // Claim 512 byte blocks (big-endian).
8631 //((PREAD_CAPACITY_DATA)Srb->DataBuffer)->BytesPerBlock = 0x20000;
8635
8636 // Calculate last sector.
8641 }
8642 lba--;
8644
8646 "** IDE disk %#x - #sectors %#x, #heads %#x, #cylinders %#x (16)\n",
8651
8653 } else {
8654 goto default_abort;
8655 }
8656 break;
8657
8661
8663 "IdeSendCommand: SCSIOP_VERIFY PATH:LUN:TID = %#x:%#x:%#x\n",
8666
8667 break;
8668
8675
8677 "IdeSendCommand: SCSIOP_%s PATH:LUN:TID = %#x:%#x:%#x\n",
8680 AtaReq->Flags &= ~REQ_FLAG_RW_MASK;
8685 Srb, CmdAction);
8686 break;
8687
8689
8691 "IdeSendCommand: SCSIOP_START_STOP_UNIT immed %d PATH:LUN:TID = %#x:%#x:%#x\n",
8693 //Determine what type of operation we should perform
8694
8695 command = 0;
8696
8698 cdb->START_STOP.FormatLayerNumber ||
8699 cdb->START_STOP.Reserved2 ||
8700 cdb->START_STOP.Reserved2_2 ||
8701 cdb->START_STOP.Reserved3 ||
8702 FALSE) {
8703 goto invalid_cdb;
8704 }
8705
8711 break;
8714 break;
8716 // TODO: we should save power state in order to know
8717 // that RESET sould be issued to revert device into
8718 // operable state
8719
8721 break;
8722 default:
8723 goto invalid_cdb;
8724 }
8726 } else
8729 // Eject media,
8730 // first select device 0 or 1.
8731 //SelectDrive(chan, DeviceNumber);
8732 //AtapiWritePort1(chan, IDX_IO1_o_Command,IDE_COMMAND_MEDIA_EJECT);
8734 } else
8738 } else {
8739 // TODO: we may need to perform hard reset (after sleep) or
8740 // issue IDE_COMMAND_IDLE_IMMED in order to activate device
8742
8744 UniataUserDeviceReset(deviceExtension, LunExt, lChannel);
8746 break;
8747 } else
8751 } else {
8754 break;
8755 }
8756 }
8758 statusByte = WaitOnBaseBusy(chan);
8762 //UniataExpectChannelInterrupt(chan, TRUE); // device may interrupt
8763
8764 } else {
8765invalid_cdb:
8768
8770
8771 senseBuffer->ErrorCode = 0x70;
8772 senseBuffer->Valid = 1;
8773 senseBuffer->AdditionalSenseLength = 0xb;
8776 senseBuffer->AdditionalSenseCodeQualifier = 0;
8777
8780 }
8782 }
8783 break;
8784
8786
8788
8790 statusByte = WaitOnBaseBusy(chan);
8791
8792 //SelectDrive(chan, DeviceNumber);
8794 //AtapiWritePort1(chan, IDX_IO1_o_Command,IDE_COMMAND_DOOR_LOCK);
8795 statusByte = AtaCommand(deviceExtension, DeviceNumber, lChannel, IDE_COMMAND_DOOR_LOCK, 0, 0, 0, 0, 0, ATA_IMMEDIATE);
8796 } else {
8797 //AtapiWritePort1(chan, IDX_IO1_o_Command,IDE_COMMAND_DOOR_UNLOCK);
8798 statusByte = AtaCommand(deviceExtension, DeviceNumber, lChannel, IDE_COMMAND_DOOR_UNLOCK, 0, 0, 0, 0, 0, ATA_IMMEDIATE);
8799 }
8801 } else {
8803 }
8804 break;
8805
8806#if 0
8807 // Note: I don't implement this, because NTFS driver too often issues this command
8808 // It causes awful performance degrade. However, if somebody wants, I will implement
8809 // SCSIOP_FLUSH_BUFFER/SCSIOP_SYNCHRONIZE_CACHE optionally.
8812
8816// status = SRB_STATUS_PENDING;
8817 statusByte = WaitOnBusy(chan);
8818 break;
8819#endif
8820
8822 // this function makes sense buffers to report the results
8823 // of the original GET_MEDIA_STATUS command
8824
8826 "IdeSendCommand: SCSIOP_REQUEST_SENSE PATH:LUN:TID = %#x:%#x:%#x\n",
8830 break;
8831 }
8833 break;
8834
8835 // ATA_PASSTHORUGH
8837 {
8838 PIDEREGS_EX regs;
8840 ULONG to_lim;
8841
8843
8845 //lChannel = Srb->TargetId >> 1;
8846 } else {
8848 regs->bDriveHeadReg &= 0x0f;
8850 }
8851
8853
8855 "IdeSendCommand: SCSIOP_ATA_PASSTHROUGH (exec) PATH:LUN:TID = %#x:%#x:%#x\n",
8857
8860 } else {
8863 } else {
8865 }
8866 }
8867
8868 AtapiDisableInterrupts(deviceExtension, lChannel);
8869
8871 // AHCI
8872 statusByte = UniataAhciSendPIOCommandDirect(
8873 deviceExtension,
8874 lChannel,
8875 DeviceNumber,
8876 Srb,
8877 regs,
8878 ATA_WAIT_INTR,
8879 to_lim
8880 );
8882 goto passthrough_err;
8883 }
8885 UniataAhciAbortOperation(chan);
8886 goto passthrough_err;
8887 }
8888 goto passthrough_done;
8889 }
8890
8891 // SATA/PATA
8892 if((AtaCommandFlags[regs->bCommandReg] & ATA_CMD_FLAG_DMA) || (regs->bOpFlags & UNIATA_SPTI_EX_USE_DMA)) {
8894 use_dma = TRUE;
8895 // this will set REQ_FLAG_DMA_OPERATION in AtaReq->Flags on success
8899 use_dma = FALSE;
8900 }
8901 }
8902 }
8903
8905 AtapiStallExecution(10);
8906 if(use_dma) {
8908 }
8909
8916 } else {
8927 }
8929
8930 if(use_dma) {
8931 GetBaseStatus(chan, statusByte);
8933 goto passthrough_err;
8934 }
8936 }
8937
8939
8942 GetBaseStatus(chan, statusByte);
8944 break;
8945 }
8947 break;
8948 }
8949 }
8951 //if(regs->bOpFlags & UNIATA_SPTI_EX_FREEZE_TO) {
8952 //}
8954 goto passthrough_err;
8955 }
8956
8957 if(use_dma) {
8959 }
8961 GetBaseStatus(chan, statusByte);
8962
8964 AtapiSuckPort2(chan);
8965passthrough_err:
8967
8969
8970 senseBuffer->ErrorCode = 0x70;
8971 senseBuffer->Valid = 1;
8972 senseBuffer->AdditionalSenseLength = 0xb;
8974 senseBuffer->AdditionalSenseCode = 0;
8975 senseBuffer->AdditionalSenseCodeQualifier = 0;
8976
8979 }
8981 } else {
8982
8983 if(!use_dma) {
8986 ReadBuffer(chan,
8989 0);
8991 WriteBuffer(chan,
8994 0);
8995 }
8996 }
8997 }
8999 }
9000passthrough_done:;
9001 AtapiEnableInterrupts(deviceExtension, lChannel);
9002
9003 } else { // read task register
9004
9005 BOOLEAN use48;
9007
9009 "IdeSendCommand: SCSIOP_ATA_PASSTHROUGH (snap) PATH:LUN:TID = %#x:%#x:%#x\n",
9011
9014 use48 = TRUE;
9015 } else
9017 use48 = FALSE;
9018 } else {
9021 break;
9022 }
9025 UniataSnapAtaRegs(chan, 0, regs);
9026
9028 }
9029 break;
9030 }
9031
9032 default:
9033default_abort:
9035 "IdeSendCommand: Unsupported command %#x\n",
9037
9039
9040 } // end switch
9041
9047 }
9048 } else {
9051 }
9052
9054
9055} // end IdeSendCommand()
struct _MODE_POWER_CONDITION_PAGE * PMODE_POWER_CONDITION_PAGE
struct _MODE_CACHING_PAGE * PMODE_CACHING_PAGE
struct _MODE_POWER_CONDITION_PAGE MODE_POWER_CONDITION_PAGE
struct _MODE_CACHING_PAGE MODE_CACHING_PAGE
struct _REPORT_LUNS_INFO_HDR * PREPORT_LUNS_INFO_HDR
ULONG NTAPI IdeBuildSenseBuffer(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_ata.cpp:9145
ULONG NTAPI IdeReadWrite(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb, IN ULONG CmdAction)
Definition: id_ata.cpp:6905
ULONG NTAPI IdeVerify(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_ata.cpp:7261
UCHAR NTAPI UniataAhciSendPIOCommandDirect(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber, IN PSCSI_REQUEST_BLOCK Srb, IN PIDEREGS_EX regs, IN ULONG wait_flags, IN ULONG timeout)
Definition: id_sata.cpp:1655
Definition: helper.h:8
Definition: cdrw_hw.h:2770
Definition: cdrw_hw.h:2862
struct _MODE_POWER_CONDITION_PAGE::@1015::@1016 Fields
union _MODE_POWER_CONDITION_PAGE::@1015 Byte3
Definition: scsi.h:1430
Definition: cdrw_hw.h:1470
Definition: scsi.h:2937
struct _CDB::_SERVICE_ACTION16 SERVICE_ACTION16
struct _CDB::_MEDIA_REMOVAL MEDIA_REMOVAL
struct _CDB::_START_STOP START_STOP
struct _CDB::_MODE_SENSE MODE_SENSE
struct _CDB::_REPORT_LUNS REPORT_LUNS
Referenced by AtapiStartIo__().
◆ IdeSendSmartCommand()
| ULONG NTAPI IdeSendSmartCommand | ( | IN PVOID | HwDeviceExtension, |
| IN PSCSI_REQUEST_BLOCK | Srb, | ||
| IN ULONG | targetId | ||
| ) |
Definition at line 6697 of file id_ata.cpp.
6702{
6707 PSENDCMDOUTPARAMS cmdOutParameters = (PSENDCMDOUTPARAMS)(((PUCHAR)Srb->DataBuffer) + sizeof(SRB_IO_CONTROL));
6708 SENDCMDINPARAMS cmdInParameters = *(PSENDCMDINPARAMS)(((PUCHAR)Srb->DataBuffer) + sizeof(SRB_IO_CONTROL));
6710// ULONG i;
6711 UCHAR statusByte;
6713
6716 "IdeSendSmartCommand: bCommandReg != SMART_CMD\n"));
6718 }
6719
6723
6725
6727
6728 // Determine which of the commands to carry out.
6734
6735 if(Srb->DataTransferLength < sizeof(SRB_IO_CONTROL)+sizeof(SENDCMDOUTPARAMS) + READ_ATTRIBUTE_BUFFER_SIZE - 1) {
6737 "IdeSendSmartCommand: wrong buffer size\n"));
6739 }
6740
6741 statusByte = WaitOnBusy(chan);
6742
6745 "IdeSendSmartCommand: Returning BUSY status\n"));
6747 }
6748
6749 // Zero the ouput buffer as the input buffer info. has been saved off locally (the buffers are the same).
6751
6752 // Set data buffer pointer and words left.
6755
6757 regs->bCommandReg,
6759 0,
6760 regs->bSectorNumberReg,
6761 regs->bSectorCountReg,
6762 regs->bFeaturesReg,
6763 ATA_IMMEDIATE);
6764
6766 // Wait for interrupt.
6768 }
6770
6778
6779 statusByte = WaitOnBusy(chan);
6780
6783 "IdeSendSmartCommand: Returning BUSY status\n"));
6785 }
6786
6787 // Zero the ouput buffer as the input buffer info. has been saved off locally (the buffers are the same).
6789
6790 // Set data buffer pointer and indicate no data transfer.
6792 AtaReq->WordsLeft = 0;
6793
6795 regs->bCommandReg,
6797 0,
6798 regs->bSectorNumberReg,
6799 regs->bSectorCountReg,
6800 regs->bFeaturesReg,
6801 ATA_IMMEDIATE);
6802
6804 // Wait for interrupt.
6807 }
6809 } // end switch(regs->bFeaturesReg)
6810
6812
6813} // end IdeSendSmartCommand()
struct _SENDCMDOUTPARAMS SENDCMDOUTPARAMS
Referenced by AtapiStartIo__().
◆ IdeVerify()
Definition at line 7261 of file id_ata.cpp.
7265{
7270 PHW_LU_EXTENSION LunExt;
7271 //ULONG ldev = GET_LDEV(Srb);
7273 UCHAR statusByte;
7274 ULONGLONG startingSector=0;
7275 ULONG max_bcount;
7277 ULONGLONG endSector;
7280
7282 // Drive has these number sectors.
7287 }
7288
7290 "IdeVerify: Total sectors %#I64x\n",
7291 sectors));
7292
7293 // Get starting sector number from CDB.
7298 break;
7302 break;
7306 break;
7307 }
7308
7310 "IdeVerify: Starting sector %#I64x. Number of blocks %#x\n",
7311 startingSector,
7312 sectorCount));
7313
7314 endSector = startingSector + sectorCount;
7315
7317 "IdeVerify: Ending sector %#I64x\n",
7318 endSector));
7319
7321
7322 // Too big, round down.
7324 "IdeVerify: Truncating request to %#x blocks\n",
7325 sectors - startingSector - 1));
7326
7328
7329 } else {
7330
7331 // Set up sector count register. Round up to next block.
7334 }
7335 }
7336
7337 // Set data buffer pointer and words left.
7340
7341 // Indicate expecting an interrupt.
7343 CHECK_INTR_IDLE);
7344
7346
7350 0, ATA_IMMEDIATE);
7351
7353 // Wait for interrupt.
7356 }
7358
7359} // end IdeVerify()
Referenced by IdeSendCommand().
◆ IssueIdentify()
| BOOLEAN NTAPI IssueIdentify | ( | IN PVOID | HwDeviceExtension, |
| IN ULONG | DeviceNumber, | ||
| IN ULONG | lChannel, | ||
| IN UCHAR | Command, | ||
| IN BOOLEAN | NoSetup | ||
| ) |
deviceExtension->DWordIO
Definition at line 1529 of file id_ata.cpp.
1536{
1539 ULONG waitCount = 50000;
1541 UCHAR statusByte;
1542 //UCHAR statusByte2;
1543 UCHAR signatureLow,
1544 signatureHigh;
1548
1549 use_ahci = UniataIsSATARangeAvailable(deviceExtension, lChannel) &&
1551
1554 // OK
1555 } else {
1558 }
1559 } else
1563 }
1567 }
1568
1569 if(use_ahci) {
1570 statusByte = WaitOnBusyLong(chan);
1571#ifdef _DEBUG
1574 }
1575#endif
1576 } else {
1578 AtapiStallExecution(10);
1579 statusByte = WaitOnBusyLong(chan);
1580 // Check that the status register makes sense.
1581 GetBaseStatus(chan, statusByte);
1582 /*
1583 // unnecessary
1584 if(!hasPCI) {
1585 // original atapi.sys behavior for old ISA-only hardware
1586 AtapiStallExecution(100);
1587 }
1588 */
1589 }
1590
1592 // Mask status byte ERROR bits.
1593 statusByte = UniataIsIdle(deviceExtension, statusByte & ~(IDE_STATUS_ERROR | IDE_STATUS_INDEX));
1595 // Check if register value is reasonable.
1596
1598
1599 // No reset here !!!
1601
1602 //if(!(deviceExtension->HwFlags & UNIATA_SATA)) {
1605 WaitOnBusyLong(chan);
1606
1609
1611 signatureHigh == ATAPI_MAGIC_MSB) {
1612 // Device is Atapi.
1615 }
1616
1617 // We really should wait up to 31 seconds
1618 // The ATA spec. allows device 0 to come back from BUSY in 31 seconds!
1619 // (30 seconds for device 1)
1620 do {
1621 // Wait for Busy to drop.
1622 AtapiStallExecution(100);
1623 GetStatus(chan, statusByte);
1627 }
1628
1630 GetBaseStatus(chan, statusByte);
1631
1633 } else {
1634 GetBaseStatus(chan, statusByte);
1635 }
1636 // Another check for signature, to deal with one model Atapi that doesn't assert signature after
1637 // a soft reset.
1640
1642 signatureHigh == ATAPI_MAGIC_MSB) {
1644 // Device is Atapi.
1646 }
1647
1648 statusByte = UniataIsIdle(deviceExtension, statusByte) & ~IDE_STATUS_INDEX;
1650 // Give up on this.
1653 }
1654 }
1655 } else {
1659 }
1660 //if(!(deviceExtension->HwFlags & UNIATA_SATA)) {
1662 statusByte = WaitForIdleLong(chan);
1664 }
1665 atapiDev = TRUE;
1666 }
1667
1668// if(deviceExtension->HwFlags & UNIATA_SATA) {
1669 if(use_ahci) {
1673 DEV_BSIZE,
1674 Command,
1675 0, 0,
1676 0,
1677 0 /* ahci flags */ ,
1678 ATA_WAIT_INTR,
1679 1000 /* timeout 1 sec */
1680 );
1682 } else
1686 RtlZeroMemory(&(deviceExtension->FullIdentifyData), sizeof(deviceExtension->FullIdentifyData));
1687 RtlCopyMemory(&(deviceExtension->FullIdentifyData), &(LunExt->IdentifyData), sizeof(LunExt->IdentifyData));
1688 } else
1691 } else {
1692 j = 0;
1693 }
1695 // Send IDENTIFY command.
1696
1697 // Load CylinderHigh and CylinderLow with number bytes to transfer for old devices, use 0 for newer.
1698
1699 statusByte = AtaCommand(deviceExtension, DeviceNumber, lChannel, Command, (j < 4) ? DEV_BSIZE : 0 /* cyl */, 0, 0, 0, 0, ATA_WAIT_INTR);
1700 // Clear interrupt
1701
1702 if (!statusByte) {
1705 } else
1707 // Read status to acknowledge any interrupts generated.
1709 GetBaseStatus(chan, statusByte);
1710 // One last check for Atapi.
1714
1716 signatureHigh == ATAPI_MAGIC_MSB) {
1718 // Device is Atapi.
1720 }
1721 }
1722 break;
1723 } else {
1726 // Check the signature. If DRQ didn't come up it's likely Atapi.
1729
1731 signatureHigh == ATAPI_MAGIC_MSB) {
1732 // Device is Atapi.
1735 }
1736 } else {
1739 break;
1740 }
1741 }
1742 // Device didn't respond correctly. It will be given one more chance.
1745 GetBaseStatus(chan, statusByte);
1747
1748 AtapiDisableInterrupts(deviceExtension, lChannel);
1749 AtapiEnableInterrupts(deviceExtension, lChannel);
1750
1751 GetBaseStatus(chan, statusByte);
1752 //GetStatus(chan, statusByte);
1754 }
1755 }
1756 // Check for error on really stupid master devices that assert random
1757 // patterns of bits in the status register at the slave address.
1761 }
1762
1763 if(use_ahci) {
1764 // everything should already be done by controller
1765 } else
1769 statusByte = WaitForDrq(chan);
1770 statusByte = WaitOnBusyLong(chan);
1772 GetBaseStatus(chan, statusByte);
1773 } else {
1774
1776 // Suck out 256 words. After waiting for one model that asserts busy
1777 // after receiving the Packet Identify command.
1778 statusByte = WaitForDrq(chan);
1779 statusByte = WaitOnBusyLong(chan);
1781
1784 GetBaseStatus(chan, statusByte);
1786 }
1787 GetBaseStatus(chan, statusByte);
1789
1790#ifdef _DEBUG
1791 if(atapiDev) {
1794
1795 j =
1797
1798 j |=
1801
1802 }
1803#endif //_DEBUG
1804
1806
1808 // ATI/SII chipsets with memory-mapped IO hangs when
1809 // I call ReadBuffer(), probably due to PCI burst/prefetch enabled
1810 // Unfortunately, I don't know yet how to workaround it except
1811 // spacifying manual delay in the way you see below.
1813
1814 // Work around for some IDE and one model Atapi that will present more than
1815 // 256 bytes for the Identify data.
1817 statusByte = AtapiSuckPort2(chan);
1818 } else {
1821 }
1822
1824 statusByte = WaitForDrq(chan);
1826 GetBaseStatus(chan, statusByte);
1827 }
1829
1830 if(NoSetup) {
1833 }
1834
1843 // Check for BOCHS VM signature. If no additional PCI devices (e.g. VGA)
1844 // are declared BOCHS looks like regular PC
1845 if (!atapiDev && !AtapiStringCmp ((PCCHAR)(deviceExtension->FullIdentifyData.SerialNumber), "XBDH00", 6)) {
1848 } else
1849 if (atapiDev && !AtapiStringCmp ((PCCHAR)(deviceExtension->FullIdentifyData.SerialNumber), "XBDC00", 6)) {
1852 }
1853 }
1854 }
1855
1859 }
1863 KdPrint2((PRINT_PREFIX "UDMA: %x/%x\n", deviceExtension->FullIdentifyData.UltraDMAActive, deviceExtension->FullIdentifyData.UltraDMASupport));
1864 }
1869
1870 LunExt->LimitedTransferMode =
1871 LunExt->OrigTransferMode =
1873 LunExt->TransferMode =
1875
1876 KdPrint2((PRINT_PREFIX "OrigTransferMode: %x, Active: %x\n", LunExt->OrigTransferMode, LunExt->TransferMode));
1880 ));
1883 ));
1884
1890 ));
1891
1892 // Check out a few capabilities / limitations of the device.
1894 // Determine if this drive supports the MSN functions.
1896 DeviceNumber,
1899 }
1900 if(use_ahci) {
1901 // AHCI doesn't recommend using PIO and multiblock
1902 LunExt->MaximumBlockXfer = 0;
1903 } else
1905 // Determine max. block transfer for this device.
1906 LunExt->MaximumBlockXfer =
1908 }
1909 LunExt->NumOfSectors = 0;
1911 ULONGLONG NumOfSectors=0;
1912 ULONGLONG NativeNumOfSectors=0;
1913 ULONGLONG cylinders=0;
1914 ULONGLONG tmp_cylinders=0;
1915
1920 ));
1921
1928 ));
1929
1932 ));
1944 ));
1945
1951 ));
1952
1953 // Read very-old-style drive geometry
1958 ));
1963 // Check for HDDs > 8Gb
1965/* (deviceExtension->FullIdentifyData.TranslationFieldsValid) &&*/
1968 (NumOfSectors < deviceExtension->FullIdentifyData.UserAddressableSectors)) {
1970 cylinders =
1974
1976
1977 NumOfSectors = cylinders *
1980
1982 } else {
1983
1984 }
1985 // Check for LBA mode
1986 KdPrint2((PRINT_PREFIX "SupportLba flag %#x\n", deviceExtension->FullIdentifyData.SupportLba));
1987 KdPrint2((PRINT_PREFIX "SupportDMA flag %#x\n", deviceExtension->FullIdentifyData.SupportDma));
1992 ));
1993 KdPrint2((PRINT_PREFIX "MajorRevision %#x\n", deviceExtension->FullIdentifyData.MajorRevision));
1994 KdPrint2((PRINT_PREFIX "UserAddressableSectors %#x\n", deviceExtension->FullIdentifyData.UserAddressableSectors));
1996 ||
1998/* deviceExtension->FullIdentifyData.TranslationFieldsValid &&*/
2002 } else {
2005 goto skip_lba_staff;
2006 }
2007 // Check for LBA48 support
2014 ) {
2016 cylinders =
2020
2022
2023 NativeNumOfSectors = cylinders *
2026
2028
2029 if(NativeNumOfSectors > NumOfSectors) {
2031 NumOfSectors = NativeNumOfSectors;
2032 }
2033 }
2034
2035 // Check drive capacity report for LBA48-capable drives.
2037 ULONG hNativeNumOfSectors;
2039
2042
2044 if(use_ahci) {
2046 } else {
2050
2052 IDE_DC_USE_HOB );
2053
2055 NativeNumOfSectors |=
2057 hNativeNumOfSectors=
2060 ((PULONG)&NativeNumOfSectors)[1] = hNativeNumOfSectors;
2061 }
2063
2064 // Some drives report LBA48 capability while has capacity below 128Gb
2065 // Probably they support large block-counters.
2066 // But the problem is that some of them reports higher part of Max LBA equal to lower part.
2067 // Here we check this
2068 if((NativeNumOfSectors & 0xffffff) == ((NativeNumOfSectors >> 24) & 0xffffff)) {
2070
2073
2075 if(use_ahci) {
2077 } else {
2084 ;
2085 }
2086 }
2087
2088 if((NativeNumOfSectors & 0xffffff) == ((NativeNumOfSectors >> 24) & 0xffffff)) {
2090 NativeNumOfSectors = 0;
2091 }
2092 }
2093
2095 NativeNumOfSectors > NumOfSectors) {
2096
2099
2103 NumOfSectors = NativeNumOfSectors;
2104 }
2105 }
2106 } // !error
2107 }
2108
2109 if(NumOfSectors < 0x2100000 /*&& NumOfSectors > 31*1000*1000*/) {
2110 // check for native LBA size
2111 // some drives report ~32Gb in Identify Block
2113
2116
2118 if(use_ahci) {
2120 } else {
2125 }
2127
2128 if(NativeNumOfSectors > NumOfSectors) {
2129
2132
2136 NumOfSectors = NativeNumOfSectors;
2137 }
2138 }
2139 }
2140 }
2141
2145 }
2146 } // if(LunExt->DeviceFlags & DFLAGS_LBA_ENABLED)
2147
2148 // fill IdentifyData with bogus geometry
2154 } else
2162 } else {
2163 tmp_cylinders = 0;
2164 }
2167 // ok, we can keep original values
2170 }
2171 } else {
2172 tmp_cylinders = NumOfSectors / (255*63);
2173 if(tmp_cylinders < 0xffff) {
2174 // we can use generic values for H/S for generic geometry approach
2177 }
2178 } else {
2179 // we should use UNIATA geometry approach
2182 }
2183 }
2184 }
2185
2189 }
2190
2194
2197
2198 cylinders = NumOfSectors / (255*63);
2200 } else
2203 cylinders /= 2;
2207 }
2209 cylinders /= 2;
2213 }
2215 cylinders /= 2;
2219 }
2221 cylinders /= 2;
2225 }
2229 }
2230 if(!cylinders) {
2232 cylinders = tmp_cylinders;
2233 }
2236
2237skip_lba_staff:
2238
2242 ));
2246 ));
2250 ));
2251
2252 if(NumOfSectors) {
2253 LunExt->NumOfSectors = NumOfSectors;
2254 }
2259 }
2260 } else {
2261 // ATAPI
2266 }
2269 }
2271 KdPrint2((PRINT_PREFIX "AtapiByteCount0=%x\n", deviceExtension->FullIdentifyData.AtapiByteCount0));
2272 }
2273 }
2274
2277
2278 InitBadBlocks(LunExt);
2279
2282
2283 // This device interrupts with the assertion of DRQ after receiving
2284 // Atapi Packet Command
2287
2288 } else {
2290 }
2291
2293 // ATAPI branch
2295 // This is a tape.
2298 } else
2302 // set CD default costs
2306 statusByte = WaitForDrq(chan);
2307 } else {
2309 LunExt->IdentifyData.DeviceType));
2310 }
2311 KdPrint2((PRINT_PREFIX "IssueIdentify: AtapiCmdSize %#x\n", deviceExtension->FullIdentifyData.AtapiCmdSize));
2312 } else {
2314 }
2315
2316 GetBaseStatus(chan, statusByte);
2319
2320} // end IssueIdentify()
Definition: shell.h:41
struct _IDENTIFY_DATA::@1187 FeaturesEnabled
struct _IDENTIFY_DATA::@1185::@1200 AtapiDMA
struct _IDENTIFY_DATA::@1187 FeaturesSupport
__inline LONG ata_cur_mode_from_ident(PIDENTIFY_DATA ident, BOOLEAN Active)
Definition: atapi.h:1648
Referenced by AtapiResetController__().
◆ MapError()
Definition at line 2951 of file id_ata.cpp.
2955{
2959// ULONG i;
2960 UCHAR errorByte = 0;
2962 UCHAR scsiStatus;
2965
2966 // Read the error register.
2967
2970 if(AtaReq) {
2971 errorByte = AtaReq->ahci.in_error;
2972 } else {
2973 }
2974 } else {
2976 }
2978 "MapError: Error register is %#x\n",
2979 errorByte));
2980
2982
2983 switch (errorByte >> 4) {
2985
2987 "ATAPI: No sense information\n"));
2988 scsiStatus = SCSISTAT_CHECK_CONDITION;
2989 srbStatus = SRB_STATUS_ERROR;
2990 break;
2991
2993
2995 "ATAPI: Recovered error\n"));
2996 scsiStatus = 0;
2997 srbStatus = SRB_STATUS_SUCCESS;
2998 break;
2999
3001
3003 "ATAPI: Device not ready\n"));
3004 scsiStatus = SCSISTAT_CHECK_CONDITION;
3005 srbStatus = SRB_STATUS_ERROR;
3006 break;
3007
3009
3011 "ATAPI: Media error\n"));
3012 scsiStatus = SCSISTAT_CHECK_CONDITION;
3013 srbStatus = SRB_STATUS_ERROR;
3014 break;
3015
3017
3019 "ATAPI: Hardware error\n"));
3020 scsiStatus = SCSISTAT_CHECK_CONDITION;
3021 srbStatus = SRB_STATUS_ERROR;
3022 break;
3023
3025
3027 "ATAPI: Illegal request\n"));
3028 scsiStatus = SCSISTAT_CHECK_CONDITION;
3029 srbStatus = SRB_STATUS_ERROR;
3030 break;
3031
3033
3035 "ATAPI: Unit attention\n"));
3036 scsiStatus = SCSISTAT_CHECK_CONDITION;
3037 srbStatus = SRB_STATUS_ERROR;
3038 break;
3039
3041
3043 "ATAPI: Data protect\n"));
3044 scsiStatus = SCSISTAT_CHECK_CONDITION;
3045 srbStatus = SRB_STATUS_ERROR;
3046 break;
3047
3049
3051 "ATAPI: Blank check\n"));
3052 scsiStatus = SCSISTAT_CHECK_CONDITION;
3053 srbStatus = SRB_STATUS_ERROR;
3054 break;
3055
3058 "Atapi: Command Aborted\n"));
3059 scsiStatus = SCSISTAT_CHECK_CONDITION;
3060 srbStatus = SRB_STATUS_ERROR;
3061 break;
3062
3063 default:
3064
3066 "ATAPI: Invalid sense information\n"));
3067 scsiStatus = 0;
3068 srbStatus = SRB_STATUS_ERROR;
3069 break;
3070 }
3071
3072 } else {
3073
3074 scsiStatus = 0;
3075
3076 // Save errorByte,to be used by SCSIOP_REQUEST_SENSE.
3077 chan->ReturningMediaStatus = errorByte;
3078
3081 "IDE: Media change\n"));
3082 scsiStatus = SCSISTAT_CHECK_CONDITION;
3083 srbStatus = SRB_STATUS_ERROR;
3084
3086
3088
3089 senseBuffer->ErrorCode = 0x70;
3090 senseBuffer->Valid = 1;
3091 senseBuffer->AdditionalSenseLength = 0xb;
3094 senseBuffer->AdditionalSenseCodeQualifier = 0;
3095
3096 srbStatus |= SRB_STATUS_AUTOSENSE_VALID;
3097 }
3098
3101 "IDE: Command abort\n"));
3102 srbStatus = SRB_STATUS_ABORTED;
3103 scsiStatus = SCSISTAT_CHECK_CONDITION;
3104
3106
3108
3109 senseBuffer->ErrorCode = 0x70;
3110 senseBuffer->Valid = 1;
3111 senseBuffer->AdditionalSenseLength = 0xb;
3113 senseBuffer->AdditionalSenseCode = 0;
3114 senseBuffer->AdditionalSenseCodeQualifier = 0;
3115
3116 srbStatus |= SRB_STATUS_AUTOSENSE_VALID;
3117 }
3118
3119 LunExt->ErrorCount++;
3120
3122
3124 "IDE: End of media\n"));
3125 scsiStatus = SCSISTAT_CHECK_CONDITION;
3126 srbStatus = SRB_STATUS_ERROR;
3127
3129
3131
3132 senseBuffer->ErrorCode = 0x70;
3133 senseBuffer->Valid = 1;
3134 senseBuffer->AdditionalSenseLength = 0xb;
3138 senseBuffer->EndOfMedia = 1;
3139
3140 srbStatus |= SRB_STATUS_AUTOSENSE_VALID;
3141 }
3142
3144 LunExt->ErrorCount++;
3145 }
3146
3148
3150 "IDE: Illegal length\n"));
3151 srbStatus = SRB_STATUS_INVALID_REQUEST;
3152
3154
3156
3157 senseBuffer->ErrorCode = 0x70;
3158 senseBuffer->Valid = 1;
3159 senseBuffer->AdditionalSenseLength = 0xb;
3163 senseBuffer->IncorrectLength = 1;
3164
3165 srbStatus |= SRB_STATUS_AUTOSENSE_VALID;
3166 }
3167
3169
3171 "IDE: Bad block\n"));
3172 srbStatus = SRB_STATUS_ERROR;
3173 scsiStatus = SCSISTAT_CHECK_CONDITION;
3175
3177
3178 senseBuffer->ErrorCode = 0x70;
3179 senseBuffer->Valid = 1;
3180 senseBuffer->AdditionalSenseLength = 0xb;
3182 senseBuffer->AdditionalSenseCode = 0;
3183 senseBuffer->AdditionalSenseCodeQualifier = 0;
3184
3185 srbStatus |= SRB_STATUS_AUTOSENSE_VALID;
3186 }
3187
3189
3191 "IDE: Id not found\n"));
3192 srbStatus = SRB_STATUS_ERROR;
3193 scsiStatus = SCSISTAT_CHECK_CONDITION;
3194
3196
3198
3199 senseBuffer->ErrorCode = 0x70;
3200 senseBuffer->Valid = 1;
3201 senseBuffer->AdditionalSenseLength = 0xb;
3203 senseBuffer->AdditionalSenseCode = 0;
3204 senseBuffer->AdditionalSenseCodeQualifier = 0;
3205
3206 srbStatus |= SRB_STATUS_AUTOSENSE_VALID;
3207 }
3208
3209 LunExt->ErrorCount++;
3210
3212
3214 "IDE: Media change\n"));
3215 scsiStatus = SCSISTAT_CHECK_CONDITION;
3216 srbStatus = SRB_STATUS_ERROR;
3217
3219
3221
3222 senseBuffer->ErrorCode = 0x70;
3223 senseBuffer->Valid = 1;
3224 senseBuffer->AdditionalSenseLength = 0xb;
3227 senseBuffer->AdditionalSenseCodeQualifier = 0;
3228
3229 srbStatus |= SRB_STATUS_AUTOSENSE_VALID;
3230 }
3231
3233
3235 "IDE: Data error\n"));
3236 scsiStatus = SCSISTAT_CHECK_CONDITION;
3237 srbStatus = SRB_STATUS_ERROR;
3238
3240 LunExt->ErrorCount++;
3241 }
3242
3243 // Build sense buffer
3245
3247
3248 senseBuffer->ErrorCode = 0x70;
3249 senseBuffer->Valid = 1;
3250 senseBuffer->AdditionalSenseLength = 0xb;
3252 senseBuffer->AdditionalSenseCode = 0;
3253 senseBuffer->AdditionalSenseCodeQualifier = 0;
3254
3255 srbStatus |= SRB_STATUS_AUTOSENSE_VALID;
3256 }
3257 }
3258
3260// deviceExtension->DWordIO = FALSE;
3261
3263 "MapError: ErrorCount >= MAX_ERRORS\n"));
3264
3265 LunExt->DeviceFlags &= ~DFLAGS_DWORDIO_ENABLED;
3266 LunExt->MaximumBlockXfer = 0;
3267 BrutePoint();
3268
3270 "MapError: Disabling 32-bit PIO and Multi-sector IOs\n"));
3271
3272 // Log the error.
3274 "ScsiPortLogError: devExt %#x, Srb %#x, P:T:D=%d:%d:%d, MsgId %#x (%d)\n",
3275 HwDeviceExtension,
3276 Srb,
3280 SP_BAD_FW_WARNING,
3281 4
3282 ));
3283 ScsiPortLogError( HwDeviceExtension,
3284 Srb,
3288 SP_BAD_FW_WARNING,
3289 4);
3290
3291 // Reprogram to not use Multi-sector.
3292 UCHAR statusByte;
3293
3296
3297 statusByte = AtaCommand(deviceExtension, DeviceNumber, lChannel, IDE_COMMAND_SET_MULTIPLE, 0, 0, 0, 0, 0, ATA_WAIT_BASE_READY);
3298
3299 // Check for errors. Reset the value to 0 (disable MultiBlock) if the
3300 // command was aborted.
3302
3303 // Read the error register.
3305
3307 statusByte,
3308 errorByte));
3309
3310 // Adjust the devExt. value, if necessary.
3311 LunExt->MaximumBlockXfer = 0;
3312 BrutePoint();
3313
3314 }
3315 }
3316 }
3317 }
3318
3319 // Set SCSI status to indicate a check condition.
3321
3322 return srbStatus;
3323
3324} // end MapError()
Referenced by AtapiInterrupt__(), and AtapiSendCommand().
◆ SelectDrive()
| UCHAR DDKFASTAPI SelectDrive | ( | IN PHW_CHANNEL | chan, |
| IN ULONG | DeviceNumber | ||
| ) |
Definition at line 621 of file id_ata.cpp.
625{
626 if(!chan) {
627 return 0;
628 }
629/*
630 if(chan->lun[DeviceNumber] &&
631 (chan->lun[DeviceNumber]->DeviceFlags & DFLAGS_ATAPI_CHANGER)) {
632 KdPrint3((" Select %d\n", DeviceNumber));
633 }
634*/
636 //KdPrint3((" Selected %d\n", DeviceNumber));
637 return 1;
638 }
639 AtapiWritePort1(chan, IDX_IO1_o_DriveSelect, DeviceNumber ? IDE_DRIVE_SELECT_2 : IDE_DRIVE_SELECT_1); \
640 chan->last_devsel = DeviceNumber ? 1 : 0;
642 //KdPrint3((" Select %d\n", DeviceNumber));
643 return 2;
644 }
645 //KdPrint3((" Select %d (%d ns)\n", DeviceNumber, g_opt_DriveSelectNanoDelay));
647 return 2;
648} // end SelectDrive()
Referenced by AtaCommand48(), AtapiResetController__(), AtapiSendCommand(), AtapiSoftReset(), IdeMediaStatus(), IdeSendCommand(), and IssueIdentify().
◆ SetDriveParameters()
| BOOLEAN NTAPI SetDriveParameters | ( | IN PVOID | HwDeviceExtension, |
| IN ULONG | DeviceNumber, | ||
| IN ULONG | lChannel | ||
| ) |
Definition at line 2338 of file id_ata.cpp.
2343{
2345 PIDENTIFY_DATA2 identifyData;
2346 PHW_LU_EXTENSION LunExt;
2347// ULONG i;
2348 UCHAR statusByte;
2349 UCHAR errorByte;
2350
2352 identifyData = &(LunExt->IdentifyData);
2353
2357
2358 KdPrint2((PRINT_PREFIX "SetDriveParameters: Number of heads %#x\n", identifyData->NumberOfHeads));
2359 KdPrint2((PRINT_PREFIX "SetDriveParameters: Sectors per track %#x\n", identifyData->SectorsPerTrack));
2360
2361 // Send SET PARAMETER command.
2363 IDE_COMMAND_SET_DRIVE_PARAMETERS, 0,
2364 (identifyData->NumberOfHeads - 1), 0,
2366
2367 statusByte = UniataIsIdle(deviceExtension, statusByte);
2371 errorByte, statusByte));
2373 }
2374
2377 }
2378
2380
2381} // end SetDriveParameters()
Referenced by AtapiResetController__().
◆ UniAtaCalculateLBARegs()
| ULONGLONG NTAPI UniAtaCalculateLBARegs | ( | PHW_LU_EXTENSION | LunExt, |
| ULONGLONG | startingSector, | ||
| PULONG | max_bcount | ||
| ) |
Definition at line 6819 of file id_ata.cpp.
6824{
6825 UCHAR drvSelect,sectorNumber;
6827 ULONG tmp;
6828
6830 (*max_bcount) = 0;
6834 }
6835 }
6836 return startingSector;
6837 }
6840 if(!tmp) {
6842 cylinder = 0;
6843 drvSelect = 0;
6844 sectorNumber = 1;
6846 } else {
6852 cylinder, drvSelect, sectorNumber, (*max_bcount)));
6853 }
6854
6855 return (ULONG)(sectorNumber&0xff) | (((ULONG)cylinder&0xffff)<<8) | (((ULONG)drvSelect&0xf)<<24);
6856} // end UniAtaCalculateLBARegs()
struct _HW_DEVICE_EXTENSION * DeviceExtension
Definition: bsmaster.h:1218
Referenced by IdeReadWrite(), and IdeVerify().
◆ UniAtaCalculateLBARegsBack()
| ULONGLONG NTAPI UniAtaCalculateLBARegsBack | ( | PHW_LU_EXTENSION | LunExt, |
| ULONGLONG | lba | ||
| ) |
Definition at line 6860 of file id_ata.cpp.
6864{
6865 ULONG drvSelect,sectorNumber;
6867 ULONG tmp;
6868
6871 }
6874
6878
6879 lba = sectorNumber-1 +
6881 (cylinder*tmp);
6882
6884} // end UniAtaCalculateLBARegsBack()
Referenced by IdeReadWrite().
◆ UniataExpectChannelInterrupt()
Definition at line 4492 of file id_ata.cpp.
4496{
4497 chan->ExpectingInterrupt = Expecting;
4498 if(Expecting) {
4499 chan->DeviceExtension->ExpectingInterrupt++;
4500 } else
4501 if(chan->DeviceExtension->ExpectingInterrupt) {
4502 chan->DeviceExtension->ExpectingInterrupt--;
4503 }
4504 return;
4505} // end UniataExpectChannelInterrupt()
Referenced by AtaCommand48(), AtapiInterrupt__(), AtapiResetController__(), AtapiSendCommand(), FindDevices(), IdeReadWrite(), IdeSendCommand(), IdeSendSmartCommand(), and IdeVerify().
◆ UniataForgetDevice()
| VOID NTAPI UniataForgetDevice | ( | PHW_LU_EXTENSION | LunExt | ) |
Definition at line 2385 of file id_ata.cpp.
2388{
2389 // keep only DFLAGS_HIDDEN flag
2391 LunExt->AtapiReadyWaitDelay = 0;
2392} // end UniataForgetDevice()
Referenced by AtapiResetController__(), AtapiStartIo__(), CheckDevice(), FindDevices(), IdeSendCommand(), UniataAhciReset(), UniataAnybodyHome(), and UniataSataEvent().
◆ UniataIsIdle()
| UCHAR DDKFASTAPI UniataIsIdle | ( | IN struct _HW_DEVICE_EXTENSION * | deviceExtension, |
| IN UCHAR | Status | ||
| ) |
Definition at line 742 of file id_ata.cpp.
746{
747 UCHAR Status2;
748
751 }
754 }
755// if(deviceExtension->HwFlags & UNIATA_SATA) {
759 }
760 } else {
765 }
766 }
768} // end UniataIsIdle()
Referenced by AtaCommand48(), AtapiDmaInit(), AtapiResetController__(), IssueIdentify(), SetDriveParameters(), and WaitForIdleLong().
◆ UniataNanoSleep()
| VOID DDKFASTAPI UniataNanoSleep | ( | ULONG | nano | ) |
Definition at line 238 of file id_ata.cpp.
241{
243 LARGE_INTEGER t0;
244
245#ifdef NAVO_TEST
246 return;
247#endif //NAVO_TEST
248
250 return;
253 t = 1;
254 }
255 do {
256 KeQuerySystemTime(&t0);
257 t--;
259} // end UniataNanoSleep()
Referenced by AtapiSuckPort2(), AtapiSuckPortBuffer2(), and SelectDrive().
◆ UniataNeedQueueing()
| BOOLEAN NTAPI UniataNeedQueueing | ( | PHW_DEVICE_EXTENSION | deviceExtension, |
| PHW_CHANNEL | chan, | ||
| BOOLEAN | TopLevel | ||
| ) |
Definition at line 9224 of file id_ata.cpp.
9229{
9234#if 0
9235 if(atapiDev &&
9237 (Srb->Cdb[0] == SCSIOP_REQUEST_SENSE)*/) ) {
9239 //PostReq = FALSE;
9241 goto skip_exec;
9242 } else {
9243 PostReq = TRUE;
9244 }
9245#else
9246 PostReq = TRUE;
9247#endif
9248 } else
9250 PostReq = TRUE;
9251 }
9252 } else {
9254 }
9255 return PostReq;
9256} // end UniataNeedQueueing()
Referenced by AtapiStartIo__().
◆ UniataSnapAtaRegs()
| VOID NTAPI UniataSnapAtaRegs | ( | IN PHW_CHANNEL | chan, |
| IN ULONG | DeviceNumber, | ||
| IN OUT PIDEREGS_EX | regs | ||
| ) |
Definition at line 1476 of file id_ata.cpp.
1481{
1483 // AHCI
1485 } else {
1486 // SATA/PATA, assume drive is selected
1488 UCHAR statusByteAlt;
1489
1494 }
1495 regs->bOpFlags = 0;
1496 } else {
1503 }
1505 }
1506 }
1507 return;
1508} // end UniataSnapAtaRegs()
VOID NTAPI UniataAhciSnapAtaRegs(IN PHW_CHANNEL chan, IN ULONG DeviceNumber, IN OUT PIDEREGS_EX regs)
Definition: id_sata.cpp:1216
Referenced by AtapiInterrupt__(), and IdeSendCommand().
◆ UniataUserDeviceReset()
| VOID NTAPI UniataUserDeviceReset | ( | PHW_DEVICE_EXTENSION | deviceExtension, |
| PHW_LU_EXTENSION | LunExt, | ||
| ULONG | lChannel | ||
| ) |
Definition at line 9198 of file id_ata.cpp.
9203{
9205 AtapiDisableInterrupts(deviceExtension, lChannel);
9210 } else {
9215 }
9216 }
9218 AtapiEnableInterrupts(deviceExtension, lChannel);
9219 return;
9220} // end UniataUserDeviceReset()
Referenced by AtapiStartIo__(), and IdeSendCommand().
◆ WaitForDrq()
| UCHAR DDKFASTAPI WaitForDrq | ( | IN PHW_CHANNEL | chan | ) |
Definition at line 798 of file id_ata.cpp.
801{
809 break;
810 } else {
812 }
813 }
815} // end WaitForDrq()
◆ WaitForIdleLong()
| UCHAR DDKFASTAPI WaitForIdleLong | ( | IN PHW_CHANNEL | chan | ) |
Definition at line 772 of file id_ata.cpp.
775{
778 UCHAR Status2;
783 // no drive ?
784 break;
785 } else
787 AtapiStallExecution(10);
788 continue;
789 } else {
790 break;
791 }
792 }
794} // end WaitForIdleLong()
Referenced by IssueIdentify().
◆ WaitOnBaseBusy()
| UCHAR DDKFASTAPI WaitOnBaseBusy | ( | IN PHW_CHANNEL | chan | ) |
Definition at line 698 of file id_ata.cpp.
701{
708 continue;
709 } else {
710 break;
711 }
712 }
714} // end WaitOnBaseBusy()
◆ WaitOnBaseBusyLong()
| UCHAR DDKFASTAPI WaitOnBaseBusyLong | ( | IN PHW_CHANNEL | chan | ) |
Definition at line 718 of file id_ata.cpp.
721{
724
731 AtapiStallExecution(250);
732 continue;
733 } else {
734 break;
735 }
736 }
738} // end WaitOnBaseBusyLong()
Referenced by AtaCommand48().
◆ WaitOnBusy()
| UCHAR DDKFASTAPI WaitOnBusy | ( | IN PHW_CHANNEL | chan | ) |
Definition at line 652 of file id_ata.cpp.
655{
658
664 continue;
665 } else {
666 break;
667 }
668 }
670} // end WaitOnBusy()
◆ WaitOnBusyLong()
| UCHAR DDKFASTAPI WaitOnBusyLong | ( | IN PHW_CHANNEL | chan | ) |
Definition at line 674 of file id_ata.cpp.
677{
680
688 continue;
689 } else {
690 break;
691 }
692 }
694} // end WaitOnBusyLong()
Referenced by AtaCommand48(), AtapiResetController__(), AtapiSuckPort2(), AtapiSuckPortBuffer2(), and IssueIdentify().
◆ WaitShortForDrq()
| UCHAR DDKFASTAPI WaitShortForDrq | ( | IN PHW_CHANNEL | chan | ) |
Definition at line 819 of file id_ata.cpp.
822{
830 break;
831 } else {
833 }
834 }
836} // end WaitShortForDrq()
Variable Documentation
◆ CPU_num
| ULONG CPU_num = 1 |
Definition at line 113 of file id_ata.cpp.
Referenced by AtaSetTransferMode(), and DriverEntry().
◆ ForceSimplex
| ULONG ForceSimplex = 0 |
Definition at line 78 of file id_ata.cpp.
Referenced by DriverEntry(), and UniataFindBusMasterController().
◆ g_Dump
Definition at line 108 of file id_ata.cpp.
Referenced by AtapiFindIsaController(), AtapiReadArgumentString(), AtapiRegCheckParameterValue(), CheckDevice(), DriverEntry(), and UniataFindBusMasterController().
◆ g_foo
| UCHAR g_foo = 0 |
Definition at line 118 of file id_ata.cpp.
◆ g_opt_AtapiDmaRawRead
| BOOLEAN g_opt_AtapiDmaRawRead = 1 |
Definition at line 100 of file id_ata.cpp.
Referenced by AtapiReadChipConfig(), and DriverEntry().
◆ g_opt_AtapiNoDma
Definition at line 101 of file id_ata.cpp.
Referenced by AtapiResetController__(), AtapiSendCommand(), and DriverEntry().
◆ g_opt_AtapiSendDisableIntr
| BOOLEAN g_opt_AtapiSendDisableIntr = 0 |
Definition at line 99 of file id_ata.cpp.
Referenced by AtapiSendCommand(), and DriverEntry().
◆ g_opt_BochsDmaReadWorkaround
Definition at line 102 of file id_ata.cpp.
Referenced by AtapiResetController__(), and IdeReadWrite().
◆ g_opt_DriveSelectNanoDelay
| ULONG g_opt_DriveSelectNanoDelay = 0 |
Definition at line 97 of file id_ata.cpp.
Referenced by DriverEntry(), and SelectDrive().
◆ g_opt_MaxIsrWait
| ULONG g_opt_MaxIsrWait = 40 |
Definition at line 95 of file id_ata.cpp.
Referenced by AtapiInterrupt__(), and DriverEntry().
◆ g_opt_Verbose
| BOOLEAN g_opt_Verbose = 0 |
Definition at line 110 of file id_ata.cpp.
Referenced by DriverEntry().
◆ g_opt_VirtualMachine
| ULONG g_opt_VirtualMachine = 0 |
Definition at line 105 of file id_ata.cpp.
Referenced by AtapiInterrupt__(), AtapiResetController__(), AtapiSoftReset(), CheckDevice(), DriverEntry(), IssueIdentify(), UniataAnybodyHome(), UniataChipDetectChannels(), and UniataEnumBusMasterController__().
◆ g_opt_WaitBusyCount
| ULONG g_opt_WaitBusyCount = 200 |
Definition at line 90 of file id_ata.cpp.
Referenced by DriverEntry(), WaitOnBaseBusy(), and WaitOnBusy().
◆ g_opt_WaitBusyDelay
| ULONG g_opt_WaitBusyDelay = 10 |
Definition at line 91 of file id_ata.cpp.
Referenced by DriverEntry(), WaitOnBaseBusy(), and WaitOnBusy().
◆ g_opt_WaitBusyLongCount
| ULONG g_opt_WaitBusyLongCount = 2000 |
Definition at line 93 of file id_ata.cpp.
Referenced by DriverEntry(), and WaitOnBusyLong().
◆ g_opt_WaitBusyLongDelay
| ULONG g_opt_WaitBusyLongDelay = 250 |
Definition at line 94 of file id_ata.cpp.
Referenced by DriverEntry(), and WaitOnBusyLong().
◆ g_opt_WaitBusyResetCount
| ULONG g_opt_WaitBusyResetCount = 10000 |
Definition at line 89 of file id_ata.cpp.
Referenced by CheckDevice(), and DriverEntry().
◆ g_opt_WaitDrqDelay
| ULONG g_opt_WaitDrqDelay = 10 |
Definition at line 92 of file id_ata.cpp.
Referenced by AtapiSendCommand(), DriverEntry(), WaitForDrq(), and WaitShortForDrq().
◆ g_Perf
| LONGLONG g_Perf = 0 |
Definition at line 80 of file id_ata.cpp.
Referenced by DriverEntry(), and UniataNanoSleep().
◆ g_PerfDt
| ULONG g_PerfDt = 0 |
Definition at line 81 of file id_ata.cpp.
Referenced by DriverEntry(), and UniataNanoSleep().
◆ g_WaitBusyInISR
| ULONG g_WaitBusyInISR = 1 |
Definition at line 87 of file id_ata.cpp.
Referenced by AtapiCheckInterrupt__().
◆ hasPCI
Definition at line 103 of file id_ata.cpp.
Referenced by AtapiFindIsaController(), DriverEntry(), and UniataEnumBusMasterController__().
◆ InDriverEntry
Definition at line 107 of file id_ata.cpp.
Referenced by DriverEntry(), and UniataFindBusMasterController().
◆ SavedRegPath
| UNICODE_STRING SavedRegPath |
Definition at line 69 of file id_ata.cpp.
Referenced by AtapiRegCheckParameterValue(), DriverEntry(), and UniataClaimLegacyPCIIDE().
◆ SavedRegPathBuffer
| WCHAR SavedRegPathBuffer[256] |
Definition at line 70 of file id_ata.cpp.
Referenced by DriverEntry().
◆ SkipRaids
| ULONG SkipRaids = 1 |
Definition at line 77 of file id_ata.cpp.
Referenced by DriverEntry(), and UniataCheckPCISubclass().
◆ uniata_comm_name
|
static |
Definition at line 67 of file id_ata.cpp.
Referenced by AtapiStartIo__().
◆ ver_string
Definition at line 65 of file id_ata.cpp.
Referenced by DriverEntry().
◆ WinVer_WDM_Model
Definition at line 112 of file id_ata.cpp.
Referenced by AtapiHwInitialize(), DriverEntry(), and UniataFindBusMasterController().
