ReactOS 0.4.15-dev-7711-g5627da4
atapi.h
Go to the documentation of this file.
1/*++
2
3Copyright (c) 2002-2016 Alexandr A. Telyatnikov (Alter)
4
5Module Name:
6 atapi.h
7
8Abstract:
9 This file contains IDE, ATA, ATAPI and SCSI Miniport definitions
10 and function prototypes.
11
12Author:
13 Alexander A. Telyatnikov (Alter)
14
15Environment:
16 kernel mode only
17
18Notes:
19
20 THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30
31Revision History:
32
33 Some definitions were taken from standard ATAPI.SYS sources from NT4 DDK by
34 Mike Glass (MGlass)
35
36 Some definitions were taken from FreeBSD 4.3-4.6 ATA driver by
37 Søren Schmidt, Copyright (c) 1998,1999,2000,2001
38
39 Code was changed/updated by
40 Alter, Copyright (c) 2002-20016
41
42Licence:
43 GPLv2
44
45
46--*/
47#ifndef __GLOBAL_H__
48#define __GLOBAL_H__
49
50#ifdef __cplusplus
51extern "C" {
52#endif //__cplusplus
53
54#ifndef USER_MODE
55#include "config.h"
56#endif //USER_MODE
57
58#include "scsi.h"
59#include "stdio.h"
60#include "string.h"
61
62#ifdef _DEBUG
63
64
65#ifndef _DBGNT_
66
67#ifdef KdPrint
68#undef KdPrint
69#endif
70
71#ifdef USE_DBGPRINT_LOGGER
72#include "inc/PostDbgMesg.h"
73#define DbgPrint DbgDump_Printf
74#define Connect_DbgPrint() {DbgDump_SetAutoReconnect(TRUE); DbgDump_Reconnect();}
75#else // USE_DBGPRINT_LOGGER
76#define Connect_DbgPrint() {;}
77#endif // USE_DBGPRINT_LOGGER
78
79#ifdef SCSI_PORT_DBG_PRINT
80
82VOID
85 ULONG DebugPrintLevel,
86 PCCHAR DebugMessage,
87 ...
88 );
89
90#define PRINT_PREFIX 0,
91
92#define KdPrint3(_x_) ScsiDebugPrint _x_ {;}
93#define KdPrint2(_x_) {ScsiDebugPrint("%x: ", PsGetCurrentThread()) ; ScsiDebugPrint _x_ ; }
94#define KdPrint(_x_) ScsiDebugPrint _x_ {;}
95
96#else // SCSI_PORT_DBG_PRINT
97
98#ifndef USE_DBGPRINT_LOGGER
99/*
100ULONG
101_cdecl
102DbgPrint(
103 PCH Format,
104 ...
105 );
106*/
107#endif // USE_DBGPRINT_LOGGER
108
109#define PRINT_PREFIX
110
111// Note, that using DbgPrint on raised IRQL will crash w2k
112// ttis will not happen immediately, so we shall see some logs
113//#define LOG_ON_RAISED_IRQL_W2K TRUE
114//#define LOG_ON_RAISED_IRQL_W2K FALSE
115
116#define KdPrint3(_x_) {if(LOG_ON_RAISED_IRQL_W2K || MajorVersion < 0x05 || KeGetCurrentIrql() <= 2){/*DbgPrint("%x: ", PsGetCurrentThread()) ;*/ DbgPrint _x_ ; if(g_LogToDisplay){ PrintNtConsole _x_ ;} }}
117#define KdPrint2(_x_) {if(LOG_ON_RAISED_IRQL_W2K || MajorVersion < 0x05 || KeGetCurrentIrql() <= 2){/*DbgPrint("%x: ", PsGetCurrentThread()) ;*/ DbgPrint _x_ ; if(g_LogToDisplay){ PrintNtConsole _x_ ;} }}
118#define KdPrint(_x_) {if(LOG_ON_RAISED_IRQL_W2K || MajorVersion < 0x05 || KeGetCurrentIrql() <= 2){/*DbgPrint("%x: ", PsGetCurrentThread()) ;*/ DbgPrint _x_ ; if(g_LogToDisplay){ PrintNtConsole _x_ ;} }}
119/*
120#define PRINT_PREFIX_PTR ((PCHAR)&__tmp__kdprint__buff__)
121#define PRINT_UPREFIX_PTR ((PWCHAR)&__tmp__kdprint__ubuff__)
122#define PRINT_PREFIX PRINT_PREFIX_PTR,
123#define KdPrint2(_x_) \
124{ \
125 WCHAR __tmp__kdprint__ubuff__[256]; \
126 CHAR __tmp__kdprint__buff__[256]; \
127 UNICODE_STRING __tmp__usrt__buff__; \
128 sprintf _x_; \
129 swprintf (PRINT_UPREFIX_PTR, L"%hs", PRINT_PREFIX_PTR); \
130 __tmp__usrt__buff__.Buffer = PRINT_UPREFIX_PTR; \
131 __tmp__usrt__buff__.Length = \
132 __tmp__usrt__buff__.MaximumLength = strlen(PRINT_PREFIX_PTR); \
133 NtDisplayString(&__tmp__usrt__buff__); \
134};
135#define KdPrint(_x_) DbgPrint _x_
136*/
137#endif // SCSI_PORT_DBG_PRINT
138
139//#define AtapiStallExecution(dt) { KdPrint2((" AtapiStallExecution(%d)\n", dt)); ScsiPortStallExecution(dt); }
140#define AtapiStallExecution(dt) { ScsiPortStallExecution(dt); }
141
142#endif // _DBGNT_
143
144#else // _DEBUG
145
146#ifdef KdPrint
147#undef KdPrint
148#endif
149
150#define PRINT_PREFIX "UniATA: "
151
152//#define KdPrint3(_x_) {if(LOG_ON_RAISED_IRQL_W2K || MajorVersion < 0x05 || KeGetCurrentIrql() <= 2){/*DbgPrint("%x: ", PsGetCurrentThread()) ;*/ DbgPrint _x_ ; if(g_LogToDisplay){ PrintNtConsole _x_ ;} }}
153#define KdPrint3(_x_) {;}
154#define KdPrint2(_x_) {;}
155#define KdPrint(_x_) {;}
156#define Connect_DbgPrint() {;}
157
158#define AtapiStallExecution(dt) ScsiPortStallExecution(dt)
159
160#endif // _DEBUG
161
162// IDE register definition
163
164#pragma pack(push, 1)
165
166typedef union _IDE_REGISTERS_1 {
167 struct _o {
176 } o;
177
178 struct _i {
187 } i;
188
190
191#define IDX_IO1 0
192#define IDX_IO1_SZ sizeof(IDE_REGISTERS_1)
193
194#define IDX_IO1 0
195#define IDX_IO1_SZ sizeof(IDE_REGISTERS_1)
196#define IDX_IO1_i_Data (FIELD_OFFSET(IDE_REGISTERS_1, i.Data )+IDX_IO1)
197#define IDX_IO1_i_Error (FIELD_OFFSET(IDE_REGISTERS_1, i.Error )+IDX_IO1)
198#define IDX_IO1_i_BlockCount (FIELD_OFFSET(IDE_REGISTERS_1, i.BlockCount )+IDX_IO1)
199#define IDX_IO1_i_BlockNumber (FIELD_OFFSET(IDE_REGISTERS_1, i.BlockNumber )+IDX_IO1)
200#define IDX_IO1_i_CylinderLow (FIELD_OFFSET(IDE_REGISTERS_1, i.CylinderLow )+IDX_IO1)
201#define IDX_IO1_i_CylinderHigh (FIELD_OFFSET(IDE_REGISTERS_1, i.CylinderHigh)+IDX_IO1)
202#define IDX_IO1_i_DriveSelect (FIELD_OFFSET(IDE_REGISTERS_1, i.DriveSelect )+IDX_IO1)
203#define IDX_IO1_i_Status (FIELD_OFFSET(IDE_REGISTERS_1, i.Status )+IDX_IO1)
204
205#define IDX_IO1_o IDX_IO1_SZ
206#define IDX_IO1_o_SZ sizeof(IDE_REGISTERS_1)
207
208#define IDX_IO1_o_Data (FIELD_OFFSET(IDE_REGISTERS_1, o.Data )+IDX_IO1_o)
209#define IDX_IO1_o_Feature (FIELD_OFFSET(IDE_REGISTERS_1, o.Feature )+IDX_IO1_o)
210#define IDX_IO1_o_BlockCount (FIELD_OFFSET(IDE_REGISTERS_1, o.BlockCount )+IDX_IO1_o)
211#define IDX_IO1_o_BlockNumber (FIELD_OFFSET(IDE_REGISTERS_1, o.BlockNumber )+IDX_IO1_o)
212#define IDX_IO1_o_CylinderLow (FIELD_OFFSET(IDE_REGISTERS_1, o.CylinderLow )+IDX_IO1_o)
213#define IDX_IO1_o_CylinderHigh (FIELD_OFFSET(IDE_REGISTERS_1, o.CylinderHigh)+IDX_IO1_o)
214#define IDX_IO1_o_DriveSelect (FIELD_OFFSET(IDE_REGISTERS_1, o.DriveSelect )+IDX_IO1_o)
215#define IDX_IO1_o_Command (FIELD_OFFSET(IDE_REGISTERS_1, o.Command )+IDX_IO1_o)
216
217typedef union _IDE_REGISTERS_2 {
221
222#define IDX_IO2 (IDX_IO1_o+IDX_IO1_o_SZ)
223#define IDX_IO2_SZ sizeof(IDE_REGISTERS_2)
224
225#define IDX_IO2_AltStatus (FIELD_OFFSET(IDE_REGISTERS_2, AltStatus )+IDX_IO2)
226//#define IDX_IO2_DriveAddress (FIELD_OFFSET(IDE_REGISTERS_2, DriveAddress)+IDX_IO2)
227
228#define IDX_IO2_o (IDX_IO2+IDX_IO2_SZ)
229#define IDX_IO2_o_SZ sizeof(IDE_REGISTERS_2)
230
231#define IDX_IO2_o_Control (FIELD_OFFSET(IDE_REGISTERS_2, Control)+IDX_IO2_o)
232//
233// Device Extension Device Flags
234//
235
236#define DFLAGS_DEVICE_PRESENT 0x0001 // Indicates that some device is present.
237#define DFLAGS_ATAPI_DEVICE 0x0002 // Indicates whether ATAPI commands can be used.
238#define DFLAGS_TAPE_DEVICE 0x0004 // Indicates whether this is a tape device.
239#define DFLAGS_INT_DRQ 0x0008 // Indicates whether device interrupts as DRQ is set after
240 // receiving ATAPI Packet Command
241#define DFLAGS_REMOVABLE_DRIVE 0x0010 // Indicates that the drive has the 'removable' bit set in
242 // identify data (offset 128)
243#define DFLAGS_MEDIA_STATUS_ENABLED 0x0020 // Media status notification enabled
244#define DFLAGS_ATAPI_CHANGER 0x0040 // Indicates atapi 2.5 changer present.
245#define DFLAGS_SANYO_ATAPI_CHANGER 0x0080 // Indicates multi-platter device, not conforming to the 2.5 spec.
246#define DFLAGS_CHANGER_INITED 0x0100 // Indicates that the init path for changers has already been done.
247#define DFLAGS_LBA_ENABLED 0x0200 // Indicates that we should use LBA addressing rather than CHS
248#define DFLAGS_DWORDIO_ENABLED 0x0400 // Indicates that we should use 32-bit IO
249#define DFLAGS_WCACHE_ENABLED 0x0800 // Indicates that we use write cache
250#define DFLAGS_RCACHE_ENABLED 0x1000 // Indicates that we use read cache
251#define DFLAGS_ORIG_GEOMETRY 0x2000 //
252#define DFLAGS_REINIT_DMA 0x4000 //
253#define DFLAGS_HIDDEN 0x8000 // Hidden device, available only with special IOCTLs
254 // via communication virtual device
255#define DFLAGS_MANUAL_CHS 0x10000 // For devices those have no IDENTIFY commands
256#define DFLAGS_LBA32plus 0x20000 // Device is larger than LBA32
257//#define DFLAGS_ 0x10000 //
258//
259// Used to disable 'advanced' features.
260//
261
262#define MAX_ERRORS 4
263
264//
265// ATAPI command definitions
266//
267
268#define ATAPI_MODE_SENSE 0x5A
269#define ATAPI_MODE_SELECT 0x55
270#define ATAPI_FORMAT_UNIT 0x24
271
272// ATAPI Command Descriptor Block
273
274typedef struct _MODE_SENSE_10 {
277 UCHAR PageCode : 6;
278 UCHAR Pc : 2;
279 UCHAR Reserved2[4];
282 UCHAR Reserved3[3];
284
285typedef struct _MODE_SELECT_10 {
287 UCHAR Reserved1 : 4;
288 UCHAR PFBit : 1;
289 UCHAR Reserved2 : 3;
290 UCHAR Reserved3[5];
293 UCHAR Reserved4[3];
295
296typedef struct _MODE_PARAMETER_HEADER_10 {
300 UCHAR Reserved[5];
302
303//
304// values for TransferMode
305//
306#define ATA_PIO 0x00
307#define ATA_PIO_NRDY 0x01
308
309#define ATA_PIO0 0x08
310#define ATA_PIO1 0x09
311#define ATA_PIO2 0x0a
312#define ATA_PIO3 0x0b
313#define ATA_PIO4 0x0c
314#define ATA_PIO5 0x0d
315
316#define ATA_DMA 0x10
317#define ATA_SDMA 0x10
318#define ATA_SDMA0 0x10
319#define ATA_SDMA1 0x11
320#define ATA_SDMA2 0x12
321
322#define ATA_WDMA 0x20
323#define ATA_WDMA0 0x20
324#define ATA_WDMA1 0x21
325#define ATA_WDMA2 0x22
326
327#define ATA_UDMA 0x40
328#define ATA_UDMA0 0x40 // ATA-16
329#define ATA_UDMA1 0x41 // ATA-25
330#define ATA_UDMA2 0x42 // ATA-33
331#define ATA_UDMA3 0x43 // ATA-44
332#define ATA_UDMA4 0x44 // ATA-66
333#define ATA_UDMA5 0x45 // ATA-100
334#define ATA_UDMA6 0x46 // ATA-133
335//#define ATA_UDMA7 0x47 // ATA-166
336
337#define ATA_SA150 0x47 /*0x80*/
338#define ATA_SA300 0x48 /*0x81*/
339#define ATA_SA600 0x49 /*0x82*/
340
341#define ATA_MODE_NOT_SPEC ((ULONG)(-1)) /*0x82*/
342
343//
344// IDE command definitions
345//
346
347#define IDE_COMMAND_DATA_SET_MGMT 0x06 // TRIM
348#define IDE_COMMAND_ATAPI_RESET 0x08
349#define IDE_COMMAND_RECALIBRATE 0x10
350#define IDE_COMMAND_READ 0x20
351#define IDE_COMMAND_READ_NO_RETR 0x21
352#define IDE_COMMAND_READ48 0x24
353#define IDE_COMMAND_READ_DMA48 0x25
354#define IDE_COMMAND_READ_DMA_Q48 0x26
355#define IDE_COMMAND_READ_NATIVE_SIZE48 0x27
356#define IDE_COMMAND_READ_MUL48 0x29
357#define IDE_COMMAND_READ_STREAM_DMA48 0x2A
358#define IDE_COMMAND_READ_STREAM48 0x2B
359#define IDE_COMMAND_READ_LOG48 0x2f
360#define IDE_COMMAND_WRITE 0x30
361#define IDE_COMMAND_WRITE_NO_RETR 0x31
362#define IDE_COMMAND_WRITE48 0x34
363#define IDE_COMMAND_WRITE_DMA48 0x35
364#define IDE_COMMAND_WRITE_DMA_Q48 0x36
365#define IDE_COMMAND_SET_NATIVE_SIZE48 0x37
366#define IDE_COMMAND_WRITE_MUL48 0x39
367#define IDE_COMMAND_WRITE_STREAM_DMA48 0x3a
368#define IDE_COMMAND_WRITE_STREAM48 0x3b
369#define IDE_COMMAND_WRITE_FUA_DMA48 0x3d
370#define IDE_COMMAND_WRITE_FUA_DMA_Q48 0x3e
371#define IDE_COMMAND_WRITE_LOG48 0x3f
372#define IDE_COMMAND_VERIFY 0x40
373#define IDE_COMMAND_VERIFY48 0x42
374#define IDE_COMMAND_READ_LOG_DMA48 0x47
375#define IDE_COMMAND_WRITE_LOG_DMA48 0x57
376#define IDE_COMMAND_TRUSTED_RCV 0x5c
377#define IDE_COMMAND_TRUSTED_RCV_DMA 0x5d
378#define IDE_COMMAND_TRUSTED_SEND 0x5e
379#define IDE_COMMAND_TRUSTED_SEND_DMA 0x5f
380#define IDE_COMMAND_SEEK 0x70
381#define IDE_COMMAND_SET_DRIVE_PARAMETERS 0x91
382#define IDE_COMMAND_ATAPI_PACKET 0xA0
383#define IDE_COMMAND_ATAPI_IDENTIFY 0xA1
384#define IDE_COMMAND_READ_MULTIPLE 0xC4
385#define IDE_COMMAND_WRITE_MULTIPLE 0xC5
386#define IDE_COMMAND_SET_MULTIPLE 0xC6
387#define IDE_COMMAND_READ_DMA_Q 0xC7
388#define IDE_COMMAND_READ_DMA 0xC8
389#define IDE_COMMAND_WRITE_DMA 0xCA
390#define IDE_COMMAND_WRITE_DMA_Q 0xCC
391#define IDE_COMMAND_WRITE_MUL_FUA48 0xCE
392#define IDE_COMMAND_GET_MEDIA_STATUS 0xDA
393#define IDE_COMMAND_DOOR_LOCK 0xDE
394#define IDE_COMMAND_DOOR_UNLOCK 0xDF
395#define IDE_COMMAND_STANDBY_IMMED 0xE0 // flush and spin down
396#define IDE_COMMAND_IDLE_IMMED 0xE1
397#define IDE_COMMAND_STANDBY 0xE2 // flush and spin down and enable autopowerdown timer
398#define IDE_COMMAND_IDLE 0xE3
399#define IDE_COMMAND_READ_PM 0xE4 // SATA PM
400#define IDE_COMMAND_SLEEP 0xE6 // flush, spin down and deactivate interface
401#define IDE_COMMAND_FLUSH_CACHE 0xE7
402#define IDE_COMMAND_WRITE_PM 0xE8 // SATA PM
403#define IDE_COMMAND_IDENTIFY 0xEC
404#define IDE_COMMAND_MEDIA_EJECT 0xED
405#define IDE_COMMAND_FLUSH_CACHE48 0xEA
406#define IDE_COMMAND_ENABLE_MEDIA_STATUS 0xEF
407#define IDE_COMMAND_SET_FEATURES 0xEF /* features command,
408 IDE_COMMAND_ENABLE_MEDIA_STATUS */
409#define IDE_COMMAND_READ_NATIVE_SIZE 0xF8
410#define IDE_COMMAND_SET_NATIVE_SIZE 0xF9
412#define SCSIOP_ATA_PASSTHROUGH 0xCC //
413
414//
415// IDE status definitions
416//
418#define IDE_STATUS_SUCCESS 0x00
419#define IDE_STATUS_ERROR 0x01
420#define IDE_STATUS_INDEX 0x02
421#define IDE_STATUS_CORRECTED_ERROR 0x04
422#define IDE_STATUS_DRQ 0x08
423#define IDE_STATUS_DSC 0x10
424//#define IDE_STATUS_DWF 0x10 /* drive write fault */
425#define IDE_STATUS_DMA 0x20 /* DMA ready */
426#define IDE_STATUS_DWF 0x20 /* drive write fault */
427#define IDE_STATUS_DRDY 0x40
428#define IDE_STATUS_IDLE 0x50
429#define IDE_STATUS_BUSY 0x80
431#define IDE_STATUS_WRONG 0xff
432#define IDE_STATUS_MASK 0xff
433
434
435//
436// IDE drive select/head definitions
437//
439#define IDE_DRIVE_SELECT 0xA0
440#define IDE_DRIVE_1 0x00
441#define IDE_DRIVE_2 0x10
442#define IDE_DRIVE_SELECT_1 (IDE_DRIVE_SELECT | IDE_DRIVE_1)
443#define IDE_DRIVE_SELECT_2 (IDE_DRIVE_SELECT | IDE_DRIVE_2)
444#define IDE_DRIVE_MASK (IDE_DRIVE_SELECT_1 | IDE_DRIVE_SELECT_2)
446#define IDE_USE_LBA 0x40
447
448//
449// IDE drive control definitions
450//
452#define IDE_DC_DISABLE_INTERRUPTS 0x02
453#define IDE_DC_RESET_CONTROLLER 0x04
454#define IDE_DC_A_4BIT 0x80
455#define IDE_DC_USE_HOB 0x80 // use high-order byte(s)
456#define IDE_DC_REENABLE_CONTROLLER 0x00
457
458// IDE error definitions
459//
461#define IDE_ERROR_ICRC 0x80
462#define IDE_ERROR_BAD_BLOCK 0x80
463#define IDE_ERROR_DATA_ERROR 0x40
464#define IDE_ERROR_MEDIA_CHANGE 0x20
465#define IDE_ERROR_ID_NOT_FOUND 0x10
466#define IDE_ERROR_MEDIA_CHANGE_REQ 0x08
467#define IDE_ERROR_COMMAND_ABORTED 0x04
468#define IDE_ERROR_END_OF_MEDIA 0x02
469#define IDE_ERROR_NO_MEDIA 0x02
470#define IDE_ERROR_ILLEGAL_LENGTH 0x01
471
472//
473// ATAPI register definition
474//
475
476typedef union _ATAPI_REGISTERS_1 {
477 struct _o {
486 } o;
488 struct _i {
497 } i;
498
499 //IDE_REGISTERS_1 ide;
503#define IDX_ATAPI_IO1 IDX_IO1
504#define IDX_ATAPI_IO1_SZ sizeof(ATAPI_REGISTERS_1)
506#define IDX_ATAPI_IO1_i_Data (FIELD_OFFSET(ATAPI_REGISTERS_1, i.Data )+IDX_ATAPI_IO1)
507#define IDX_ATAPI_IO1_i_Error (FIELD_OFFSET(ATAPI_REGISTERS_1, i.Error )+IDX_ATAPI_IO1)
508#define IDX_ATAPI_IO1_i_InterruptReason (FIELD_OFFSET(ATAPI_REGISTERS_1, i.InterruptReason)+IDX_ATAPI_IO1)
509#define IDX_ATAPI_IO1_i_Unused1 (FIELD_OFFSET(ATAPI_REGISTERS_1, i.Unused1 )+IDX_ATAPI_IO1)
510#define IDX_ATAPI_IO1_i_ByteCountLow (FIELD_OFFSET(ATAPI_REGISTERS_1, i.ByteCountLow )+IDX_ATAPI_IO1)
511#define IDX_ATAPI_IO1_i_ByteCountHigh (FIELD_OFFSET(ATAPI_REGISTERS_1, i.ByteCountHigh )+IDX_ATAPI_IO1)
512#define IDX_ATAPI_IO1_i_DriveSelect (FIELD_OFFSET(ATAPI_REGISTERS_1, i.DriveSelect )+IDX_ATAPI_IO1)
513#define IDX_ATAPI_IO1_i_Status (FIELD_OFFSET(ATAPI_REGISTERS_1, i.Status )+IDX_ATAPI_IO1)
515#define IDX_ATAPI_IO1_o_Data (FIELD_OFFSET(ATAPI_REGISTERS_1, o.Data )+IDX_ATAPI_IO1)
516#define IDX_ATAPI_IO1_o_Feature (FIELD_OFFSET(ATAPI_REGISTERS_1, o.Feature )+IDX_ATAPI_IO1)
517#define IDX_ATAPI_IO1_o_Unused0 (FIELD_OFFSET(ATAPI_REGISTERS_1, o.Unused0 )+IDX_ATAPI_IO1)
518#define IDX_ATAPI_IO1_o_Unused1 (FIELD_OFFSET(ATAPI_REGISTERS_1, o.Unused1 )+IDX_ATAPI_IO1)
519#define IDX_ATAPI_IO1_o_ByteCountLow (FIELD_OFFSET(ATAPI_REGISTERS_1, o.ByteCountLow )+IDX_ATAPI_IO1)
520#define IDX_ATAPI_IO1_o_ByteCountHigh (FIELD_OFFSET(ATAPI_REGISTERS_1, o.ByteCountHigh)+IDX_ATAPI_IO1)
521#define IDX_ATAPI_IO1_o_DriveSelect (FIELD_OFFSET(ATAPI_REGISTERS_1, o.DriveSelect )+IDX_ATAPI_IO1)
522#define IDX_ATAPI_IO1_o_Command (FIELD_OFFSET(ATAPI_REGISTERS_1, o.Command )+IDX_ATAPI_IO1)
523
524/*
525typedef union _ATAPI_REGISTERS_2 {
526 struct {
527 UCHAR AltStatus;
528 UCHAR DriveAddress;
529 };
530
531 //IDE_REGISTERS_2 ide;
532
533} ATAPI_REGISTERS_2, *PATAPI_REGISTERS_2;
534
535#define IDX_ATAPI_IO2 IDX_ATAPI_IO2_SZ
536#define IDX_ATAPI_IO2_SZ sizeof(ATAPI_REGISTERS_2)
537*/
538
539//
540// ATAPI interrupt reasons
541//
542
543// for IDX_ATAPI_IO1_i_InterruptReason
544#define ATAPI_IR_COD 0x01
545#define ATAPI_IR_COD_Data 0x0
546#define ATAPI_IR_COD_Cmd 0x1
548#define ATAPI_IR_IO 0x02
549#define ATAPI_IR_IO_toDev 0x00
550#define ATAPI_IR_IO_toHost 0x02
552#define ATAPI_IR_Mask 0x03
553
554//
555// ATA Features
556//
558#define ATA_F_DMA 0x01 /* enable DMA */
559#define ATA_F_OVL 0x02 /* enable overlap */
560#define ATA_F_DMAREAD 0x04 /* DMA Packet (ATAPI) read */
562#define ATA_C_F_SETXFER 0x03 /* set transfer mode */
564#define ATA_C_F_ENAB_WCACHE 0x02 /* enable write cache */
565#define ATA_C_F_DIS_WCACHE 0x82 /* disable write cache */
567#define ATA_C_F_ENAB_RCACHE 0xaa /* enable readahead cache */
568#define ATA_C_F_DIS_RCACHE 0x55 /* disable readahead cache */
570#define ATA_C_F_ENAB_RELIRQ 0x5d /* enable release interrupt */
571#define ATA_C_F_DIS_RELIRQ 0xdd /* disable release interrupt */
573#define ATA_C_F_ENAB_SRVIRQ 0x5e /* enable service interrupt */
574#define ATA_C_F_DIS_SRVIRQ 0xde /* disable service interrupt */
576#define ATA_C_F_ENAB_MEDIASTAT 0x95 /* enable media status */
577#define ATA_C_F_DIS_MEDIASTAT 0x31 /* disable media status */
579#define ATA_C_F_ENAB_APM 0x05 /* enable advanced power management */
580#define ATA_C_F_DIS_APM 0x85 /* disable advanced power management */
581#define ATA_C_F_APM_CNT_MAX_PERF 0xfe /* maximum performance */
582#define ATA_C_F_APM_CNT_MIN_NO_STANDBY 0x80 /* min. power w/o standby */
583#define ATA_C_F_APM_CNT_MIN_STANDBY 0x01 /* min. power with standby */
585#define ATA_C_F_ENAB_ACOUSTIC 0x42 /* enable acoustic management */
586#define ATA_C_F_DIS_ACOUSTIC 0xc2 /* disable acoustic management */
587#define ATA_C_F_AAM_CNT_MAX_PERF 0xfe /* maximum performance */
588#define ATA_C_F_AAM_CNT_MAX_POWER_SAVE 0x80 /* min. power */
589
590// New SMART Feature definitions
591#ifndef READ_LOG_SECTOR
592#define READ_LOG_SECTOR 0xD5
593#define WRITE_LOG_SECTOR 0xD6
594#define WRITE_THRESHOLDS 0xD7
595#define AUTO_OFFLINE 0xDB
596#endif // READ_LOG_SECTOR
597
598//
599// ATAPI interrupt reasons
600//
602#define ATA_I_CMD 0x01 /* cmd (1) | data (0) */
603#define ATA_I_IN 0x02 /* read (1) | write (0) */
604#define ATA_I_RELEASE 0x04 /* released bus (1) */
605#define ATA_I_TAGMASK 0xf8 /* tag mask */
606
607// IDENTIFY data
608//
609
610typedef struct _IDENTIFY_DATA {
611 UCHAR AtapiCmdSize:2; // 00 00
612#define ATAPI_PSIZE_12 0 /* 12 bytes */
613#define ATAPI_PSIZE_16 1 /* 16 bytes */
614 UCHAR :3;
615 UCHAR DrqType:2; // 00 00
616#define ATAPI_DRQT_MPROC 0 /* cpu 3 ms delay */
617#define ATAPI_DRQT_INTR 1 /* intr 10 ms delay */
618#define ATAPI_DRQT_ACCEL 2 /* accel 50 us delay */
620
622#define ATAPI_TYPE_DIRECT 0 /* disk/floppy */
623#define ATAPI_TYPE_TAPE 1 /* streaming tape */
624#define ATAPI_TYPE_CDROM 5 /* CD-ROM device */
625#define ATAPI_TYPE_OPTICAL 7 /* optical disk */
626 UCHAR :1;
627 UCHAR CmdProtocol:2; // 00 00
628#define ATAPI_PROTO_ATAPI 2
629// USHORT GeneralConfiguration; // 00 00
630
632 USHORT Reserved1; // 04 2
633 USHORT NumberOfHeads; // 06 3
634 USHORT UnformattedBytesPerTrack; // 08 4 // Now obsolete
635 USHORT UnformattedBytesPerSector; // 0A 5 // Now obsolete
636 USHORT SectorsPerTrack; // 0C 6
637
638 USHORT VendorUnique1[3]; // 0E 7-9
639 UCHAR SerialNumber[20]; // 14 10-19
640
642#define ATA_BT_SINGLEPORTSECTOR 1 /* 1 port, 1 sector buffer */
643#define ATA_BT_DUALPORTMULTI 2 /* 2 port, mult sector buffer */
644#define ATA_BT_DUALPORTMULTICACHE 3 /* above plus track cache */
645
646 USHORT BufferSectorSize; // 2A 21
647 USHORT NumberOfEccBytes; // 2C 22
648 USHORT FirmwareRevision[4]; // 2E 23-26
649 USHORT ModelNumber[20]; // 36 27-46
651 UCHAR VendorUnique2; // 5F
652
653 USHORT DoubleWordIo; // 60 48
654
655 USHORT Reserved62_0:8; // 62 49
662 USHORT SupportQTag:1; /* supports queuing overlap */
663 USHORT SupportIDma:1; /* interleaved DMA supported */
664
665/* USHORT Capabilities; // 62 49
666#define IDENTIFY_CAPABILITIES_SUPPORT_DMA 0x0100
667#define IDENTIFY_CAPABILITIES_SUPPORT_LBA 0x0200
668#define IDENTIFY_CAPABILITIES_DISABLE_IORDY 0x0400
669#define IDENTIFY_CAPABILITIES_SUPPORT_IORDY 0x0800
670#define IDENTIFY_CAPABILITIES_SOFT_RESET 0x1000
671#define IDENTIFY_CAPABILITIES_STDBY_OVLP 0x2000
672#define IDENTIFY_CAPABILITIES_SUPPORT_QTAG 0x4000
673#define IDENTIFY_CAPABILITIES_SUPPORT_IDMA 0x8000*/
679// USHORT Reserved2;
681 UCHAR Vendor51; // 66 51
684 UCHAR Vendor52; // 68 52
686
687 USHORT TranslationFieldsValid:1; // 6A 53 /* 54-58 */
688 USHORT PioTimingsValid:1; /* 64-70 */
689 USHORT UdmaModesValid:1; /* 88 */
690 USHORT Reserved3:13;
691
693 USHORT NumberOfCurrentHeads; // 6E 55 \-
694 USHORT CurrentSectorsPerTrack; // 70 56 /- obsolete USHORT[5]
695 ULONG CurrentSectorCapacity; // 72 57-58 /-
704
706
707 union {
708 struct {
709 USHORT SingleWordDMASupport : 8; // 62 ATA, obsolete
711 };
712 struct {
713 USHORT UDMASupport : 7; // 62 ATAPI
718 } AtapiDMA;
719 };
720
721 USHORT MultiWordDMASupport : 8; // 63
723
724 USHORT AdvancedPIOModes : 8; // 64
725 USHORT Reserved4 : 8;
727#define AdvancedPIOModes_3 1
728#define AdvancedPIOModes_4 2
729#define AdvancedPIOModes_5 4 // non-standard
730
749 USHORT Reserved70; // 70
752 USHORT Reserved73_74[2]; // 73-74
753
754 USHORT QueueLength : 5; // 75
755 USHORT Reserved75_6 : 11;
756
758#define ATA_SATA_GEN1 0x0002
759#define ATA_SATA_GEN2 0x0004
760#define ATA_SATA_GEN3 0x0008
761#define ATA_SUPPORT_NCQ 0x0100
762#define ATA_SUPPORT_IFPWRMNGTRCV 0x0200
763#define ATA_SUPPORT_PHY_EVENT_COUNTER 0x0400
764#define ATA_SUPPORT_NCQ_UNLOAD 0x0800
765#define ATA_SUPPORT_NCQ_PRI_INFO 0x1000
766
767 USHORT Reserved77; // 77
768
770#define ATA_SUPPORT_NONZERO 0x0002
771#define ATA_SUPPORT_AUTOACTIVATE 0x0004
772#define ATA_SUPPORT_IFPWRMNGT 0x0008
773#define ATA_SUPPORT_INORDERDATA 0x0010
774
775 USHORT SataEnable; // 79
776 USHORT MajorRevision; // 80
777 USHORT MinorRevision; // 81
779#define ATA_VER_MJ_ATA4 0x0010
780#define ATA_VER_MJ_ATA5 0x0020
781#define ATA_VER_MJ_ATA6 0x0040
782#define ATA_VER_MJ_ATA7 0x0080
783#define ATA_VER_MJ_ATA8_ASC 0x0100
784
785 struct {
786 USHORT Smart:1; // 82/85
790 USHORT Packet:1;
795 USHORT Reset:1;
800 USHORT Nop:1;
802
803 USHORT Microcode:1; // 83/86
804 USHORT Queued:1; //
805 USHORT CFA:1; //
806 USHORT APM:1; //
807 USHORT Notify:1; //
808 USHORT Standby:1; //
809 USHORT Spinup:1; //
811 USHORT MaxSecurity:1; //
812 USHORT AutoAcoustic:1; //
813 USHORT Address48:1; //
815 USHORT FlushCache:1; //
816 USHORT FlushCache48:1; //
817 USHORT SupportOne:1; //
818 USHORT SupportZero:1; //
819
820 USHORT SmartErrorLog:1; // 84/87
825 USHORT Logging:1;
827 USHORT ExtendedOne:1; //
843 USHORT HwResValid : 2;
845#define IDENTIFY_CABLE_ID_VALID 0x01
853 ULONG StreamGranularity; // 98-99
854
858 USHORT MaxLBARangeDescBlockCount; // 105 // in 512b blocks
859 union {
861 struct {
864 USHORT PLSS_LargeL:1; // =1 if 117-118 are valid
866 USHORT PLSS_Signature:2; // = 0x01 = 01b
867 };
868 };
870 USHORT WorldWideName[4]; // 108-111
871 USHORT Reserved112[5]; // 112-116
873 ULONG LargeSectorSize; // 117-118
874
875 struct {
878 USHORT Reserved121[4]; // 121-124
880 USHORT Reserved126; // 126
882 USHORT RemovableStatus; // 127
883 union {
884 USHORT SecurityStatus; // 128
885 struct {
893 USHORT MasterPasswdCap:1; // 0 - high, 1 - max
896 };
898 USHORT Reserved129[31]; // 129-159
900 USHORT Reserved161[7]; // 161-167
906 USHORT Reserved174[2]; // 174-175
907 USHORT MediaSerial[30]; // 176-205
908 union {
909 USHORT SCT; // 206
910 struct {
918 };
919 };
920 USHORT Reserved_CE_ATA[2]; // 207-208
945 USHORT Reserved221; // 221
946 union {
947 struct {
950 };
951 struct {
955 } PATA;
956 struct {
962 USHORT v30:1;
967 USHORT TransportMinor; // 223
969 USHORT Reserved224[10]; // 224-233
974 USHORT Reserved236[19]; // 236-254
975
976 union {
977 USHORT Integrity; // 255
978 struct {
979#define ATA_ChecksumValid 0xA5
982 };
983 };
985
986//
987// Identify data without the Reserved4.
988//
990#define IDENTIFY_DATA2 IDENTIFY_DATA
991#define PIDENTIFY_DATA2 PIDENTIFY_DATA
992
993/*typedef struct _IDENTIFY_DATA2 {
994 UCHAR AtapiCmdSize:2; // 00 00
995 UCHAR :3;
996 UCHAR DrqType:2; // 00 00
997 UCHAR Removable:1;
998
999 UCHAR DeviceType:5;
1000 UCHAR :1;
1001 UCHAR CmdProtocol:2; // 00 00
1002// USHORT GeneralConfiguration; // 00
1003
1004 USHORT NumberOfCylinders; // 02
1005 USHORT Reserved1; // 04
1006 USHORT NumberOfHeads; // 06
1007 USHORT UnformattedBytesPerTrack; // 08
1008 USHORT UnformattedBytesPerSector; // 0A
1009 USHORT SectorsPerTrack; // 0C
1010 USHORT VendorUnique1[3]; // 0E
1011 UCHAR SerialNumber[20]; // 14
1012 USHORT BufferType; // 28
1013 USHORT BufferSectorSize; // 2A
1014 USHORT NumberOfEccBytes; // 2C
1015 USHORT FirmwareRevision[4]; // 2E
1016 USHORT ModelNumber[20]; // 36
1017 UCHAR MaximumBlockTransfer; // 5E
1018 UCHAR VendorUnique2; // 5F
1019 USHORT DoubleWordIo; // 60
1020 USHORT Capabilities; // 62
1021 USHORT Reserved2; // 64
1022 UCHAR VendorUnique3; // 66
1023 UCHAR PioCycleTimingMode; // 67
1024 UCHAR VendorUnique4; // 68
1025 UCHAR DmaCycleTimingMode; // 69
1026 USHORT TranslationFieldsValid:1; // 6A
1027 USHORT Reserved3:15;
1028 USHORT NumberOfCurrentCylinders; // 6C
1029 USHORT NumberOfCurrentHeads; // 6E
1030 USHORT CurrentSectorsPerTrack; // 70
1031 ULONG CurrentSectorCapacity; // 72
1032} IDENTIFY_DATA2, *PIDENTIFY_DATA2;*/
1034#define IDENTIFY_DATA_SIZE sizeof(IDENTIFY_DATA)
1035
1036
1037// IDENTIFY DMA timing cycle modes.
1038#define IDENTIFY_DMA_CYCLES_MODE_0 0x00
1039#define IDENTIFY_DMA_CYCLES_MODE_1 0x01
1040#define IDENTIFY_DMA_CYCLES_MODE_2 0x02
1041
1042// for IDE_COMMAND_DATA_SET_MGMT
1043typedef struct _TRIM_DATA {
1047
1048/*
1049#define PCI_DEV_HW_SPEC(idhi, idlo) \
1050 { #idlo, 4, #idhi, 4}
1051
1052typedef struct _BROKEN_CONTROLLER_INFORMATION {
1053 PCHAR VendorId;
1054 ULONG VendorIdLength;
1055 PCHAR DeviceId;
1056 ULONG DeviceIdLength;
1057}BROKEN_CONTROLLER_INFORMATION, *PBROKEN_CONTROLLER_INFORMATION;
1058
1059BROKEN_CONTROLLER_INFORMATION const BrokenAdapters[] = {
1060 // CMD 640 ATA controller !WARNING! buggy chip data loss possible
1061 PCI_DEV_HW_SPEC( 0640, 1095 ), //{ "1095", 4, "0640", 4},
1062 // ??
1063 PCI_DEV_HW_SPEC( 0601, 1039 ), //{ "1039", 4, "0601", 4}
1064 // RZ 100? ATA controller !WARNING! buggy chip data loss possible
1065 PCI_DEV_HW_SPEC( 1000, 1042 ),
1066 PCI_DEV_HW_SPEC( 1001, 1042 )
1067};
1068
1069#define BROKEN_ADAPTERS (sizeof(BrokenAdapters) / sizeof(BROKEN_CONTROLLER_INFORMATION))
1070
1071typedef struct _NATIVE_MODE_CONTROLLER_INFORMATION {
1072 PCHAR VendorId;
1073 ULONG VendorIdLength;
1074 PCHAR DeviceId;
1075 ULONG DeviceIdLength;
1076}NATIVE_MODE_CONTROLLER_INFORMATION, *PNATIVE_MODE_CONTROLLER_INFORMATION;
1077
1078NATIVE_MODE_CONTROLLER_INFORMATION const NativeModeAdapters[] = {
1079 PCI_DEV_HW_SPEC( 0105, 10ad ) //{ "10ad", 4, "0105", 4}
1080};
1081
1082#define NUM_NATIVE_MODE_ADAPTERS (sizeof(NativeModeAdapters) / sizeof(NATIVE_MODE_CONTROLLER_INFORMATION))
1083*/
1084//
1085// Beautification macros
1086//
1087
1088#ifndef USER_MODE
1090#define GetStatus(chan, Status) \
1091 Status = AtapiReadPort1(chan, IDX_IO2_AltStatus);
1093#define GetBaseStatus(chan, pStatus) \
1094 pStatus = AtapiReadPort1(chan, IDX_IO1_i_Status);
1096#define WriteCommand(chan, _Command) \
1097 AtapiWritePort1(chan, IDX_IO1_o_Command, _Command);
1098
1099/*
1100#define SelectDrive(chan, unit) { \
1101 if(chan && chan->lun[unit] && chan->lun[unit]->DeviceFlags & DFLAGS_ATAPI_CHANGER) KdPrint3((" Select %d\n", unit)); \
1102 AtapiWritePort1(chan, IDX_IO1_o_DriveSelect, (unit) ? IDE_DRIVE_SELECT_2 : IDE_DRIVE_SELECT_1); \
1103}
1104*/
1106#define ReadBuffer(chan, Buffer, Count, timing) \
1107 AtapiReadBuffer2(chan, IDX_IO1_i_Data, \
1108 Buffer, \
1109 Count, \
1110 timing);
1112#define WriteBuffer(chan, Buffer, Count, timing) \
1113 AtapiWriteBuffer2(chan, IDX_IO1_o_Data, \
1114 Buffer, \
1115 Count, \
1116 timing);
1118#define ReadBuffer2(chan, Buffer, Count, timing) \
1119 AtapiReadBuffer4(chan, IDX_IO1_i_Data, \
1120 Buffer, \
1121 Count, \
1122 timing);
1124#define WriteBuffer2(chan, Buffer, Count, timing) \
1125 AtapiWriteBuffer4(chan, IDX_IO1_o_Data, \
1126 Buffer, \
1127 Count, \
1128 timing);
1129
1130UCHAR
1133 IN struct _HW_CHANNEL* chan,
1135 );
1136
1137UCHAR
1140 IN struct _HW_CHANNEL* chan/*,
1141 PIDE_REGISTERS_2 BaseIoAddress*/
1142 );
1143
1144UCHAR
1147 IN struct _HW_CHANNEL* chan/*,
1148 PIDE_REGISTERS_2 BaseIoAddress*/
1149 );
1150
1151UCHAR
1154 IN struct _HW_CHANNEL* chan/*,
1155 PIDE_REGISTERS_1 BaseIoAddress*/
1156 );
1157
1158UCHAR
1161 IN struct _HW_CHANNEL* chan/*,
1162 PIDE_REGISTERS_1 BaseIoAddress*/
1163 );
1164
1165UCHAR
1168 IN struct _HW_CHANNEL* chan/*,
1169 PIDE_REGISTERS_2 BaseIoAddress*/
1170 );
1171
1172UCHAR
1175 IN struct _HW_CHANNEL* chan/*,
1176 PIDE_REGISTERS_2 BaseIoAddress*/
1177 );
1178
1179VOID
1182 IN struct _HW_CHANNEL* chan,/*
1183 PIDE_REGISTERS_1 BaseIoAddress*/
1185 );
1186
1187VOID
1190 IN struct _HW_CHANNEL* chan,
1191 IN BOOLEAN DisableInterrupts,
1192 IN ULONG Delay
1193 );
1194
1195
1196#endif //USER_MODE
1198#define IS_RDP(OperationCode)\
1199 ((OperationCode == SCSIOP_ERASE)||\
1200 (OperationCode == SCSIOP_LOAD_UNLOAD)||\
1201 (OperationCode == SCSIOP_LOCATE)||\
1202 (OperationCode == SCSIOP_REWIND) ||\
1203 (OperationCode == SCSIOP_SPACE)||\
1204 (OperationCode == SCSIOP_SEEK)||\
1205/* (OperationCode == SCSIOP_FORMAT_UNIT)||\
1206 (OperationCode == SCSIOP_BLANK)||*/ \
1207 (OperationCode == SCSIOP_WRITE_FILEMARKS))
1208
1209#ifndef USER_MODE
1210
1212NTAPI
1214 IN PVOID HwDeviceExtension,
1216 );
1217
1219NTAPI
1221 IN PVOID HwDeviceExtension,
1223 );
1224
1225VOID
1226NTAPI
1228 IN PVOID HwDeviceExtension,
1231 );
1232
1233ULONG
1234NTAPI
1236 IN PVOID HwDeviceExtension,
1238 IN ULONG CmdAction
1239 );
1240
1241ULONG
1242NTAPI
1244 IN PVOID HwDeviceExtension,
1246 IN ULONG CmdAction
1248
1249#define AtapiCopyMemory RtlCopyMemory
1250
1252NTAPI
1254 ULONG Value,
1255 PCHAR *Buffer
1257
1258#define AtapiStringCmp(s1, s2, n) _strnicmp(s1, s2, n)
1259
1260BOOLEAN
1261NTAPI
1263 IN PVOID HwDeviceExtension
1264 );
1265
1266BOOLEAN
1267NTAPI
1269 IN PVOID HwDeviceExtension,
1270 IN UCHAR c
1271 );
1272
1273UCHAR
1274NTAPI
1276 IN PVOID HwDeviceExtension,
1277 IN UCHAR c
1280#define INTERRUPT_REASON_IGNORE 0
1281#define INTERRUPT_REASON_OUR 1
1282#define INTERRUPT_REASON_UNEXPECTED 2
1283
1284BOOLEAN
1285NTAPI
1287 IN PVOID HwDeviceExtension
1288 );
1289
1290ULONG
1291NTAPI
1293 IN PVOID HwDeviceExtension,
1295 );
1296
1297VOID
1298NTAPI
1300 BOOLEAN EnableMSN,
1301 IN PVOID HwDeviceExtension,
1302 IN ULONG lChannel,
1304 );
1305
1306ULONG
1307NTAPI
1309 IN PVOID HwDeviceExtension,
1312 IN PCHAR ArgumentString,
1314 OUT PBOOLEAN Again
1315 );
1316
1317ULONG
1318NTAPI
1320 IN PVOID HwDeviceExtension,
1323 IN PCHAR ArgumentString,
1325 OUT PBOOLEAN Again
1326 );
1327
1328ULONG
1329NTAPI
1331 IN PCCH String,
1332 IN PCCH KeyWord
1333 );
1334
1335BOOLEAN
1336NTAPI
1338 IN PVOID HwDeviceExtension,
1340 IN ULONG Channel,
1342 IN BOOLEAN NoSetup
1343 );
1344
1345BOOLEAN
1346NTAPI
1348 IN PVOID HwDeviceExtension,
1350 IN ULONG Channel
1351 );
1352
1353ULONG
1354NTAPI
1356 IN PVOID HwDeviceExtension,
1357 IN ULONG Channel,
1358 IN ULONG deviceNumber,
1361
1362#define UNIATA_FIND_DEV_UNHIDE 0x01
1363
1364BOOLEAN
1365NTAPI
1367 IN PVOID HwDeviceExtension,
1368 IN ULONG Flags,
1369 IN ULONG Channel
1370 );
1371
1372#endif //USER_MODE
1373
1374#ifdef __cplusplus
1375};
1376#endif //__cplusplus
1377
1378#ifndef USER_MODE
1379
1380BOOLEAN
1381NTAPI
1383 IN PVOID HwDeviceExtension,
1385 );
1386
1387BOOLEAN
1388NTAPI
1390 IN PVOID HwDeviceExtension,
1392 );
1393
1394BOOLEAN
1395NTAPI
1397 IN PVOID HwDeviceExtension,
1400 );
1401
1402extern UCHAR
1403NTAPI
1405// IN PVOID HwDeviceExtension,
1406 IN struct _HW_DEVICE_EXTENSION* deviceExtension,
1408 IN ULONG Channel,
1411 IN USHORT count,
1413 IN ULONG flags
1414 );
1415
1416extern UCHAR
1417NTAPI
1419// IN PVOID HwDeviceExtension,
1420 IN struct _HW_DEVICE_EXTENSION* deviceExtension,
1422 IN ULONG Channel,
1425 IN UCHAR head,
1426 IN UCHAR sector,
1427 IN UCHAR count,
1429 IN ULONG flags
1430 );
1431
1432extern LONG
1433NTAPI
1435
1436extern LONG
1437NTAPI
1439
1440extern LONG
1441NTAPI
1443
1444extern VOID
1445NTAPI
1447 IN PKDPC Dpc,
1451 );
1452
1453//#define AtaCommand(de, devn, chan, cmd, cyl, hd, sec, cnt, feat, flg)
1454
1455extern LONG
1456NTAPI
1457AtaPio2Mode(LONG pio);
1458
1459extern LONG
1460NTAPI
1462
1463extern VOID
1464NTAPI
1466 IN PVOID HwDeviceExtension,
1467 IN ULONG c
1468 );
1469
1470extern VOID
1471NTAPI
1473 IN PVOID HwDeviceExtension,
1474 IN ULONG c
1475 );
1476
1477extern VOID
1479 IN struct _HW_CHANNEL* chan,
1480 IN BOOLEAN Expecting
1483#define CHAN_NOT_SPECIFIED (0xffffffffL)
1484#define CHAN_NOT_SPECIFIED_CHECK_CABLE (0xfffffffeL)
1485#define DEVNUM_NOT_SPECIFIED (0xffffffffL)
1486#define IOMODE_NOT_SPECIFIED (0xffffffffL)
1487
1488extern ULONG
1489NTAPI
1491 IN PVOID HwDeviceExtension,
1492 IN ULONG chan,
1493 IN ULONG dev,
1494 IN PCWSTR Name,
1495 IN ULONG Default
1496 );
1497
1498extern ULONG
1499NTAPI
1501 IN PVOID HwDeviceExtension,
1502 IN PCWSTR PathSuffix,
1503 IN PCWSTR Name,
1504 IN ULONG Default
1505 );
1506
1507extern ULONG g_LogToDisplay;
1508
1509extern "C"
1510VOID
1511_cdecl
1513 PCCH DebugMessage,
1514 ...
1515 );
1516
1518NTAPI
1520 IN struct _HW_DEVICE_EXTENSION* deviceExtension,
1521 IN struct _IDE_BUSMASTER_REGISTERS* BaseIoAddressBM_0,
1522 IN BOOLEAN MemIo
1523 );
1524
1526NTAPI
1528 IN struct _HW_CHANNEL* chan,
1529 IN PIDE_REGISTERS_1 BaseIoAddress1,
1530 IN PIDE_REGISTERS_2 BaseIoAddress2
1531 );
1532
1534NTAPI
1536 IN struct _HW_CHANNEL* chan
1537 );
1539VOID
1541 IN struct _HW_CHANNEL* chan,
1542 IN ULONG idx,
1543 IN ULONG addr,
1544 IN BOOLEAN MemIo,
1545 IN BOOLEAN Proc
1546 );
1548VOID
1550 IN struct _IORES* IoRes,
1551 IN ULONG addr,
1552 IN BOOLEAN MemIo,
1553 IN BOOLEAN Proc
1554 );
1555
1556UCHAR
1559 IN struct _HW_DEVICE_EXTENSION* deviceExtension,
1561 );
1562
1564NTAPI
1566 IN struct _HW_CHANNEL* chan
1567 );
1568
1569ULONG
1570NTAPI
1573 IN PUCHAR Str,
1575 );
1576
1578NTAPI
1580 struct _HW_LU_EXTENSION* LunExt,
1582 );
1583
1584ULONG
1585NTAPI
1587 IN PVOID HwDeviceExtension,
1588 IN ULONG Channel,
1589 IN ULONG deviceNumber
1590 );
1591
1592#endif //USER_MODE
1594#define ATA_AT_HOME_HDD 0x01
1595#define ATA_AT_HOME_ATAPI 0x02
1596#define ATA_AT_HOME_XXX 0x04
1597#define ATA_AT_HOME_NOBODY 0x00
1599#define ATA_CMD_FLAG_LBAIOsupp 0x01
1600#define ATA_CMD_FLAG_48supp 0x02
1601#define ATA_CMD_FLAG_48 0x04
1602#define ATA_CMD_FLAG_DMA 0x08
1603#define ATA_CMD_FLAG_FUA 0x10
1604#define ATA_CMD_FLAG_In 0x40
1605#define ATA_CMD_FLAG_Out 0x80
1606
1607/*
1608 We need LBA48 when requested LBA or BlockCount are too large.
1609 But for LBA-based commands we have *special* limitation
1610*/
1611#define UniAta_need_lba48(command, lba, count, supp48) \
1612 ( ((AtaCommandFlags[command] & ATA_CMD_FLAG_LBAIOsupp) && (supp48) && (((lba+count) >= ATA_MAX_IOLBA28) || (count > 256)) ) || \
1613 (lba > ATA_MAX_LBA28) || (count > 255) )
1614
1615#ifndef USER_MODE
1616
1617#define UniAtaClearAtaReq(AtaReq) \
1618{ \
1619 RtlZeroMemory((PCHAR)(AtaReq), FIELD_OFFSET(ATA_REQ, ata)); \
1620}
1621
1622extern UCHAR const AtaCommands48[256];
1623extern UCHAR const AtaCommandFlags[256];
1625//#define ATAPI_DEVICE(de, ldev) (de->lun[ldev].DeviceFlags & DFLAGS_ATAPI_DEVICE)
1626#define ATAPI_DEVICE(chan, dev) ((chan->lun[dev]->DeviceFlags & DFLAGS_ATAPI_DEVICE) ? TRUE : FALSE)
1627
1628#ifdef _DEBUG
1629#define PrintNtConsole _PrintNtConsole
1630#else //_DEBUG
1631#define PrintNtConsole(x) {;}
1632#endif //_DEBUG
1633
1634#endif //USER_MODE
1635
1636__inline
1637BOOLEAN
1640 )
1641{
1642 return (ident->SataCapabilities && ident->SataCapabilities != 0xffff);
1643} // end ata_is_sata()
1645#define IDENT_MODE_MAX FALSE
1646#define IDENT_MODE_ACTIVE TRUE
1647
1648__inline
1649LONG
1653 )
1654{
1655 USHORT mode;
1656 if(ata_is_sata(ident)) {
1657 if(ident->SataCapabilities & ATA_SATA_GEN3) {
1658 return ATA_SA600;
1659 } else
1660 if(ident->SataCapabilities & ATA_SATA_GEN2) {
1661 return ATA_SA300;
1662 } else
1663 if(ident->SataCapabilities & ATA_SATA_GEN1) {
1664 return ATA_SA150;
1665 }
1666 return ATA_SA150;
1667 }
1668
1669 if (ident->UdmaModesValid) {
1670 mode = Active ? ident->UltraDMAActive : ident->UltraDMASupport;
1671 if (mode & 0x40)
1672 return ATA_UDMA0+6;
1673 if (mode & 0x20)
1674 return ATA_UDMA0+5;
1675 if (mode & 0x10)
1676 return ATA_UDMA0+4;
1677 if (mode & 0x08)
1678 return ATA_UDMA0+3;
1679 if (mode & 0x04)
1680 return ATA_UDMA0+2;
1681 if (mode & 0x02)
1682 return ATA_UDMA0+1;
1683 if (mode & 0x01)
1684 return ATA_UDMA0+0;
1685 }
1686
1687 mode = Active ? ident->MultiWordDMAActive : ident->MultiWordDMASupport;
1688 if (ident->MultiWordDMAActive & 0x04)
1689 return ATA_WDMA0+2;
1690 if (ident->MultiWordDMAActive & 0x02)
1691 return ATA_WDMA0+1;
1692 if (ident->MultiWordDMAActive & 0x01)
1693 return ATA_WDMA0+0;
1694
1695 mode = Active ? ident->SingleWordDMAActive : ident->SingleWordDMASupport;
1696 if (ident->SingleWordDMAActive & 0x04)
1697 return ATA_SDMA0+2;
1698 if (ident->SingleWordDMAActive & 0x02)
1699 return ATA_SDMA0+1;
1700 if (ident->SingleWordDMAActive & 0x01)
1701 return ATA_SDMA0+0;
1702
1703 if (ident->PioTimingsValid) {
1704 mode = ident->AdvancedPIOModes;
1706 return ATA_PIO0+5;
1708 return ATA_PIO0+4;
1710 return ATA_PIO0+3;
1711 }
1712 mode = ident->PioCycleTimingMode;
1713 if (ident->PioCycleTimingMode == 2)
1714 return ATA_PIO0+2;
1715 if (ident->PioCycleTimingMode == 1)
1716 return ATA_PIO0+1;
1717 if (ident->PioCycleTimingMode == 0)
1718 return ATA_PIO0+0;
1719
1720 return ATA_PIO;
1721} // end ata_cur_mode_from_ident()
1722
1723#pragma pack(pop)
1724
1725#endif // __GLOBAL_H__
unsigned char BOOLEAN
#define __cdecl
Definition: accygwin.h:79
struct outqueuenode * head
Definition: adnsresfilter.c:66
struct _IDENTIFY_DATA * PIDENTIFY_DATA
struct _MODE_SENSE_10 MODE_SENSE_10
struct _IDENTIFY_DATA IDENTIFY_DATA
struct _IDE_REGISTERS_2 IDE_REGISTERS_2
#define WaitForDrq(BaseIoAddress, Status)
Definition: atapi.h:387
struct _ATAPI_REGISTERS_1 ATAPI_REGISTERS_1
struct _IDE_REGISTERS_2 * PIDE_REGISTERS_2
#define WaitShortForDrq(BaseIoAddress, Status)
Definition: atapi.h:403
#define WaitOnBaseBusy(BaseIoAddress, Status)
Definition: atapi.h:373
struct _IDE_REGISTERS_1 IDE_REGISTERS_1
struct _MODE_SELECT_10 MODE_SELECT_10
struct _MODE_PARAMETER_HEADER_10 MODE_PARAMETER_HEADER_10
struct _MODE_PARAMETER_HEADER_10 * PMODE_PARAMETER_HEADER_10
#define WaitOnBusy(BaseIoAddress, Status)
Definition: atapi.h:359
struct _IDE_REGISTERS_1 * PIDE_REGISTERS_1
struct _MODE_SENSE_10 * PMODE_SENSE_10
struct _ATAPI_REGISTERS_1 * PATAPI_REGISTERS_1
#define AtapiSoftReset(BaseIoAddress, DeviceNumber)
Definition: atapi.h:418
struct _MODE_SELECT_10 * PMODE_SELECT_10
VOID __cdecl ScsiDebugPrint(IN ULONG DebugPrintLevel, IN PCCHAR DebugMessage, IN ...)
Definition: scsiport.c:471
_In_ PSCSI_REQUEST_BLOCK Srb
Definition: cdrom.h:989
Definition: bufpool.h:45
_In_ ULONG _In_ BOOLEAN _In_ ULONG _In_ UCHAR PathId
Definition: classpnp.h:1313
_In_ ULONG _In_ BOOLEAN _In_ ULONG _In_ UCHAR _In_ UCHAR TargetId
Definition: classpnp.h:1314
_In_ PCHAR _In_ ULONG DeviceNumber
Definition: classpnp.h:1230
GLUquadricObj * cylinder
Definition: cylfrac.c:44
unsigned int idx
Definition: utils.c:41
MMRESULT FindDevices()
Definition: utils.c:159
VOID ResetBus(IN PDEVICE_OBJECT Fdo)
Definition: disk.c:2705
#define DDKFASTAPI
Definition: config.h:144
IN PFCB IN PCCB IN TYPE_OF_OPEN IN BOOLEAN IN BOOLEAN TopLevel
Definition: fatprocs.h:2417
Status
Definition: gdiplustypes.h:25
GLuint GLuint GLsizei count
Definition: gl.h:1545
const GLubyte * c
Definition: glext.h:8905
GLenum mode
Definition: glext.h:6217
GLbitfield flags
Definition: glext.h:7161
GLenum const GLvoid * addr
Definition: glext.h:9621
uint32_t sector
Definition: isohybrid.c:61
INTERNETFEATURELIST feature
Definition: misc.c:1719
CONST CHAR * PCCH
Definition: ntbasedef.h:392
_In_ ULONG _In_ ULONG _In_ ULONG Length
Definition: ntddpcm.h:102
long LONG
Definition: pedump.c:60
unsigned short USHORT
Definition: pedump.c:61
#define SCSIPORT_API
Definition: scsi_port.h:177
Definition: shell.h:41
struct _ATAPI_REGISTERS_1::_o o
struct _ATAPI_REGISTERS_1::_i i
USHORT PLSS_Size
Definition: atapi.h:861
USHORT NumberOfCurrentCylinders
Definition: hwide.h:208
USHORT BufferType
Definition: hwide.h:184
USHORT CFastSupport
Definition: atapi.h:746
USHORT Reserver_83_7
Definition: hwide.h:260
USHORT NVCache_PM_Enabled
Definition: atapi.h:928
UCHAR DeviceType
Definition: hwide.h:173
USHORT QueueLength
Definition: hwide.h:228
USHORT SoftReset
Definition: hwide.h:197
USHORT MasterPasswdCap
Definition: atapi.h:892
USHORT DeviceNominalFormFactor
Definition: atapi.h:900
USHORT Logging
Definition: hwide.h:274
USHORT StreamingTransferTimePIO
Definition: atapi.h:856
USHORT Support
Definition: atapi.h:885
USHORT Reserved69_7_IEEE1667
Definition: atapi.h:738
USHORT WriteBuffer
Definition: hwide.h:249
USHORT UltraDMASupport
Definition: atapi.h:830
USHORT Reserved_6_15
Definition: atapi.h:916
USHORT VendorAcoustic
Definition: atapi.h:847
USHORT PLSS_LargeP
Definition: atapi.h:864
USHORT Reset
Definition: hwide.h:246
USHORT SCT_Supported
Definition: atapi.h:910
USHORT Reserved4
Definition: hwide.h:219
USHORT MaxLBARangeDescBlockCount
Definition: atapi.h:857
USHORT Reserved62_0
Definition: hwide.h:192
USHORT UnformattedBytesPerSector
Definition: hwide.h:180
USHORT v10a
Definition: atapi.h:957
USHORT SmartErrorLog
Definition: hwide.h:269
USHORT SingleWordDMASupport
Definition: hwide.h:214
USHORT HwResSlave
Definition: atapi.h:840
USHORT NumberOfCurrentHeads
Definition: hwide.h:209
USHORT MediaSerial[30]
Definition: atapi.h:906
USHORT Reserved_CE_ATA[2]
Definition: atapi.h:919
USHORT SCT_ErrorRecovery
Definition: atapi.h:913
ULONG UserAddressableSectors
Definition: hwide.h:213
USHORT Reserved209_14_One
Definition: atapi.h:921
USHORT II_Ext
Definition: atapi.h:958
USHORT HwResCableId
Definition: atapi.h:841
USHORT Integrity
Definition: atapi.h:976
USHORT ReadBuffer
Definition: hwide.h:250
struct _IDENTIFY_DATA::@1066::@1078 SecurityStatusOpt
USHORT ExtendedZero
Definition: hwide.h:277
USHORT SataSupport
Definition: hwide.h:232
USHORT CurrentAcoustic
Definition: atapi.h:846
USHORT Reserved112[5]
Definition: atapi.h:870
USHORT MaxPwdDMA
Definition: atapi.h:740
USHORT PowerMngt
Definition: hwide.h:240
USHORT ServiceDRQ
Definition: hwide.h:245
USHORT DMASupport
Definition: atapi.h:714
USHORT SupportQTag
Definition: hwide.h:199
USHORT NVCache_Size_LogicalBlocks[2]
Definition: atapi.h:935
USHORT EnhancedEraseTime
Definition: atapi.h:834
USHORT NominalMediaRotationRate
Definition: atapi.h:936
USHORT Reserver_84_6
Definition: hwide.h:275
USHORT ATA8_APT
Definition: atapi.h:951
USHORT SupportIordy
Definition: hwide.h:196
USHORT MultiWordDMASupport
Definition: hwide.h:216
USHORT SataEnable
Definition: hwide.h:233
USHORT HwResValid
Definition: atapi.h:842
USHORT DeviceCapability0
Definition: atapi.h:677
USHORT NVCache_DeviceSpinUpTime
Definition: atapi.h:938
USHORT NumberOfHeads
Definition: hwide.h:178
struct _IDENTIFY_DATA::@1070::@1083 PATA
USHORT StreamMinReqSize
Definition: atapi.h:849
USHORT SCT_Feature
Definition: atapi.h:914
UCHAR PioCycleTimingMode
Definition: hwide.h:203
USHORT Reserved_82_15
Definition: hwide.h:252
USHORT SupportOne
Definition: hwide.h:267
USHORT Reserved126
Definition: atapi.h:879
USHORT Reserved73_74[2]
Definition: hwide.h:227
USHORT DMADirRequired
Definition: atapi.h:716
USHORT PLSS_Signature
Definition: atapi.h:865
USHORT SerialNumber[10]
Definition: hwide.h:183
USHORT CurrentMultiSector
Definition: atapi.h:696
USHORT UdmaModesValid
Definition: atapi.h:688
USHORT NVCache_Reserved_5_7
Definition: atapi.h:931
USHORT NumberOfCylinders
Definition: hwide.h:176
USHORT Flags
Definition: atapi.h:964
USHORT StreamAccessLatency
Definition: atapi.h:851
USHORT BufferSectorSize
Definition: hwide.h:185
USHORT AtapiByteCount0
Definition: atapi.h:878
USHORT SCT
Definition: atapi.h:908
ULONGLONG UserAddressableSectors48
Definition: hwide.h:280
USHORT Notify
Definition: hwide.h:257
USHORT MinorRevision
Definition: hwide.h:235
USHORT Reserved174[2]
Definition: atapi.h:905
USHORT AutoAcoustic
Definition: hwide.h:262
USHORT Reserved224[10]
Definition: atapi.h:968
USHORT FlushCache48
Definition: hwide.h:266
USHORT Reserved3
Definition: hwide.h:207
USHORT EnhancedEraseSupport
Definition: atapi.h:890
USHORT BlockEraseExtSupported
Definition: atapi.h:702
ULONG LargeSectorSize
Definition: atapi.h:872
USHORT CurentAPMLevel
Definition: atapi.h:835
USHORT OverwriteExtSupported
Definition: atapi.h:701
USHORT Reserved_82_11
Definition: hwide.h:248
USHORT EraseTime
Definition: atapi.h:833
USHORT v26
Definition: atapi.h:960
USHORT SmartSelfTest
Definition: hwide.h:270
USHORT Spinup
Definition: hwide.h:259
USHORT InterSeekDelay
Definition: atapi.h:868
USHORT PioTimingsValid
Definition: atapi.h:687
USHORT MaxBlocks_MicrocodeDownload_Mode3
Definition: atapi.h:971
USHORT SCT_DataTables
Definition: atapi.h:915
USHORT CurrentSectorsPerTrack
Definition: hwide.h:210
UCHAR VendorUnique2
Definition: hwide.h:190
USHORT TransportMinor
Definition: atapi.h:966
USHORT DoubleWordIo
Definition: hwide.h:191
USHORT Packet
Definition: hwide.h:241
USHORT SecurityStatus
Definition: atapi.h:883
USHORT MasterPasswdRevision
Definition: atapi.h:837
USHORT PhysLogSectorSize
Definition: atapi.h:859
USHORT MinBlocks_MicrocodeDownload_Mode3
Definition: atapi.h:970
struct _IDENTIFY_DATA::@183 FeaturesEnabled
USHORT PLSS_Reserved
Definition: atapi.h:862
USHORT SataCapabilities
Definition: hwide.h:230
USHORT Reserved161[7]
Definition: atapi.h:899
USHORT MajorRevision
Definition: hwide.h:234
USHORT DeviceCapability1
Definition: atapi.h:676
USHORT NumberOfEccBytes
Definition: hwide.h:186
USHORT PLSS_LargeL
Definition: atapi.h:863
USHORT WriteCache
Definition: hwide.h:242
USHORT Reserved50_1
Definition: atapi.h:675
USHORT WriteReadVerify_Reserved220_8_15
Definition: atapi.h:942
USHORT TranslationFieldsValid
Definition: hwide.h:206
USHORT Reserved169_1_15
Definition: atapi.h:903
struct _IDENTIFY_DATA::@183 FeaturesSupport
USHORT HwResMaster
Definition: atapi.h:839
USHORT StandbyOverlap
Definition: hwide.h:198
USHORT ReleaseTimeServiceCommand
Definition: hwide.h:226
USHORT MediaCardPass
Definition: hwide.h:272
USHORT UDMASupport
Definition: atapi.h:712
ULONG StreamGranularity
Definition: atapi.h:852
USHORT Smart
Definition: hwide.h:237
USHORT Reserved121[4]
Definition: atapi.h:877
USHORT AdditionalProdNum[4]
Definition: atapi.h:904
USHORT Protected
Definition: hwide.h:247
USHORT UnformattedBytesPerTrack
Definition: hwide.h:179
USHORT Reserved
Definition: atapi.h:875
USHORT FlushCache
Definition: hwide.h:265
USHORT WorldWideName[4]
Definition: atapi.h:869
USHORT Address48
Definition: hwide.h:263
USHORT UltraDMAActive
Definition: atapi.h:831
USHORT Reserved218
Definition: atapi.h:937
USHORT Reserved7_8
Definition: atapi.h:891
UCHAR CmdProtocol
Definition: hwide.h:175
USHORT WriteBufferDMA
Definition: atapi.h:741
UCHAR AtapiCmdSize
Definition: hwide.h:169
USHORT StreamTransferTime
Definition: atapi.h:850
USHORT NVCache_Version
Definition: atapi.h:933
USHORT Reserved59_9_11
Definition: atapi.h:698
USHORT SupportDma
Definition: hwide.h:193
UCHAR DmaCycleTimingMode
Definition: hwide.h:205
struct _IDENTIFY_DATA::@1065 CommandFeatureSetSupport
USHORT SingleWordDMAActive
Definition: hwide.h:215
USHORT Reserved236[19]
Definition: atapi.h:973
USHORT Queued
Definition: hwide.h:254
USHORT Reserved70
Definition: atapi.h:748
USHORT Reserved209_15_Zero
Definition: atapi.h:922
USHORT AdvancedPIOModes
Definition: hwide.h:218
UCHAR DrqType
Definition: hwide.h:171
USHORT ConfigOverlay
Definition: hwide.h:264
USHORT CryptoScrambleExtSupported
Definition: atapi.h:700
USHORT Checksum
Definition: atapi.h:980
struct _IDENTIFY_DATA::@1060::@1075 AtapiDMA
USHORT Locked
Definition: atapi.h:887
USHORT VersionFlags
Definition: atapi.h:947
USHORT WriteReadVerify_CurrentMode
Definition: atapi.h:941
USHORT Reserved221
Definition: atapi.h:944
USHORT ReleaseDRQ
Definition: hwide.h:244
USHORT Reserved69_0_4
Definition: atapi.h:735
USHORT SCT_WriteSame
Definition: atapi.h:912
USHORT v30
Definition: atapi.h:961
USHORT Reserved75_6
Definition: hwide.h:229
USHORT ExtendedOne
Definition: hwide.h:276
USHORT ChecksumValid
Definition: atapi.h:979
USHORT FirmwareRevision[4]
Definition: hwide.h:187
USHORT NVCache_PM_Supported
Definition: atapi.h:927
USHORT ReadBufferDMA
Definition: atapi.h:742
USHORT LookAhead
Definition: hwide.h:243
USHORT ReadZeroAfterTrim
Definition: atapi.h:736
USHORT Enabled
Definition: atapi.h:886
USHORT NVCache_Enabled
Definition: atapi.h:930
USHORT NVCache_PM_Version
Definition: atapi.h:932
USHORT Reserved129[31]
Definition: atapi.h:897
USHORT Streaming
Definition: hwide.h:273
USHORT SectorsPerTrack
Definition: hwide.h:181
UCHAR MaximumBlockTransfer
Definition: atapi.h:207
USHORT WriteReadVerify_CountMode3[2]
Definition: atapi.h:925
USHORT Security
Definition: hwide.h:238
USHORT SanitizeSupported
Definition: atapi.h:699
USHORT RemovableStatus
Definition: atapi.h:881
USHORT VendorUnique1[3]
Definition: hwide.h:182
USHORT MultiWordDMAActive
Definition: hwide.h:217
union _IDENTIFY_DATA::@1070 TransportMajor
USHORT Reserved77
Definition: hwide.h:231
USHORT WriteReadVerify_CountMode2[2]
Definition: atapi.h:924
USHORT Lba28Support
Definition: atapi.h:737
struct _IDENTIFY_DATA::@1070::@1084 SATA
USHORT MaxSecurity
Definition: hwide.h:261
UCHAR Vendor51
Definition: atapi.h:680
USHORT CFA
Definition: hwide.h:255
USHORT v25
Definition: atapi.h:959
USHORT CountExpired
Definition: atapi.h:889
USHORT TransportType
Definition: atapi.h:948
USHORT Reserved168_4_15
Definition: atapi.h:901
USHORT SupportLba
Definition: hwide.h:194
USHORT SupportZero
Definition: hwide.h:268
UCHAR Vendor52
Definition: atapi.h:683
USHORT Reserved9_15
Definition: atapi.h:893
USHORT DeterministicReadAfterTrim
Definition: atapi.h:745
USHORT CfAdvPowerMode
Definition: atapi.h:898
USHORT ATA_ATAPI7
Definition: atapi.h:952
USHORT DevConfigDMA
Definition: atapi.h:743
USHORT RecommendedMWXferCycleTime
Definition: hwide.h:221
USHORT MediaSerialNo
Definition: hwide.h:271
struct _IDENTIFY_DATA::@1065 CommandFeatureSetEnabled
USHORT MinimumPIOCycleTimeIORDY
Definition: hwide.h:223
USHORT LogicalSectorOffset
Definition: atapi.h:920
USHORT DisableIordy
Definition: hwide.h:195
USHORT Standby
Definition: hwide.h:258
USHORT DeviceStandbyMin
Definition: atapi.h:674
USHORT CurrentMultiSectorValid
Definition: atapi.h:697
USHORT DataSetManagementSupported
Definition: atapi.h:902
USHORT Microcode
Definition: hwide.h:253
USHORT ModelNumber[20]
Definition: hwide.h:188
USHORT NVCache_Reserved_2_3
Definition: atapi.h:929
USHORT APM
Definition: hwide.h:256
USHORT Nop
Definition: hwide.h:251
USHORT LongSectorErrorReporting
Definition: atapi.h:744
USHORT NVCache_Reserved219_8_15
Definition: atapi.h:939
USHORT Reserved1
Definition: hwide.h:177
USHORT MinimumMWXferCycleTime
Definition: hwide.h:220
USHORT ReleaseTimeOverlapped
Definition: hwide.h:225
USHORT MicrocodeDownloadDMA
Definition: atapi.h:739
UCHAR Removable
Definition: hwide.h:172
ULONG CurrentSectorCapacity
Definition: hwide.h:211
USHORT Frozen
Definition: atapi.h:888
USHORT ATA8_AST
Definition: atapi.h:956
USHORT Reseved62_11_14
Definition: atapi.h:715
USHORT MinimumPIOCycleTime
Definition: hwide.h:222
USHORT SupportIDma
Definition: hwide.h:200
UCHAR CylinderHigh
Definition: atapi.h:184
UCHAR CylinderHigh
Definition: atapi.h:173
struct _IDE_REGISTERS_1::_i i
struct _IDE_REGISTERS_1::_o o
UCHAR Control
Definition: atapi.h:219
UCHAR AltStatus
Definition: atapi.h:218
Definition: ketypes.h:699
UCHAR Reserved4[3]
Definition: atapi.h:88
UCHAR Reserved3[5]
Definition: atapi.h:85
UCHAR OperationCode
Definition: atapi.h:81
UCHAR Reserved2
Definition: atapi.h:84
UCHAR Reserved1
Definition: atapi.h:82
UCHAR ParameterListLengthLsb
Definition: atapi.h:87
UCHAR PFBit
Definition: atapi.h:83
UCHAR ParameterListLengthMsb
Definition: atapi.h:86
UCHAR Pc
Definition: atapi.h:73
UCHAR PageCode
Definition: atapi.h:72
UCHAR Reserved2[4]
Definition: atapi.h:74
UCHAR Reserved1
Definition: atapi.h:71
UCHAR Reserved3[3]
Definition: atapi.h:77
UCHAR OperationCode
Definition: atapi.h:70
UCHAR ParameterListLengthMsb
Definition: atapi.h:75
UCHAR ParameterListLengthLsb
Definition: atapi.h:76
ULONGLONG BlockCount
Definition: atapi.h:1044
ULONGLONG Lba
Definition: atapi.h:1043
const uint16_t * PCWSTR
Definition: typedefs.h:57
unsigned char * PBOOLEAN
Definition: typedefs.h:53
#define NTAPI
Definition: typedefs.h:36
#define IN
Definition: typedefs.h:39
uint16_t * PWCHAR
Definition: typedefs.h:56
unsigned char * PUCHAR
Definition: typedefs.h:53
uint32_t ULONG
Definition: typedefs.h:59
uint64_t ULONGLONG
Definition: typedefs.h:67
#define OUT
Definition: typedefs.h:40
char * PCHAR
Definition: typedefs.h:51
#define lba
LONG NTAPI AtaPio2Mode(LONG pio)
Definition: id_ata.cpp:1205
ULONG NTAPI AtapiRegCheckDevValue(IN PVOID HwDeviceExtension, IN ULONG chan, IN ULONG dev, IN PCWSTR Name, IN ULONG Default)
Definition: id_ata.cpp:11365
struct _TRIM_DATA * PTRIM_DATA
#define ATA_WDMA0
Definition: atapi.h:323
VOID NTAPI UniataDumpATARegs(IN struct _HW_CHANNEL *chan)
#define AdvancedPIOModes_3
Definition: atapi.h:726
VOID UniataInitIoRes(IN struct _HW_CHANNEL *chan, IN ULONG idx, IN ULONG addr, IN BOOLEAN MemIo, IN BOOLEAN Proc)
#define ATA_SATA_GEN3
Definition: atapi.h:759
ULONG NTAPI IdeBuildSenseBuffer(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb)
Definition: atapi.c:5737
BOOLEAN NTAPI AtapiStartIo__(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb, IN BOOLEAN TopLevel)
Definition: id_ata.cpp:9288
ULONG NTAPI AtapiSendCommand(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb, IN ULONG CmdAction)
Definition: id_ata.cpp:7377
#define ATA_SATA_GEN2
Definition: atapi.h:758
UCHAR NTAPI AtaCommand48(IN struct _HW_DEVICE_EXTENSION *deviceExtension, IN ULONG DeviceNumber, IN ULONG Channel, IN UCHAR command, IN ULONGLONG lba, IN USHORT count, IN USHORT feature, IN ULONG flags)
#define ATA_SA150
Definition: atapi.h:337
struct _TRIM_DATA TRIM_DATA
VOID NTAPI UniataInitMapBase(IN struct _HW_CHANNEL *chan, IN PIDE_REGISTERS_1 BaseIoAddress1, IN PIDE_REGISTERS_2 BaseIoAddress2)
UCHAR DDKFASTAPI UniataIsIdle(IN struct _HW_DEVICE_EXTENSION *deviceExtension, IN UCHAR Status)
Definition: id_ata.cpp:742
UCHAR DDKFASTAPI SelectDrive(IN struct _HW_CHANNEL *chan, IN ULONG DeviceNumber)
ULONG g_LogToDisplay
PSCSI_REQUEST_BLOCK NTAPI BuildRequestSenseSrb(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_ata.cpp:11251
ULONG NTAPI CheckDevice(IN PVOID HwDeviceExtension, IN ULONG Channel, IN ULONG deviceNumber, IN BOOLEAN ResetBus)
Definition: id_probe.cpp:2897
LONG NTAPI AtaWmode(PIDENTIFY_DATA2 ident)
Definition: id_ata.cpp:1241
BOOLEAN NTAPI AtapiInterrupt__(IN PVOID HwDeviceExtension, IN UCHAR c)
Definition: id_ata.cpp:4981
BOOLEAN NTAPI AtapiInterrupt(IN PVOID HwDeviceExtension)
Definition: atapi.c:3484
#define ATA_SA300
Definition: atapi.h:338
ULONG NTAPI EncodeVendorStr(OUT PWCHAR Buffer, IN PUCHAR Str, IN ULONG Length)
Definition: id_ata.cpp:11325
#define ATA_PIO
Definition: atapi.h:306
UCHAR const AtaCommands48[256]
Definition: atacmd_map.h:5
UCHAR NTAPI AtaCommand(IN struct _HW_DEVICE_EXTENSION *deviceExtension, IN ULONG DeviceNumber, IN ULONG Channel, IN UCHAR command, IN USHORT cylinder, IN UCHAR head, IN UCHAR sector, IN UCHAR count, IN UCHAR feature, IN ULONG flags)
UCHAR NTAPI AtapiCheckInterrupt__(IN PVOID HwDeviceExtension, IN UCHAR c)
Definition: id_ata.cpp:4512
VOID _cdecl _PrintNtConsole(PCCH DebugMessage,...)
Definition: id_ata.cpp:11689
ULONG NTAPI AtapiRegCheckParameterValue(IN PVOID HwDeviceExtension, IN PCWSTR PathSuffix, IN PCWSTR Name, IN ULONG Default)
Definition: id_ata.cpp:11509
BOOLEAN NTAPI IssueIdentify(IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG Channel, IN UCHAR Command, IN BOOLEAN NoSetup)
Definition: id_ata.cpp:1529
VOID NTAPI UniataInitMapBM(IN struct _HW_DEVICE_EXTENSION *deviceExtension, IN struct _IDE_BUSMASTER_REGISTERS *BaseIoAddressBM_0, IN BOOLEAN MemIo)
ULONGLONG NTAPI UniAtaCalculateLBARegsBack(struct _HW_LU_EXTENSION *LunExt, ULONGLONG lba)
BOOLEAN NTAPI AtapiResetController(IN PVOID HwDeviceExtension, IN ULONG PathId)
Definition: atapi.c:733
BOOLEAN NTAPI AtapiHwInitialize(IN PVOID HwDeviceExtension)
Definition: atapi.c:1282
BOOLEAN NTAPI SetDriveParameters(IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG Channel)
Definition: atapi.c:636
VOID UniataInitIoResEx(IN struct _IORES *IoRes, IN ULONG addr, IN BOOLEAN MemIo, IN BOOLEAN Proc)
BOOLEAN NTAPI AtapiStartIo(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb)
Definition: atapi.c:5811
ULONG NTAPI AtapiParseArgumentString(IN PCCH String, IN PCCH KeyWord)
Definition: id_ata.cpp:3705
VOID NTAPI AtapiEnableInterrupts(IN PVOID HwDeviceExtension, IN ULONG c)
Definition: id_ata.cpp:4397
#define ATA_SDMA0
Definition: atapi.h:318
VOID UniataExpectChannelInterrupt(IN struct _HW_CHANNEL *chan, IN BOOLEAN Expecting)
Definition: id_ata.cpp:4492
UCHAR DDKFASTAPI WaitOnBusyLong(IN struct _HW_CHANNEL *chan)
#define AdvancedPIOModes_4
Definition: atapi.h:727
ULONG NTAPI IdeSendCommand(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb, IN ULONG CmdAction)
Definition: id_ata.cpp:8233
UCHAR DDKFASTAPI WaitOnBaseBusyLong(IN struct _HW_CHANNEL *chan)
#define ATA_SATA_GEN1
Definition: atapi.h:757
VOID NTAPI AtapiDisableInterrupts(IN PVOID HwDeviceExtension, IN ULONG c)
Definition: id_ata.cpp:4457
#define ATA_SA600
Definition: atapi.h:339
__inline LONG ata_cur_mode_from_ident(PIDENTIFY_DATA ident, BOOLEAN Active)
Definition: atapi.h:1648
VOID NTAPI IdeMediaStatus(BOOLEAN EnableMSN, IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber)
Definition: id_ata.cpp:9069
UCHAR const AtaCommandFlags[256]
Definition: atacmd_map.h:25
#define AdvancedPIOModes_5
Definition: atapi.h:728
VOID NTAPI UniataInitSyncBaseIO(IN struct _HW_CHANNEL *chan)
PSCSI_REQUEST_BLOCK NTAPI BuildMechanismStatusSrb(IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb)
Definition: id_ata.cpp:11207
#define ATA_UDMA0
Definition: atapi.h:328
ULONG NTAPI UniataAnybodyHome(IN PVOID HwDeviceExtension, IN ULONG Channel, IN ULONG deviceNumber)
Definition: id_probe.cpp:2778
__inline BOOLEAN ata_is_sata(PIDENTIFY_DATA ident)
Definition: atapi.h:1636
ULONG NTAPI AtapiReadArgumentString(IN PVOID HwDeviceExtension, IN PVOID Context, IN PVOID BusInformation, IN PCHAR ArgumentString, IN OUT PPORT_CONFIGURATION_INFORMATION ConfigInfo, OUT PBOOLEAN Again)
Definition: id_probe.cpp:2754
LONG NTAPI AtaPioMode(PIDENTIFY_DATA2 ident)
Definition: id_ata.cpp:1220
VOID DDKFASTAPI AtapiHardReset(IN struct _HW_CHANNEL *chan, IN BOOLEAN DisableInterrupts, IN ULONG Delay)
Definition: id_ata.cpp:948
#define ATA_PIO0
Definition: atapi.h:309
VOID NTAPI AtapiHexToString(ULONG Value, PCHAR *Buffer)
ULONG NTAPI AtapiFindIsaController(IN PVOID HwDeviceExtension, IN PVOID Context, IN PVOID BusInformation, IN PCHAR ArgumentString, IN OUT PPORT_CONFIGURATION_INFORMATION ConfigInfo, OUT PBOOLEAN Again)
Definition: id_probe.cpp:2243
LONG NTAPI AtaUmode(PIDENTIFY_DATA2 ident)
Definition: id_ata.cpp:1254
VOID NTAPI AtapiHwInitializeChanger(IN PVOID HwDeviceExtension, IN ULONG TargetId, IN PMECHANICAL_STATUS_INFORMATION_HEADER MechanismStatus)
Definition: atapi.c:1469
VOID NTAPI AtapiDpcDispatch(IN PKDPC Dpc, IN PVOID DeferredContext, IN PVOID SystemArgument1, IN PVOID SystemArgument2)
_Must_inspect_result_ _In_ WDFDEVICE _In_ WDFSTRING String
Definition: wdfdevice.h:2433
_In_ WDFDEVICE _In_ PPNP_BUS_INFORMATION BusInformation
Definition: wdfdevice.h:3915
_Must_inspect_result_ _In_ PWDF_DPC_CONFIG _In_ PWDF_OBJECT_ATTRIBUTES _Out_ WDFDPC * Dpc
Definition: wdfdpc.h:112
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:413
_In_ ULONG _In_ ULONG_PTR ident
Definition: winddi.h:3994
_Reserved_ PVOID Reserved
Definition: winddi.h:3974
_Must_inspect_result_ _In_ ULONG Flags
Definition: wsk.h:170
_In_opt_ PVOID _In_opt_ PVOID SystemArgument1
Definition: ketypes.h:688
_In_opt_ PVOID DeferredContext
Definition: ketypes.h:687
_In_opt_ PVOID _In_opt_ PVOID _In_opt_ PVOID SystemArgument2
Definition: ketypes.h:689
_In_ ULONG _In_ BOOLEAN Active
Definition: potypes.h:561
unsigned char UCHAR
Definition: xmlstorage.h:181