ReactOS  0.4.14-dev-49-gfb4591c
atapi.h
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1 /*
2  * PROJECT: ReactOS Storage Stack
3  * LICENSE: DDK - see license.txt in the root dir
4  * FILE: drivers/storage/atapi/atapi.h
5  * PURPOSE: ATAPI IDE miniport driver
6  * PROGRAMMERS: Based on a source code sample from Microsoft NT4 DDK
7  */
8 
9 #include <srb.h>
10 #include <scsi.h>
11 
12 //
13 // IDE register definition
14 //
15 
16 typedef struct _IDE_REGISTERS_1 {
25 
26 typedef struct _IDE_REGISTERS_2 {
30 
31 typedef struct _IDE_REGISTERS_3 {
35 
36 //
37 // Device Extension Device Flags
38 //
39 
40 #define DFLAGS_DEVICE_PRESENT 0x0001 // Indicates that some device is present.
41 #define DFLAGS_ATAPI_DEVICE 0x0002 // Indicates whether Atapi commands can be used.
42 #define DFLAGS_TAPE_DEVICE 0x0004 // Indicates whether this is a tape device.
43 #define DFLAGS_INT_DRQ 0x0008 // Indicates whether device interrupts as DRQ is set after
44  // receiving Atapi Packet Command
45 #define DFLAGS_REMOVABLE_DRIVE 0x0010 // Indicates that the drive has the 'removable' bit set in
46  // identify data (offset 128)
47 #define DFLAGS_MEDIA_STATUS_ENABLED 0x0020 // Media status notification enabled
48 #define DFLAGS_ATAPI_CHANGER 0x0040 // Indicates atapi 2.5 changer present.
49 #define DFLAGS_SANYO_ATAPI_CHANGER 0x0080 // Indicates multi-platter device, not conforming to the 2.5 spec.
50 #define DFLAGS_CHANGER_INITED 0x0100 // Indicates that the init path for changers has already been done.
51 //
52 // Used to disable 'advanced' features.
53 //
54 
55 #define MAX_ERRORS 4
56 
57 //
58 // ATAPI command definitions
59 //
60 
61 #define ATAPI_MODE_SENSE 0x5A
62 #define ATAPI_MODE_SELECT 0x55
63 #define ATAPI_FORMAT_UNIT 0x24
64 
65 //
66 // ATAPI Command Descriptor Block
67 //
68 
69 typedef struct _MODE_SENSE_10 {
73  UCHAR Pc : 2;
79 
80 typedef struct _MODE_SELECT_10 {
83  UCHAR PFBit : 1;
90 
91 typedef struct _MODE_PARAMETER_HEADER_10 {
97 
98 //
99 // IDE command definitions
100 //
101 
102 #define IDE_COMMAND_ATAPI_RESET 0x08
103 #define IDE_COMMAND_RECALIBRATE 0x10
104 #define IDE_COMMAND_READ 0x20
105 #define IDE_COMMAND_WRITE 0x30
106 #define IDE_COMMAND_VERIFY 0x40
107 #define IDE_COMMAND_SEEK 0x70
108 #define IDE_COMMAND_SET_DRIVE_PARAMETERS 0x91
109 #define IDE_COMMAND_ATAPI_PACKET 0xA0
110 #define IDE_COMMAND_ATAPI_IDENTIFY 0xA1
111 #define IDE_COMMAND_READ_MULTIPLE 0xC4
112 #define IDE_COMMAND_WRITE_MULTIPLE 0xC5
113 #define IDE_COMMAND_SET_MULTIPLE 0xC6
114 #define IDE_COMMAND_READ_DMA 0xC8
115 #define IDE_COMMAND_WRITE_DMA 0xCA
116 #define IDE_COMMAND_GET_MEDIA_STATUS 0xDA
117 #define IDE_COMMAND_ENABLE_MEDIA_STATUS 0xEF
118 #define IDE_COMMAND_IDENTIFY 0xEC
119 #define IDE_COMMAND_MEDIA_EJECT 0xED
120 
121 //
122 // IDE status definitions
123 //
124 
125 #define IDE_STATUS_ERROR 0x01
126 #define IDE_STATUS_INDEX 0x02
127 #define IDE_STATUS_CORRECTED_ERROR 0x04
128 #define IDE_STATUS_DRQ 0x08
129 #define IDE_STATUS_DSC 0x10
130 #define IDE_STATUS_DRDY 0x40
131 #define IDE_STATUS_IDLE 0x50
132 #define IDE_STATUS_BUSY 0x80
133 
134 //
135 // IDE drive select/head definitions
136 //
137 
138 #define IDE_DRIVE_SELECT_1 0xA0
139 #define IDE_DRIVE_SELECT_2 0x10
140 
141 //
142 // IDE drive control definitions
143 //
144 
145 #define IDE_DC_DISABLE_INTERRUPTS 0x02
146 #define IDE_DC_RESET_CONTROLLER 0x04
147 #define IDE_DC_REENABLE_CONTROLLER 0x00
148 
149 //
150 // IDE error definitions
151 //
152 
153 #define IDE_ERROR_BAD_BLOCK 0x80
154 #define IDE_ERROR_DATA_ERROR 0x40
155 #define IDE_ERROR_MEDIA_CHANGE 0x20
156 #define IDE_ERROR_ID_NOT_FOUND 0x10
157 #define IDE_ERROR_MEDIA_CHANGE_REQ 0x08
158 #define IDE_ERROR_COMMAND_ABORTED 0x04
159 #define IDE_ERROR_END_OF_MEDIA 0x02
160 #define IDE_ERROR_ILLEGAL_LENGTH 0x01
161 
162 //
163 // ATAPI register definition
164 //
165 
166 typedef struct _ATAPI_REGISTERS_1 {
175 
176 typedef struct _ATAPI_REGISTERS_2 {
180 
181 //
182 // ATAPI interrupt reasons
183 //
184 
185 #define ATAPI_IR_COD 0x01
186 #define ATAPI_IR_IO 0x02
187 
188 //
189 // IDENTIFY data
190 //
191 
192 typedef struct _IDENTIFY_DATA {
195  USHORT Reserved1; // 04 2
200  USHORT VendorUnique1[3]; // 0E 7-9
201  USHORT SerialNumber[10]; // 14 10-19
202  USHORT BufferType; // 28 20
205  USHORT FirmwareRevision[4]; // 2E 23-26
206  USHORT ModelNumber[20]; // 36 27-46
211  USHORT Reserved2; // 64 50
234  USHORT Reserved5[2]; // 69-70
239  USHORT Reserved6[50]; // 75-126
241  USHORT Reserved7[128]; // 128-255
243 
244 //
245 // Identify data without the Reserved4.
246 //
247 
248 typedef struct _IDENTIFY_DATA2 {
257  USHORT SerialNumber[10]; // 14
262  USHORT ModelNumber[20]; // 36
279 
280 #define IDENTIFY_DATA_SIZE sizeof(IDENTIFY_DATA)
281 
282 //
283 // IDENTIFY capability bit definitions.
284 //
285 
286 #define IDENTIFY_CAPABILITIES_DMA_SUPPORTED 0x0100
287 #define IDENTIFY_CAPABILITIES_LBA_SUPPORTED 0x0200
288 
289 //
290 // IDENTIFY DMA timing cycle modes.
291 //
292 
293 #define IDENTIFY_DMA_CYCLES_MODE_0 0x00
294 #define IDENTIFY_DMA_CYCLES_MODE_1 0x01
295 #define IDENTIFY_DMA_CYCLES_MODE_2 0x02
296 
297 
304 
306  { "1095", 4, "0640", 4},
307  { "1039", 4, "0601", 4}
308 };
309 
310 #define BROKEN_ADAPTERS (sizeof(BrokenAdapters) / sizeof(BROKEN_CONTROLLER_INFORMATION))
311 
318 
320  { "10ad", 4, "0105", 4}
321 };
322 #define NUM_NATIVE_MODE_ADAPTERS (sizeof(NativeModeAdapters) / sizeof(NATIVE_MODE_CONTROLLER_INFORMATION))
323 
324 //
325 // Beautification macros
326 //
327 
328 #define GetStatus(BaseIoAddress, Status) \
329  Status = ScsiPortReadPortUchar(&BaseIoAddress->AlternateStatus);
330 
331 #define GetBaseStatus(BaseIoAddress, Status) \
332  Status = ScsiPortReadPortUchar(&BaseIoAddress->Command);
333 
334 #define WriteCommand(BaseIoAddress, Command) \
335  ScsiPortWritePortUchar(&BaseIoAddress->Command, Command);
336 
337 
338 
339 #define ReadBuffer(BaseIoAddress, Buffer, Count) \
340  ScsiPortReadPortBufferUshort(&BaseIoAddress->Data, \
341  Buffer, \
342  Count);
343 
344 #define WriteBuffer(BaseIoAddress, Buffer, Count) \
345  ScsiPortWritePortBufferUshort(&BaseIoAddress->Data, \
346  Buffer, \
347  Count);
348 
349 #define ReadBuffer2(BaseIoAddress, Buffer, Count) \
350  ScsiPortReadPortBufferUlong(&BaseIoAddress->Data, \
351  Buffer, \
352  Count);
353 
354 #define WriteBuffer2(BaseIoAddress, Buffer, Count) \
355  ScsiPortWritePortBufferUlong(&BaseIoAddress->Data, \
356  Buffer, \
357  Count);
358 
359 #define WaitOnBusy(BaseIoAddress, Status) \
360 { \
361  ULONG i; \
362  for (i=0; i<20000; i++) { \
363  GetStatus(BaseIoAddress, Status); \
364  if (Status & IDE_STATUS_BUSY) { \
365  ScsiPortStallExecution(150); \
366  continue; \
367  } else { \
368  break; \
369  } \
370  } \
371 }
372 
373 #define WaitOnBaseBusy(BaseIoAddress, Status) \
374 { \
375  ULONG i; \
376  for (i=0; i<20000; i++) { \
377  GetBaseStatus(BaseIoAddress, Status); \
378  if (Status & IDE_STATUS_BUSY) { \
379  ScsiPortStallExecution(150); \
380  continue; \
381  } else { \
382  break; \
383  } \
384  } \
385 }
386 
387 #define WaitForDrq(BaseIoAddress, Status) \
388 { \
389  ULONG i; \
390  for (i=0; i<1000; i++) { \
391  GetStatus(BaseIoAddress, Status); \
392  if (Status & IDE_STATUS_BUSY) { \
393  ScsiPortStallExecution(100); \
394  } else if (Status & IDE_STATUS_DRQ) { \
395  break; \
396  } else { \
397  ScsiPortStallExecution(200); \
398  } \
399  } \
400 }
401 
402 
403 #define WaitShortForDrq(BaseIoAddress, Status) \
404 { \
405  ULONG i; \
406  for (i=0; i<2; i++) { \
407  GetStatus(BaseIoAddress, Status); \
408  if (Status & IDE_STATUS_BUSY) { \
409  ScsiPortStallExecution(100); \
410  } else if (Status & IDE_STATUS_DRQ) { \
411  break; \
412  } else { \
413  ScsiPortStallExecution(100); \
414  } \
415  } \
416 }
417 
418 #define AtapiSoftReset(BaseIoAddress,DeviceNumber) \
419 {\
420  UCHAR statusByte; \
421  ULONG i = 1000*1000;\
422  ScsiPortWritePortUchar(&BaseIoAddress->DriveSelect,(UCHAR)(((DeviceNumber & 0x1) << 4) | 0xA0)); \
423  ScsiPortStallExecution(500);\
424  ScsiPortWritePortUchar(&BaseIoAddress->Command, IDE_COMMAND_ATAPI_RESET); \
425  while ((ScsiPortReadPortUchar(&BaseIoAddress->Command) & IDE_STATUS_BUSY) && i--)\
426  ScsiPortStallExecution(30);\
427  ScsiPortWritePortUchar(&BaseIoAddress->DriveSelect,(UCHAR)((DeviceNumber << 4) | 0xA0)); \
428  WaitOnBusy( ((PIDE_REGISTERS_2)((PUCHAR)BaseIoAddress + 0x206)), statusByte); \
429  ScsiPortStallExecution(500);\
430 }
431 
432 #define IdeHardReset(BaseIoAddress,result) \
433 {\
434  UCHAR statusByte;\
435  ULONG i;\
436  ScsiPortWritePortUchar(&BaseIoAddress->AlternateStatus,IDE_DC_RESET_CONTROLLER );\
437  ScsiPortStallExecution(50 * 1000);\
438  ScsiPortWritePortUchar(&BaseIoAddress->AlternateStatus,IDE_DC_REENABLE_CONTROLLER);\
439  for (i = 0; i < 1000 * 1000; i++) {\
440  statusByte = ScsiPortReadPortUchar(&BaseIoAddress->AlternateStatus);\
441  if (statusByte != IDE_STATUS_IDLE && statusByte != 0x0) {\
442  ScsiPortStallExecution(5);\
443  } else {\
444  break;\
445  }\
446  }\
447  if (i == 1000*1000) {\
448  result = FALSE;\
449  }\
450  result = TRUE;\
451 }
452 
453 #define IS_RDP(OperationCode)\
454  ((OperationCode == SCSIOP_ERASE)||\
455  (OperationCode == SCSIOP_LOAD_UNLOAD)||\
456  (OperationCode == SCSIOP_LOCATE)||\
457  (OperationCode == SCSIOP_REWIND) ||\
458  (OperationCode == SCSIOP_SPACE)||\
459  (OperationCode == SCSIOP_SEEK)||\
460  (OperationCode == SCSIOP_WRITE_FILEMARKS))
461 
USHORT BufferSectorSize
Definition: atapi.h:203
struct _MODE_PARAMETER_HEADER_10 * PMODE_PARAMETER_HEADER_10
USHORT ReleaseTimeOverlapped
Definition: atapi.h:235
signed char * PCHAR
Definition: retypes.h:7
UCHAR Reserved2[4]
Definition: atapi.h:74
USHORT UnformattedBytesPerTrack
Definition: atapi.h:253
struct _IDENTIFY_DATA2 * PIDENTIFY_DATA2
USHORT Reserved1
Definition: atapi.h:195
USHORT GeneralConfiguration
Definition: atapi.h:249
UCHAR ParameterListLengthLsb
Definition: atapi.h:87
NATIVE_MODE_CONTROLLER_INFORMATION const NativeModeAdapters[]
Definition: atapi.h:319
struct _MODE_SELECT_10 * PMODE_SELECT_10
UCHAR DriveSelect
Definition: atapi.h:22
USHORT BufferType
Definition: atapi.h:202
USHORT MinimumPIOCycleTimeIORDY
Definition: atapi.h:233
UCHAR VendorUnique3
Definition: atapi.h:212
UCHAR Reserved3[5]
Definition: atapi.h:85
UCHAR BlockNumber
Definition: atapi.h:19
USHORT SerialNumber[10]
Definition: atapi.h:257
USHORT Reserved4
Definition: atapi.h:229
USHORT SectorsPerTrack
Definition: atapi.h:255
USHORT Data
Definition: atapi.h:17
USHORT SpecialFunctionsEnabled
Definition: atapi.h:240
struct _ATAPI_REGISTERS_2 ATAPI_REGISTERS_2
UCHAR BlockCount
Definition: atapi.h:18
USHORT MultiWordDMAActive
Definition: atapi.h:227
struct _IDE_REGISTERS_2 * PIDE_REGISTERS_2
UCHAR ByteCountHigh
Definition: atapi.h:171
USHORT MinorRevision
Definition: atapi.h:238
struct _IDENTIFY_DATA IDENTIFY_DATA
ULONG Data
Definition: atapi.h:32
USHORT SingleWordDMASupport
Definition: atapi.h:224
USHORT MinimumMWXferCycleTime
Definition: atapi.h:230
USHORT Reserved2
Definition: atapi.h:211
UCHAR PioCycleTimingMode
Definition: atapi.h:269
struct _IDE_REGISTERS_3 IDE_REGISTERS_3
struct _BROKEN_CONTROLLER_INFORMATION BROKEN_CONTROLLER_INFORMATION
USHORT Reserved7[128]
Definition: atapi.h:241
UCHAR DriveSelect
Definition: atapi.h:172
USHORT SingleWordDMAActive
Definition: atapi.h:225
ULONG UserAddressableSectors
Definition: atapi.h:223
USHORT Reserved6[50]
Definition: atapi.h:239
USHORT UnformattedBytesPerSector
Definition: atapi.h:254
UCHAR CylinderLow
Definition: atapi.h:20
USHORT ReleaseTimeServiceCommand
Definition: atapi.h:236
UCHAR ParameterListLengthMsb
Definition: atapi.h:75
struct _MODE_SENSE_10 MODE_SENSE_10
UCHAR VendorUnique2
Definition: atapi.h:264
UCHAR MaximumBlockTransfer
Definition: atapi.h:263
UCHAR Command
Definition: atapi.h:23
UCHAR PioCycleTimingMode
Definition: atapi.h:213
UCHAR Others[4]
Definition: atapi.h:33
UCHAR PFBit
Definition: atapi.h:83
USHORT Reserved2
Definition: atapi.h:267
USHORT Capabilities
Definition: atapi.h:266
USHORT BufferSectorSize
Definition: atapi.h:259
USHORT NumberOfCurrentHeads
Definition: atapi.h:275
USHORT TranslationFieldsValid
Definition: atapi.h:216
USHORT ModelNumber[20]
Definition: atapi.h:262
USHORT FirmwareRevision[4]
Definition: atapi.h:205
USHORT AdvancedPIOModes
Definition: atapi.h:228
USHORT NumberOfCurrentHeads
Definition: atapi.h:219
UCHAR Reserved2
Definition: atapi.h:84
struct _NATIVE_MODE_CONTROLLER_INFORMATION * PNATIVE_MODE_CONTROLLER_INFORMATION
_Reserved_ PVOID Reserved
Definition: winddi.h:3974
UCHAR InterruptReason
Definition: atapi.h:168
UCHAR Reserved4[3]
Definition: atapi.h:88
UCHAR PageCode
Definition: atapi.h:72
UCHAR DmaCycleTimingMode
Definition: atapi.h:215
USHORT CurrentSectorsPerTrack
Definition: atapi.h:220
UCHAR VendorUnique2
Definition: atapi.h:208
ULONG CurrentSectorCapacity
Definition: atapi.h:277
struct _IDENTIFY_DATA * PIDENTIFY_DATA
UCHAR ByteCountLow
Definition: atapi.h:170
UCHAR AlternateStatus
Definition: atapi.h:177
struct _NATIVE_MODE_CONTROLLER_INFORMATION NATIVE_MODE_CONTROLLER_INFORMATION
USHORT MultiWordDMASupport
Definition: atapi.h:226
USHORT SerialNumber[10]
Definition: atapi.h:201
UCHAR DmaCycleTimingMode
Definition: atapi.h:271
USHORT BufferType
Definition: atapi.h:258
USHORT FirmwareRevision[4]
Definition: atapi.h:261
USHORT DoubleWordIo
Definition: atapi.h:209
struct _IDENTIFY_DATA2 IDENTIFY_DATA2
USHORT NumberOfCylinders
Definition: atapi.h:250
USHORT DoubleWordIo
Definition: atapi.h:265
UCHAR ParameterListLengthLsb
Definition: atapi.h:76
UCHAR OperationCode
Definition: atapi.h:81
USHORT VendorUnique1[3]
Definition: atapi.h:256
UCHAR Reserved1
Definition: atapi.h:82
BROKEN_CONTROLLER_INFORMATION const BrokenAdapters[]
Definition: atapi.h:305
USHORT MajorRevision
Definition: atapi.h:237
unsigned char UCHAR
Definition: xmlstorage.h:181
UCHAR DriveAddress
Definition: atapi.h:28
struct _ATAPI_REGISTERS_1 ATAPI_REGISTERS_1
UCHAR ParameterListLengthMsb
Definition: atapi.h:86
struct _MODE_PARAMETER_HEADER_10 MODE_PARAMETER_HEADER_10
ULONG CurrentSectorCapacity
Definition: atapi.h:221
UCHAR VendorUnique4
Definition: atapi.h:214
UCHAR Reserved1
Definition: atapi.h:71
UCHAR MaximumBlockTransfer
Definition: atapi.h:207
struct _IDE_REGISTERS_3 * PIDE_REGISTERS_3
USHORT NumberOfEccBytes
Definition: atapi.h:260
USHORT Capabilities
Definition: atapi.h:210
struct _MODE_SELECT_10 MODE_SELECT_10
struct _IDE_REGISTERS_2 IDE_REGISTERS_2
UCHAR VendorUnique4
Definition: atapi.h:270
USHORT RecommendedMWXferCycleTime
Definition: atapi.h:231
USHORT CurrentMultiSectorSetting
Definition: atapi.h:222
USHORT NumberOfCurrentCylinders
Definition: atapi.h:274
struct _MODE_SENSE_10 * PMODE_SENSE_10
UCHAR VendorUnique3
Definition: atapi.h:268
struct _ATAPI_REGISTERS_1 * PATAPI_REGISTERS_1
USHORT VendorUnique1[3]
Definition: atapi.h:200
USHORT Reserved1
Definition: atapi.h:251
UCHAR AlternateStatus
Definition: atapi.h:27
USHORT SectorsPerTrack
Definition: atapi.h:199
USHORT Reserved3
Definition: atapi.h:217
unsigned short USHORT
Definition: pedump.c:61
USHORT ModelNumber[20]
Definition: atapi.h:206
struct _BROKEN_CONTROLLER_INFORMATION * PBROKEN_CONTROLLER_INFORMATION
UCHAR DriveAddress
Definition: atapi.h:178
USHORT CurrentSectorsPerTrack
Definition: atapi.h:276
UCHAR Reserved3[3]
Definition: atapi.h:77
USHORT TranslationFieldsValid
Definition: atapi.h:272
USHORT NumberOfEccBytes
Definition: atapi.h:204
USHORT UnformattedBytesPerSector
Definition: atapi.h:198
struct _IDE_REGISTERS_1 IDE_REGISTERS_1
USHORT NumberOfCylinders
Definition: atapi.h:194
USHORT NumberOfHeads
Definition: atapi.h:196
USHORT MinimumPIOCycleTime
Definition: atapi.h:232
struct _ATAPI_REGISTERS_2 * PATAPI_REGISTERS_2
unsigned int ULONG
Definition: retypes.h:1
USHORT NumberOfHeads
Definition: atapi.h:252
UCHAR CylinderHigh
Definition: atapi.h:21
USHORT UnformattedBytesPerTrack
Definition: atapi.h:197
USHORT NumberOfCurrentCylinders
Definition: atapi.h:218
USHORT GeneralConfiguration
Definition: atapi.h:193
USHORT Reserved3
Definition: atapi.h:273
UCHAR Pc
Definition: atapi.h:73
USHORT Reserved5[2]
Definition: atapi.h:234
struct _IDE_REGISTERS_1 * PIDE_REGISTERS_1
UCHAR OperationCode
Definition: atapi.h:70