72 for(
i=0;
i<100;
i++) {
81 chan->
lun[0]->LimitedTransferMode =
82 chan->
lun[0]->PhyTransferMode =
151 for (retry = 0; retry < 10; retry++) {
153 for (loop = 0; loop < 10; loop++) {
166 for (loop = 0; loop < 10; loop++) {
277 chan->RegTranslation[io_port_ndx].Proc) {
282 PVOID HwDeviceExtension = (
PVOID)deviceExtension;
285 ULONG VendorID = deviceExtension->
DevID & 0xffff;
293 offs = 0x50+chan->lun[
p]->SATA_lun_map*0x10;
295 switch(io_port_ndx) {
313 offs = 0x100+chan->lun[
p]->SATA_lun_map*0x80;
315 switch(io_port_ndx) {
330 offs = ((deviceExtension->
Channel+chan->lChannel)*2+
p) * 0x100;
332 switch(io_port_ndx) {
365 chan->RegTranslation[io_port_ndx].Proc) {
370 PVOID HwDeviceExtension = (
PVOID)deviceExtension;
373 ULONG VendorID = deviceExtension->
DevID & 0xffff;
381 offs = 0x50+chan->lun[
p]->SATA_lun_map*0x10;
383 switch(io_port_ndx) {
401 offs = 0x100+chan->lun[
p]->SATA_lun_map*0x80;
403 switch(io_port_ndx) {
419 offs = ((deviceExtension->
Channel+chan->lChannel)*2+
p) * 0x100;
421 switch(io_port_ndx) {
522 PM_Ports &= 0x0000000f;
524 switch(PM_DeviceId) {
530 PM_RevId, PM_Ports));
540 PM_RevId, PM_Ports));
545 PM_DeviceId, PM_RevId, PM_Ports));
550 for(
i=0;
i<PM_Ports;
i++) {
552 LunExt = chan->lun[
i];
570 chan->PmLunMap |= (1 <<
i);
572 switch (signature >> 16) {
596 " AHCI Base: %#x MemIo %d Proc %d\n",
597 deviceExtension->BaseIoAHCI_0.Addr,
598 deviceExtension->BaseIoAHCI_0.MemIo,
599 deviceExtension->BaseIoAHCI_0.Proc));
604 " AHCI_%#x (%#x) = %#x\n",
606 (deviceExtension->BaseIoAHCI_0.Addr+
j),
615 UniataDumpAhciPortRegs(
623 " AHCI port %d Base: %#x MemIo %d Proc %d\n",
625 chan->BaseIoAHCI_Port.Addr,
626 chan->BaseIoAHCI_Port.MemIo,
627 chan->BaseIoAHCI_Port.Proc));
632 " AHCI%d_%#x (%#x) = %#x\n",
635 (chan->BaseIoAHCI_Port.Addr+
j),
656 ULONG BaseMemAddress;
668 UniataDumpAhciRegs(deviceExtension);
677 for(
i=0;
i<50;
i++) {
690 for(
i=0;
i<2000;
i++) {
727 for(
i=0;
i<1000;
i++) {
808 chan = &deviceExtension->
chan[
c];
910 ULONG NumberChannels;
922 switch(deviceExtension->
DevID) {
928 BaseMemAddress =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
930 if(!BaseMemAddress) {
934 if((*ConfigInfo->AccessRanges)[BarId].RangeInMemory) {
942 UniataDumpAhciRegs(deviceExtension);
1052 switch(deviceExtension->
DevID) {
1063 NumberChannels =
min(NumberChannels, 2);
1069 NumberChannels =
min(NumberChannels, 4);
1073 if(!NumberChannels) {
1086 NumberChannels,
PI));
1124 KdPrint((
" AHCI detect status %d\n", found));
1148 KdPrint((
"UniataAhciStatus(%d-%d):\n", lChannel, Channel));
1152 hIS &= (1 << Channel);
1167 KdPrint((
" AHCI: is=%08x ss=%08x serror=%08x CI=%08x, ACT=%08x\n",
1186 if(
CI & (1 <<
tag)) {
1188 UniataDumpAhciPortRegs(chan);
1194 KdPrint((
" AHCI: unexpected, error\n"));
1196 KdPrint((
" AHCI: unexpected, incomplete command or error ?\n"));
1226 regs->bCommandReg = (
UCHAR)(TFD & 0xff);
1227 regs->bFeaturesReg = (
UCHAR)((TFD >> 8) & 0xff);
1230 regs->bSectorCountReg = (
UCHAR)(SIG & 0xff);
1231 regs->bSectorNumberReg = (
UCHAR)((SIG >> 8) & 0xff);
1232 regs->bCylLowReg = (
UCHAR)((SIG >> 16) & 0xff);
1233 regs->bCylHighReg = (
UCHAR)((SIG >> 24) & 0xff);
1255 PHW_CHANNEL chan = &deviceExtension->chan[lChannel];
1352 PHW_CHANNEL chan = &deviceExtension->chan[lChannel];
1451 if (!((
CI >>
tag) & 0x01)) {
1565 KdPrint2((
PRINT_PREFIX "UniataAhciSendPIOCommand: cntrlr %#x:%#x dev %#x, cmd %#x, lba %#I64x bcount %#x feature %#x, buff %#x, len %#x, WF %#x \n",
1569 KdPrint((
" length/DEV_BSIZE != bcount\n"));
1588 AHCI_CMD = AtaReq->
ahci.ahci_cmd_ptr;
1591 &(AHCI_CMD->
cfis[0]),
1605 KdPrint2((
"ahci_flags %#x\n", ahci_flags));
1623 KdPrint2((
" can't setup buffer\n"));
1628 AtaReq->
ahci.io_cmd_flags = ahci_flags;
1642 KdPrint2((
" return imemdiately\n"));
1678 KdPrint2((
PRINT_PREFIX "UniataAhciSendPIOCommand: cntrlr %#x:%#x dev %#x, buff %#x, len %#x, WF %#x \n",
1698 AHCI_CMD = AtaReq->
ahci.ahci_cmd_ptr;
1704 if(
Srb->DataTransferLength) {
1714 &(AHCI_CMD->
cfis[0]),
1724 KdPrint2((
"ahci_flags %#x\n", ahci_flags));
1726 if(
Srb->DataTransferLength) {
1732 Srb->DataTransferLength)) {
1733 KdPrint2((
" can't setup buffer\n"));
1738 AtaReq->
ahci.io_cmd_flags = ahci_flags;
1752 KdPrint2((
" return imemdiately\n"));
1843 KdPrint((
" alt sig: %#x\n", signature));
1861 KdPrint2((
"UniataAhciWaitReady: lChan %d\n", chan->lChannel));
1894 (*signature) = 0xffffffff;
1905 KdPrint((
" busy: TFD %#x\n", TFD));
1911 UniataDumpAhciPortRegs(chan);
1915 KdPrint((
" sig: %#x\n", *signature));
1938 ULONG VendorID = deviceExtension->
DevID & 0xffff;
1949 KdPrint((
" No devices in all LUNs\n"));
1982 if (signature == 0xffffffff) {
1990 KdPrint((
" signature %#x\n", signature));
1992 switch (signature >> 16) {
2004 KdPrint((
" no PM supported (1 lun/chan)\n"));
2013 KdPrint((
" default to ATA ???\n"));
2030 KdPrint2((
"UniataAhciStartFR: lChan %d\n", chan->lChannel));
2049 KdPrint2((
"UniataAhciStopFR: lChan %d\n", chan->lChannel));
2055 for(
i=0;
i<1000;
i++) {
2065 KdPrint2((
"UniataAhciStopFR: timeout\n"));
2078 KdPrint2((
"UniataAhciStart: lChan %d\n", chan->lChannel));
2112 KdPrint2((
"UniataAhciCLO: lChan %d\n", chan->lChannel));
2116 CAP = chan->DeviceExtension->AHCI_CAP;
2125 for(
i=0;
i<1000;
i++) {
2134 KdPrint2((
"UniataAhciCLO: timeout\n"));
2148 KdPrint2((
"UniataAhciStop: lChan %d\n", chan->lChannel));
2155 for(
i=0;
i<1000;
i++) {
2165 KdPrint2((
"UniataAhciStop: timeout\n"));
2194 KdPrint2((
"UniataAhciBeginTransaction: lChan %d, AtaReq %#x\n", chan->
lChannel, AtaReq));
2204 if(AtaReq->
ahci.ahci_base64) {
2208 if(AtaReq->
ahci.ahci_cmd_ptr) {
2210 AtaReq->
ahci.ahci_cmd_ptr, (
ULONG)(AtaReq->
ahci.ahci_base64),
2237 KdDump(&(AtaReq->
ahci.ahci_cmd_ptr->acmd), 16);
2257 KdPrint2((
" Send CMD START (%#x != %#x)\n",
CMD, CMD0));
2261 KdPrint2((
" No CMD START, already active\n"));
2270 for(
i=0;
i<1000000;
i++) {
2282 AtaReq->
ahci.in_status = TFD;
2322 AtaReq->
ahci.in_error = (
UCHAR)(TFD >> 8);
2325 AtaReq->
ahci.in_error = 0;
2327 AtaReq->
ahci.in_status = TFD;
2331 AtaReq->
ahci.in_bcount = (
ULONG)(RCV_FIS[12]) | ((
ULONG)(RCV_FIS[13]) << 8);
2360 if(
CI & (1 <<
tag)) {
2362 KdPrint2((
" Incomplete command, CI %#x, ACT %#x\n",
CI, ACT));
2363 KdPrint2((
" FIS status %#x, error %#x\n", RCV_FIS[2], RCV_FIS[3]));
2366 UniataDumpAhciPortRegs(chan);
2369 KdPrint2((
" Abort failed, need RESET\n"));
2372 UniataDumpAhciPortRegs(chan);
2396 KdPrint2((
"UniataAhciResume: lChan %d\n", chan->lChannel));
2406 base = chan->AHCI_CTL_PhAddr;
2446 UniataDumpAhciPortRegs(chan);
2462 KdPrint2((
"UniataAhciSuspend:\n"));
2504 PUCHAR RCV_FIS = &(chan->AhciCtlBlock->rcv_fis.rfis[0]);
2538 KdDump(RCV_FIS,
sizeof(chan->AhciCtlBlock->rcv_fis.rfis));
2606 return (
UCHAR)(TFD >> 8);
2627 prd_base64_0 = prd_base64 = 0;
2628 prd_base = (
PUCHAR)(&AtaReq->ahci_cmd0);
2629 prd_base0 = prd_base;
2634 d = (
ULONG)(prd_base64 - prd_base64_0);
2673 srb->PathId = (
UCHAR)lChannel;
2682 srb->TimeOutValue = 4;
2685 srb->DataBuffer =
Buffer;
2686 srb->DataTransferLength =
Length;
2687 srb->SrbExtension = AtaReq;
2702 AtaReq->
ahci.ahci_cmd_ptr, AtaReq->
ahci.ahci_base64));
BOOLEAN NTAPI UniataAhciStopFR(IN PHW_CHANNEL chan)
#define ATA_AHCI_P_CMD_ATAPI
INTERNETFEATURELIST feature
#define IDE_STATUS_SUCCESS
#define CTRFLAGS_AHCI_PM2
#define ATA_CMD_FLAG_48supp
#define ATA_AHCI_CMD_WRITE
ULONG NTAPI UniataSataReadPort4(IN PHW_CHANNEL chan, IN ULONG io_port_ndx, IN ULONG pm_port)
UCHAR NTAPI UniataAhciWritePM(IN PHW_CHANNEL chan, IN ULONG DeviceNumber, IN ULONG Reg, IN ULONG value)
#define IDX_AHCI_o_Control
UCHAR const AtaCommandFlags[256]
UCHAR NTAPI UniataSataConnect(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG pm_port)
_In_ ULONG _In_ ULONG _In_ ULONG Length
BOOLEAN NTAPI UniataAhciCLO(IN PHW_CHANNEL chan)
#define CHAN_NOT_SPECIFIED
#define IDX_AHCI_o_BlockCount
BOOLEAN NTAPI UniataSataReadPM(IN PHW_CHANNEL chan, IN ULONG DeviceNumber, IN ULONG Reg, OUT PULONG result)
#define IDX_AHCI_o_Feature
__inline ULONG UniataAhciReadChannelPort4(IN PHW_CHANNEL chan, IN ULONG io_port_ndx)
IN BOOLEAN OUT PSTR Buffer
UCHAR NTAPI UniataSataPhyEnable(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG pm_port, IN BOOLEAN doReset)
ULONG NTAPI UniataSataSoftReset(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber)
#define CTRFLAGS_NO_SLAVE
ULONG NTAPI UniataAhciSetupFIS_H2D(IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG DeviceNumber, IN ULONG lChannel, OUT PUCHAR fis, IN UCHAR command, IN ULONGLONG lba, IN USHORT count, IN USHORT feature)
BOOLEAN NTAPI UniataAhciDetect(IN PVOID HwDeviceExtension, IN PPCI_COMMON_CONFIG pciData, IN OUT PPORT_CONFIGURATION_INFORMATION ConfigInfo)
#define IDX_IO2_AltStatus
GLuint GLuint GLsizei count
BOOLEAN NTAPI UniataSataEvent(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG Action, IN ULONG pm_port)
bool NTAPI CheckIfBadBlock(IN PHW_LU_EXTENSION LunExt, IN ULONGLONG lba, IN ULONG count)
UCHAR NTAPI UniataAhciStatus(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber)
#define ATA_AHCI_P_CMD_SLUMBER
#define IDX_AHCI_o_CylinderHighExp
#define ATA_AHCI_P_CMD_ALPE
VOID NTAPI UniataAhciResume(IN PHW_CHANNEL chan)
#define ATA_AHCI_P_CMD_POD
#define ATA_AHCI_P_IX_INF
__inline USHORT UniAtaAhciAdjustIoFlags(IN UCHAR command, IN USHORT ahci_flags, IN ULONG fis_size, IN ULONG DeviceNumber)
#define ATA_AHCI_P_CMD_PMA
VOID NTAPI UniataInitSyncBaseIO(IN struct _HW_CHANNEL *chan)
#define IDE_COMMAND_WRITE_PM
#define IDE_COMMAND_ATAPI_RESET
VOID NTAPI UniataAhciStart(IN PHW_CHANNEL chan)
#define IDX_SATA_SControl
#define DFLAGS_ATAPI_DEVICE
UCHAR NTAPI UniataSataWritePM(IN PHW_CHANNEL chan, IN ULONG DeviceNumber, IN ULONG Reg, IN ULONG value)
VOID NTAPI UniataAhciStartFR(IN PHW_CHANNEL chan)
ULONG NTAPI UniataAhciSoftReset(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber)
#define SRB_FLAGS_DATA_IN
VOID UniataSataIdentifyPM(IN PHW_CHANNEL chan)
ULONG NTAPI UniataAhciHardReset(IN PVOID HwDeviceExtension, IN ULONG lChannel, OUT PULONG signature)
__inline VOID UniataAhciWriteChannelPort4(IN PHW_CHANNEL chan, IN ULONG io_port_ndx, IN ULONG data)
GLbitfield GLuint64 timeout
ULONG DDKFASTAPI AtapiReadPort4(IN PHW_CHANNEL chan, IN ULONGIO_PTR port)
struct _IDE_AHCI_PORT_REGISTERS::@1091::@1111::@1113 STS
struct _ATA_REQ::@1130::@1132::@1136::@1139 ahci
VOID NTAPI UniataForgetDevice(PHW_LU_EXTENSION LunExt)
VOID NTAPI UniataSataWritePort4(IN PHW_CHANNEL chan, IN ULONG io_port_ndx, IN ULONG data, IN ULONG pm_port)
#define IDX_AHCI_P_SError
#define ATA_AHCI_P_IX_CPD
PIDE_AHCI_CHANNEL_CTL_BLOCK AhciCtlBlock
#define SStatus_DET_Offline
__inline ULONG UniataAhciUlongFromRFIS(PUCHAR RCV_FIS)
BOOLEAN NTAPI AtapiDmaSetup(IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG lChannel, IN PSCSI_REQUEST_BLOCK Srb, IN PUCHAR data, IN ULONG count)
NTSTATUS(* NTAPI)(IN PFILE_FULL_EA_INFORMATION EaBuffer, IN ULONG EaLength, OUT PULONG ErrorOffset)
#define SControl_IPM_NoPartialSlumber
UCHAR NTAPI UniataAhciWaitCommandReady(IN PHW_CHANNEL chan, IN ULONG timeout)
PSCSI_REQUEST_BLOCK AhciInternalSrb
#define UniataAhciReadHostPort4(deviceExtension, io_port_ndx)
IORES BaseIoAddressSATA_0
GLenum GLuint GLenum GLsizei length
#define UniataAhciWriteHostPort4(deviceExtension, io_port_ndx, data)
BOOLEAN NTAPI UniataAhciAbortOperation(IN PHW_CHANNEL chan)
#define AHCI_FIS_TYPE_ATA_H2D
UCHAR NTAPI UniataAhciEndTransaction(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber, IN PSCSI_REQUEST_BLOCK Srb)
#define INTERRUPT_REASON_OUR
VOID NTAPI UniataAhciReset(IN PVOID HwDeviceExtension, IN ULONG lChannel)
static const WCHAR version[]
UCHAR const AtaCommands48[256]
#define SControl_DET_Init
#define ATA_AHCI_P_CMD_ACTIVE
PSCSI_REQUEST_BLOCK NTAPI BuildAhciInternalSrb(IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG lChannel, IN PUCHAR Buffer, IN ULONG Length)
#define ATA_AHCI_P_CMD_ST
#define IDX_AHCI_o_BlockNumberExp
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint GLint GLint j
__inline BOOLEAN UniataIsSATARangeAvailable(IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG lChannel)
UCHAR DDKFASTAPI WaitOnBaseBusyLong(IN struct _HW_CHANNEL *chan)
#define ATA_AHCI_P_IX_DHR
struct _IDE_AHCI_CMD * PIDE_AHCI_CMD
BOOLEAN NTAPI UniataSataClearErr(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN BOOLEAN do_connect, IN ULONG pm_port)
VOID NTAPI AtapiSetupLunPtrs(IN PHW_CHANNEL chan, IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG c)
ULONGLONG AHCI_CTL_PhAddr
#define IDX_AHCI_o_DriveSelect
#define AHCI_CAP_NOP_MASK
#define IDX_AHCI_o_BlockCountExp
ULONG NTAPI AtapiRegCheckDevValue(IN PVOID HwDeviceExtension, IN ULONG chan, IN ULONG dev, IN PCWSTR Name, IN ULONG Default)
BOOLEAN NTAPI UniataAhciInit(IN PVOID HwDeviceExtension)
#define SetPciConfig4(offs, op)
UCHAR NTAPI UniataAhciSendCommand(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber, IN USHORT ahci_flags, IN ULONG timeout)
#define AHCI_CAP_ISS_MASK
#define GetPciConfig4(offs, op)
UCHAR NTAPI UniataAhciBeginTransaction(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber, IN PSCSI_REQUEST_BLOCK Srb)
#define ATA_AHCI_P_CMD_CLO
#define UNIATA_SATA_EVENT_ATTACH
ULONG NTAPI UniataAhciWaitReady(IN PHW_CHANNEL chan, IN ULONG timeout)
#define IDX_IO1_i_BlockCount
#define DEVNUM_NOT_SPECIFIED
#define IDX_IO1_i_CylinderLow
#define ATA_AHCI_P_IX_HBF
GLint GLenum GLsizei GLsizei GLsizei GLint GLsizei const GLvoid * data
struct _SCSI_REQUEST_BLOCK SCSI_REQUEST_BLOCK
#define ATA_AHCI_P_IX_SDB
#define IDX_AHCI_o_CylinderHigh
#define UniAta_need_lba48(command, lba, count, supp48)
#define IDX_AHCI_o_Command
VOID NTAPI AtapiDmaAlloc(IN PVOID HwDeviceExtension, IN PPORT_CONFIGURATION_INFORMATION ConfigInfo, IN ULONG lChannel)
#define ATA_FLAGS_48BIT_COMMAND
const char * SError(int e)
#define AHCI_CMD_ALIGNEMENT_MASK
#define ATA_AHCI_P_CMD_ASP
#define SATA_MAX_PM_UNITS
#define UNIATA_SATA_EVENT_DETACH
ULONG DmaSegmentAlignmentMask
IORES RegTranslation[IDX_MAX_REG]
IDE_AHCI_CMD_LIST cmd_list[ATA_AHCI_MAX_TAGS]
#define INTERRUPT_REASON_IGNORE
struct _HW_DEVICE_EXTENSION * PHW_DEVICE_EXTENSION
VOID NTAPI UniataAhciSnapAtaRegs(IN PHW_CHANNEL chan, IN ULONG DeviceNumber, IN OUT PIDEREGS_EX regs)
#define DFLAGS_DEVICE_PRESENT
BOOLEAN NTAPI UniataAhciReadPM(IN PHW_CHANNEL chan, IN ULONG DeviceNumber, IN ULONG Reg, OUT PULONG result)
#define ATA_AHCI_P_CMD_FR
#define INTERRUPT_REASON_UNEXPECTED
VOID UniataAhciSetupCmdPtr(IN OUT PATA_REQ AtaReq)
#define IDE_DRIVE_SELECT_1
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
#define ATA_AHCI_P_IX_HBD
UCHAR NTAPI UniataAhciSendPIOCommandDirect(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber, IN PSCSI_REQUEST_BLOCK Srb, IN PIDEREGS_EX regs, IN ULONG wait_flags, IN ULONG timeout)
_In_ WDFIOTARGET _In_ _Strict_type_match_ WDF_IO_TARGET_SENT_IO_ACTION Action
VOID DDKFASTAPI AtapiWritePort4(IN PHW_CHANNEL chan, IN ULONGIO_PTR port, IN ULONG data)
VOID DDKFASTAPI AtapiWritePortEx4(IN PHW_CHANNEL chan, IN ULONGIO_PTR port, IN ULONG offs, IN ULONG data)
#define FIELD_OFFSET(t, f)
#define ATA_AHCI_CMD_CLR_BUSY
#define ATA_AHCI_CMD_RESET
#define SControl_DET_Idle
#define SRB_FLAGS_DATA_OUT
#define ATA_AHCI_P_CMD_SUD
#define AHCI_CLB_ALIGNEMENT_MASK
ULONG DDKFASTAPI AtapiReadPortEx4(IN PHW_CHANNEL chan, IN ULONGIO_PTR port, IN ULONG offs)
ULONG NTAPI CheckDevice(IN PVOID HwDeviceExtension, IN ULONG Channel, IN ULONG deviceNumber, IN BOOLEAN ResetBus)
#define ATA_AHCI_P_IX_PRC
#define ATA_CMD_FLAG_LBAIOsupp
ULONG NTAPI UniataAhciSetupFIS_H2D_Direct(IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG DeviceNumber, IN ULONG lChannel, OUT PUCHAR fis, IN PIDEREGS_EX regs)
int command(const char *fmt,...)
PATA_REQ AhciInternalAtaReq
#define AtapiStallExecution(dt)
#define ATA_AHCI_P_CMD_FRE
BOOLEAN NTAPI UniataAhciStop(IN PHW_CHANNEL chan)
#define IDX_AHCI_o_CylinderLowExp
#define UniAtaClearAtaReq(AtaReq)
#define IDX_AHCI_o_BlockNumber
#define SRB_FUNCTION_EXECUTE_SCSI
#define ATA_AHCI_P_CMD_CR
#define IDE_DC_RESET_CONTROLLER
#define UNIATA_SATA_RESET_ENABLE
ULONGIO_PTR NTAPI AtapiGetIoRange(IN PVOID HwDeviceExtension, IN PPORT_CONFIGURATION_INFORMATION ConfigInfo, IN PPCI_COMMON_CONFIG pciData, IN ULONG SystemIoBusNumber, IN ULONG rid, IN ULONG offset, IN ULONG length)
#define RtlZeroMemory(Destination, Length)
#define IDX_AHCI_P_SControl
#define RtlCopyMemory(Destination, Source, Length)
struct _IDE_AHCI_REGISTERS IDE_AHCI_REGISTERS
#define IDE_COMMAND_ATAPI_PACKET
#define ATA_AHCI_P_IX_TFE
_In_ PCHAR _In_ ULONG DeviceNumber
#define UNIATA_AHCI_ALT_SIG
IN PSCSI_REQUEST_BLOCK Srb
#define IDX_AHCI_o_FeatureExp
union _ATA_REQ * PATA_REQ
BOOLEAN NTAPI UniAtaAhciValidateVersion(IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG version, IN BOOLEAN Strict)
#define SControl_DET_DoNothing
#define IDX_AHCI_P_SStatus
#define IDX_AHCI_o_CylinderLow
#define ATAPI_DEVICE(chan, dev)
struct _HW_LU_EXTENSION * lun[IDE_MAX_LUN_PER_CHAN]
UCHAR NTAPI UniataAhciSendPIOCommand(IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber, IN PSCSI_REQUEST_BLOCK Srb, IN PUCHAR data, IN ULONG length, IN UCHAR command, IN ULONGLONG lba, IN USHORT bcount, IN USHORT feature, IN USHORT ahci_flags, IN ULONG wait_flags, IN ULONG timeout)
#define AHCI_FIS_ALIGNEMENT_MASK
#define IDX_IO1_i_CylinderHigh
#define AHCI_CAP_NCS_MASK
__inline BOOLEAN UniataAhciChanImplemented(IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG c)
#define IDE_COMMAND_READ_PM