ReactOS 0.4.15-dev-7931-gfd331f1
uata_ctl.h
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1/*++
2
3Copyright (c) 2004-2005 Alexandr A. Telyatnikov (Alter)
4
5Module Name:
6 uata_ctl.h
7
8Abstract:
9 This header contains definitions for private UniATA SRB_IOCTL.
10
11Author:
12 Alexander A. Telyatnikov (Alter)
13
14Environment:
15 kernel mode only
16
17Notes:
18
19 THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29
30Revision History:
31
32Licence:
33 GPLv2
34
35--*/
36
37#ifndef __UNIATA_IO_CONTROL_CODES__H__
38#define __UNIATA_IO_CONTROL_CODES__H__
39
40//#include "scsi.h"
41
42#pragma pack(push, 8)
43
44#ifdef __cplusplus
45extern "C" {
46#endif //__cplusplus
47
48#define AHCI_MAX_PORT 32
49#define IDE_MAX_CHAN 16
50// Thanks to SATA Port Multipliers:
51#define IDE_MAX_LUN_PER_CHAN 2
52#define IDE_MAX_LUN (AHCI_MAX_PORT*IDE_MAX_LUN_PER_CHAN)
53
54#define MAX_QUEUE_STAT 8
55
56#define UNIATA_COMM_PORT_VENDOR_STR "UNIATA " "Management Port " UNIATA_VER_STR
57
58#ifndef UNIATA_CORE
59
60#define IOCTL_SCSI_MINIPORT_UNIATA_FIND_DEVICES ((FILE_DEVICE_SCSI << 16) + 0x09a0)
61#define IOCTL_SCSI_MINIPORT_UNIATA_DELETE_DEVICE ((FILE_DEVICE_SCSI << 16) + 0x09a1)
62#define IOCTL_SCSI_MINIPORT_UNIATA_SET_MAX_MODE ((FILE_DEVICE_SCSI << 16) + 0x09a2)
63#define IOCTL_SCSI_MINIPORT_UNIATA_GET_MODE ((FILE_DEVICE_SCSI << 16) + 0x09a3)
64#define IOCTL_SCSI_MINIPORT_UNIATA_ADAPTER_INFO ((FILE_DEVICE_SCSI << 16) + 0x09a4)
65//#define IOCTL_SCSI_MINIPORT_UNIATA_LUN_IDENT ((FILE_DEVICE_SCSI << 16) + 0x09a5) -> IOCTL_SCSI_MINIPORT_IDENTIFY
66#define IOCTL_SCSI_MINIPORT_UNIATA_RESETBB ((FILE_DEVICE_SCSI << 16) + 0x09a5)
67#define IOCTL_SCSI_MINIPORT_UNIATA_RESET_DEVICE ((FILE_DEVICE_SCSI << 16) + 0x09a6)
68#define IOCTL_SCSI_MINIPORT_UNIATA_REG_IO ((FILE_DEVICE_SCSI << 16) + 0x09a7)
69#define IOCTL_SCSI_MINIPORT_UNIATA_GET_VERSION ((FILE_DEVICE_SCSI << 16) + 0x09a8)
70
71typedef struct _ADDREMOVEDEV {
74
75#define UNIATA_REMOVE_FLAGS_HIDE 0x01
76#define UNIATA_ADD_FLAGS_UNHIDE 0x01
77
79
80typedef struct _SETTRANSFERMODE {
86
87typedef struct _GETTRANSFERMODE {
91 ULONG PhyMode; // since v0.42i6
93
94typedef struct _GETDRVVERSION {
102
103typedef struct _CHANINFO {
104 ULONG MaxTransferMode; // may differ from Controller's value due to 40-pin cable
111 LONGLONG TryReorderTailCount; /* in-order requests */
112// ULONG opt_MaxTransferMode; // user-specified
114
115typedef struct _ADAPTERINFO {
116 // Device identification
123
125
131
135
137
138 ULONG BusInterruptLevel; // Interrupt level
139 ULONG InterruptMode; // Interrupt Mode (Level or Edge)
141 // Number of channels being supported by one instantiation
142 // of the device extension. Normally (and correctly) one, but
143 // with so many broken PCI IDE controllers being sold, we have
144 // to support them.
147
148 UCHAR NumberLuns; // per channel
151
155
156 //CHANINFO Chan[0];
157
159
160#ifdef USER_MODE
161
162typedef enum _INTERFACE_TYPE {
164 Internal,
165 Isa,
166 Eisa,
169 PCIBus,
170 VMEBus,
171 NuBus,
172 PCMCIABus,
173 CBus,
174 MPIBus,
175 MPSABus,
178 PNPISABus,
181
182typedef struct _PCI_SLOT_NUMBER {
183 union {
184 struct {
187 ULONG Reserved:24;
188 } bits;
190 } u;
192
193#endif
194
195#ifndef ATA_FLAGS_DRDY_REQUIRED
196
197//The ATA_PASS_THROUGH_DIRECT structure is used in conjunction with an IOCTL_ATA_PASS_THROUGH_DIRECT request to instruct the port driver to send an embedded ATA command to the target device.
198
210 union {
213 };
214 union {
217 };
219
220#define ATA_FLAGS_DRDY_REQUIRED 0x01 // Wait for DRDY status from the device before sending the command to the device.
221#define ATA_FLAGS_DATA_OUT 0x02 // Write data to the device.
222#define ATA_FLAGS_DATA_IN 0x04 // Read data from the device.
223#define ATA_FLAGS_48BIT_COMMAND 0x08 // The ATA command to be send uses the 48 bit LBA feature set.
224 // When this flag is set, the contents of the PreviousTaskFile member in the
225 // ATA_PASS_THROUGH_DIRECT structure should be valid.
226#define ATA_FLAGS_USE_DMA 0x10 // Set the transfer mode to DMA.
227#define ATA_FLAGS_NO_MULTIPLE 0x20 // Read single sector only.
228
229#endif //ATA_FLAGS_DRDY_REQUIRED
230
231#pragma pack(pop)
232
233#pragma pack(push, 1)
234typedef struct _IDEREGS_EX {
235 union {
236 UCHAR bFeaturesReg; // Used for specifying SMART "commands" on input.
237 UCHAR bErrorReg; // Error on output.
238 };
239 UCHAR bSectorCountReg; // IDE sector count register
240 UCHAR bSectorNumberReg; // IDE sector number register
241 UCHAR bCylLowReg; // IDE low order cylinder value
242 UCHAR bCylHighReg; // IDE high order cylinder value
243 UCHAR bDriveHeadReg; // IDE drive/head register
244 union {
245 UCHAR bCommandReg; // Actual IDE command.
246 UCHAR bStatusReg; // Status register.
247 };
248 UCHAR bOpFlags; // 00 - send
249 // 01 - read regs
250 // 08 - lba48
251 // 10 - treat timeout as msec
252
253#define UNIATA_SPTI_EX_SND 0x00
254#define UNIATA_SPTI_EX_RCV 0x01
255#define UNIATA_SPTI_EX_LBA48 0x08
256//#define UNIATA_SPTI_EX_SPEC_TO 0x10
257//#define UNIATA_SPTI_EX_FREEZE_TO 0x20 // do not reset device on timeout and keep interrupts disabled
258#define UNIATA_SPTI_EX_USE_DMA 0x10 // Force DMA transfer mode
259
260// use 'invalid' combination to specify special TO options
261#define UNIATA_SPTI_EX_SPEC_TO (ATA_FLAGS_DATA_OUT | ATA_FLAGS_DATA_IN)
262
263 UCHAR bFeaturesRegH; // feature (high part for LBA48 mode)
264 UCHAR bSectorCountRegH; // IDE sector count register (high part for LBA48 mode)
265 UCHAR bSectorNumberRegH; // IDE sector number register (high part for LBA48 mode)
266 UCHAR bCylLowRegH; // IDE low order cylinder value (high part for LBA48 mode)
267 UCHAR bCylHighRegH; // IDE high order cylinder value (high part for LBA48 mode)
270
271typedef struct _UNIATA_REG_IO {
273 UCHAR RegSz:3; // 0=1, 1=2, 2=4, 3=1+1 (for lba48) 4=2+2 (for lba48)
274 UCHAR InOut:1; // 0=in, 1=out
277 union {
282 };
284
285typedef struct _UNIATA_REG_IO_HDR {
289
290#pragma pack(pop)
291
292#pragma pack(push, 1)
293
294typedef struct _UNIATA_CTL {
298 union {
304// IDENTIFY_DATA2 LunIdent;
305// ATA_PASS_THROUGH_DIRECT AtaDirect;
308 };
310
313 ULONG Filler; // realign buffers to double word boundary
315 UCHAR ucDataBuf[512]; // recommended minimum
317
320 ULONG Filler; // realign buffer to double word boundary
323
324#endif //UNIATA_CORE
325
326#ifdef __cplusplus
327};
328#endif //__cplusplus
329
330#pragma pack(pop)
331
332#endif //__UNIATA_IO_CONTROL_CODES__H__
unsigned char BOOLEAN
GLdouble GLdouble GLdouble r
Definition: gl.h:2055
enum _INTERFACE_TYPE * PINTERFACE_TYPE
_INTERFACE_TYPE
Definition: hwresource.cpp:135
@ Eisa
Definition: hwresource.cpp:139
@ VMEBus
Definition: hwresource.cpp:143
@ MaximumInterfaceType
Definition: hwresource.cpp:154
@ InterfaceTypeUndefined
Definition: hwresource.cpp:136
@ CBus
Definition: hwresource.cpp:146
@ TurboChannel
Definition: hwresource.cpp:141
@ PCIBus
Definition: hwresource.cpp:142
@ MPIBus
Definition: hwresource.cpp:147
@ InternalPowerBus
Definition: hwresource.cpp:150
@ MPSABus
Definition: hwresource.cpp:148
@ Internal
Definition: hwresource.cpp:137
@ NuBus
Definition: hwresource.cpp:144
@ MicroChannel
Definition: hwresource.cpp:140
@ PNPISABus
Definition: hwresource.cpp:151
@ ProcessorInternal
Definition: hwresource.cpp:149
@ Isa
Definition: hwresource.cpp:138
@ PCMCIABus
Definition: hwresource.cpp:145
enum _INTERFACE_TYPE INTERFACE_TYPE
unsigned short USHORT
Definition: pedump.c:61
ULONG Channel
Definition: uata_ctl.h:124
ULONG BusInterruptLevel
Definition: uata_ctl.h:138
ULONG DevID
Definition: uata_ctl.h:118
BOOLEAN ChanHeaderLengthValid
Definition: uata_ctl.h:150
ULONG LunHeaderLength
Definition: uata_ctl.h:154
ULONG MaxTransferMode
Definition: uata_ctl.h:132
UCHAR NumberLuns
Definition: uata_ctl.h:148
ULONG ChanHeaderLength
Definition: uata_ctl.h:153
ULONG NumberChannels
Definition: uata_ctl.h:145
ULONG RevID
Definition: uata_ctl.h:119
BOOLEAN MemIo
Definition: uata_ctl.h:128
ULONG InterruptMode
Definition: uata_ctl.h:139
BOOLEAN UnknownDev
Definition: uata_ctl.h:129
BOOLEAN MasterDev
Definition: uata_ctl.h:130
ULONG HwFlags
Definition: uata_ctl.h:133
BOOLEAN ChanInfoValid
Definition: uata_ctl.h:146
ULONG DevIndex
Definition: uata_ctl.h:122
ULONG HbaCtrlFlags
Definition: uata_ctl.h:126
ULONG slotNumber
Definition: uata_ctl.h:120
BOOLEAN LunInfoValid
Definition: uata_ctl.h:149
ULONG OrigAdapterInterfaceType
Definition: uata_ctl.h:134
ULONG AdapterInterfaceType
Definition: uata_ctl.h:152
ULONG SystemIoBusNumber
Definition: uata_ctl.h:121
BOOLEAN simplexOnly
Definition: uata_ctl.h:127
ULONG HeaderLength
Definition: uata_ctl.h:117
ULONG BusInterruptVector
Definition: uata_ctl.h:140
ULONG Flags
Definition: uata_ctl.h:73
ULONG WaitForPhysicalLink
Definition: uata_ctl.h:72
ULONG MaxTransferMode
Definition: uata_ctl.h:104
LONGLONG ReorderCount
Definition: uata_ctl.h:107
LONGLONG QueueStat[MAX_QUEUE_STAT]
Definition: uata_ctl.h:106
LONGLONG TryReorderHeadCount
Definition: uata_ctl.h:110
LONGLONG IntersectCount
Definition: uata_ctl.h:108
LONGLONG TryReorderTailCount
Definition: uata_ctl.h:111
LONGLONG TryReorderCount
Definition: uata_ctl.h:109
ULONG ChannelCtrlFlags
Definition: uata_ctl.h:105
ULONG Reserved
Definition: uata_ctl.h:100
USHORT VersionMj
Definition: uata_ctl.h:96
USHORT SubVerMn
Definition: uata_ctl.h:99
USHORT SubVerMj
Definition: uata_ctl.h:98
USHORT VersionMn
Definition: uata_ctl.h:97
ULONG Length
Definition: uata_ctl.h:95
ULONG OrigMode
Definition: uata_ctl.h:89
ULONG CurrentMode
Definition: uata_ctl.h:90
UCHAR bFeaturesReg
Definition: uata_ctl.h:236
UCHAR bReserved2
Definition: uata_ctl.h:268
UCHAR bOpFlags
Definition: uata_ctl.h:248
UCHAR bStatusReg
Definition: uata_ctl.h:246
UCHAR bCylLowRegH
Definition: uata_ctl.h:266
UCHAR bDriveHeadReg
Definition: uata_ctl.h:243
UCHAR bSectorNumberRegH
Definition: uata_ctl.h:265
UCHAR bErrorReg
Definition: uata_ctl.h:237
UCHAR bFeaturesRegH
Definition: uata_ctl.h:263
UCHAR bCommandReg
Definition: uata_ctl.h:245
UCHAR bSectorCountReg
Definition: uata_ctl.h:239
UCHAR bSectorNumberReg
Definition: uata_ctl.h:240
UCHAR bCylHighRegH
Definition: uata_ctl.h:267
UCHAR bCylHighReg
Definition: uata_ctl.h:242
UCHAR bSectorCountRegH
Definition: uata_ctl.h:264
UCHAR bCylLowReg
Definition: uata_ctl.h:241
Definition: helper.h:8
ULONG FunctionNumber
Definition: iotypes.h:3493
union _PCI_SLOT_NUMBER::@4022 u
struct _PCI_SLOT_NUMBER::@4022::@4023 bits
ULONG DeviceNumber
Definition: iotypes.h:3492
SCSI_PASS_THROUGH_DIRECT sptd
Definition: uata_ctl.h:319
BOOLEAN ApplyImmediately
Definition: uata_ctl.h:83
ULONG OrigMode
Definition: uata_ctl.h:82
UCHAR RawData[1]
Definition: uata_ctl.h:299
SCSI_ADDRESS addr
Definition: uata_ctl.h:296
ADDREMOVEDEV FindDelDev
Definition: uata_ctl.h:300
UNIATA_REG_IO_HDR RegIo
Definition: uata_ctl.h:307
SRB_IO_CONTROL hdr
Definition: uata_ctl.h:295
GETDRVVERSION Version
Definition: uata_ctl.h:306
ULONG Reserved
Definition: uata_ctl.h:297
ADAPTERINFO AdapterInfo
Definition: uata_ctl.h:303
SETTRANSFERMODE SetMode
Definition: uata_ctl.h:301
GETTRANSFERMODE GetMode
Definition: uata_ctl.h:302
USHORT d16[2]
Definition: uata_ctl.h:280
UCHAR Reserved1
Definition: uata_ctl.h:276
USHORT d8[2]
Definition: uata_ctl.h:281
UCHAR Reserved
Definition: uata_ctl.h:275
USHORT RegIDX
Definition: uata_ctl.h:272
int64_t LONGLONG
Definition: typedefs.h:68
uint32_t ULONG
Definition: typedefs.h:59
struct _CHANINFO CHANINFO
struct _ATA_PASS_THROUGH_DIRECT ATA_PASS_THROUGH_DIRECT
struct _IDEREGS_EX IDEREGS_EX
struct _ADAPTERINFO ADAPTERINFO
struct _IDEREGS_EX * LPIDEREGS_EX
struct _UNIATA_CTL UNIATA_CTL
struct _ATA_PASS_THROUGH_DIRECT * PATA_PASS_THROUGH_DIRECT
struct _GETTRANSFERMODE * PGETTRANSFERMODE
struct _UNIATA_CTL * PUNIATA_CTL
struct _GETTRANSFERMODE GETTRANSFERMODE
struct _UNIATA_REG_IO_HDR UNIATA_REG_IO_HDR
struct _UNIATA_REG_IO_HDR * PUNIATA_REG_IO_HDR
struct _IDEREGS_EX * PIDEREGS_EX
struct _CHANINFO * PCHANINFO
struct _SETTRANSFERMODE * PSETTRANSFERMODE
struct _SCSI_PASS_THROUGH_DIRECT_WITH_BUFFER SCSI_PASS_THROUGH_DIRECT_WITH_BUFFER
struct _SCSI_PASS_THROUGH_WITH_BUFFERS SCSI_PASS_THROUGH_WITH_BUFFERS
struct _ADDREMOVEDEV * PADDREMOVEDEV
struct _ADDREMOVEDEV ADDREMOVEDEV
struct _SCSI_PASS_THROUGH_WITH_BUFFERS * PSCSI_PASS_THROUGH_WITH_BUFFERS
struct _ADAPTERINFO * PADAPTERINFO
struct _UNIATA_REG_IO UNIATA_REG_IO
struct _GETDRVVERSION * PGETDRVVERSION
struct _SETTRANSFERMODE SETTRANSFERMODE
struct _GETDRVVERSION GETDRVVERSION
#define MAX_QUEUE_STAT
Definition: uata_ctl.h:54
struct _UNIATA_REG_IO * PUNIATA_REG_IO
struct _SCSI_PASS_THROUGH_DIRECT_WITH_BUFFER * PSCSI_PASS_THROUGH_DIRECT_WITH_BUFFER
_Must_inspect_result_ _In_ PWDFDEVICE_INIT _In_opt_ PCUNICODE_STRING DeviceName
Definition: wdfdevice.h:3275
_Reserved_ PVOID Reserved
Definition: winddi.h:3974
struct _PCI_SLOT_NUMBER * PPCI_SLOT_NUMBER
struct _PCI_SLOT_NUMBER PCI_SLOT_NUMBER
unsigned char UCHAR
Definition: xmlstorage.h:181
char CHAR
Definition: xmlstorage.h:175