ReactOS 0.4.17-dev-934-g091855f
Classes | Macros | Enumerations | Functions | Variables
tpf.c File Reference
#include "hlsl.h"
#include "vkd3d_shader_private.h"
#include "d3dcommon.h"
Include dependency graph for tpf.c:

Go to the source code of this file.

Classes

struct  vkd3d_sm4_stat_field_info
 
struct  sm4_index_range
 
struct  sm4_index_range_array
 
struct  vkd3d_sm4_lookup_tables
 
struct  vkd3d_shader_sm4_parser
 
struct  vkd3d_sm4_opcode_info
 
struct  vkd3d_sm4_register_type_info
 
struct  sm4_stat
 
struct  tpf_compiler
 
struct  extern_resource
 
struct  sm4_instruction_modifier
 
struct  sm4_instruction
 

Macros

#define SM4_MAX_SRC_COUNT   6
 
#define SM4_MAX_DST_COUNT   2
 
#define VKD3D_SM4_PS   0x0000u
 
#define VKD3D_SM4_VS   0x0001u
 
#define VKD3D_SM4_GS   0x0002u
 
#define VKD3D_SM5_HS   0x0003u
 
#define VKD3D_SM5_DS   0x0004u
 
#define VKD3D_SM5_CS   0x0005u
 
#define VKD3D_SM4_LIB   0xfff0u
 
#define VKD3D_SM4_INSTRUCTION_MODIFIER   (0x1u << 31)
 
#define VKD3D_SM4_MODIFIER_MASK   0x3fu
 
#define VKD3D_SM5_MODIFIER_DATA_TYPE_SHIFT   6
 
#define VKD3D_SM5_MODIFIER_DATA_TYPE_MASK   (0xffffu << VKD3D_SM5_MODIFIER_DATA_TYPE_SHIFT)
 
#define VKD3D_SM5_MODIFIER_RESOURCE_TYPE_SHIFT   6
 
#define VKD3D_SM5_MODIFIER_RESOURCE_TYPE_MASK   (0xfu << VKD3D_SM5_MODIFIER_RESOURCE_TYPE_SHIFT)
 
#define VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_SHIFT   11
 
#define VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_MASK   (0xfffu << VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_SHIFT)
 
#define VKD3D_SM4_AOFFIMMI_U_SHIFT   9
 
#define VKD3D_SM4_AOFFIMMI_U_MASK   (0xfu << VKD3D_SM4_AOFFIMMI_U_SHIFT)
 
#define VKD3D_SM4_AOFFIMMI_V_SHIFT   13
 
#define VKD3D_SM4_AOFFIMMI_V_MASK   (0xfu << VKD3D_SM4_AOFFIMMI_V_SHIFT)
 
#define VKD3D_SM4_AOFFIMMI_W_SHIFT   17
 
#define VKD3D_SM4_AOFFIMMI_W_MASK   (0xfu << VKD3D_SM4_AOFFIMMI_W_SHIFT)
 
#define VKD3D_SM4_INSTRUCTION_LENGTH_SHIFT   24
 
#define VKD3D_SM4_INSTRUCTION_LENGTH_MASK   (0x1fu << VKD3D_SM4_INSTRUCTION_LENGTH_SHIFT)
 
#define VKD3D_SM4_INSTRUCTION_FLAGS_SHIFT   11
 
#define VKD3D_SM4_INSTRUCTION_FLAGS_MASK   (0x7u << VKD3D_SM4_INSTRUCTION_FLAGS_SHIFT)
 
#define VKD3D_SM4_RESOURCE_TYPE_SHIFT   11
 
#define VKD3D_SM4_RESOURCE_TYPE_MASK   (0xfu << VKD3D_SM4_RESOURCE_TYPE_SHIFT)
 
#define VKD3D_SM4_RESOURCE_SAMPLE_COUNT_SHIFT   16
 
#define VKD3D_SM4_RESOURCE_SAMPLE_COUNT_MASK   (0xfu << VKD3D_SM4_RESOURCE_SAMPLE_COUNT_SHIFT)
 
#define VKD3D_SM4_PRIMITIVE_TYPE_SHIFT   11
 
#define VKD3D_SM4_PRIMITIVE_TYPE_MASK   (0x3fu << VKD3D_SM4_PRIMITIVE_TYPE_SHIFT)
 
#define VKD3D_SM4_INDEX_TYPE_SHIFT   11
 
#define VKD3D_SM4_INDEX_TYPE_MASK   (0x1u << VKD3D_SM4_INDEX_TYPE_SHIFT)
 
#define VKD3D_SM4_SAMPLER_MODE_SHIFT   11
 
#define VKD3D_SM4_SAMPLER_MODE_MASK   (0xfu << VKD3D_SM4_SAMPLER_MODE_SHIFT)
 
#define VKD3D_SM4_SHADER_DATA_TYPE_SHIFT   11
 
#define VKD3D_SM4_SHADER_DATA_TYPE_MASK   (0xfu << VKD3D_SM4_SHADER_DATA_TYPE_SHIFT)
 
#define VKD3D_SM4_INTERPOLATION_MODE_SHIFT   11
 
#define VKD3D_SM4_INTERPOLATION_MODE_MASK   (0xfu << VKD3D_SM4_INTERPOLATION_MODE_SHIFT)
 
#define VKD3D_SM4_GLOBAL_FLAGS_SHIFT   11
 
#define VKD3D_SM4_GLOBAL_FLAGS_MASK   (0xffu << VKD3D_SM4_GLOBAL_FLAGS_SHIFT)
 
#define VKD3D_SM5_PRECISE_SHIFT   19
 
#define VKD3D_SM5_PRECISE_MASK   (0xfu << VKD3D_SM5_PRECISE_SHIFT)
 
#define VKD3D_SM5_CONTROL_POINT_COUNT_SHIFT   11
 
#define VKD3D_SM5_CONTROL_POINT_COUNT_MASK   (0xffu << VKD3D_SM5_CONTROL_POINT_COUNT_SHIFT)
 
#define VKD3D_SM5_FP_ARRAY_SIZE_SHIFT   16
 
#define VKD3D_SM5_FP_TABLE_COUNT_MASK   0xffffu
 
#define VKD3D_SM5_UAV_FLAGS_SHIFT   15
 
#define VKD3D_SM5_UAV_FLAGS_MASK   (0x1ffu << VKD3D_SM5_UAV_FLAGS_SHIFT)
 
#define VKD3D_SM5_SYNC_FLAGS_SHIFT   11
 
#define VKD3D_SM5_SYNC_FLAGS_MASK   (0xffu << VKD3D_SM5_SYNC_FLAGS_SHIFT)
 
#define VKD3D_SM5_TESSELLATOR_SHIFT   11
 
#define VKD3D_SM5_TESSELLATOR_MASK   (0xfu << VKD3D_SM5_TESSELLATOR_SHIFT)
 
#define VKD3D_SM4_OPCODE_MASK   0xff
 
#define VKD3D_SM4_EXTENDED_OPERAND   (0x1u << 31)
 
#define VKD3D_SM4_EXTENDED_OPERAND_TYPE_MASK   0x3fu
 
#define VKD3D_SM4_REGISTER_MODIFIER_SHIFT   6
 
#define VKD3D_SM4_REGISTER_MODIFIER_MASK   (0xffu << VKD3D_SM4_REGISTER_MODIFIER_SHIFT)
 
#define VKD3D_SM4_REGISTER_PRECISION_SHIFT   14
 
#define VKD3D_SM4_REGISTER_PRECISION_MASK   (0x7u << VKD3D_SM4_REGISTER_PRECISION_SHIFT)
 
#define VKD3D_SM4_REGISTER_NON_UNIFORM_SHIFT   17
 
#define VKD3D_SM4_REGISTER_NON_UNIFORM_MASK   (0x1u << VKD3D_SM4_REGISTER_NON_UNIFORM_SHIFT)
 
#define VKD3D_SM4_ADDRESSING_SHIFT2   28
 
#define VKD3D_SM4_ADDRESSING_MASK2   (0x3u << VKD3D_SM4_ADDRESSING_SHIFT2)
 
#define VKD3D_SM4_ADDRESSING_SHIFT1   25
 
#define VKD3D_SM4_ADDRESSING_MASK1   (0x3u << VKD3D_SM4_ADDRESSING_SHIFT1)
 
#define VKD3D_SM4_ADDRESSING_SHIFT0   22
 
#define VKD3D_SM4_ADDRESSING_MASK0   (0x3u << VKD3D_SM4_ADDRESSING_SHIFT0)
 
#define VKD3D_SM4_REGISTER_ORDER_SHIFT   20
 
#define VKD3D_SM4_REGISTER_ORDER_MASK   (0x3u << VKD3D_SM4_REGISTER_ORDER_SHIFT)
 
#define VKD3D_SM4_REGISTER_TYPE_SHIFT   12
 
#define VKD3D_SM4_REGISTER_TYPE_MASK   (0xffu << VKD3D_SM4_REGISTER_TYPE_SHIFT)
 
#define VKD3D_SM4_SWIZZLE_TYPE_SHIFT   2
 
#define VKD3D_SM4_SWIZZLE_TYPE_MASK   (0x3u << VKD3D_SM4_SWIZZLE_TYPE_SHIFT)
 
#define VKD3D_SM4_DIMENSION_SHIFT   0
 
#define VKD3D_SM4_DIMENSION_MASK   (0x3u << VKD3D_SM4_DIMENSION_SHIFT)
 
#define VKD3D_SM4_WRITEMASK_SHIFT   4
 
#define VKD3D_SM4_WRITEMASK_MASK   (0xfu << VKD3D_SM4_WRITEMASK_SHIFT)
 
#define VKD3D_SM4_SWIZZLE_SHIFT   4
 
#define VKD3D_SM4_SWIZZLE_MASK   (0xffu << VKD3D_SM4_SWIZZLE_SHIFT)
 
#define VKD3D_SM4_SCALAR_DIM_SHIFT   4
 
#define VKD3D_SM4_SCALAR_DIM_MASK   (0x3u << VKD3D_SM4_SCALAR_DIM_SHIFT)
 
#define VKD3D_SM4_VERSION_MAJOR(version)   (((version) >> 4) & 0xf)
 
#define VKD3D_SM4_VERSION_MINOR(version)   (((version) >> 0) & 0xf)
 
#define VKD3D_SM4_ADDRESSING_RELATIVE   0x2
 
#define VKD3D_SM4_ADDRESSING_OFFSET   0x1
 
#define VKD3D_SM4_INSTRUCTION_FLAG_SATURATE   0x4
 
#define VKD3D_SM4_CONDITIONAL_NZ   (0x1u << 18)
 
#define VKD3D_SM4_TYPE_COMPONENT(com, i)   (((com) >> (4 * (i))) & 0xfu)
 
#define VKD3D_SM4_SIF_TEXTURE_COMPONENTS_SHIFT   2
 
#define VKD3D_SM4_REQUIRES_DOUBLES   0x00000001
 
#define VKD3D_SM4_REQUIRES_EARLY_DEPTH_STENCIL   0x00000002
 
#define VKD3D_SM4_REQUIRES_UAVS_AT_EVERY_STAGE   0x00000004
 
#define VKD3D_SM4_REQUIRES_64_UAVS   0x00000008
 
#define VKD3D_SM4_REQUIRES_MINIMUM_PRECISION   0x00000010
 
#define VKD3D_SM4_REQUIRES_11_1_DOUBLE_EXTENSIONS   0x00000020
 
#define VKD3D_SM4_REQUIRES_11_1_SHADER_EXTENSIONS   0x00000040
 
#define VKD3D_SM4_REQUIRES_LEVEL_9_COMPARISON_FILTERING   0x00000080
 
#define VKD3D_SM4_REQUIRES_TILED_RESOURCES   0x00000100
 
#define VKD3D_SM4_REQUIRES_STENCIL_REF   0x00000200
 
#define VKD3D_SM4_REQUIRES_INNER_COVERAGE   0x00000400
 
#define VKD3D_SM4_REQUIRES_TYPED_UAV_LOAD_ADDITIONAL_FORMATS   0x00000800
 
#define VKD3D_SM4_REQUIRES_ROVS   0x00001000
 
#define VKD3D_SM4_REQUIRES_VIEWPORT_AND_RT_ARRAY_INDEX_FROM_ANY_SHADER_FEEDING_RASTERIZER   0x00002000
 

Enumerations

enum  vkd3d_sm4_opcode {
  VKD3D_SM4_OP_ADD = 0x00 , VKD3D_SM4_OP_AND = 0x01 , VKD3D_SM4_OP_BREAK = 0x02 , VKD3D_SM4_OP_BREAKC = 0x03 ,
  VKD3D_SM4_OP_CASE = 0x06 , VKD3D_SM4_OP_CONTINUE = 0x07 , VKD3D_SM4_OP_CONTINUEC = 0x08 , VKD3D_SM4_OP_CUT = 0x09 ,
  VKD3D_SM4_OP_DEFAULT = 0x0a , VKD3D_SM4_OP_DERIV_RTX = 0x0b , VKD3D_SM4_OP_DERIV_RTY = 0x0c , VKD3D_SM4_OP_DISCARD = 0x0d ,
  VKD3D_SM4_OP_DIV = 0x0e , VKD3D_SM4_OP_DP2 = 0x0f , VKD3D_SM4_OP_DP3 = 0x10 , VKD3D_SM4_OP_DP4 = 0x11 ,
  VKD3D_SM4_OP_ELSE = 0x12 , VKD3D_SM4_OP_EMIT = 0x13 , VKD3D_SM4_OP_ENDIF = 0x15 , VKD3D_SM4_OP_ENDLOOP = 0x16 ,
  VKD3D_SM4_OP_ENDSWITCH = 0x17 , VKD3D_SM4_OP_EQ = 0x18 , VKD3D_SM4_OP_EXP = 0x19 , VKD3D_SM4_OP_FRC = 0x1a ,
  VKD3D_SM4_OP_FTOI = 0x1b , VKD3D_SM4_OP_FTOU = 0x1c , VKD3D_SM4_OP_GE = 0x1d , VKD3D_SM4_OP_IADD = 0x1e ,
  VKD3D_SM4_OP_IF = 0x1f , VKD3D_SM4_OP_IEQ = 0x20 , VKD3D_SM4_OP_IGE = 0x21 , VKD3D_SM4_OP_ILT = 0x22 ,
  VKD3D_SM4_OP_IMAD = 0x23 , VKD3D_SM4_OP_IMAX = 0x24 , VKD3D_SM4_OP_IMIN = 0x25 , VKD3D_SM4_OP_IMUL = 0x26 ,
  VKD3D_SM4_OP_INE = 0x27 , VKD3D_SM4_OP_INEG = 0x28 , VKD3D_SM4_OP_ISHL = 0x29 , VKD3D_SM4_OP_ISHR = 0x2a ,
  VKD3D_SM4_OP_ITOF = 0x2b , VKD3D_SM4_OP_LABEL = 0x2c , VKD3D_SM4_OP_LD = 0x2d , VKD3D_SM4_OP_LD2DMS = 0x2e ,
  VKD3D_SM4_OP_LOG = 0x2f , VKD3D_SM4_OP_LOOP = 0x30 , VKD3D_SM4_OP_LT = 0x31 , VKD3D_SM4_OP_MAD = 0x32 ,
  VKD3D_SM4_OP_MIN = 0x33 , VKD3D_SM4_OP_MAX = 0x34 , VKD3D_SM4_OP_SHADER_DATA = 0x35 , VKD3D_SM4_OP_MOV = 0x36 ,
  VKD3D_SM4_OP_MOVC = 0x37 , VKD3D_SM4_OP_MUL = 0x38 , VKD3D_SM4_OP_NE = 0x39 , VKD3D_SM4_OP_NOP = 0x3a ,
  VKD3D_SM4_OP_NOT = 0x3b , VKD3D_SM4_OP_OR = 0x3c , VKD3D_SM4_OP_RESINFO = 0x3d , VKD3D_SM4_OP_RET = 0x3e ,
  VKD3D_SM4_OP_RETC = 0x3f , VKD3D_SM4_OP_ROUND_NE = 0x40 , VKD3D_SM4_OP_ROUND_NI = 0x41 , VKD3D_SM4_OP_ROUND_PI = 0x42 ,
  VKD3D_SM4_OP_ROUND_Z = 0x43 , VKD3D_SM4_OP_RSQ = 0x44 , VKD3D_SM4_OP_SAMPLE = 0x45 , VKD3D_SM4_OP_SAMPLE_C = 0x46 ,
  VKD3D_SM4_OP_SAMPLE_C_LZ = 0x47 , VKD3D_SM4_OP_SAMPLE_LOD = 0x48 , VKD3D_SM4_OP_SAMPLE_GRAD = 0x49 , VKD3D_SM4_OP_SAMPLE_B = 0x4a ,
  VKD3D_SM4_OP_SQRT = 0x4b , VKD3D_SM4_OP_SWITCH = 0x4c , VKD3D_SM4_OP_SINCOS = 0x4d , VKD3D_SM4_OP_UDIV = 0x4e ,
  VKD3D_SM4_OP_ULT = 0x4f , VKD3D_SM4_OP_UGE = 0x50 , VKD3D_SM4_OP_UMUL = 0x51 , VKD3D_SM4_OP_UMAX = 0x53 ,
  VKD3D_SM4_OP_UMIN = 0x54 , VKD3D_SM4_OP_USHR = 0x55 , VKD3D_SM4_OP_UTOF = 0x56 , VKD3D_SM4_OP_XOR = 0x57 ,
  VKD3D_SM4_OP_DCL_RESOURCE = 0x58 , VKD3D_SM4_OP_DCL_CONSTANT_BUFFER = 0x59 , VKD3D_SM4_OP_DCL_SAMPLER = 0x5a , VKD3D_SM4_OP_DCL_INDEX_RANGE = 0x5b ,
  VKD3D_SM4_OP_DCL_OUTPUT_TOPOLOGY = 0x5c , VKD3D_SM4_OP_DCL_INPUT_PRIMITIVE = 0x5d , VKD3D_SM4_OP_DCL_VERTICES_OUT = 0x5e , VKD3D_SM4_OP_DCL_INPUT = 0x5f ,
  VKD3D_SM4_OP_DCL_INPUT_SGV = 0x60 , VKD3D_SM4_OP_DCL_INPUT_SIV = 0x61 , VKD3D_SM4_OP_DCL_INPUT_PS = 0x62 , VKD3D_SM4_OP_DCL_INPUT_PS_SGV = 0x63 ,
  VKD3D_SM4_OP_DCL_INPUT_PS_SIV = 0x64 , VKD3D_SM4_OP_DCL_OUTPUT = 0x65 , VKD3D_SM4_OP_DCL_OUTPUT_SIV = 0x67 , VKD3D_SM4_OP_DCL_TEMPS = 0x68 ,
  VKD3D_SM4_OP_DCL_INDEXABLE_TEMP = 0x69 , VKD3D_SM4_OP_DCL_GLOBAL_FLAGS = 0x6a , VKD3D_SM4_OP_LOD = 0x6c , VKD3D_SM4_OP_GATHER4 = 0x6d ,
  VKD3D_SM4_OP_SAMPLE_POS = 0x6e , VKD3D_SM4_OP_SAMPLE_INFO = 0x6f , VKD3D_SM5_OP_HS_DECLS = 0x71 , VKD3D_SM5_OP_HS_CONTROL_POINT_PHASE = 0x72 ,
  VKD3D_SM5_OP_HS_FORK_PHASE = 0x73 , VKD3D_SM5_OP_HS_JOIN_PHASE = 0x74 , VKD3D_SM5_OP_EMIT_STREAM = 0x75 , VKD3D_SM5_OP_CUT_STREAM = 0x76 ,
  VKD3D_SM5_OP_FCALL = 0x78 , VKD3D_SM5_OP_BUFINFO = 0x79 , VKD3D_SM5_OP_DERIV_RTX_COARSE = 0x7a , VKD3D_SM5_OP_DERIV_RTX_FINE = 0x7b ,
  VKD3D_SM5_OP_DERIV_RTY_COARSE = 0x7c , VKD3D_SM5_OP_DERIV_RTY_FINE = 0x7d , VKD3D_SM5_OP_GATHER4_C = 0x7e , VKD3D_SM5_OP_GATHER4_PO = 0x7f ,
  VKD3D_SM5_OP_GATHER4_PO_C = 0x80 , VKD3D_SM5_OP_RCP = 0x81 , VKD3D_SM5_OP_F32TOF16 = 0x82 , VKD3D_SM5_OP_F16TOF32 = 0x83 ,
  VKD3D_SM5_OP_COUNTBITS = 0x86 , VKD3D_SM5_OP_FIRSTBIT_HI = 0x87 , VKD3D_SM5_OP_FIRSTBIT_LO = 0x88 , VKD3D_SM5_OP_FIRSTBIT_SHI = 0x89 ,
  VKD3D_SM5_OP_UBFE = 0x8a , VKD3D_SM5_OP_IBFE = 0x8b , VKD3D_SM5_OP_BFI = 0x8c , VKD3D_SM5_OP_BFREV = 0x8d ,
  VKD3D_SM5_OP_SWAPC = 0x8e , VKD3D_SM5_OP_DCL_STREAM = 0x8f , VKD3D_SM5_OP_DCL_FUNCTION_BODY = 0x90 , VKD3D_SM5_OP_DCL_FUNCTION_TABLE = 0x91 ,
  VKD3D_SM5_OP_DCL_INTERFACE = 0x92 , VKD3D_SM5_OP_DCL_INPUT_CONTROL_POINT_COUNT = 0x93 , VKD3D_SM5_OP_DCL_OUTPUT_CONTROL_POINT_COUNT = 0x94 , VKD3D_SM5_OP_DCL_TESSELLATOR_DOMAIN = 0x95 ,
  VKD3D_SM5_OP_DCL_TESSELLATOR_PARTITIONING = 0x96 , VKD3D_SM5_OP_DCL_TESSELLATOR_OUTPUT_PRIMITIVE = 0x97 , VKD3D_SM5_OP_DCL_HS_MAX_TESSFACTOR = 0x98 , VKD3D_SM5_OP_DCL_HS_FORK_PHASE_INSTANCE_COUNT = 0x99 ,
  VKD3D_SM5_OP_DCL_HS_JOIN_PHASE_INSTANCE_COUNT = 0x9a , VKD3D_SM5_OP_DCL_THREAD_GROUP = 0x9b , VKD3D_SM5_OP_DCL_UAV_TYPED = 0x9c , VKD3D_SM5_OP_DCL_UAV_RAW = 0x9d ,
  VKD3D_SM5_OP_DCL_UAV_STRUCTURED = 0x9e , VKD3D_SM5_OP_DCL_TGSM_RAW = 0x9f , VKD3D_SM5_OP_DCL_TGSM_STRUCTURED = 0xa0 , VKD3D_SM5_OP_DCL_RESOURCE_RAW = 0xa1 ,
  VKD3D_SM5_OP_DCL_RESOURCE_STRUCTURED = 0xa2 , VKD3D_SM5_OP_LD_UAV_TYPED = 0xa3 , VKD3D_SM5_OP_STORE_UAV_TYPED = 0xa4 , VKD3D_SM5_OP_LD_RAW = 0xa5 ,
  VKD3D_SM5_OP_STORE_RAW = 0xa6 , VKD3D_SM5_OP_LD_STRUCTURED = 0xa7 , VKD3D_SM5_OP_STORE_STRUCTURED = 0xa8 , VKD3D_SM5_OP_ATOMIC_AND = 0xa9 ,
  VKD3D_SM5_OP_ATOMIC_OR = 0xaa , VKD3D_SM5_OP_ATOMIC_XOR = 0xab , VKD3D_SM5_OP_ATOMIC_CMP_STORE = 0xac , VKD3D_SM5_OP_ATOMIC_IADD = 0xad ,
  VKD3D_SM5_OP_ATOMIC_IMAX = 0xae , VKD3D_SM5_OP_ATOMIC_IMIN = 0xaf , VKD3D_SM5_OP_ATOMIC_UMAX = 0xb0 , VKD3D_SM5_OP_ATOMIC_UMIN = 0xb1 ,
  VKD3D_SM5_OP_IMM_ATOMIC_ALLOC = 0xb2 , VKD3D_SM5_OP_IMM_ATOMIC_CONSUME = 0xb3 , VKD3D_SM5_OP_IMM_ATOMIC_IADD = 0xb4 , VKD3D_SM5_OP_IMM_ATOMIC_AND = 0xb5 ,
  VKD3D_SM5_OP_IMM_ATOMIC_OR = 0xb6 , VKD3D_SM5_OP_IMM_ATOMIC_XOR = 0xb7 , VKD3D_SM5_OP_IMM_ATOMIC_EXCH = 0xb8 , VKD3D_SM5_OP_IMM_ATOMIC_CMP_EXCH = 0xb9 ,
  VKD3D_SM5_OP_IMM_ATOMIC_IMAX = 0xba , VKD3D_SM5_OP_IMM_ATOMIC_IMIN = 0xbb , VKD3D_SM5_OP_IMM_ATOMIC_UMAX = 0xbc , VKD3D_SM5_OP_IMM_ATOMIC_UMIN = 0xbd ,
  VKD3D_SM5_OP_SYNC = 0xbe , VKD3D_SM5_OP_DADD = 0xbf , VKD3D_SM5_OP_DMAX = 0xc0 , VKD3D_SM5_OP_DMIN = 0xc1 ,
  VKD3D_SM5_OP_DMUL = 0xc2 , VKD3D_SM5_OP_DEQ = 0xc3 , VKD3D_SM5_OP_DGE = 0xc4 , VKD3D_SM5_OP_DLT = 0xc5 ,
  VKD3D_SM5_OP_DNE = 0xc6 , VKD3D_SM5_OP_DMOV = 0xc7 , VKD3D_SM5_OP_DMOVC = 0xc8 , VKD3D_SM5_OP_DTOF = 0xc9 ,
  VKD3D_SM5_OP_FTOD = 0xca , VKD3D_SM5_OP_EVAL_SAMPLE_INDEX = 0xcc , VKD3D_SM5_OP_EVAL_CENTROID = 0xcd , VKD3D_SM5_OP_DCL_GS_INSTANCES = 0xce ,
  VKD3D_SM5_OP_DDIV = 0xd2 , VKD3D_SM5_OP_DFMA = 0xd3 , VKD3D_SM5_OP_DRCP = 0xd4 , VKD3D_SM5_OP_MSAD = 0xd5 ,
  VKD3D_SM5_OP_DTOI = 0xd6 , VKD3D_SM5_OP_DTOU = 0xd7 , VKD3D_SM5_OP_ITOD = 0xd8 , VKD3D_SM5_OP_UTOD = 0xd9 ,
  VKD3D_SM5_OP_GATHER4_S = 0xdb , VKD3D_SM5_OP_GATHER4_C_S = 0xdc , VKD3D_SM5_OP_GATHER4_PO_S = 0xdd , VKD3D_SM5_OP_GATHER4_PO_C_S = 0xde ,
  VKD3D_SM5_OP_LD_S = 0xdf , VKD3D_SM5_OP_LD2DMS_S = 0xe0 , VKD3D_SM5_OP_LD_UAV_TYPED_S = 0xe1 , VKD3D_SM5_OP_LD_RAW_S = 0xe2 ,
  VKD3D_SM5_OP_LD_STRUCTURED_S = 0xe3 , VKD3D_SM5_OP_SAMPLE_LOD_S = 0xe4 , VKD3D_SM5_OP_SAMPLE_C_LZ_S = 0xe5 , VKD3D_SM5_OP_SAMPLE_CL_S = 0xe6 ,
  VKD3D_SM5_OP_SAMPLE_B_CL_S = 0xe7 , VKD3D_SM5_OP_SAMPLE_GRAD_CL_S = 0xe8 , VKD3D_SM5_OP_SAMPLE_C_CL_S = 0xe9 , VKD3D_SM5_OP_CHECK_ACCESS_FULLY_MAPPED = 0xea ,
  VKD3D_SM4_OP_COUNT
}
 
enum  vkd3d_sm4_instruction_modifier { VKD3D_SM4_MODIFIER_AOFFIMMI = 0x1 , VKD3D_SM5_MODIFIER_RESOURCE_TYPE = 0x2 , VKD3D_SM5_MODIFIER_DATA_TYPE = 0x3 }
 
enum  vkd3d_sm4_register_type {
  VKD3D_SM4_RT_TEMP = 0x00 , VKD3D_SM4_RT_INPUT = 0x01 , VKD3D_SM4_RT_OUTPUT = 0x02 , VKD3D_SM4_RT_INDEXABLE_TEMP = 0x03 ,
  VKD3D_SM4_RT_IMMCONST = 0x04 , VKD3D_SM4_RT_IMMCONST64 = 0x05 , VKD3D_SM4_RT_SAMPLER = 0x06 , VKD3D_SM4_RT_RESOURCE = 0x07 ,
  VKD3D_SM4_RT_CONSTBUFFER = 0x08 , VKD3D_SM4_RT_IMMCONSTBUFFER = 0x09 , VKD3D_SM4_RT_PRIMID = 0x0b , VKD3D_SM4_RT_DEPTHOUT = 0x0c ,
  VKD3D_SM4_RT_NULL = 0x0d , VKD3D_SM4_RT_RASTERIZER = 0x0e , VKD3D_SM4_RT_OMASK = 0x0f , VKD3D_SM5_RT_STREAM = 0x10 ,
  VKD3D_SM5_RT_FUNCTION_BODY = 0x11 , VKD3D_SM5_RT_FUNCTION_POINTER = 0x13 , VKD3D_SM5_RT_OUTPUT_CONTROL_POINT_ID = 0x16 , VKD3D_SM5_RT_FORK_INSTANCE_ID = 0x17 ,
  VKD3D_SM5_RT_JOIN_INSTANCE_ID = 0x18 , VKD3D_SM5_RT_INPUT_CONTROL_POINT = 0x19 , VKD3D_SM5_RT_OUTPUT_CONTROL_POINT = 0x1a , VKD3D_SM5_RT_PATCH_CONSTANT_DATA = 0x1b ,
  VKD3D_SM5_RT_DOMAIN_LOCATION = 0x1c , VKD3D_SM5_RT_UAV = 0x1e , VKD3D_SM5_RT_SHARED_MEMORY = 0x1f , VKD3D_SM5_RT_THREAD_ID = 0x20 ,
  VKD3D_SM5_RT_THREAD_GROUP_ID = 0x21 , VKD3D_SM5_RT_LOCAL_THREAD_ID = 0x22 , VKD3D_SM5_RT_COVERAGE = 0x23 , VKD3D_SM5_RT_LOCAL_THREAD_INDEX = 0x24 ,
  VKD3D_SM5_RT_GS_INSTANCE_ID = 0x25 , VKD3D_SM5_RT_DEPTHOUT_GREATER_EQUAL = 0x26 , VKD3D_SM5_RT_DEPTHOUT_LESS_EQUAL = 0x27 , VKD3D_SM5_RT_OUTPUT_STENCIL_REF = 0x29 ,
  VKD3D_SM4_REGISTER_TYPE_COUNT
}
 
enum  vkd3d_sm4_extended_operand_type { VKD3D_SM4_EXTENDED_OPERAND_NONE = 0x0 , VKD3D_SM4_EXTENDED_OPERAND_MODIFIER = 0x1 }
 
enum  vkd3d_sm4_register_modifier { VKD3D_SM4_REGISTER_MODIFIER_NONE = 0x00 , VKD3D_SM4_REGISTER_MODIFIER_NEGATE = 0x01 , VKD3D_SM4_REGISTER_MODIFIER_ABS = 0x02 , VKD3D_SM4_REGISTER_MODIFIER_ABS_NEGATE = 0x03 }
 
enum  vkd3d_sm4_register_precision {
  VKD3D_SM4_REGISTER_PRECISION_DEFAULT = 0x0 , VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_16 = 0x1 , VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_10 = 0x2 , VKD3D_SM4_REGISTER_PRECISION_MIN_INT_16 = 0x4 ,
  VKD3D_SM4_REGISTER_PRECISION_MIN_UINT_16 = 0x5
}
 
enum  vkd3d_sm4_output_primitive_type { VKD3D_SM4_OUTPUT_PT_POINTLIST = 0x1 , VKD3D_SM4_OUTPUT_PT_LINESTRIP = 0x3 , VKD3D_SM4_OUTPUT_PT_TRIANGLESTRIP = 0x5 }
 
enum  vkd3d_sm4_input_primitive_type {
  VKD3D_SM4_INPUT_PT_POINT = 0x01 , VKD3D_SM4_INPUT_PT_LINE = 0x02 , VKD3D_SM4_INPUT_PT_TRIANGLE = 0x03 , VKD3D_SM4_INPUT_PT_LINEADJ = 0x06 ,
  VKD3D_SM4_INPUT_PT_TRIANGLEADJ = 0x07 , VKD3D_SM5_INPUT_PT_PATCH1 = 0x08 , VKD3D_SM5_INPUT_PT_PATCH2 = 0x09 , VKD3D_SM5_INPUT_PT_PATCH3 = 0x0a ,
  VKD3D_SM5_INPUT_PT_PATCH4 = 0x0b , VKD3D_SM5_INPUT_PT_PATCH5 = 0x0c , VKD3D_SM5_INPUT_PT_PATCH6 = 0x0d , VKD3D_SM5_INPUT_PT_PATCH7 = 0x0e ,
  VKD3D_SM5_INPUT_PT_PATCH8 = 0x0f , VKD3D_SM5_INPUT_PT_PATCH9 = 0x10 , VKD3D_SM5_INPUT_PT_PATCH10 = 0x11 , VKD3D_SM5_INPUT_PT_PATCH11 = 0x12 ,
  VKD3D_SM5_INPUT_PT_PATCH12 = 0x13 , VKD3D_SM5_INPUT_PT_PATCH13 = 0x14 , VKD3D_SM5_INPUT_PT_PATCH14 = 0x15 , VKD3D_SM5_INPUT_PT_PATCH15 = 0x16 ,
  VKD3D_SM5_INPUT_PT_PATCH16 = 0x17 , VKD3D_SM5_INPUT_PT_PATCH17 = 0x18 , VKD3D_SM5_INPUT_PT_PATCH18 = 0x19 , VKD3D_SM5_INPUT_PT_PATCH19 = 0x1a ,
  VKD3D_SM5_INPUT_PT_PATCH20 = 0x1b , VKD3D_SM5_INPUT_PT_PATCH21 = 0x1c , VKD3D_SM5_INPUT_PT_PATCH22 = 0x1d , VKD3D_SM5_INPUT_PT_PATCH23 = 0x1e ,
  VKD3D_SM5_INPUT_PT_PATCH24 = 0x1f , VKD3D_SM5_INPUT_PT_PATCH25 = 0x20 , VKD3D_SM5_INPUT_PT_PATCH26 = 0x21 , VKD3D_SM5_INPUT_PT_PATCH27 = 0x22 ,
  VKD3D_SM5_INPUT_PT_PATCH28 = 0x23 , VKD3D_SM5_INPUT_PT_PATCH29 = 0x24 , VKD3D_SM5_INPUT_PT_PATCH30 = 0x25 , VKD3D_SM5_INPUT_PT_PATCH31 = 0x26 ,
  VKD3D_SM5_INPUT_PT_PATCH32 = 0x27
}
 
enum  vkd3d_sm4_swizzle_type {
  VKD3D_SM4_SWIZZLE_NONE = 0x0 , VKD3D_SM4_SWIZZLE_VEC4 = 0x1 , VKD3D_SM4_SWIZZLE_SCALAR = 0x2 , VKD3D_SM4_SWIZZLE_DEFAULT = ~0u - 1 ,
  VKD3D_SM4_SWIZZLE_INVALID = ~0u
}
 
enum  vkd3d_sm4_dimension { VKD3D_SM4_DIMENSION_NONE = 0x0 , VKD3D_SM4_DIMENSION_SCALAR = 0x1 , VKD3D_SM4_DIMENSION_VEC4 = 0x2 }
 
enum  vkd3d_sm4_resource_type {
  VKD3D_SM4_RESOURCE_BUFFER = 0x1 , VKD3D_SM4_RESOURCE_TEXTURE_1D = 0x2 , VKD3D_SM4_RESOURCE_TEXTURE_2D = 0x3 , VKD3D_SM4_RESOURCE_TEXTURE_2DMS = 0x4 ,
  VKD3D_SM4_RESOURCE_TEXTURE_3D = 0x5 , VKD3D_SM4_RESOURCE_TEXTURE_CUBE = 0x6 , VKD3D_SM4_RESOURCE_TEXTURE_1DARRAY = 0x7 , VKD3D_SM4_RESOURCE_TEXTURE_2DARRAY = 0x8 ,
  VKD3D_SM4_RESOURCE_TEXTURE_2DMSARRAY = 0x9 , VKD3D_SM4_RESOURCE_TEXTURE_CUBEARRAY = 0xa , VKD3D_SM4_RESOURCE_RAW_BUFFER = 0xb , VKD3D_SM4_RESOURCE_STRUCTURED_BUFFER = 0xc
}
 
enum  vkd3d_sm4_data_type {
  VKD3D_SM4_DATA_UNORM = 0x1 , VKD3D_SM4_DATA_SNORM = 0x2 , VKD3D_SM4_DATA_INT = 0x3 , VKD3D_SM4_DATA_UINT = 0x4 ,
  VKD3D_SM4_DATA_FLOAT = 0x5 , VKD3D_SM4_DATA_MIXED = 0x6 , VKD3D_SM4_DATA_DOUBLE = 0x7 , VKD3D_SM4_DATA_CONTINUED = 0x8 ,
  VKD3D_SM4_DATA_UNUSED = 0x9
}
 
enum  vkd3d_sm4_sampler_mode { VKD3D_SM4_SAMPLER_DEFAULT = 0x0 , VKD3D_SM4_SAMPLER_COMPARISON = 0x1 }
 
enum  vkd3d_sm4_shader_data_type { VKD3D_SM4_SHADER_DATA_IMMEDIATE_CONSTANT_BUFFER = 0x3 , VKD3D_SM4_SHADER_DATA_MESSAGE = 0x4 }
 
enum  vkd3d_sm4_stat_field {
  VKD3D_STAT_UNUSED = 0 , VKD3D_STAT_INSTR_COUNT , VKD3D_STAT_MOV , VKD3D_STAT_MOVC ,
  VKD3D_STAT_CONV , VKD3D_STAT_FLOAT , VKD3D_STAT_INT , VKD3D_STAT_UINT ,
  VKD3D_STAT_EMIT , VKD3D_STAT_CUT , VKD3D_STAT_SAMPLE , VKD3D_STAT_SAMPLE_C ,
  VKD3D_STAT_SAMPLE_GRAD , VKD3D_STAT_SAMPLE_BIAS , VKD3D_STAT_LOAD , VKD3D_STAT_STORE ,
  VKD3D_STAT_DCL_VERTICES_OUT , VKD3D_STAT_DCL_INPUT_PRIMITIVE , VKD3D_STAT_DCL_OUTPUT_TOPOLOGY , VKD3D_STAT_DCL_GS_INSTANCES ,
  VKD3D_STAT_BITWISE , VKD3D_STAT_ATOMIC , VKD3D_STAT_TESS_DOMAIN , VKD3D_STAT_TESS_PARTITIONING ,
  VKD3D_STAT_TESS_OUTPUT_PRIMITIVE , VKD3D_STAT_TESS_CONTROL_POINT_COUNT , VKD3D_STAT_BARRIER , VKD3D_STAT_LOD ,
  VKD3D_STAT_GATHER , VKD3D_STAT_TEMPS , VKD3D_STAT_COUNT
}
 

Functions

 STATIC_ASSERT (SM4_MAX_SRC_COUNT<=SPIRV_MAX_SRC_COUNT)
 
static enum vsir_dimension vsir_dimension_from_sm4_dimension (enum vkd3d_sm4_dimension dim)
 
static enum vkd3d_sm4_dimension sm4_dimension_from_vsir_dimension (enum vsir_dimension dim)
 
static bool shader_is_sm_5_1 (const struct vkd3d_shader_sm4_parser *sm4)
 
static bool shader_sm4_read_src_param (struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, const uint32_t *end, enum vkd3d_data_type data_type, struct vkd3d_shader_src_param *src_param)
 
static bool shader_sm4_read_dst_param (struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, const uint32_t *end, enum vkd3d_data_type data_type, struct vkd3d_shader_dst_param *dst_param)
 
static bool shader_sm4_read_register_space (struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, const uint32_t *end, unsigned int *register_space)
 
static void shader_sm4_read_conditional_op (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm4_read_case_condition (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm4_read_shader_data (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm4_set_descriptor_register_range (struct vkd3d_shader_sm4_parser *sm4, const struct vkd3d_shader_register *reg, struct vkd3d_shader_register_range *range)
 
static void shader_sm4_read_dcl_resource (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm4_read_dcl_constant_buffer (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm4_read_dcl_sampler (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static bool sm4_parser_is_in_fork_or_join_phase (const struct vkd3d_shader_sm4_parser *sm4)
 
static void shader_sm4_read_dcl_index_range (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm4_read_dcl_output_topology (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm4_read_dcl_input_primitive (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *sm4)
 
static void shader_sm4_read_declaration_count (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *sm4)
 
static void shader_sm4_read_declaration_dst (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm4_read_declaration_register_semantic (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm4_read_dcl_input_ps (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm4_read_dcl_input_ps_siv (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm4_read_dcl_indexable_temp (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm4_read_dcl_global_flags (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *sm4)
 
static void shader_sm5_read_fcall (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_dcl_function_body (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_dcl_function_table (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_dcl_interface (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_control_point_count (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *sm4)
 
static void shader_sm5_read_dcl_tessellator_domain (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_dcl_tessellator_partitioning (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_dcl_tessellator_output_primitive (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_dcl_hs_max_tessfactor (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_dcl_thread_group (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *sm4)
 
static void shader_sm5_read_dcl_uav_raw (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_dcl_uav_structured (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_dcl_tgsm_raw (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_dcl_tgsm_structured (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_dcl_resource_structured (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_dcl_resource_raw (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void shader_sm5_read_sync (struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
 
static void init_sm4_lookup_tables (struct vkd3d_sm4_lookup_tables *lookup)
 
static const struct vkd3d_sm4_opcode_info * get_info_from_sm4_opcode (const struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_sm4_opcode sm4_opcode)
 
static const struct vkd3d_sm4_opcode_info * get_info_from_vsir_opcode (const struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_shader_opcode vsir_opcode)
 
static unsigned int opcode_info_get_dst_count (const struct vkd3d_sm4_opcode_info *info)
 
static unsigned int opcode_info_get_src_count (const struct vkd3d_sm4_opcode_info *info)
 
static const struct vkd3d_sm4_register_type_info * get_info_from_sm4_register_type (const struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_sm4_register_type sm4_type)
 
static const struct vkd3d_sm4_register_type_info * get_info_from_vkd3d_register_type (const struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_shader_register_type vkd3d_type)
 
static enum vkd3d_sm4_swizzle_type vkd3d_sm4_get_default_swizzle_type (const struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_shader_register_type vkd3d_type)
 
static enum vkd3d_sm4_stat_field get_stat_field_from_sm4_opcode (const struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_sm4_opcode sm4_opcode)
 
static enum vkd3d_data_type map_data_type (char t)
 
static bool shader_sm4_read_reg_idx (struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, const uint32_t *end, uint32_t addressing, struct vkd3d_shader_register_index *reg_idx)
 
static bool shader_sm4_read_param (struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, const uint32_t *end, enum vkd3d_data_type data_type, struct vkd3d_shader_register *param, enum vkd3d_shader_src_modifier *modifier)
 
bool shader_sm4_is_scalar_register (const struct vkd3d_shader_register *reg)
 
static uint32_t swizzle_from_sm4 (uint32_t s)
 
static uint32_t swizzle_to_sm4 (uint32_t s)
 
static bool register_is_input_output (const struct vkd3d_shader_register *reg)
 
static bool register_is_control_point_input (const struct vkd3d_shader_register *reg, const struct vkd3d_shader_sm4_parser *priv)
 
static uint32_t mask_from_swizzle (uint32_t swizzle)
 
static bool shader_sm4_validate_input_output_register (struct vkd3d_shader_sm4_parser *priv, const struct vkd3d_shader_register *reg, unsigned int mask)
 
static void shader_sm4_read_instruction_modifier (uint32_t modifier, struct vkd3d_shader_instruction *ins)
 
static void shader_sm4_read_instruction (struct vkd3d_shader_sm4_parser *sm4, struct vkd3d_shader_instruction *ins)
 
static bool shader_sm4_init (struct vkd3d_shader_sm4_parser *sm4, struct vsir_program *program, const uint32_t *byte_code, size_t byte_code_size, const struct vkd3d_shader_compile_info *compile_info, struct vkd3d_shader_message_context *message_context)
 
static void uninvert_used_masks (struct shader_signature *signature)
 
static bool shader_sm4_parser_validate_signature (struct vkd3d_shader_sm4_parser *sm4, const struct shader_signature *signature, unsigned int *masks, const char *name)
 
static int index_range_compare (const void *a, const void *b)
 
static void shader_sm4_validate_default_phase_index_ranges (struct vkd3d_shader_sm4_parser *sm4)
 
int tpf_parse (const struct vkd3d_shader_compile_info *compile_info, uint64_t config_flags, struct vkd3d_shader_message_context *message_context, struct vsir_program *program)
 
static void write_sm4_block (struct tpf_compiler *tpf, const struct hlsl_block *block)
 
bool sm4_register_from_semantic_name (const struct vkd3d_shader_version *version, const char *semantic_name, bool output, enum vkd3d_shader_register_type *type, bool *has_idx)
 
static bool get_tessfactor_sysval_semantic (enum vkd3d_shader_sysval_semantic *semantic, enum vkd3d_tessellator_domain domain, uint32_t index)
 
static bool get_insidetessfactor_sysval_semantic (enum vkd3d_shader_sysval_semantic *semantic, enum vkd3d_tessellator_domain domain, uint32_t index)
 
bool sm4_sysval_semantic_from_semantic_name (enum vkd3d_shader_sysval_semantic *sysval_semantic, const struct vkd3d_shader_version *version, bool semantic_compat_mapping, enum vkd3d_tessellator_domain domain, const char *semantic_name, unsigned int semantic_idx, bool output, bool is_patch_constant_func)
 
static void add_section (struct hlsl_ctx *ctx, struct dxbc_writer *dxbc, uint32_t tag, struct vkd3d_bytecode_buffer *buffer)
 
static int signature_element_pointer_compare (const void *x, const void *y)
 
static void tpf_write_signature (struct tpf_compiler *tpf, const struct shader_signature *signature, uint32_t tag)
 
static D3D_SHADER_VARIABLE_CLASS sm4_class (const struct hlsl_type *type)
 
static D3D_SHADER_VARIABLE_TYPE sm4_base_type (const struct hlsl_type *type)
 
static void write_sm4_type (struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer, struct hlsl_type *type)
 
static D3D_SHADER_INPUT_TYPE sm4_resource_type (const struct hlsl_type *type)
 
static enum vkd3d_sm4_data_type sm4_data_type (const struct hlsl_type *type)
 
static D3D_SRV_DIMENSION sm4_rdef_resource_dimension (const struct hlsl_type *type)
 
static int sm4_compare_extern_resources (const void *a, const void *b)
 
static void sm4_free_extern_resources (struct extern_resource *extern_resources, unsigned int count)
 
static const char * string_skip_tag (const char *string)
 
static struct extern_resource * sm4_get_extern_resources (struct hlsl_ctx *ctx, unsigned int *count)
 
static unsigned int get_component_index_from_default_initializer_index (struct hlsl_type *type, unsigned int index)
 
static void write_sm4_rdef (struct hlsl_ctx *ctx, struct dxbc_writer *dxbc)
 
static enum vkd3d_sm4_resource_type sm4_resource_dimension (const struct hlsl_type *type)
 
static uint32_t sm4_encode_instruction_modifier (const struct sm4_instruction_modifier *imod)
 
static void sm4_register_from_node (struct vkd3d_shader_register *reg, uint32_t *writemask, const struct hlsl_ir_node *instr)
 
static void sm4_numeric_register_from_deref (struct hlsl_ctx *ctx, struct vkd3d_shader_register *reg, enum vkd3d_shader_register_type type, uint32_t *writemask, const struct hlsl_deref *deref, struct sm4_instruction *sm4_instr)
 
static void sm4_register_from_deref (const struct tpf_compiler *tpf, struct vkd3d_shader_register *reg, uint32_t *writemask, const struct hlsl_deref *deref, struct sm4_instruction *sm4_instr)
 
static void sm4_src_from_deref (const struct tpf_compiler *tpf, struct vkd3d_shader_src_param *src, const struct hlsl_deref *deref, unsigned int map_writemask, struct sm4_instruction *sm4_instr)
 
static void sm4_dst_from_node (struct vkd3d_shader_dst_param *dst, const struct hlsl_ir_node *instr)
 
static void sm4_src_from_constant_value (struct vkd3d_shader_src_param *src, const struct hlsl_constant_value *value, unsigned int width, unsigned int map_writemask)
 
static void sm4_src_from_node (const struct tpf_compiler *tpf, struct vkd3d_shader_src_param *src, const struct hlsl_ir_node *instr, uint32_t map_writemask)
 
static unsigned int sm4_get_index_addressing_from_reg (const struct vkd3d_shader_register *reg, unsigned int i)
 
static uint32_t sm4_encode_register (const struct tpf_compiler *tpf, const struct vkd3d_shader_register *reg, enum vkd3d_sm4_swizzle_type sm4_swizzle_type, uint32_t sm4_swizzle)
 
static void sm4_write_register_index (const struct tpf_compiler *tpf, const struct vkd3d_shader_register *reg, unsigned int j)
 
static void sm4_write_dst_register (const struct tpf_compiler *tpf, const struct vkd3d_shader_dst_param *dst)
 
static void sm4_write_src_register (const struct tpf_compiler *tpf, const struct vkd3d_shader_src_param *src)
 
static void sm4_update_stat_counters (const struct tpf_compiler *tpf, const struct sm4_instruction *instr)
 
static void write_sm4_instruction (const struct tpf_compiler *tpf, const struct sm4_instruction *instr)
 
static bool encode_texel_offset_as_aoffimmi (struct sm4_instruction *instr, const struct hlsl_ir_node *texel_offset)
 
static void write_sm4_dcl_constant_buffer (const struct tpf_compiler *tpf, const struct hlsl_buffer *cbuffer)
 
static void write_sm4_dcl_samplers (const struct tpf_compiler *tpf, const struct extern_resource *resource)
 
static void write_sm4_dcl_textures (const struct tpf_compiler *tpf, const struct extern_resource *resource, bool uav)
 
static void tpf_dcl_temps (const struct tpf_compiler *tpf, unsigned int count)
 
static void tpf_dcl_indexable_temp (const struct tpf_compiler *tpf, const struct vkd3d_shader_indexable_temp *temp)
 
static void tpf_dcl_semantic (const struct tpf_compiler *tpf, enum vkd3d_sm4_opcode opcode, const struct vkd3d_shader_dst_param *dst, uint32_t interpolation_flags)
 
static void tpf_dcl_siv_semantic (const struct tpf_compiler *tpf, enum vkd3d_sm4_opcode opcode, const struct vkd3d_shader_register_semantic *semantic, uint32_t interpolation_flags)
 
static void tpf_dcl_thread_group (const struct tpf_compiler *tpf, const struct vsir_thread_group_size *group_size)
 
static void write_sm4_dcl_global_flags (const struct tpf_compiler *tpf, uint32_t flags)
 
static void tpf_write_hs_decls (const struct tpf_compiler *tpf)
 
static void tpf_write_hs_control_point_phase (const struct tpf_compiler *tpf)
 
static void tpf_write_hs_fork_phase (const struct tpf_compiler *tpf)
 
static void tpf_write_dcl_input_control_point_count (const struct tpf_compiler *tpf, const uint32_t count)
 
static void tpf_write_dcl_output_control_point_count (const struct tpf_compiler *tpf, const uint32_t count)
 
static void tpf_write_dcl_tessellator_domain (const struct tpf_compiler *tpf, enum vkd3d_tessellator_domain domain)
 
static void tpf_write_dcl_tessellator_partitioning (const struct tpf_compiler *tpf, enum vkd3d_shader_tessellator_partitioning partitioning)
 
static void tpf_write_dcl_tessellator_output_primitive (const struct tpf_compiler *tpf, enum vkd3d_shader_tessellator_output_primitive output_primitive)
 
static void write_sm4_ret (const struct tpf_compiler *tpf)
 
static void write_sm4_ld (const struct tpf_compiler *tpf, const struct hlsl_ir_node *dst, const struct hlsl_deref *resource, const struct hlsl_ir_node *coords, const struct hlsl_ir_node *sample_index, const struct hlsl_ir_node *texel_offset, enum hlsl_sampler_dim dim)
 
static void write_sm4_sample (const struct tpf_compiler *tpf, const struct hlsl_ir_resource_load *load)
 
static void write_sm4_sampleinfo (const struct tpf_compiler *tpf, const struct hlsl_ir_resource_load *load)
 
static void write_sm4_resinfo (const struct tpf_compiler *tpf, const struct hlsl_ir_resource_load *load)
 
static void write_sm4_if (struct tpf_compiler *tpf, const struct hlsl_ir_if *iff)
 
static void write_sm4_jump (const struct tpf_compiler *tpf, const struct hlsl_ir_jump *jump)
 
static bool var_is_user_input (const struct vkd3d_shader_version *version, const struct hlsl_ir_var *var)
 
static void write_sm4_load (const struct tpf_compiler *tpf, const struct hlsl_ir_load *load)
 
static void write_sm4_loop (struct tpf_compiler *tpf, const struct hlsl_ir_loop *loop)
 
static void write_sm4_gather (const struct tpf_compiler *tpf, const struct hlsl_ir_node *dst, const struct hlsl_deref *resource, const struct hlsl_deref *sampler, const struct hlsl_ir_node *coords, uint32_t swizzle, const struct hlsl_ir_node *texel_offset)
 
static void write_sm4_resource_load (const struct tpf_compiler *tpf, const struct hlsl_ir_resource_load *load)
 
static void write_sm4_resource_store (const struct tpf_compiler *tpf, const struct hlsl_ir_resource_store *store)
 
static void write_sm4_store (const struct tpf_compiler *tpf, const struct hlsl_ir_store *store)
 
static void write_sm4_switch (struct tpf_compiler *tpf, const struct hlsl_ir_switch *s)
 
static void write_sm4_swizzle (const struct tpf_compiler *tpf, const struct hlsl_ir_swizzle *swizzle)
 
static void tpf_simple_instruction (struct tpf_compiler *tpf, const struct vkd3d_shader_instruction *ins)
 
static void tpf_handle_instruction (struct tpf_compiler *tpf, const struct vkd3d_shader_instruction *ins)
 
static void tpf_write_shader_function (struct tpf_compiler *tpf, struct hlsl_ir_function_decl *func)
 
static void tpf_write_shdr (struct tpf_compiler *tpf, struct hlsl_ir_function_decl *entry_func)
 
static void tpf_write_sfi0 (struct tpf_compiler *tpf)
 
static void tpf_write_stat (struct tpf_compiler *tpf)
 
int tpf_compile (struct vsir_program *program, uint64_t config_flags, struct vkd3d_shader_code *out, struct vkd3d_shader_message_context *message_context, struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_func)
 

Variables

static enum vkd3d_primitive_type output_primitive_type_table []
 
struct {
   unsigned int   control_point_count
 
   enum vkd3d_primitive_type   vkd3d_type
 
} input_primitive_type_table []
 
static enum vkd3d_shader_resource_type resource_type_table []
 
static enum vkd3d_data_type data_type_table []
 
static enum vkd3d_shader_register_precision register_precision_table []
 

Macro Definition Documentation

◆ SM4_MAX_DST_COUNT

#define SM4_MAX_DST_COUNT   2

Definition at line 29 of file tpf.c.

◆ SM4_MAX_SRC_COUNT

#define SM4_MAX_SRC_COUNT   6

Definition at line 28 of file tpf.c.

◆ VKD3D_SM4_ADDRESSING_MASK0

#define VKD3D_SM4_ADDRESSING_MASK0   (0x3u << VKD3D_SM4_ADDRESSING_SHIFT0)

Definition at line 131 of file tpf.c.

◆ VKD3D_SM4_ADDRESSING_MASK1

#define VKD3D_SM4_ADDRESSING_MASK1   (0x3u << VKD3D_SM4_ADDRESSING_SHIFT1)

Definition at line 128 of file tpf.c.

◆ VKD3D_SM4_ADDRESSING_MASK2

#define VKD3D_SM4_ADDRESSING_MASK2   (0x3u << VKD3D_SM4_ADDRESSING_SHIFT2)

Definition at line 125 of file tpf.c.

◆ VKD3D_SM4_ADDRESSING_OFFSET

#define VKD3D_SM4_ADDRESSING_OFFSET   0x1

Definition at line 158 of file tpf.c.

◆ VKD3D_SM4_ADDRESSING_RELATIVE

#define VKD3D_SM4_ADDRESSING_RELATIVE   0x2

Definition at line 157 of file tpf.c.

◆ VKD3D_SM4_ADDRESSING_SHIFT0

#define VKD3D_SM4_ADDRESSING_SHIFT0   22

Definition at line 130 of file tpf.c.

◆ VKD3D_SM4_ADDRESSING_SHIFT1

#define VKD3D_SM4_ADDRESSING_SHIFT1   25

Definition at line 127 of file tpf.c.

◆ VKD3D_SM4_ADDRESSING_SHIFT2

#define VKD3D_SM4_ADDRESSING_SHIFT2   28

Definition at line 124 of file tpf.c.

◆ VKD3D_SM4_AOFFIMMI_U_MASK

#define VKD3D_SM4_AOFFIMMI_U_MASK   (0xfu << VKD3D_SM4_AOFFIMMI_U_SHIFT)

Definition at line 55 of file tpf.c.

◆ VKD3D_SM4_AOFFIMMI_U_SHIFT

#define VKD3D_SM4_AOFFIMMI_U_SHIFT   9

Definition at line 54 of file tpf.c.

◆ VKD3D_SM4_AOFFIMMI_V_MASK

#define VKD3D_SM4_AOFFIMMI_V_MASK   (0xfu << VKD3D_SM4_AOFFIMMI_V_SHIFT)

Definition at line 57 of file tpf.c.

◆ VKD3D_SM4_AOFFIMMI_V_SHIFT

#define VKD3D_SM4_AOFFIMMI_V_SHIFT   13

Definition at line 56 of file tpf.c.

◆ VKD3D_SM4_AOFFIMMI_W_MASK

#define VKD3D_SM4_AOFFIMMI_W_MASK   (0xfu << VKD3D_SM4_AOFFIMMI_W_SHIFT)

Definition at line 59 of file tpf.c.

◆ VKD3D_SM4_AOFFIMMI_W_SHIFT

#define VKD3D_SM4_AOFFIMMI_W_SHIFT   17

Definition at line 58 of file tpf.c.

◆ VKD3D_SM4_CONDITIONAL_NZ

#define VKD3D_SM4_CONDITIONAL_NZ   (0x1u << 18)

Definition at line 162 of file tpf.c.

◆ VKD3D_SM4_DIMENSION_MASK

#define VKD3D_SM4_DIMENSION_MASK   (0x3u << VKD3D_SM4_DIMENSION_SHIFT)

Definition at line 143 of file tpf.c.

◆ VKD3D_SM4_DIMENSION_SHIFT

#define VKD3D_SM4_DIMENSION_SHIFT   0

Definition at line 142 of file tpf.c.

◆ VKD3D_SM4_EXTENDED_OPERAND

#define VKD3D_SM4_EXTENDED_OPERAND   (0x1u << 31)

Definition at line 111 of file tpf.c.

◆ VKD3D_SM4_EXTENDED_OPERAND_TYPE_MASK

#define VKD3D_SM4_EXTENDED_OPERAND_TYPE_MASK   0x3fu

Definition at line 113 of file tpf.c.

◆ VKD3D_SM4_GLOBAL_FLAGS_MASK

#define VKD3D_SM4_GLOBAL_FLAGS_MASK   (0xffu << VKD3D_SM4_GLOBAL_FLAGS_SHIFT)

Definition at line 89 of file tpf.c.

◆ VKD3D_SM4_GLOBAL_FLAGS_SHIFT

#define VKD3D_SM4_GLOBAL_FLAGS_SHIFT   11

Definition at line 88 of file tpf.c.

◆ VKD3D_SM4_GS

#define VKD3D_SM4_GS   0x0002u

Definition at line 35 of file tpf.c.

◆ VKD3D_SM4_INDEX_TYPE_MASK

#define VKD3D_SM4_INDEX_TYPE_MASK   (0x1u << VKD3D_SM4_INDEX_TYPE_SHIFT)

Definition at line 77 of file tpf.c.

◆ VKD3D_SM4_INDEX_TYPE_SHIFT

#define VKD3D_SM4_INDEX_TYPE_SHIFT   11

Definition at line 76 of file tpf.c.

◆ VKD3D_SM4_INSTRUCTION_FLAG_SATURATE

#define VKD3D_SM4_INSTRUCTION_FLAG_SATURATE   0x4

Definition at line 160 of file tpf.c.

◆ VKD3D_SM4_INSTRUCTION_FLAGS_MASK

#define VKD3D_SM4_INSTRUCTION_FLAGS_MASK   (0x7u << VKD3D_SM4_INSTRUCTION_FLAGS_SHIFT)

Definition at line 65 of file tpf.c.

◆ VKD3D_SM4_INSTRUCTION_FLAGS_SHIFT

#define VKD3D_SM4_INSTRUCTION_FLAGS_SHIFT   11

Definition at line 64 of file tpf.c.

◆ VKD3D_SM4_INSTRUCTION_LENGTH_MASK

#define VKD3D_SM4_INSTRUCTION_LENGTH_MASK   (0x1fu << VKD3D_SM4_INSTRUCTION_LENGTH_SHIFT)

Definition at line 62 of file tpf.c.

◆ VKD3D_SM4_INSTRUCTION_LENGTH_SHIFT

#define VKD3D_SM4_INSTRUCTION_LENGTH_SHIFT   24

Definition at line 61 of file tpf.c.

◆ VKD3D_SM4_INSTRUCTION_MODIFIER

#define VKD3D_SM4_INSTRUCTION_MODIFIER   (0x1u << 31)

Definition at line 41 of file tpf.c.

◆ VKD3D_SM4_INTERPOLATION_MODE_MASK

#define VKD3D_SM4_INTERPOLATION_MODE_MASK   (0xfu << VKD3D_SM4_INTERPOLATION_MODE_SHIFT)

Definition at line 86 of file tpf.c.

◆ VKD3D_SM4_INTERPOLATION_MODE_SHIFT

#define VKD3D_SM4_INTERPOLATION_MODE_SHIFT   11

Definition at line 85 of file tpf.c.

◆ VKD3D_SM4_LIB

#define VKD3D_SM4_LIB   0xfff0u

Definition at line 39 of file tpf.c.

◆ VKD3D_SM4_MODIFIER_MASK

#define VKD3D_SM4_MODIFIER_MASK   0x3fu

Definition at line 43 of file tpf.c.

◆ VKD3D_SM4_OPCODE_MASK

#define VKD3D_SM4_OPCODE_MASK   0xff

Definition at line 109 of file tpf.c.

◆ VKD3D_SM4_PRIMITIVE_TYPE_MASK

#define VKD3D_SM4_PRIMITIVE_TYPE_MASK   (0x3fu << VKD3D_SM4_PRIMITIVE_TYPE_SHIFT)

Definition at line 74 of file tpf.c.

◆ VKD3D_SM4_PRIMITIVE_TYPE_SHIFT

#define VKD3D_SM4_PRIMITIVE_TYPE_SHIFT   11

Definition at line 73 of file tpf.c.

◆ VKD3D_SM4_PS

#define VKD3D_SM4_PS   0x0000u

Definition at line 33 of file tpf.c.

◆ VKD3D_SM4_REGISTER_MODIFIER_MASK

#define VKD3D_SM4_REGISTER_MODIFIER_MASK   (0xffu << VKD3D_SM4_REGISTER_MODIFIER_SHIFT)

Definition at line 116 of file tpf.c.

◆ VKD3D_SM4_REGISTER_MODIFIER_SHIFT

#define VKD3D_SM4_REGISTER_MODIFIER_SHIFT   6

Definition at line 115 of file tpf.c.

◆ VKD3D_SM4_REGISTER_NON_UNIFORM_MASK

#define VKD3D_SM4_REGISTER_NON_UNIFORM_MASK   (0x1u << VKD3D_SM4_REGISTER_NON_UNIFORM_SHIFT)

Definition at line 122 of file tpf.c.

◆ VKD3D_SM4_REGISTER_NON_UNIFORM_SHIFT

#define VKD3D_SM4_REGISTER_NON_UNIFORM_SHIFT   17

Definition at line 121 of file tpf.c.

◆ VKD3D_SM4_REGISTER_ORDER_MASK

#define VKD3D_SM4_REGISTER_ORDER_MASK   (0x3u << VKD3D_SM4_REGISTER_ORDER_SHIFT)

Definition at line 134 of file tpf.c.

◆ VKD3D_SM4_REGISTER_ORDER_SHIFT

#define VKD3D_SM4_REGISTER_ORDER_SHIFT   20

Definition at line 133 of file tpf.c.

◆ VKD3D_SM4_REGISTER_PRECISION_MASK

#define VKD3D_SM4_REGISTER_PRECISION_MASK   (0x7u << VKD3D_SM4_REGISTER_PRECISION_SHIFT)

Definition at line 119 of file tpf.c.

◆ VKD3D_SM4_REGISTER_PRECISION_SHIFT

#define VKD3D_SM4_REGISTER_PRECISION_SHIFT   14

Definition at line 118 of file tpf.c.

◆ VKD3D_SM4_REGISTER_TYPE_MASK

#define VKD3D_SM4_REGISTER_TYPE_MASK   (0xffu << VKD3D_SM4_REGISTER_TYPE_SHIFT)

Definition at line 137 of file tpf.c.

◆ VKD3D_SM4_REGISTER_TYPE_SHIFT

#define VKD3D_SM4_REGISTER_TYPE_SHIFT   12

Definition at line 136 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_11_1_DOUBLE_EXTENSIONS

#define VKD3D_SM4_REQUIRES_11_1_DOUBLE_EXTENSIONS   0x00000020

Definition at line 174 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_11_1_SHADER_EXTENSIONS

#define VKD3D_SM4_REQUIRES_11_1_SHADER_EXTENSIONS   0x00000040

Definition at line 175 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_64_UAVS

#define VKD3D_SM4_REQUIRES_64_UAVS   0x00000008

Definition at line 172 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_DOUBLES

#define VKD3D_SM4_REQUIRES_DOUBLES   0x00000001

Definition at line 169 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_EARLY_DEPTH_STENCIL

#define VKD3D_SM4_REQUIRES_EARLY_DEPTH_STENCIL   0x00000002

Definition at line 170 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_INNER_COVERAGE

#define VKD3D_SM4_REQUIRES_INNER_COVERAGE   0x00000400

Definition at line 179 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_LEVEL_9_COMPARISON_FILTERING

#define VKD3D_SM4_REQUIRES_LEVEL_9_COMPARISON_FILTERING   0x00000080

Definition at line 176 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_MINIMUM_PRECISION

#define VKD3D_SM4_REQUIRES_MINIMUM_PRECISION   0x00000010

Definition at line 173 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_ROVS

#define VKD3D_SM4_REQUIRES_ROVS   0x00001000

Definition at line 181 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_STENCIL_REF

#define VKD3D_SM4_REQUIRES_STENCIL_REF   0x00000200

Definition at line 178 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_TILED_RESOURCES

#define VKD3D_SM4_REQUIRES_TILED_RESOURCES   0x00000100

Definition at line 177 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_TYPED_UAV_LOAD_ADDITIONAL_FORMATS

#define VKD3D_SM4_REQUIRES_TYPED_UAV_LOAD_ADDITIONAL_FORMATS   0x00000800

Definition at line 180 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_UAVS_AT_EVERY_STAGE

#define VKD3D_SM4_REQUIRES_UAVS_AT_EVERY_STAGE   0x00000004

Definition at line 171 of file tpf.c.

◆ VKD3D_SM4_REQUIRES_VIEWPORT_AND_RT_ARRAY_INDEX_FROM_ANY_SHADER_FEEDING_RASTERIZER

#define VKD3D_SM4_REQUIRES_VIEWPORT_AND_RT_ARRAY_INDEX_FROM_ANY_SHADER_FEEDING_RASTERIZER   0x00002000

Definition at line 182 of file tpf.c.

◆ VKD3D_SM4_RESOURCE_SAMPLE_COUNT_MASK

#define VKD3D_SM4_RESOURCE_SAMPLE_COUNT_MASK   (0xfu << VKD3D_SM4_RESOURCE_SAMPLE_COUNT_SHIFT)

Definition at line 71 of file tpf.c.

◆ VKD3D_SM4_RESOURCE_SAMPLE_COUNT_SHIFT

#define VKD3D_SM4_RESOURCE_SAMPLE_COUNT_SHIFT   16

Definition at line 70 of file tpf.c.

◆ VKD3D_SM4_RESOURCE_TYPE_MASK

#define VKD3D_SM4_RESOURCE_TYPE_MASK   (0xfu << VKD3D_SM4_RESOURCE_TYPE_SHIFT)

Definition at line 68 of file tpf.c.

◆ VKD3D_SM4_RESOURCE_TYPE_SHIFT

#define VKD3D_SM4_RESOURCE_TYPE_SHIFT   11

Definition at line 67 of file tpf.c.

◆ VKD3D_SM4_SAMPLER_MODE_MASK

#define VKD3D_SM4_SAMPLER_MODE_MASK   (0xfu << VKD3D_SM4_SAMPLER_MODE_SHIFT)

Definition at line 80 of file tpf.c.

◆ VKD3D_SM4_SAMPLER_MODE_SHIFT

#define VKD3D_SM4_SAMPLER_MODE_SHIFT   11

Definition at line 79 of file tpf.c.

◆ VKD3D_SM4_SCALAR_DIM_MASK

#define VKD3D_SM4_SCALAR_DIM_MASK   (0x3u << VKD3D_SM4_SCALAR_DIM_SHIFT)

Definition at line 152 of file tpf.c.

◆ VKD3D_SM4_SCALAR_DIM_SHIFT

#define VKD3D_SM4_SCALAR_DIM_SHIFT   4

Definition at line 151 of file tpf.c.

◆ VKD3D_SM4_SHADER_DATA_TYPE_MASK

#define VKD3D_SM4_SHADER_DATA_TYPE_MASK   (0xfu << VKD3D_SM4_SHADER_DATA_TYPE_SHIFT)

Definition at line 83 of file tpf.c.

◆ VKD3D_SM4_SHADER_DATA_TYPE_SHIFT

#define VKD3D_SM4_SHADER_DATA_TYPE_SHIFT   11

Definition at line 82 of file tpf.c.

◆ VKD3D_SM4_SIF_TEXTURE_COMPONENTS_SHIFT

#define VKD3D_SM4_SIF_TEXTURE_COMPONENTS_SHIFT   2

Definition at line 167 of file tpf.c.

◆ VKD3D_SM4_SWIZZLE_MASK

#define VKD3D_SM4_SWIZZLE_MASK   (0xffu << VKD3D_SM4_SWIZZLE_SHIFT)

Definition at line 149 of file tpf.c.

◆ VKD3D_SM4_SWIZZLE_SHIFT

#define VKD3D_SM4_SWIZZLE_SHIFT   4

Definition at line 148 of file tpf.c.

◆ VKD3D_SM4_SWIZZLE_TYPE_MASK

#define VKD3D_SM4_SWIZZLE_TYPE_MASK   (0x3u << VKD3D_SM4_SWIZZLE_TYPE_SHIFT)

Definition at line 140 of file tpf.c.

◆ VKD3D_SM4_SWIZZLE_TYPE_SHIFT

#define VKD3D_SM4_SWIZZLE_TYPE_SHIFT   2

Definition at line 139 of file tpf.c.

◆ VKD3D_SM4_TYPE_COMPONENT

#define VKD3D_SM4_TYPE_COMPONENT (   com,
  i 
)    (((com) >> (4 * (i))) & 0xfu)

Definition at line 164 of file tpf.c.

◆ VKD3D_SM4_VERSION_MAJOR

#define VKD3D_SM4_VERSION_MAJOR (   version)    (((version) >> 4) & 0xf)

Definition at line 154 of file tpf.c.

◆ VKD3D_SM4_VERSION_MINOR

#define VKD3D_SM4_VERSION_MINOR (   version)    (((version) >> 0) & 0xf)

Definition at line 155 of file tpf.c.

◆ VKD3D_SM4_VS

#define VKD3D_SM4_VS   0x0001u

Definition at line 34 of file tpf.c.

◆ VKD3D_SM4_WRITEMASK_MASK

#define VKD3D_SM4_WRITEMASK_MASK   (0xfu << VKD3D_SM4_WRITEMASK_SHIFT)

Definition at line 146 of file tpf.c.

◆ VKD3D_SM4_WRITEMASK_SHIFT

#define VKD3D_SM4_WRITEMASK_SHIFT   4

Definition at line 145 of file tpf.c.

◆ VKD3D_SM5_CONTROL_POINT_COUNT_MASK

#define VKD3D_SM5_CONTROL_POINT_COUNT_MASK   (0xffu << VKD3D_SM5_CONTROL_POINT_COUNT_SHIFT)

Definition at line 95 of file tpf.c.

◆ VKD3D_SM5_CONTROL_POINT_COUNT_SHIFT

#define VKD3D_SM5_CONTROL_POINT_COUNT_SHIFT   11

Definition at line 94 of file tpf.c.

◆ VKD3D_SM5_CS

#define VKD3D_SM5_CS   0x0005u

Definition at line 38 of file tpf.c.

◆ VKD3D_SM5_DS

#define VKD3D_SM5_DS   0x0004u

Definition at line 37 of file tpf.c.

◆ VKD3D_SM5_FP_ARRAY_SIZE_SHIFT

#define VKD3D_SM5_FP_ARRAY_SIZE_SHIFT   16

Definition at line 97 of file tpf.c.

◆ VKD3D_SM5_FP_TABLE_COUNT_MASK

#define VKD3D_SM5_FP_TABLE_COUNT_MASK   0xffffu

Definition at line 98 of file tpf.c.

◆ VKD3D_SM5_HS

#define VKD3D_SM5_HS   0x0003u

Definition at line 36 of file tpf.c.

◆ VKD3D_SM5_MODIFIER_DATA_TYPE_MASK

#define VKD3D_SM5_MODIFIER_DATA_TYPE_MASK   (0xffffu << VKD3D_SM5_MODIFIER_DATA_TYPE_SHIFT)

Definition at line 46 of file tpf.c.

◆ VKD3D_SM5_MODIFIER_DATA_TYPE_SHIFT

#define VKD3D_SM5_MODIFIER_DATA_TYPE_SHIFT   6

Definition at line 45 of file tpf.c.

◆ VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_MASK

#define VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_MASK   (0xfffu << VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_SHIFT)

Definition at line 52 of file tpf.c.

◆ VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_SHIFT

#define VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_SHIFT   11

Definition at line 51 of file tpf.c.

◆ VKD3D_SM5_MODIFIER_RESOURCE_TYPE_MASK

#define VKD3D_SM5_MODIFIER_RESOURCE_TYPE_MASK   (0xfu << VKD3D_SM5_MODIFIER_RESOURCE_TYPE_SHIFT)

Definition at line 49 of file tpf.c.

◆ VKD3D_SM5_MODIFIER_RESOURCE_TYPE_SHIFT

#define VKD3D_SM5_MODIFIER_RESOURCE_TYPE_SHIFT   6

Definition at line 48 of file tpf.c.

◆ VKD3D_SM5_PRECISE_MASK

#define VKD3D_SM5_PRECISE_MASK   (0xfu << VKD3D_SM5_PRECISE_SHIFT)

Definition at line 92 of file tpf.c.

◆ VKD3D_SM5_PRECISE_SHIFT

#define VKD3D_SM5_PRECISE_SHIFT   19

Definition at line 91 of file tpf.c.

◆ VKD3D_SM5_SYNC_FLAGS_MASK

#define VKD3D_SM5_SYNC_FLAGS_MASK   (0xffu << VKD3D_SM5_SYNC_FLAGS_SHIFT)

Definition at line 104 of file tpf.c.

◆ VKD3D_SM5_SYNC_FLAGS_SHIFT

#define VKD3D_SM5_SYNC_FLAGS_SHIFT   11

Definition at line 103 of file tpf.c.

◆ VKD3D_SM5_TESSELLATOR_MASK

#define VKD3D_SM5_TESSELLATOR_MASK   (0xfu << VKD3D_SM5_TESSELLATOR_SHIFT)

Definition at line 107 of file tpf.c.

◆ VKD3D_SM5_TESSELLATOR_SHIFT

#define VKD3D_SM5_TESSELLATOR_SHIFT   11

Definition at line 106 of file tpf.c.

◆ VKD3D_SM5_UAV_FLAGS_MASK

#define VKD3D_SM5_UAV_FLAGS_MASK   (0x1ffu << VKD3D_SM5_UAV_FLAGS_SHIFT)

Definition at line 101 of file tpf.c.

◆ VKD3D_SM5_UAV_FLAGS_SHIFT

#define VKD3D_SM5_UAV_FLAGS_SHIFT   15

Definition at line 100 of file tpf.c.

Enumeration Type Documentation

◆ vkd3d_sm4_data_type

enum vkd3d_sm4_data_type
Enumerator
VKD3D_SM4_DATA_UNORM 
VKD3D_SM4_DATA_SNORM 
VKD3D_SM4_DATA_INT 
VKD3D_SM4_DATA_UINT 
VKD3D_SM4_DATA_FLOAT 
VKD3D_SM4_DATA_MIXED 
VKD3D_SM4_DATA_DOUBLE 
VKD3D_SM4_DATA_CONTINUED 
VKD3D_SM4_DATA_UNUSED 

Definition at line 595 of file tpf.c.

596{
597 VKD3D_SM4_DATA_UNORM = 0x1,
598 VKD3D_SM4_DATA_SNORM = 0x2,
599 VKD3D_SM4_DATA_INT = 0x3,
600 VKD3D_SM4_DATA_UINT = 0x4,
601 VKD3D_SM4_DATA_FLOAT = 0x5,
602 VKD3D_SM4_DATA_MIXED = 0x6,
603 VKD3D_SM4_DATA_DOUBLE = 0x7,
604 VKD3D_SM4_DATA_CONTINUED = 0x8,
605 VKD3D_SM4_DATA_UNUSED = 0x9,
606};
VKD3D_SM4_DATA_FLOAT
@ VKD3D_SM4_DATA_FLOAT
Definition: tpf.c:601
VKD3D_SM4_DATA_UINT
@ VKD3D_SM4_DATA_UINT
Definition: tpf.c:600
VKD3D_SM4_DATA_DOUBLE
@ VKD3D_SM4_DATA_DOUBLE
Definition: tpf.c:603
VKD3D_SM4_DATA_SNORM
@ VKD3D_SM4_DATA_SNORM
Definition: tpf.c:598
VKD3D_SM4_DATA_UNUSED
@ VKD3D_SM4_DATA_UNUSED
Definition: tpf.c:605
VKD3D_SM4_DATA_CONTINUED
@ VKD3D_SM4_DATA_CONTINUED
Definition: tpf.c:604
VKD3D_SM4_DATA_INT
@ VKD3D_SM4_DATA_INT
Definition: tpf.c:599
VKD3D_SM4_DATA_UNORM
@ VKD3D_SM4_DATA_UNORM
Definition: tpf.c:597
VKD3D_SM4_DATA_MIXED
@ VKD3D_SM4_DATA_MIXED
Definition: tpf.c:602

◆ vkd3d_sm4_dimension

enum vkd3d_sm4_dimension
Enumerator
VKD3D_SM4_DIMENSION_NONE 
VKD3D_SM4_DIMENSION_SCALAR 
VKD3D_SM4_DIMENSION_VEC4 

Definition at line 540 of file tpf.c.

541{
542 VKD3D_SM4_DIMENSION_NONE = 0x0,
543 VKD3D_SM4_DIMENSION_SCALAR = 0x1,
544 VKD3D_SM4_DIMENSION_VEC4 = 0x2,
545};
VKD3D_SM4_DIMENSION_VEC4
@ VKD3D_SM4_DIMENSION_VEC4
Definition: tpf.c:544
VKD3D_SM4_DIMENSION_NONE
@ VKD3D_SM4_DIMENSION_NONE
Definition: tpf.c:542
VKD3D_SM4_DIMENSION_SCALAR
@ VKD3D_SM4_DIMENSION_SCALAR
Definition: tpf.c:543

◆ vkd3d_sm4_extended_operand_type

enum vkd3d_sm4_extended_operand_type
Enumerator
VKD3D_SM4_EXTENDED_OPERAND_NONE 
VKD3D_SM4_EXTENDED_OPERAND_MODIFIER 

Definition at line 459 of file tpf.c.

460{
461 VKD3D_SM4_EXTENDED_OPERAND_NONE = 0x0,
462 VKD3D_SM4_EXTENDED_OPERAND_MODIFIER = 0x1,
463};
VKD3D_SM4_EXTENDED_OPERAND_MODIFIER
@ VKD3D_SM4_EXTENDED_OPERAND_MODIFIER
Definition: tpf.c:462
VKD3D_SM4_EXTENDED_OPERAND_NONE
@ VKD3D_SM4_EXTENDED_OPERAND_NONE
Definition: tpf.c:461

◆ vkd3d_sm4_input_primitive_type

enum vkd3d_sm4_input_primitive_type
Enumerator
VKD3D_SM4_INPUT_PT_POINT 
VKD3D_SM4_INPUT_PT_LINE 
VKD3D_SM4_INPUT_PT_TRIANGLE 
VKD3D_SM4_INPUT_PT_LINEADJ 
VKD3D_SM4_INPUT_PT_TRIANGLEADJ 
VKD3D_SM5_INPUT_PT_PATCH1 
VKD3D_SM5_INPUT_PT_PATCH2 
VKD3D_SM5_INPUT_PT_PATCH3 
VKD3D_SM5_INPUT_PT_PATCH4 
VKD3D_SM5_INPUT_PT_PATCH5 
VKD3D_SM5_INPUT_PT_PATCH6 
VKD3D_SM5_INPUT_PT_PATCH7 
VKD3D_SM5_INPUT_PT_PATCH8 
VKD3D_SM5_INPUT_PT_PATCH9 
VKD3D_SM5_INPUT_PT_PATCH10 
VKD3D_SM5_INPUT_PT_PATCH11 
VKD3D_SM5_INPUT_PT_PATCH12 
VKD3D_SM5_INPUT_PT_PATCH13 
VKD3D_SM5_INPUT_PT_PATCH14 
VKD3D_SM5_INPUT_PT_PATCH15 
VKD3D_SM5_INPUT_PT_PATCH16 
VKD3D_SM5_INPUT_PT_PATCH17 
VKD3D_SM5_INPUT_PT_PATCH18 
VKD3D_SM5_INPUT_PT_PATCH19 
VKD3D_SM5_INPUT_PT_PATCH20 
VKD3D_SM5_INPUT_PT_PATCH21 
VKD3D_SM5_INPUT_PT_PATCH22 
VKD3D_SM5_INPUT_PT_PATCH23 
VKD3D_SM5_INPUT_PT_PATCH24 
VKD3D_SM5_INPUT_PT_PATCH25 
VKD3D_SM5_INPUT_PT_PATCH26 
VKD3D_SM5_INPUT_PT_PATCH27 
VKD3D_SM5_INPUT_PT_PATCH28 
VKD3D_SM5_INPUT_PT_PATCH29 
VKD3D_SM5_INPUT_PT_PATCH30 
VKD3D_SM5_INPUT_PT_PATCH31 
VKD3D_SM5_INPUT_PT_PATCH32 

Definition at line 489 of file tpf.c.

490{
491 VKD3D_SM4_INPUT_PT_POINT = 0x01,
492 VKD3D_SM4_INPUT_PT_LINE = 0x02,
493 VKD3D_SM4_INPUT_PT_TRIANGLE = 0x03,
494 VKD3D_SM4_INPUT_PT_LINEADJ = 0x06,
495 VKD3D_SM4_INPUT_PT_TRIANGLEADJ = 0x07,
496 VKD3D_SM5_INPUT_PT_PATCH1 = 0x08,
497 VKD3D_SM5_INPUT_PT_PATCH2 = 0x09,
498 VKD3D_SM5_INPUT_PT_PATCH3 = 0x0a,
499 VKD3D_SM5_INPUT_PT_PATCH4 = 0x0b,
500 VKD3D_SM5_INPUT_PT_PATCH5 = 0x0c,
501 VKD3D_SM5_INPUT_PT_PATCH6 = 0x0d,
502 VKD3D_SM5_INPUT_PT_PATCH7 = 0x0e,
503 VKD3D_SM5_INPUT_PT_PATCH8 = 0x0f,
504 VKD3D_SM5_INPUT_PT_PATCH9 = 0x10,
505 VKD3D_SM5_INPUT_PT_PATCH10 = 0x11,
506 VKD3D_SM5_INPUT_PT_PATCH11 = 0x12,
507 VKD3D_SM5_INPUT_PT_PATCH12 = 0x13,
508 VKD3D_SM5_INPUT_PT_PATCH13 = 0x14,
509 VKD3D_SM5_INPUT_PT_PATCH14 = 0x15,
510 VKD3D_SM5_INPUT_PT_PATCH15 = 0x16,
511 VKD3D_SM5_INPUT_PT_PATCH16 = 0x17,
512 VKD3D_SM5_INPUT_PT_PATCH17 = 0x18,
513 VKD3D_SM5_INPUT_PT_PATCH18 = 0x19,
514 VKD3D_SM5_INPUT_PT_PATCH19 = 0x1a,
515 VKD3D_SM5_INPUT_PT_PATCH20 = 0x1b,
516 VKD3D_SM5_INPUT_PT_PATCH21 = 0x1c,
517 VKD3D_SM5_INPUT_PT_PATCH22 = 0x1d,
518 VKD3D_SM5_INPUT_PT_PATCH23 = 0x1e,
519 VKD3D_SM5_INPUT_PT_PATCH24 = 0x1f,
520 VKD3D_SM5_INPUT_PT_PATCH25 = 0x20,
521 VKD3D_SM5_INPUT_PT_PATCH26 = 0x21,
522 VKD3D_SM5_INPUT_PT_PATCH27 = 0x22,
523 VKD3D_SM5_INPUT_PT_PATCH28 = 0x23,
524 VKD3D_SM5_INPUT_PT_PATCH29 = 0x24,
525 VKD3D_SM5_INPUT_PT_PATCH30 = 0x25,
526 VKD3D_SM5_INPUT_PT_PATCH31 = 0x26,
527 VKD3D_SM5_INPUT_PT_PATCH32 = 0x27,
528};
VKD3D_SM5_INPUT_PT_PATCH27
@ VKD3D_SM5_INPUT_PT_PATCH27
Definition: tpf.c:522
VKD3D_SM5_INPUT_PT_PATCH4
@ VKD3D_SM5_INPUT_PT_PATCH4
Definition: tpf.c:499
VKD3D_SM5_INPUT_PT_PATCH14
@ VKD3D_SM5_INPUT_PT_PATCH14
Definition: tpf.c:509
VKD3D_SM5_INPUT_PT_PATCH2
@ VKD3D_SM5_INPUT_PT_PATCH2
Definition: tpf.c:497
VKD3D_SM5_INPUT_PT_PATCH12
@ VKD3D_SM5_INPUT_PT_PATCH12
Definition: tpf.c:507
VKD3D_SM5_INPUT_PT_PATCH21
@ VKD3D_SM5_INPUT_PT_PATCH21
Definition: tpf.c:516
VKD3D_SM5_INPUT_PT_PATCH10
@ VKD3D_SM5_INPUT_PT_PATCH10
Definition: tpf.c:505
VKD3D_SM5_INPUT_PT_PATCH22
@ VKD3D_SM5_INPUT_PT_PATCH22
Definition: tpf.c:517
VKD3D_SM4_INPUT_PT_LINE
@ VKD3D_SM4_INPUT_PT_LINE
Definition: tpf.c:492
VKD3D_SM5_INPUT_PT_PATCH13
@ VKD3D_SM5_INPUT_PT_PATCH13
Definition: tpf.c:508
VKD3D_SM5_INPUT_PT_PATCH8
@ VKD3D_SM5_INPUT_PT_PATCH8
Definition: tpf.c:503
VKD3D_SM5_INPUT_PT_PATCH16
@ VKD3D_SM5_INPUT_PT_PATCH16
Definition: tpf.c:511
VKD3D_SM5_INPUT_PT_PATCH28
@ VKD3D_SM5_INPUT_PT_PATCH28
Definition: tpf.c:523
VKD3D_SM5_INPUT_PT_PATCH5
@ VKD3D_SM5_INPUT_PT_PATCH5
Definition: tpf.c:500
VKD3D_SM5_INPUT_PT_PATCH15
@ VKD3D_SM5_INPUT_PT_PATCH15
Definition: tpf.c:510
VKD3D_SM4_INPUT_PT_LINEADJ
@ VKD3D_SM4_INPUT_PT_LINEADJ
Definition: tpf.c:494
VKD3D_SM5_INPUT_PT_PATCH20
@ VKD3D_SM5_INPUT_PT_PATCH20
Definition: tpf.c:515
VKD3D_SM5_INPUT_PT_PATCH6
@ VKD3D_SM5_INPUT_PT_PATCH6
Definition: tpf.c:501
VKD3D_SM5_INPUT_PT_PATCH29
@ VKD3D_SM5_INPUT_PT_PATCH29
Definition: tpf.c:524
VKD3D_SM5_INPUT_PT_PATCH11
@ VKD3D_SM5_INPUT_PT_PATCH11
Definition: tpf.c:506
VKD3D_SM5_INPUT_PT_PATCH7
@ VKD3D_SM5_INPUT_PT_PATCH7
Definition: tpf.c:502
VKD3D_SM5_INPUT_PT_PATCH1
@ VKD3D_SM5_INPUT_PT_PATCH1
Definition: tpf.c:496
VKD3D_SM5_INPUT_PT_PATCH3
@ VKD3D_SM5_INPUT_PT_PATCH3
Definition: tpf.c:498
VKD3D_SM5_INPUT_PT_PATCH18
@ VKD3D_SM5_INPUT_PT_PATCH18
Definition: tpf.c:513
VKD3D_SM5_INPUT_PT_PATCH32
@ VKD3D_SM5_INPUT_PT_PATCH32
Definition: tpf.c:527
VKD3D_SM5_INPUT_PT_PATCH25
@ VKD3D_SM5_INPUT_PT_PATCH25
Definition: tpf.c:520
VKD3D_SM5_INPUT_PT_PATCH9
@ VKD3D_SM5_INPUT_PT_PATCH9
Definition: tpf.c:504
VKD3D_SM5_INPUT_PT_PATCH17
@ VKD3D_SM5_INPUT_PT_PATCH17
Definition: tpf.c:512
VKD3D_SM5_INPUT_PT_PATCH19
@ VKD3D_SM5_INPUT_PT_PATCH19
Definition: tpf.c:514
VKD3D_SM4_INPUT_PT_POINT
@ VKD3D_SM4_INPUT_PT_POINT
Definition: tpf.c:491
VKD3D_SM4_INPUT_PT_TRIANGLE
@ VKD3D_SM4_INPUT_PT_TRIANGLE
Definition: tpf.c:493
VKD3D_SM5_INPUT_PT_PATCH23
@ VKD3D_SM5_INPUT_PT_PATCH23
Definition: tpf.c:518
VKD3D_SM5_INPUT_PT_PATCH30
@ VKD3D_SM5_INPUT_PT_PATCH30
Definition: tpf.c:525
VKD3D_SM5_INPUT_PT_PATCH31
@ VKD3D_SM5_INPUT_PT_PATCH31
Definition: tpf.c:526
VKD3D_SM5_INPUT_PT_PATCH24
@ VKD3D_SM5_INPUT_PT_PATCH24
Definition: tpf.c:519
VKD3D_SM5_INPUT_PT_PATCH26
@ VKD3D_SM5_INPUT_PT_PATCH26
Definition: tpf.c:521
VKD3D_SM4_INPUT_PT_TRIANGLEADJ
@ VKD3D_SM4_INPUT_PT_TRIANGLEADJ
Definition: tpf.c:495

◆ vkd3d_sm4_instruction_modifier

enum vkd3d_sm4_instruction_modifier
Enumerator
VKD3D_SM4_MODIFIER_AOFFIMMI 
VKD3D_SM5_MODIFIER_RESOURCE_TYPE 
VKD3D_SM5_MODIFIER_DATA_TYPE 

Definition at line 410 of file tpf.c.

411{
412 VKD3D_SM4_MODIFIER_AOFFIMMI = 0x1,
413 VKD3D_SM5_MODIFIER_RESOURCE_TYPE = 0x2,
414 VKD3D_SM5_MODIFIER_DATA_TYPE = 0x3,
415};
VKD3D_SM4_MODIFIER_AOFFIMMI
@ VKD3D_SM4_MODIFIER_AOFFIMMI
Definition: tpf.c:412
VKD3D_SM5_MODIFIER_DATA_TYPE
@ VKD3D_SM5_MODIFIER_DATA_TYPE
Definition: tpf.c:414
VKD3D_SM5_MODIFIER_RESOURCE_TYPE
@ VKD3D_SM5_MODIFIER_RESOURCE_TYPE
Definition: tpf.c:413

◆ vkd3d_sm4_opcode

enum vkd3d_sm4_opcode
Enumerator
VKD3D_SM4_OP_ADD 
VKD3D_SM4_OP_AND 
VKD3D_SM4_OP_BREAK 
VKD3D_SM4_OP_BREAKC 
VKD3D_SM4_OP_CASE 
VKD3D_SM4_OP_CONTINUE 
VKD3D_SM4_OP_CONTINUEC 
VKD3D_SM4_OP_CUT 
VKD3D_SM4_OP_DEFAULT 
VKD3D_SM4_OP_DERIV_RTX 
VKD3D_SM4_OP_DERIV_RTY 
VKD3D_SM4_OP_DISCARD 
VKD3D_SM4_OP_DIV 
VKD3D_SM4_OP_DP2 
VKD3D_SM4_OP_DP3 
VKD3D_SM4_OP_DP4 
VKD3D_SM4_OP_ELSE 
VKD3D_SM4_OP_EMIT 
VKD3D_SM4_OP_ENDIF 
VKD3D_SM4_OP_ENDLOOP 
VKD3D_SM4_OP_ENDSWITCH 
VKD3D_SM4_OP_EQ 
VKD3D_SM4_OP_EXP 
VKD3D_SM4_OP_FRC 
VKD3D_SM4_OP_FTOI 
VKD3D_SM4_OP_FTOU 
VKD3D_SM4_OP_GE 
VKD3D_SM4_OP_IADD 
VKD3D_SM4_OP_IF 
VKD3D_SM4_OP_IEQ 
VKD3D_SM4_OP_IGE 
VKD3D_SM4_OP_ILT 
VKD3D_SM4_OP_IMAD 
VKD3D_SM4_OP_IMAX 
VKD3D_SM4_OP_IMIN 
VKD3D_SM4_OP_IMUL 
VKD3D_SM4_OP_INE 
VKD3D_SM4_OP_INEG 
VKD3D_SM4_OP_ISHL 
VKD3D_SM4_OP_ISHR 
VKD3D_SM4_OP_ITOF 
VKD3D_SM4_OP_LABEL 
VKD3D_SM4_OP_LD 
VKD3D_SM4_OP_LD2DMS 
VKD3D_SM4_OP_LOG 
VKD3D_SM4_OP_LOOP 
VKD3D_SM4_OP_LT 
VKD3D_SM4_OP_MAD 
VKD3D_SM4_OP_MIN 
VKD3D_SM4_OP_MAX 
VKD3D_SM4_OP_SHADER_DATA 
VKD3D_SM4_OP_MOV 
VKD3D_SM4_OP_MOVC 
VKD3D_SM4_OP_MUL 
VKD3D_SM4_OP_NE 
VKD3D_SM4_OP_NOP 
VKD3D_SM4_OP_NOT 
VKD3D_SM4_OP_OR 
VKD3D_SM4_OP_RESINFO 
VKD3D_SM4_OP_RET 
VKD3D_SM4_OP_RETC 
VKD3D_SM4_OP_ROUND_NE 
VKD3D_SM4_OP_ROUND_NI 
VKD3D_SM4_OP_ROUND_PI 
VKD3D_SM4_OP_ROUND_Z 
VKD3D_SM4_OP_RSQ 
VKD3D_SM4_OP_SAMPLE 
VKD3D_SM4_OP_SAMPLE_C 
VKD3D_SM4_OP_SAMPLE_C_LZ 
VKD3D_SM4_OP_SAMPLE_LOD 
VKD3D_SM4_OP_SAMPLE_GRAD 
VKD3D_SM4_OP_SAMPLE_B 
VKD3D_SM4_OP_SQRT 
VKD3D_SM4_OP_SWITCH 
VKD3D_SM4_OP_SINCOS 
VKD3D_SM4_OP_UDIV 
VKD3D_SM4_OP_ULT 
VKD3D_SM4_OP_UGE 
VKD3D_SM4_OP_UMUL 
VKD3D_SM4_OP_UMAX 
VKD3D_SM4_OP_UMIN 
VKD3D_SM4_OP_USHR 
VKD3D_SM4_OP_UTOF 
VKD3D_SM4_OP_XOR 
VKD3D_SM4_OP_DCL_RESOURCE 
VKD3D_SM4_OP_DCL_CONSTANT_BUFFER 
VKD3D_SM4_OP_DCL_SAMPLER 
VKD3D_SM4_OP_DCL_INDEX_RANGE 
VKD3D_SM4_OP_DCL_OUTPUT_TOPOLOGY 
VKD3D_SM4_OP_DCL_INPUT_PRIMITIVE 
VKD3D_SM4_OP_DCL_VERTICES_OUT 
VKD3D_SM4_OP_DCL_INPUT 
VKD3D_SM4_OP_DCL_INPUT_SGV 
VKD3D_SM4_OP_DCL_INPUT_SIV 
VKD3D_SM4_OP_DCL_INPUT_PS 
VKD3D_SM4_OP_DCL_INPUT_PS_SGV 
VKD3D_SM4_OP_DCL_INPUT_PS_SIV 
VKD3D_SM4_OP_DCL_OUTPUT 
VKD3D_SM4_OP_DCL_OUTPUT_SIV 
VKD3D_SM4_OP_DCL_TEMPS 
VKD3D_SM4_OP_DCL_INDEXABLE_TEMP 
VKD3D_SM4_OP_DCL_GLOBAL_FLAGS 
VKD3D_SM4_OP_LOD 
VKD3D_SM4_OP_GATHER4 
VKD3D_SM4_OP_SAMPLE_POS 
VKD3D_SM4_OP_SAMPLE_INFO 
VKD3D_SM5_OP_HS_DECLS 
VKD3D_SM5_OP_HS_CONTROL_POINT_PHASE 
VKD3D_SM5_OP_HS_FORK_PHASE 
VKD3D_SM5_OP_HS_JOIN_PHASE 
VKD3D_SM5_OP_EMIT_STREAM 
VKD3D_SM5_OP_CUT_STREAM 
VKD3D_SM5_OP_FCALL 
VKD3D_SM5_OP_BUFINFO 
VKD3D_SM5_OP_DERIV_RTX_COARSE 
VKD3D_SM5_OP_DERIV_RTX_FINE 
VKD3D_SM5_OP_DERIV_RTY_COARSE 
VKD3D_SM5_OP_DERIV_RTY_FINE 
VKD3D_SM5_OP_GATHER4_C 
VKD3D_SM5_OP_GATHER4_PO 
VKD3D_SM5_OP_GATHER4_PO_C 
VKD3D_SM5_OP_RCP 
VKD3D_SM5_OP_F32TOF16 
VKD3D_SM5_OP_F16TOF32 
VKD3D_SM5_OP_COUNTBITS 
VKD3D_SM5_OP_FIRSTBIT_HI 
VKD3D_SM5_OP_FIRSTBIT_LO 
VKD3D_SM5_OP_FIRSTBIT_SHI 
VKD3D_SM5_OP_UBFE 
VKD3D_SM5_OP_IBFE 
VKD3D_SM5_OP_BFI 
VKD3D_SM5_OP_BFREV 
VKD3D_SM5_OP_SWAPC 
VKD3D_SM5_OP_DCL_STREAM 
VKD3D_SM5_OP_DCL_FUNCTION_BODY 
VKD3D_SM5_OP_DCL_FUNCTION_TABLE 
VKD3D_SM5_OP_DCL_INTERFACE 
VKD3D_SM5_OP_DCL_INPUT_CONTROL_POINT_COUNT 
VKD3D_SM5_OP_DCL_OUTPUT_CONTROL_POINT_COUNT 
VKD3D_SM5_OP_DCL_TESSELLATOR_DOMAIN 
VKD3D_SM5_OP_DCL_TESSELLATOR_PARTITIONING 
VKD3D_SM5_OP_DCL_TESSELLATOR_OUTPUT_PRIMITIVE 
VKD3D_SM5_OP_DCL_HS_MAX_TESSFACTOR 
VKD3D_SM5_OP_DCL_HS_FORK_PHASE_INSTANCE_COUNT 
VKD3D_SM5_OP_DCL_HS_JOIN_PHASE_INSTANCE_COUNT 
VKD3D_SM5_OP_DCL_THREAD_GROUP 
VKD3D_SM5_OP_DCL_UAV_TYPED 
VKD3D_SM5_OP_DCL_UAV_RAW 
VKD3D_SM5_OP_DCL_UAV_STRUCTURED 
VKD3D_SM5_OP_DCL_TGSM_RAW 
VKD3D_SM5_OP_DCL_TGSM_STRUCTURED 
VKD3D_SM5_OP_DCL_RESOURCE_RAW 
VKD3D_SM5_OP_DCL_RESOURCE_STRUCTURED 
VKD3D_SM5_OP_LD_UAV_TYPED 
VKD3D_SM5_OP_STORE_UAV_TYPED 
VKD3D_SM5_OP_LD_RAW 
VKD3D_SM5_OP_STORE_RAW 
VKD3D_SM5_OP_LD_STRUCTURED 
VKD3D_SM5_OP_STORE_STRUCTURED 
VKD3D_SM5_OP_ATOMIC_AND 
VKD3D_SM5_OP_ATOMIC_OR 
VKD3D_SM5_OP_ATOMIC_XOR 
VKD3D_SM5_OP_ATOMIC_CMP_STORE 
VKD3D_SM5_OP_ATOMIC_IADD 
VKD3D_SM5_OP_ATOMIC_IMAX 
VKD3D_SM5_OP_ATOMIC_IMIN 
VKD3D_SM5_OP_ATOMIC_UMAX 
VKD3D_SM5_OP_ATOMIC_UMIN 
VKD3D_SM5_OP_IMM_ATOMIC_ALLOC 
VKD3D_SM5_OP_IMM_ATOMIC_CONSUME 
VKD3D_SM5_OP_IMM_ATOMIC_IADD 
VKD3D_SM5_OP_IMM_ATOMIC_AND 
VKD3D_SM5_OP_IMM_ATOMIC_OR 
VKD3D_SM5_OP_IMM_ATOMIC_XOR 
VKD3D_SM5_OP_IMM_ATOMIC_EXCH 
VKD3D_SM5_OP_IMM_ATOMIC_CMP_EXCH 
VKD3D_SM5_OP_IMM_ATOMIC_IMAX 
VKD3D_SM5_OP_IMM_ATOMIC_IMIN 
VKD3D_SM5_OP_IMM_ATOMIC_UMAX 
VKD3D_SM5_OP_IMM_ATOMIC_UMIN 
VKD3D_SM5_OP_SYNC 
VKD3D_SM5_OP_DADD 
VKD3D_SM5_OP_DMAX 
VKD3D_SM5_OP_DMIN 
VKD3D_SM5_OP_DMUL 
VKD3D_SM5_OP_DEQ 
VKD3D_SM5_OP_DGE 
VKD3D_SM5_OP_DLT 
VKD3D_SM5_OP_DNE 
VKD3D_SM5_OP_DMOV 
VKD3D_SM5_OP_DMOVC 
VKD3D_SM5_OP_DTOF 
VKD3D_SM5_OP_FTOD 
VKD3D_SM5_OP_EVAL_SAMPLE_INDEX 
VKD3D_SM5_OP_EVAL_CENTROID 
VKD3D_SM5_OP_DCL_GS_INSTANCES 
VKD3D_SM5_OP_DDIV 
VKD3D_SM5_OP_DFMA 
VKD3D_SM5_OP_DRCP 
VKD3D_SM5_OP_MSAD 
VKD3D_SM5_OP_DTOI 
VKD3D_SM5_OP_DTOU 
VKD3D_SM5_OP_ITOD 
VKD3D_SM5_OP_UTOD 
VKD3D_SM5_OP_GATHER4_S 
VKD3D_SM5_OP_GATHER4_C_S 
VKD3D_SM5_OP_GATHER4_PO_S 
VKD3D_SM5_OP_GATHER4_PO_C_S 
VKD3D_SM5_OP_LD_S 
VKD3D_SM5_OP_LD2DMS_S 
VKD3D_SM5_OP_LD_UAV_TYPED_S 
VKD3D_SM5_OP_LD_RAW_S 
VKD3D_SM5_OP_LD_STRUCTURED_S 
VKD3D_SM5_OP_SAMPLE_LOD_S 
VKD3D_SM5_OP_SAMPLE_C_LZ_S 
VKD3D_SM5_OP_SAMPLE_CL_S 
VKD3D_SM5_OP_SAMPLE_B_CL_S 
VKD3D_SM5_OP_SAMPLE_GRAD_CL_S 
VKD3D_SM5_OP_SAMPLE_C_CL_S 
VKD3D_SM5_OP_CHECK_ACCESS_FULLY_MAPPED 
VKD3D_SM4_OP_COUNT 

Definition at line 184 of file tpf.c.

185{
186 VKD3D_SM4_OP_ADD = 0x00,
187 VKD3D_SM4_OP_AND = 0x01,
188 VKD3D_SM4_OP_BREAK = 0x02,
189 VKD3D_SM4_OP_BREAKC = 0x03,
190 VKD3D_SM4_OP_CASE = 0x06,
191 VKD3D_SM4_OP_CONTINUE = 0x07,
192 VKD3D_SM4_OP_CONTINUEC = 0x08,
193 VKD3D_SM4_OP_CUT = 0x09,
194 VKD3D_SM4_OP_DEFAULT = 0x0a,
195 VKD3D_SM4_OP_DERIV_RTX = 0x0b,
196 VKD3D_SM4_OP_DERIV_RTY = 0x0c,
197 VKD3D_SM4_OP_DISCARD = 0x0d,
198 VKD3D_SM4_OP_DIV = 0x0e,
199 VKD3D_SM4_OP_DP2 = 0x0f,
200 VKD3D_SM4_OP_DP3 = 0x10,
201 VKD3D_SM4_OP_DP4 = 0x11,
202 VKD3D_SM4_OP_ELSE = 0x12,
203 VKD3D_SM4_OP_EMIT = 0x13,
204 VKD3D_SM4_OP_ENDIF = 0x15,
205 VKD3D_SM4_OP_ENDLOOP = 0x16,
206 VKD3D_SM4_OP_ENDSWITCH = 0x17,
207 VKD3D_SM4_OP_EQ = 0x18,
208 VKD3D_SM4_OP_EXP = 0x19,
209 VKD3D_SM4_OP_FRC = 0x1a,
210 VKD3D_SM4_OP_FTOI = 0x1b,
211 VKD3D_SM4_OP_FTOU = 0x1c,
212 VKD3D_SM4_OP_GE = 0x1d,
213 VKD3D_SM4_OP_IADD = 0x1e,
214 VKD3D_SM4_OP_IF = 0x1f,
215 VKD3D_SM4_OP_IEQ = 0x20,
216 VKD3D_SM4_OP_IGE = 0x21,
217 VKD3D_SM4_OP_ILT = 0x22,
218 VKD3D_SM4_OP_IMAD = 0x23,
219 VKD3D_SM4_OP_IMAX = 0x24,
220 VKD3D_SM4_OP_IMIN = 0x25,
221 VKD3D_SM4_OP_IMUL = 0x26,
222 VKD3D_SM4_OP_INE = 0x27,
223 VKD3D_SM4_OP_INEG = 0x28,
224 VKD3D_SM4_OP_ISHL = 0x29,
225 VKD3D_SM4_OP_ISHR = 0x2a,
226 VKD3D_SM4_OP_ITOF = 0x2b,
227 VKD3D_SM4_OP_LABEL = 0x2c,
228 VKD3D_SM4_OP_LD = 0x2d,
229 VKD3D_SM4_OP_LD2DMS = 0x2e,
230 VKD3D_SM4_OP_LOG = 0x2f,
231 VKD3D_SM4_OP_LOOP = 0x30,
232 VKD3D_SM4_OP_LT = 0x31,
233 VKD3D_SM4_OP_MAD = 0x32,
234 VKD3D_SM4_OP_MIN = 0x33,
235 VKD3D_SM4_OP_MAX = 0x34,
236 VKD3D_SM4_OP_SHADER_DATA = 0x35,
237 VKD3D_SM4_OP_MOV = 0x36,
238 VKD3D_SM4_OP_MOVC = 0x37,
239 VKD3D_SM4_OP_MUL = 0x38,
240 VKD3D_SM4_OP_NE = 0x39,
241 VKD3D_SM4_OP_NOP = 0x3a,
242 VKD3D_SM4_OP_NOT = 0x3b,
243 VKD3D_SM4_OP_OR = 0x3c,
244 VKD3D_SM4_OP_RESINFO = 0x3d,
245 VKD3D_SM4_OP_RET = 0x3e,
246 VKD3D_SM4_OP_RETC = 0x3f,
247 VKD3D_SM4_OP_ROUND_NE = 0x40,
248 VKD3D_SM4_OP_ROUND_NI = 0x41,
249 VKD3D_SM4_OP_ROUND_PI = 0x42,
250 VKD3D_SM4_OP_ROUND_Z = 0x43,
251 VKD3D_SM4_OP_RSQ = 0x44,
252 VKD3D_SM4_OP_SAMPLE = 0x45,
253 VKD3D_SM4_OP_SAMPLE_C = 0x46,
254 VKD3D_SM4_OP_SAMPLE_C_LZ = 0x47,
255 VKD3D_SM4_OP_SAMPLE_LOD = 0x48,
256 VKD3D_SM4_OP_SAMPLE_GRAD = 0x49,
257 VKD3D_SM4_OP_SAMPLE_B = 0x4a,
258 VKD3D_SM4_OP_SQRT = 0x4b,
259 VKD3D_SM4_OP_SWITCH = 0x4c,
260 VKD3D_SM4_OP_SINCOS = 0x4d,
261 VKD3D_SM4_OP_UDIV = 0x4e,
262 VKD3D_SM4_OP_ULT = 0x4f,
263 VKD3D_SM4_OP_UGE = 0x50,
264 VKD3D_SM4_OP_UMUL = 0x51,
265 VKD3D_SM4_OP_UMAX = 0x53,
266 VKD3D_SM4_OP_UMIN = 0x54,
267 VKD3D_SM4_OP_USHR = 0x55,
268 VKD3D_SM4_OP_UTOF = 0x56,
269 VKD3D_SM4_OP_XOR = 0x57,
270 VKD3D_SM4_OP_DCL_RESOURCE = 0x58,
271 VKD3D_SM4_OP_DCL_CONSTANT_BUFFER = 0x59,
272 VKD3D_SM4_OP_DCL_SAMPLER = 0x5a,
273 VKD3D_SM4_OP_DCL_INDEX_RANGE = 0x5b,
274 VKD3D_SM4_OP_DCL_OUTPUT_TOPOLOGY = 0x5c,
275 VKD3D_SM4_OP_DCL_INPUT_PRIMITIVE = 0x5d,
276 VKD3D_SM4_OP_DCL_VERTICES_OUT = 0x5e,
277 VKD3D_SM4_OP_DCL_INPUT = 0x5f,
278 VKD3D_SM4_OP_DCL_INPUT_SGV = 0x60,
279 VKD3D_SM4_OP_DCL_INPUT_SIV = 0x61,
280 VKD3D_SM4_OP_DCL_INPUT_PS = 0x62,
281 VKD3D_SM4_OP_DCL_INPUT_PS_SGV = 0x63,
282 VKD3D_SM4_OP_DCL_INPUT_PS_SIV = 0x64,
283 VKD3D_SM4_OP_DCL_OUTPUT = 0x65,
284 VKD3D_SM4_OP_DCL_OUTPUT_SIV = 0x67,
285 VKD3D_SM4_OP_DCL_TEMPS = 0x68,
286 VKD3D_SM4_OP_DCL_INDEXABLE_TEMP = 0x69,
287 VKD3D_SM4_OP_DCL_GLOBAL_FLAGS = 0x6a,
288 VKD3D_SM4_OP_LOD = 0x6c,
289 VKD3D_SM4_OP_GATHER4 = 0x6d,
290 VKD3D_SM4_OP_SAMPLE_POS = 0x6e,
291 VKD3D_SM4_OP_SAMPLE_INFO = 0x6f,
292 VKD3D_SM5_OP_HS_DECLS = 0x71,
293 VKD3D_SM5_OP_HS_CONTROL_POINT_PHASE = 0x72,
294 VKD3D_SM5_OP_HS_FORK_PHASE = 0x73,
295 VKD3D_SM5_OP_HS_JOIN_PHASE = 0x74,
296 VKD3D_SM5_OP_EMIT_STREAM = 0x75,
297 VKD3D_SM5_OP_CUT_STREAM = 0x76,
298 VKD3D_SM5_OP_FCALL = 0x78,
299 VKD3D_SM5_OP_BUFINFO = 0x79,
300 VKD3D_SM5_OP_DERIV_RTX_COARSE = 0x7a,
301 VKD3D_SM5_OP_DERIV_RTX_FINE = 0x7b,
302 VKD3D_SM5_OP_DERIV_RTY_COARSE = 0x7c,
303 VKD3D_SM5_OP_DERIV_RTY_FINE = 0x7d,
304 VKD3D_SM5_OP_GATHER4_C = 0x7e,
305 VKD3D_SM5_OP_GATHER4_PO = 0x7f,
306 VKD3D_SM5_OP_GATHER4_PO_C = 0x80,
307 VKD3D_SM5_OP_RCP = 0x81,
308 VKD3D_SM5_OP_F32TOF16 = 0x82,
309 VKD3D_SM5_OP_F16TOF32 = 0x83,
310 VKD3D_SM5_OP_COUNTBITS = 0x86,
311 VKD3D_SM5_OP_FIRSTBIT_HI = 0x87,
312 VKD3D_SM5_OP_FIRSTBIT_LO = 0x88,
313 VKD3D_SM5_OP_FIRSTBIT_SHI = 0x89,
314 VKD3D_SM5_OP_UBFE = 0x8a,
315 VKD3D_SM5_OP_IBFE = 0x8b,
316 VKD3D_SM5_OP_BFI = 0x8c,
317 VKD3D_SM5_OP_BFREV = 0x8d,
318 VKD3D_SM5_OP_SWAPC = 0x8e,
319 VKD3D_SM5_OP_DCL_STREAM = 0x8f,
320 VKD3D_SM5_OP_DCL_FUNCTION_BODY = 0x90,
321 VKD3D_SM5_OP_DCL_FUNCTION_TABLE = 0x91,
322 VKD3D_SM5_OP_DCL_INTERFACE = 0x92,
323 VKD3D_SM5_OP_DCL_INPUT_CONTROL_POINT_COUNT = 0x93,
324 VKD3D_SM5_OP_DCL_OUTPUT_CONTROL_POINT_COUNT = 0x94,
325 VKD3D_SM5_OP_DCL_TESSELLATOR_DOMAIN = 0x95,
326 VKD3D_SM5_OP_DCL_TESSELLATOR_PARTITIONING = 0x96,
327 VKD3D_SM5_OP_DCL_TESSELLATOR_OUTPUT_PRIMITIVE = 0x97,
328 VKD3D_SM5_OP_DCL_HS_MAX_TESSFACTOR = 0x98,
329 VKD3D_SM5_OP_DCL_HS_FORK_PHASE_INSTANCE_COUNT = 0x99,
330 VKD3D_SM5_OP_DCL_HS_JOIN_PHASE_INSTANCE_COUNT = 0x9a,
331 VKD3D_SM5_OP_DCL_THREAD_GROUP = 0x9b,
332 VKD3D_SM5_OP_DCL_UAV_TYPED = 0x9c,
333 VKD3D_SM5_OP_DCL_UAV_RAW = 0x9d,
334 VKD3D_SM5_OP_DCL_UAV_STRUCTURED = 0x9e,
335 VKD3D_SM5_OP_DCL_TGSM_RAW = 0x9f,
336 VKD3D_SM5_OP_DCL_TGSM_STRUCTURED = 0xa0,
337 VKD3D_SM5_OP_DCL_RESOURCE_RAW = 0xa1,
338 VKD3D_SM5_OP_DCL_RESOURCE_STRUCTURED = 0xa2,
339 VKD3D_SM5_OP_LD_UAV_TYPED = 0xa3,
340 VKD3D_SM5_OP_STORE_UAV_TYPED = 0xa4,
341 VKD3D_SM5_OP_LD_RAW = 0xa5,
342 VKD3D_SM5_OP_STORE_RAW = 0xa6,
343 VKD3D_SM5_OP_LD_STRUCTURED = 0xa7,
344 VKD3D_SM5_OP_STORE_STRUCTURED = 0xa8,
345 VKD3D_SM5_OP_ATOMIC_AND = 0xa9,
346 VKD3D_SM5_OP_ATOMIC_OR = 0xaa,
347 VKD3D_SM5_OP_ATOMIC_XOR = 0xab,
348 VKD3D_SM5_OP_ATOMIC_CMP_STORE = 0xac,
349 VKD3D_SM5_OP_ATOMIC_IADD = 0xad,
350 VKD3D_SM5_OP_ATOMIC_IMAX = 0xae,
351 VKD3D_SM5_OP_ATOMIC_IMIN = 0xaf,
352 VKD3D_SM5_OP_ATOMIC_UMAX = 0xb0,
353 VKD3D_SM5_OP_ATOMIC_UMIN = 0xb1,
354 VKD3D_SM5_OP_IMM_ATOMIC_ALLOC = 0xb2,
355 VKD3D_SM5_OP_IMM_ATOMIC_CONSUME = 0xb3,
356 VKD3D_SM5_OP_IMM_ATOMIC_IADD = 0xb4,
357 VKD3D_SM5_OP_IMM_ATOMIC_AND = 0xb5,
358 VKD3D_SM5_OP_IMM_ATOMIC_OR = 0xb6,
359 VKD3D_SM5_OP_IMM_ATOMIC_XOR = 0xb7,
360 VKD3D_SM5_OP_IMM_ATOMIC_EXCH = 0xb8,
361 VKD3D_SM5_OP_IMM_ATOMIC_CMP_EXCH = 0xb9,
362 VKD3D_SM5_OP_IMM_ATOMIC_IMAX = 0xba,
363 VKD3D_SM5_OP_IMM_ATOMIC_IMIN = 0xbb,
364 VKD3D_SM5_OP_IMM_ATOMIC_UMAX = 0xbc,
365 VKD3D_SM5_OP_IMM_ATOMIC_UMIN = 0xbd,
366 VKD3D_SM5_OP_SYNC = 0xbe,
367 VKD3D_SM5_OP_DADD = 0xbf,
368 VKD3D_SM5_OP_DMAX = 0xc0,
369 VKD3D_SM5_OP_DMIN = 0xc1,
370 VKD3D_SM5_OP_DMUL = 0xc2,
371 VKD3D_SM5_OP_DEQ = 0xc3,
372 VKD3D_SM5_OP_DGE = 0xc4,
373 VKD3D_SM5_OP_DLT = 0xc5,
374 VKD3D_SM5_OP_DNE = 0xc6,
375 VKD3D_SM5_OP_DMOV = 0xc7,
376 VKD3D_SM5_OP_DMOVC = 0xc8,
377 VKD3D_SM5_OP_DTOF = 0xc9,
378 VKD3D_SM5_OP_FTOD = 0xca,
379 VKD3D_SM5_OP_EVAL_SAMPLE_INDEX = 0xcc,
380 VKD3D_SM5_OP_EVAL_CENTROID = 0xcd,
381 VKD3D_SM5_OP_DCL_GS_INSTANCES = 0xce,
382 VKD3D_SM5_OP_DDIV = 0xd2,
383 VKD3D_SM5_OP_DFMA = 0xd3,
384 VKD3D_SM5_OP_DRCP = 0xd4,
385 VKD3D_SM5_OP_MSAD = 0xd5,
386 VKD3D_SM5_OP_DTOI = 0xd6,
387 VKD3D_SM5_OP_DTOU = 0xd7,
388 VKD3D_SM5_OP_ITOD = 0xd8,
389 VKD3D_SM5_OP_UTOD = 0xd9,
390 VKD3D_SM5_OP_GATHER4_S = 0xdb,
391 VKD3D_SM5_OP_GATHER4_C_S = 0xdc,
392 VKD3D_SM5_OP_GATHER4_PO_S = 0xdd,
393 VKD3D_SM5_OP_GATHER4_PO_C_S = 0xde,
394 VKD3D_SM5_OP_LD_S = 0xdf,
395 VKD3D_SM5_OP_LD2DMS_S = 0xe0,
396 VKD3D_SM5_OP_LD_UAV_TYPED_S = 0xe1,
397 VKD3D_SM5_OP_LD_RAW_S = 0xe2,
398 VKD3D_SM5_OP_LD_STRUCTURED_S = 0xe3,
399 VKD3D_SM5_OP_SAMPLE_LOD_S = 0xe4,
400 VKD3D_SM5_OP_SAMPLE_C_LZ_S = 0xe5,
401 VKD3D_SM5_OP_SAMPLE_CL_S = 0xe6,
402 VKD3D_SM5_OP_SAMPLE_B_CL_S = 0xe7,
403 VKD3D_SM5_OP_SAMPLE_GRAD_CL_S = 0xe8,
404 VKD3D_SM5_OP_SAMPLE_C_CL_S = 0xe9,
405 VKD3D_SM5_OP_CHECK_ACCESS_FULLY_MAPPED = 0xea,
406
407 VKD3D_SM4_OP_COUNT,
408};
VKD3D_SM5_OP_DCL_TESSELLATOR_PARTITIONING
@ VKD3D_SM5_OP_DCL_TESSELLATOR_PARTITIONING
Definition: tpf.c:326
VKD3D_SM4_OP_RESINFO
@ VKD3D_SM4_OP_RESINFO
Definition: tpf.c:244
VKD3D_SM5_OP_GATHER4_S
@ VKD3D_SM5_OP_GATHER4_S
Definition: tpf.c:390
VKD3D_SM4_OP_CONTINUEC
@ VKD3D_SM4_OP_CONTINUEC
Definition: tpf.c:192
VKD3D_SM5_OP_BFREV
@ VKD3D_SM5_OP_BFREV
Definition: tpf.c:317
VKD3D_SM4_OP_ROUND_Z
@ VKD3D_SM4_OP_ROUND_Z
Definition: tpf.c:250
VKD3D_SM4_OP_NOP
@ VKD3D_SM4_OP_NOP
Definition: tpf.c:241
VKD3D_SM5_OP_GATHER4_PO_C_S
@ VKD3D_SM5_OP_GATHER4_PO_C_S
Definition: tpf.c:393
VKD3D_SM4_OP_SAMPLE_B
@ VKD3D_SM4_OP_SAMPLE_B
Definition: tpf.c:257
VKD3D_SM5_OP_ATOMIC_AND
@ VKD3D_SM5_OP_ATOMIC_AND
Definition: tpf.c:345
VKD3D_SM5_OP_DERIV_RTY_FINE
@ VKD3D_SM5_OP_DERIV_RTY_FINE
Definition: tpf.c:303
VKD3D_SM5_OP_DMOVC
@ VKD3D_SM5_OP_DMOVC
Definition: tpf.c:376
VKD3D_SM5_OP_DCL_HS_MAX_TESSFACTOR
@ VKD3D_SM5_OP_DCL_HS_MAX_TESSFACTOR
Definition: tpf.c:328
VKD3D_SM5_OP_DCL_INPUT_CONTROL_POINT_COUNT
@ VKD3D_SM5_OP_DCL_INPUT_CONTROL_POINT_COUNT
Definition: tpf.c:323
VKD3D_SM4_OP_DCL_RESOURCE
@ VKD3D_SM4_OP_DCL_RESOURCE
Definition: tpf.c:270
VKD3D_SM5_OP_LD_UAV_TYPED_S
@ VKD3D_SM5_OP_LD_UAV_TYPED_S
Definition: tpf.c:396
VKD3D_SM4_OP_IMAX
@ VKD3D_SM4_OP_IMAX
Definition: tpf.c:219
VKD3D_SM4_OP_CUT
@ VKD3D_SM4_OP_CUT
Definition: tpf.c:193
VKD3D_SM5_OP_CHECK_ACCESS_FULLY_MAPPED
@ VKD3D_SM5_OP_CHECK_ACCESS_FULLY_MAPPED
Definition: tpf.c:405
VKD3D_SM4_OP_SAMPLE_C_LZ
@ VKD3D_SM4_OP_SAMPLE_C_LZ
Definition: tpf.c:254
VKD3D_SM5_OP_DMAX
@ VKD3D_SM5_OP_DMAX
Definition: tpf.c:368
VKD3D_SM4_OP_NE
@ VKD3D_SM4_OP_NE
Definition: tpf.c:240
VKD3D_SM4_OP_SHADER_DATA
@ VKD3D_SM4_OP_SHADER_DATA
Definition: tpf.c:236
VKD3D_SM5_OP_DMUL
@ VKD3D_SM5_OP_DMUL
Definition: tpf.c:370
VKD3D_SM5_OP_CUT_STREAM
@ VKD3D_SM5_OP_CUT_STREAM
Definition: tpf.c:297
VKD3D_SM4_OP_DCL_GLOBAL_FLAGS
@ VKD3D_SM4_OP_DCL_GLOBAL_FLAGS
Definition: tpf.c:287
VKD3D_SM4_OP_SAMPLE
@ VKD3D_SM4_OP_SAMPLE
Definition: tpf.c:252
VKD3D_SM4_OP_MOVC
@ VKD3D_SM4_OP_MOVC
Definition: tpf.c:238
VKD3D_SM4_OP_DCL_INPUT
@ VKD3D_SM4_OP_DCL_INPUT
Definition: tpf.c:277
VKD3D_SM4_OP_DP3
@ VKD3D_SM4_OP_DP3
Definition: tpf.c:200
VKD3D_SM5_OP_FIRSTBIT_HI
@ VKD3D_SM5_OP_FIRSTBIT_HI
Definition: tpf.c:311
VKD3D_SM5_OP_ITOD
@ VKD3D_SM5_OP_ITOD
Definition: tpf.c:388
VKD3D_SM4_OP_IF
@ VKD3D_SM4_OP_IF
Definition: tpf.c:214
VKD3D_SM4_OP_INE
@ VKD3D_SM4_OP_INE
Definition: tpf.c:222
VKD3D_SM4_OP_DCL_TEMPS
@ VKD3D_SM4_OP_DCL_TEMPS
Definition: tpf.c:285
VKD3D_SM4_OP_IMAD
@ VKD3D_SM4_OP_IMAD
Definition: tpf.c:218
VKD3D_SM4_OP_MAX
@ VKD3D_SM4_OP_MAX
Definition: tpf.c:235
VKD3D_SM5_OP_IMM_ATOMIC_IMIN
@ VKD3D_SM5_OP_IMM_ATOMIC_IMIN
Definition: tpf.c:363
VKD3D_SM4_OP_MIN
@ VKD3D_SM4_OP_MIN
Definition: tpf.c:234
VKD3D_SM5_OP_LD2DMS_S
@ VKD3D_SM5_OP_LD2DMS_S
Definition: tpf.c:395
VKD3D_SM4_OP_XOR
@ VKD3D_SM4_OP_XOR
Definition: tpf.c:269
VKD3D_SM4_OP_ULT
@ VKD3D_SM4_OP_ULT
Definition: tpf.c:262
VKD3D_SM5_OP_DFMA
@ VKD3D_SM5_OP_DFMA
Definition: tpf.c:383
VKD3D_SM5_OP_DDIV
@ VKD3D_SM5_OP_DDIV
Definition: tpf.c:382
VKD3D_SM4_OP_SAMPLE_GRAD
@ VKD3D_SM4_OP_SAMPLE_GRAD
Definition: tpf.c:256
VKD3D_SM4_OP_UGE
@ VKD3D_SM4_OP_UGE
Definition: tpf.c:263
VKD3D_SM5_OP_BUFINFO
@ VKD3D_SM5_OP_BUFINFO
Definition: tpf.c:299
VKD3D_SM4_OP_RET
@ VKD3D_SM4_OP_RET
Definition: tpf.c:245
VKD3D_SM5_OP_DCL_GS_INSTANCES
@ VKD3D_SM5_OP_DCL_GS_INSTANCES
Definition: tpf.c:381
VKD3D_SM5_OP_DERIV_RTX_FINE
@ VKD3D_SM5_OP_DERIV_RTX_FINE
Definition: tpf.c:301
VKD3D_SM4_OP_GE
@ VKD3D_SM4_OP_GE
Definition: tpf.c:212
VKD3D_SM5_OP_DLT
@ VKD3D_SM5_OP_DLT
Definition: tpf.c:373
VKD3D_SM4_OP_INEG
@ VKD3D_SM4_OP_INEG
Definition: tpf.c:223
VKD3D_SM5_OP_IBFE
@ VKD3D_SM5_OP_IBFE
Definition: tpf.c:315
VKD3D_SM4_OP_DCL_INPUT_SIV
@ VKD3D_SM4_OP_DCL_INPUT_SIV
Definition: tpf.c:279
VKD3D_SM5_OP_GATHER4_PO_C
@ VKD3D_SM5_OP_GATHER4_PO_C
Definition: tpf.c:306
VKD3D_SM4_OP_UMAX
@ VKD3D_SM4_OP_UMAX
Definition: tpf.c:265
VKD3D_SM5_OP_DCL_TESSELLATOR_OUTPUT_PRIMITIVE
@ VKD3D_SM5_OP_DCL_TESSELLATOR_OUTPUT_PRIMITIVE
Definition: tpf.c:327
VKD3D_SM5_OP_ATOMIC_UMIN
@ VKD3D_SM5_OP_ATOMIC_UMIN
Definition: tpf.c:353
VKD3D_SM4_OP_IMIN
@ VKD3D_SM4_OP_IMIN
Definition: tpf.c:220
VKD3D_SM5_OP_F16TOF32
@ VKD3D_SM5_OP_F16TOF32
Definition: tpf.c:309
VKD3D_SM5_OP_IMM_ATOMIC_XOR
@ VKD3D_SM5_OP_IMM_ATOMIC_XOR
Definition: tpf.c:359
VKD3D_SM4_OP_ISHR
@ VKD3D_SM4_OP_ISHR
Definition: tpf.c:225
VKD3D_SM5_OP_DERIV_RTY_COARSE
@ VKD3D_SM5_OP_DERIV_RTY_COARSE
Definition: tpf.c:302
VKD3D_SM5_OP_ATOMIC_OR
@ VKD3D_SM5_OP_ATOMIC_OR
Definition: tpf.c:346
VKD3D_SM4_OP_FTOU
@ VKD3D_SM4_OP_FTOU
Definition: tpf.c:211
VKD3D_SM4_OP_IGE
@ VKD3D_SM4_OP_IGE
Definition: tpf.c:216
VKD3D_SM5_OP_IMM_ATOMIC_UMIN
@ VKD3D_SM5_OP_IMM_ATOMIC_UMIN
Definition: tpf.c:365
VKD3D_SM5_OP_DCL_OUTPUT_CONTROL_POINT_COUNT
@ VKD3D_SM5_OP_DCL_OUTPUT_CONTROL_POINT_COUNT
Definition: tpf.c:324
VKD3D_SM4_OP_DCL_OUTPUT_TOPOLOGY
@ VKD3D_SM4_OP_DCL_OUTPUT_TOPOLOGY
Definition: tpf.c:274
VKD3D_SM4_OP_GATHER4
@ VKD3D_SM4_OP_GATHER4
Definition: tpf.c:289
VKD3D_SM5_OP_LD_S
@ VKD3D_SM5_OP_LD_S
Definition: tpf.c:394
VKD3D_SM5_OP_DCL_FUNCTION_BODY
@ VKD3D_SM5_OP_DCL_FUNCTION_BODY
Definition: tpf.c:320
VKD3D_SM5_OP_DCL_TESSELLATOR_DOMAIN
@ VKD3D_SM5_OP_DCL_TESSELLATOR_DOMAIN
Definition: tpf.c:325
VKD3D_SM5_OP_SAMPLE_GRAD_CL_S
@ VKD3D_SM5_OP_SAMPLE_GRAD_CL_S
Definition: tpf.c:403
VKD3D_SM4_OP_LOD
@ VKD3D_SM4_OP_LOD
Definition: tpf.c:288
VKD3D_SM4_OP_IADD
@ VKD3D_SM4_OP_IADD
Definition: tpf.c:213
VKD3D_SM4_OP_DCL_INDEXABLE_TEMP
@ VKD3D_SM4_OP_DCL_INDEXABLE_TEMP
Definition: tpf.c:286
VKD3D_SM5_OP_FIRSTBIT_LO
@ VKD3D_SM5_OP_FIRSTBIT_LO
Definition: tpf.c:312
VKD3D_SM5_OP_ATOMIC_XOR
@ VKD3D_SM5_OP_ATOMIC_XOR
Definition: tpf.c:347
VKD3D_SM5_OP_DMOV
@ VKD3D_SM5_OP_DMOV
Definition: tpf.c:375
VKD3D_SM5_OP_IMM_ATOMIC_UMAX
@ VKD3D_SM5_OP_IMM_ATOMIC_UMAX
Definition: tpf.c:364
VKD3D_SM4_OP_CASE
@ VKD3D_SM4_OP_CASE
Definition: tpf.c:190
VKD3D_SM5_OP_FCALL
@ VKD3D_SM5_OP_FCALL
Definition: tpf.c:298
VKD3D_SM4_OP_SAMPLE_C
@ VKD3D_SM4_OP_SAMPLE_C
Definition: tpf.c:253
VKD3D_SM5_OP_LD_RAW
@ VKD3D_SM5_OP_LD_RAW
Definition: tpf.c:341
VKD3D_SM4_OP_DP4
@ VKD3D_SM4_OP_DP4
Definition: tpf.c:201
VKD3D_SM5_OP_ATOMIC_UMAX
@ VKD3D_SM5_OP_ATOMIC_UMAX
Definition: tpf.c:352
VKD3D_SM5_OP_GATHER4_PO
@ VKD3D_SM5_OP_GATHER4_PO
Definition: tpf.c:305
VKD3D_SM4_OP_DCL_INPUT_PS
@ VKD3D_SM4_OP_DCL_INPUT_PS
Definition: tpf.c:280
VKD3D_SM4_OP_UDIV
@ VKD3D_SM4_OP_UDIV
Definition: tpf.c:261
VKD3D_SM5_OP_DCL_RESOURCE_STRUCTURED
@ VKD3D_SM5_OP_DCL_RESOURCE_STRUCTURED
Definition: tpf.c:338
VKD3D_SM5_OP_IMM_ATOMIC_IMAX
@ VKD3D_SM5_OP_IMM_ATOMIC_IMAX
Definition: tpf.c:362
VKD3D_SM5_OP_GATHER4_C
@ VKD3D_SM5_OP_GATHER4_C
Definition: tpf.c:304
VKD3D_SM4_OP_DCL_INDEX_RANGE
@ VKD3D_SM4_OP_DCL_INDEX_RANGE
Definition: tpf.c:273
VKD3D_SM5_OP_DCL_UAV_TYPED
@ VKD3D_SM5_OP_DCL_UAV_TYPED
Definition: tpf.c:332
VKD3D_SM5_OP_DCL_RESOURCE_RAW
@ VKD3D_SM5_OP_DCL_RESOURCE_RAW
Definition: tpf.c:337
VKD3D_SM5_OP_LD_RAW_S
@ VKD3D_SM5_OP_LD_RAW_S
Definition: tpf.c:397
VKD3D_SM4_OP_LD2DMS
@ VKD3D_SM4_OP_LD2DMS
Definition: tpf.c:229
VKD3D_SM5_OP_DCL_TGSM_STRUCTURED
@ VKD3D_SM5_OP_DCL_TGSM_STRUCTURED
Definition: tpf.c:336
VKD3D_SM5_OP_ATOMIC_IMIN
@ VKD3D_SM5_OP_ATOMIC_IMIN
Definition: tpf.c:351
VKD3D_SM4_OP_LOOP
@ VKD3D_SM4_OP_LOOP
Definition: tpf.c:231
VKD3D_SM5_OP_SAMPLE_C_LZ_S
@ VKD3D_SM5_OP_SAMPLE_C_LZ_S
Definition: tpf.c:400
VKD3D_SM4_OP_ROUND_PI
@ VKD3D_SM4_OP_ROUND_PI
Definition: tpf.c:249
VKD3D_SM5_OP_DCL_HS_FORK_PHASE_INSTANCE_COUNT
@ VKD3D_SM5_OP_DCL_HS_FORK_PHASE_INSTANCE_COUNT
Definition: tpf.c:329
VKD3D_SM5_OP_BFI
@ VKD3D_SM5_OP_BFI
Definition: tpf.c:316
VKD3D_SM5_OP_F32TOF16
@ VKD3D_SM5_OP_F32TOF16
Definition: tpf.c:308
VKD3D_SM4_OP_ITOF
@ VKD3D_SM4_OP_ITOF
Definition: tpf.c:226
VKD3D_SM5_OP_LD_STRUCTURED_S
@ VKD3D_SM5_OP_LD_STRUCTURED_S
Definition: tpf.c:398
VKD3D_SM4_OP_DCL_INPUT_PS_SIV
@ VKD3D_SM4_OP_DCL_INPUT_PS_SIV
Definition: tpf.c:282
VKD3D_SM5_OP_RCP
@ VKD3D_SM5_OP_RCP
Definition: tpf.c:307
VKD3D_SM5_OP_ATOMIC_CMP_STORE
@ VKD3D_SM5_OP_ATOMIC_CMP_STORE
Definition: tpf.c:348
VKD3D_SM4_OP_ENDSWITCH
@ VKD3D_SM4_OP_ENDSWITCH
Definition: tpf.c:206
VKD3D_SM5_OP_HS_FORK_PHASE
@ VKD3D_SM5_OP_HS_FORK_PHASE
Definition: tpf.c:294
VKD3D_SM4_OP_MOV
@ VKD3D_SM4_OP_MOV
Definition: tpf.c:237
VKD3D_SM4_OP_DIV
@ VKD3D_SM4_OP_DIV
Definition: tpf.c:198
VKD3D_SM4_OP_UMUL
@ VKD3D_SM4_OP_UMUL
Definition: tpf.c:264
VKD3D_SM5_OP_DNE
@ VKD3D_SM5_OP_DNE
Definition: tpf.c:374
VKD3D_SM4_OP_DERIV_RTX
@ VKD3D_SM4_OP_DERIV_RTX
Definition: tpf.c:195
VKD3D_SM5_OP_SAMPLE_CL_S
@ VKD3D_SM5_OP_SAMPLE_CL_S
Definition: tpf.c:401
VKD3D_SM5_OP_STORE_STRUCTURED
@ VKD3D_SM5_OP_STORE_STRUCTURED
Definition: tpf.c:344
VKD3D_SM4_OP_SAMPLE_POS
@ VKD3D_SM4_OP_SAMPLE_POS
Definition: tpf.c:290
VKD3D_SM5_OP_DCL_FUNCTION_TABLE
@ VKD3D_SM5_OP_DCL_FUNCTION_TABLE
Definition: tpf.c:321
VKD3D_SM4_OP_ROUND_NI
@ VKD3D_SM4_OP_ROUND_NI
Definition: tpf.c:248
VKD3D_SM4_OP_IEQ
@ VKD3D_SM4_OP_IEQ
Definition: tpf.c:215
VKD3D_SM4_OP_LT
@ VKD3D_SM4_OP_LT
Definition: tpf.c:232
VKD3D_SM5_OP_FTOD
@ VKD3D_SM5_OP_FTOD
Definition: tpf.c:378
VKD3D_SM4_OP_BREAKC
@ VKD3D_SM4_OP_BREAKC
Definition: tpf.c:189
VKD3D_SM4_OP_COUNT
@ VKD3D_SM4_OP_COUNT
Definition: tpf.c:407
VKD3D_SM4_OP_DCL_CONSTANT_BUFFER
@ VKD3D_SM4_OP_DCL_CONSTANT_BUFFER
Definition: tpf.c:271
VKD3D_SM5_OP_HS_JOIN_PHASE
@ VKD3D_SM5_OP_HS_JOIN_PHASE
Definition: tpf.c:295
VKD3D_SM4_OP_LABEL
@ VKD3D_SM4_OP_LABEL
Definition: tpf.c:227
VKD3D_SM5_OP_FIRSTBIT_SHI
@ VKD3D_SM5_OP_FIRSTBIT_SHI
Definition: tpf.c:313
VKD3D_SM4_OP_MUL
@ VKD3D_SM4_OP_MUL
Definition: tpf.c:239
VKD3D_SM5_OP_DGE
@ VKD3D_SM5_OP_DGE
Definition: tpf.c:372
VKD3D_SM5_OP_GATHER4_C_S
@ VKD3D_SM5_OP_GATHER4_C_S
Definition: tpf.c:391
VKD3D_SM5_OP_DTOU
@ VKD3D_SM5_OP_DTOU
Definition: tpf.c:387
VKD3D_SM5_OP_IMM_ATOMIC_EXCH
@ VKD3D_SM5_OP_IMM_ATOMIC_EXCH
Definition: tpf.c:360
VKD3D_SM4_OP_UTOF
@ VKD3D_SM4_OP_UTOF
Definition: tpf.c:268
VKD3D_SM5_OP_DCL_INTERFACE
@ VKD3D_SM5_OP_DCL_INTERFACE
Definition: tpf.c:322
VKD3D_SM5_OP_DCL_THREAD_GROUP
@ VKD3D_SM5_OP_DCL_THREAD_GROUP
Definition: tpf.c:331
VKD3D_SM4_OP_MAD
@ VKD3D_SM4_OP_MAD
Definition: tpf.c:233
VKD3D_SM4_OP_ELSE
@ VKD3D_SM4_OP_ELSE
Definition: tpf.c:202
VKD3D_SM4_OP_NOT
@ VKD3D_SM4_OP_NOT
Definition: tpf.c:242
VKD3D_SM4_OP_DCL_INPUT_SGV
@ VKD3D_SM4_OP_DCL_INPUT_SGV
Definition: tpf.c:278
VKD3D_SM5_OP_SWAPC
@ VKD3D_SM5_OP_SWAPC
Definition: tpf.c:318
VKD3D_SM5_OP_DCL_HS_JOIN_PHASE_INSTANCE_COUNT
@ VKD3D_SM5_OP_DCL_HS_JOIN_PHASE_INSTANCE_COUNT
Definition: tpf.c:330
VKD3D_SM4_OP_SQRT
@ VKD3D_SM4_OP_SQRT
Definition: tpf.c:258
VKD3D_SM4_OP_USHR
@ VKD3D_SM4_OP_USHR
Definition: tpf.c:267
VKD3D_SM4_OP_AND
@ VKD3D_SM4_OP_AND
Definition: tpf.c:187
VKD3D_SM4_OP_RETC
@ VKD3D_SM4_OP_RETC
Definition: tpf.c:246
VKD3D_SM4_OP_SINCOS
@ VKD3D_SM4_OP_SINCOS
Definition: tpf.c:260
VKD3D_SM4_OP_EMIT
@ VKD3D_SM4_OP_EMIT
Definition: tpf.c:203
VKD3D_SM4_OP_OR
@ VKD3D_SM4_OP_OR
Definition: tpf.c:243
VKD3D_SM5_OP_DERIV_RTX_COARSE
@ VKD3D_SM5_OP_DERIV_RTX_COARSE
Definition: tpf.c:300
VKD3D_SM5_OP_LD_UAV_TYPED
@ VKD3D_SM5_OP_LD_UAV_TYPED
Definition: tpf.c:339
VKD3D_SM5_OP_SAMPLE_C_CL_S
@ VKD3D_SM5_OP_SAMPLE_C_CL_S
Definition: tpf.c:404
VKD3D_SM5_OP_IMM_ATOMIC_CMP_EXCH
@ VKD3D_SM5_OP_IMM_ATOMIC_CMP_EXCH
Definition: tpf.c:361
VKD3D_SM4_OP_ENDLOOP
@ VKD3D_SM4_OP_ENDLOOP
Definition: tpf.c:205
VKD3D_SM4_OP_DCL_VERTICES_OUT
@ VKD3D_SM4_OP_DCL_VERTICES_OUT
Definition: tpf.c:276
VKD3D_SM4_OP_DP2
@ VKD3D_SM4_OP_DP2
Definition: tpf.c:199
VKD3D_SM5_OP_DCL_TGSM_RAW
@ VKD3D_SM5_OP_DCL_TGSM_RAW
Definition: tpf.c:335
VKD3D_SM4_OP_CONTINUE
@ VKD3D_SM4_OP_CONTINUE
Definition: tpf.c:191
VKD3D_SM5_OP_HS_DECLS
@ VKD3D_SM5_OP_HS_DECLS
Definition: tpf.c:292
VKD3D_SM4_OP_EQ
@ VKD3D_SM4_OP_EQ
Definition: tpf.c:207
VKD3D_SM4_OP_DCL_INPUT_PRIMITIVE
@ VKD3D_SM4_OP_DCL_INPUT_PRIMITIVE
Definition: tpf.c:275
VKD3D_SM5_OP_ATOMIC_IADD
@ VKD3D_SM5_OP_ATOMIC_IADD
Definition: tpf.c:349
VKD3D_SM5_OP_DTOF
@ VKD3D_SM5_OP_DTOF
Definition: tpf.c:377
VKD3D_SM5_OP_IMM_ATOMIC_CONSUME
@ VKD3D_SM5_OP_IMM_ATOMIC_CONSUME
Definition: tpf.c:355
VKD3D_SM4_OP_LD
@ VKD3D_SM4_OP_LD
Definition: tpf.c:228
VKD3D_SM4_OP_DCL_OUTPUT
@ VKD3D_SM4_OP_DCL_OUTPUT
Definition: tpf.c:283
VKD3D_SM4_OP_ADD
@ VKD3D_SM4_OP_ADD
Definition: tpf.c:186
VKD3D_SM4_OP_SWITCH
@ VKD3D_SM4_OP_SWITCH
Definition: tpf.c:259
VKD3D_SM4_OP_LOG
@ VKD3D_SM4_OP_LOG
Definition: tpf.c:230
VKD3D_SM5_OP_ATOMIC_IMAX
@ VKD3D_SM5_OP_ATOMIC_IMAX
Definition: tpf.c:350
VKD3D_SM5_OP_STORE_RAW
@ VKD3D_SM5_OP_STORE_RAW
Definition: tpf.c:342
VKD3D_SM4_OP_ISHL
@ VKD3D_SM4_OP_ISHL
Definition: tpf.c:224
VKD3D_SM5_OP_DCL_UAV_RAW
@ VKD3D_SM5_OP_DCL_UAV_RAW
Definition: tpf.c:333
VKD3D_SM4_OP_FRC
@ VKD3D_SM4_OP_FRC
Definition: tpf.c:209
VKD3D_SM4_OP_EXP
@ VKD3D_SM4_OP_EXP
Definition: tpf.c:208
VKD3D_SM4_OP_IMUL
@ VKD3D_SM4_OP_IMUL
Definition: tpf.c:221
VKD3D_SM4_OP_DCL_INPUT_PS_SGV
@ VKD3D_SM4_OP_DCL_INPUT_PS_SGV
Definition: tpf.c:281
VKD3D_SM5_OP_SAMPLE_B_CL_S
@ VKD3D_SM5_OP_SAMPLE_B_CL_S
Definition: tpf.c:402
VKD3D_SM5_OP_LD_STRUCTURED
@ VKD3D_SM5_OP_LD_STRUCTURED
Definition: tpf.c:343
VKD3D_SM4_OP_UMIN
@ VKD3D_SM4_OP_UMIN
Definition: tpf.c:266
VKD3D_SM5_OP_HS_CONTROL_POINT_PHASE
@ VKD3D_SM5_OP_HS_CONTROL_POINT_PHASE
Definition: tpf.c:293
VKD3D_SM5_OP_SYNC
@ VKD3D_SM5_OP_SYNC
Definition: tpf.c:366
VKD3D_SM4_OP_SAMPLE_INFO
@ VKD3D_SM4_OP_SAMPLE_INFO
Definition: tpf.c:291
VKD3D_SM5_OP_EMIT_STREAM
@ VKD3D_SM5_OP_EMIT_STREAM
Definition: tpf.c:296
VKD3D_SM5_OP_IMM_ATOMIC_ALLOC
@ VKD3D_SM5_OP_IMM_ATOMIC_ALLOC
Definition: tpf.c:354
VKD3D_SM4_OP_FTOI
@ VKD3D_SM4_OP_FTOI
Definition: tpf.c:210
VKD3D_SM5_OP_DRCP
@ VKD3D_SM5_OP_DRCP
Definition: tpf.c:384
VKD3D_SM4_OP_DCL_SAMPLER
@ VKD3D_SM4_OP_DCL_SAMPLER
Definition: tpf.c:272
VKD3D_SM5_OP_IMM_ATOMIC_IADD
@ VKD3D_SM5_OP_IMM_ATOMIC_IADD
Definition: tpf.c:356
VKD3D_SM4_OP_DISCARD
@ VKD3D_SM4_OP_DISCARD
Definition: tpf.c:197
VKD3D_SM4_OP_ILT
@ VKD3D_SM4_OP_ILT
Definition: tpf.c:217
VKD3D_SM5_OP_DMIN
@ VKD3D_SM5_OP_DMIN
Definition: tpf.c:369
VKD3D_SM5_OP_EVAL_CENTROID
@ VKD3D_SM5_OP_EVAL_CENTROID
Definition: tpf.c:380
VKD3D_SM4_OP_SAMPLE_LOD
@ VKD3D_SM4_OP_SAMPLE_LOD
Definition: tpf.c:255
VKD3D_SM5_OP_UBFE
@ VKD3D_SM5_OP_UBFE
Definition: tpf.c:314
VKD3D_SM5_OP_UTOD
@ VKD3D_SM5_OP_UTOD
Definition: tpf.c:389
VKD3D_SM4_OP_BREAK
@ VKD3D_SM4_OP_BREAK
Definition: tpf.c:188
VKD3D_SM5_OP_DEQ
@ VKD3D_SM5_OP_DEQ
Definition: tpf.c:371
VKD3D_SM5_OP_IMM_ATOMIC_OR
@ VKD3D_SM5_OP_IMM_ATOMIC_OR
Definition: tpf.c:358
VKD3D_SM5_OP_DTOI
@ VKD3D_SM5_OP_DTOI
Definition: tpf.c:386
VKD3D_SM4_OP_ROUND_NE
@ VKD3D_SM4_OP_ROUND_NE
Definition: tpf.c:247
VKD3D_SM5_OP_MSAD
@ VKD3D_SM5_OP_MSAD
Definition: tpf.c:385
VKD3D_SM5_OP_STORE_UAV_TYPED
@ VKD3D_SM5_OP_STORE_UAV_TYPED
Definition: tpf.c:340
VKD3D_SM4_OP_RSQ
@ VKD3D_SM4_OP_RSQ
Definition: tpf.c:251
VKD3D_SM5_OP_DADD
@ VKD3D_SM5_OP_DADD
Definition: tpf.c:367
VKD3D_SM4_OP_DEFAULT
@ VKD3D_SM4_OP_DEFAULT
Definition: tpf.c:194
VKD3D_SM5_OP_DCL_STREAM
@ VKD3D_SM5_OP_DCL_STREAM
Definition: tpf.c:319
VKD3D_SM5_OP_COUNTBITS
@ VKD3D_SM5_OP_COUNTBITS
Definition: tpf.c:310
VKD3D_SM5_OP_SAMPLE_LOD_S
@ VKD3D_SM5_OP_SAMPLE_LOD_S
Definition: tpf.c:399
VKD3D_SM5_OP_DCL_UAV_STRUCTURED
@ VKD3D_SM5_OP_DCL_UAV_STRUCTURED
Definition: tpf.c:334
VKD3D_SM4_OP_DCL_OUTPUT_SIV
@ VKD3D_SM4_OP_DCL_OUTPUT_SIV
Definition: tpf.c:284
VKD3D_SM4_OP_DERIV_RTY
@ VKD3D_SM4_OP_DERIV_RTY
Definition: tpf.c:196
VKD3D_SM4_OP_ENDIF
@ VKD3D_SM4_OP_ENDIF
Definition: tpf.c:204
VKD3D_SM5_OP_GATHER4_PO_S
@ VKD3D_SM5_OP_GATHER4_PO_S
Definition: tpf.c:392
VKD3D_SM5_OP_IMM_ATOMIC_AND
@ VKD3D_SM5_OP_IMM_ATOMIC_AND
Definition: tpf.c:357
VKD3D_SM5_OP_EVAL_SAMPLE_INDEX
@ VKD3D_SM5_OP_EVAL_SAMPLE_INDEX
Definition: tpf.c:379

◆ vkd3d_sm4_output_primitive_type

enum vkd3d_sm4_output_primitive_type
Enumerator
VKD3D_SM4_OUTPUT_PT_POINTLIST 
VKD3D_SM4_OUTPUT_PT_LINESTRIP 
VKD3D_SM4_OUTPUT_PT_TRIANGLESTRIP 

Definition at line 482 of file tpf.c.

483{
484 VKD3D_SM4_OUTPUT_PT_POINTLIST = 0x1,
485 VKD3D_SM4_OUTPUT_PT_LINESTRIP = 0x3,
486 VKD3D_SM4_OUTPUT_PT_TRIANGLESTRIP = 0x5,
487};
VKD3D_SM4_OUTPUT_PT_POINTLIST
@ VKD3D_SM4_OUTPUT_PT_POINTLIST
Definition: tpf.c:484
VKD3D_SM4_OUTPUT_PT_TRIANGLESTRIP
@ VKD3D_SM4_OUTPUT_PT_TRIANGLESTRIP
Definition: tpf.c:486
VKD3D_SM4_OUTPUT_PT_LINESTRIP
@ VKD3D_SM4_OUTPUT_PT_LINESTRIP
Definition: tpf.c:485

◆ vkd3d_sm4_register_modifier

enum vkd3d_sm4_register_modifier
Enumerator
VKD3D_SM4_REGISTER_MODIFIER_NONE 
VKD3D_SM4_REGISTER_MODIFIER_NEGATE 
VKD3D_SM4_REGISTER_MODIFIER_ABS 
VKD3D_SM4_REGISTER_MODIFIER_ABS_NEGATE 

Definition at line 465 of file tpf.c.

466{
467 VKD3D_SM4_REGISTER_MODIFIER_NONE = 0x00,
468 VKD3D_SM4_REGISTER_MODIFIER_NEGATE = 0x01,
469 VKD3D_SM4_REGISTER_MODIFIER_ABS = 0x02,
470 VKD3D_SM4_REGISTER_MODIFIER_ABS_NEGATE = 0x03,
471};
VKD3D_SM4_REGISTER_MODIFIER_NEGATE
@ VKD3D_SM4_REGISTER_MODIFIER_NEGATE
Definition: tpf.c:468
VKD3D_SM4_REGISTER_MODIFIER_NONE
@ VKD3D_SM4_REGISTER_MODIFIER_NONE
Definition: tpf.c:467
VKD3D_SM4_REGISTER_MODIFIER_ABS
@ VKD3D_SM4_REGISTER_MODIFIER_ABS
Definition: tpf.c:469
VKD3D_SM4_REGISTER_MODIFIER_ABS_NEGATE
@ VKD3D_SM4_REGISTER_MODIFIER_ABS_NEGATE
Definition: tpf.c:470

◆ vkd3d_sm4_register_precision

enum vkd3d_sm4_register_precision
Enumerator
VKD3D_SM4_REGISTER_PRECISION_DEFAULT 
VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_16 
VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_10 
VKD3D_SM4_REGISTER_PRECISION_MIN_INT_16 
VKD3D_SM4_REGISTER_PRECISION_MIN_UINT_16 

Definition at line 473 of file tpf.c.

474{
475 VKD3D_SM4_REGISTER_PRECISION_DEFAULT = 0x0,
476 VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_16 = 0x1,
477 VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_10 = 0x2,
478 VKD3D_SM4_REGISTER_PRECISION_MIN_INT_16 = 0x4,
479 VKD3D_SM4_REGISTER_PRECISION_MIN_UINT_16 = 0x5,
480};
VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_10
@ VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_10
Definition: tpf.c:477
VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_16
@ VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_16
Definition: tpf.c:476
VKD3D_SM4_REGISTER_PRECISION_DEFAULT
@ VKD3D_SM4_REGISTER_PRECISION_DEFAULT
Definition: tpf.c:475
VKD3D_SM4_REGISTER_PRECISION_MIN_INT_16
@ VKD3D_SM4_REGISTER_PRECISION_MIN_INT_16
Definition: tpf.c:478
VKD3D_SM4_REGISTER_PRECISION_MIN_UINT_16
@ VKD3D_SM4_REGISTER_PRECISION_MIN_UINT_16
Definition: tpf.c:479

◆ vkd3d_sm4_register_type

enum vkd3d_sm4_register_type
Enumerator
VKD3D_SM4_RT_TEMP 
VKD3D_SM4_RT_INPUT 
VKD3D_SM4_RT_OUTPUT 
VKD3D_SM4_RT_INDEXABLE_TEMP 
VKD3D_SM4_RT_IMMCONST 
VKD3D_SM4_RT_IMMCONST64 
VKD3D_SM4_RT_SAMPLER 
VKD3D_SM4_RT_RESOURCE 
VKD3D_SM4_RT_CONSTBUFFER 
VKD3D_SM4_RT_IMMCONSTBUFFER 
VKD3D_SM4_RT_PRIMID 
VKD3D_SM4_RT_DEPTHOUT 
VKD3D_SM4_RT_NULL 
VKD3D_SM4_RT_RASTERIZER 
VKD3D_SM4_RT_OMASK 
VKD3D_SM5_RT_STREAM 
VKD3D_SM5_RT_FUNCTION_BODY 
VKD3D_SM5_RT_FUNCTION_POINTER 
VKD3D_SM5_RT_OUTPUT_CONTROL_POINT_ID 
VKD3D_SM5_RT_FORK_INSTANCE_ID 
VKD3D_SM5_RT_JOIN_INSTANCE_ID 
VKD3D_SM5_RT_INPUT_CONTROL_POINT 
VKD3D_SM5_RT_OUTPUT_CONTROL_POINT 
VKD3D_SM5_RT_PATCH_CONSTANT_DATA 
VKD3D_SM5_RT_DOMAIN_LOCATION 
VKD3D_SM5_RT_UAV 
VKD3D_SM5_RT_SHARED_MEMORY 
VKD3D_SM5_RT_THREAD_ID 
VKD3D_SM5_RT_THREAD_GROUP_ID 
VKD3D_SM5_RT_LOCAL_THREAD_ID 
VKD3D_SM5_RT_COVERAGE 
VKD3D_SM5_RT_LOCAL_THREAD_INDEX 
VKD3D_SM5_RT_GS_INSTANCE_ID 
VKD3D_SM5_RT_DEPTHOUT_GREATER_EQUAL 
VKD3D_SM5_RT_DEPTHOUT_LESS_EQUAL 
VKD3D_SM5_RT_OUTPUT_STENCIL_REF 
VKD3D_SM4_REGISTER_TYPE_COUNT 

Definition at line 417 of file tpf.c.

418{
419 VKD3D_SM4_RT_TEMP = 0x00,
420 VKD3D_SM4_RT_INPUT = 0x01,
421 VKD3D_SM4_RT_OUTPUT = 0x02,
422 VKD3D_SM4_RT_INDEXABLE_TEMP = 0x03,
423 VKD3D_SM4_RT_IMMCONST = 0x04,
424 VKD3D_SM4_RT_IMMCONST64 = 0x05,
425 VKD3D_SM4_RT_SAMPLER = 0x06,
426 VKD3D_SM4_RT_RESOURCE = 0x07,
427 VKD3D_SM4_RT_CONSTBUFFER = 0x08,
428 VKD3D_SM4_RT_IMMCONSTBUFFER = 0x09,
429 VKD3D_SM4_RT_PRIMID = 0x0b,
430 VKD3D_SM4_RT_DEPTHOUT = 0x0c,
431 VKD3D_SM4_RT_NULL = 0x0d,
432 VKD3D_SM4_RT_RASTERIZER = 0x0e,
433 VKD3D_SM4_RT_OMASK = 0x0f,
434 VKD3D_SM5_RT_STREAM = 0x10,
435 VKD3D_SM5_RT_FUNCTION_BODY = 0x11,
436 VKD3D_SM5_RT_FUNCTION_POINTER = 0x13,
437 VKD3D_SM5_RT_OUTPUT_CONTROL_POINT_ID = 0x16,
438 VKD3D_SM5_RT_FORK_INSTANCE_ID = 0x17,
439 VKD3D_SM5_RT_JOIN_INSTANCE_ID = 0x18,
440 VKD3D_SM5_RT_INPUT_CONTROL_POINT = 0x19,
441 VKD3D_SM5_RT_OUTPUT_CONTROL_POINT = 0x1a,
442 VKD3D_SM5_RT_PATCH_CONSTANT_DATA = 0x1b,
443 VKD3D_SM5_RT_DOMAIN_LOCATION = 0x1c,
444 VKD3D_SM5_RT_UAV = 0x1e,
445 VKD3D_SM5_RT_SHARED_MEMORY = 0x1f,
446 VKD3D_SM5_RT_THREAD_ID = 0x20,
447 VKD3D_SM5_RT_THREAD_GROUP_ID = 0x21,
448 VKD3D_SM5_RT_LOCAL_THREAD_ID = 0x22,
449 VKD3D_SM5_RT_COVERAGE = 0x23,
450 VKD3D_SM5_RT_LOCAL_THREAD_INDEX = 0x24,
451 VKD3D_SM5_RT_GS_INSTANCE_ID = 0x25,
452 VKD3D_SM5_RT_DEPTHOUT_GREATER_EQUAL = 0x26,
453 VKD3D_SM5_RT_DEPTHOUT_LESS_EQUAL = 0x27,
454 VKD3D_SM5_RT_OUTPUT_STENCIL_REF = 0x29,
455
456 VKD3D_SM4_REGISTER_TYPE_COUNT,
457};
VKD3D_SM5_RT_PATCH_CONSTANT_DATA
@ VKD3D_SM5_RT_PATCH_CONSTANT_DATA
Definition: tpf.c:442
VKD3D_SM4_RT_NULL
@ VKD3D_SM4_RT_NULL
Definition: tpf.c:431
VKD3D_SM5_RT_DOMAIN_LOCATION
@ VKD3D_SM5_RT_DOMAIN_LOCATION
Definition: tpf.c:443
VKD3D_SM5_RT_UAV
@ VKD3D_SM5_RT_UAV
Definition: tpf.c:444
VKD3D_SM5_RT_DEPTHOUT_GREATER_EQUAL
@ VKD3D_SM5_RT_DEPTHOUT_GREATER_EQUAL
Definition: tpf.c:452
VKD3D_SM5_RT_OUTPUT_CONTROL_POINT_ID
@ VKD3D_SM5_RT_OUTPUT_CONTROL_POINT_ID
Definition: tpf.c:437
VKD3D_SM4_RT_INDEXABLE_TEMP
@ VKD3D_SM4_RT_INDEXABLE_TEMP
Definition: tpf.c:422
VKD3D_SM4_RT_RESOURCE
@ VKD3D_SM4_RT_RESOURCE
Definition: tpf.c:426
VKD3D_SM5_RT_JOIN_INSTANCE_ID
@ VKD3D_SM5_RT_JOIN_INSTANCE_ID
Definition: tpf.c:439
VKD3D_SM4_RT_PRIMID
@ VKD3D_SM4_RT_PRIMID
Definition: tpf.c:429
VKD3D_SM4_REGISTER_TYPE_COUNT
@ VKD3D_SM4_REGISTER_TYPE_COUNT
Definition: tpf.c:456
VKD3D_SM4_RT_OUTPUT
@ VKD3D_SM4_RT_OUTPUT
Definition: tpf.c:421
VKD3D_SM4_RT_TEMP
@ VKD3D_SM4_RT_TEMP
Definition: tpf.c:419
VKD3D_SM5_RT_THREAD_GROUP_ID
@ VKD3D_SM5_RT_THREAD_GROUP_ID
Definition: tpf.c:447
VKD3D_SM5_RT_OUTPUT_STENCIL_REF
@ VKD3D_SM5_RT_OUTPUT_STENCIL_REF
Definition: tpf.c:454
VKD3D_SM5_RT_THREAD_ID
@ VKD3D_SM5_RT_THREAD_ID
Definition: tpf.c:446
VKD3D_SM4_RT_DEPTHOUT
@ VKD3D_SM4_RT_DEPTHOUT
Definition: tpf.c:430
VKD3D_SM4_RT_IMMCONSTBUFFER
@ VKD3D_SM4_RT_IMMCONSTBUFFER
Definition: tpf.c:428
VKD3D_SM5_RT_COVERAGE
@ VKD3D_SM5_RT_COVERAGE
Definition: tpf.c:449
VKD3D_SM5_RT_OUTPUT_CONTROL_POINT
@ VKD3D_SM5_RT_OUTPUT_CONTROL_POINT
Definition: tpf.c:441
VKD3D_SM5_RT_LOCAL_THREAD_ID
@ VKD3D_SM5_RT_LOCAL_THREAD_ID
Definition: tpf.c:448
VKD3D_SM4_RT_RASTERIZER
@ VKD3D_SM4_RT_RASTERIZER
Definition: tpf.c:432
VKD3D_SM5_RT_GS_INSTANCE_ID
@ VKD3D_SM5_RT_GS_INSTANCE_ID
Definition: tpf.c:451
VKD3D_SM5_RT_SHARED_MEMORY
@ VKD3D_SM5_RT_SHARED_MEMORY
Definition: tpf.c:445
VKD3D_SM4_RT_IMMCONST64
@ VKD3D_SM4_RT_IMMCONST64
Definition: tpf.c:424
VKD3D_SM4_RT_SAMPLER
@ VKD3D_SM4_RT_SAMPLER
Definition: tpf.c:425
VKD3D_SM4_RT_INPUT
@ VKD3D_SM4_RT_INPUT
Definition: tpf.c:420
VKD3D_SM5_RT_DEPTHOUT_LESS_EQUAL
@ VKD3D_SM5_RT_DEPTHOUT_LESS_EQUAL
Definition: tpf.c:453
VKD3D_SM5_RT_FUNCTION_BODY
@ VKD3D_SM5_RT_FUNCTION_BODY
Definition: tpf.c:435
VKD3D_SM4_RT_CONSTBUFFER
@ VKD3D_SM4_RT_CONSTBUFFER
Definition: tpf.c:427
VKD3D_SM4_RT_OMASK
@ VKD3D_SM4_RT_OMASK
Definition: tpf.c:433
VKD3D_SM5_RT_FUNCTION_POINTER
@ VKD3D_SM5_RT_FUNCTION_POINTER
Definition: tpf.c:436
VKD3D_SM4_RT_IMMCONST
@ VKD3D_SM4_RT_IMMCONST
Definition: tpf.c:423
VKD3D_SM5_RT_INPUT_CONTROL_POINT
@ VKD3D_SM5_RT_INPUT_CONTROL_POINT
Definition: tpf.c:440
VKD3D_SM5_RT_STREAM
@ VKD3D_SM5_RT_STREAM
Definition: tpf.c:434
VKD3D_SM5_RT_LOCAL_THREAD_INDEX
@ VKD3D_SM5_RT_LOCAL_THREAD_INDEX
Definition: tpf.c:450
VKD3D_SM5_RT_FORK_INSTANCE_ID
@ VKD3D_SM5_RT_FORK_INSTANCE_ID
Definition: tpf.c:438

◆ vkd3d_sm4_resource_type

enum vkd3d_sm4_resource_type
Enumerator
VKD3D_SM4_RESOURCE_BUFFER 
VKD3D_SM4_RESOURCE_TEXTURE_1D 
VKD3D_SM4_RESOURCE_TEXTURE_2D 
VKD3D_SM4_RESOURCE_TEXTURE_2DMS 
VKD3D_SM4_RESOURCE_TEXTURE_3D 
VKD3D_SM4_RESOURCE_TEXTURE_CUBE 
VKD3D_SM4_RESOURCE_TEXTURE_1DARRAY 
VKD3D_SM4_RESOURCE_TEXTURE_2DARRAY 
VKD3D_SM4_RESOURCE_TEXTURE_2DMSARRAY 
VKD3D_SM4_RESOURCE_TEXTURE_CUBEARRAY 
VKD3D_SM4_RESOURCE_RAW_BUFFER 
VKD3D_SM4_RESOURCE_STRUCTURED_BUFFER 

Definition at line 579 of file tpf.c.

580{
581 VKD3D_SM4_RESOURCE_BUFFER = 0x1,
582 VKD3D_SM4_RESOURCE_TEXTURE_1D = 0x2,
583 VKD3D_SM4_RESOURCE_TEXTURE_2D = 0x3,
584 VKD3D_SM4_RESOURCE_TEXTURE_2DMS = 0x4,
585 VKD3D_SM4_RESOURCE_TEXTURE_3D = 0x5,
586 VKD3D_SM4_RESOURCE_TEXTURE_CUBE = 0x6,
587 VKD3D_SM4_RESOURCE_TEXTURE_1DARRAY = 0x7,
588 VKD3D_SM4_RESOURCE_TEXTURE_2DARRAY = 0x8,
589 VKD3D_SM4_RESOURCE_TEXTURE_2DMSARRAY = 0x9,
590 VKD3D_SM4_RESOURCE_TEXTURE_CUBEARRAY = 0xa,
591 VKD3D_SM4_RESOURCE_RAW_BUFFER = 0xb,
592 VKD3D_SM4_RESOURCE_STRUCTURED_BUFFER = 0xc,
593};
VKD3D_SM4_RESOURCE_TEXTURE_CUBEARRAY
@ VKD3D_SM4_RESOURCE_TEXTURE_CUBEARRAY
Definition: tpf.c:590
VKD3D_SM4_RESOURCE_TEXTURE_3D
@ VKD3D_SM4_RESOURCE_TEXTURE_3D
Definition: tpf.c:585
VKD3D_SM4_RESOURCE_TEXTURE_2DARRAY
@ VKD3D_SM4_RESOURCE_TEXTURE_2DARRAY
Definition: tpf.c:588
VKD3D_SM4_RESOURCE_RAW_BUFFER
@ VKD3D_SM4_RESOURCE_RAW_BUFFER
Definition: tpf.c:591
VKD3D_SM4_RESOURCE_BUFFER
@ VKD3D_SM4_RESOURCE_BUFFER
Definition: tpf.c:581
VKD3D_SM4_RESOURCE_TEXTURE_1D
@ VKD3D_SM4_RESOURCE_TEXTURE_1D
Definition: tpf.c:582
VKD3D_SM4_RESOURCE_TEXTURE_2D
@ VKD3D_SM4_RESOURCE_TEXTURE_2D
Definition: tpf.c:583
VKD3D_SM4_RESOURCE_TEXTURE_2DMS
@ VKD3D_SM4_RESOURCE_TEXTURE_2DMS
Definition: tpf.c:584
VKD3D_SM4_RESOURCE_TEXTURE_CUBE
@ VKD3D_SM4_RESOURCE_TEXTURE_CUBE
Definition: tpf.c:586
VKD3D_SM4_RESOURCE_STRUCTURED_BUFFER
@ VKD3D_SM4_RESOURCE_STRUCTURED_BUFFER
Definition: tpf.c:592
VKD3D_SM4_RESOURCE_TEXTURE_2DMSARRAY
@ VKD3D_SM4_RESOURCE_TEXTURE_2DMSARRAY
Definition: tpf.c:589
VKD3D_SM4_RESOURCE_TEXTURE_1DARRAY
@ VKD3D_SM4_RESOURCE_TEXTURE_1DARRAY
Definition: tpf.c:587

◆ vkd3d_sm4_sampler_mode

enum vkd3d_sm4_sampler_mode
Enumerator
VKD3D_SM4_SAMPLER_DEFAULT 
VKD3D_SM4_SAMPLER_COMPARISON 

Definition at line 608 of file tpf.c.

609{
610 VKD3D_SM4_SAMPLER_DEFAULT = 0x0,
611 VKD3D_SM4_SAMPLER_COMPARISON = 0x1,
612};
VKD3D_SM4_SAMPLER_COMPARISON
@ VKD3D_SM4_SAMPLER_COMPARISON
Definition: tpf.c:611
VKD3D_SM4_SAMPLER_DEFAULT
@ VKD3D_SM4_SAMPLER_DEFAULT
Definition: tpf.c:610

◆ vkd3d_sm4_shader_data_type

enum vkd3d_sm4_shader_data_type
Enumerator
VKD3D_SM4_SHADER_DATA_IMMEDIATE_CONSTANT_BUFFER 
VKD3D_SM4_SHADER_DATA_MESSAGE 

Definition at line 614 of file tpf.c.

615{
616 VKD3D_SM4_SHADER_DATA_IMMEDIATE_CONSTANT_BUFFER = 0x3,
617 VKD3D_SM4_SHADER_DATA_MESSAGE = 0x4,
618};
VKD3D_SM4_SHADER_DATA_IMMEDIATE_CONSTANT_BUFFER
@ VKD3D_SM4_SHADER_DATA_IMMEDIATE_CONSTANT_BUFFER
Definition: tpf.c:616
VKD3D_SM4_SHADER_DATA_MESSAGE
@ VKD3D_SM4_SHADER_DATA_MESSAGE
Definition: tpf.c:617

◆ vkd3d_sm4_stat_field

enum vkd3d_sm4_stat_field
Enumerator
VKD3D_STAT_UNUSED 
VKD3D_STAT_INSTR_COUNT 
VKD3D_STAT_MOV 
VKD3D_STAT_MOVC 
VKD3D_STAT_CONV 
VKD3D_STAT_FLOAT 
VKD3D_STAT_INT 
VKD3D_STAT_UINT 
VKD3D_STAT_EMIT 
VKD3D_STAT_CUT 
VKD3D_STAT_SAMPLE 
VKD3D_STAT_SAMPLE_C 
VKD3D_STAT_SAMPLE_GRAD 
VKD3D_STAT_SAMPLE_BIAS 
VKD3D_STAT_LOAD 
VKD3D_STAT_STORE 
VKD3D_STAT_DCL_VERTICES_OUT 
VKD3D_STAT_DCL_INPUT_PRIMITIVE 
VKD3D_STAT_DCL_OUTPUT_TOPOLOGY 
VKD3D_STAT_DCL_GS_INSTANCES 
VKD3D_STAT_BITWISE 
VKD3D_STAT_ATOMIC 
VKD3D_STAT_TESS_DOMAIN 
VKD3D_STAT_TESS_PARTITIONING 
VKD3D_STAT_TESS_OUTPUT_PRIMITIVE 
VKD3D_STAT_TESS_CONTROL_POINT_COUNT 
VKD3D_STAT_BARRIER 
VKD3D_STAT_LOD 
VKD3D_STAT_GATHER 
VKD3D_STAT_TEMPS 
VKD3D_STAT_COUNT 

Definition at line 620 of file tpf.c.

621{
622 VKD3D_STAT_UNUSED = 0,
623 VKD3D_STAT_INSTR_COUNT,
624 VKD3D_STAT_MOV,
625 VKD3D_STAT_MOVC,
626 VKD3D_STAT_CONV,
627 VKD3D_STAT_FLOAT,
628 VKD3D_STAT_INT,
629 VKD3D_STAT_UINT,
630 VKD3D_STAT_EMIT,
631 VKD3D_STAT_CUT,
632 VKD3D_STAT_SAMPLE,
633 VKD3D_STAT_SAMPLE_C,
634 VKD3D_STAT_SAMPLE_GRAD,
635 VKD3D_STAT_SAMPLE_BIAS,
636 VKD3D_STAT_LOAD,
637 VKD3D_STAT_STORE,
638 VKD3D_STAT_DCL_VERTICES_OUT,
639 VKD3D_STAT_DCL_INPUT_PRIMITIVE,
640 VKD3D_STAT_DCL_OUTPUT_TOPOLOGY,
641 VKD3D_STAT_DCL_GS_INSTANCES,
642 VKD3D_STAT_BITWISE,
643 VKD3D_STAT_ATOMIC,
644 VKD3D_STAT_TESS_DOMAIN,
645 VKD3D_STAT_TESS_PARTITIONING,
646 VKD3D_STAT_TESS_OUTPUT_PRIMITIVE,
647 VKD3D_STAT_TESS_CONTROL_POINT_COUNT,
648 VKD3D_STAT_BARRIER,
649 VKD3D_STAT_LOD,
650 VKD3D_STAT_GATHER,
651 VKD3D_STAT_TEMPS,
652 VKD3D_STAT_COUNT,
653};
VKD3D_STAT_DCL_GS_INSTANCES
@ VKD3D_STAT_DCL_GS_INSTANCES
Definition: tpf.c:641
VKD3D_STAT_INT
@ VKD3D_STAT_INT
Definition: tpf.c:628
VKD3D_STAT_STORE
@ VKD3D_STAT_STORE
Definition: tpf.c:637
VKD3D_STAT_ATOMIC
@ VKD3D_STAT_ATOMIC
Definition: tpf.c:643
VKD3D_STAT_FLOAT
@ VKD3D_STAT_FLOAT
Definition: tpf.c:627
VKD3D_STAT_GATHER
@ VKD3D_STAT_GATHER
Definition: tpf.c:650
VKD3D_STAT_UNUSED
@ VKD3D_STAT_UNUSED
Definition: tpf.c:622
VKD3D_STAT_SAMPLE
@ VKD3D_STAT_SAMPLE
Definition: tpf.c:632
VKD3D_STAT_MOVC
@ VKD3D_STAT_MOVC
Definition: tpf.c:625
VKD3D_STAT_SAMPLE_C
@ VKD3D_STAT_SAMPLE_C
Definition: tpf.c:633
VKD3D_STAT_DCL_OUTPUT_TOPOLOGY
@ VKD3D_STAT_DCL_OUTPUT_TOPOLOGY
Definition: tpf.c:640
VKD3D_STAT_TESS_OUTPUT_PRIMITIVE
@ VKD3D_STAT_TESS_OUTPUT_PRIMITIVE
Definition: tpf.c:646
VKD3D_STAT_LOD
@ VKD3D_STAT_LOD
Definition: tpf.c:649
VKD3D_STAT_DCL_INPUT_PRIMITIVE
@ VKD3D_STAT_DCL_INPUT_PRIMITIVE
Definition: tpf.c:639
VKD3D_STAT_UINT
@ VKD3D_STAT_UINT
Definition: tpf.c:629
VKD3D_STAT_INSTR_COUNT
@ VKD3D_STAT_INSTR_COUNT
Definition: tpf.c:623
VKD3D_STAT_SAMPLE_GRAD
@ VKD3D_STAT_SAMPLE_GRAD
Definition: tpf.c:634
VKD3D_STAT_TESS_CONTROL_POINT_COUNT
@ VKD3D_STAT_TESS_CONTROL_POINT_COUNT
Definition: tpf.c:647
VKD3D_STAT_COUNT
@ VKD3D_STAT_COUNT
Definition: tpf.c:652
VKD3D_STAT_TESS_PARTITIONING
@ VKD3D_STAT_TESS_PARTITIONING
Definition: tpf.c:645
VKD3D_STAT_TESS_DOMAIN
@ VKD3D_STAT_TESS_DOMAIN
Definition: tpf.c:644
VKD3D_STAT_DCL_VERTICES_OUT
@ VKD3D_STAT_DCL_VERTICES_OUT
Definition: tpf.c:638
VKD3D_STAT_MOV
@ VKD3D_STAT_MOV
Definition: tpf.c:624
VKD3D_STAT_BARRIER
@ VKD3D_STAT_BARRIER
Definition: tpf.c:648
VKD3D_STAT_LOAD
@ VKD3D_STAT_LOAD
Definition: tpf.c:636
VKD3D_STAT_EMIT
@ VKD3D_STAT_EMIT
Definition: tpf.c:630
VKD3D_STAT_BITWISE
@ VKD3D_STAT_BITWISE
Definition: tpf.c:642
VKD3D_STAT_CUT
@ VKD3D_STAT_CUT
Definition: tpf.c:631
VKD3D_STAT_TEMPS
@ VKD3D_STAT_TEMPS
Definition: tpf.c:651
VKD3D_STAT_CONV
@ VKD3D_STAT_CONV
Definition: tpf.c:626
VKD3D_STAT_SAMPLE_BIAS
@ VKD3D_STAT_SAMPLE_BIAS
Definition: tpf.c:635

◆ vkd3d_sm4_swizzle_type

enum vkd3d_sm4_swizzle_type
Enumerator
VKD3D_SM4_SWIZZLE_NONE 
VKD3D_SM4_SWIZZLE_VEC4 
VKD3D_SM4_SWIZZLE_SCALAR 
VKD3D_SM4_SWIZZLE_DEFAULT 
VKD3D_SM4_SWIZZLE_INVALID 

Definition at line 530 of file tpf.c.

531{
532 VKD3D_SM4_SWIZZLE_NONE = 0x0, /* swizzle bitfield contains a mask */
533 VKD3D_SM4_SWIZZLE_VEC4 = 0x1,
534 VKD3D_SM4_SWIZZLE_SCALAR = 0x2,
535
536 VKD3D_SM4_SWIZZLE_DEFAULT = ~0u - 1,
537 VKD3D_SM4_SWIZZLE_INVALID = ~0u,
538};
u
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble * u
Definition: glfuncs.h:240
VKD3D_SM4_SWIZZLE_SCALAR
@ VKD3D_SM4_SWIZZLE_SCALAR
Definition: tpf.c:534
VKD3D_SM4_SWIZZLE_NONE
@ VKD3D_SM4_SWIZZLE_NONE
Definition: tpf.c:532
VKD3D_SM4_SWIZZLE_VEC4
@ VKD3D_SM4_SWIZZLE_VEC4
Definition: tpf.c:533
VKD3D_SM4_SWIZZLE_INVALID
@ VKD3D_SM4_SWIZZLE_INVALID
Definition: tpf.c:537
VKD3D_SM4_SWIZZLE_DEFAULT
@ VKD3D_SM4_SWIZZLE_DEFAULT
Definition: tpf.c:536

Function Documentation

◆ add_section()

static void add_section ( struct hlsl_ctx *  ctx,
struct dxbc_writer *  dxbc,
uint32_t  tag,
struct vkd3d_bytecode_buffer *  buffer 
)
static

Definition at line 3220 of file tpf.c.

3222{
3223 /* Native D3DDisassemble() expects at least the sizes of the ISGN and OSGN
3224 * sections to be aligned. Without this, the sections themselves will be
3225 * aligned, but their reported sizes won't. */
3226 size_t size = bytecode_align(buffer);
3227
3228 dxbc_writer_add_section(dxbc, tag, buffer->data, size);
3229
3230 if (buffer->status < 0)
3231 ctx->result = buffer->status;
3232}
dxbc_writer_add_section
void dxbc_writer_add_section(struct dxbc_writer *dxbc, uint32_t tag, const void *data, size_t size)
Definition: dxbc.c:41
buffer
GLuint buffer
Definition: glext.h:5915
size
GLsizeiptr size
Definition: glext.h:5919
tag
Definition: ecma_167.h:138
bytecode_align
size_t bytecode_align(struct vkd3d_bytecode_buffer *buffer)
Definition: vkd3d_shader_main.c:370

Referenced by tpf_write_shdr(), tpf_write_signature(), tpf_write_stat(), and write_sm4_rdef().

◆ encode_texel_offset_as_aoffimmi()

static bool encode_texel_offset_as_aoffimmi ( struct sm4_instruction *  instr,
const struct hlsl_ir_node *  texel_offset 
)
static

Definition at line 4653 of file tpf.c.

4655{
4656 struct sm4_instruction_modifier modif;
4657 struct hlsl_ir_constant *offset;
4658
4659 if (!texel_offset || texel_offset->type != HLSL_IR_CONSTANT)
4660 return false;
4661 offset = hlsl_ir_constant(texel_offset);
4662
4663 modif.type = VKD3D_SM4_MODIFIER_AOFFIMMI;
4664 modif.u.aoffimmi.u = offset->value.u[0].i;
4665 modif.u.aoffimmi.v = 0;
4666 modif.u.aoffimmi.w = 0;
4667 if (offset->node.data_type->dimx > 1)
4668 modif.u.aoffimmi.v = offset->value.u[1].i;
4669 if (offset->node.data_type->dimx > 2)
4670 modif.u.aoffimmi.w = offset->value.u[2].i;
4671 if (modif.u.aoffimmi.u < -8 || modif.u.aoffimmi.u > 7
4672 || modif.u.aoffimmi.v < -8 || modif.u.aoffimmi.v > 7
4673 || modif.u.aoffimmi.w < -8 || modif.u.aoffimmi.w > 7)
4674 return false;
4675
4676 instr->modifiers[instr->modifier_count++] = modif;
4677 return true;
4678}
offset
GLintptr offset
Definition: glext.h:5920
HLSL_IR_CONSTANT
@ HLSL_IR_CONSTANT
Definition: hlsl.h:316
hlsl_ir_constant
Definition: hlsl.h:876
hlsl_ir_node::type
enum hlsl_ir_node_type type
Definition: hlsl.h:345
sm4_instruction_modifier
Definition: tpf.c:4040
sm4_instruction::modifiers
struct sm4_instruction_modifier modifiers[1]
Definition: tpf.c:4081
sm4_instruction::modifier_count
unsigned int modifier_count
Definition: tpf.c:4082

Referenced by write_sm4_gather(), write_sm4_ld(), and write_sm4_sample().

◆ get_component_index_from_default_initializer_index()

static unsigned int get_component_index_from_default_initializer_index ( struct hlsl_type *  type,
unsigned int  index 
)
static

Definition at line 3737 of file tpf.c.

3738{
3739 unsigned int element_comp_count, element, x, y, i;
3740 unsigned int base = 0;
3741
3742 switch (type->class)
3743 {
3744 case HLSL_CLASS_MATRIX:
3745 x = index / type->dimy;
3746 y = index % type->dimy;
3747 return y * type->dimx + x;
3748
3749 case HLSL_CLASS_ARRAY:
3750 element_comp_count = hlsl_type_component_count(type->e.array.type);
3751 element = index / element_comp_count;
3752 base = element * element_comp_count;
3753 return base + get_component_index_from_default_initializer_index(type->e.array.type, index - base);
3754
3755 case HLSL_CLASS_STRUCT:
3756 for (i = 0; i < type->e.record.field_count; ++i)
3757 {
3758 struct hlsl_type *field_type = type->e.record.fields[i].type;
3759
3760 element_comp_count = hlsl_type_component_count(field_type);
3761 if (index - base < element_comp_count)
3762 return base + get_component_index_from_default_initializer_index(field_type, index - base);
3763 base += element_comp_count;
3764 }
3765 break;
3766
3767 default:
3768 return index;
3769 }
3770 vkd3d_unreachable();
3771}
index
#define index(s, c)
Definition: various.h:29
x
GLint GLint GLint GLint GLint x
Definition: gl.h:1548
type
GLuint GLuint GLsizei GLenum type
Definition: gl.h:1545
y
GLint GLint GLint GLint GLint GLint y
Definition: gl.h:1548
index
GLuint index
Definition: glext.h:6031
i
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
hlsl_type_component_count
unsigned int hlsl_type_component_count(const struct hlsl_type *type)
Definition: hlsl.c:1042
HLSL_CLASS_MATRIX
@ HLSL_CLASS_MATRIX
Definition: hlsl.h:85
HLSL_CLASS_STRUCT
@ HLSL_CLASS_STRUCT
Definition: hlsl.h:87
HLSL_CLASS_ARRAY
@ HLSL_CLASS_ARRAY
Definition: hlsl.h:88
hlsl_type
Definition: hlsl.h:157
hlsl_type::e
union hlsl_type::@5997 e
hlsl_type::record
struct hlsl_type::@5997::@5999 record
get_component_index_from_default_initializer_index
static unsigned int get_component_index_from_default_initializer_index(struct hlsl_type *type, unsigned int index)
Definition: tpf.c:3737
vkd3d_unreachable
#define vkd3d_unreachable()
Definition: vkd3d_common.h:119

Referenced by get_component_index_from_default_initializer_index(), and write_sm4_rdef().

◆ get_info_from_sm4_opcode()

static const struct vkd3d_sm4_opcode_info * get_info_from_sm4_opcode ( const struct vkd3d_sm4_lookup_tables *  lookup,
enum vkd3d_sm4_opcode  sm4_opcode 
)
static

Definition at line 1928 of file tpf.c.

1930{
1931 if (sm4_opcode >= VKD3D_SM4_OP_COUNT)
1932 return NULL;
1933 return lookup->opcode_info_from_sm4[sm4_opcode];
1934}
NULL
#define NULL
Definition: types.h:112
sm4_opcode
sm4_opcode
Definition: reflection.c:1776

Referenced by shader_sm4_read_instruction().

◆ get_info_from_sm4_register_type()

static const struct vkd3d_sm4_register_type_info * get_info_from_sm4_register_type ( const struct vkd3d_sm4_lookup_tables *  lookup,
enum vkd3d_sm4_register_type  sm4_type 
)
static

Definition at line 1954 of file tpf.c.

1956{
1957 if (sm4_type >= VKD3D_SM4_REGISTER_TYPE_COUNT)
1958 return NULL;
1959 return lookup->register_type_info_from_sm4[sm4_type];
1960}

Referenced by shader_sm4_read_param().

◆ get_info_from_vkd3d_register_type()

static const struct vkd3d_sm4_register_type_info * get_info_from_vkd3d_register_type ( const struct vkd3d_sm4_lookup_tables *  lookup,
enum vkd3d_shader_register_type  vkd3d_type 
)
static

Definition at line 1962 of file tpf.c.

1964{
1965 if (vkd3d_type >= VKD3DSPR_COUNT)
1966 return NULL;
1967 return lookup->register_type_info_from_vkd3d[vkd3d_type];
1968}
vkd3d_type
enum vkd3d_primitive_type vkd3d_type
Definition: tpf.c:725
VKD3DSPR_COUNT
@ VKD3DSPR_COUNT
Definition: vkd3d_shader_private.h:655

Referenced by sm4_encode_register(), and vkd3d_sm4_get_default_swizzle_type().

◆ get_info_from_vsir_opcode()

static const struct vkd3d_sm4_opcode_info * get_info_from_vsir_opcode ( const struct vkd3d_sm4_lookup_tables *  lookup,
enum vkd3d_shader_opcode  vsir_opcode 
)
static

Definition at line 1936 of file tpf.c.

1938{
1939 if (vsir_opcode >= VKD3DSIH_COUNT)
1940 return NULL;
1941 return lookup->opcode_info_from_vsir[vsir_opcode];
1942}
VKD3DSIH_COUNT
@ VKD3DSIH_COUNT
Definition: vkd3d_shader_private.h:589

Referenced by tpf_simple_instruction().

◆ get_insidetessfactor_sysval_semantic()

static bool get_insidetessfactor_sysval_semantic ( enum vkd3d_shader_sysval_semantic *  semantic,
enum vkd3d_tessellator_domain  domain,
uint32_t  index 
)
static

Definition at line 3079 of file tpf.c.

3081{
3082 switch (domain)
3083 {
3084 case VKD3D_TESSELLATOR_DOMAIN_LINE:
3085 return false;
3086
3087 case VKD3D_TESSELLATOR_DOMAIN_TRIANGLE:
3088 *semantic = VKD3D_SHADER_SV_TESS_FACTOR_TRIINT;
3089 return index == 0;
3090
3091 case VKD3D_TESSELLATOR_DOMAIN_QUAD:
3092 *semantic = VKD3D_SHADER_SV_TESS_FACTOR_QUADINT;
3093 return index < 2;
3094
3095 default:
3096 vkd3d_unreachable();
3097 }
3098}
domain
Definition: cookie.c:42
VKD3D_SHADER_SV_TESS_FACTOR_QUADINT
@ VKD3D_SHADER_SV_TESS_FACTOR_QUADINT
Definition: vkd3d_shader.h:2093
VKD3D_SHADER_SV_TESS_FACTOR_TRIINT
@ VKD3D_SHADER_SV_TESS_FACTOR_TRIINT
Definition: vkd3d_shader.h:2095
VKD3D_TESSELLATOR_DOMAIN_TRIANGLE
@ VKD3D_TESSELLATOR_DOMAIN_TRIANGLE
Definition: vkd3d_shader_private.h:842
VKD3D_TESSELLATOR_DOMAIN_LINE
@ VKD3D_TESSELLATOR_DOMAIN_LINE
Definition: vkd3d_shader_private.h:841
VKD3D_TESSELLATOR_DOMAIN_QUAD
@ VKD3D_TESSELLATOR_DOMAIN_QUAD
Definition: vkd3d_shader_private.h:843

Referenced by sm4_sysval_semantic_from_semantic_name().

◆ get_stat_field_from_sm4_opcode()

static enum vkd3d_sm4_stat_field get_stat_field_from_sm4_opcode ( const struct vkd3d_sm4_lookup_tables *  lookup,
enum vkd3d_sm4_opcode  sm4_opcode 
)
static

Definition at line 1980 of file tpf.c.

1982{
1983 const struct vkd3d_sm4_stat_field_info *field_info;
1984
1985 if (sm4_opcode >= VKD3D_SM4_OP_COUNT || !(field_info = lookup->stat_field_from_sm4[sm4_opcode]))
1986 return VKD3D_STAT_UNUSED;
1987 return field_info->field;
1988}
vkd3d_sm4_stat_field_info
Definition: tpf.c:656
vkd3d_sm4_stat_field_info::field
enum vkd3d_sm4_stat_field field
Definition: tpf.c:658

Referenced by sm4_update_stat_counters().

◆ get_tessfactor_sysval_semantic()

static bool get_tessfactor_sysval_semantic ( enum vkd3d_shader_sysval_semantic *  semantic,
enum vkd3d_tessellator_domain  domain,
uint32_t  index 
)
static

Definition at line 3052 of file tpf.c.

3054{
3055 switch (domain)
3056 {
3057 case VKD3D_TESSELLATOR_DOMAIN_LINE:
3058 if (index == 0)
3059 *semantic = VKD3D_SHADER_SV_TESS_FACTOR_LINEDEN;
3060 else if (index == 1)
3061 *semantic = VKD3D_SHADER_SV_TESS_FACTOR_LINEDET;
3062 else
3063 return false;
3064 return true;
3065
3066 case VKD3D_TESSELLATOR_DOMAIN_TRIANGLE:
3067 *semantic = VKD3D_SHADER_SV_TESS_FACTOR_TRIEDGE;
3068 return index < 3;
3069
3070 case VKD3D_TESSELLATOR_DOMAIN_QUAD:
3071 *semantic = VKD3D_SHADER_SV_TESS_FACTOR_QUADEDGE;
3072 return index < 4;
3073
3074 default:
3075 vkd3d_unreachable();
3076 }
3077}
VKD3D_SHADER_SV_TESS_FACTOR_TRIEDGE
@ VKD3D_SHADER_SV_TESS_FACTOR_TRIEDGE
Definition: vkd3d_shader.h:2094
VKD3D_SHADER_SV_TESS_FACTOR_LINEDET
@ VKD3D_SHADER_SV_TESS_FACTOR_LINEDET
Definition: vkd3d_shader.h:2096
VKD3D_SHADER_SV_TESS_FACTOR_QUADEDGE
@ VKD3D_SHADER_SV_TESS_FACTOR_QUADEDGE
Definition: vkd3d_shader.h:2092
VKD3D_SHADER_SV_TESS_FACTOR_LINEDEN
@ VKD3D_SHADER_SV_TESS_FACTOR_LINEDEN
Definition: vkd3d_shader.h:2097

Referenced by sm4_sysval_semantic_from_semantic_name().

◆ index_range_compare()

static int index_range_compare ( const void *  a,
const void *  b 
)
static

Definition at line 2872 of file tpf.c.

2873{
2874 return memcmp(a, b, sizeof(struct sm4_index_range));
2875}
memcmp
_ACRTIMP int __cdecl memcmp(const void *, const void *, size_t)
Definition: string.c:2807
b
GLboolean GLboolean GLboolean b
Definition: glext.h:6204
a
GLboolean GLboolean GLboolean GLboolean a
Definition: glext.h:6204
sm4_index_range
Definition: tpf.c:662

Referenced by shader_sm4_validate_default_phase_index_ranges().

◆ init_sm4_lookup_tables()

static void init_sm4_lookup_tables ( struct vkd3d_sm4_lookup_tables *  lookup)
static

Definition at line 1422 of file tpf.c.

1423{
1424 unsigned int i;
1425
1426 /*
1427 * d -> VKD3D_DATA_DOUBLE
1428 * f -> VKD3D_DATA_FLOAT
1429 * i -> VKD3D_DATA_INT
1430 * u -> VKD3D_DATA_UINT
1431 * O -> VKD3D_DATA_OPAQUE
1432 * R -> VKD3D_DATA_RESOURCE
1433 * S -> VKD3D_DATA_SAMPLER
1434 * U -> VKD3D_DATA_UAV
1435 */
1436 static const struct vkd3d_sm4_opcode_info opcode_table[] =
1437 {
1438 {VKD3D_SM4_OP_ADD, VKD3DSIH_ADD, "f", "ff"},
1439 {VKD3D_SM4_OP_AND, VKD3DSIH_AND, "u", "uu"},
1440 {VKD3D_SM4_OP_BREAK, VKD3DSIH_BREAK, "", ""},
1441 {VKD3D_SM4_OP_BREAKC, VKD3DSIH_BREAKP, "", "u",
1442 shader_sm4_read_conditional_op},
1443 {VKD3D_SM4_OP_CASE, VKD3DSIH_CASE, "", "u",
1444 shader_sm4_read_case_condition},
1445 {VKD3D_SM4_OP_CONTINUE, VKD3DSIH_CONTINUE, "", ""},
1446 {VKD3D_SM4_OP_CONTINUEC, VKD3DSIH_CONTINUEP, "", "u",
1447 shader_sm4_read_conditional_op},
1448 {VKD3D_SM4_OP_CUT, VKD3DSIH_CUT, "", ""},
1449 {VKD3D_SM4_OP_DEFAULT, VKD3DSIH_DEFAULT, "", ""},
1450 {VKD3D_SM4_OP_DERIV_RTX, VKD3DSIH_DSX, "f", "f"},
1451 {VKD3D_SM4_OP_DERIV_RTY, VKD3DSIH_DSY, "f", "f"},
1452 {VKD3D_SM4_OP_DISCARD, VKD3DSIH_DISCARD, "", "u",
1453 shader_sm4_read_conditional_op},
1454 {VKD3D_SM4_OP_DIV, VKD3DSIH_DIV, "f", "ff"},
1455 {VKD3D_SM4_OP_DP2, VKD3DSIH_DP2, "f", "ff"},
1456 {VKD3D_SM4_OP_DP3, VKD3DSIH_DP3, "f", "ff"},
1457 {VKD3D_SM4_OP_DP4, VKD3DSIH_DP4, "f", "ff"},
1458 {VKD3D_SM4_OP_ELSE, VKD3DSIH_ELSE, "", ""},
1459 {VKD3D_SM4_OP_EMIT, VKD3DSIH_EMIT, "", ""},
1460 {VKD3D_SM4_OP_ENDIF, VKD3DSIH_ENDIF, "", ""},
1461 {VKD3D_SM4_OP_ENDLOOP, VKD3DSIH_ENDLOOP, "", ""},
1462 {VKD3D_SM4_OP_ENDSWITCH, VKD3DSIH_ENDSWITCH, "", ""},
1463 {VKD3D_SM4_OP_EQ, VKD3DSIH_EQO, "u", "ff"},
1464 {VKD3D_SM4_OP_EXP, VKD3DSIH_EXP, "f", "f"},
1465 {VKD3D_SM4_OP_FRC, VKD3DSIH_FRC, "f", "f"},
1466 {VKD3D_SM4_OP_FTOI, VKD3DSIH_FTOI, "i", "f"},
1467 {VKD3D_SM4_OP_FTOU, VKD3DSIH_FTOU, "u", "f"},
1468 {VKD3D_SM4_OP_GE, VKD3DSIH_GEO, "u", "ff"},
1469 {VKD3D_SM4_OP_IADD, VKD3DSIH_IADD, "i", "ii"},
1470 {VKD3D_SM4_OP_IF, VKD3DSIH_IF, "", "u",
1471 shader_sm4_read_conditional_op},
1472 {VKD3D_SM4_OP_IEQ, VKD3DSIH_IEQ, "u", "ii"},
1473 {VKD3D_SM4_OP_IGE, VKD3DSIH_IGE, "u", "ii"},
1474 {VKD3D_SM4_OP_ILT, VKD3DSIH_ILT, "u", "ii"},
1475 {VKD3D_SM4_OP_IMAD, VKD3DSIH_IMAD, "i", "iii"},
1476 {VKD3D_SM4_OP_IMAX, VKD3DSIH_IMAX, "i", "ii"},
1477 {VKD3D_SM4_OP_IMIN, VKD3DSIH_IMIN, "i", "ii"},
1478 {VKD3D_SM4_OP_IMUL, VKD3DSIH_IMUL, "ii", "ii"},
1479 {VKD3D_SM4_OP_INE, VKD3DSIH_INE, "u", "ii"},
1480 {VKD3D_SM4_OP_INEG, VKD3DSIH_INEG, "i", "i"},
1481 {VKD3D_SM4_OP_ISHL, VKD3DSIH_ISHL, "i", "ii"},
1482 {VKD3D_SM4_OP_ISHR, VKD3DSIH_ISHR, "i", "ii"},
1483 {VKD3D_SM4_OP_ITOF, VKD3DSIH_ITOF, "f", "i"},
1484 {VKD3D_SM4_OP_LABEL, VKD3DSIH_LABEL, "", "O"},
1485 {VKD3D_SM4_OP_LD, VKD3DSIH_LD, "u", "i*"},
1486 {VKD3D_SM4_OP_LD2DMS, VKD3DSIH_LD2DMS, "u", "i*i"},
1487 {VKD3D_SM4_OP_LOG, VKD3DSIH_LOG, "f", "f"},
1488 {VKD3D_SM4_OP_LOOP, VKD3DSIH_LOOP, "", ""},
1489 {VKD3D_SM4_OP_LT, VKD3DSIH_LTO, "u", "ff"},
1490 {VKD3D_SM4_OP_MAD, VKD3DSIH_MAD, "f", "fff"},
1491 {VKD3D_SM4_OP_MIN, VKD3DSIH_MIN, "f", "ff"},
1492 {VKD3D_SM4_OP_MAX, VKD3DSIH_MAX, "f", "ff"},
1493 {VKD3D_SM4_OP_SHADER_DATA, VKD3DSIH_DCL_IMMEDIATE_CONSTANT_BUFFER, "", "",
1494 shader_sm4_read_shader_data},
1495 {VKD3D_SM4_OP_MOV, VKD3DSIH_MOV, "f", "f"},
1496 {VKD3D_SM4_OP_MOVC, VKD3DSIH_MOVC, "f", "uff"},
1497 {VKD3D_SM4_OP_MUL, VKD3DSIH_MUL, "f", "ff"},
1498 {VKD3D_SM4_OP_NE, VKD3DSIH_NEU, "u", "ff"},
1499 {VKD3D_SM4_OP_NOP, VKD3DSIH_NOP, "", ""},
1500 {VKD3D_SM4_OP_NOT, VKD3DSIH_NOT, "u", "u"},
1501 {VKD3D_SM4_OP_OR, VKD3DSIH_OR, "u", "uu"},
1502 {VKD3D_SM4_OP_RESINFO, VKD3DSIH_RESINFO, "f", "i*"},
1503 {VKD3D_SM4_OP_RET, VKD3DSIH_RET, "", ""},
1504 {VKD3D_SM4_OP_RETC, VKD3DSIH_RETP, "", "u",
1505 shader_sm4_read_conditional_op},
1506 {VKD3D_SM4_OP_ROUND_NE, VKD3DSIH_ROUND_NE, "f", "f"},
1507 {VKD3D_SM4_OP_ROUND_NI, VKD3DSIH_ROUND_NI, "f", "f"},
1508 {VKD3D_SM4_OP_ROUND_PI, VKD3DSIH_ROUND_PI, "f", "f"},
1509 {VKD3D_SM4_OP_ROUND_Z, VKD3DSIH_ROUND_Z, "f", "f"},
1510 {VKD3D_SM4_OP_RSQ, VKD3DSIH_RSQ, "f", "f"},
1511 {VKD3D_SM4_OP_SAMPLE, VKD3DSIH_SAMPLE, "u", "f**"},
1512 {VKD3D_SM4_OP_SAMPLE_C, VKD3DSIH_SAMPLE_C, "f", "f**f"},
1513 {VKD3D_SM4_OP_SAMPLE_C_LZ, VKD3DSIH_SAMPLE_C_LZ, "f", "f**f"},
1514 {VKD3D_SM4_OP_SAMPLE_LOD, VKD3DSIH_SAMPLE_LOD, "u", "f**f"},
1515 {VKD3D_SM4_OP_SAMPLE_GRAD, VKD3DSIH_SAMPLE_GRAD, "u", "f**ff"},
1516 {VKD3D_SM4_OP_SAMPLE_B, VKD3DSIH_SAMPLE_B, "u", "f**f"},
1517 {VKD3D_SM4_OP_SQRT, VKD3DSIH_SQRT, "f", "f"},
1518 {VKD3D_SM4_OP_SWITCH, VKD3DSIH_SWITCH, "", "i"},
1519 {VKD3D_SM4_OP_SINCOS, VKD3DSIH_SINCOS, "ff", "f"},
1520 {VKD3D_SM4_OP_UDIV, VKD3DSIH_UDIV, "uu", "uu"},
1521 {VKD3D_SM4_OP_ULT, VKD3DSIH_ULT, "u", "uu"},
1522 {VKD3D_SM4_OP_UGE, VKD3DSIH_UGE, "u", "uu"},
1523 {VKD3D_SM4_OP_UMUL, VKD3DSIH_UMUL, "uu", "uu"},
1524 {VKD3D_SM4_OP_UMAX, VKD3DSIH_UMAX, "u", "uu"},
1525 {VKD3D_SM4_OP_UMIN, VKD3DSIH_UMIN, "u", "uu"},
1526 {VKD3D_SM4_OP_USHR, VKD3DSIH_USHR, "u", "uu"},
1527 {VKD3D_SM4_OP_UTOF, VKD3DSIH_UTOF, "f", "u"},
1528 {VKD3D_SM4_OP_XOR, VKD3DSIH_XOR, "u", "uu"},
1529 {VKD3D_SM4_OP_DCL_RESOURCE, VKD3DSIH_DCL, "", "",
1530 shader_sm4_read_dcl_resource},
1531 {VKD3D_SM4_OP_DCL_CONSTANT_BUFFER, VKD3DSIH_DCL_CONSTANT_BUFFER, "", "",
1532 shader_sm4_read_dcl_constant_buffer},
1533 {VKD3D_SM4_OP_DCL_SAMPLER, VKD3DSIH_DCL_SAMPLER, "", "",
1534 shader_sm4_read_dcl_sampler},
1535 {VKD3D_SM4_OP_DCL_INDEX_RANGE, VKD3DSIH_DCL_INDEX_RANGE, "", "",
1536 shader_sm4_read_dcl_index_range},
1537 {VKD3D_SM4_OP_DCL_OUTPUT_TOPOLOGY, VKD3DSIH_DCL_OUTPUT_TOPOLOGY, "", "",
1538 shader_sm4_read_dcl_output_topology},
1539 {VKD3D_SM4_OP_DCL_INPUT_PRIMITIVE, VKD3DSIH_DCL_INPUT_PRIMITIVE, "", "",
1540 shader_sm4_read_dcl_input_primitive},
1541 {VKD3D_SM4_OP_DCL_VERTICES_OUT, VKD3DSIH_DCL_VERTICES_OUT, "", "",
1542 shader_sm4_read_declaration_count},
1543 {VKD3D_SM4_OP_DCL_INPUT, VKD3DSIH_DCL_INPUT, "", "",
1544 shader_sm4_read_declaration_dst},
1545 {VKD3D_SM4_OP_DCL_INPUT_SGV, VKD3DSIH_DCL_INPUT_SGV, "", "",
1546 shader_sm4_read_declaration_register_semantic},
1547 {VKD3D_SM4_OP_DCL_INPUT_SIV, VKD3DSIH_DCL_INPUT_SIV, "", "",
1548 shader_sm4_read_declaration_register_semantic},
1549 {VKD3D_SM4_OP_DCL_INPUT_PS, VKD3DSIH_DCL_INPUT_PS, "", "",
1550 shader_sm4_read_dcl_input_ps},
1551 {VKD3D_SM4_OP_DCL_INPUT_PS_SGV, VKD3DSIH_DCL_INPUT_PS_SGV, "", "",
1552 shader_sm4_read_declaration_register_semantic},
1553 {VKD3D_SM4_OP_DCL_INPUT_PS_SIV, VKD3DSIH_DCL_INPUT_PS_SIV, "", "",
1554 shader_sm4_read_dcl_input_ps_siv},
1555 {VKD3D_SM4_OP_DCL_OUTPUT, VKD3DSIH_DCL_OUTPUT, "", "",
1556 shader_sm4_read_declaration_dst},
1557 {VKD3D_SM4_OP_DCL_OUTPUT_SIV, VKD3DSIH_DCL_OUTPUT_SIV, "", "",
1558 shader_sm4_read_declaration_register_semantic},
1559 {VKD3D_SM4_OP_DCL_TEMPS, VKD3DSIH_DCL_TEMPS, "", "",
1560 shader_sm4_read_declaration_count},
1561 {VKD3D_SM4_OP_DCL_INDEXABLE_TEMP, VKD3DSIH_DCL_INDEXABLE_TEMP, "", "",
1562 shader_sm4_read_dcl_indexable_temp},
1563 {VKD3D_SM4_OP_DCL_GLOBAL_FLAGS, VKD3DSIH_DCL_GLOBAL_FLAGS, "", "",
1564 shader_sm4_read_dcl_global_flags},
1565 {VKD3D_SM4_OP_LOD, VKD3DSIH_LOD, "f", "f**"},
1566 {VKD3D_SM4_OP_GATHER4, VKD3DSIH_GATHER4, "u", "f**"},
1567 {VKD3D_SM4_OP_SAMPLE_POS, VKD3DSIH_SAMPLE_POS, "f", "*u"},
1568 {VKD3D_SM4_OP_SAMPLE_INFO, VKD3DSIH_SAMPLE_INFO, "f", "*"},
1569 {VKD3D_SM5_OP_HS_DECLS, VKD3DSIH_HS_DECLS, "", ""},
1570 {VKD3D_SM5_OP_HS_CONTROL_POINT_PHASE, VKD3DSIH_HS_CONTROL_POINT_PHASE, "", ""},
1571 {VKD3D_SM5_OP_HS_FORK_PHASE, VKD3DSIH_HS_FORK_PHASE, "", ""},
1572 {VKD3D_SM5_OP_HS_JOIN_PHASE, VKD3DSIH_HS_JOIN_PHASE, "", ""},
1573 {VKD3D_SM5_OP_EMIT_STREAM, VKD3DSIH_EMIT_STREAM, "", "f"},
1574 {VKD3D_SM5_OP_CUT_STREAM, VKD3DSIH_CUT_STREAM, "", "f"},
1575 {VKD3D_SM5_OP_FCALL, VKD3DSIH_FCALL, "", "O",
1576 shader_sm5_read_fcall},
1577 {VKD3D_SM5_OP_BUFINFO, VKD3DSIH_BUFINFO, "i", "*"},
1578 {VKD3D_SM5_OP_DERIV_RTX_COARSE, VKD3DSIH_DSX_COARSE, "f", "f"},
1579 {VKD3D_SM5_OP_DERIV_RTX_FINE, VKD3DSIH_DSX_FINE, "f", "f"},
1580 {VKD3D_SM5_OP_DERIV_RTY_COARSE, VKD3DSIH_DSY_COARSE, "f", "f"},
1581 {VKD3D_SM5_OP_DERIV_RTY_FINE, VKD3DSIH_DSY_FINE, "f", "f"},
1582 {VKD3D_SM5_OP_GATHER4_C, VKD3DSIH_GATHER4_C, "f", "f**f"},
1583 {VKD3D_SM5_OP_GATHER4_PO, VKD3DSIH_GATHER4_PO, "f", "fi**"},
1584 {VKD3D_SM5_OP_GATHER4_PO_C, VKD3DSIH_GATHER4_PO_C, "f", "fi**f"},
1585 {VKD3D_SM5_OP_RCP, VKD3DSIH_RCP, "f", "f"},
1586 {VKD3D_SM5_OP_F32TOF16, VKD3DSIH_F32TOF16, "u", "f"},
1587 {VKD3D_SM5_OP_F16TOF32, VKD3DSIH_F16TOF32, "f", "u"},
1588 {VKD3D_SM5_OP_COUNTBITS, VKD3DSIH_COUNTBITS, "u", "u"},
1589 {VKD3D_SM5_OP_FIRSTBIT_HI, VKD3DSIH_FIRSTBIT_HI, "u", "u"},
1590 {VKD3D_SM5_OP_FIRSTBIT_LO, VKD3DSIH_FIRSTBIT_LO, "u", "u"},
1591 {VKD3D_SM5_OP_FIRSTBIT_SHI, VKD3DSIH_FIRSTBIT_SHI, "u", "i"},
1592 {VKD3D_SM5_OP_UBFE, VKD3DSIH_UBFE, "u", "iiu"},
1593 {VKD3D_SM5_OP_IBFE, VKD3DSIH_IBFE, "i", "iii"},
1594 {VKD3D_SM5_OP_BFI, VKD3DSIH_BFI, "u", "iiuu"},
1595 {VKD3D_SM5_OP_BFREV, VKD3DSIH_BFREV, "u", "u"},
1596 {VKD3D_SM5_OP_SWAPC, VKD3DSIH_SWAPC, "ff", "uff"},
1597 {VKD3D_SM5_OP_DCL_STREAM, VKD3DSIH_DCL_STREAM, "", "O"},
1598 {VKD3D_SM5_OP_DCL_FUNCTION_BODY, VKD3DSIH_DCL_FUNCTION_BODY, "", "",
1599 shader_sm5_read_dcl_function_body},
1600 {VKD3D_SM5_OP_DCL_FUNCTION_TABLE, VKD3DSIH_DCL_FUNCTION_TABLE, "", "",
1601 shader_sm5_read_dcl_function_table},
1602 {VKD3D_SM5_OP_DCL_INTERFACE, VKD3DSIH_DCL_INTERFACE, "", "",
1603 shader_sm5_read_dcl_interface},
1604 {VKD3D_SM5_OP_DCL_INPUT_CONTROL_POINT_COUNT, VKD3DSIH_DCL_INPUT_CONTROL_POINT_COUNT, "", "",
1605 shader_sm5_read_control_point_count},
1606 {VKD3D_SM5_OP_DCL_OUTPUT_CONTROL_POINT_COUNT, VKD3DSIH_DCL_OUTPUT_CONTROL_POINT_COUNT, "", "",
1607 shader_sm5_read_control_point_count},
1608 {VKD3D_SM5_OP_DCL_TESSELLATOR_DOMAIN, VKD3DSIH_DCL_TESSELLATOR_DOMAIN, "", "",
1609 shader_sm5_read_dcl_tessellator_domain},
1610 {VKD3D_SM5_OP_DCL_TESSELLATOR_PARTITIONING, VKD3DSIH_DCL_TESSELLATOR_PARTITIONING, "", "",
1611 shader_sm5_read_dcl_tessellator_partitioning},
1612 {VKD3D_SM5_OP_DCL_TESSELLATOR_OUTPUT_PRIMITIVE, VKD3DSIH_DCL_TESSELLATOR_OUTPUT_PRIMITIVE, "", "",
1613 shader_sm5_read_dcl_tessellator_output_primitive},
1614 {VKD3D_SM5_OP_DCL_HS_MAX_TESSFACTOR, VKD3DSIH_DCL_HS_MAX_TESSFACTOR, "", "",
1615 shader_sm5_read_dcl_hs_max_tessfactor},
1616 {VKD3D_SM5_OP_DCL_HS_FORK_PHASE_INSTANCE_COUNT, VKD3DSIH_DCL_HS_FORK_PHASE_INSTANCE_COUNT, "", "",
1617 shader_sm4_read_declaration_count},
1618 {VKD3D_SM5_OP_DCL_HS_JOIN_PHASE_INSTANCE_COUNT, VKD3DSIH_DCL_HS_JOIN_PHASE_INSTANCE_COUNT, "", "",
1619 shader_sm4_read_declaration_count},
1620 {VKD3D_SM5_OP_DCL_THREAD_GROUP, VKD3DSIH_DCL_THREAD_GROUP, "", "",
1621 shader_sm5_read_dcl_thread_group},
1622 {VKD3D_SM5_OP_DCL_UAV_TYPED, VKD3DSIH_DCL_UAV_TYPED, "", "",
1623 shader_sm4_read_dcl_resource},
1624 {VKD3D_SM5_OP_DCL_UAV_RAW, VKD3DSIH_DCL_UAV_RAW, "", "",
1625 shader_sm5_read_dcl_uav_raw},
1626 {VKD3D_SM5_OP_DCL_UAV_STRUCTURED, VKD3DSIH_DCL_UAV_STRUCTURED, "", "",
1627 shader_sm5_read_dcl_uav_structured},
1628 {VKD3D_SM5_OP_DCL_TGSM_RAW, VKD3DSIH_DCL_TGSM_RAW, "", "",
1629 shader_sm5_read_dcl_tgsm_raw},
1630 {VKD3D_SM5_OP_DCL_TGSM_STRUCTURED, VKD3DSIH_DCL_TGSM_STRUCTURED, "", "",
1631 shader_sm5_read_dcl_tgsm_structured},
1632 {VKD3D_SM5_OP_DCL_RESOURCE_RAW, VKD3DSIH_DCL_RESOURCE_RAW, "", "",
1633 shader_sm5_read_dcl_resource_raw},
1634 {VKD3D_SM5_OP_DCL_RESOURCE_STRUCTURED, VKD3DSIH_DCL_RESOURCE_STRUCTURED, "", "",
1635 shader_sm5_read_dcl_resource_structured},
1636 {VKD3D_SM5_OP_LD_UAV_TYPED, VKD3DSIH_LD_UAV_TYPED, "u", "i*"},
1637 {VKD3D_SM5_OP_STORE_UAV_TYPED, VKD3DSIH_STORE_UAV_TYPED, "*", "iu"},
1638 {VKD3D_SM5_OP_LD_RAW, VKD3DSIH_LD_RAW, "u", "i*"},
1639 {VKD3D_SM5_OP_STORE_RAW, VKD3DSIH_STORE_RAW, "*", "uu"},
1640 {VKD3D_SM5_OP_LD_STRUCTURED, VKD3DSIH_LD_STRUCTURED, "u", "ii*"},
1641 {VKD3D_SM5_OP_STORE_STRUCTURED, VKD3DSIH_STORE_STRUCTURED, "*", "iiu"},
1642 {VKD3D_SM5_OP_ATOMIC_AND, VKD3DSIH_ATOMIC_AND, "*", "iu"},
1643 {VKD3D_SM5_OP_ATOMIC_OR, VKD3DSIH_ATOMIC_OR, "*", "iu"},
1644 {VKD3D_SM5_OP_ATOMIC_XOR, VKD3DSIH_ATOMIC_XOR, "*", "iu"},
1645 {VKD3D_SM5_OP_ATOMIC_CMP_STORE, VKD3DSIH_ATOMIC_CMP_STORE, "*", "iuu"},
1646 {VKD3D_SM5_OP_ATOMIC_IADD, VKD3DSIH_ATOMIC_IADD, "*", "ii"},
1647 {VKD3D_SM5_OP_ATOMIC_IMAX, VKD3DSIH_ATOMIC_IMAX, "*", "ii"},
1648 {VKD3D_SM5_OP_ATOMIC_IMIN, VKD3DSIH_ATOMIC_IMIN, "*", "ii"},
1649 {VKD3D_SM5_OP_ATOMIC_UMAX, VKD3DSIH_ATOMIC_UMAX, "*", "iu"},
1650 {VKD3D_SM5_OP_ATOMIC_UMIN, VKD3DSIH_ATOMIC_UMIN, "*", "iu"},
1651 {VKD3D_SM5_OP_IMM_ATOMIC_ALLOC, VKD3DSIH_IMM_ATOMIC_ALLOC, "u", "*"},
1652 {VKD3D_SM5_OP_IMM_ATOMIC_CONSUME, VKD3DSIH_IMM_ATOMIC_CONSUME, "u", "*"},
1653 {VKD3D_SM5_OP_IMM_ATOMIC_IADD, VKD3DSIH_IMM_ATOMIC_IADD, "u*", "ii"},
1654 {VKD3D_SM5_OP_IMM_ATOMIC_AND, VKD3DSIH_IMM_ATOMIC_AND, "u*", "iu"},
1655 {VKD3D_SM5_OP_IMM_ATOMIC_OR, VKD3DSIH_IMM_ATOMIC_OR, "u*", "iu"},
1656 {VKD3D_SM5_OP_IMM_ATOMIC_XOR, VKD3DSIH_IMM_ATOMIC_XOR, "u*", "iu"},
1657 {VKD3D_SM5_OP_IMM_ATOMIC_EXCH, VKD3DSIH_IMM_ATOMIC_EXCH, "u*", "iu"},
1658 {VKD3D_SM5_OP_IMM_ATOMIC_CMP_EXCH, VKD3DSIH_IMM_ATOMIC_CMP_EXCH, "u*", "iuu"},
1659 {VKD3D_SM5_OP_IMM_ATOMIC_IMAX, VKD3DSIH_IMM_ATOMIC_IMAX, "i*", "ii"},
1660 {VKD3D_SM5_OP_IMM_ATOMIC_IMIN, VKD3DSIH_IMM_ATOMIC_IMIN, "i*", "ii"},
1661 {VKD3D_SM5_OP_IMM_ATOMIC_UMAX, VKD3DSIH_IMM_ATOMIC_UMAX, "u*", "iu"},
1662 {VKD3D_SM5_OP_IMM_ATOMIC_UMIN, VKD3DSIH_IMM_ATOMIC_UMIN, "u*", "iu"},
1663 {VKD3D_SM5_OP_SYNC, VKD3DSIH_SYNC, "", "",
1664 shader_sm5_read_sync},
1665 {VKD3D_SM5_OP_DADD, VKD3DSIH_DADD, "d", "dd"},
1666 {VKD3D_SM5_OP_DMAX, VKD3DSIH_DMAX, "d", "dd"},
1667 {VKD3D_SM5_OP_DMIN, VKD3DSIH_DMIN, "d", "dd"},
1668 {VKD3D_SM5_OP_DMUL, VKD3DSIH_DMUL, "d", "dd"},
1669 {VKD3D_SM5_OP_DEQ, VKD3DSIH_DEQO, "u", "dd"},
1670 {VKD3D_SM5_OP_DGE, VKD3DSIH_DGEO, "u", "dd"},
1671 {VKD3D_SM5_OP_DLT, VKD3DSIH_DLT, "u", "dd"},
1672 {VKD3D_SM5_OP_DNE, VKD3DSIH_DNE, "u", "dd"},
1673 {VKD3D_SM5_OP_DMOV, VKD3DSIH_DMOV, "d", "d"},
1674 {VKD3D_SM5_OP_DMOVC, VKD3DSIH_DMOVC, "d", "udd"},
1675 {VKD3D_SM5_OP_DTOF, VKD3DSIH_DTOF, "f", "d"},
1676 {VKD3D_SM5_OP_FTOD, VKD3DSIH_FTOD, "d", "f"},
1677 {VKD3D_SM5_OP_EVAL_SAMPLE_INDEX, VKD3DSIH_EVAL_SAMPLE_INDEX, "f", "fi"},
1678 {VKD3D_SM5_OP_EVAL_CENTROID, VKD3DSIH_EVAL_CENTROID, "f", "f"},
1679 {VKD3D_SM5_OP_DCL_GS_INSTANCES, VKD3DSIH_DCL_GS_INSTANCES, "", "",
1680 shader_sm4_read_declaration_count},
1681 {VKD3D_SM5_OP_DDIV, VKD3DSIH_DDIV, "d", "dd"},
1682 {VKD3D_SM5_OP_DFMA, VKD3DSIH_DFMA, "d", "ddd"},
1683 {VKD3D_SM5_OP_DRCP, VKD3DSIH_DRCP, "d", "d"},
1684 {VKD3D_SM5_OP_MSAD, VKD3DSIH_MSAD, "u", "uuu"},
1685 {VKD3D_SM5_OP_DTOI, VKD3DSIH_DTOI, "i", "d"},
1686 {VKD3D_SM5_OP_DTOU, VKD3DSIH_DTOU, "u", "d"},
1687 {VKD3D_SM5_OP_ITOD, VKD3DSIH_ITOD, "d", "i"},
1688 {VKD3D_SM5_OP_UTOD, VKD3DSIH_UTOD, "d", "u"},
1689 {VKD3D_SM5_OP_GATHER4_S, VKD3DSIH_GATHER4_S, "uu", "f**"},
1690 {VKD3D_SM5_OP_GATHER4_C_S, VKD3DSIH_GATHER4_C_S, "fu", "f**f"},
1691 {VKD3D_SM5_OP_GATHER4_PO_S, VKD3DSIH_GATHER4_PO_S, "fu", "fi**"},
1692 {VKD3D_SM5_OP_GATHER4_PO_C_S, VKD3DSIH_GATHER4_PO_C_S, "fu", "fi**f"},
1693 {VKD3D_SM5_OP_LD_S, VKD3DSIH_LD_S, "uu", "i*"},
1694 {VKD3D_SM5_OP_LD2DMS_S, VKD3DSIH_LD2DMS_S, "uu", "i*i"},
1695 {VKD3D_SM5_OP_LD_UAV_TYPED_S, VKD3DSIH_LD_UAV_TYPED_S, "uu", "iU"},
1696 {VKD3D_SM5_OP_LD_RAW_S, VKD3DSIH_LD_RAW_S, "uu", "iU"},
1697 {VKD3D_SM5_OP_LD_STRUCTURED_S, VKD3DSIH_LD_STRUCTURED_S, "uu", "ii*"},
1698 {VKD3D_SM5_OP_SAMPLE_LOD_S, VKD3DSIH_SAMPLE_LOD_S, "uu", "f**f"},
1699 {VKD3D_SM5_OP_SAMPLE_C_LZ_S, VKD3DSIH_SAMPLE_C_LZ_S, "fu", "f**f"},
1700 {VKD3D_SM5_OP_SAMPLE_CL_S, VKD3DSIH_SAMPLE_CL_S, "uu", "f**f"},
1701 {VKD3D_SM5_OP_SAMPLE_B_CL_S, VKD3DSIH_SAMPLE_B_CL_S, "uu", "f**ff"},
1702 {VKD3D_SM5_OP_SAMPLE_GRAD_CL_S, VKD3DSIH_SAMPLE_GRAD_CL_S, "uu", "f**fff"},
1703 {VKD3D_SM5_OP_SAMPLE_C_CL_S, VKD3DSIH_SAMPLE_C_CL_S, "fu", "f**ff"},
1704 {VKD3D_SM5_OP_CHECK_ACCESS_FULLY_MAPPED, VKD3DSIH_CHECK_ACCESS_FULLY_MAPPED, "u", "u"},
1705 };
1706
1707 static const struct vkd3d_sm4_register_type_info register_type_table[] =
1708 {
1709 {VKD3D_SM4_RT_TEMP, VKD3DSPR_TEMP, VKD3D_SM4_SWIZZLE_VEC4},
1710 {VKD3D_SM4_RT_INPUT, VKD3DSPR_INPUT, VKD3D_SM4_SWIZZLE_VEC4},
1711 {VKD3D_SM4_RT_OUTPUT, VKD3DSPR_OUTPUT, VKD3D_SM4_SWIZZLE_INVALID},
1712 {VKD3D_SM4_RT_INDEXABLE_TEMP, VKD3DSPR_IDXTEMP, VKD3D_SM4_SWIZZLE_VEC4},
1713 {VKD3D_SM4_RT_IMMCONST, VKD3DSPR_IMMCONST, VKD3D_SM4_SWIZZLE_NONE},
1714 {VKD3D_SM4_RT_IMMCONST64, VKD3DSPR_IMMCONST64, VKD3D_SM4_SWIZZLE_NONE},
1715 {VKD3D_SM4_RT_SAMPLER, VKD3DSPR_SAMPLER, VKD3D_SM4_SWIZZLE_SCALAR},
1716 {VKD3D_SM4_RT_RESOURCE, VKD3DSPR_RESOURCE, VKD3D_SM4_SWIZZLE_VEC4},
1717 {VKD3D_SM4_RT_CONSTBUFFER, VKD3DSPR_CONSTBUFFER, VKD3D_SM4_SWIZZLE_VEC4},
1718 {VKD3D_SM4_RT_IMMCONSTBUFFER, VKD3DSPR_IMMCONSTBUFFER, VKD3D_SM4_SWIZZLE_VEC4},
1719 {VKD3D_SM4_RT_PRIMID, VKD3DSPR_PRIMID, VKD3D_SM4_SWIZZLE_NONE},
1720 {VKD3D_SM4_RT_DEPTHOUT, VKD3DSPR_DEPTHOUT, VKD3D_SM4_SWIZZLE_VEC4},
1721 {VKD3D_SM4_RT_NULL, VKD3DSPR_NULL, VKD3D_SM4_SWIZZLE_INVALID},
1722 {VKD3D_SM4_RT_RASTERIZER, VKD3DSPR_RASTERIZER, VKD3D_SM4_SWIZZLE_SCALAR},
1723 {VKD3D_SM4_RT_OMASK, VKD3DSPR_SAMPLEMASK, VKD3D_SM4_SWIZZLE_VEC4},
1724 {VKD3D_SM5_RT_STREAM, VKD3DSPR_STREAM, VKD3D_SM4_SWIZZLE_VEC4},
1725 {VKD3D_SM5_RT_FUNCTION_BODY, VKD3DSPR_FUNCTIONBODY, VKD3D_SM4_SWIZZLE_VEC4},
1726 {VKD3D_SM5_RT_FUNCTION_POINTER, VKD3DSPR_FUNCTIONPOINTER, VKD3D_SM4_SWIZZLE_VEC4},
1727 {VKD3D_SM5_RT_OUTPUT_CONTROL_POINT_ID, VKD3DSPR_OUTPOINTID, VKD3D_SM4_SWIZZLE_VEC4},
1728 {VKD3D_SM5_RT_FORK_INSTANCE_ID, VKD3DSPR_FORKINSTID, VKD3D_SM4_SWIZZLE_VEC4},
1729 {VKD3D_SM5_RT_JOIN_INSTANCE_ID, VKD3DSPR_JOININSTID, VKD3D_SM4_SWIZZLE_VEC4},
1730 {VKD3D_SM5_RT_INPUT_CONTROL_POINT, VKD3DSPR_INCONTROLPOINT, VKD3D_SM4_SWIZZLE_VEC4},
1731 {VKD3D_SM5_RT_OUTPUT_CONTROL_POINT, VKD3DSPR_OUTCONTROLPOINT, VKD3D_SM4_SWIZZLE_VEC4},
1732 {VKD3D_SM5_RT_PATCH_CONSTANT_DATA, VKD3DSPR_PATCHCONST, VKD3D_SM4_SWIZZLE_VEC4},
1733 {VKD3D_SM5_RT_DOMAIN_LOCATION, VKD3DSPR_TESSCOORD, VKD3D_SM4_SWIZZLE_VEC4},
1734 {VKD3D_SM5_RT_UAV, VKD3DSPR_UAV, VKD3D_SM4_SWIZZLE_VEC4},
1735 {VKD3D_SM5_RT_SHARED_MEMORY, VKD3DSPR_GROUPSHAREDMEM, VKD3D_SM4_SWIZZLE_VEC4},
1736 {VKD3D_SM5_RT_THREAD_ID, VKD3DSPR_THREADID, VKD3D_SM4_SWIZZLE_VEC4},
1737 {VKD3D_SM5_RT_THREAD_GROUP_ID, VKD3DSPR_THREADGROUPID, VKD3D_SM4_SWIZZLE_VEC4},
1738 {VKD3D_SM5_RT_LOCAL_THREAD_ID, VKD3DSPR_LOCALTHREADID, VKD3D_SM4_SWIZZLE_VEC4},
1739 {VKD3D_SM5_RT_COVERAGE, VKD3DSPR_COVERAGE, VKD3D_SM4_SWIZZLE_VEC4},
1740 {VKD3D_SM5_RT_LOCAL_THREAD_INDEX, VKD3DSPR_LOCALTHREADINDEX,VKD3D_SM4_SWIZZLE_VEC4},
1741 {VKD3D_SM5_RT_GS_INSTANCE_ID, VKD3DSPR_GSINSTID, VKD3D_SM4_SWIZZLE_VEC4},
1742 {VKD3D_SM5_RT_DEPTHOUT_GREATER_EQUAL, VKD3DSPR_DEPTHOUTGE, VKD3D_SM4_SWIZZLE_VEC4},
1743 {VKD3D_SM5_RT_DEPTHOUT_LESS_EQUAL, VKD3DSPR_DEPTHOUTLE, VKD3D_SM4_SWIZZLE_VEC4},
1744 {VKD3D_SM5_RT_OUTPUT_STENCIL_REF, VKD3DSPR_OUTSTENCILREF, VKD3D_SM4_SWIZZLE_VEC4},
1745 };
1746
1747 static const struct vkd3d_sm4_stat_field_info stat_field_table[] =
1748 {
1749 {VKD3D_SM4_OP_MOV, VKD3D_STAT_MOV},
1750 {VKD3D_SM4_OP_MOVC, VKD3D_STAT_MOVC},
1751 {VKD3D_SM5_OP_DMOV, VKD3D_STAT_MOV},
1752 {VKD3D_SM5_OP_DMOVC, VKD3D_STAT_MOVC},
1753
1754 {VKD3D_SM4_OP_ITOF, VKD3D_STAT_CONV},
1755 {VKD3D_SM4_OP_FTOI, VKD3D_STAT_CONV},
1756 {VKD3D_SM4_OP_FTOU, VKD3D_STAT_CONV},
1757 {VKD3D_SM4_OP_UTOF, VKD3D_STAT_CONV},
1758 {VKD3D_SM5_OP_DTOU, VKD3D_STAT_CONV},
1759 {VKD3D_SM5_OP_UTOD, VKD3D_STAT_CONV},
1760 {VKD3D_SM5_OP_DTOF, VKD3D_STAT_CONV},
1761 {VKD3D_SM5_OP_FTOD, VKD3D_STAT_CONV},
1762 {VKD3D_SM5_OP_DTOI, VKD3D_STAT_CONV},
1763 {VKD3D_SM5_OP_ITOD, VKD3D_STAT_CONV},
1764 {VKD3D_SM5_OP_F32TOF16, VKD3D_STAT_CONV},
1765 {VKD3D_SM5_OP_F16TOF32, VKD3D_STAT_CONV},
1766
1767 {VKD3D_SM4_OP_ADD, VKD3D_STAT_FLOAT},
1768 {VKD3D_SM4_OP_DIV, VKD3D_STAT_FLOAT},
1769 {VKD3D_SM4_OP_DP2, VKD3D_STAT_FLOAT},
1770 {VKD3D_SM4_OP_DP3, VKD3D_STAT_FLOAT},
1771 {VKD3D_SM4_OP_DP4, VKD3D_STAT_FLOAT},
1772 {VKD3D_SM4_OP_EQ, VKD3D_STAT_FLOAT},
1773 {VKD3D_SM4_OP_EXP, VKD3D_STAT_FLOAT},
1774 {VKD3D_SM4_OP_FRC, VKD3D_STAT_FLOAT},
1775 {VKD3D_SM4_OP_GE, VKD3D_STAT_FLOAT},
1776 {VKD3D_SM4_OP_LT, VKD3D_STAT_FLOAT},
1777 {VKD3D_SM4_OP_MAD, VKD3D_STAT_FLOAT},
1778 {VKD3D_SM4_OP_MIN, VKD3D_STAT_FLOAT},
1779 {VKD3D_SM4_OP_MAX, VKD3D_STAT_FLOAT},
1780 {VKD3D_SM4_OP_MUL, VKD3D_STAT_FLOAT},
1781 {VKD3D_SM4_OP_NE, VKD3D_STAT_FLOAT},
1782 {VKD3D_SM4_OP_ROUND_NE, VKD3D_STAT_FLOAT},
1783 {VKD3D_SM4_OP_ROUND_NI, VKD3D_STAT_FLOAT},
1784 {VKD3D_SM4_OP_ROUND_PI, VKD3D_STAT_FLOAT},
1785 {VKD3D_SM4_OP_ROUND_Z, VKD3D_STAT_FLOAT},
1786 {VKD3D_SM4_OP_RSQ, VKD3D_STAT_FLOAT},
1787 {VKD3D_SM4_OP_SQRT, VKD3D_STAT_FLOAT},
1788 {VKD3D_SM4_OP_SINCOS, VKD3D_STAT_FLOAT},
1789 {VKD3D_SM5_OP_RCP, VKD3D_STAT_FLOAT},
1790 {VKD3D_SM5_OP_DADD, VKD3D_STAT_FLOAT},
1791 {VKD3D_SM5_OP_DMAX, VKD3D_STAT_FLOAT},
1792 {VKD3D_SM5_OP_DMIN, VKD3D_STAT_FLOAT},
1793 {VKD3D_SM5_OP_DMUL, VKD3D_STAT_FLOAT},
1794 {VKD3D_SM5_OP_DEQ, VKD3D_STAT_FLOAT},
1795 {VKD3D_SM5_OP_DGE, VKD3D_STAT_FLOAT},
1796 {VKD3D_SM5_OP_DLT, VKD3D_STAT_FLOAT},
1797 {VKD3D_SM5_OP_DNE, VKD3D_STAT_FLOAT},
1798 {VKD3D_SM5_OP_DDIV, VKD3D_STAT_FLOAT},
1799 {VKD3D_SM5_OP_DFMA, VKD3D_STAT_FLOAT},
1800 {VKD3D_SM5_OP_DRCP, VKD3D_STAT_FLOAT},
1801
1802 {VKD3D_SM4_OP_IADD, VKD3D_STAT_INT},
1803 {VKD3D_SM4_OP_IEQ, VKD3D_STAT_INT},
1804 {VKD3D_SM4_OP_IGE, VKD3D_STAT_INT},
1805 {VKD3D_SM4_OP_ILT, VKD3D_STAT_INT},
1806 {VKD3D_SM4_OP_IMAD, VKD3D_STAT_INT},
1807 {VKD3D_SM4_OP_IMAX, VKD3D_STAT_INT},
1808 {VKD3D_SM4_OP_IMIN, VKD3D_STAT_INT},
1809 {VKD3D_SM4_OP_IMUL, VKD3D_STAT_INT},
1810 {VKD3D_SM4_OP_INE, VKD3D_STAT_INT},
1811 {VKD3D_SM4_OP_INEG, VKD3D_STAT_INT},
1812 {VKD3D_SM4_OP_ISHL, VKD3D_STAT_INT},
1813 {VKD3D_SM4_OP_ISHR, VKD3D_STAT_INT},
1814 {VKD3D_SM4_OP_ITOF, VKD3D_STAT_INT},
1815
1816 {VKD3D_SM4_OP_UDIV, VKD3D_STAT_UINT},
1817 {VKD3D_SM4_OP_ULT, VKD3D_STAT_UINT},
1818 {VKD3D_SM4_OP_UGE, VKD3D_STAT_UINT},
1819 {VKD3D_SM4_OP_UMUL, VKD3D_STAT_UINT},
1820 {VKD3D_SM4_OP_UMAX, VKD3D_STAT_UINT},
1821 {VKD3D_SM4_OP_UMIN, VKD3D_STAT_UINT},
1822 {VKD3D_SM4_OP_USHR, VKD3D_STAT_UINT},
1823
1824 {VKD3D_SM4_OP_EMIT, VKD3D_STAT_EMIT},
1825 {VKD3D_SM4_OP_CUT, VKD3D_STAT_CUT},
1826 {VKD3D_SM5_OP_EMIT_STREAM, VKD3D_STAT_EMIT},
1827 {VKD3D_SM5_OP_CUT_STREAM, VKD3D_STAT_CUT},
1828
1829 {VKD3D_SM4_OP_SAMPLE, VKD3D_STAT_SAMPLE},
1830 {VKD3D_SM4_OP_SAMPLE_LOD, VKD3D_STAT_SAMPLE},
1831 {VKD3D_SM5_OP_SAMPLE_LOD_S, VKD3D_STAT_SAMPLE},
1832 {VKD3D_SM5_OP_SAMPLE_CL_S, VKD3D_STAT_SAMPLE},
1833 {VKD3D_SM4_OP_SAMPLE_C, VKD3D_STAT_SAMPLE_C},
1834 {VKD3D_SM4_OP_SAMPLE_C_LZ, VKD3D_STAT_SAMPLE_C},
1835 {VKD3D_SM5_OP_SAMPLE_C_LZ_S, VKD3D_STAT_SAMPLE_C},
1836 {VKD3D_SM5_OP_SAMPLE_C_CL_S, VKD3D_STAT_SAMPLE_C},
1837 {VKD3D_SM4_OP_SAMPLE_GRAD, VKD3D_STAT_SAMPLE_GRAD},
1838 {VKD3D_SM5_OP_SAMPLE_GRAD_CL_S, VKD3D_STAT_SAMPLE_GRAD},
1839 {VKD3D_SM4_OP_SAMPLE_B, VKD3D_STAT_SAMPLE_BIAS},
1840 {VKD3D_SM4_OP_GATHER4, VKD3D_STAT_GATHER},
1841 {VKD3D_SM5_OP_GATHER4_PO, VKD3D_STAT_GATHER},
1842 {VKD3D_SM4_OP_LOD, VKD3D_STAT_LOD},
1843
1844 {VKD3D_SM4_OP_LD, VKD3D_STAT_LOAD},
1845 {VKD3D_SM4_OP_LD2DMS, VKD3D_STAT_LOAD},
1846 {VKD3D_SM5_OP_LD_UAV_TYPED, VKD3D_STAT_LOAD},
1847 {VKD3D_SM5_OP_LD_RAW, VKD3D_STAT_LOAD},
1848 {VKD3D_SM5_OP_LD_STRUCTURED, VKD3D_STAT_LOAD},
1849 {VKD3D_SM5_OP_LD_S, VKD3D_STAT_LOAD},
1850 {VKD3D_SM5_OP_LD2DMS_S, VKD3D_STAT_LOAD},
1851 {VKD3D_SM5_OP_LD_UAV_TYPED_S, VKD3D_STAT_LOAD},
1852 {VKD3D_SM5_OP_LD_RAW_S, VKD3D_STAT_LOAD},
1853 {VKD3D_SM5_OP_LD_STRUCTURED_S, VKD3D_STAT_LOAD},
1854
1855 {VKD3D_SM5_OP_STORE_UAV_TYPED, VKD3D_STAT_STORE},
1856 {VKD3D_SM5_OP_STORE_RAW, VKD3D_STAT_STORE},
1857 {VKD3D_SM5_OP_STORE_STRUCTURED,VKD3D_STAT_STORE},
1858
1859 {VKD3D_SM4_OP_DCL_VERTICES_OUT, VKD3D_STAT_DCL_VERTICES_OUT},
1860 {VKD3D_SM4_OP_DCL_INPUT_PRIMITIVE, VKD3D_STAT_DCL_INPUT_PRIMITIVE},
1861 {VKD3D_SM4_OP_DCL_OUTPUT_TOPOLOGY, VKD3D_STAT_DCL_OUTPUT_TOPOLOGY},
1862 {VKD3D_SM5_OP_DCL_GS_INSTANCES, VKD3D_STAT_DCL_GS_INSTANCES},
1863
1864 {VKD3D_SM4_OP_AND, VKD3D_STAT_BITWISE},
1865 {VKD3D_SM4_OP_NOT, VKD3D_STAT_BITWISE},
1866 {VKD3D_SM4_OP_OR, VKD3D_STAT_BITWISE},
1867 {VKD3D_SM4_OP_XOR, VKD3D_STAT_BITWISE},
1868
1869 {VKD3D_SM5_OP_ATOMIC_AND, VKD3D_STAT_ATOMIC},
1870 {VKD3D_SM5_OP_ATOMIC_OR, VKD3D_STAT_ATOMIC},
1871 {VKD3D_SM5_OP_ATOMIC_XOR, VKD3D_STAT_ATOMIC},
1872 {VKD3D_SM5_OP_ATOMIC_CMP_STORE, VKD3D_STAT_ATOMIC},
1873 {VKD3D_SM5_OP_ATOMIC_IADD, VKD3D_STAT_ATOMIC},
1874 {VKD3D_SM5_OP_ATOMIC_IMAX, VKD3D_STAT_ATOMIC},
1875 {VKD3D_SM5_OP_ATOMIC_IMIN, VKD3D_STAT_ATOMIC},
1876 {VKD3D_SM5_OP_ATOMIC_UMAX, VKD3D_STAT_ATOMIC},
1877 {VKD3D_SM5_OP_ATOMIC_UMIN, VKD3D_STAT_ATOMIC},
1878 {VKD3D_SM5_OP_IMM_ATOMIC_ALLOC, VKD3D_STAT_ATOMIC},
1879 {VKD3D_SM5_OP_IMM_ATOMIC_CONSUME, VKD3D_STAT_ATOMIC},
1880 {VKD3D_SM5_OP_IMM_ATOMIC_IADD, VKD3D_STAT_ATOMIC},
1881 {VKD3D_SM5_OP_IMM_ATOMIC_AND, VKD3D_STAT_ATOMIC},
1882 {VKD3D_SM5_OP_IMM_ATOMIC_OR, VKD3D_STAT_ATOMIC},
1883 {VKD3D_SM5_OP_IMM_ATOMIC_XOR, VKD3D_STAT_ATOMIC},
1884 {VKD3D_SM5_OP_IMM_ATOMIC_EXCH, VKD3D_STAT_ATOMIC},
1885 {VKD3D_SM5_OP_IMM_ATOMIC_CMP_EXCH, VKD3D_STAT_ATOMIC},
1886 {VKD3D_SM5_OP_IMM_ATOMIC_IMAX, VKD3D_STAT_ATOMIC},
1887 {VKD3D_SM5_OP_IMM_ATOMIC_IMIN, VKD3D_STAT_ATOMIC},
1888 {VKD3D_SM5_OP_IMM_ATOMIC_UMAX, VKD3D_STAT_ATOMIC},
1889 {VKD3D_SM5_OP_IMM_ATOMIC_UMIN, VKD3D_STAT_ATOMIC},
1890
1891 {VKD3D_SM5_OP_DCL_TESSELLATOR_DOMAIN, VKD3D_STAT_TESS_DOMAIN},
1892 {VKD3D_SM5_OP_DCL_TESSELLATOR_PARTITIONING, VKD3D_STAT_TESS_PARTITIONING},
1893 {VKD3D_SM5_OP_DCL_TESSELLATOR_OUTPUT_PRIMITIVE, VKD3D_STAT_TESS_OUTPUT_PRIMITIVE},
1894 {VKD3D_SM5_OP_DCL_INPUT_CONTROL_POINT_COUNT, VKD3D_STAT_TESS_CONTROL_POINT_COUNT},
1895 {VKD3D_SM5_OP_DCL_OUTPUT_CONTROL_POINT_COUNT, VKD3D_STAT_TESS_CONTROL_POINT_COUNT},
1896
1897 {VKD3D_SM5_OP_SYNC, VKD3D_STAT_BARRIER},
1898
1899 {VKD3D_SM4_OP_DCL_TEMPS, VKD3D_STAT_TEMPS},
1900 };
1901
1902 memset(lookup, 0, sizeof(*lookup));
1903
1904 for (i = 0; i < ARRAY_SIZE(opcode_table); ++i)
1905 {
1906 const struct vkd3d_sm4_opcode_info *info = &opcode_table[i];
1907
1908 lookup->opcode_info_from_sm4[info->opcode] = info;
1909 lookup->opcode_info_from_vsir[info->handler_idx] = info;
1910 }
1911
1912 for (i = 0; i < ARRAY_SIZE(register_type_table); ++i)
1913 {
1914 const struct vkd3d_sm4_register_type_info *info = &register_type_table[i];
1915
1916 lookup->register_type_info_from_sm4[info->sm4_type] = info;
1917 lookup->register_type_info_from_vkd3d[info->vkd3d_type] = info;
1918 }
1919
1920 for (i = 0; i < ARRAY_SIZE(stat_field_table); ++i)
1921 {
1922 const struct vkd3d_sm4_stat_field_info *info = &stat_field_table[i];
1923
1924 lookup->stat_field_from_sm4[info->opcode] = info;
1925 }
1926}
ARRAY_SIZE
#define ARRAY_SIZE(A)
Definition: main.h:20
memset
#define memset(x, y, z)
Definition: compat.h:39
opcode_table
static const struct wined3d_sm4_opcode_info opcode_table[]
Definition: shader_sm4.c:912
register_type_table
static enum wined3d_shader_register_type register_type_table[]
Definition: shader_sm4.c:1146
vkd3d_sm4_opcode_info
Definition: tpf.c:703
vkd3d_sm4_register_type_info
Definition: tpf.c:1385
shader_sm5_read_dcl_interface
static void shader_sm5_read_dcl_interface(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1242
shader_sm5_read_dcl_tgsm_raw
static void shader_sm5_read_dcl_tgsm_raw(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1331
shader_sm5_read_dcl_function_table
static void shader_sm5_read_dcl_function_table(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1235
shader_sm4_read_declaration_count
static void shader_sm4_read_declaration_count(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *sm4)
Definition: tpf.c:1127
shader_sm4_read_dcl_global_flags
static void shader_sm4_read_dcl_global_flags(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *sm4)
Definition: tpf.c:1215
shader_sm5_read_dcl_uav_raw
static void shader_sm5_read_dcl_uav_raw(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1304
shader_sm5_read_dcl_tessellator_partitioning
static void shader_sm5_read_dcl_tessellator_partitioning(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1273
shader_sm4_read_dcl_constant_buffer
static void shader_sm4_read_dcl_constant_buffer(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:926
shader_sm5_read_dcl_tgsm_structured
static void shader_sm5_read_dcl_tgsm_structured(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1341
shader_sm5_read_dcl_function_body
static void shader_sm5_read_dcl_function_body(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1229
shader_sm5_read_dcl_thread_group
static void shader_sm5_read_dcl_thread_group(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *sm4)
Definition: tpf.c:1293
shader_sm4_read_case_condition
static void shader_sm4_read_case_condition(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:805
shader_sm4_read_declaration_dst
static void shader_sm4_read_declaration_dst(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1137
shader_sm5_read_dcl_tessellator_domain
static void shader_sm5_read_dcl_tessellator_domain(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1266
shader_sm5_read_dcl_tessellator_output_primitive
static void shader_sm5_read_dcl_tessellator_output_primitive(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1280
shader_sm4_read_shader_data
static void shader_sm4_read_shader_data(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:817
shader_sm4_read_dcl_index_range
static void shader_sm4_read_dcl_index_range(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:972
shader_sm5_read_fcall
static void shader_sm5_read_fcall(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1222
shader_sm5_read_dcl_hs_max_tessfactor
static void shader_sm5_read_dcl_hs_max_tessfactor(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1287
shader_sm4_read_dcl_output_topology
static void shader_sm4_read_dcl_output_topology(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1085
shader_sm4_read_dcl_indexable_temp
static void shader_sm4_read_dcl_indexable_temp(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1204
shader_sm5_read_control_point_count
static void shader_sm5_read_control_point_count(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *sm4)
Definition: tpf.c:1252
shader_sm4_read_conditional_op
static void shader_sm4_read_conditional_op(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:797
shader_sm5_read_sync
static void shader_sm5_read_sync(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1378
shader_sm5_read_dcl_resource_structured
static void shader_sm5_read_dcl_resource_structured(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1353
shader_sm5_read_dcl_resource_raw
static void shader_sm5_read_dcl_resource_raw(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1367
shader_sm4_read_dcl_sampler
static void shader_sm4_read_dcl_sampler(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:954
shader_sm5_read_dcl_uav_structured
static void shader_sm5_read_dcl_uav_structured(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1316
shader_sm4_read_dcl_input_ps_siv
static void shader_sm4_read_dcl_input_ps_siv(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1177
shader_sm4_read_dcl_input_primitive
static void shader_sm4_read_dcl_input_primitive(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *sm4)
Definition: tpf.c:1100
shader_sm4_read_dcl_input_ps
static void shader_sm4_read_dcl_input_ps(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1151
shader_sm4_read_dcl_resource
static void shader_sm4_read_dcl_resource(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:871
shader_sm4_read_declaration_register_semantic
static void shader_sm4_read_declaration_register_semantic(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:1143
VKD3DSPR_PRIMID
@ VKD3DSPR_PRIMID
Definition: vkd3d_shader_private.h:620
VKD3DSPR_DEPTHOUTGE
@ VKD3DSPR_DEPTHOUTGE
Definition: vkd3d_shader_private.h:644
VKD3DSPR_RASTERIZER
@ VKD3DSPR_RASTERIZER
Definition: vkd3d_shader_private.h:646
VKD3DSPR_INCONTROLPOINT
@ VKD3DSPR_INCONTROLPOINT
Definition: vkd3d_shader_private.h:628
VKD3DSPR_IMMCONST
@ VKD3DSPR_IMMCONST
Definition: vkd3d_shader_private.h:616
VKD3DSPR_GROUPSHAREDMEM
@ VKD3DSPR_GROUPSHAREDMEM
Definition: vkd3d_shader_private.h:632
VKD3DSPR_SAMPLEMASK
@ VKD3DSPR_SAMPLEMASK
Definition: vkd3d_shader_private.h:642
VKD3DSPR_GSINSTID
@ VKD3DSPR_GSINSTID
Definition: vkd3d_shader_private.h:643
VKD3DSPR_FUNCTIONPOINTER
@ VKD3DSPR_FUNCTIONPOINTER
Definition: vkd3d_shader_private.h:640
VKD3DSPR_NULL
@ VKD3DSPR_NULL
Definition: vkd3d_shader_private.h:621
VKD3DSPR_CONSTBUFFER
@ VKD3DSPR_CONSTBUFFER
Definition: vkd3d_shader_private.h:618
VKD3DSPR_FUNCTIONBODY
@ VKD3DSPR_FUNCTIONBODY
Definition: vkd3d_shader_private.h:639
VKD3DSPR_RESOURCE
@ VKD3DSPR_RESOURCE
Definition: vkd3d_shader_private.h:623
VKD3DSPR_DEPTHOUT
@ VKD3DSPR_DEPTHOUT
Definition: vkd3d_shader_private.h:605
VKD3DSPR_DEPTHOUTLE
@ VKD3DSPR_DEPTHOUTLE
Definition: vkd3d_shader_private.h:645
VKD3DSPR_JOININSTID
@ VKD3DSPR_JOININSTID
Definition: vkd3d_shader_private.h:627
VKD3DSPR_TESSCOORD
@ VKD3DSPR_TESSCOORD
Definition: vkd3d_shader_private.h:631
VKD3DSPR_COVERAGE
@ VKD3DSPR_COVERAGE
Definition: vkd3d_shader_private.h:641
VKD3DSPR_IMMCONST64
@ VKD3DSPR_IMMCONST64
Definition: vkd3d_shader_private.h:617
VKD3DSPR_UAV
@ VKD3DSPR_UAV
Definition: vkd3d_shader_private.h:624
VKD3DSPR_TEMP
@ VKD3DSPR_TEMP
Definition: vkd3d_shader_private.h:594
VKD3DSPR_THREADGROUPID
@ VKD3DSPR_THREADGROUPID
Definition: vkd3d_shader_private.h:634
VKD3DSPR_IDXTEMP
@ VKD3DSPR_IDXTEMP
Definition: vkd3d_shader_private.h:637
VKD3DSPR_LOCALTHREADINDEX
@ VKD3DSPR_LOCALTHREADINDEX
Definition: vkd3d_shader_private.h:636
VKD3DSPR_THREADID
@ VKD3DSPR_THREADID
Definition: vkd3d_shader_private.h:633
VKD3DSPR_OUTPUT
@ VKD3DSPR_OUTPUT
Definition: vkd3d_shader_private.h:602
VKD3DSPR_LOCALTHREADID
@ VKD3DSPR_LOCALTHREADID
Definition: vkd3d_shader_private.h:635
VKD3DSPR_SAMPLER
@ VKD3DSPR_SAMPLER
Definition: vkd3d_shader_private.h:622
VKD3DSPR_FORKINSTID
@ VKD3DSPR_FORKINSTID
Definition: vkd3d_shader_private.h:626
VKD3DSPR_OUTCONTROLPOINT
@ VKD3DSPR_OUTCONTROLPOINT
Definition: vkd3d_shader_private.h:629
VKD3DSPR_OUTPOINTID
@ VKD3DSPR_OUTPOINTID
Definition: vkd3d_shader_private.h:625
VKD3DSPR_IMMCONSTBUFFER
@ VKD3DSPR_IMMCONSTBUFFER
Definition: vkd3d_shader_private.h:619
VKD3DSPR_OUTSTENCILREF
@ VKD3DSPR_OUTSTENCILREF
Definition: vkd3d_shader_private.h:647
VKD3DSPR_STREAM
@ VKD3DSPR_STREAM
Definition: vkd3d_shader_private.h:638
VKD3DSPR_PATCHCONST
@ VKD3DSPR_PATCHCONST
Definition: vkd3d_shader_private.h:630
VKD3DSPR_INPUT
@ VKD3DSPR_INPUT
Definition: vkd3d_shader_private.h:595
VKD3DSIH_LD_UAV_TYPED_S
@ VKD3DSIH_LD_UAV_TYPED_S
Definition: vkd3d_shader_private.h:456
VKD3DSIH_NOP
@ VKD3DSIH_NOP
Definition: vkd3d_shader_private.h:480
VKD3DSIH_RESINFO
@ VKD3DSIH_RESINFO
Definition: vkd3d_shader_private.h:494
VKD3DSIH_ENDSWITCH
@ VKD3DSIH_ENDSWITCH
Definition: vkd3d_shader_private.h:377
VKD3DSIH_DP2
@ VKD3DSIH_DP2
Definition: vkd3d_shader_private.h:356
VKD3DSIH_HS_JOIN_PHASE
@ VKD3DSIH_HS_JOIN_PHASE
Definition: vkd3d_shader_private.h:409
VKD3DSIH_IMAD
@ VKD3DSIH_IMAD
Definition: vkd3d_shader_private.h:420
VKD3DSIH_F16TOF32
@ VKD3DSIH_F16TOF32
Definition: vkd3d_shader_private.h:384
VKD3DSIH_UMUL
@ VKD3DSIH_UMUL
Definition: vkd3d_shader_private.h:559
VKD3DSIH_DCL_IMMEDIATE_CONSTANT_BUFFER
@ VKD3DSIH_DCL_IMMEDIATE_CONSTANT_BUFFER
Definition: vkd3d_shader_private.h:308
VKD3DSIH_AND
@ VKD3DSIH_AND
Definition: vkd3d_shader_private.h:266
VKD3DSIH_IMM_ATOMIC_UMAX
@ VKD3DSIH_IMM_ATOMIC_UMAX
Definition: vkd3d_shader_private.h:432
VKD3DSIH_DCL_HS_JOIN_PHASE_INSTANCE_COUNT
@ VKD3DSIH_DCL_HS_JOIN_PHASE_INSTANCE_COUNT
Definition: vkd3d_shader_private.h:306
VKD3DSIH_DMOV
@ VKD3DSIH_DMOV
Definition: vkd3d_shader_private.h:352
VKD3DSIH_DCL_TESSELLATOR_OUTPUT_PRIMITIVE
@ VKD3DSIH_DCL_TESSELLATOR_OUTPUT_PRIMITIVE
Definition: vkd3d_shader_private.h:330
VKD3DSIH_GATHER4_PO_C
@ VKD3DSIH_GATHER4_PO_C
Definition: vkd3d_shader_private.h:399
VKD3DSIH_DCL_INPUT_CONTROL_POINT_COUNT
@ VKD3DSIH_DCL_INPUT_CONTROL_POINT_COUNT
Definition: vkd3d_shader_private.h:312
VKD3DSIH_ISHL
@ VKD3DSIH_ISHL
Definition: vkd3d_shader_private.h:439
VKD3DSIH_GATHER4_S
@ VKD3DSIH_GATHER4_S
Definition: vkd3d_shader_private.h:402
VKD3DSIH_SAMPLE_C_LZ
@ VKD3DSIH_SAMPLE_C_LZ
Definition: vkd3d_shader_private.h:507
VKD3DSIH_IMUL
@ VKD3DSIH_IMUL
Definition: vkd3d_shader_private.h:435
VKD3DSIH_LOOP
@ VKD3DSIH_LOOP
Definition: vkd3d_shader_private.h:461
VKD3DSIH_SAMPLE_INFO
@ VKD3DSIH_SAMPLE_INFO
Definition: vkd3d_shader_private.h:512
VKD3DSIH_ROUND_PI
@ VKD3DSIH_ROUND_PI
Definition: vkd3d_shader_private.h:499
VKD3DSIH_RETP
@ VKD3DSIH_RETP
Definition: vkd3d_shader_private.h:496
VKD3DSIH_DCL_INPUT_PS
@ VKD3DSIH_DCL_INPUT_PS
Definition: vkd3d_shader_private.h:314
VKD3DSIH_SWITCH
@ VKD3DSIH_SWITCH
Definition: vkd3d_shader_private.h:527
VKD3DSIH_ATOMIC_OR
@ VKD3DSIH_ATOMIC_OR
Definition: vkd3d_shader_private.h:274
VKD3DSIH_UGE
@ VKD3DSIH_UGE
Definition: vkd3d_shader_private.h:555
VKD3DSIH_DSX_COARSE
@ VKD3DSIH_DSX_COARSE
Definition: vkd3d_shader_private.h:363
VKD3DSIH_DCL_INTERFACE
@ VKD3DSIH_DCL_INTERFACE
Definition: vkd3d_shader_private.h:319
VKD3DSIH_IMM_ATOMIC_XOR
@ VKD3DSIH_IMM_ATOMIC_XOR
Definition: vkd3d_shader_private.h:434
VKD3DSIH_IADD
@ VKD3DSIH_IADD
Definition: vkd3d_shader_private.h:412
VKD3DSIH_GATHER4_PO_C_S
@ VKD3DSIH_GATHER4_PO_C_S
Definition: vkd3d_shader_private.h:400
VKD3DSIH_DCL_INPUT_PRIMITIVE
@ VKD3DSIH_DCL_INPUT_PRIMITIVE
Definition: vkd3d_shader_private.h:313
VKD3DSIH_DP4
@ VKD3DSIH_DP4
Definition: vkd3d_shader_private.h:359
VKD3DSIH_DRCP
@ VKD3DSIH_DRCP
Definition: vkd3d_shader_private.h:360
VKD3DSIH_DIV
@ VKD3DSIH_DIV
Definition: vkd3d_shader_private.h:348
VKD3DSIH_STORE_UAV_TYPED
@ VKD3DSIH_STORE_UAV_TYPED
Definition: vkd3d_shader_private.h:524
VKD3DSIH_EMIT_STREAM
@ VKD3DSIH_EMIT_STREAM
Definition: vkd3d_shader_private.h:373
VKD3DSIH_DTOI
@ VKD3DSIH_DTOI
Definition: vkd3d_shader_private.h:369
VKD3DSIH_DTOF
@ VKD3DSIH_DTOF
Definition: vkd3d_shader_private.h:368
VKD3DSIH_IEQ
@ VKD3DSIH_IEQ
Definition: vkd3d_shader_private.h:415
VKD3DSIH_DNE
@ VKD3DSIH_DNE
Definition: vkd3d_shader_private.h:355
VKD3DSIH_DCL_OUTPUT
@ VKD3DSIH_DCL_OUTPUT
Definition: vkd3d_shader_private.h:320
VKD3DSIH_SAMPLE_B_CL_S
@ VKD3DSIH_SAMPLE_B_CL_S
Definition: vkd3d_shader_private.h:504
VKD3DSIH_LD_UAV_TYPED
@ VKD3DSIH_LD_UAV_TYPED
Definition: vkd3d_shader_private.h:455
VKD3DSIH_XOR
@ VKD3DSIH_XOR
Definition: vkd3d_shader_private.h:585
VKD3DSIH_DCL_GS_INSTANCES
@ VKD3DSIH_DCL_GS_INSTANCES
Definition: vkd3d_shader_private.h:304
VKD3DSIH_SAMPLE
@ VKD3DSIH_SAMPLE
Definition: vkd3d_shader_private.h:502
VKD3DSIH_UMAX
@ VKD3DSIH_UMAX
Definition: vkd3d_shader_private.h:557
VKD3DSIH_LD_STRUCTURED
@ VKD3DSIH_LD_STRUCTURED
Definition: vkd3d_shader_private.h:453
VKD3DSIH_SAMPLE_C_CL_S
@ VKD3DSIH_SAMPLE_C_CL_S
Definition: vkd3d_shader_private.h:506
VKD3DSIH_DCL_OUTPUT_SIV
@ VKD3DSIH_DCL_OUTPUT_SIV
Definition: vkd3d_shader_private.h:322
VKD3DSIH_SAMPLE_C
@ VKD3DSIH_SAMPLE_C
Definition: vkd3d_shader_private.h:505
VKD3DSIH_DSY_FINE
@ VKD3DSIH_DSY_FINE
Definition: vkd3d_shader_private.h:367
VKD3DSIH_ISHR
@ VKD3DSIH_ISHR
Definition: vkd3d_shader_private.h:440
VKD3DSIH_DCL_FUNCTION_TABLE
@ VKD3DSIH_DCL_FUNCTION_TABLE
Definition: vkd3d_shader_private.h:302
VKD3DSIH_NEU
@ VKD3DSIH_NEU
Definition: vkd3d_shader_private.h:479
VKD3DSIH_ATOMIC_XOR
@ VKD3DSIH_ATOMIC_XOR
Definition: vkd3d_shader_private.h:277
VKD3DSIH_DCL_RESOURCE_RAW
@ VKD3DSIH_DCL_RESOURCE_RAW
Definition: vkd3d_shader_private.h:324
VKD3DSIH_FTOD
@ VKD3DSIH_FTOD
Definition: vkd3d_shader_private.h:392
VKD3DSIH_DCL_VERTICES_OUT
@ VKD3DSIH_DCL_VERTICES_OUT
Definition: vkd3d_shader_private.h:338
VKD3DSIH_DCL_SAMPLER
@ VKD3DSIH_DCL_SAMPLER
Definition: vkd3d_shader_private.h:326
VKD3DSIH_DADD
@ VKD3DSIH_DADD
Definition: vkd3d_shader_private.h:298
VKD3DSIH_DCL_INPUT_SGV
@ VKD3DSIH_DCL_INPUT_SGV
Definition: vkd3d_shader_private.h:317
VKD3DSIH_GATHER4_PO
@ VKD3DSIH_GATHER4_PO
Definition: vkd3d_shader_private.h:398
VKD3DSIH_ROUND_NE
@ VKD3DSIH_ROUND_NE
Definition: vkd3d_shader_private.h:497
VKD3DSIH_DCL_OUTPUT_TOPOLOGY
@ VKD3DSIH_DCL_OUTPUT_TOPOLOGY
Definition: vkd3d_shader_private.h:323
VKD3DSIH_EVAL_CENTROID
@ VKD3DSIH_EVAL_CENTROID
Definition: vkd3d_shader_private.h:380
VKD3DSIH_IMM_ATOMIC_CONSUME
@ VKD3DSIH_IMM_ATOMIC_CONSUME
Definition: vkd3d_shader_private.h:426
VKD3DSIH_MUL
@ VKD3DSIH_MUL
Definition: vkd3d_shader_private.h:477
VKD3DSIH_BREAK
@ VKD3DSIH_BREAK
Definition: vkd3d_shader_private.h:282
VKD3DSIH_DCL_UAV_RAW
@ VKD3DSIH_DCL_UAV_RAW
Definition: vkd3d_shader_private.h:335
VKD3DSIH_LD2DMS
@ VKD3DSIH_LD2DMS
Definition: vkd3d_shader_private.h:448
VKD3DSIH_EXP
@ VKD3DSIH_EXP
Definition: vkd3d_shader_private.h:382
VKD3DSIH_DISCARD
@ VKD3DSIH_DISCARD
Definition: vkd3d_shader_private.h:347
VKD3DSIH_SWAPC
@ VKD3DSIH_SWAPC
Definition: vkd3d_shader_private.h:526
VKD3DSIH_BFREV
@ VKD3DSIH_BFREV
Definition: vkd3d_shader_private.h:280
VKD3DSIH_HS_DECLS
@ VKD3DSIH_HS_DECLS
Definition: vkd3d_shader_private.h:407
VKD3DSIH_DFMA
@ VKD3DSIH_DFMA
Definition: vkd3d_shader_private.h:345
VKD3DSIH_ATOMIC_UMIN
@ VKD3DSIH_ATOMIC_UMIN
Definition: vkd3d_shader_private.h:276
VKD3DSIH_SAMPLE_LOD
@ VKD3DSIH_SAMPLE_LOD
Definition: vkd3d_shader_private.h:513
VKD3DSIH_ATOMIC_AND
@ VKD3DSIH_ATOMIC_AND
Definition: vkd3d_shader_private.h:269
VKD3DSIH_CASE
@ VKD3DSIH_CASE
Definition: vkd3d_shader_private.h:288
VKD3DSIH_MIN
@ VKD3DSIH_MIN
Definition: vkd3d_shader_private.h:472
VKD3DSIH_RCP
@ VKD3DSIH_RCP
Definition: vkd3d_shader_private.h:492
VKD3DSIH_DEQO
@ VKD3DSIH_DEQO
Definition: vkd3d_shader_private.h:344
VKD3DSIH_CONTINUE
@ VKD3DSIH_CONTINUE
Definition: vkd3d_shader_private.h:292
VKD3DSIH_SAMPLE_POS
@ VKD3DSIH_SAMPLE_POS
Definition: vkd3d_shader_private.h:515
VKD3DSIH_DCL_GLOBAL_FLAGS
@ VKD3DSIH_DCL_GLOBAL_FLAGS
Definition: vkd3d_shader_private.h:303
VKD3DSIH_IF
@ VKD3DSIH_IF
Definition: vkd3d_shader_private.h:416
VKD3DSIH_COUNTBITS
@ VKD3DSIH_COUNTBITS
Definition: vkd3d_shader_private.h:294
VKD3DSIH_UDIV
@ VKD3DSIH_UDIV
Definition: vkd3d_shader_private.h:554
VKD3DSIH_RSQ
@ VKD3DSIH_RSQ
Definition: vkd3d_shader_private.h:501
VKD3DSIH_EVAL_SAMPLE_INDEX
@ VKD3DSIH_EVAL_SAMPLE_INDEX
Definition: vkd3d_shader_private.h:381
VKD3DSIH_ENDIF
@ VKD3DSIH_ENDIF
Definition: vkd3d_shader_private.h:374
VKD3DSIH_CUT_STREAM
@ VKD3DSIH_CUT_STREAM
Definition: vkd3d_shader_private.h:297
VKD3DSIH_UTOD
@ VKD3DSIH_UTOD
Definition: vkd3d_shader_private.h:562
VKD3DSIH_CHECK_ACCESS_FULLY_MAPPED
@ VKD3DSIH_CHECK_ACCESS_FULLY_MAPPED
Definition: vkd3d_shader_private.h:289
VKD3DSIH_LOD
@ VKD3DSIH_LOD
Definition: vkd3d_shader_private.h:458
VKD3DSIH_DCL_FUNCTION_BODY
@ VKD3DSIH_DCL_FUNCTION_BODY
Definition: vkd3d_shader_private.h:301
VKD3DSIH_DCL_HS_MAX_TESSFACTOR
@ VKD3DSIH_DCL_HS_MAX_TESSFACTOR
Definition: vkd3d_shader_private.h:307
VKD3DSIH_DCL_TEMPS
@ VKD3DSIH_DCL_TEMPS
Definition: vkd3d_shader_private.h:328
VKD3DSIH_IMAX
@ VKD3DSIH_IMAX
Definition: vkd3d_shader_private.h:421
VKD3DSIH_FTOI
@ VKD3DSIH_FTOI
Definition: vkd3d_shader_private.h:393
VKD3DSIH_DCL_UAV_STRUCTURED
@ VKD3DSIH_DCL_UAV_STRUCTURED
Definition: vkd3d_shader_private.h:336
VKD3DSIH_DCL_INPUT
@ VKD3DSIH_DCL_INPUT
Definition: vkd3d_shader_private.h:311
VKD3DSIH_HS_CONTROL_POINT_PHASE
@ VKD3DSIH_HS_CONTROL_POINT_PHASE
Definition: vkd3d_shader_private.h:406
VKD3DSIH_LOG
@ VKD3DSIH_LOG
Definition: vkd3d_shader_private.h:459
VKD3DSIH_ROUND_NI
@ VKD3DSIH_ROUND_NI
Definition: vkd3d_shader_private.h:498
VKD3DSIH_DMAX
@ VKD3DSIH_DMAX
Definition: vkd3d_shader_private.h:350
VKD3DSIH_EQO
@ VKD3DSIH_EQO
Definition: vkd3d_shader_private.h:378
VKD3DSIH_DCL_INPUT_PS_SIV
@ VKD3DSIH_DCL_INPUT_PS_SIV
Definition: vkd3d_shader_private.h:316
VKD3DSIH_IMM_ATOMIC_IADD
@ VKD3DSIH_IMM_ATOMIC_IADD
Definition: vkd3d_shader_private.h:428
VKD3DSIH_IMM_ATOMIC_EXCH
@ VKD3DSIH_IMM_ATOMIC_EXCH
Definition: vkd3d_shader_private.h:427
VKD3DSIH_DCL_TGSM_RAW
@ VKD3DSIH_DCL_TGSM_RAW
Definition: vkd3d_shader_private.h:332
VKD3DSIH_SYNC
@ VKD3DSIH_SYNC
Definition: vkd3d_shader_private.h:529
VKD3DSIH_ATOMIC_IADD
@ VKD3DSIH_ATOMIC_IADD
Definition: vkd3d_shader_private.h:271
VKD3DSIH_ATOMIC_CMP_STORE
@ VKD3DSIH_ATOMIC_CMP_STORE
Definition: vkd3d_shader_private.h:270
VKD3DSIH_LD_RAW
@ VKD3DSIH_LD_RAW
Definition: vkd3d_shader_private.h:450
VKD3DSIH_ATOMIC_UMAX
@ VKD3DSIH_ATOMIC_UMAX
Definition: vkd3d_shader_private.h:275
VKD3DSIH_DCL_HS_FORK_PHASE_INSTANCE_COUNT
@ VKD3DSIH_DCL_HS_FORK_PHASE_INSTANCE_COUNT
Definition: vkd3d_shader_private.h:305
VKD3DSIH_DCL_THREAD_GROUP
@ VKD3DSIH_DCL_THREAD_GROUP
Definition: vkd3d_shader_private.h:334
VKD3DSIH_IMM_ATOMIC_IMIN
@ VKD3DSIH_IMM_ATOMIC_IMIN
Definition: vkd3d_shader_private.h:430
VKD3DSIH_DCL_STREAM
@ VKD3DSIH_DCL_STREAM
Definition: vkd3d_shader_private.h:327
VKD3DSIH_F32TOF16
@ VKD3DSIH_F32TOF16
Definition: vkd3d_shader_private.h:385
VKD3DSIH_UTOF
@ VKD3DSIH_UTOF
Definition: vkd3d_shader_private.h:563
VKD3DSIH_LTO
@ VKD3DSIH_LTO
Definition: vkd3d_shader_private.h:463
VKD3DSIH_IMM_ATOMIC_IMAX
@ VKD3DSIH_IMM_ATOMIC_IMAX
Definition: vkd3d_shader_private.h:429
VKD3DSIH_NOT
@ VKD3DSIH_NOT
Definition: vkd3d_shader_private.h:481
VKD3DSIH_SAMPLE_C_LZ_S
@ VKD3DSIH_SAMPLE_C_LZ_S
Definition: vkd3d_shader_private.h:508
VKD3DSIH_IMM_ATOMIC_ALLOC
@ VKD3DSIH_IMM_ATOMIC_ALLOC
Definition: vkd3d_shader_private.h:423
VKD3DSIH_GATHER4_C
@ VKD3DSIH_GATHER4_C
Definition: vkd3d_shader_private.h:396
VKD3DSIH_CONTINUEP
@ VKD3DSIH_CONTINUEP
Definition: vkd3d_shader_private.h:293
VKD3DSIH_SAMPLE_B
@ VKD3DSIH_SAMPLE_B
Definition: vkd3d_shader_private.h:503
VKD3DSIH_MAD
@ VKD3DSIH_MAD
Definition: vkd3d_shader_private.h:470
VKD3DSIH_IMM_ATOMIC_AND
@ VKD3DSIH_IMM_ATOMIC_AND
Definition: vkd3d_shader_private.h:424
VKD3DSIH_DMIN
@ VKD3DSIH_DMIN
Definition: vkd3d_shader_private.h:351
VKD3DSIH_ADD
@ VKD3DSIH_ADD
Definition: vkd3d_shader_private.h:265
VKD3DSIH_DCL_TGSM_STRUCTURED
@ VKD3DSIH_DCL_TGSM_STRUCTURED
Definition: vkd3d_shader_private.h:333
VKD3DSIH_SAMPLE_LOD_S
@ VKD3DSIH_SAMPLE_LOD_S
Definition: vkd3d_shader_private.h:514
VKD3DSIH_DCL_RESOURCE_STRUCTURED
@ VKD3DSIH_DCL_RESOURCE_STRUCTURED
Definition: vkd3d_shader_private.h:325
VKD3DSIH_BFI
@ VKD3DSIH_BFI
Definition: vkd3d_shader_private.h:279
VKD3DSIH_DSY_COARSE
@ VKD3DSIH_DSY_COARSE
Definition: vkd3d_shader_private.h:366
VKD3DSIH_INE
@ VKD3DSIH_INE
Definition: vkd3d_shader_private.h:436
VKD3DSIH_DCL_INPUT_SIV
@ VKD3DSIH_DCL_INPUT_SIV
Definition: vkd3d_shader_private.h:318
VKD3DSIH_MOVC
@ VKD3DSIH_MOVC
Definition: vkd3d_shader_private.h:475
VKD3DSIH_HS_FORK_PHASE
@ VKD3DSIH_HS_FORK_PHASE
Definition: vkd3d_shader_private.h:408
VKD3DSIH_DSY
@ VKD3DSIH_DSY
Definition: vkd3d_shader_private.h:365
VKD3DSIH_UBFE
@ VKD3DSIH_UBFE
Definition: vkd3d_shader_private.h:553
VKD3DSIH_MOV
@ VKD3DSIH_MOV
Definition: vkd3d_shader_private.h:473
VKD3DSIH_DTOU
@ VKD3DSIH_DTOU
Definition: vkd3d_shader_private.h:370
VKD3DSIH_DMOVC
@ VKD3DSIH_DMOVC
Definition: vkd3d_shader_private.h:353
VKD3DSIH_DLT
@ VKD3DSIH_DLT
Definition: vkd3d_shader_private.h:349
VKD3DSIH_MAX
@ VKD3DSIH_MAX
Definition: vkd3d_shader_private.h:471
VKD3DSIH_MSAD
@ VKD3DSIH_MSAD
Definition: vkd3d_shader_private.h:476
VKD3DSIH_FIRSTBIT_HI
@ VKD3DSIH_FIRSTBIT_HI
Definition: vkd3d_shader_private.h:387
VKD3DSIH_ULT
@ VKD3DSIH_ULT
Definition: vkd3d_shader_private.h:556
VKD3DSIH_FCALL
@ VKD3DSIH_FCALL
Definition: vkd3d_shader_private.h:386
VKD3DSIH_IMIN
@ VKD3DSIH_IMIN
Definition: vkd3d_shader_private.h:422
VKD3DSIH_STORE_RAW
@ VKD3DSIH_STORE_RAW
Definition: vkd3d_shader_private.h:522
VKD3DSIH_BUFINFO
@ VKD3DSIH_BUFINFO
Definition: vkd3d_shader_private.h:285
VKD3DSIH_FTOU
@ VKD3DSIH_FTOU
Definition: vkd3d_shader_private.h:394
VKD3DSIH_DSX_FINE
@ VKD3DSIH_DSX_FINE
Definition: vkd3d_shader_private.h:364
VKD3DSIH_IMM_ATOMIC_OR
@ VKD3DSIH_IMM_ATOMIC_OR
Definition: vkd3d_shader_private.h:431
VKD3DSIH_OR
@ VKD3DSIH_OR
Definition: vkd3d_shader_private.h:483
VKD3DSIH_DGEO
@ VKD3DSIH_DGEO
Definition: vkd3d_shader_private.h:346
VKD3DSIH_DCL_TESSELLATOR_DOMAIN
@ VKD3DSIH_DCL_TESSELLATOR_DOMAIN
Definition: vkd3d_shader_private.h:329
VKD3DSIH_ILT
@ VKD3DSIH_ILT
Definition: vkd3d_shader_private.h:419
VKD3DSIH_DCL_OUTPUT_CONTROL_POINT_COUNT
@ VKD3DSIH_DCL_OUTPUT_CONTROL_POINT_COUNT
Definition: vkd3d_shader_private.h:321
VKD3DSIH_SAMPLE_GRAD_CL_S
@ VKD3DSIH_SAMPLE_GRAD_CL_S
Definition: vkd3d_shader_private.h:511
VKD3DSIH_STORE_STRUCTURED
@ VKD3DSIH_STORE_STRUCTURED
Definition: vkd3d_shader_private.h:523
VKD3DSIH_GATHER4_PO_S
@ VKD3DSIH_GATHER4_PO_S
Definition: vkd3d_shader_private.h:401
VKD3DSIH_USHR
@ VKD3DSIH_USHR
Definition: vkd3d_shader_private.h:561
VKD3DSIH_ENDLOOP
@ VKD3DSIH_ENDLOOP
Definition: vkd3d_shader_private.h:375
VKD3DSIH_DCL
@ VKD3DSIH_DCL
Definition: vkd3d_shader_private.h:299
VKD3DSIH_DCL_UAV_TYPED
@ VKD3DSIH_DCL_UAV_TYPED
Definition: vkd3d_shader_private.h:337
VKD3DSIH_CUT
@ VKD3DSIH_CUT
Definition: vkd3d_shader_private.h:296
VKD3DSIH_IBFE
@ VKD3DSIH_IBFE
Definition: vkd3d_shader_private.h:413
VKD3DSIH_LD_S
@ VKD3DSIH_LD_S
Definition: vkd3d_shader_private.h:452
VKD3DSIH_FRC
@ VKD3DSIH_FRC
Definition: vkd3d_shader_private.h:390
VKD3DSIH_ITOD
@ VKD3DSIH_ITOD
Definition: vkd3d_shader_private.h:443
VKD3DSIH_IMM_ATOMIC_UMIN
@ VKD3DSIH_IMM_ATOMIC_UMIN
Definition: vkd3d_shader_private.h:433
VKD3DSIH_LD2DMS_S
@ VKD3DSIH_LD2DMS_S
Definition: vkd3d_shader_private.h:449
VKD3DSIH_DCL_INDEX_RANGE
@ VKD3DSIH_DCL_INDEX_RANGE
Definition: vkd3d_shader_private.h:309
VKD3DSIH_SAMPLE_GRAD
@ VKD3DSIH_SAMPLE_GRAD
Definition: vkd3d_shader_private.h:510
VKD3DSIH_ELSE
@ VKD3DSIH_ELSE
Definition: vkd3d_shader_private.h:371
VKD3DSIH_DCL_INPUT_PS_SGV
@ VKD3DSIH_DCL_INPUT_PS_SGV
Definition: vkd3d_shader_private.h:315
VKD3DSIH_EMIT
@ VKD3DSIH_EMIT
Definition: vkd3d_shader_private.h:372
VKD3DSIH_DCL_CONSTANT_BUFFER
@ VKD3DSIH_DCL_CONSTANT_BUFFER
Definition: vkd3d_shader_private.h:300
VKD3DSIH_LD
@ VKD3DSIH_LD
Definition: vkd3d_shader_private.h:447
VKD3DSIH_DCL_INDEXABLE_TEMP
@ VKD3DSIH_DCL_INDEXABLE_TEMP
Definition: vkd3d_shader_private.h:310
VKD3DSIH_LABEL
@ VKD3DSIH_LABEL
Definition: vkd3d_shader_private.h:446
VKD3DSIH_BREAKP
@ VKD3DSIH_BREAKP
Definition: vkd3d_shader_private.h:284
VKD3DSIH_GEO
@ VKD3DSIH_GEO
Definition: vkd3d_shader_private.h:403
VKD3DSIH_INEG
@ VKD3DSIH_INEG
Definition: vkd3d_shader_private.h:437
VKD3DSIH_ITOF
@ VKD3DSIH_ITOF
Definition: vkd3d_shader_private.h:444
VKD3DSIH_GATHER4_C_S
@ VKD3DSIH_GATHER4_C_S
Definition: vkd3d_shader_private.h:397
VKD3DSIH_IMM_ATOMIC_CMP_EXCH
@ VKD3DSIH_IMM_ATOMIC_CMP_EXCH
Definition: vkd3d_shader_private.h:425
VKD3DSIH_SAMPLE_CL_S
@ VKD3DSIH_SAMPLE_CL_S
Definition: vkd3d_shader_private.h:509
VKD3DSIH_ROUND_Z
@ VKD3DSIH_ROUND_Z
Definition: vkd3d_shader_private.h:500
VKD3DSIH_IGE
@ VKD3DSIH_IGE
Definition: vkd3d_shader_private.h:418
VKD3DSIH_SINCOS
@ VKD3DSIH_SINCOS
Definition: vkd3d_shader_private.h:519
VKD3DSIH_FIRSTBIT_LO
@ VKD3DSIH_FIRSTBIT_LO
Definition: vkd3d_shader_private.h:388
VKD3DSIH_DEFAULT
@ VKD3DSIH_DEFAULT
Definition: vkd3d_shader_private.h:341
VKD3DSIH_UMIN
@ VKD3DSIH_UMIN
Definition: vkd3d_shader_private.h:558
VKD3DSIH_ATOMIC_IMIN
@ VKD3DSIH_ATOMIC_IMIN
Definition: vkd3d_shader_private.h:273
VKD3DSIH_RET
@ VKD3DSIH_RET
Definition: vkd3d_shader_private.h:495
VKD3DSIH_DP3
@ VKD3DSIH_DP3
Definition: vkd3d_shader_private.h:358
VKD3DSIH_DSX
@ VKD3DSIH_DSX
Definition: vkd3d_shader_private.h:362
VKD3DSIH_GATHER4
@ VKD3DSIH_GATHER4
Definition: vkd3d_shader_private.h:395
VKD3DSIH_LD_RAW_S
@ VKD3DSIH_LD_RAW_S
Definition: vkd3d_shader_private.h:451
VKD3DSIH_SQRT
@ VKD3DSIH_SQRT
Definition: vkd3d_shader_private.h:521
VKD3DSIH_DMUL
@ VKD3DSIH_DMUL
Definition: vkd3d_shader_private.h:354
VKD3DSIH_FIRSTBIT_SHI
@ VKD3DSIH_FIRSTBIT_SHI
Definition: vkd3d_shader_private.h:389
VKD3DSIH_ATOMIC_IMAX
@ VKD3DSIH_ATOMIC_IMAX
Definition: vkd3d_shader_private.h:272
VKD3DSIH_LD_STRUCTURED_S
@ VKD3DSIH_LD_STRUCTURED_S
Definition: vkd3d_shader_private.h:454
VKD3DSIH_DDIV
@ VKD3DSIH_DDIV
Definition: vkd3d_shader_private.h:339
VKD3DSIH_DCL_TESSELLATOR_PARTITIONING
@ VKD3DSIH_DCL_TESSELLATOR_PARTITIONING
Definition: vkd3d_shader_private.h:331

Referenced by shader_sm4_init(), and tpf_compile().

◆ map_data_type()

static enum vkd3d_data_type map_data_type ( char  t)
static

Definition at line 1990 of file tpf.c.

1991{
1992 switch (t)
1993 {
1994 case 'd':
1995 return VKD3D_DATA_DOUBLE;
1996 case 'f':
1997 return VKD3D_DATA_FLOAT;
1998 case 'i':
1999 return VKD3D_DATA_INT;
2000 case 'u':
2001 return VKD3D_DATA_UINT;
2002 case 'O':
2003 return VKD3D_DATA_OPAQUE;
2004 case '*':
2005 return VKD3D_DATA_UNUSED;
2006 default:
2007 ERR("Invalid data type '%c'.\n", t);
2008 return VKD3D_DATA_FLOAT;
2009 }
2010}
ERR
#define ERR(fmt,...)
Definition: precomp.h:57
t
GLdouble GLdouble t
Definition: gl.h:2047
VKD3D_DATA_INT
@ VKD3D_DATA_INT
Definition: vkd3d_shader_private.h:683
VKD3D_DATA_UNUSED
@ VKD3D_DATA_UNUSED
Definition: vkd3d_shader_private.h:691
VKD3D_DATA_DOUBLE
@ VKD3D_DATA_DOUBLE
Definition: vkd3d_shader_private.h:689
VKD3D_DATA_OPAQUE
@ VKD3D_DATA_OPAQUE
Definition: vkd3d_shader_private.h:687
VKD3D_DATA_UINT
@ VKD3D_DATA_UINT
Definition: vkd3d_shader_private.h:684
VKD3D_DATA_FLOAT
@ VKD3D_DATA_FLOAT
Definition: vkd3d_shader_private.h:682

Referenced by shader_sm4_read_instruction().

◆ mask_from_swizzle()

static uint32_t mask_from_swizzle ( uint32_t  swizzle)
static

Definition at line 2298 of file tpf.c.

2299{
2300 return (1u << vsir_swizzle_get_component(swizzle, 0))
2301 | (1u << vsir_swizzle_get_component(swizzle, 1))
2302 | (1u << vsir_swizzle_get_component(swizzle, 2))
2303 | (1u << vsir_swizzle_get_component(swizzle, 3));
2304}
swizzle
GLuint GLenum swizzle
Definition: glext.h:9511
vsir_swizzle_get_component
static unsigned int vsir_swizzle_get_component(uint32_t swizzle, unsigned int idx)
Definition: vkd3d_shader_private.h:1873

Referenced by shader_sm4_read_src_param().

◆ opcode_info_get_dst_count()

static unsigned int opcode_info_get_dst_count ( const struct vkd3d_sm4_opcode_info *  info)
static

Definition at line 1944 of file tpf.c.

1945{
1946 return strnlen(info->dst_info, SM4_MAX_DST_COUNT);
1947}
strnlen
_ACRTIMP size_t __cdecl strnlen(const char *, size_t)
Definition: string.c:1607
SM4_MAX_DST_COUNT
#define SM4_MAX_DST_COUNT
Definition: tpf.c:29

Referenced by shader_sm4_read_instruction(), and tpf_simple_instruction().

◆ opcode_info_get_src_count()

static unsigned int opcode_info_get_src_count ( const struct vkd3d_sm4_opcode_info *  info)
static

Definition at line 1949 of file tpf.c.

1950{
1951 return strnlen(info->src_info, SM4_MAX_SRC_COUNT);
1952}
SM4_MAX_SRC_COUNT
#define SM4_MAX_SRC_COUNT
Definition: tpf.c:28

Referenced by shader_sm4_read_instruction(), and tpf_simple_instruction().

◆ register_is_control_point_input()

static bool register_is_control_point_input ( const struct vkd3d_shader_register *  reg,
const struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 2290 of file tpf.c.

2292{
2293 return reg->type == VKD3DSPR_INCONTROLPOINT || reg->type == VKD3DSPR_OUTCONTROLPOINT
2294 || (reg->type == VKD3DSPR_INPUT && (priv->phase == VKD3DSIH_HS_CONTROL_POINT_PHASE
2295 || priv->p.program->shader_version.type == VKD3D_SHADER_TYPE_GEOMETRY));
2296}
reg
static int reg
Definition: i386-dis.c:1290
vkd3d_shader_sm4_parser::phase
enum vkd3d_shader_opcode phase
Definition: tpf.c:687
vkd3d_shader_sm4_parser::p
struct vkd3d_shader_parser p
Definition: tpf.c:699
VKD3D_SHADER_TYPE_GEOMETRY
@ VKD3D_SHADER_TYPE_GEOMETRY
Definition: vkd3d_shader_private.h:889

Referenced by shader_sm4_validate_input_output_register().

◆ register_is_input_output()

static bool register_is_input_output ( const struct vkd3d_shader_register *  reg)
static

Definition at line 2273 of file tpf.c.

2274{
2275 switch (reg->type)
2276 {
2277 case VKD3DSPR_INPUT:
2278 case VKD3DSPR_OUTPUT:
2279 case VKD3DSPR_COLOROUT:
2280 case VKD3DSPR_INCONTROLPOINT:
2281 case VKD3DSPR_OUTCONTROLPOINT:
2282 case VKD3DSPR_PATCHCONST:
2283 return true;
2284
2285 default:
2286 return false;
2287 }
2288}
VKD3DSPR_COLOROUT
@ VKD3DSPR_COLOROUT
Definition: vkd3d_shader_private.h:604

Referenced by shader_sm4_read_dst_param(), and shader_sm4_read_src_param().

◆ shader_is_sm_5_1()

static bool shader_is_sm_5_1 ( const struct vkd3d_shader_sm4_parser *  sm4)
static

Definition at line 767 of file tpf.c.

768{
769 const struct vkd3d_shader_version *version = &sm4->p.program->shader_version;
770
771 return version->major >= 5 && version->minor >= 1;
772}
version
static const WCHAR version[]
Definition: asmname.c:66
vkd3d_shader_version
Definition: vkd3d_shader_private.h:905

Referenced by shader_sm4_read_dcl_constant_buffer(), shader_sm4_read_param(), shader_sm4_read_register_space(), and shader_sm4_set_descriptor_register_range().

◆ shader_sm4_init()

static bool shader_sm4_init ( struct vkd3d_shader_sm4_parser *  sm4,
struct vsir_program *  program,
const uint32_t *  byte_code,
size_t  byte_code_size,
const struct vkd3d_shader_compile_info *  compile_info,
struct vkd3d_shader_message_context *  message_context 
)
static

Definition at line 2758 of file tpf.c.

2761{
2762 struct vkd3d_shader_version version;
2763 uint32_t version_token, token_count;
2764
2765 if (byte_code_size / sizeof(*byte_code) < 2)
2766 {
2767 WARN("Invalid byte code size %lu.\n", (long)byte_code_size);
2768 return false;
2769 }
2770
2771 version_token = byte_code[0];
2772 TRACE("Version: 0x%08x.\n", version_token);
2773 token_count = byte_code[1];
2774 TRACE("Token count: %u.\n", token_count);
2775
2776 if (token_count < 2 || byte_code_size / sizeof(*byte_code) < token_count)
2777 {
2778 WARN("Invalid token count %u.\n", token_count);
2779 return false;
2780 }
2781
2782 sm4->start = &byte_code[2];
2783 sm4->end = &byte_code[token_count];
2784
2785 switch (version_token >> 16)
2786 {
2787 case VKD3D_SM4_PS:
2788 version.type = VKD3D_SHADER_TYPE_PIXEL;
2789 break;
2790
2791 case VKD3D_SM4_VS:
2792 version.type = VKD3D_SHADER_TYPE_VERTEX;
2793 break;
2794
2795 case VKD3D_SM4_GS:
2796 version.type = VKD3D_SHADER_TYPE_GEOMETRY;
2797 break;
2798
2799 case VKD3D_SM5_HS:
2800 version.type = VKD3D_SHADER_TYPE_HULL;
2801 break;
2802
2803 case VKD3D_SM5_DS:
2804 version.type = VKD3D_SHADER_TYPE_DOMAIN;
2805 break;
2806
2807 case VKD3D_SM5_CS:
2808 version.type = VKD3D_SHADER_TYPE_COMPUTE;
2809 break;
2810
2811 default:
2812 FIXME("Unrecognised shader type %#x.\n", version_token >> 16);
2813 }
2814 version.major = VKD3D_SM4_VERSION_MAJOR(version_token);
2815 version.minor = VKD3D_SM4_VERSION_MINOR(version_token);
2816
2817 /* Estimate instruction count to avoid reallocation in most shaders. */
2818 if (!vsir_program_init(program, compile_info,
2819 &version, token_count / 7u + 20, VSIR_CF_STRUCTURED, VSIR_NOT_NORMALISED))
2820 return false;
2821 vkd3d_shader_parser_init(&sm4->p, program, message_context, compile_info->source_name);
2822 sm4->ptr = sm4->start;
2823
2824 init_sm4_lookup_tables(&sm4->lookup);
2825
2826 return true;
2827}
FIXME
#define FIXME(fmt,...)
Definition: precomp.h:53
WARN
#define WARN(fmt,...)
Definition: precomp.h:61
uint32_t
UINT32 uint32_t
Definition: types.h:75
program
GLuint program
Definition: glext.h:6723
vsir_program_init
bool vsir_program_init(struct vsir_program *program, const struct vkd3d_shader_compile_info *compile_info, const struct vkd3d_shader_version *version, unsigned int reserve, enum vsir_control_flow_type cf_type, enum vsir_normalisation_level normalisation_level)
Definition: ir.c:76
TRACE
#define TRACE(s)
Definition: solgame.cpp:4
vkd3d_shader_compile_info::source_name
const char * source_name
Definition: vkd3d_shader.h:1334
vkd3d_shader_sm4_parser::lookup
struct vkd3d_sm4_lookup_tables lookup
Definition: tpf.c:697
vkd3d_shader_sm4_parser::end
const uint32_t * end
Definition: tpf.c:685
vkd3d_shader_sm4_parser::ptr
const uint32_t * ptr
Definition: tpf.c:685
vkd3d_shader_sm4_parser::start
const uint32_t * start
Definition: tpf.c:685
VKD3D_SM4_VERSION_MINOR
#define VKD3D_SM4_VERSION_MINOR(version)
Definition: tpf.c:155
VKD3D_SM4_VS
#define VKD3D_SM4_VS
Definition: tpf.c:34
VKD3D_SM4_GS
#define VKD3D_SM4_GS
Definition: tpf.c:35
VKD3D_SM5_HS
#define VKD3D_SM5_HS
Definition: tpf.c:36
init_sm4_lookup_tables
static void init_sm4_lookup_tables(struct vkd3d_sm4_lookup_tables *lookup)
Definition: tpf.c:1422
VKD3D_SM4_VERSION_MAJOR
#define VKD3D_SM4_VERSION_MAJOR(version)
Definition: tpf.c:154
VKD3D_SM5_DS
#define VKD3D_SM5_DS
Definition: tpf.c:37
VKD3D_SM5_CS
#define VKD3D_SM5_CS
Definition: tpf.c:38
VKD3D_SM4_PS
#define VKD3D_SM4_PS
Definition: tpf.c:33
vkd3d_shader_parser_init
void vkd3d_shader_parser_init(struct vkd3d_shader_parser *parser, struct vsir_program *program, struct vkd3d_shader_message_context *message_context, const char *source_name)
Definition: vkd3d_shader_main.c:606
VKD3D_SHADER_TYPE_VERTEX
@ VKD3D_SHADER_TYPE_VERTEX
Definition: vkd3d_shader_private.h:888
VKD3D_SHADER_TYPE_HULL
@ VKD3D_SHADER_TYPE_HULL
Definition: vkd3d_shader_private.h:890
VKD3D_SHADER_TYPE_COMPUTE
@ VKD3D_SHADER_TYPE_COMPUTE
Definition: vkd3d_shader_private.h:894
VKD3D_SHADER_TYPE_PIXEL
@ VKD3D_SHADER_TYPE_PIXEL
Definition: vkd3d_shader_private.h:887
VKD3D_SHADER_TYPE_DOMAIN
@ VKD3D_SHADER_TYPE_DOMAIN
Definition: vkd3d_shader_private.h:891
VSIR_NOT_NORMALISED
@ VSIR_NOT_NORMALISED
Definition: vkd3d_shader_private.h:1403
VSIR_CF_STRUCTURED
@ VSIR_CF_STRUCTURED
Definition: vkd3d_shader_private.h:1397

Referenced by tpf_parse().

◆ shader_sm4_is_scalar_register()

bool shader_sm4_is_scalar_register ( const struct vkd3d_shader_register *  reg)

Definition at line 2238 of file tpf.c.

2239{
2240 switch (reg->type)
2241 {
2242 case VKD3DSPR_COVERAGE:
2243 case VKD3DSPR_DEPTHOUT:
2244 case VKD3DSPR_DEPTHOUTGE:
2245 case VKD3DSPR_DEPTHOUTLE:
2246 case VKD3DSPR_GSINSTID:
2247 case VKD3DSPR_LOCALTHREADINDEX:
2248 case VKD3DSPR_OUTPOINTID:
2249 case VKD3DSPR_PRIMID:
2250 case VKD3DSPR_SAMPLEMASK:
2251 case VKD3DSPR_OUTSTENCILREF:
2252 return true;
2253 default:
2254 return false;
2255 }
2256}

Referenced by shader_sm4_read_dst_param(), sm4_generate_vsir_instr_dcl_semantic(), and sm4_register_from_deref().

◆ shader_sm4_parser_validate_signature()

static bool shader_sm4_parser_validate_signature ( struct vkd3d_shader_sm4_parser *  sm4,
const struct shader_signature *  signature,
unsigned int *  masks,
const char *  name 
)
static

Definition at line 2839 of file tpf.c.

2841{
2842 unsigned int i, register_idx, register_count, mask;
2843
2844 for (i = 0; i < signature->element_count; ++i)
2845 {
2846 register_idx = signature->elements[i].register_index;
2847 register_count = signature->elements[i].register_count;
2848 if (register_idx != ~0u && (register_idx >= MAX_REG_OUTPUT || MAX_REG_OUTPUT - register_idx < register_count))
2849 {
2850 WARN("%s signature element %u unhandled register index %u, count %u.\n",
2851 name, i, register_idx, register_count);
2852 vkd3d_shader_parser_error(&sm4->p, VKD3D_SHADER_ERROR_TPF_TOO_MANY_REGISTERS,
2853 "%s signature element %u register index %u, count %u exceeds maximum index of %u.", name,
2854 i, register_idx, register_count, MAX_REG_OUTPUT - 1);
2855 return false;
2856 }
2857
2858 if (!vkd3d_bitmask_is_contiguous(mask = signature->elements[i].mask))
2859 {
2860 WARN("%s signature element %u mask %#x is not contiguous.\n", name, i, mask);
2861 vkd3d_shader_parser_warning(&sm4->p, VKD3D_SHADER_WARNING_TPF_MASK_NOT_CONTIGUOUS,
2862 "%s signature element %u mask %#x is not contiguous.", name, i, mask);
2863 }
2864
2865 if (register_idx != ~0u)
2866 masks[register_idx] |= mask;
2867 }
2868
2869 return true;
2870}
mask
GLenum GLint GLuint mask
Definition: glext.h:6028
masks
static const BYTE masks[8]
Definition: dib.c:3008
name
Definition: name.c:39
vkd3d_bitmask_is_contiguous
static bool vkd3d_bitmask_is_contiguous(unsigned int mask)
Definition: vkd3d_common.h:293
VKD3D_SHADER_ERROR_TPF_TOO_MANY_REGISTERS
@ VKD3D_SHADER_ERROR_TPF_TOO_MANY_REGISTERS
Definition: vkd3d_shader_private.h:80
VKD3D_SHADER_WARNING_TPF_MASK_NOT_CONTIGUOUS
@ VKD3D_SHADER_WARNING_TPF_MASK_NOT_CONTIGUOUS
Definition: vkd3d_shader_private.h:88
vkd3d_shader_parser_error
void vkd3d_shader_parser_error(struct vkd3d_shader_parser *parser, enum vkd3d_shader_error error, const char *format,...) VKD3D_PRINTF_FUNC(3
vkd3d_shader_parser_warning
void vkd3d_shader_parser_warning(struct vkd3d_shader_parser *parser, enum vkd3d_shader_error error, const char *format,...) VKD3D_PRINTF_FUNC(3
MAX_REG_OUTPUT
#define MAX_REG_OUTPUT
Definition: wined3d_private.h:797

Referenced by tpf_parse().

◆ shader_sm4_read_case_condition()

static void shader_sm4_read_case_condition ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 805 of file tpf.c.

807{
808 shader_sm4_read_src_param(priv, &tokens, &tokens[token_count], VKD3D_DATA_UINT, &ins->src[0]);
809 if (ins->src[0].reg.type != VKD3DSPR_IMMCONST)
810 {
811 FIXME("Switch case value is not a 32-bit constant.\n");
812 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_CASE_VALUE,
813 "Switch case value is not a 32-bit immediate constant register.");
814 }
815}
vkd3d_shader_instruction::src
struct vkd3d_shader_src_param * src
Definition: vkd3d_shader_private.h:1245
shader_sm4_read_src_param
static bool shader_sm4_read_src_param(struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, const uint32_t *end, enum vkd3d_data_type data_type, struct vkd3d_shader_src_param *src_param)
Definition: tpf.c:2358
VKD3D_SHADER_ERROR_TPF_INVALID_CASE_VALUE
@ VKD3D_SHADER_ERROR_TPF_INVALID_CASE_VALUE
Definition: vkd3d_shader_private.h:83

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_conditional_op()

static void shader_sm4_read_conditional_op ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 797 of file tpf.c.

799{
800 shader_sm4_read_src_param(priv, &tokens, &tokens[token_count], VKD3D_DATA_UINT, &ins->src[0]);
801 ins->flags = (opcode_token & VKD3D_SM4_CONDITIONAL_NZ) ?
802 VKD3D_SHADER_CONDITIONAL_OP_NZ : VKD3D_SHADER_CONDITIONAL_OP_Z;
803}
vkd3d_shader_instruction::flags
uint32_t flags
Definition: vkd3d_shader_private.h:1241
VKD3D_SM4_CONDITIONAL_NZ
#define VKD3D_SM4_CONDITIONAL_NZ
Definition: tpf.c:162
VKD3D_SHADER_CONDITIONAL_OP_NZ
@ VKD3D_SHADER_CONDITIONAL_OP_NZ
Definition: vkd3d_shader_private.h:879
VKD3D_SHADER_CONDITIONAL_OP_Z
@ VKD3D_SHADER_CONDITIONAL_OP_Z
Definition: vkd3d_shader_private.h:880

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_dcl_constant_buffer()

static void shader_sm4_read_dcl_constant_buffer ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 926 of file tpf.c.

928{
929 const uint32_t *end = &tokens[token_count];
930
931 shader_sm4_read_src_param(priv, &tokens, end, VKD3D_DATA_FLOAT, &ins->declaration.cb.src);
932 shader_sm4_set_descriptor_register_range(priv, &ins->declaration.cb.src.reg, &ins->declaration.cb.range);
933 if (opcode_token & VKD3D_SM4_INDEX_TYPE_MASK)
934 ins->flags |= VKD3DSI_INDEXED_DYNAMIC;
935
936 ins->declaration.cb.size = ins->declaration.cb.src.reg.idx[2].offset;
937 ins->declaration.cb.range.space = 0;
938
939 if (shader_is_sm_5_1(priv))
940 {
941 if (tokens >= end)
942 {
943 FIXME("Invalid ptr %p >= end %p.\n", tokens, end);
944 return;
945 }
946
947 ins->declaration.cb.size = *tokens++;
948 shader_sm4_read_register_space(priv, &tokens, end, &ins->declaration.cb.range.space);
949 }
950
951 ins->declaration.cb.size *= VKD3D_VEC4_SIZE * sizeof(float);
952}
end
GLuint GLuint end
Definition: gl.h:1545
float
static float(__cdecl *square_half_float)(float x
vkd3d_shader_instruction::cb
struct vkd3d_shader_constant_buffer cb
Definition: vkd3d_shader_private.h:1259
vkd3d_shader_instruction::declaration
union vkd3d_shader_instruction::@6020 declaration
shader_is_sm_5_1
static bool shader_is_sm_5_1(const struct vkd3d_shader_sm4_parser *sm4)
Definition: tpf.c:767
VKD3D_SM4_INDEX_TYPE_MASK
#define VKD3D_SM4_INDEX_TYPE_MASK
Definition: tpf.c:77
shader_sm4_read_register_space
static bool shader_sm4_read_register_space(struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, const uint32_t *end, unsigned int *register_space)
Definition: tpf.c:779
shader_sm4_set_descriptor_register_range
static void shader_sm4_set_descriptor_register_range(struct vkd3d_shader_sm4_parser *sm4, const struct vkd3d_shader_register *reg, struct vkd3d_shader_register_range *range)
Definition: tpf.c:858
VKD3DSI_INDEXED_DYNAMIC
#define VKD3DSI_INDEXED_DYNAMIC
Definition: vkd3d_shader_private.h:851
VKD3D_VEC4_SIZE
#define VKD3D_VEC4_SIZE
Definition: vkd3d_shader_private.h:59

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_dcl_global_flags()

static void shader_sm4_read_dcl_global_flags ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  sm4 
)
static

Definition at line 1215 of file tpf.c.

1217{
1218 ins->declaration.global_flags = (opcode_token & VKD3D_SM4_GLOBAL_FLAGS_MASK) >> VKD3D_SM4_GLOBAL_FLAGS_SHIFT;
1219 sm4->p.program->global_flags = ins->declaration.global_flags;
1220}
vkd3d_shader_instruction::global_flags
enum vsir_global_flags global_flags
Definition: vkd3d_shader_private.h:1254
VKD3D_SM4_GLOBAL_FLAGS_MASK
#define VKD3D_SM4_GLOBAL_FLAGS_MASK
Definition: tpf.c:89
VKD3D_SM4_GLOBAL_FLAGS_SHIFT
#define VKD3D_SM4_GLOBAL_FLAGS_SHIFT
Definition: tpf.c:88

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_dcl_index_range()

static void shader_sm4_read_dcl_index_range ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 972 of file tpf.c.

974{
975 struct vkd3d_shader_index_range *index_range = &ins->declaration.index_range;
976 struct vsir_program *program = priv->p.program;
977 unsigned int i, register_idx, register_count;
978 const struct shader_signature *signature;
979 enum vkd3d_shader_register_type type;
980 struct sm4_index_range_array *ranges;
981 unsigned int *io_masks;
982 uint32_t write_mask;
983
984 shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], VKD3D_DATA_OPAQUE,
985 &index_range->dst);
986 index_range->register_count = *tokens;
987
988 register_idx = index_range->dst.reg.idx[index_range->dst.reg.idx_count - 1].offset;
989 register_count = index_range->register_count;
990 write_mask = index_range->dst.write_mask;
991
992 switch ((type = index_range->dst.reg.type))
993 {
994 case VKD3DSPR_INPUT:
995 case VKD3DSPR_INCONTROLPOINT:
996 io_masks = priv->input_register_masks;
997 ranges = &priv->input_index_ranges;
998 signature = &program->input_signature;
999 break;
1000 case VKD3DSPR_OUTPUT:
1001 if (sm4_parser_is_in_fork_or_join_phase(priv))
1002 {
1003 io_masks = priv->patch_constant_register_masks;
1004 ranges = &priv->patch_constant_index_ranges;
1005 signature = &program->patch_constant_signature;
1006 }
1007 else
1008 {
1009 io_masks = priv->output_register_masks;
1010 ranges = &priv->output_index_ranges;
1011 signature = &program->output_signature;
1012 }
1013 break;
1014 case VKD3DSPR_COLOROUT:
1015 case VKD3DSPR_OUTCONTROLPOINT:
1016 io_masks = priv->output_register_masks;
1017 ranges = &priv->output_index_ranges;
1018 signature = &program->output_signature;
1019 break;
1020 case VKD3DSPR_PATCHCONST:
1021 io_masks = priv->patch_constant_register_masks;
1022 ranges = &priv->patch_constant_index_ranges;
1023 signature = &program->patch_constant_signature;
1024 break;
1025
1026 default:
1027 WARN("Unhandled register type %#x.\n", type);
1028 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_INDEX_RANGE_DCL,
1029 "Invalid register type %#x for index range base %u, count %u, mask %#x.",
1030 type, register_idx, register_count, write_mask);
1031 return;
1032 }
1033
1034 for (i = 0; i < ranges->count; ++i)
1035 {
1036 struct sm4_index_range r = ranges->ranges[i];
1037
1038 if (!(r.mask & write_mask))
1039 continue;
1040 /* Ranges with the same base but different lengths are not an issue. */
1041 if (register_idx == r.index)
1042 continue;
1043
1044 if ((r.index <= register_idx && register_idx - r.index < r.count)
1045 || (register_idx < r.index && r.index - register_idx < register_count))
1046 {
1047 WARN("Detected index range collision for base %u, count %u, mask %#x.\n",
1048 register_idx, register_count, write_mask);
1049 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_INDEX_RANGE_DCL,
1050 "Register index range base %u, count %u, mask %#x collides with a previous declaration.",
1051 register_idx, register_count, write_mask);
1052 return;
1053 }
1054 }
1055 ranges->ranges[ranges->count].index = register_idx;
1056 ranges->ranges[ranges->count].count = register_count;
1057 ranges->ranges[ranges->count++].mask = write_mask;
1058
1059 for (i = 0; i < register_count; ++i)
1060 {
1061 const struct signature_element *e = vsir_signature_find_element_for_reg(signature, register_idx + i, write_mask);
1062 /* Index ranges should not contain non-arrayed sysvals. FXC tries to forbid this but it is buggy,
1063 * and can emit a range containing a sysval if the sysval is not actually accessed. */
1064 if (e && e->sysval_semantic && register_count > 1 && !vsir_sysval_semantic_is_tess_factor(e->sysval_semantic)
1065 && !vsir_sysval_semantic_is_clip_cull(e->sysval_semantic))
1066 {
1067 WARN("Sysval %u included in an index range declaration.\n", e->sysval_semantic);
1068 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_INDEX_RANGE_DCL,
1069 "Index range base %u, count %u, mask %#x contains sysval %u.",
1070 register_idx, register_count, write_mask, e->sysval_semantic);
1071 return;
1072 }
1073 if ((io_masks[register_idx + i] & write_mask) != write_mask)
1074 {
1075 WARN("No matching declaration for index range base %u, count %u, mask %#x.\n",
1076 register_idx, register_count, write_mask);
1077 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_INDEX_RANGE_DCL,
1078 "Input/output registers matching index range base %u, count %u, mask %#x were not declared.",
1079 register_idx, register_count, write_mask);
1080 return;
1081 }
1082 }
1083}
r
GLdouble GLdouble GLdouble r
Definition: gl.h:2055
vsir_signature_find_element_for_reg
struct signature_element * vsir_signature_find_element_for_reg(const struct shader_signature *signature, unsigned int reg_idx, unsigned int write_mask)
Definition: ir.c:1573
e
#define e
Definition: ke_i.h:82
shader_signature
Definition: vkd3d_shader_private.h:1103
signature_element
Definition: vkd3d_shader_private.h:1080
signature_element::register_count
unsigned int register_count
Definition: vkd3d_shader_private.h:1092
sm4_index_range_array
Definition: tpf.c:669
sm4_index_range_array::count
unsigned int count
Definition: tpf.c:670
sm4_index_range_array::ranges
struct sm4_index_range ranges[MAX_REG_OUTPUT *2]
Definition: tpf.c:671
vkd3d_shader_index_range
Definition: vkd3d_shader_private.h:1002
vkd3d_shader_index_range::dst
struct vkd3d_shader_dst_param dst
Definition: vkd3d_shader_private.h:1003
vkd3d_shader_index_range::register_count
unsigned int register_count
Definition: vkd3d_shader_private.h:1004
vkd3d_shader_instruction::index_range
struct vkd3d_shader_index_range index_range
Definition: vkd3d_shader_private.h:1273
vkd3d_shader_sm4_parser::patch_constant_index_ranges
struct sm4_index_range_array patch_constant_index_ranges
Definition: tpf.c:695
vkd3d_shader_sm4_parser::output_register_masks
unsigned int output_register_masks[MAX_REG_OUTPUT]
Definition: tpf.c:690
vkd3d_shader_sm4_parser::output_index_ranges
struct sm4_index_range_array output_index_ranges
Definition: tpf.c:694
vkd3d_shader_sm4_parser::input_index_ranges
struct sm4_index_range_array input_index_ranges
Definition: tpf.c:693
vkd3d_shader_sm4_parser::input_register_masks
unsigned int input_register_masks[MAX_REG_OUTPUT]
Definition: tpf.c:689
vkd3d_shader_sm4_parser::patch_constant_register_masks
unsigned int patch_constant_register_masks[MAX_REG_OUTPUT]
Definition: tpf.c:691
vsir_program
Definition: vkd3d_shader_private.h:1409
shader_sm4_read_dst_param
static bool shader_sm4_read_dst_param(struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, const uint32_t *end, enum vkd3d_data_type data_type, struct vkd3d_shader_dst_param *dst_param)
Definition: tpf.c:2446
sm4_parser_is_in_fork_or_join_phase
static bool sm4_parser_is_in_fork_or_join_phase(const struct vkd3d_shader_sm4_parser *sm4)
Definition: tpf.c:967
vkd3d_shader_register_type
vkd3d_shader_register_type
Definition: vkd3d_shader_private.h:593
VKD3D_SHADER_ERROR_TPF_INVALID_INDEX_RANGE_DCL
@ VKD3D_SHADER_ERROR_TPF_INVALID_INDEX_RANGE_DCL
Definition: vkd3d_shader_private.h:82
vsir_sysval_semantic_is_clip_cull
static bool vsir_sysval_semantic_is_clip_cull(enum vkd3d_shader_sysval_semantic sysval_semantic)
Definition: vkd3d_shader_private.h:1115
vsir_sysval_semantic_is_tess_factor
static bool vsir_sysval_semantic_is_tess_factor(enum vkd3d_shader_sysval_semantic sysval_semantic)
Definition: vkd3d_shader_private.h:1109

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_dcl_indexable_temp()

static void shader_sm4_read_dcl_indexable_temp ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1204 of file tpf.c.

1206{
1207 ins->declaration.indexable_temp.register_idx = *tokens++;
1208 ins->declaration.indexable_temp.register_size = *tokens++;
1209 ins->declaration.indexable_temp.alignment = 0;
1210 ins->declaration.indexable_temp.data_type = VKD3D_DATA_FLOAT;
1211 ins->declaration.indexable_temp.component_count = *tokens;
1212 ins->declaration.indexable_temp.has_function_scope = false;
1213}
vkd3d_shader_instruction::indexable_temp
struct vkd3d_shader_indexable_temp indexable_temp
Definition: vkd3d_shader_private.h:1274

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_dcl_input_primitive()

static void shader_sm4_read_dcl_input_primitive ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  sm4 
)
static

Definition at line 1100 of file tpf.c.

1102{
1103 enum vkd3d_sm4_input_primitive_type primitive_type;
1104 struct vsir_program *program = sm4->p.program;
1105
1106 primitive_type = (opcode_token & VKD3D_SM4_PRIMITIVE_TYPE_MASK) >> VKD3D_SM4_PRIMITIVE_TYPE_SHIFT;
1107 if (VKD3D_SM5_INPUT_PT_PATCH1 <= primitive_type && primitive_type <= VKD3D_SM5_INPUT_PT_PATCH32)
1108 {
1109 ins->declaration.primitive_type.type = VKD3D_PT_PATCH;
1110 ins->declaration.primitive_type.patch_vertex_count = primitive_type - VKD3D_SM5_INPUT_PT_PATCH1 + 1;
1111 program->input_control_point_count = ins->declaration.primitive_type.patch_vertex_count;
1112 }
1113 else if (primitive_type >= ARRAY_SIZE(input_primitive_type_table))
1114 {
1115 ins->declaration.primitive_type.type = VKD3D_PT_UNDEFINED;
1116 }
1117 else
1118 {
1119 ins->declaration.primitive_type.type = input_primitive_type_table[primitive_type].vkd3d_type;
1120 program->input_control_point_count = input_primitive_type_table[primitive_type].control_point_count;
1121 }
1122
1123 if (ins->declaration.primitive_type.type == VKD3D_PT_UNDEFINED)
1124 FIXME("Unhandled input primitive type %#x.\n", primitive_type);
1125}
vkd3d_shader_instruction::primitive_type
struct vkd3d_shader_primitive_type primitive_type
Definition: vkd3d_shader_private.h:1257
VKD3D_SM4_PRIMITIVE_TYPE_SHIFT
#define VKD3D_SM4_PRIMITIVE_TYPE_SHIFT
Definition: tpf.c:73
vkd3d_sm4_input_primitive_type
vkd3d_sm4_input_primitive_type
Definition: tpf.c:490
VKD3D_SM4_PRIMITIVE_TYPE_MASK
#define VKD3D_SM4_PRIMITIVE_TYPE_MASK
Definition: tpf.c:74
input_primitive_type_table
static const struct @6015 input_primitive_type_table[]
VKD3D_PT_PATCH
@ VKD3D_PT_PATCH
Definition: vkd3d_shader_private.h:1220
VKD3D_PT_UNDEFINED
@ VKD3D_PT_UNDEFINED
Definition: vkd3d_shader_private.h:1209

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_dcl_input_ps()

static void shader_sm4_read_dcl_input_ps ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1151 of file tpf.c.

1153{
1154 struct vkd3d_shader_dst_param *dst = &ins->declaration.dst;
1155
1156 ins->flags = (opcode_token & VKD3D_SM4_INTERPOLATION_MODE_MASK) >> VKD3D_SM4_INTERPOLATION_MODE_SHIFT;
1157 if (shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], VKD3D_DATA_FLOAT, dst))
1158 {
1159 struct signature_element *e = vsir_signature_find_element_for_reg(
1160 &priv->p.program->input_signature, dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask);
1161
1162 if (!e)
1163 {
1164 WARN("No matching signature element for input register %u with mask %#x.\n",
1165 dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask);
1166 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DCL,
1167 "No matching signature element for input register %u with mask %#x.\n",
1168 dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask);
1169 }
1170 else
1171 {
1172 e->interpolation_mode = ins->flags;
1173 }
1174 }
1175}
dst
GLenum GLenum dst
Definition: glext.h:6340
vkd3d_shader_dst_param
Definition: vkd3d_shader_private.h:981
vkd3d_shader_instruction::dst
struct vkd3d_shader_dst_param * dst
Definition: vkd3d_shader_private.h:1244
VKD3D_SM4_INTERPOLATION_MODE_SHIFT
#define VKD3D_SM4_INTERPOLATION_MODE_SHIFT
Definition: tpf.c:85
VKD3D_SM4_INTERPOLATION_MODE_MASK
#define VKD3D_SM4_INTERPOLATION_MODE_MASK
Definition: tpf.c:86
VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DCL
@ VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DCL
Definition: vkd3d_shader_private.h:86

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_dcl_input_ps_siv()

static void shader_sm4_read_dcl_input_ps_siv ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1177 of file tpf.c.

1179{
1180 struct vkd3d_shader_dst_param *dst = &ins->declaration.register_semantic.reg;
1181
1182 ins->flags = (opcode_token & VKD3D_SM4_INTERPOLATION_MODE_MASK) >> VKD3D_SM4_INTERPOLATION_MODE_SHIFT;
1183 if (shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], VKD3D_DATA_FLOAT, dst))
1184 {
1185 struct signature_element *e = vsir_signature_find_element_for_reg(
1186 &priv->p.program->input_signature, dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask);
1187
1188 if (!e)
1189 {
1190 WARN("No matching signature element for input register %u with mask %#x.\n",
1191 dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask);
1192 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DCL,
1193 "No matching signature element for input register %u with mask %#x.\n",
1194 dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask);
1195 }
1196 else
1197 {
1198 e->interpolation_mode = ins->flags;
1199 }
1200 }
1201 ins->declaration.register_semantic.sysval_semantic = *tokens;
1202}
vkd3d_shader_instruction::register_semantic
struct vkd3d_shader_register_semantic register_semantic
Definition: vkd3d_shader_private.h:1256

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_dcl_output_topology()

static void shader_sm4_read_dcl_output_topology ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1085 of file tpf.c.

1087{
1088 enum vkd3d_sm4_output_primitive_type primitive_type;
1089
1090 primitive_type = (opcode_token & VKD3D_SM4_PRIMITIVE_TYPE_MASK) >> VKD3D_SM4_PRIMITIVE_TYPE_SHIFT;
1091 if (primitive_type >= ARRAY_SIZE(output_primitive_type_table))
1092 ins->declaration.primitive_type.type = VKD3D_PT_UNDEFINED;
1093 else
1094 ins->declaration.primitive_type.type = output_primitive_type_table[primitive_type];
1095
1096 if (ins->declaration.primitive_type.type == VKD3D_PT_UNDEFINED)
1097 FIXME("Unhandled output primitive type %#x.\n", primitive_type);
1098}
if
if(dx< 0)
Definition: linetemp.h:194
vkd3d_sm4_output_primitive_type
vkd3d_sm4_output_primitive_type
Definition: tpf.c:483
output_primitive_type_table
static enum vkd3d_primitive_type output_primitive_type_table[]
Definition: tpf.c:712

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_dcl_resource()

static void shader_sm4_read_dcl_resource ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 871 of file tpf.c.

873{
874 struct vkd3d_shader_semantic *semantic = &ins->declaration.semantic;
875 enum vkd3d_sm4_resource_type resource_type;
876 const uint32_t *end = &tokens[token_count];
877 enum vkd3d_sm4_data_type data_type;
878 enum vkd3d_data_type reg_data_type;
879 uint32_t components;
880 unsigned int i;
881
882 resource_type = (opcode_token & VKD3D_SM4_RESOURCE_TYPE_MASK) >> VKD3D_SM4_RESOURCE_TYPE_SHIFT;
883 if (!resource_type || (resource_type >= ARRAY_SIZE(resource_type_table)))
884 {
885 FIXME("Unhandled resource type %#x.\n", resource_type);
886 semantic->resource_type = VKD3D_SHADER_RESOURCE_NONE;
887 }
888 else
889 {
890 semantic->resource_type = resource_type_table[resource_type];
891 }
892
893 if (semantic->resource_type == VKD3D_SHADER_RESOURCE_TEXTURE_2DMS
894 || semantic->resource_type == VKD3D_SHADER_RESOURCE_TEXTURE_2DMSARRAY)
895 {
896 semantic->sample_count = (opcode_token & VKD3D_SM4_RESOURCE_SAMPLE_COUNT_MASK)
897 >> VKD3D_SM4_RESOURCE_SAMPLE_COUNT_SHIFT;
898 }
899
900 reg_data_type = VKD3D_DATA_UNUSED;
901 shader_sm4_read_dst_param(priv, &tokens, end, reg_data_type, &semantic->resource.reg);
902 shader_sm4_set_descriptor_register_range(priv, &semantic->resource.reg.reg, &semantic->resource.range);
903
904 components = *tokens++;
905 for (i = 0; i < VKD3D_VEC4_SIZE; i++)
906 {
907 data_type = VKD3D_SM4_TYPE_COMPONENT(components, i);
908
909 if (!data_type || (data_type >= ARRAY_SIZE(data_type_table)))
910 {
911 FIXME("Unhandled data type %#x.\n", data_type);
912 semantic->resource_data_type[i] = VKD3D_DATA_FLOAT;
913 }
914 else
915 {
916 semantic->resource_data_type[i] = data_type_table[data_type];
917 }
918 }
919
920 if (opcode != VKD3D_SM4_OP_DCL_RESOURCE)
921 ins->flags = (opcode_token & VKD3D_SM5_UAV_FLAGS_MASK) >> VKD3D_SM5_UAV_FLAGS_SHIFT;
922
923 shader_sm4_read_register_space(priv, &tokens, end, &semantic->resource.range.space);
924}
components
GLenum GLenum GLuint components
Definition: glext.h:9620
data_type
enum wined3d_data_type data_type
Definition: glsl_shader.c:71
vkd3d_shader_instruction::semantic
struct vkd3d_shader_semantic semantic
Definition: vkd3d_shader_private.h:1255
vkd3d_shader_semantic
Definition: vkd3d_shader_private.h:1038
vkd3d_shader_semantic::resource_type
enum vkd3d_shader_resource_type resource_type
Definition: vkd3d_shader_private.h:1041
vkd3d_shader_semantic::resource_data_type
enum vkd3d_data_type resource_data_type[VKD3D_VEC4_SIZE]
Definition: vkd3d_shader_private.h:1043
vkd3d_shader_semantic::sample_count
unsigned int sample_count
Definition: vkd3d_shader_private.h:1042
vkd3d_shader_semantic::resource
struct vkd3d_shader_resource resource
Definition: vkd3d_shader_private.h:1044
VKD3D_SM4_RESOURCE_TYPE_SHIFT
#define VKD3D_SM4_RESOURCE_TYPE_SHIFT
Definition: tpf.c:67
VKD3D_SM4_TYPE_COMPONENT
#define VKD3D_SM4_TYPE_COMPONENT(com, i)
Definition: tpf.c:164
vkd3d_sm4_resource_type
vkd3d_sm4_resource_type
Definition: tpf.c:580
VKD3D_SM5_UAV_FLAGS_SHIFT
#define VKD3D_SM5_UAV_FLAGS_SHIFT
Definition: tpf.c:100
vkd3d_sm4_data_type
vkd3d_sm4_data_type
Definition: tpf.c:596
VKD3D_SM4_RESOURCE_TYPE_MASK
#define VKD3D_SM4_RESOURCE_TYPE_MASK
Definition: tpf.c:68
data_type_table
static enum vkd3d_data_type data_type_table[]
Definition: tpf.c:753
VKD3D_SM4_RESOURCE_SAMPLE_COUNT_MASK
#define VKD3D_SM4_RESOURCE_SAMPLE_COUNT_MASK
Definition: tpf.c:71
VKD3D_SM5_UAV_FLAGS_MASK
#define VKD3D_SM5_UAV_FLAGS_MASK
Definition: tpf.c:101
VKD3D_SM4_RESOURCE_SAMPLE_COUNT_SHIFT
#define VKD3D_SM4_RESOURCE_SAMPLE_COUNT_SHIFT
Definition: tpf.c:70
resource_type_table
static enum vkd3d_shader_resource_type resource_type_table[]
Definition: tpf.c:736
VKD3D_SHADER_RESOURCE_NONE
@ VKD3D_SHADER_RESOURCE_NONE
Definition: vkd3d_shader.h:1838
VKD3D_SHADER_RESOURCE_TEXTURE_2DMS
@ VKD3D_SHADER_RESOURCE_TEXTURE_2DMS
Definition: vkd3d_shader.h:1846
VKD3D_SHADER_RESOURCE_TEXTURE_2DMSARRAY
@ VKD3D_SHADER_RESOURCE_TEXTURE_2DMSARRAY
Definition: vkd3d_shader.h:1856
vkd3d_data_type
vkd3d_data_type
Definition: vkd3d_shader_private.h:681

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_dcl_sampler()

static void shader_sm4_read_dcl_sampler ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 954 of file tpf.c.

956{
957 const uint32_t *end = &tokens[token_count];
958
959 ins->flags = (opcode_token & VKD3D_SM4_SAMPLER_MODE_MASK) >> VKD3D_SM4_SAMPLER_MODE_SHIFT;
960 if (ins->flags & ~VKD3D_SM4_SAMPLER_COMPARISON)
961 FIXME("Unhandled sampler mode %#x.\n", ins->flags);
962 shader_sm4_read_src_param(priv, &tokens, end, VKD3D_DATA_UNUSED, &ins->declaration.sampler.src);
963 shader_sm4_set_descriptor_register_range(priv, &ins->declaration.sampler.src.reg, &ins->declaration.sampler.range);
964 shader_sm4_read_register_space(priv, &tokens, end, &ins->declaration.sampler.range.space);
965}
vkd3d_shader_instruction::sampler
struct vkd3d_shader_sampler sampler
Definition: vkd3d_shader_private.h:1260
VKD3D_SM4_SAMPLER_MODE_MASK
#define VKD3D_SM4_SAMPLER_MODE_MASK
Definition: tpf.c:80
VKD3D_SM4_SAMPLER_MODE_SHIFT
#define VKD3D_SM4_SAMPLER_MODE_SHIFT
Definition: tpf.c:79

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_declaration_count()

static void shader_sm4_read_declaration_count ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  sm4 
)
static

Definition at line 1127 of file tpf.c.

1129{
1130 struct vsir_program *program = sm4->p.program;
1131
1132 ins->declaration.count = *tokens;
1133 if (opcode == VKD3D_SM4_OP_DCL_TEMPS)
1134 program->temp_count = max(program->temp_count, *tokens);
1135}
vkd3d_shader_instruction::count
unsigned int count
Definition: vkd3d_shader_private.h:1261
max
#define max(a, b)
Definition: svc.c:63

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_declaration_dst()

static void shader_sm4_read_declaration_dst ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1137 of file tpf.c.

1139{
1140 shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], VKD3D_DATA_FLOAT, &ins->declaration.dst);
1141}

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_declaration_register_semantic()

static void shader_sm4_read_declaration_register_semantic ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1143 of file tpf.c.

1145{
1146 shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], VKD3D_DATA_FLOAT,
1147 &ins->declaration.register_semantic.reg);
1148 ins->declaration.register_semantic.sysval_semantic = *tokens;
1149}

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_dst_param()

static bool shader_sm4_read_dst_param ( struct vkd3d_shader_sm4_parser *  priv,
const uint32_t **  ptr,
const uint32_t *  end,
enum vkd3d_data_type  data_type,
struct vkd3d_shader_dst_param *  dst_param 
)
static

Definition at line 2446 of file tpf.c.

2448{
2449 enum vkd3d_sm4_swizzle_type swizzle_type;
2450 enum vkd3d_shader_src_modifier modifier;
2451 unsigned int dimension, swizzle;
2452 uint32_t token;
2453
2454 if (*ptr >= end)
2455 {
2456 WARN("Invalid ptr %p >= end %p.\n", *ptr, end);
2457 return false;
2458 }
2459 token = **ptr;
2460
2461 if (!shader_sm4_read_param(priv, ptr, end, data_type, &dst_param->reg, &modifier))
2462 {
2463 ERR("Failed to read parameter.\n");
2464 return false;
2465 }
2466
2467 if (modifier != VKD3DSPSM_NONE)
2468 {
2469 ERR("Invalid source modifier %#x on destination register.\n", modifier);
2470 return false;
2471 }
2472
2473 switch ((dimension = (token & VKD3D_SM4_DIMENSION_MASK) >> VKD3D_SM4_DIMENSION_SHIFT))
2474 {
2475 case VKD3D_SM4_DIMENSION_NONE:
2476 dst_param->write_mask = 0;
2477 break;
2478
2479 case VKD3D_SM4_DIMENSION_SCALAR:
2480 dst_param->write_mask = VKD3DSP_WRITEMASK_0;
2481 break;
2482
2483 case VKD3D_SM4_DIMENSION_VEC4:
2484 swizzle_type = (token & VKD3D_SM4_SWIZZLE_TYPE_MASK) >> VKD3D_SM4_SWIZZLE_TYPE_SHIFT;
2485 switch (swizzle_type)
2486 {
2487 case VKD3D_SM4_SWIZZLE_NONE:
2488 dst_param->write_mask = (token & VKD3D_SM4_WRITEMASK_MASK) >> VKD3D_SM4_WRITEMASK_SHIFT;
2489 break;
2490
2491 case VKD3D_SM4_SWIZZLE_VEC4:
2492 swizzle = swizzle_from_sm4((token & VKD3D_SM4_SWIZZLE_MASK) >> VKD3D_SM4_SWIZZLE_SHIFT);
2493 if (swizzle != VKD3D_SHADER_NO_SWIZZLE)
2494 {
2495 FIXME("Unhandled swizzle %#x.\n", swizzle);
2496 vkd3d_shader_parser_warning(&priv->p, VKD3D_SHADER_WARNING_TPF_UNHANDLED_REGISTER_SWIZZLE,
2497 "Unhandled destination register swizzle %#x.", swizzle);
2498 }
2499 dst_param->write_mask = VKD3DSP_WRITEMASK_ALL;
2500 break;
2501
2502 default:
2503 FIXME("Unhandled swizzle type %#x.\n", swizzle_type);
2504 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_SWIZZLE,
2505 "Destination register swizzle type %#x is invalid.", swizzle_type);
2506 break;
2507 }
2508 break;
2509
2510 default:
2511 FIXME("Unhandled dimension %#x.\n", dimension);
2512 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DIMENSION,
2513 "Destination register dimension %#x is invalid.", dimension);
2514 break;
2515 }
2516
2517 if (data_type == VKD3D_DATA_DOUBLE)
2518 dst_param->write_mask = vsir_write_mask_64_from_32(dst_param->write_mask);
2519 /* Some scalar registers are declared with no write mask in shader bytecode. */
2520 if (!dst_param->write_mask && shader_sm4_is_scalar_register(&dst_param->reg))
2521 dst_param->write_mask = VKD3DSP_WRITEMASK_0;
2522 dst_param->modifiers = 0;
2523 dst_param->shift = 0;
2524
2525 if (register_is_input_output(&dst_param->reg) && !shader_sm4_validate_input_output_register(priv,
2526 &dst_param->reg, dst_param->write_mask))
2527 return false;
2528
2529 return true;
2530}
token
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat token
Definition: glfuncs.h:210
ptr
static PVOID ptr
Definition: dispmode.c:27
vkd3d_shader_dst_param::shift
unsigned int shift
Definition: vkd3d_shader_private.h:985
vkd3d_shader_dst_param::modifiers
uint32_t modifiers
Definition: vkd3d_shader_private.h:984
vkd3d_shader_dst_param::reg
struct vkd3d_shader_register reg
Definition: vkd3d_shader_private.h:982
vkd3d_shader_dst_param::write_mask
uint32_t write_mask
Definition: vkd3d_shader_private.h:983
VKD3D_SM4_WRITEMASK_SHIFT
#define VKD3D_SM4_WRITEMASK_SHIFT
Definition: tpf.c:145
shader_sm4_is_scalar_register
bool shader_sm4_is_scalar_register(const struct vkd3d_shader_register *reg)
Definition: tpf.c:2238
register_is_input_output
static bool register_is_input_output(const struct vkd3d_shader_register *reg)
Definition: tpf.c:2273
VKD3D_SM4_WRITEMASK_MASK
#define VKD3D_SM4_WRITEMASK_MASK
Definition: tpf.c:146
VKD3D_SM4_SWIZZLE_SHIFT
#define VKD3D_SM4_SWIZZLE_SHIFT
Definition: tpf.c:148
VKD3D_SM4_DIMENSION_MASK
#define VKD3D_SM4_DIMENSION_MASK
Definition: tpf.c:143
swizzle_from_sm4
static uint32_t swizzle_from_sm4(uint32_t s)
Definition: tpf.c:2258
shader_sm4_read_param
static bool shader_sm4_read_param(struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, const uint32_t *end, enum vkd3d_data_type data_type, struct vkd3d_shader_register *param, enum vkd3d_shader_src_modifier *modifier)
Definition: tpf.c:2040
shader_sm4_validate_input_output_register
static bool shader_sm4_validate_input_output_register(struct vkd3d_shader_sm4_parser *priv, const struct vkd3d_shader_register *reg, unsigned int mask)
Definition: tpf.c:2306
VKD3D_SM4_SWIZZLE_MASK
#define VKD3D_SM4_SWIZZLE_MASK
Definition: tpf.c:149
vkd3d_sm4_swizzle_type
vkd3d_sm4_swizzle_type
Definition: tpf.c:531
VKD3D_SM4_SWIZZLE_TYPE_SHIFT
#define VKD3D_SM4_SWIZZLE_TYPE_SHIFT
Definition: tpf.c:139
VKD3D_SM4_DIMENSION_SHIFT
#define VKD3D_SM4_DIMENSION_SHIFT
Definition: tpf.c:142
VKD3D_SM4_SWIZZLE_TYPE_MASK
#define VKD3D_SM4_SWIZZLE_TYPE_MASK
Definition: tpf.c:140
VKD3D_SHADER_NO_SWIZZLE
#define VKD3D_SHADER_NO_SWIZZLE
Definition: vkd3d_shader.h:2265
vkd3d_shader_src_modifier
vkd3d_shader_src_modifier
Definition: vkd3d_shader_private.h:732
VKD3DSPSM_NONE
@ VKD3DSPSM_NONE
Definition: vkd3d_shader_private.h:733
VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_SWIZZLE
@ VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_SWIZZLE
Definition: vkd3d_shader_private.h:85
VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DIMENSION
@ VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DIMENSION
Definition: vkd3d_shader_private.h:84
VKD3D_SHADER_WARNING_TPF_UNHANDLED_REGISTER_SWIZZLE
@ VKD3D_SHADER_WARNING_TPF_UNHANDLED_REGISTER_SWIZZLE
Definition: vkd3d_shader_private.h:91
VKD3DSP_WRITEMASK_ALL
#define VKD3DSP_WRITEMASK_ALL
Definition: vkd3d_shader_private.h:754
vsir_write_mask_64_from_32
static uint32_t vsir_write_mask_64_from_32(uint32_t write_mask32)
Definition: vkd3d_shader_private.h:1791
VKD3DSP_WRITEMASK_0
#define VKD3DSP_WRITEMASK_0
Definition: vkd3d_shader_private.h:750

Referenced by shader_sm4_read_dcl_index_range(), shader_sm4_read_dcl_input_ps(), shader_sm4_read_dcl_input_ps_siv(), shader_sm4_read_dcl_resource(), shader_sm4_read_declaration_dst(), shader_sm4_read_declaration_register_semantic(), shader_sm4_read_instruction(), shader_sm5_read_dcl_resource_raw(), shader_sm5_read_dcl_resource_structured(), shader_sm5_read_dcl_tgsm_raw(), shader_sm5_read_dcl_tgsm_structured(), shader_sm5_read_dcl_uav_raw(), and shader_sm5_read_dcl_uav_structured().

◆ shader_sm4_read_instruction()

static void shader_sm4_read_instruction ( struct vkd3d_shader_sm4_parser *  sm4,
struct vkd3d_shader_instruction *  ins 
)
static

Definition at line 2616 of file tpf.c.

2617{
2618 const struct vkd3d_sm4_opcode_info *opcode_info;
2619 struct vsir_program *program = sm4->p.program;
2620 uint32_t opcode_token, opcode, previous_token;
2621 struct vkd3d_shader_dst_param *dst_params;
2622 struct vkd3d_shader_src_param *src_params;
2623 const uint32_t **ptr = &sm4->ptr;
2624 unsigned int i, len;
2625 const uint32_t *p;
2626 uint32_t precise;
2627 size_t remaining;
2628
2629 if (*ptr >= sm4->end)
2630 {
2631 WARN("End of byte-code, failed to read opcode.\n");
2632 goto fail;
2633 }
2634 remaining = sm4->end - *ptr;
2635
2636 ++sm4->p.location.line;
2637
2638 opcode_token = *(*ptr)++;
2639 opcode = opcode_token & VKD3D_SM4_OPCODE_MASK;
2640
2641 len = ((opcode_token & VKD3D_SM4_INSTRUCTION_LENGTH_MASK) >> VKD3D_SM4_INSTRUCTION_LENGTH_SHIFT);
2642 if (!len)
2643 {
2644 if (remaining < 2)
2645 {
2646 WARN("End of byte-code, failed to read length token.\n");
2647 goto fail;
2648 }
2649 len = **ptr;
2650 }
2651 if (!len || remaining < len)
2652 {
2653 WARN("Read invalid length %u (remaining %zu).\n", len, remaining);
2654 goto fail;
2655 }
2656 --len;
2657
2658 if (!(opcode_info = get_info_from_sm4_opcode(&sm4->lookup, opcode)))
2659 {
2660 FIXME("Unrecognized opcode %#x, opcode_token 0x%08x.\n", opcode, opcode_token);
2661 ins->opcode = VKD3DSIH_INVALID;
2662 *ptr += len;
2663 return;
2664 }
2665
2666 vsir_instruction_init(ins, &sm4->p.location, opcode_info->handler_idx);
2667 if (ins->opcode == VKD3DSIH_HS_CONTROL_POINT_PHASE || ins->opcode == VKD3DSIH_HS_FORK_PHASE
2668 || ins->opcode == VKD3DSIH_HS_JOIN_PHASE)
2669 sm4->phase = ins->opcode;
2670 sm4->has_control_point_phase |= ins->opcode == VKD3DSIH_HS_CONTROL_POINT_PHASE;
2671 ins->flags = 0;
2672 ins->coissue = false;
2673 ins->raw = false;
2674 ins->structured = false;
2675 ins->predicate = NULL;
2676 ins->dst_count = opcode_info_get_dst_count(opcode_info);
2677 ins->src_count = opcode_info_get_src_count(opcode_info);
2678 ins->src = src_params = vsir_program_get_src_params(program, ins->src_count);
2679 if (!src_params && ins->src_count)
2680 {
2681 ERR("Failed to allocate src parameters.\n");
2682 vkd3d_shader_parser_error(&sm4->p, VKD3D_SHADER_ERROR_TPF_OUT_OF_MEMORY, "Out of memory.");
2683 ins->opcode = VKD3DSIH_INVALID;
2684 return;
2685 }
2686 ins->resource_type = VKD3D_SHADER_RESOURCE_NONE;
2687 ins->resource_stride = 0;
2688 ins->resource_data_type[0] = VKD3D_DATA_FLOAT;
2689 ins->resource_data_type[1] = VKD3D_DATA_FLOAT;
2690 ins->resource_data_type[2] = VKD3D_DATA_FLOAT;
2691 ins->resource_data_type[3] = VKD3D_DATA_FLOAT;
2692 memset(&ins->texel_offset, 0, sizeof(ins->texel_offset));
2693
2694 p = *ptr;
2695 *ptr += len;
2696
2697 if (opcode_info->read_opcode_func)
2698 {
2699 ins->dst = NULL;
2700 ins->dst_count = 0;
2701 opcode_info->read_opcode_func(ins, opcode, opcode_token, p, len, sm4);
2702 }
2703 else
2704 {
2705 enum vkd3d_shader_dst_modifier instruction_dst_modifier = VKD3DSPDM_NONE;
2706
2707 previous_token = opcode_token;
2708 while (previous_token & VKD3D_SM4_INSTRUCTION_MODIFIER && p != *ptr)
2709 shader_sm4_read_instruction_modifier(previous_token = *p++, ins);
2710
2711 ins->flags = (opcode_token & VKD3D_SM4_INSTRUCTION_FLAGS_MASK) >> VKD3D_SM4_INSTRUCTION_FLAGS_SHIFT;
2712 if (ins->flags & VKD3D_SM4_INSTRUCTION_FLAG_SATURATE)
2713 {
2714 ins->flags &= ~VKD3D_SM4_INSTRUCTION_FLAG_SATURATE;
2715 instruction_dst_modifier = VKD3DSPDM_SATURATE;
2716 }
2717 precise = (opcode_token & VKD3D_SM5_PRECISE_MASK) >> VKD3D_SM5_PRECISE_SHIFT;
2718 ins->flags |= precise << VKD3DSI_PRECISE_SHIFT;
2719
2720 ins->dst = dst_params = vsir_program_get_dst_params(program, ins->dst_count);
2721 if (!dst_params && ins->dst_count)
2722 {
2723 ERR("Failed to allocate dst parameters.\n");
2724 vkd3d_shader_parser_error(&sm4->p, VKD3D_SHADER_ERROR_TPF_OUT_OF_MEMORY, "Out of memory.");
2725 ins->opcode = VKD3DSIH_INVALID;
2726 return;
2727 }
2728 for (i = 0; i < ins->dst_count; ++i)
2729 {
2730 if (!(shader_sm4_read_dst_param(sm4, &p, *ptr, map_data_type(opcode_info->dst_info[i]),
2731 &dst_params[i])))
2732 {
2733 ins->opcode = VKD3DSIH_INVALID;
2734 return;
2735 }
2736 dst_params[i].modifiers |= instruction_dst_modifier;
2737 }
2738
2739 for (i = 0; i < ins->src_count; ++i)
2740 {
2741 if (!(shader_sm4_read_src_param(sm4, &p, *ptr, map_data_type(opcode_info->src_info[i]),
2742 &src_params[i])))
2743 {
2744 ins->opcode = VKD3DSIH_INVALID;
2745 return;
2746 }
2747 }
2748 }
2749
2750 return;
2751
2752fail:
2753 *ptr = sm4->end;
2754 ins->opcode = VKD3DSIH_INVALID;
2755 return;
2756}
p
GLfloat GLfloat p
Definition: glext.h:8902
len
GLenum GLsizei len
Definition: glext.h:6722
vsir_instruction_init
void vsir_instruction_init(struct vkd3d_shader_instruction *ins, const struct vkd3d_shader_location *location, enum vkd3d_shader_opcode opcode)
Definition: ir.c:321
vkd3d_shader_instruction::raw
bool raw
Definition: vkd3d_shader_private.h:1250
vkd3d_shader_instruction::structured
bool structured
Definition: vkd3d_shader_private.h:1250
vkd3d_shader_instruction::dst_count
unsigned int dst_count
Definition: vkd3d_shader_private.h:1242
vkd3d_shader_instruction::predicate
const struct vkd3d_shader_src_param * predicate
Definition: vkd3d_shader_private.h:1251
vkd3d_shader_instruction::texel_offset
struct vkd3d_shader_texel_offset texel_offset
Definition: vkd3d_shader_private.h:1246
vkd3d_shader_instruction::resource_stride
unsigned int resource_stride
Definition: vkd3d_shader_private.h:1248
vkd3d_shader_instruction::coissue
bool coissue
Definition: vkd3d_shader_private.h:1250
vkd3d_shader_instruction::resource_type
enum vkd3d_shader_resource_type resource_type
Definition: vkd3d_shader_private.h:1247
vkd3d_shader_instruction::src_count
unsigned int src_count
Definition: vkd3d_shader_private.h:1243
vkd3d_shader_instruction::opcode
enum vkd3d_shader_opcode opcode
Definition: vkd3d_shader_private.h:1240
vkd3d_shader_instruction::resource_data_type
enum vkd3d_data_type resource_data_type[VKD3D_VEC4_SIZE]
Definition: vkd3d_shader_private.h:1249
vkd3d_shader_sm4_parser::has_control_point_phase
bool has_control_point_phase
Definition: tpf.c:688
vkd3d_shader_src_param
Definition: vkd3d_shader_private.h:989
vkd3d_sm4_opcode_info::handler_idx
enum vkd3d_shader_opcode handler_idx
Definition: tpf.c:705
vkd3d_sm4_opcode_info::dst_info
char dst_info[SM4_MAX_DST_COUNT]
Definition: tpf.c:706
vkd3d_sm4_opcode_info::src_info
char src_info[SM4_MAX_SRC_COUNT]
Definition: tpf.c:707
vkd3d_sm4_opcode_info::read_opcode_func
void(* read_opcode_func)(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:708
VKD3D_SM4_OPCODE_MASK
#define VKD3D_SM4_OPCODE_MASK
Definition: tpf.c:109
VKD3D_SM4_INSTRUCTION_LENGTH_SHIFT
#define VKD3D_SM4_INSTRUCTION_LENGTH_SHIFT
Definition: tpf.c:61
VKD3D_SM5_PRECISE_SHIFT
#define VKD3D_SM5_PRECISE_SHIFT
Definition: tpf.c:91
VKD3D_SM4_INSTRUCTION_MODIFIER
#define VKD3D_SM4_INSTRUCTION_MODIFIER
Definition: tpf.c:41
map_data_type
static enum vkd3d_data_type map_data_type(char t)
Definition: tpf.c:1990
VKD3D_SM4_INSTRUCTION_FLAGS_SHIFT
#define VKD3D_SM4_INSTRUCTION_FLAGS_SHIFT
Definition: tpf.c:64
VKD3D_SM5_PRECISE_MASK
#define VKD3D_SM5_PRECISE_MASK
Definition: tpf.c:92
get_info_from_sm4_opcode
static const struct vkd3d_sm4_opcode_info * get_info_from_sm4_opcode(const struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_sm4_opcode sm4_opcode)
Definition: tpf.c:1928
VKD3D_SM4_INSTRUCTION_FLAGS_MASK
#define VKD3D_SM4_INSTRUCTION_FLAGS_MASK
Definition: tpf.c:65
VKD3D_SM4_INSTRUCTION_FLAG_SATURATE
#define VKD3D_SM4_INSTRUCTION_FLAG_SATURATE
Definition: tpf.c:160
shader_sm4_read_instruction_modifier
static void shader_sm4_read_instruction_modifier(uint32_t modifier, struct vkd3d_shader_instruction *ins)
Definition: tpf.c:2532
opcode_info_get_dst_count
static unsigned int opcode_info_get_dst_count(const struct vkd3d_sm4_opcode_info *info)
Definition: tpf.c:1944
VKD3D_SM4_INSTRUCTION_LENGTH_MASK
#define VKD3D_SM4_INSTRUCTION_LENGTH_MASK
Definition: tpf.c:62
opcode_info_get_src_count
static unsigned int opcode_info_get_src_count(const struct vkd3d_sm4_opcode_info *info)
Definition: tpf.c:1949
vsir_program_get_dst_params
static struct vkd3d_shader_dst_param * vsir_program_get_dst_params(struct vsir_program *program, unsigned int count)
Definition: vkd3d_shader_private.h:1460
VKD3D_SHADER_ERROR_TPF_OUT_OF_MEMORY
@ VKD3D_SHADER_ERROR_TPF_OUT_OF_MEMORY
Definition: vkd3d_shader_private.h:78
vsir_program_get_src_params
static struct vkd3d_shader_src_param * vsir_program_get_src_params(struct vsir_program *program, unsigned int count)
Definition: vkd3d_shader_private.h:1466
VKD3DSIH_INVALID
@ VKD3DSIH_INVALID
Definition: vkd3d_shader_private.h:587
vkd3d_shader_dst_modifier
vkd3d_shader_dst_modifier
Definition: vkd3d_shader_private.h:757
VKD3DSPDM_SATURATE
@ VKD3DSPDM_SATURATE
Definition: vkd3d_shader_private.h:759
VKD3DSPDM_NONE
@ VKD3DSPDM_NONE
Definition: vkd3d_shader_private.h:758
VKD3DSI_PRECISE_SHIFT
#define VKD3DSI_PRECISE_SHIFT
Definition: vkd3d_shader_private.h:865

Referenced by tpf_parse().

◆ shader_sm4_read_instruction_modifier()

static void shader_sm4_read_instruction_modifier ( uint32_t  modifier,
struct vkd3d_shader_instruction *  ins 
)
static

Definition at line 2532 of file tpf.c.

2533{
2534 enum vkd3d_sm4_instruction_modifier modifier_type = modifier & VKD3D_SM4_MODIFIER_MASK;
2535
2536 switch (modifier_type)
2537 {
2538 case VKD3D_SM4_MODIFIER_AOFFIMMI:
2539 {
2540 static const uint32_t recognized_bits = VKD3D_SM4_INSTRUCTION_MODIFIER
2541 | VKD3D_SM4_MODIFIER_MASK
2542 | VKD3D_SM4_AOFFIMMI_U_MASK
2543 | VKD3D_SM4_AOFFIMMI_V_MASK
2544 | VKD3D_SM4_AOFFIMMI_W_MASK;
2545
2546 /* Bit fields are used for sign extension. */
2547 struct
2548 {
2549 int u : 4;
2550 int v : 4;
2551 int w : 4;
2552 } aoffimmi;
2553
2554 if (modifier & ~recognized_bits)
2555 FIXME("Unhandled instruction modifier %#x.\n", modifier);
2556
2557 aoffimmi.u = (modifier & VKD3D_SM4_AOFFIMMI_U_MASK) >> VKD3D_SM4_AOFFIMMI_U_SHIFT;
2558 aoffimmi.v = (modifier & VKD3D_SM4_AOFFIMMI_V_MASK) >> VKD3D_SM4_AOFFIMMI_V_SHIFT;
2559 aoffimmi.w = (modifier & VKD3D_SM4_AOFFIMMI_W_MASK) >> VKD3D_SM4_AOFFIMMI_W_SHIFT;
2560 ins->texel_offset.u = aoffimmi.u;
2561 ins->texel_offset.v = aoffimmi.v;
2562 ins->texel_offset.w = aoffimmi.w;
2563 break;
2564 }
2565
2566 case VKD3D_SM5_MODIFIER_DATA_TYPE:
2567 {
2568 uint32_t components = (modifier & VKD3D_SM5_MODIFIER_DATA_TYPE_MASK) >> VKD3D_SM5_MODIFIER_DATA_TYPE_SHIFT;
2569 unsigned int i;
2570
2571 for (i = 0; i < VKD3D_VEC4_SIZE; i++)
2572 {
2573 enum vkd3d_sm4_data_type data_type = VKD3D_SM4_TYPE_COMPONENT(components, i);
2574
2575 if (!data_type || (data_type >= ARRAY_SIZE(data_type_table)))
2576 {
2577 FIXME("Unhandled data type %#x.\n", data_type);
2578 ins->resource_data_type[i] = VKD3D_DATA_FLOAT;
2579 }
2580 else
2581 {
2582 ins->resource_data_type[i] = data_type_table[data_type];
2583 }
2584 }
2585 break;
2586 }
2587
2588 case VKD3D_SM5_MODIFIER_RESOURCE_TYPE:
2589 {
2590 enum vkd3d_sm4_resource_type resource_type
2591 = (modifier & VKD3D_SM5_MODIFIER_RESOURCE_TYPE_MASK) >> VKD3D_SM5_MODIFIER_RESOURCE_TYPE_SHIFT;
2592
2593 if (resource_type == VKD3D_SM4_RESOURCE_RAW_BUFFER)
2594 ins->raw = true;
2595 else if (resource_type == VKD3D_SM4_RESOURCE_STRUCTURED_BUFFER)
2596 ins->structured = true;
2597
2598 if (resource_type < ARRAY_SIZE(resource_type_table))
2599 ins->resource_type = resource_type_table[resource_type];
2600 else
2601 {
2602 FIXME("Unhandled resource type %#x.\n", resource_type);
2603 ins->resource_type = VKD3D_SHADER_RESOURCE_NONE;
2604 }
2605
2606 ins->resource_stride
2607 = (modifier & VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_MASK) >> VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_SHIFT;
2608 break;
2609 }
2610
2611 default:
2612 FIXME("Unhandled instruction modifier %#x.\n", modifier);
2613 }
2614}
v
const GLdouble * v
Definition: gl.h:2040
w
GLubyte GLubyte GLubyte GLubyte w
Definition: glext.h:6102
VKD3D_SM4_AOFFIMMI_W_MASK
#define VKD3D_SM4_AOFFIMMI_W_MASK
Definition: tpf.c:59
VKD3D_SM4_AOFFIMMI_V_SHIFT
#define VKD3D_SM4_AOFFIMMI_V_SHIFT
Definition: tpf.c:56
VKD3D_SM4_AOFFIMMI_V_MASK
#define VKD3D_SM4_AOFFIMMI_V_MASK
Definition: tpf.c:57
VKD3D_SM5_MODIFIER_RESOURCE_TYPE_MASK
#define VKD3D_SM5_MODIFIER_RESOURCE_TYPE_MASK
Definition: tpf.c:49
VKD3D_SM4_AOFFIMMI_U_MASK
#define VKD3D_SM4_AOFFIMMI_U_MASK
Definition: tpf.c:55
VKD3D_SM5_MODIFIER_RESOURCE_TYPE_SHIFT
#define VKD3D_SM5_MODIFIER_RESOURCE_TYPE_SHIFT
Definition: tpf.c:48
VKD3D_SM4_MODIFIER_MASK
#define VKD3D_SM4_MODIFIER_MASK
Definition: tpf.c:43
VKD3D_SM5_MODIFIER_DATA_TYPE_MASK
#define VKD3D_SM5_MODIFIER_DATA_TYPE_MASK
Definition: tpf.c:46
VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_MASK
#define VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_MASK
Definition: tpf.c:52
vkd3d_sm4_instruction_modifier
vkd3d_sm4_instruction_modifier
Definition: tpf.c:411
VKD3D_SM4_AOFFIMMI_U_SHIFT
#define VKD3D_SM4_AOFFIMMI_U_SHIFT
Definition: tpf.c:54
VKD3D_SM4_AOFFIMMI_W_SHIFT
#define VKD3D_SM4_AOFFIMMI_W_SHIFT
Definition: tpf.c:58
VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_SHIFT
#define VKD3D_SM5_MODIFIER_RESOURCE_STRIDE_SHIFT
Definition: tpf.c:51
VKD3D_SM5_MODIFIER_DATA_TYPE_SHIFT
#define VKD3D_SM5_MODIFIER_DATA_TYPE_SHIFT
Definition: tpf.c:45

Referenced by shader_sm4_read_instruction().

◆ shader_sm4_read_param()

static bool shader_sm4_read_param ( struct vkd3d_shader_sm4_parser *  priv,
const uint32_t **  ptr,
const uint32_t *  end,
enum vkd3d_data_type  data_type,
struct vkd3d_shader_register *  param,
enum vkd3d_shader_src_modifier *  modifier 
)
static

Definition at line 2040 of file tpf.c.

2042{
2043 const struct vkd3d_sm4_register_type_info *register_type_info;
2044 enum vkd3d_shader_register_type vsir_register_type;
2045 enum vkd3d_sm4_register_precision precision;
2046 uint32_t token, order, extended, addressing;
2047 enum vkd3d_sm4_register_type register_type;
2048 enum vkd3d_sm4_extended_operand_type type;
2049 enum vkd3d_sm4_dimension sm4_dimension;
2050 enum vkd3d_sm4_register_modifier m;
2051
2052 if (*ptr >= end)
2053 {
2054 WARN("Invalid ptr %p >= end %p.\n", *ptr, end);
2055 return false;
2056 }
2057 token = *(*ptr)++;
2058
2059 register_type = (token & VKD3D_SM4_REGISTER_TYPE_MASK) >> VKD3D_SM4_REGISTER_TYPE_SHIFT;
2060 register_type_info = get_info_from_sm4_register_type(&priv->lookup, register_type);
2061 if (!register_type_info)
2062 {
2063 FIXME("Unhandled register type %#x.\n", register_type);
2064 vsir_register_type = VKD3DSPR_TEMP;
2065 }
2066 else
2067 {
2068 vsir_register_type = register_type_info->vkd3d_type;
2069 }
2070
2071 order = (token & VKD3D_SM4_REGISTER_ORDER_MASK) >> VKD3D_SM4_REGISTER_ORDER_SHIFT;
2072
2073 vsir_register_init(param, vsir_register_type, data_type, order);
2074 param->precision = VKD3D_SHADER_REGISTER_PRECISION_DEFAULT;
2075 param->non_uniform = false;
2076
2077 *modifier = VKD3DSPSM_NONE;
2078 if (token & VKD3D_SM4_EXTENDED_OPERAND)
2079 {
2080 if (*ptr >= end)
2081 {
2082 WARN("Invalid ptr %p >= end %p.\n", *ptr, end);
2083 return false;
2084 }
2085 extended = *(*ptr)++;
2086
2087 if (extended & VKD3D_SM4_EXTENDED_OPERAND)
2088 {
2089 FIXME("Skipping second-order extended operand.\n");
2090 *ptr += *ptr < end;
2091 }
2092
2093 type = extended & VKD3D_SM4_EXTENDED_OPERAND_TYPE_MASK;
2094 if (type == VKD3D_SM4_EXTENDED_OPERAND_MODIFIER)
2095 {
2096 m = (extended & VKD3D_SM4_REGISTER_MODIFIER_MASK) >> VKD3D_SM4_REGISTER_MODIFIER_SHIFT;
2097 switch (m)
2098 {
2099 case VKD3D_SM4_REGISTER_MODIFIER_NEGATE:
2100 *modifier = VKD3DSPSM_NEG;
2101 break;
2102
2103 case VKD3D_SM4_REGISTER_MODIFIER_ABS:
2104 *modifier = VKD3DSPSM_ABS;
2105 break;
2106
2107 case VKD3D_SM4_REGISTER_MODIFIER_ABS_NEGATE:
2108 *modifier = VKD3DSPSM_ABSNEG;
2109 break;
2110
2111 case VKD3D_SM4_REGISTER_MODIFIER_NONE:
2112 break;
2113
2114 default:
2115 FIXME("Unhandled register modifier %#x.\n", m);
2116 break;
2117 }
2118
2119 precision = (extended & VKD3D_SM4_REGISTER_PRECISION_MASK) >> VKD3D_SM4_REGISTER_PRECISION_SHIFT;
2120 if (precision >= ARRAY_SIZE(register_precision_table)
2121 || register_precision_table[precision] == VKD3D_SHADER_REGISTER_PRECISION_INVALID)
2122 {
2123 FIXME("Unhandled register precision %#x.\n", precision);
2124 param->precision = VKD3D_SHADER_REGISTER_PRECISION_INVALID;
2125 }
2126 else
2127 {
2128 param->precision = register_precision_table[precision];
2129 }
2130
2131 if (extended & VKD3D_SM4_REGISTER_NON_UNIFORM_MASK)
2132 param->non_uniform = true;
2133
2134 extended &= ~(VKD3D_SM4_EXTENDED_OPERAND_TYPE_MASK | VKD3D_SM4_REGISTER_MODIFIER_MASK
2135 | VKD3D_SM4_REGISTER_PRECISION_MASK | VKD3D_SM4_REGISTER_NON_UNIFORM_MASK
2136 | VKD3D_SM4_EXTENDED_OPERAND);
2137 if (extended)
2138 FIXME("Skipping unhandled extended operand bits 0x%08x.\n", extended);
2139 }
2140 else if (type)
2141 {
2142 FIXME("Skipping unhandled extended operand token 0x%08x (type %#x).\n", extended, type);
2143 }
2144 }
2145
2146 if (order >= 1)
2147 {
2148 addressing = (token & VKD3D_SM4_ADDRESSING_MASK0) >> VKD3D_SM4_ADDRESSING_SHIFT0;
2149 if (!(shader_sm4_read_reg_idx(priv, ptr, end, addressing, &param->idx[0])))
2150 {
2151 ERR("Failed to read register index.\n");
2152 return false;
2153 }
2154 }
2155
2156 if (order >= 2)
2157 {
2158 addressing = (token & VKD3D_SM4_ADDRESSING_MASK1) >> VKD3D_SM4_ADDRESSING_SHIFT1;
2159 if (!(shader_sm4_read_reg_idx(priv, ptr, end, addressing, &param->idx[1])))
2160 {
2161 ERR("Failed to read register index.\n");
2162 return false;
2163 }
2164 }
2165
2166 if (order >= 3)
2167 {
2168 addressing = (token & VKD3D_SM4_ADDRESSING_MASK2) >> VKD3D_SM4_ADDRESSING_SHIFT2;
2169 if (!(shader_sm4_read_reg_idx(priv, ptr, end, addressing, &param->idx[2])))
2170 {
2171 ERR("Failed to read register index.\n");
2172 return false;
2173 }
2174 }
2175
2176 if (order > 3)
2177 {
2178 WARN("Unhandled order %u.\n", order);
2179 return false;
2180 }
2181
2182 sm4_dimension = (token & VKD3D_SM4_DIMENSION_MASK) >> VKD3D_SM4_DIMENSION_SHIFT;
2183 param->dimension = vsir_dimension_from_sm4_dimension(sm4_dimension);
2184
2185 if (register_type == VKD3D_SM4_RT_IMMCONST || register_type == VKD3D_SM4_RT_IMMCONST64)
2186 {
2187 unsigned int u32_count;
2188
2189 switch (param->dimension)
2190 {
2191 case VSIR_DIMENSION_SCALAR:
2192 u32_count = 1 + (register_type == VKD3D_SM4_RT_IMMCONST64);
2193 if (end - *ptr < u32_count)
2194 {
2195 WARN("Invalid ptr %p, end %p.\n", *ptr, end);
2196 return false;
2197 }
2198 memcpy(param->u.immconst_u32, *ptr, u32_count * sizeof(uint32_t));
2199 *ptr += u32_count;
2200 break;
2201
2202 case VSIR_DIMENSION_VEC4:
2203 if (end - *ptr < VKD3D_VEC4_SIZE)
2204 {
2205 WARN("Invalid ptr %p, end %p.\n", *ptr, end);
2206 return false;
2207 }
2208 memcpy(param->u.immconst_u32, *ptr, VKD3D_VEC4_SIZE * sizeof(uint32_t));
2209 *ptr += 4;
2210 break;
2211
2212 default:
2213 FIXME("Unhandled dimension %#x.\n", param->dimension);
2214 break;
2215 }
2216 }
2217 else if (register_type == VKD3D_SM4_RT_IMMCONSTBUFFER)
2218 {
2219 if (param->idx_count != 1)
2220 {
2221 WARN("Unexpected idx count %u.\n", param->idx_count);
2222 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_INDEX_COUNT,
2223 "Invalid index count %u for immediate const buffer register; expected count 1.", param->idx_count);
2224 }
2225 }
2226 else if (!shader_is_sm_5_1(priv) && vsir_register_is_descriptor(param))
2227 {
2228 /* SM5.1 places a symbol identifier in idx[0] and moves
2229 * other values up one slot. Normalize to SM5.1. */
2230 param->idx[2] = param->idx[1];
2231 param->idx[1] = param->idx[0];
2232 ++param->idx_count;
2233 }
2234
2235 return true;
2236}
precision
GLenum GLint GLint * precision
Definition: glext.h:7539
param
GLfloat param
Definition: glext.h:5796
order
GLuint GLdouble GLdouble GLint GLint order
Definition: glext.h:11194
m
const GLfloat * m
Definition: glext.h:10848
vsir_register_init
void vsir_register_init(struct vkd3d_shader_register *reg, enum vkd3d_shader_register_type reg_type, enum vkd3d_data_type data_type, unsigned int idx_count)
Definition: ir.c:164
memcpy
#define memcpy(s1, s2, n)
Definition: mkisofs.h:878
vkd3d_sm4_register_type_info::vkd3d_type
enum vkd3d_shader_register_type vkd3d_type
Definition: tpf.c:1387
VKD3D_SM4_REGISTER_ORDER_MASK
#define VKD3D_SM4_REGISTER_ORDER_MASK
Definition: tpf.c:134
shader_sm4_read_reg_idx
static bool shader_sm4_read_reg_idx(struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, const uint32_t *end, uint32_t addressing, struct vkd3d_shader_register_index *reg_idx)
Definition: tpf.c:2012
vkd3d_sm4_extended_operand_type
vkd3d_sm4_extended_operand_type
Definition: tpf.c:460
VKD3D_SM4_EXTENDED_OPERAND_TYPE_MASK
#define VKD3D_SM4_EXTENDED_OPERAND_TYPE_MASK
Definition: tpf.c:113
VKD3D_SM4_REGISTER_PRECISION_SHIFT
#define VKD3D_SM4_REGISTER_PRECISION_SHIFT
Definition: tpf.c:118
VKD3D_SM4_ADDRESSING_SHIFT2
#define VKD3D_SM4_ADDRESSING_SHIFT2
Definition: tpf.c:124
VKD3D_SM4_ADDRESSING_MASK1
#define VKD3D_SM4_ADDRESSING_MASK1
Definition: tpf.c:128
vkd3d_sm4_register_modifier
vkd3d_sm4_register_modifier
Definition: tpf.c:466
VKD3D_SM4_REGISTER_ORDER_SHIFT
#define VKD3D_SM4_REGISTER_ORDER_SHIFT
Definition: tpf.c:133
vkd3d_sm4_register_precision
vkd3d_sm4_register_precision
Definition: tpf.c:474
VKD3D_SM4_REGISTER_PRECISION_MASK
#define VKD3D_SM4_REGISTER_PRECISION_MASK
Definition: tpf.c:119
vkd3d_sm4_dimension
vkd3d_sm4_dimension
Definition: tpf.c:541
register_precision_table
static enum vkd3d_shader_register_precision register_precision_table[]
Definition: tpf.c:1393
vsir_dimension_from_sm4_dimension
static enum vsir_dimension vsir_dimension_from_sm4_dimension(enum vkd3d_sm4_dimension dim)
Definition: tpf.c:547
VKD3D_SM4_EXTENDED_OPERAND
#define VKD3D_SM4_EXTENDED_OPERAND
Definition: tpf.c:111
VKD3D_SM4_ADDRESSING_MASK2
#define VKD3D_SM4_ADDRESSING_MASK2
Definition: tpf.c:125
vkd3d_sm4_register_type
vkd3d_sm4_register_type
Definition: tpf.c:418
VKD3D_SM4_REGISTER_TYPE_MASK
#define VKD3D_SM4_REGISTER_TYPE_MASK
Definition: tpf.c:137
VKD3D_SM4_ADDRESSING_MASK0
#define VKD3D_SM4_ADDRESSING_MASK0
Definition: tpf.c:131
VKD3D_SM4_REGISTER_MODIFIER_SHIFT
#define VKD3D_SM4_REGISTER_MODIFIER_SHIFT
Definition: tpf.c:115
VKD3D_SM4_ADDRESSING_SHIFT0
#define VKD3D_SM4_ADDRESSING_SHIFT0
Definition: tpf.c:130
VKD3D_SM4_REGISTER_TYPE_SHIFT
#define VKD3D_SM4_REGISTER_TYPE_SHIFT
Definition: tpf.c:136
VKD3D_SM4_REGISTER_NON_UNIFORM_MASK
#define VKD3D_SM4_REGISTER_NON_UNIFORM_MASK
Definition: tpf.c:122
get_info_from_sm4_register_type
static const struct vkd3d_sm4_register_type_info * get_info_from_sm4_register_type(const struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_sm4_register_type sm4_type)
Definition: tpf.c:1954
VKD3D_SM4_REGISTER_MODIFIER_MASK
#define VKD3D_SM4_REGISTER_MODIFIER_MASK
Definition: tpf.c:116
VKD3D_SM4_ADDRESSING_SHIFT1
#define VKD3D_SM4_ADDRESSING_SHIFT1
Definition: tpf.c:127
VKD3DSPSM_ABS
@ VKD3DSPSM_ABS
Definition: vkd3d_shader_private.h:744
VKD3DSPSM_NEG
@ VKD3DSPSM_NEG
Definition: vkd3d_shader_private.h:734
VKD3DSPSM_ABSNEG
@ VKD3DSPSM_ABSNEG
Definition: vkd3d_shader_private.h:745
vsir_register_is_descriptor
static bool vsir_register_is_descriptor(const struct vkd3d_shader_register *reg)
Definition: vkd3d_shader_private.h:965
VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_INDEX_COUNT
@ VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_INDEX_COUNT
Definition: vkd3d_shader_private.h:79
VSIR_DIMENSION_SCALAR
@ VSIR_DIMENSION_SCALAR
Definition: vkd3d_shader_private.h:725
VSIR_DIMENSION_VEC4
@ VSIR_DIMENSION_VEC4
Definition: vkd3d_shader_private.h:726
VKD3D_SHADER_REGISTER_PRECISION_DEFAULT
@ VKD3D_SHADER_REGISTER_PRECISION_DEFAULT
Definition: vkd3d_shader_private.h:669
VKD3D_SHADER_REGISTER_PRECISION_INVALID
@ VKD3D_SHADER_REGISTER_PRECISION_INVALID
Definition: vkd3d_shader_private.h:677

Referenced by shader_sm4_read_dst_param(), and shader_sm4_read_src_param().

◆ shader_sm4_read_reg_idx()

static bool shader_sm4_read_reg_idx ( struct vkd3d_shader_sm4_parser *  priv,
const uint32_t **  ptr,
const uint32_t *  end,
uint32_t  addressing,
struct vkd3d_shader_register_index *  reg_idx 
)
static

Definition at line 2012 of file tpf.c.

2014{
2015 if (addressing & VKD3D_SM4_ADDRESSING_RELATIVE)
2016 {
2017 struct vkd3d_shader_src_param *rel_addr = vsir_program_get_src_params(priv->p.program, 1);
2018
2019 if (!(reg_idx->rel_addr = rel_addr))
2020 {
2021 ERR("Failed to get src param for relative addressing.\n");
2022 return false;
2023 }
2024
2025 if (addressing & VKD3D_SM4_ADDRESSING_OFFSET)
2026 reg_idx->offset = *(*ptr)++;
2027 else
2028 reg_idx->offset = 0;
2029 shader_sm4_read_src_param(priv, ptr, end, VKD3D_DATA_INT, rel_addr);
2030 }
2031 else
2032 {
2033 reg_idx->rel_addr = NULL;
2034 reg_idx->offset = *(*ptr)++;
2035 }
2036
2037 return true;
2038}
vkd3d_shader_register_index::offset
unsigned int offset
Definition: vkd3d_shader_private.h:936
vkd3d_shader_register_index::rel_addr
struct vkd3d_shader_src_param * rel_addr
Definition: vkd3d_shader_private.h:935
VKD3D_SM4_ADDRESSING_RELATIVE
#define VKD3D_SM4_ADDRESSING_RELATIVE
Definition: tpf.c:157
VKD3D_SM4_ADDRESSING_OFFSET
#define VKD3D_SM4_ADDRESSING_OFFSET
Definition: tpf.c:158

Referenced by shader_sm4_read_param().

◆ shader_sm4_read_register_space()

static bool shader_sm4_read_register_space ( struct vkd3d_shader_sm4_parser *  priv,
const uint32_t **  ptr,
const uint32_t *  end,
unsigned int *  register_space 
)
static

Definition at line 779 of file tpf.c.

781{
782 *register_space = 0;
783
784 if (!shader_is_sm_5_1(priv))
785 return true;
786
787 if (*ptr >= end)
788 {
789 WARN("Invalid ptr %p >= end %p.\n", *ptr, end);
790 return false;
791 }
792
793 *register_space = *(*ptr)++;
794 return true;
795}

Referenced by shader_sm4_read_dcl_constant_buffer(), shader_sm4_read_dcl_resource(), shader_sm4_read_dcl_sampler(), shader_sm5_read_dcl_resource_raw(), shader_sm5_read_dcl_resource_structured(), shader_sm5_read_dcl_uav_raw(), and shader_sm5_read_dcl_uav_structured().

◆ shader_sm4_read_shader_data()

static void shader_sm4_read_shader_data ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 817 of file tpf.c.

819{
820 struct vkd3d_shader_immediate_constant_buffer *icb;
821 enum vkd3d_sm4_shader_data_type type;
822 unsigned int icb_size;
823
824 type = (opcode_token & VKD3D_SM4_SHADER_DATA_TYPE_MASK) >> VKD3D_SM4_SHADER_DATA_TYPE_SHIFT;
825 if (type != VKD3D_SM4_SHADER_DATA_IMMEDIATE_CONSTANT_BUFFER)
826 {
827 FIXME("Ignoring shader data type %#x.\n", type);
828 ins->opcode = VKD3DSIH_NOP;
829 return;
830 }
831
832 ++tokens;
833 icb_size = token_count - 1;
834 if (icb_size % 4)
835 {
836 FIXME("Unexpected immediate constant buffer size %u.\n", icb_size);
837 ins->opcode = VKD3DSIH_INVALID;
838 return;
839 }
840
841 if (!(icb = vkd3d_malloc(offsetof(struct vkd3d_shader_immediate_constant_buffer, data[icb_size]))))
842 {
843 ERR("Failed to allocate immediate constant buffer, size %u.\n", icb_size);
844 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_OUT_OF_MEMORY, "Out of memory.");
845 ins->opcode = VKD3DSIH_INVALID;
846 return;
847 }
848 icb->register_idx = 0;
849 icb->data_type = VKD3D_DATA_FLOAT;
850 icb->component_count = VKD3D_VEC4_SIZE;
851 icb->element_count = icb_size / VKD3D_VEC4_SIZE;
852 icb->is_null = false;
853 memcpy(icb->data, tokens, sizeof(*tokens) * icb_size);
854 shader_instruction_array_add_icb(&priv->p.program->instructions, icb);
855 ins->declaration.icb = icb;
856}
data
GLint GLenum GLsizei GLsizei GLsizei GLint GLsizei const GLvoid * data
Definition: gl.h:1950
offsetof
#define offsetof(TYPE, MEMBER)
Definition: sdbstringtable.c:26
vkd3d_shader_immediate_constant_buffer
Definition: vkd3d_shader_private.h:912
vkd3d_shader_immediate_constant_buffer::component_count
unsigned int component_count
Definition: vkd3d_shader_private.h:917
vkd3d_shader_immediate_constant_buffer::data_type
enum vkd3d_data_type data_type
Definition: vkd3d_shader_private.h:914
vkd3d_shader_immediate_constant_buffer::register_idx
unsigned int register_idx
Definition: vkd3d_shader_private.h:913
vkd3d_shader_immediate_constant_buffer::element_count
unsigned int element_count
Definition: vkd3d_shader_private.h:916
vkd3d_shader_immediate_constant_buffer::data
uint32_t data[]
Definition: vkd3d_shader_private.h:919
vkd3d_shader_immediate_constant_buffer::is_null
bool is_null
Definition: vkd3d_shader_private.h:918
vkd3d_shader_instruction::icb
const struct vkd3d_shader_immediate_constant_buffer * icb
Definition: vkd3d_shader_private.h:1263
VKD3D_SM4_SHADER_DATA_TYPE_SHIFT
#define VKD3D_SM4_SHADER_DATA_TYPE_SHIFT
Definition: tpf.c:82
VKD3D_SM4_SHADER_DATA_TYPE_MASK
#define VKD3D_SM4_SHADER_DATA_TYPE_MASK
Definition: tpf.c:83
vkd3d_sm4_shader_data_type
vkd3d_sm4_shader_data_type
Definition: tpf.c:615
vkd3d_malloc
static void * vkd3d_malloc(size_t size)
Definition: vkd3d_memory.h:28
shader_instruction_array_add_icb
bool shader_instruction_array_add_icb(struct vkd3d_shader_instruction_array *instructions, struct vkd3d_shader_immediate_constant_buffer *icb)
Definition: vkd3d_shader_main.c:2171

Referenced by init_sm4_lookup_tables().

◆ shader_sm4_read_src_param()

static bool shader_sm4_read_src_param ( struct vkd3d_shader_sm4_parser *  priv,
const uint32_t **  ptr,
const uint32_t *  end,
enum vkd3d_data_type  data_type,
struct vkd3d_shader_src_param *  src_param 
)
static

Definition at line 2358 of file tpf.c.

2360{
2361 unsigned int dimension, mask;
2362 uint32_t token;
2363
2364 if (*ptr >= end)
2365 {
2366 WARN("Invalid ptr %p >= end %p.\n", *ptr, end);
2367 return false;
2368 }
2369 token = **ptr;
2370
2371 if (!shader_sm4_read_param(priv, ptr, end, data_type, &src_param->reg, &src_param->modifiers))
2372 {
2373 ERR("Failed to read parameter.\n");
2374 return false;
2375 }
2376
2377 switch ((dimension = (token & VKD3D_SM4_DIMENSION_MASK) >> VKD3D_SM4_DIMENSION_SHIFT))
2378 {
2379 case VKD3D_SM4_DIMENSION_NONE:
2380 case VKD3D_SM4_DIMENSION_SCALAR:
2381 src_param->swizzle = VKD3D_SHADER_SWIZZLE(X, X, X, X);
2382 break;
2383
2384 case VKD3D_SM4_DIMENSION_VEC4:
2385 {
2386 enum vkd3d_sm4_swizzle_type swizzle_type =
2387 (token & VKD3D_SM4_SWIZZLE_TYPE_MASK) >> VKD3D_SM4_SWIZZLE_TYPE_SHIFT;
2388
2389 switch (swizzle_type)
2390 {
2391 case VKD3D_SM4_SWIZZLE_NONE:
2392 src_param->swizzle = VKD3D_SHADER_NO_SWIZZLE;
2393
2394 mask = (token & VKD3D_SM4_WRITEMASK_MASK) >> VKD3D_SM4_WRITEMASK_SHIFT;
2395 /* Mask seems only to be used for vec4 constants and is always zero. */
2396 if (!register_is_constant(&src_param->reg))
2397 {
2398 FIXME("Source mask %#x is not for a constant.\n", mask);
2399 vkd3d_shader_parser_warning(&priv->p, VKD3D_SHADER_WARNING_TPF_UNHANDLED_REGISTER_MASK,
2400 "Unhandled mask %#x for a non-constant source register.", mask);
2401 }
2402 else if (mask)
2403 {
2404 FIXME("Unhandled mask %#x.\n", mask);
2405 vkd3d_shader_parser_warning(&priv->p, VKD3D_SHADER_WARNING_TPF_UNHANDLED_REGISTER_MASK,
2406 "Unhandled source register mask %#x.", mask);
2407 }
2408
2409 break;
2410
2411 case VKD3D_SM4_SWIZZLE_SCALAR:
2412 src_param->swizzle = (token & VKD3D_SM4_SWIZZLE_MASK) >> VKD3D_SM4_SWIZZLE_SHIFT;
2413 src_param->swizzle = (src_param->swizzle & 0x3) * 0x01010101;
2414 break;
2415
2416 case VKD3D_SM4_SWIZZLE_VEC4:
2417 src_param->swizzle = swizzle_from_sm4((token & VKD3D_SM4_SWIZZLE_MASK) >> VKD3D_SM4_SWIZZLE_SHIFT);
2418 break;
2419
2420 default:
2421 FIXME("Unhandled swizzle type %#x.\n", swizzle_type);
2422 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_SWIZZLE,
2423 "Source register swizzle type %#x is invalid.", swizzle_type);
2424 break;
2425 }
2426 break;
2427 }
2428
2429 default:
2430 FIXME("Unhandled dimension %#x.\n", dimension);
2431 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DIMENSION,
2432 "Source register dimension %#x is invalid.", dimension);
2433 break;
2434 }
2435
2436 if (data_type_is_64_bit(data_type))
2437 src_param->swizzle = vsir_swizzle_64_from_32(src_param->swizzle);
2438
2439 if (register_is_input_output(&src_param->reg) && !shader_sm4_validate_input_output_register(priv,
2440 &src_param->reg, mask_from_swizzle(src_param->swizzle)))
2441 return false;
2442
2443 return true;
2444}
vkd3d_shader_src_param::swizzle
uint32_t swizzle
Definition: vkd3d_shader_private.h:991
vkd3d_shader_src_param::reg
struct vkd3d_shader_register reg
Definition: vkd3d_shader_private.h:990
vkd3d_shader_src_param::modifiers
enum vkd3d_shader_src_modifier modifiers
Definition: vkd3d_shader_private.h:992
mask_from_swizzle
static uint32_t mask_from_swizzle(uint32_t swizzle)
Definition: tpf.c:2298
VKD3D_SHADER_SWIZZLE
#define VKD3D_SHADER_SWIZZLE(x, y, z, w)
Definition: vkd3d_shader.h:2258
vsir_swizzle_64_from_32
static uint32_t vsir_swizzle_64_from_32(uint32_t swizzle32)
Definition: vkd3d_shader_private.h:1829
data_type_is_64_bit
static bool data_type_is_64_bit(enum vkd3d_data_type data_type)
Definition: vkd3d_shader_private.h:717
VKD3D_SHADER_WARNING_TPF_UNHANDLED_REGISTER_MASK
@ VKD3D_SHADER_WARNING_TPF_UNHANDLED_REGISTER_MASK
Definition: vkd3d_shader_private.h:90
register_is_constant
static bool register_is_constant(const struct vkd3d_shader_register *reg)
Definition: vkd3d_shader_private.h:1297

Referenced by shader_sm4_read_case_condition(), shader_sm4_read_conditional_op(), shader_sm4_read_dcl_constant_buffer(), shader_sm4_read_dcl_sampler(), shader_sm4_read_instruction(), shader_sm4_read_reg_idx(), and shader_sm5_read_fcall().

◆ shader_sm4_set_descriptor_register_range()

static void shader_sm4_set_descriptor_register_range ( struct vkd3d_shader_sm4_parser *  sm4,
const struct vkd3d_shader_register *  reg,
struct vkd3d_shader_register_range *  range 
)
static

Definition at line 858 of file tpf.c.

860{
861 range->first = reg->idx[1].offset;
862 range->last = reg->idx[shader_is_sm_5_1(sm4) ? 2 : 1].offset;
863 if (range->last < range->first)
864 {
865 FIXME("Invalid register range [%u:%u].\n", range->first, range->last);
866 vkd3d_shader_parser_error(&sm4->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_RANGE,
867 "Last register %u must not be less than first register %u in range.", range->last, range->first);
868 }
869}
range
range
Definition: d3dx9_private.h:58
VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_RANGE
@ VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_RANGE
Definition: vkd3d_shader_private.h:77

Referenced by shader_sm4_read_dcl_constant_buffer(), shader_sm4_read_dcl_resource(), shader_sm4_read_dcl_sampler(), shader_sm5_read_dcl_resource_raw(), shader_sm5_read_dcl_resource_structured(), shader_sm5_read_dcl_uav_raw(), and shader_sm5_read_dcl_uav_structured().

◆ shader_sm4_validate_default_phase_index_ranges()

static void shader_sm4_validate_default_phase_index_ranges ( struct vkd3d_shader_sm4_parser *  sm4)
static

Definition at line 2877 of file tpf.c.

2878{
2879 if (!sm4->input_index_ranges.count || !sm4->output_index_ranges.count)
2880 return;
2881
2882 if (sm4->input_index_ranges.count == sm4->output_index_ranges.count)
2883 {
2884 qsort(sm4->input_index_ranges.ranges, sm4->input_index_ranges.count, sizeof(sm4->input_index_ranges.ranges[0]),
2885 index_range_compare);
2886 qsort(sm4->output_index_ranges.ranges, sm4->output_index_ranges.count, sizeof(sm4->output_index_ranges.ranges[0]),
2887 index_range_compare);
2888 if (!memcmp(sm4->input_index_ranges.ranges, sm4->output_index_ranges.ranges,
2889 sm4->input_index_ranges.count * sizeof(sm4->input_index_ranges.ranges[0])))
2890 return;
2891 }
2892
2893 /* This is very unlikely to occur and would complicate the default control point phase implementation. */
2894 WARN("Default phase index ranges are not identical.\n");
2895 vkd3d_shader_parser_error(&sm4->p, VKD3D_SHADER_ERROR_TPF_INVALID_INDEX_RANGE_DCL,
2896 "Default control point phase input and output index range declarations are not identical.");
2897 return;
2898}
qsort
_ACRTIMP void __cdecl qsort(void *, size_t, size_t, int(__cdecl *)(const void *, const void *))
index_range_compare
static int index_range_compare(const void *a, const void *b)
Definition: tpf.c:2872

Referenced by tpf_parse().

◆ shader_sm4_validate_input_output_register()

static bool shader_sm4_validate_input_output_register ( struct vkd3d_shader_sm4_parser *  priv,
const struct vkd3d_shader_register *  reg,
unsigned int  mask 
)
static

Definition at line 2306 of file tpf.c.

2308{
2309 unsigned int idx_count = 1 + register_is_control_point_input(reg, priv);
2310 const unsigned int *masks;
2311 unsigned int register_idx;
2312
2313 if (reg->idx_count != idx_count)
2314 {
2315 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_INDEX_COUNT,
2316 "Invalid index count %u for register type %#x; expected count %u.",
2317 reg->idx_count, reg->type, idx_count);
2318 return false;
2319 }
2320
2321 switch (reg->type)
2322 {
2323 case VKD3DSPR_INPUT:
2324 case VKD3DSPR_INCONTROLPOINT:
2325 masks = priv->input_register_masks;
2326 break;
2327 case VKD3DSPR_OUTPUT:
2328 masks = sm4_parser_is_in_fork_or_join_phase(priv) ? priv->patch_constant_register_masks
2329 : priv->output_register_masks;
2330 break;
2331 case VKD3DSPR_COLOROUT:
2332 case VKD3DSPR_OUTCONTROLPOINT:
2333 masks = priv->output_register_masks;
2334 break;
2335 case VKD3DSPR_PATCHCONST:
2336 masks = priv->patch_constant_register_masks;
2337 break;
2338
2339 default:
2340 vkd3d_unreachable();
2341 }
2342
2343 register_idx = reg->idx[reg->idx_count - 1].offset;
2344 /* The signature element registers have already been checked against MAX_REG_OUTPUT. */
2345 if (register_idx >= MAX_REG_OUTPUT || (masks[register_idx] & mask) != mask)
2346 {
2347 WARN("Failed to find signature element for register type %#x, index %u and mask %#x.\n",
2348 reg->type, register_idx, mask);
2349 vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_IO_REGISTER,
2350 "Could not find signature element matching register type %#x, index %u and mask %#x.",
2351 reg->type, register_idx, mask);
2352 return false;
2353 }
2354
2355 return true;
2356}
register_is_control_point_input
static bool register_is_control_point_input(const struct vkd3d_shader_register *reg, const struct vkd3d_shader_sm4_parser *priv)
Definition: tpf.c:2290
VKD3D_SHADER_ERROR_TPF_INVALID_IO_REGISTER
@ VKD3D_SHADER_ERROR_TPF_INVALID_IO_REGISTER
Definition: vkd3d_shader_private.h:81

Referenced by shader_sm4_read_dst_param(), and shader_sm4_read_src_param().

◆ shader_sm5_read_control_point_count()

static void shader_sm5_read_control_point_count ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  sm4 
)
static

Definition at line 1252 of file tpf.c.

1254{
1255 struct vsir_program *program = sm4->p.program;
1256
1257 ins->declaration.count = (opcode_token & VKD3D_SM5_CONTROL_POINT_COUNT_MASK)
1258 >> VKD3D_SM5_CONTROL_POINT_COUNT_SHIFT;
1259
1260 if (opcode == VKD3D_SM5_OP_DCL_INPUT_CONTROL_POINT_COUNT)
1261 program->input_control_point_count = ins->declaration.count;
1262 else
1263 program->output_control_point_count = ins->declaration.count;
1264}
VKD3D_SM5_CONTROL_POINT_COUNT_SHIFT
#define VKD3D_SM5_CONTROL_POINT_COUNT_SHIFT
Definition: tpf.c:94
VKD3D_SM5_CONTROL_POINT_COUNT_MASK
#define VKD3D_SM5_CONTROL_POINT_COUNT_MASK
Definition: tpf.c:95

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_function_body()

static void shader_sm5_read_dcl_function_body ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1229 of file tpf.c.

1231{
1232 ins->declaration.index = *tokens;
1233}
vkd3d_shader_instruction::index
unsigned int index
Definition: vkd3d_shader_private.h:1262

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_function_table()

static void shader_sm5_read_dcl_function_table ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1235 of file tpf.c.

1237{
1238 ins->declaration.index = *tokens++;
1239 FIXME("Ignoring set of function bodies (count %u).\n", *tokens);
1240}

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_hs_max_tessfactor()

static void shader_sm5_read_dcl_hs_max_tessfactor ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1287 of file tpf.c.

1289{
1290 ins->declaration.max_tessellation_factor = *(float *)tokens;
1291}
vkd3d_shader_instruction::max_tessellation_factor
float max_tessellation_factor
Definition: vkd3d_shader_private.h:1272

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_interface()

static void shader_sm5_read_dcl_interface ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1242 of file tpf.c.

1244{
1245 ins->declaration.fp.index = *tokens++;
1246 ins->declaration.fp.body_count = *tokens++;
1247 ins->declaration.fp.array_size = *tokens >> VKD3D_SM5_FP_ARRAY_SIZE_SHIFT;
1248 ins->declaration.fp.table_count = *tokens++ & VKD3D_SM5_FP_TABLE_COUNT_MASK;
1249 FIXME("Ignoring set of function tables (count %u).\n", ins->declaration.fp.table_count);
1250}
vkd3d_shader_instruction::fp
struct vkd3d_shader_function_table_pointer fp
Definition: vkd3d_shader_private.h:1275
VKD3D_SM5_FP_ARRAY_SIZE_SHIFT
#define VKD3D_SM5_FP_ARRAY_SIZE_SHIFT
Definition: tpf.c:97
VKD3D_SM5_FP_TABLE_COUNT_MASK
#define VKD3D_SM5_FP_TABLE_COUNT_MASK
Definition: tpf.c:98

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_resource_raw()

static void shader_sm5_read_dcl_resource_raw ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1367 of file tpf.c.

1369{
1370 struct vkd3d_shader_raw_resource *resource = &ins->declaration.raw_resource;
1371 const uint32_t *end = &tokens[token_count];
1372
1373 shader_sm4_read_dst_param(priv, &tokens, end, VKD3D_DATA_UNUSED, &resource->resource.reg);
1374 shader_sm4_set_descriptor_register_range(priv, &resource->resource.reg.reg, &resource->resource.range);
1375 shader_sm4_read_register_space(priv, &tokens, end, &resource->resource.range.space);
1376}
vkd3d_shader_instruction::raw_resource
struct vkd3d_shader_raw_resource raw_resource
Definition: vkd3d_shader_private.h:1264
vkd3d_shader_raw_resource
Definition: vkd3d_shader_private.h:1162

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_resource_structured()

static void shader_sm5_read_dcl_resource_structured ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1353 of file tpf.c.

1355{
1356 struct vkd3d_shader_structured_resource *resource = &ins->declaration.structured_resource;
1357 const uint32_t *end = &tokens[token_count];
1358
1359 shader_sm4_read_dst_param(priv, &tokens, end, VKD3D_DATA_UNUSED, &resource->resource.reg);
1360 shader_sm4_set_descriptor_register_range(priv, &resource->resource.reg.reg, &resource->resource.range);
1361 resource->byte_stride = *tokens++;
1362 if (resource->byte_stride % 4)
1363 FIXME("Byte stride %u is not multiple of 4.\n", resource->byte_stride);
1364 shader_sm4_read_register_space(priv, &tokens, end, &resource->resource.range.space);
1365}
vkd3d_shader_instruction::structured_resource
struct vkd3d_shader_structured_resource structured_resource
Definition: vkd3d_shader_private.h:1265
vkd3d_shader_structured_resource
Definition: vkd3d_shader_private.h:1156

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_tessellator_domain()

static void shader_sm5_read_dcl_tessellator_domain ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1266 of file tpf.c.

1268{
1269 ins->declaration.tessellator_domain = (opcode_token & VKD3D_SM5_TESSELLATOR_MASK)
1270 >> VKD3D_SM5_TESSELLATOR_SHIFT;
1271}
vkd3d_shader_instruction::tessellator_domain
enum vkd3d_tessellator_domain tessellator_domain
Definition: vkd3d_shader_private.h:1269
VKD3D_SM5_TESSELLATOR_SHIFT
#define VKD3D_SM5_TESSELLATOR_SHIFT
Definition: tpf.c:106
VKD3D_SM5_TESSELLATOR_MASK
#define VKD3D_SM5_TESSELLATOR_MASK
Definition: tpf.c:107

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_tessellator_output_primitive()

static void shader_sm5_read_dcl_tessellator_output_primitive ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1280 of file tpf.c.

1282{
1283 ins->declaration.tessellator_output_primitive = (opcode_token & VKD3D_SM5_TESSELLATOR_MASK)
1284 >> VKD3D_SM5_TESSELLATOR_SHIFT;
1285}
vkd3d_shader_instruction::tessellator_output_primitive
enum vkd3d_shader_tessellator_output_primitive tessellator_output_primitive
Definition: vkd3d_shader_private.h:1270

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_tessellator_partitioning()

static void shader_sm5_read_dcl_tessellator_partitioning ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1273 of file tpf.c.

1275{
1276 ins->declaration.tessellator_partitioning = (opcode_token & VKD3D_SM5_TESSELLATOR_MASK)
1277 >> VKD3D_SM5_TESSELLATOR_SHIFT;
1278}
vkd3d_shader_instruction::tessellator_partitioning
enum vkd3d_shader_tessellator_partitioning tessellator_partitioning
Definition: vkd3d_shader_private.h:1271

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_tgsm_raw()

static void shader_sm5_read_dcl_tgsm_raw ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1331 of file tpf.c.

1333{
1334 shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], VKD3D_DATA_FLOAT, &ins->declaration.tgsm_raw.reg);
1335 ins->declaration.tgsm_raw.byte_count = *tokens;
1336 if (ins->declaration.tgsm_raw.byte_count % 4)
1337 FIXME("Byte count %u is not multiple of 4.\n", ins->declaration.tgsm_raw.byte_count);
1338 ins->declaration.tgsm_raw.zero_init = false;
1339}
vkd3d_shader_instruction::tgsm_raw
struct vkd3d_shader_tgsm_raw tgsm_raw
Definition: vkd3d_shader_private.h:1266

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_tgsm_structured()

static void shader_sm5_read_dcl_tgsm_structured ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1341 of file tpf.c.

1343{
1344 shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], VKD3D_DATA_FLOAT,
1345 &ins->declaration.tgsm_structured.reg);
1346 ins->declaration.tgsm_structured.byte_stride = *tokens++;
1347 ins->declaration.tgsm_structured.structure_count = *tokens;
1348 if (ins->declaration.tgsm_structured.byte_stride % 4)
1349 FIXME("Byte stride %u is not multiple of 4.\n", ins->declaration.tgsm_structured.byte_stride);
1350 ins->declaration.tgsm_structured.zero_init = false;
1351}
vkd3d_shader_instruction::tgsm_structured
struct vkd3d_shader_tgsm_structured tgsm_structured
Definition: vkd3d_shader_private.h:1267

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_thread_group()

static void shader_sm5_read_dcl_thread_group ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  sm4 
)
static

Definition at line 1293 of file tpf.c.

1295{
1296 struct vsir_program *program = sm4->p.program;
1297
1298 ins->declaration.thread_group_size.x = *tokens++;
1299 ins->declaration.thread_group_size.y = *tokens++;
1300 ins->declaration.thread_group_size.z = *tokens++;
1301 program->thread_group_size = ins->declaration.thread_group_size;
1302}
vkd3d_shader_instruction::thread_group_size
struct vsir_thread_group_size thread_group_size
Definition: vkd3d_shader_private.h:1268

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_uav_raw()

static void shader_sm5_read_dcl_uav_raw ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1304 of file tpf.c.

1306{
1307 struct vkd3d_shader_raw_resource *resource = &ins->declaration.raw_resource;
1308 const uint32_t *end = &tokens[token_count];
1309
1310 shader_sm4_read_dst_param(priv, &tokens, end, VKD3D_DATA_UNUSED, &resource->resource.reg);
1311 shader_sm4_set_descriptor_register_range(priv, &resource->resource.reg.reg, &resource->resource.range);
1312 ins->flags = (opcode_token & VKD3D_SM5_UAV_FLAGS_MASK) >> VKD3D_SM5_UAV_FLAGS_SHIFT;
1313 shader_sm4_read_register_space(priv, &tokens, end, &resource->resource.range.space);
1314}

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_dcl_uav_structured()

static void shader_sm5_read_dcl_uav_structured ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1316 of file tpf.c.

1318{
1319 struct vkd3d_shader_structured_resource *resource = &ins->declaration.structured_resource;
1320 const uint32_t *end = &tokens[token_count];
1321
1322 shader_sm4_read_dst_param(priv, &tokens, end, VKD3D_DATA_UNUSED, &resource->resource.reg);
1323 shader_sm4_set_descriptor_register_range(priv, &resource->resource.reg.reg, &resource->resource.range);
1324 ins->flags = (opcode_token & VKD3D_SM5_UAV_FLAGS_MASK) >> VKD3D_SM5_UAV_FLAGS_SHIFT;
1325 resource->byte_stride = *tokens++;
1326 if (resource->byte_stride % 4)
1327 FIXME("Byte stride %u is not multiple of 4.\n", resource->byte_stride);
1328 shader_sm4_read_register_space(priv, &tokens, end, &resource->resource.range.space);
1329}

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_fcall()

static void shader_sm5_read_fcall ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1222 of file tpf.c.

1224{
1225 ins->src[0].reg.u.fp_body_idx = *tokens++;
1226 shader_sm4_read_src_param(priv, &tokens, &tokens[token_count], VKD3D_DATA_OPAQUE, &ins->src[0]);
1227}

Referenced by init_sm4_lookup_tables().

◆ shader_sm5_read_sync()

static void shader_sm5_read_sync ( struct vkd3d_shader_instruction *  ins,
uint32_t  opcode,
uint32_t  opcode_token,
const uint32_t *  tokens,
unsigned int  token_count,
struct vkd3d_shader_sm4_parser *  priv 
)
static

Definition at line 1378 of file tpf.c.

1380{
1381 ins->flags = (opcode_token & VKD3D_SM5_SYNC_FLAGS_MASK) >> VKD3D_SM5_SYNC_FLAGS_SHIFT;
1382}
VKD3D_SM5_SYNC_FLAGS_SHIFT
#define VKD3D_SM5_SYNC_FLAGS_SHIFT
Definition: tpf.c:103
VKD3D_SM5_SYNC_FLAGS_MASK
#define VKD3D_SM5_SYNC_FLAGS_MASK
Definition: tpf.c:104

Referenced by init_sm4_lookup_tables().

◆ signature_element_pointer_compare()

static int signature_element_pointer_compare ( const void *  x,
const void *  y 
)
static

Definition at line 3234 of file tpf.c.

3235{
3236 const struct signature_element *e = *(const struct signature_element **)x;
3237 const struct signature_element *f = *(const struct signature_element **)y;
3238 int ret;
3239
3240 if ((ret = vkd3d_u32_compare(e->register_index, f->register_index)))
3241 return ret;
3242 return vkd3d_u32_compare(e->mask, f->mask);
3243}
ret
return ret
Definition: mutex.c:147
f
GLfloat f
Definition: glext.h:7540
vkd3d_u32_compare
static int vkd3d_u32_compare(uint32_t x, uint32_t y)
Definition: vkd3d_common.h:386

Referenced by tpf_write_signature().

◆ sm4_base_type()

static D3D_SHADER_VARIABLE_TYPE sm4_base_type ( const struct hlsl_type *  type)
static

Definition at line 3340 of file tpf.c.

3341{
3342 switch (type->e.numeric.type)
3343 {
3344 case HLSL_TYPE_BOOL:
3345 return D3D_SVT_BOOL;
3346 case HLSL_TYPE_DOUBLE:
3347 return D3D_SVT_DOUBLE;
3348 case HLSL_TYPE_FLOAT:
3349 case HLSL_TYPE_HALF:
3350 return D3D_SVT_FLOAT;
3351 case HLSL_TYPE_INT:
3352 return D3D_SVT_INT;
3353 case HLSL_TYPE_UINT:
3354 return D3D_SVT_UINT;
3355 default:
3356 vkd3d_unreachable();
3357 }
3358}
D3D_SVT_INT
@ D3D_SVT_INT
Definition: d3dcommon.idl:170
D3D_SVT_UINT
@ D3D_SVT_UINT
Definition: d3dcommon.idl:187
D3D_SVT_FLOAT
@ D3D_SVT_FLOAT
Definition: d3dcommon.idl:171
D3D_SVT_DOUBLE
@ D3D_SVT_DOUBLE
Definition: d3dcommon.idl:207
D3D_SVT_BOOL
@ D3D_SVT_BOOL
Definition: d3dcommon.idl:169
HLSL_TYPE_HALF
@ HLSL_TYPE_HALF
Definition: hlsl.h:116
HLSL_TYPE_BOOL
@ HLSL_TYPE_BOOL
Definition: hlsl.h:120
HLSL_TYPE_UINT
@ HLSL_TYPE_UINT
Definition: hlsl.h:119
HLSL_TYPE_INT
@ HLSL_TYPE_INT
Definition: hlsl.h:118
HLSL_TYPE_FLOAT
@ HLSL_TYPE_FLOAT
Definition: hlsl.h:115
HLSL_TYPE_DOUBLE
@ HLSL_TYPE_DOUBLE
Definition: hlsl.h:117

Referenced by write_sm4_type().

◆ sm4_class()

static D3D_SHADER_VARIABLE_CLASS sm4_class ( const struct hlsl_type *  type)
static

Definition at line 3296 of file tpf.c.

3297{
3298 switch (type->class)
3299 {
3300 case HLSL_CLASS_MATRIX:
3301 VKD3D_ASSERT(type->modifiers & HLSL_MODIFIERS_MAJORITY_MASK);
3302 if (type->modifiers & HLSL_MODIFIER_COLUMN_MAJOR)
3303 return D3D_SVC_MATRIX_COLUMNS;
3304 else
3305 return D3D_SVC_MATRIX_ROWS;
3306 case HLSL_CLASS_SCALAR:
3307 return D3D_SVC_SCALAR;
3308 case HLSL_CLASS_VECTOR:
3309 return D3D_SVC_VECTOR;
3310
3311 case HLSL_CLASS_ARRAY:
3312 case HLSL_CLASS_DEPTH_STENCIL_STATE:
3313 case HLSL_CLASS_DEPTH_STENCIL_VIEW:
3314 case HLSL_CLASS_EFFECT_GROUP:
3315 case HLSL_CLASS_ERROR:
3316 case HLSL_CLASS_STRUCT:
3317 case HLSL_CLASS_PASS:
3318 case HLSL_CLASS_PIXEL_SHADER:
3319 case HLSL_CLASS_RASTERIZER_STATE:
3320 case HLSL_CLASS_RENDER_TARGET_VIEW:
3321 case HLSL_CLASS_SAMPLER:
3322 case HLSL_CLASS_STRING:
3323 case HLSL_CLASS_TECHNIQUE:
3324 case HLSL_CLASS_TEXTURE:
3325 case HLSL_CLASS_UAV:
3326 case HLSL_CLASS_VERTEX_SHADER:
3327 case HLSL_CLASS_VOID:
3328 case HLSL_CLASS_CONSTANT_BUFFER:
3329 case HLSL_CLASS_COMPUTE_SHADER:
3330 case HLSL_CLASS_DOMAIN_SHADER:
3331 case HLSL_CLASS_HULL_SHADER:
3332 case HLSL_CLASS_GEOMETRY_SHADER:
3333 case HLSL_CLASS_BLEND_STATE:
3334 case HLSL_CLASS_NULL:
3335 break;
3336 }
3337 vkd3d_unreachable();
3338}
D3D_SVC_VECTOR
@ D3D_SVC_VECTOR
Definition: d3dcommon.idl:135
D3D_SVC_MATRIX_COLUMNS
@ D3D_SVC_MATRIX_COLUMNS
Definition: d3dcommon.idl:137
D3D_SVC_SCALAR
@ D3D_SVC_SCALAR
Definition: d3dcommon.idl:134
D3D_SVC_MATRIX_ROWS
@ D3D_SVC_MATRIX_ROWS
Definition: d3dcommon.idl:136
HLSL_CLASS_COMPUTE_SHADER
@ HLSL_CLASS_COMPUTE_SHADER
Definition: hlsl.h:102
HLSL_CLASS_RASTERIZER_STATE
@ HLSL_CLASS_RASTERIZER_STATE
Definition: hlsl.h:94
HLSL_CLASS_RENDER_TARGET_VIEW
@ HLSL_CLASS_RENDER_TARGET_VIEW
Definition: hlsl.h:95
HLSL_CLASS_VERTEX_SHADER
@ HLSL_CLASS_VERTEX_SHADER
Definition: hlsl.h:101
HLSL_CLASS_GEOMETRY_SHADER
@ HLSL_CLASS_GEOMETRY_SHADER
Definition: hlsl.h:105
HLSL_CLASS_TECHNIQUE
@ HLSL_CLASS_TECHNIQUE
Definition: hlsl.h:98
HLSL_CLASS_SAMPLER
@ HLSL_CLASS_SAMPLER
Definition: hlsl.h:96
HLSL_CLASS_UAV
@ HLSL_CLASS_UAV
Definition: hlsl.h:100
HLSL_CLASS_VECTOR
@ HLSL_CLASS_VECTOR
Definition: hlsl.h:84
HLSL_CLASS_TEXTURE
@ HLSL_CLASS_TEXTURE
Definition: hlsl.h:99
HLSL_CLASS_DEPTH_STENCIL_VIEW
@ HLSL_CLASS_DEPTH_STENCIL_VIEW
Definition: hlsl.h:90
HLSL_CLASS_CONSTANT_BUFFER
@ HLSL_CLASS_CONSTANT_BUFFER
Definition: hlsl.h:106
HLSL_CLASS_VOID
@ HLSL_CLASS_VOID
Definition: hlsl.h:108
HLSL_CLASS_SCALAR
@ HLSL_CLASS_SCALAR
Definition: hlsl.h:83
HLSL_CLASS_EFFECT_GROUP
@ HLSL_CLASS_EFFECT_GROUP
Definition: hlsl.h:91
HLSL_CLASS_PIXEL_SHADER
@ HLSL_CLASS_PIXEL_SHADER
Definition: hlsl.h:93
HLSL_CLASS_BLEND_STATE
@ HLSL_CLASS_BLEND_STATE
Definition: hlsl.h:107
HLSL_CLASS_STRING
@ HLSL_CLASS_STRING
Definition: hlsl.h:97
HLSL_CLASS_HULL_SHADER
@ HLSL_CLASS_HULL_SHADER
Definition: hlsl.h:104
HLSL_CLASS_DOMAIN_SHADER
@ HLSL_CLASS_DOMAIN_SHADER
Definition: hlsl.h:103
HLSL_CLASS_NULL
@ HLSL_CLASS_NULL
Definition: hlsl.h:109
HLSL_CLASS_DEPTH_STENCIL_STATE
@ HLSL_CLASS_DEPTH_STENCIL_STATE
Definition: hlsl.h:89
HLSL_CLASS_PASS
@ HLSL_CLASS_PASS
Definition: hlsl.h:92
HLSL_CLASS_ERROR
@ HLSL_CLASS_ERROR
Definition: hlsl.h:110
HLSL_MODIFIERS_MAJORITY_MASK
#define HLSL_MODIFIERS_MAJORITY_MASK
Definition: hlsl.h:427
HLSL_MODIFIER_COLUMN_MAJOR
#define HLSL_MODIFIER_COLUMN_MAJOR
Definition: hlsl.h:407
VKD3D_ASSERT
#define VKD3D_ASSERT(cond)
Definition: vkd3d_common.h:49

Referenced by write_sm4_type().

◆ sm4_compare_extern_resources()

static int sm4_compare_extern_resources ( const void *  a,
const void *  b 
)
static

Definition at line 3532 of file tpf.c.

3533{
3534 const struct extern_resource *aa = (const struct extern_resource *)a;
3535 const struct extern_resource *bb = (const struct extern_resource *)b;
3536 int r;
3537
3538 if ((r = vkd3d_u32_compare(aa->regset, bb->regset)))
3539 return r;
3540
3541 if ((r = vkd3d_u32_compare(aa->space, bb->space)))
3542 return r;
3543
3544 return vkd3d_u32_compare(aa->index, bb->index);
3545}
extern_resource
Definition: tpf.c:3511
extern_resource::space
unsigned int space
Definition: tpf.c:3527
extern_resource::regset
enum hlsl_regset regset
Definition: tpf.c:3526
extern_resource::index
unsigned int index
Definition: tpf.c:3527

Referenced by sm4_get_extern_resources().

◆ sm4_data_type()

static enum vkd3d_sm4_data_type sm4_data_type ( const struct hlsl_type *  type)
static

Definition at line 3449 of file tpf.c.

3450{
3451 const struct hlsl_type *format = type->e.resource.format;
3452
3453 switch (format->e.numeric.type)
3454 {
3455 case HLSL_TYPE_DOUBLE:
3456 return VKD3D_SM4_DATA_DOUBLE;
3457
3458 case HLSL_TYPE_FLOAT:
3459 case HLSL_TYPE_HALF:
3460 if (format->modifiers & HLSL_MODIFIER_UNORM)
3461 return VKD3D_SM4_DATA_UNORM;
3462 if (format->modifiers & HLSL_MODIFIER_SNORM)
3463 return VKD3D_SM4_DATA_SNORM;
3464 return VKD3D_SM4_DATA_FLOAT;
3465
3466 case HLSL_TYPE_INT:
3467 return VKD3D_SM4_DATA_INT;
3468 break;
3469
3470 case HLSL_TYPE_BOOL:
3471 case HLSL_TYPE_UINT:
3472 return VKD3D_SM4_DATA_UINT;
3473
3474 default:
3475 vkd3d_unreachable();
3476 }
3477}
HLSL_MODIFIER_UNORM
#define HLSL_MODIFIER_UNORM
Definition: hlsl.h:417
HLSL_MODIFIER_SNORM
#define HLSL_MODIFIER_SNORM
Definition: hlsl.h:418

Referenced by write_sm4_dcl_textures(), and write_sm4_rdef().

◆ sm4_dimension_from_vsir_dimension()

static enum vkd3d_sm4_dimension sm4_dimension_from_vsir_dimension ( enum vsir_dimension  dim)
static

Definition at line 563 of file tpf.c.

564{
565 switch (dim)
566 {
567 case VSIR_DIMENSION_NONE:
568 return VKD3D_SM4_DIMENSION_NONE;
569 case VSIR_DIMENSION_SCALAR:
570 return VKD3D_SM4_DIMENSION_SCALAR;
571 case VSIR_DIMENSION_VEC4:
572 return VKD3D_SM4_DIMENSION_VEC4;
573 case VSIR_DIMENSION_COUNT:
574 vkd3d_unreachable();
575 }
576 vkd3d_unreachable();
577}
VSIR_DIMENSION_COUNT
@ VSIR_DIMENSION_COUNT
Definition: vkd3d_shader_private.h:728
VSIR_DIMENSION_NONE
@ VSIR_DIMENSION_NONE
Definition: vkd3d_shader_private.h:724

Referenced by sm4_encode_register().

◆ sm4_dst_from_node()

static void sm4_dst_from_node ( struct vkd3d_shader_dst_param *  dst,
const struct hlsl_ir_node *  instr 
)
static

Definition at line 4338 of file tpf.c.

4339{
4340 sm4_register_from_node(&dst->reg, &dst->write_mask, instr);
4341}
sm4_register_from_node
static void sm4_register_from_node(struct vkd3d_shader_register *reg, uint32_t *writemask, const struct hlsl_ir_node *instr)
Definition: tpf.c:4099

Referenced by write_sm4_gather(), write_sm4_ld(), write_sm4_load(), write_sm4_resinfo(), write_sm4_sample(), write_sm4_sampleinfo(), and write_sm4_swizzle().

◆ sm4_encode_instruction_modifier()

static uint32_t sm4_encode_instruction_modifier ( const struct sm4_instruction_modifier *  imod)
static

Definition at line 4052 of file tpf.c.

4053{
4054 uint32_t word = 0;
4055
4056 word |= VKD3D_SM4_MODIFIER_MASK & imod->type;
4057
4058 switch (imod->type)
4059 {
4060 case VKD3D_SM4_MODIFIER_AOFFIMMI:
4061 VKD3D_ASSERT(-8 <= imod->u.aoffimmi.u && imod->u.aoffimmi.u <= 7);
4062 VKD3D_ASSERT(-8 <= imod->u.aoffimmi.v && imod->u.aoffimmi.v <= 7);
4063 VKD3D_ASSERT(-8 <= imod->u.aoffimmi.w && imod->u.aoffimmi.w <= 7);
4064 word |= ((uint32_t)imod->u.aoffimmi.u & 0xf) << VKD3D_SM4_AOFFIMMI_U_SHIFT;
4065 word |= ((uint32_t)imod->u.aoffimmi.v & 0xf) << VKD3D_SM4_AOFFIMMI_V_SHIFT;
4066 word |= ((uint32_t)imod->u.aoffimmi.w & 0xf) << VKD3D_SM4_AOFFIMMI_W_SHIFT;
4067 break;
4068
4069 default:
4070 vkd3d_unreachable();
4071 }
4072
4073 return word;
4074}
word
const WCHAR * word
Definition: lex.c:36
uint32_t
#define uint32_t
Definition: nsiface.idl:61
sm4_instruction_modifier::type
enum vkd3d_sm4_instruction_modifier type
Definition: tpf.c:4041
sm4_instruction_modifier::u
int u
Definition: tpf.c:4047

Referenced by write_sm4_instruction().

◆ sm4_encode_register()

static uint32_t sm4_encode_register ( const struct tpf_compiler *  tpf,
const struct vkd3d_shader_register *  reg,
enum vkd3d_sm4_swizzle_type  sm4_swizzle_type,
uint32_t  sm4_swizzle 
)
static

Definition at line 4404 of file tpf.c.

4406{
4407 const struct vkd3d_sm4_register_type_info *register_type_info;
4408 uint32_t sm4_reg_type, sm4_reg_dim;
4409 uint32_t token = 0;
4410
4411 register_type_info = get_info_from_vkd3d_register_type(&tpf->lookup, reg->type);
4412 if (!register_type_info)
4413 {
4414 FIXME("Unhandled vkd3d-shader register type %#x.\n", reg->type);
4415 sm4_reg_type = VKD3D_SM4_RT_TEMP;
4416 if (sm4_swizzle_type == VKD3D_SM4_SWIZZLE_DEFAULT)
4417 sm4_swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
4418 }
4419 else
4420 {
4421 sm4_reg_type = register_type_info->sm4_type;
4422 if (sm4_swizzle_type == VKD3D_SM4_SWIZZLE_DEFAULT)
4423 sm4_swizzle_type = register_type_info->default_src_swizzle_type;
4424 }
4425 sm4_reg_dim = sm4_dimension_from_vsir_dimension(reg->dimension);
4426
4427 token |= sm4_reg_type << VKD3D_SM4_REGISTER_TYPE_SHIFT;
4428 token |= reg->idx_count << VKD3D_SM4_REGISTER_ORDER_SHIFT;
4429 token |= sm4_reg_dim << VKD3D_SM4_DIMENSION_SHIFT;
4430 if (reg->idx_count > 0)
4431 token |= sm4_get_index_addressing_from_reg(reg, 0) << VKD3D_SM4_ADDRESSING_SHIFT0;
4432 if (reg->idx_count > 1)
4433 token |= sm4_get_index_addressing_from_reg(reg, 1) << VKD3D_SM4_ADDRESSING_SHIFT1;
4434 if (reg->idx_count > 2)
4435 token |= sm4_get_index_addressing_from_reg(reg, 2) << VKD3D_SM4_ADDRESSING_SHIFT2;
4436
4437 if (sm4_reg_dim == VKD3D_SM4_DIMENSION_VEC4)
4438 {
4439 token |= (uint32_t)sm4_swizzle_type << VKD3D_SM4_SWIZZLE_TYPE_SHIFT;
4440
4441 switch (sm4_swizzle_type)
4442 {
4443 case VKD3D_SM4_SWIZZLE_NONE:
4444 VKD3D_ASSERT(sm4_swizzle || register_is_constant(reg));
4445 token |= (sm4_swizzle << VKD3D_SM4_WRITEMASK_SHIFT) & VKD3D_SM4_WRITEMASK_MASK;
4446 break;
4447
4448 case VKD3D_SM4_SWIZZLE_VEC4:
4449 token |= (sm4_swizzle << VKD3D_SM4_SWIZZLE_SHIFT) & VKD3D_SM4_SWIZZLE_MASK;
4450 break;
4451
4452 case VKD3D_SM4_SWIZZLE_SCALAR:
4453 token |= (sm4_swizzle << VKD3D_SM4_SCALAR_DIM_SHIFT) & VKD3D_SM4_SCALAR_DIM_MASK;
4454 break;
4455
4456 default:
4457 vkd3d_unreachable();
4458 }
4459 }
4460
4461 return token;
4462}
tpf_compiler::lookup
struct vkd3d_sm4_lookup_tables lookup
Definition: tpf.c:1413
vkd3d_sm4_register_type_info::sm4_type
enum vkd3d_sm4_register_type sm4_type
Definition: tpf.c:1386
vkd3d_sm4_register_type_info::default_src_swizzle_type
enum vkd3d_sm4_swizzle_type default_src_swizzle_type
Definition: tpf.c:1390
sm4_dimension_from_vsir_dimension
static enum vkd3d_sm4_dimension sm4_dimension_from_vsir_dimension(enum vsir_dimension dim)
Definition: tpf.c:563
VKD3D_SM4_SCALAR_DIM_SHIFT
#define VKD3D_SM4_SCALAR_DIM_SHIFT
Definition: tpf.c:151
VKD3D_SM4_SCALAR_DIM_MASK
#define VKD3D_SM4_SCALAR_DIM_MASK
Definition: tpf.c:152
get_info_from_vkd3d_register_type
static const struct vkd3d_sm4_register_type_info * get_info_from_vkd3d_register_type(const struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_shader_register_type vkd3d_type)
Definition: tpf.c:1962
sm4_get_index_addressing_from_reg
static unsigned int sm4_get_index_addressing_from_reg(const struct vkd3d_shader_register *reg, unsigned int i)
Definition: tpf.c:4390

Referenced by sm4_write_dst_register(), sm4_write_register_index(), and sm4_write_src_register().

◆ sm4_free_extern_resources()

static void sm4_free_extern_resources ( struct extern_resource *  extern_resources,
unsigned int  count 
)
static

Definition at line 3547 of file tpf.c.

3548{
3549 unsigned int i;
3550
3551 for (i = 0; i < count; ++i)
3552 vkd3d_free(extern_resources[i].name);
3553 vkd3d_free(extern_resources);
3554}
count
GLuint GLuint GLsizei count
Definition: gl.h:1545
vkd3d_free
static void vkd3d_free(void *ptr)
Definition: vkd3d_memory.h:52

Referenced by sm4_get_extern_resources(), tpf_write_sfi0(), tpf_write_shdr(), and write_sm4_rdef().

◆ sm4_get_extern_resources()

static struct extern_resource * sm4_get_extern_resources ( struct hlsl_ctx *  ctx,
unsigned int *  count 
)
static

Definition at line 3563 of file tpf.c.

3564{
3565 bool separate_components = ctx->profile->major_version == 5 && ctx->profile->minor_version == 0;
3566 struct extern_resource *extern_resources = NULL;
3567 const struct hlsl_ir_var *var;
3568 struct hlsl_buffer *buffer;
3569 enum hlsl_regset regset;
3570 size_t capacity = 0;
3571 char *name;
3572
3573 *count = 0;
3574
3575 LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
3576 {
3577 if (separate_components)
3578 {
3579 unsigned int component_count = hlsl_type_component_count(var->data_type);
3580 unsigned int k, regset_offset;
3581
3582 for (k = 0; k < component_count; ++k)
3583 {
3584 struct hlsl_type *component_type = hlsl_type_get_component_type(ctx, var->data_type, k);
3585 struct vkd3d_string_buffer *name_buffer;
3586
3587 if (!hlsl_type_is_resource(component_type))
3588 continue;
3589
3590 regset_offset = hlsl_type_get_component_offset(ctx, var->data_type, k, &regset);
3591
3592 if (regset_offset > var->regs[regset].allocation_size)
3593 continue;
3594
3595 if (var->objects_usage[regset][regset_offset].used)
3596 {
3597 if (!(hlsl_array_reserve(ctx, (void **)&extern_resources, &capacity, *count + 1,
3598 sizeof(*extern_resources))))
3599 {
3600 sm4_free_extern_resources(extern_resources, *count);
3601 *count = 0;
3602 return NULL;
3603 }
3604
3605 if (!(name_buffer = hlsl_component_to_string(ctx, var, k)))
3606 {
3607 sm4_free_extern_resources(extern_resources, *count);
3608 *count = 0;
3609 return NULL;
3610 }
3611 if (!(name = hlsl_strdup(ctx, string_skip_tag(name_buffer->buffer))))
3612 {
3613 sm4_free_extern_resources(extern_resources, *count);
3614 *count = 0;
3615 hlsl_release_string_buffer(ctx, name_buffer);
3616 return NULL;
3617 }
3618 hlsl_release_string_buffer(ctx, name_buffer);
3619
3620 extern_resources[*count].var = NULL;
3621 extern_resources[*count].buffer = NULL;
3622
3623 extern_resources[*count].name = name;
3624 extern_resources[*count].is_user_packed = !!var->reg_reservation.reg_type;
3625
3626 extern_resources[*count].component_type = component_type;
3627
3628 extern_resources[*count].regset = regset;
3629 extern_resources[*count].id = var->regs[regset].id;
3630 extern_resources[*count].space = var->regs[regset].space;
3631 extern_resources[*count].index = var->regs[regset].index + regset_offset;
3632 extern_resources[*count].bind_count = 1;
3633 extern_resources[*count].loc = var->loc;
3634
3635 ++*count;
3636 }
3637 }
3638 }
3639 else
3640 {
3641 unsigned int r;
3642
3643 if (!hlsl_type_is_resource(var->data_type))
3644 continue;
3645
3646 for (r = 0; r <= HLSL_REGSET_LAST; ++r)
3647 {
3648 if (!var->regs[r].allocated)
3649 continue;
3650
3651 if (!(hlsl_array_reserve(ctx, (void **)&extern_resources, &capacity, *count + 1,
3652 sizeof(*extern_resources))))
3653 {
3654 sm4_free_extern_resources(extern_resources, *count);
3655 *count = 0;
3656 return NULL;
3657 }
3658
3659 if (!(name = hlsl_strdup(ctx, string_skip_tag(var->name))))
3660 {
3661 sm4_free_extern_resources(extern_resources, *count);
3662 *count = 0;
3663 return NULL;
3664 }
3665
3666 extern_resources[*count].var = var;
3667 extern_resources[*count].buffer = NULL;
3668
3669 extern_resources[*count].name = name;
3670 /* For some reason 5.1 resources aren't marked as
3671 * user-packed, but cbuffers still are. */
3672 extern_resources[*count].is_user_packed = hlsl_version_lt(ctx, 5, 1)
3673 && !!var->reg_reservation.reg_type;
3674
3675 extern_resources[*count].component_type = hlsl_type_get_component_type(ctx, var->data_type, 0);
3676
3677 extern_resources[*count].regset = r;
3678 extern_resources[*count].id = var->regs[r].id;
3679 extern_resources[*count].space = var->regs[r].space;
3680 extern_resources[*count].index = var->regs[r].index;
3681 extern_resources[*count].bind_count = var->bind_count[r];
3682 extern_resources[*count].loc = var->loc;
3683
3684 ++*count;
3685 }
3686 }
3687 }
3688
3689 LIST_FOR_EACH_ENTRY(buffer, &ctx->buffers, struct hlsl_buffer, entry)
3690 {
3691 if (!buffer->reg.allocated)
3692 continue;
3693
3694 if (!(hlsl_array_reserve(ctx, (void **)&extern_resources, &capacity, *count + 1,
3695 sizeof(*extern_resources))))
3696 {
3697 sm4_free_extern_resources(extern_resources, *count);
3698 *count = 0;
3699 return NULL;
3700 }
3701
3702 if (!(name = hlsl_strdup(ctx, buffer->name)))
3703 {
3704 sm4_free_extern_resources(extern_resources, *count);
3705 *count = 0;
3706 return NULL;
3707 }
3708
3709 extern_resources[*count].var = NULL;
3710 extern_resources[*count].buffer = buffer;
3711
3712 extern_resources[*count].name = name;
3713 extern_resources[*count].is_user_packed = !!buffer->reservation.reg_type;
3714
3715 extern_resources[*count].component_type = NULL;
3716
3717 extern_resources[*count].regset = HLSL_REGSET_NUMERIC;
3718 extern_resources[*count].id = buffer->reg.id;
3719 extern_resources[*count].space = buffer->reg.space;
3720 extern_resources[*count].index = buffer->reg.index;
3721 extern_resources[*count].bind_count = 1;
3722 extern_resources[*count].loc = buffer->loc;
3723
3724 ++*count;
3725 }
3726
3727 qsort(extern_resources, *count, sizeof(*extern_resources), sm4_compare_extern_resources);
3728 return extern_resources;
3729}
component_count
unsigned int component_count
Definition: vertexdeclaration.c:29
component_type
component_type
Definition: d3dx9_private.h:146
hlsl_type_is_resource
bool hlsl_type_is_resource(const struct hlsl_type *type)
Definition: hlsl.c:240
hlsl_type_get_component_offset
unsigned int hlsl_type_get_component_offset(struct hlsl_ctx *ctx, struct hlsl_type *type, unsigned int index, enum hlsl_regset *regset)
Definition: hlsl.c:620
hlsl_type_get_component_type
struct hlsl_type * hlsl_type_get_component_type(struct hlsl_ctx *ctx, struct hlsl_type *type, unsigned int index)
Definition: hlsl.c:611
hlsl_component_to_string
struct vkd3d_string_buffer * hlsl_component_to_string(struct hlsl_ctx *ctx, const struct hlsl_ir_var *var, unsigned int index)
Definition: hlsl.c:2864
hlsl_array_reserve
static bool hlsl_array_reserve(struct hlsl_ctx *ctx, void **elements, size_t *capacity, size_t element_count, size_t element_size)
Definition: hlsl.h:1336
hlsl_strdup
static char * hlsl_strdup(struct hlsl_ctx *ctx, const char *string)
Definition: hlsl.h:1327
hlsl_regset
hlsl_regset
Definition: hlsl.h:146
HLSL_REGSET_NUMERIC
@ HLSL_REGSET_NUMERIC
Definition: hlsl.h:151
HLSL_REGSET_LAST
@ HLSL_REGSET_LAST
Definition: hlsl.h:152
hlsl_version_lt
static bool hlsl_version_lt(const struct hlsl_ctx *ctx, unsigned int major, unsigned int minor)
Definition: hlsl.h:1146
hlsl_release_string_buffer
static void hlsl_release_string_buffer(struct hlsl_ctx *ctx, struct vkd3d_string_buffer *buffer)
Definition: hlsl.h:1355
entry
uint32_t entry
Definition: isohybrid.c:63
var
const char * var
Definition: shader.c:5879
regset
D3DXREGISTER_SET regset
Definition: shader.c:5881
k
int k
Definition: mpi.c:3369
LIST_FOR_EACH_ENTRY
#define LIST_FOR_EACH_ENTRY(elem, list, type, field)
Definition: list.h:236
hlsl_buffer
Definition: hlsl.h:993
hlsl_buffer::name
const char * name
Definition: hlsl.h:996
hlsl_ir_var
Definition: hlsl.h:453
vkd3d_string_buffer
Definition: vkd3d_shader_private.h:1514
vkd3d_string_buffer::buffer
char * buffer
Definition: vkd3d_shader_private.h:1515
sm4_free_extern_resources
static void sm4_free_extern_resources(struct extern_resource *extern_resources, unsigned int count)
Definition: tpf.c:3547
sm4_compare_extern_resources
static int sm4_compare_extern_resources(const void *a, const void *b)
Definition: tpf.c:3532
string_skip_tag
static const char * string_skip_tag(const char *string)
Definition: tpf.c:3556

Referenced by tpf_write_sfi0(), tpf_write_shdr(), and write_sm4_rdef().

◆ sm4_get_index_addressing_from_reg()

static unsigned int sm4_get_index_addressing_from_reg ( const struct vkd3d_shader_register *  reg,
unsigned int  i 
)
static

Definition at line 4390 of file tpf.c.

4392{
4393 if (reg->idx[i].rel_addr)
4394 {
4395 if (reg->idx[i].offset == 0)
4396 return VKD3D_SM4_ADDRESSING_RELATIVE;
4397 else
4398 return VKD3D_SM4_ADDRESSING_RELATIVE | VKD3D_SM4_ADDRESSING_OFFSET;
4399 }
4400
4401 return 0;
4402}

Referenced by sm4_encode_register(), and sm4_write_register_index().

◆ sm4_numeric_register_from_deref()

static void sm4_numeric_register_from_deref ( struct hlsl_ctx *  ctx,
struct vkd3d_shader_register *  reg,
enum vkd3d_shader_register_type  type,
uint32_t *  writemask,
const struct hlsl_deref *  deref,
struct sm4_instruction *  sm4_instr 
)
static

Definition at line 4110 of file tpf.c.

4113{
4114 const struct hlsl_ir_var *var = deref->var;
4115 unsigned int offset_const_deref;
4116
4117 reg->type = type;
4118 reg->idx[0].offset = var->regs[HLSL_REGSET_NUMERIC].id;
4119 reg->dimension = VSIR_DIMENSION_VEC4;
4120
4121 VKD3D_ASSERT(var->regs[HLSL_REGSET_NUMERIC].allocated);
4122
4123 if (!var->indexable)
4124 {
4125 offset_const_deref = hlsl_offset_from_deref_safe(ctx, deref);
4126 reg->idx[0].offset += offset_const_deref / 4;
4127 reg->idx_count = 1;
4128 }
4129 else
4130 {
4131 offset_const_deref = deref->const_offset;
4132 reg->idx[1].offset = offset_const_deref / 4;
4133 reg->idx_count = 2;
4134
4135 if (deref->rel_offset.node)
4136 {
4137 struct vkd3d_shader_src_param *idx_src;
4138 unsigned int idx_writemask;
4139
4140 VKD3D_ASSERT(sm4_instr->idx_src_count < ARRAY_SIZE(sm4_instr->idx_srcs));
4141 idx_src = &sm4_instr->idx_srcs[sm4_instr->idx_src_count++];
4142 memset(idx_src, 0, sizeof(*idx_src));
4143
4144 reg->idx[1].rel_addr = idx_src;
4145 sm4_register_from_node(&idx_src->reg, &idx_writemask, deref->rel_offset.node);
4146 VKD3D_ASSERT(idx_writemask != 0);
4147 idx_src->swizzle = swizzle_from_sm4(hlsl_swizzle_from_writemask(idx_writemask));
4148 }
4149 }
4150
4151 *writemask = 0xf & (0xf << (offset_const_deref % 4));
4152 if (var->regs[HLSL_REGSET_NUMERIC].writemask)
4153 *writemask = hlsl_combine_writemasks(var->regs[HLSL_REGSET_NUMERIC].writemask, *writemask);
4154}
hlsl_swizzle_from_writemask
uint32_t hlsl_swizzle_from_writemask(unsigned int writemask)
Definition: hlsl.c:4001
hlsl_combine_writemasks
unsigned int hlsl_combine_writemasks(unsigned int first, unsigned int second)
Definition: hlsl.c:4026
hlsl_offset_from_deref_safe
unsigned int hlsl_offset_from_deref_safe(struct hlsl_ctx *ctx, const struct hlsl_deref *deref)
Definition: hlsl_codegen.c:5978
hlsl_deref::rel_offset
struct hlsl_src rel_offset
Definition: hlsl.h:816
hlsl_deref::const_offset
unsigned int const_offset
Definition: hlsl.h:817
hlsl_deref::var
struct hlsl_ir_var * var
Definition: hlsl.h:796
sm4_instruction::idx_src_count
unsigned int idx_src_count
Definition: tpf.c:4096
sm4_instruction::idx_srcs
struct vkd3d_shader_src_param idx_srcs[7]
Definition: tpf.c:4095

Referenced by sm4_register_from_deref().

◆ sm4_parser_is_in_fork_or_join_phase()

static bool sm4_parser_is_in_fork_or_join_phase ( const struct vkd3d_shader_sm4_parser *  sm4)
static

Definition at line 967 of file tpf.c.

968{
969 return sm4->phase == VKD3DSIH_HS_FORK_PHASE || sm4->phase == VKD3DSIH_HS_JOIN_PHASE;
970}

Referenced by shader_sm4_read_dcl_index_range(), and shader_sm4_validate_input_output_register().

◆ sm4_rdef_resource_dimension()

static D3D_SRV_DIMENSION sm4_rdef_resource_dimension ( const struct hlsl_type *  type)
static

Definition at line 3479 of file tpf.c.

3480{
3481 switch (type->sampler_dim)
3482 {
3483 case HLSL_SAMPLER_DIM_1D:
3484 return D3D_SRV_DIMENSION_TEXTURE1D;
3485 case HLSL_SAMPLER_DIM_2D:
3486 return D3D_SRV_DIMENSION_TEXTURE2D;
3487 case HLSL_SAMPLER_DIM_3D:
3488 return D3D_SRV_DIMENSION_TEXTURE3D;
3489 case HLSL_SAMPLER_DIM_CUBE:
3490 return D3D_SRV_DIMENSION_TEXTURECUBE;
3491 case HLSL_SAMPLER_DIM_1DARRAY:
3492 return D3D_SRV_DIMENSION_TEXTURE1DARRAY;
3493 case HLSL_SAMPLER_DIM_2DARRAY:
3494 return D3D_SRV_DIMENSION_TEXTURE2DARRAY;
3495 case HLSL_SAMPLER_DIM_2DMS:
3496 return D3D_SRV_DIMENSION_TEXTURE2DMS;
3497 case HLSL_SAMPLER_DIM_2DMSARRAY:
3498 return D3D_SRV_DIMENSION_TEXTURE2DMSARRAY;
3499 case HLSL_SAMPLER_DIM_CUBEARRAY:
3500 return D3D_SRV_DIMENSION_TEXTURECUBEARRAY;
3501 case HLSL_SAMPLER_DIM_BUFFER:
3502 case HLSL_SAMPLER_DIM_RAW_BUFFER:
3503 case HLSL_SAMPLER_DIM_STRUCTURED_BUFFER:
3504 return D3D_SRV_DIMENSION_BUFFER;
3505 default:
3506 vkd3d_unreachable();
3507 }
3508}
D3D_SRV_DIMENSION_TEXTURE2D
@ D3D_SRV_DIMENSION_TEXTURE2D
Definition: d3dcommon.idl:553
D3D_SRV_DIMENSION_TEXTURECUBEARRAY
@ D3D_SRV_DIMENSION_TEXTURECUBEARRAY
Definition: d3dcommon.idl:559
D3D_SRV_DIMENSION_TEXTURE2DARRAY
@ D3D_SRV_DIMENSION_TEXTURE2DARRAY
Definition: d3dcommon.idl:554
D3D_SRV_DIMENSION_TEXTURE2DMSARRAY
@ D3D_SRV_DIMENSION_TEXTURE2DMSARRAY
Definition: d3dcommon.idl:556
D3D_SRV_DIMENSION_TEXTURECUBE
@ D3D_SRV_DIMENSION_TEXTURECUBE
Definition: d3dcommon.idl:558
D3D_SRV_DIMENSION_TEXTURE2DMS
@ D3D_SRV_DIMENSION_TEXTURE2DMS
Definition: d3dcommon.idl:555
D3D_SRV_DIMENSION_TEXTURE1D
@ D3D_SRV_DIMENSION_TEXTURE1D
Definition: d3dcommon.idl:551
D3D_SRV_DIMENSION_BUFFER
@ D3D_SRV_DIMENSION_BUFFER
Definition: d3dcommon.idl:550
D3D_SRV_DIMENSION_TEXTURE3D
@ D3D_SRV_DIMENSION_TEXTURE3D
Definition: d3dcommon.idl:557
D3D_SRV_DIMENSION_TEXTURE1DARRAY
@ D3D_SRV_DIMENSION_TEXTURE1DARRAY
Definition: d3dcommon.idl:552
HLSL_SAMPLER_DIM_1DARRAY
@ HLSL_SAMPLER_DIM_1DARRAY
Definition: hlsl.h:133
HLSL_SAMPLER_DIM_CUBEARRAY
@ HLSL_SAMPLER_DIM_CUBEARRAY
Definition: hlsl.h:137
HLSL_SAMPLER_DIM_2DMSARRAY
@ HLSL_SAMPLER_DIM_2DMSARRAY
Definition: hlsl.h:136
HLSL_SAMPLER_DIM_BUFFER
@ HLSL_SAMPLER_DIM_BUFFER
Definition: hlsl.h:138
HLSL_SAMPLER_DIM_2DMS
@ HLSL_SAMPLER_DIM_2DMS
Definition: hlsl.h:135
HLSL_SAMPLER_DIM_2DARRAY
@ HLSL_SAMPLER_DIM_2DARRAY
Definition: hlsl.h:134
HLSL_SAMPLER_DIM_CUBE
@ HLSL_SAMPLER_DIM_CUBE
Definition: hlsl.h:131
HLSL_SAMPLER_DIM_3D
@ HLSL_SAMPLER_DIM_3D
Definition: hlsl.h:130
HLSL_SAMPLER_DIM_2D
@ HLSL_SAMPLER_DIM_2D
Definition: hlsl.h:129
HLSL_SAMPLER_DIM_RAW_BUFFER
@ HLSL_SAMPLER_DIM_RAW_BUFFER
Definition: hlsl.h:140
HLSL_SAMPLER_DIM_STRUCTURED_BUFFER
@ HLSL_SAMPLER_DIM_STRUCTURED_BUFFER
Definition: hlsl.h:139
HLSL_SAMPLER_DIM_1D
@ HLSL_SAMPLER_DIM_1D
Definition: hlsl.h:128

Referenced by write_sm4_rdef().

◆ sm4_register_from_deref()

static void sm4_register_from_deref ( const struct tpf_compiler *  tpf,
struct vkd3d_shader_register *  reg,
uint32_t *  writemask,
const struct hlsl_deref *  deref,
struct sm4_instruction *  sm4_instr 
)
static

Definition at line 4156 of file tpf.c.

4158{
4159 const struct vkd3d_shader_version *version = &tpf->program->shader_version;
4160 const struct hlsl_type *data_type = hlsl_deref_get_type(tpf->ctx, deref);
4161 const struct hlsl_ir_var *var = deref->var;
4162 struct hlsl_ctx *ctx = tpf->ctx;
4163
4164 if (var->is_uniform)
4165 {
4166 enum hlsl_regset regset = hlsl_deref_get_regset(ctx, deref);
4167
4168 if (regset == HLSL_REGSET_TEXTURES)
4169 {
4170 reg->type = VKD3DSPR_RESOURCE;
4171 reg->dimension = VSIR_DIMENSION_VEC4;
4172 if (vkd3d_shader_ver_ge(version, 5, 1))
4173 {
4174 reg->idx[0].offset = var->regs[HLSL_REGSET_TEXTURES].id;
4175 reg->idx[1].offset = var->regs[HLSL_REGSET_TEXTURES].index; /* FIXME: array index */
4176 reg->idx_count = 2;
4177 }
4178 else
4179 {
4180 reg->idx[0].offset = var->regs[HLSL_REGSET_TEXTURES].index;
4181 reg->idx[0].offset += hlsl_offset_from_deref_safe(ctx, deref);
4182 reg->idx_count = 1;
4183 }
4184 VKD3D_ASSERT(regset == HLSL_REGSET_TEXTURES);
4185 *writemask = VKD3DSP_WRITEMASK_ALL;
4186 }
4187 else if (regset == HLSL_REGSET_UAVS)
4188 {
4189 reg->type = VKD3DSPR_UAV;
4190 reg->dimension = VSIR_DIMENSION_VEC4;
4191 if (vkd3d_shader_ver_ge(version, 5, 1))
4192 {
4193 reg->idx[0].offset = var->regs[HLSL_REGSET_UAVS].id;
4194 reg->idx[1].offset = var->regs[HLSL_REGSET_UAVS].index; /* FIXME: array index */
4195 reg->idx_count = 2;
4196 }
4197 else
4198 {
4199 reg->idx[0].offset = var->regs[HLSL_REGSET_UAVS].index;
4200 reg->idx[0].offset += hlsl_offset_from_deref_safe(ctx, deref);
4201 reg->idx_count = 1;
4202 }
4203 VKD3D_ASSERT(regset == HLSL_REGSET_UAVS);
4204 *writemask = VKD3DSP_WRITEMASK_ALL;
4205 }
4206 else if (regset == HLSL_REGSET_SAMPLERS)
4207 {
4208 reg->type = VKD3DSPR_SAMPLER;
4209 reg->dimension = VSIR_DIMENSION_NONE;
4210 if (vkd3d_shader_ver_ge(version, 5, 1))
4211 {
4212 reg->idx[0].offset = var->regs[HLSL_REGSET_SAMPLERS].id;
4213 reg->idx[1].offset = var->regs[HLSL_REGSET_SAMPLERS].index; /* FIXME: array index */
4214 reg->idx_count = 2;
4215 }
4216 else
4217 {
4218 reg->idx[0].offset = var->regs[HLSL_REGSET_SAMPLERS].index;
4219 reg->idx[0].offset += hlsl_offset_from_deref_safe(ctx, deref);
4220 reg->idx_count = 1;
4221 }
4222 VKD3D_ASSERT(regset == HLSL_REGSET_SAMPLERS);
4223 *writemask = VKD3DSP_WRITEMASK_ALL;
4224 }
4225 else
4226 {
4227 unsigned int offset = hlsl_offset_from_deref_safe(ctx, deref) + var->buffer_offset;
4228
4229 VKD3D_ASSERT(data_type->class <= HLSL_CLASS_VECTOR);
4230 reg->type = VKD3DSPR_CONSTBUFFER;
4231 reg->dimension = VSIR_DIMENSION_VEC4;
4232 if (vkd3d_shader_ver_ge(version, 5, 1))
4233 {
4234 reg->idx[0].offset = var->buffer->reg.id;
4235 reg->idx[1].offset = var->buffer->reg.index; /* FIXME: array index */
4236 reg->idx[2].offset = offset / 4;
4237 reg->idx_count = 3;
4238 }
4239 else
4240 {
4241 reg->idx[0].offset = var->buffer->reg.index;
4242 reg->idx[1].offset = offset / 4;
4243 reg->idx_count = 2;
4244 }
4245 *writemask = ((1u << data_type->dimx) - 1) << (offset & 3);
4246 }
4247 }
4248 else if (var->is_input_semantic)
4249 {
4250 bool has_idx;
4251
4252 if (sm4_register_from_semantic_name(version, var->semantic.name, false, &reg->type, &has_idx))
4253 {
4254 unsigned int offset = hlsl_offset_from_deref_safe(ctx, deref);
4255
4256 if (has_idx)
4257 {
4258 reg->idx[0].offset = var->semantic.index + offset / 4;
4259 reg->idx_count = 1;
4260 }
4261
4262 if (shader_sm4_is_scalar_register(reg))
4263 reg->dimension = VSIR_DIMENSION_SCALAR;
4264 else
4265 reg->dimension = VSIR_DIMENSION_VEC4;
4266 *writemask = ((1u << data_type->dimx) - 1) << (offset % 4);
4267 }
4268 else
4269 {
4270 struct hlsl_reg hlsl_reg = hlsl_reg_from_deref(ctx, deref);
4271
4272 VKD3D_ASSERT(hlsl_reg.allocated);
4273
4274 if (version->type == VKD3D_SHADER_TYPE_DOMAIN)
4275 reg->type = VKD3DSPR_PATCHCONST;
4276 else
4277 reg->type = VKD3DSPR_INPUT;
4278 reg->dimension = VSIR_DIMENSION_VEC4;
4279 reg->idx[0].offset = hlsl_reg.id;
4280 reg->idx_count = 1;
4281 *writemask = hlsl_reg.writemask;
4282 }
4283 }
4284 else if (var->is_output_semantic)
4285 {
4286 bool has_idx;
4287
4288 if (sm4_register_from_semantic_name(version, var->semantic.name, true, &reg->type, &has_idx))
4289 {
4290 unsigned int offset = hlsl_offset_from_deref_safe(ctx, deref);
4291
4292 if (has_idx)
4293 {
4294 reg->idx[0].offset = var->semantic.index + offset / 4;
4295 reg->idx_count = 1;
4296 }
4297
4298 if (shader_sm4_is_scalar_register(reg))
4299 reg->dimension = VSIR_DIMENSION_SCALAR;
4300 else
4301 reg->dimension = VSIR_DIMENSION_VEC4;
4302 *writemask = ((1u << data_type->dimx) - 1) << (offset % 4);
4303 }
4304 else
4305 {
4306 struct hlsl_reg hlsl_reg = hlsl_reg_from_deref(ctx, deref);
4307
4308 VKD3D_ASSERT(hlsl_reg.allocated);
4309 reg->type = VKD3DSPR_OUTPUT;
4310 reg->dimension = VSIR_DIMENSION_VEC4;
4311 reg->idx[0].offset = hlsl_reg.id;
4312 reg->idx_count = 1;
4313 *writemask = hlsl_reg.writemask;
4314 }
4315 }
4316 else
4317 {
4318 enum vkd3d_shader_register_type type = deref->var->indexable ? VKD3DSPR_IDXTEMP : VKD3DSPR_TEMP;
4319
4320 sm4_numeric_register_from_deref(ctx, reg, type, writemask, deref, sm4_instr);
4321 }
4322}
hlsl_deref_get_type
struct hlsl_type * hlsl_deref_get_type(struct hlsl_ctx *ctx, const struct hlsl_deref *deref)
Definition: hlsl.c:783
hlsl_deref_get_regset
enum hlsl_regset hlsl_deref_get_regset(struct hlsl_ctx *ctx, const struct hlsl_deref *deref)
Definition: hlsl.c:327
HLSL_REGSET_UAVS
@ HLSL_REGSET_UAVS
Definition: hlsl.h:149
HLSL_REGSET_TEXTURES
@ HLSL_REGSET_TEXTURES
Definition: hlsl.h:148
HLSL_REGSET_SAMPLERS
@ HLSL_REGSET_SAMPLERS
Definition: hlsl.h:147
hlsl_reg_from_deref
struct hlsl_reg hlsl_reg_from_deref(struct hlsl_ctx *ctx, const struct hlsl_deref *deref)
Definition: hlsl_codegen.c:5992
hlsl_ctx
Definition: hlsl.h:1018
hlsl_reg
Definition: hlsl.h:282
hlsl_reg::allocated
bool allocated
Definition: hlsl.h:305
hlsl_reg::writemask
unsigned int writemask
Definition: hlsl.h:303
hlsl_reg::id
uint32_t id
Definition: hlsl.h:284
tpf_compiler::ctx
struct hlsl_ctx * ctx
Definition: tpf.c:1411
tpf_compiler::program
struct vsir_program * program
Definition: tpf.c:1412
sm4_register_from_semantic_name
bool sm4_register_from_semantic_name(const struct vkd3d_shader_version *version, const char *semantic_name, bool output, enum vkd3d_shader_register_type *type, bool *has_idx)
Definition: tpf.c:2998
sm4_numeric_register_from_deref
static void sm4_numeric_register_from_deref(struct hlsl_ctx *ctx, struct vkd3d_shader_register *reg, enum vkd3d_shader_register_type type, uint32_t *writemask, const struct hlsl_deref *deref, struct sm4_instruction *sm4_instr)
Definition: tpf.c:4110
vkd3d_shader_ver_ge
static bool vkd3d_shader_ver_ge(const struct vkd3d_shader_version *v, unsigned int major, unsigned int minor)
Definition: vkd3d_shader_private.h:1279

Referenced by sm4_src_from_deref(), write_sm4_resource_store(), and write_sm4_store().

◆ sm4_register_from_node()

static void sm4_register_from_node ( struct vkd3d_shader_register *  reg,
uint32_t *  writemask,
const struct hlsl_ir_node *  instr 
)
static

Definition at line 4099 of file tpf.c.

4101{
4102 VKD3D_ASSERT(instr->reg.allocated);
4103 reg->type = VKD3DSPR_TEMP;
4104 reg->dimension = VSIR_DIMENSION_VEC4;
4105 reg->idx[0].offset = instr->reg.id;
4106 reg->idx_count = 1;
4107 *writemask = instr->reg.writemask;
4108}
hlsl_ir_node::reg
struct hlsl_reg reg
Definition: hlsl.h:363

Referenced by sm4_dst_from_node(), sm4_numeric_register_from_deref(), sm4_src_from_node(), and write_sm4_swizzle().

◆ sm4_register_from_semantic_name()

bool sm4_register_from_semantic_name ( const struct vkd3d_shader_version *  version,
const char *  semantic_name,
bool  output,
enum vkd3d_shader_register_type *  type,
bool *  has_idx 
)

Definition at line 2998 of file tpf.c.

3000{
3001 unsigned int i;
3002
3003 static const struct
3004 {
3005 const char *semantic;
3006 bool output;
3007 enum vkd3d_shader_type shader_type;
3008 enum vkd3d_shader_register_type type;
3009 bool has_idx;
3010 }
3011 register_table[] =
3012 {
3013 {"sv_dispatchthreadid", false, VKD3D_SHADER_TYPE_COMPUTE, VKD3DSPR_THREADID, false},
3014 {"sv_groupid", false, VKD3D_SHADER_TYPE_COMPUTE, VKD3DSPR_THREADGROUPID, false},
3015 {"sv_groupindex", false, VKD3D_SHADER_TYPE_COMPUTE, VKD3DSPR_LOCALTHREADINDEX, false},
3016 {"sv_groupthreadid", false, VKD3D_SHADER_TYPE_COMPUTE, VKD3DSPR_LOCALTHREADID, false},
3017
3018 {"sv_domainlocation", false, VKD3D_SHADER_TYPE_DOMAIN, VKD3DSPR_TESSCOORD, false},
3019 {"sv_primitiveid", false, VKD3D_SHADER_TYPE_DOMAIN, VKD3DSPR_PRIMID, false},
3020
3021 {"sv_primitiveid", false, VKD3D_SHADER_TYPE_GEOMETRY, VKD3DSPR_PRIMID, false},
3022
3023 {"sv_outputcontrolpointid", false, VKD3D_SHADER_TYPE_HULL, VKD3DSPR_OUTPOINTID, false},
3024 {"sv_primitiveid", false, VKD3D_SHADER_TYPE_HULL, VKD3DSPR_PRIMID, false},
3025
3026 /* Put sv_target in this table, instead of letting it fall through to
3027 * default varying allocation, so that the register index matches the
3028 * usage index. */
3029 {"color", true, VKD3D_SHADER_TYPE_PIXEL, VKD3DSPR_OUTPUT, true},
3030 {"depth", true, VKD3D_SHADER_TYPE_PIXEL, VKD3DSPR_DEPTHOUT, false},
3031 {"sv_depth", true, VKD3D_SHADER_TYPE_PIXEL, VKD3DSPR_DEPTHOUT, false},
3032 {"sv_target", true, VKD3D_SHADER_TYPE_PIXEL, VKD3DSPR_OUTPUT, true},
3033 {"sv_coverage", true, VKD3D_SHADER_TYPE_PIXEL, VKD3DSPR_SAMPLEMASK, false},
3034 };
3035
3036 for (i = 0; i < ARRAY_SIZE(register_table); ++i)
3037 {
3038 if (!ascii_strcasecmp(semantic_name, register_table[i].semantic)
3039 && output == register_table[i].output
3040 && version->type == register_table[i].shader_type)
3041 {
3042 if (type)
3043 *type = register_table[i].type;
3044 *has_idx = register_table[i].has_idx;
3045 return true;
3046 }
3047 }
3048
3049 return false;
3050}
shader_type
shader_type
Definition: d3dcompiler_private.h:55
ascii_strcasecmp
static int ascii_strcasecmp(const char *a, const char *b)
Definition: vkd3d_common.h:437
vkd3d_shader_type
vkd3d_shader_type
Definition: vkd3d_shader_private.h:886

Referenced by allocate_semantic_register(), generate_vsir_signature_entry(), sm4_generate_vsir_instr_dcl_semantic(), and sm4_register_from_deref().

◆ sm4_resource_dimension()

static enum vkd3d_sm4_resource_type sm4_resource_dimension ( const struct hlsl_type *  type)
static

Definition at line 4008 of file tpf.c.

4009{
4010 switch (type->sampler_dim)
4011 {
4012 case HLSL_SAMPLER_DIM_1D:
4013 return VKD3D_SM4_RESOURCE_TEXTURE_1D;
4014 case HLSL_SAMPLER_DIM_2D:
4015 return VKD3D_SM4_RESOURCE_TEXTURE_2D;
4016 case HLSL_SAMPLER_DIM_3D:
4017 return VKD3D_SM4_RESOURCE_TEXTURE_3D;
4018 case HLSL_SAMPLER_DIM_CUBE:
4019 return VKD3D_SM4_RESOURCE_TEXTURE_CUBE;
4020 case HLSL_SAMPLER_DIM_1DARRAY:
4021 return VKD3D_SM4_RESOURCE_TEXTURE_1DARRAY;
4022 case HLSL_SAMPLER_DIM_2DARRAY:
4023 return VKD3D_SM4_RESOURCE_TEXTURE_2DARRAY;
4024 case HLSL_SAMPLER_DIM_2DMS:
4025 return VKD3D_SM4_RESOURCE_TEXTURE_2DMS;
4026 case HLSL_SAMPLER_DIM_2DMSARRAY:
4027 return VKD3D_SM4_RESOURCE_TEXTURE_2DMSARRAY;
4028 case HLSL_SAMPLER_DIM_CUBEARRAY:
4029 return VKD3D_SM4_RESOURCE_TEXTURE_CUBEARRAY;
4030 case HLSL_SAMPLER_DIM_BUFFER:
4031 case HLSL_SAMPLER_DIM_RAW_BUFFER:
4032 case HLSL_SAMPLER_DIM_STRUCTURED_BUFFER:
4033 return VKD3D_SM4_RESOURCE_BUFFER;
4034 default:
4035 vkd3d_unreachable();
4036 }
4037}

Referenced by write_sm4_dcl_textures().

◆ sm4_resource_type()

static D3D_SHADER_INPUT_TYPE sm4_resource_type ( const struct hlsl_type *  type)
static

Definition at line 3432 of file tpf.c.

3433{
3434 switch (type->class)
3435 {
3436 case HLSL_CLASS_SAMPLER:
3437 return D3D_SIT_SAMPLER;
3438 case HLSL_CLASS_TEXTURE:
3439 return D3D_SIT_TEXTURE;
3440 case HLSL_CLASS_UAV:
3441 return D3D_SIT_UAV_RWTYPED;
3442 default:
3443 break;
3444 }
3445
3446 vkd3d_unreachable();
3447}
D3D_SIT_UAV_RWTYPED
@ D3D_SIT_UAV_RWTYPED
Definition: d3dcommon.idl:698
D3D_SIT_SAMPLER
@ D3D_SIT_SAMPLER
Definition: d3dcommon.idl:697
D3D_SIT_TEXTURE
@ D3D_SIT_TEXTURE
Definition: d3dcommon.idl:696

Referenced by write_sm4_rdef().

◆ sm4_src_from_constant_value()

static void sm4_src_from_constant_value ( struct vkd3d_shader_src_param *  src,
const struct hlsl_constant_value *  value,
unsigned int  width,
unsigned int  map_writemask 
)
static

Definition at line 4343 of file tpf.c.

4345{
4346 src->swizzle = 0;
4347 src->reg.type = VKD3DSPR_IMMCONST;
4348 if (width == 1)
4349 {
4350 src->reg.dimension = VSIR_DIMENSION_SCALAR;
4351 src->reg.u.immconst_u32[0] = value->u[0].u;
4352 }
4353 else
4354 {
4355 unsigned int i, j = 0;
4356
4357 src->reg.dimension = VSIR_DIMENSION_VEC4;
4358 for (i = 0; i < 4; ++i)
4359 {
4360 if ((map_writemask & (1u << i)) && (j < width))
4361 src->reg.u.immconst_u32[i] = value->u[j++].u;
4362 else
4363 src->reg.u.immconst_u32[i] = 0;
4364 }
4365 }
4366}
width
GLint GLint GLsizei width
Definition: gl.h:1546
src
GLenum src
Definition: glext.h:6340
j
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint GLint GLint j
Definition: glfuncs.h:250
value
Definition: pdh_main.c:64

Referenced by sm4_src_from_node(), write_sm4_load(), and write_sm4_switch().

◆ sm4_src_from_deref()

static void sm4_src_from_deref ( const struct tpf_compiler *  tpf,
struct vkd3d_shader_src_param *  src,
const struct hlsl_deref *  deref,
unsigned int  map_writemask,
struct sm4_instruction *  sm4_instr 
)
static

Definition at line 4324 of file tpf.c.

4326{
4327 unsigned int hlsl_swizzle;
4328 uint32_t writemask;
4329
4330 sm4_register_from_deref(tpf, &src->reg, &writemask, deref, sm4_instr);
4331 if (vkd3d_sm4_get_default_swizzle_type(&tpf->lookup, src->reg.type) == VKD3D_SM4_SWIZZLE_VEC4)
4332 {
4333 hlsl_swizzle = hlsl_map_swizzle(hlsl_swizzle_from_writemask(writemask), map_writemask);
4334 src->swizzle = swizzle_from_sm4(hlsl_swizzle);
4335 }
4336}
hlsl_map_swizzle
uint32_t hlsl_map_swizzle(uint32_t swizzle, unsigned int writemask)
Definition: hlsl.c:3978
vkd3d_sm4_get_default_swizzle_type
static enum vkd3d_sm4_swizzle_type vkd3d_sm4_get_default_swizzle_type(const struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_shader_register_type vkd3d_type)
Definition: tpf.c:1970
sm4_register_from_deref
static void sm4_register_from_deref(const struct tpf_compiler *tpf, struct vkd3d_shader_register *reg, uint32_t *writemask, const struct hlsl_deref *deref, struct sm4_instruction *sm4_instr)
Definition: tpf.c:4156

Referenced by write_sm4_gather(), write_sm4_ld(), write_sm4_load(), write_sm4_resinfo(), write_sm4_sample(), and write_sm4_sampleinfo().

◆ sm4_src_from_node()

static void sm4_src_from_node ( const struct tpf_compiler *  tpf,
struct vkd3d_shader_src_param *  src,
const struct hlsl_ir_node *  instr,
uint32_t  map_writemask 
)
static

Definition at line 4368 of file tpf.c.

4370{
4371 unsigned int hlsl_swizzle;
4372 uint32_t writemask;
4373
4374 if (instr->type == HLSL_IR_CONSTANT)
4375 {
4376 struct hlsl_ir_constant *constant = hlsl_ir_constant(instr);
4377
4378 sm4_src_from_constant_value(src, &constant->value, instr->data_type->dimx, map_writemask);
4379 return;
4380 }
4381
4382 sm4_register_from_node(&src->reg, &writemask, instr);
4383 if (vkd3d_sm4_get_default_swizzle_type(&tpf->lookup, src->reg.type) == VKD3D_SM4_SWIZZLE_VEC4)
4384 {
4385 hlsl_swizzle = hlsl_map_swizzle(hlsl_swizzle_from_writemask(writemask), map_writemask);
4386 src->swizzle = swizzle_from_sm4(hlsl_swizzle);
4387 }
4388}
constant::value
union constant::@270 value[4]
hlsl_ir_node::data_type
struct hlsl_type * data_type
Definition: hlsl.h:349
sm4_src_from_constant_value
static void sm4_src_from_constant_value(struct vkd3d_shader_src_param *src, const struct hlsl_constant_value *value, unsigned int width, unsigned int map_writemask)
Definition: tpf.c:4343

Referenced by write_sm4_gather(), write_sm4_if(), write_sm4_jump(), write_sm4_ld(), write_sm4_resinfo(), write_sm4_resource_store(), write_sm4_sample(), write_sm4_store(), and write_sm4_switch().

◆ sm4_sysval_semantic_from_semantic_name()

bool sm4_sysval_semantic_from_semantic_name ( enum vkd3d_shader_sysval_semantic *  sysval_semantic,
const struct vkd3d_shader_version *  version,
bool  semantic_compat_mapping,
enum vkd3d_tessellator_domain  domain,
const char *  semantic_name,
unsigned int  semantic_idx,
bool  output,
bool  is_patch_constant_func 
)

Definition at line 3100 of file tpf.c.

3103{
3104 unsigned int i;
3105
3106 static const struct
3107 {
3108 const char *name;
3109 bool output;
3110 enum vkd3d_shader_type shader_type;
3111 enum vkd3d_shader_sysval_semantic semantic;
3112 }
3113 semantics[] =
3114 {
3115 {"sv_dispatchthreadid", false, VKD3D_SHADER_TYPE_COMPUTE, ~0u},
3116 {"sv_groupid", false, VKD3D_SHADER_TYPE_COMPUTE, ~0u},
3117 {"sv_groupindex", false, VKD3D_SHADER_TYPE_COMPUTE, ~0u},
3118 {"sv_groupthreadid", false, VKD3D_SHADER_TYPE_COMPUTE, ~0u},
3119
3120 {"sv_domainlocation", false, VKD3D_SHADER_TYPE_DOMAIN, ~0u},
3121 {"sv_position", false, VKD3D_SHADER_TYPE_DOMAIN, VKD3D_SHADER_SV_NONE},
3122 {"sv_primitiveid", false, VKD3D_SHADER_TYPE_DOMAIN, ~0u},
3123
3124 {"sv_position", true, VKD3D_SHADER_TYPE_DOMAIN, VKD3D_SHADER_SV_POSITION},
3125
3126 {"position", false, VKD3D_SHADER_TYPE_GEOMETRY, VKD3D_SHADER_SV_POSITION},
3127 {"sv_position", false, VKD3D_SHADER_TYPE_GEOMETRY, VKD3D_SHADER_SV_POSITION},
3128 {"sv_primitiveid", false, VKD3D_SHADER_TYPE_GEOMETRY, VKD3D_SHADER_SV_PRIMITIVE_ID},
3129
3130 {"position", true, VKD3D_SHADER_TYPE_GEOMETRY, VKD3D_SHADER_SV_POSITION},
3131 {"sv_position", true, VKD3D_SHADER_TYPE_GEOMETRY, VKD3D_SHADER_SV_POSITION},
3132 {"sv_primitiveid", true, VKD3D_SHADER_TYPE_GEOMETRY, VKD3D_SHADER_SV_PRIMITIVE_ID},
3133
3134 {"sv_outputcontrolpointid", false, VKD3D_SHADER_TYPE_HULL, ~0u},
3135 {"sv_position", false, VKD3D_SHADER_TYPE_HULL, ~0u},
3136 {"sv_primitiveid", false, VKD3D_SHADER_TYPE_HULL, ~0u},
3137
3138 {"sv_position", true, VKD3D_SHADER_TYPE_HULL, VKD3D_SHADER_SV_POSITION},
3139
3140 {"position", false, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SHADER_SV_POSITION},
3141 {"sv_position", false, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SHADER_SV_POSITION},
3142 {"sv_primitiveid", false, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SHADER_SV_PRIMITIVE_ID},
3143 {"sv_isfrontface", false, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SHADER_SV_IS_FRONT_FACE},
3144 {"sv_rendertargetarrayindex", false, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SHADER_SV_RENDER_TARGET_ARRAY_INDEX},
3145 {"sv_viewportarrayindex", false, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SHADER_SV_VIEWPORT_ARRAY_INDEX},
3146 {"sv_sampleindex", false, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SHADER_SV_SAMPLE_INDEX},
3147
3148 {"color", true, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SHADER_SV_TARGET},
3149 {"depth", true, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SHADER_SV_DEPTH},
3150 {"sv_target", true, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SHADER_SV_TARGET},
3151 {"sv_depth", true, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SHADER_SV_DEPTH},
3152 {"sv_coverage", true, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SHADER_SV_COVERAGE},
3153
3154 {"sv_position", false, VKD3D_SHADER_TYPE_VERTEX, VKD3D_SHADER_SV_NONE},
3155 {"sv_vertexid", false, VKD3D_SHADER_TYPE_VERTEX, VKD3D_SHADER_SV_VERTEX_ID},
3156 {"sv_instanceid", false, VKD3D_SHADER_TYPE_VERTEX, VKD3D_SHADER_SV_INSTANCE_ID},
3157
3158 {"position", true, VKD3D_SHADER_TYPE_VERTEX, VKD3D_SHADER_SV_POSITION},
3159 {"sv_position", true, VKD3D_SHADER_TYPE_VERTEX, VKD3D_SHADER_SV_POSITION},
3160 {"sv_rendertargetarrayindex", true, VKD3D_SHADER_TYPE_VERTEX, VKD3D_SHADER_SV_RENDER_TARGET_ARRAY_INDEX},
3161 {"sv_viewportarrayindex", true, VKD3D_SHADER_TYPE_VERTEX, VKD3D_SHADER_SV_VIEWPORT_ARRAY_INDEX},
3162 };
3163 bool needs_compat_mapping = ascii_strncasecmp(semantic_name, "sv_", 3);
3164
3165 if (is_patch_constant_func)
3166 {
3167 if (output)
3168 {
3169 if (!ascii_strcasecmp(semantic_name, "sv_tessfactor"))
3170 return get_tessfactor_sysval_semantic(sysval_semantic, domain, semantic_idx);
3171 if (!ascii_strcasecmp(semantic_name, "sv_insidetessfactor"))
3172 return get_insidetessfactor_sysval_semantic(sysval_semantic, domain, semantic_idx);
3173 if (!ascii_strcasecmp(semantic_name, "sv_position"))
3174 {
3175 *sysval_semantic = VKD3D_SHADER_SV_NONE;
3176 return true;
3177 }
3178 }
3179 else
3180 {
3181 if (!ascii_strcasecmp(semantic_name, "sv_primitiveid")
3182 || !ascii_strcasecmp(semantic_name, "sv_position"))
3183 {
3184 *sysval_semantic = ~0u;
3185 return true;
3186 }
3187 return false;
3188 }
3189 }
3190 else if (version->type == VKD3D_SHADER_TYPE_DOMAIN)
3191 {
3192 if (!output)
3193 {
3194 if (!ascii_strcasecmp(semantic_name, "sv_tessfactor"))
3195 return get_tessfactor_sysval_semantic(sysval_semantic, domain, semantic_idx);
3196 if (!ascii_strcasecmp(semantic_name, "sv_insidetessfactor"))
3197 return get_insidetessfactor_sysval_semantic(sysval_semantic, domain, semantic_idx);
3198 }
3199 }
3200
3201 for (i = 0; i < ARRAY_SIZE(semantics); ++i)
3202 {
3203 if (!ascii_strcasecmp(semantic_name, semantics[i].name)
3204 && output == semantics[i].output
3205 && (semantic_compat_mapping == needs_compat_mapping || !needs_compat_mapping)
3206 && version->type == semantics[i].shader_type)
3207 {
3208 *sysval_semantic = semantics[i].semantic;
3209 return true;
3210 }
3211 }
3212
3213 if (!needs_compat_mapping)
3214 return false;
3215
3216 *sysval_semantic = VKD3D_SHADER_SV_NONE;
3217 return true;
3218}
get_insidetessfactor_sysval_semantic
static bool get_insidetessfactor_sysval_semantic(enum vkd3d_shader_sysval_semantic *semantic, enum vkd3d_tessellator_domain domain, uint32_t index)
Definition: tpf.c:3079
get_tessfactor_sysval_semantic
static bool get_tessfactor_sysval_semantic(enum vkd3d_shader_sysval_semantic *semantic, enum vkd3d_tessellator_domain domain, uint32_t index)
Definition: tpf.c:3052
ascii_strncasecmp
static int ascii_strncasecmp(const char *a, const char *b, size_t n)
Definition: vkd3d_common.h:423
vkd3d_shader_sysval_semantic
vkd3d_shader_sysval_semantic
Definition: vkd3d_shader.h:2069
VKD3D_SHADER_SV_VERTEX_ID
@ VKD3D_SHADER_SV_VERTEX_ID
Definition: vkd3d_shader.h:2083
VKD3D_SHADER_SV_RENDER_TARGET_ARRAY_INDEX
@ VKD3D_SHADER_SV_RENDER_TARGET_ARRAY_INDEX
Definition: vkd3d_shader.h:2079
VKD3D_SHADER_SV_PRIMITIVE_ID
@ VKD3D_SHADER_SV_PRIMITIVE_ID
Definition: vkd3d_shader.h:2085
VKD3D_SHADER_SV_COVERAGE
@ VKD3D_SHADER_SV_COVERAGE
Definition: vkd3d_shader.h:2103
VKD3D_SHADER_SV_DEPTH
@ VKD3D_SHADER_SV_DEPTH
Definition: vkd3d_shader.h:2101
VKD3D_SHADER_SV_TARGET
@ VKD3D_SHADER_SV_TARGET
Definition: vkd3d_shader.h:2099
VKD3D_SHADER_SV_NONE
@ VKD3D_SHADER_SV_NONE
Definition: vkd3d_shader.h:2071
VKD3D_SHADER_SV_IS_FRONT_FACE
@ VKD3D_SHADER_SV_IS_FRONT_FACE
Definition: vkd3d_shader.h:2089
VKD3D_SHADER_SV_VIEWPORT_ARRAY_INDEX
@ VKD3D_SHADER_SV_VIEWPORT_ARRAY_INDEX
Definition: vkd3d_shader.h:2081
VKD3D_SHADER_SV_INSTANCE_ID
@ VKD3D_SHADER_SV_INSTANCE_ID
Definition: vkd3d_shader.h:2087
VKD3D_SHADER_SV_SAMPLE_INDEX
@ VKD3D_SHADER_SV_SAMPLE_INDEX
Definition: vkd3d_shader.h:2091
VKD3D_SHADER_SV_POSITION
@ VKD3D_SHADER_SV_POSITION
Definition: vkd3d_shader.h:2073

Referenced by allocate_semantic_register(), generate_vsir_signature_entry(), and sm4_generate_vsir_instr_dcl_semantic().

◆ sm4_update_stat_counters()

static void sm4_update_stat_counters ( const struct tpf_compiler *  tpf,
const struct sm4_instruction *  instr 
)
static

Definition at line 4568 of file tpf.c.

4569{
4570 enum vkd3d_shader_type shader_type = tpf->program->shader_version.type;
4571 enum vkd3d_sm4_stat_field stat_field;
4572 uint32_t opcode;
4573
4574 ++tpf->stat->fields[VKD3D_STAT_INSTR_COUNT];
4575
4576 opcode = instr->opcode & VKD3D_SM4_OPCODE_MASK;
4577 stat_field = get_stat_field_from_sm4_opcode(&tpf->lookup, opcode);
4578
4579 switch (opcode)
4580 {
4581 case VKD3D_SM4_OP_DCL_TEMPS:
4582 tpf->stat->fields[stat_field] = max(tpf->stat->fields[stat_field], instr->idx[0]);
4583 break;
4584 case VKD3D_SM4_OP_DCL_OUTPUT_TOPOLOGY:
4585 case VKD3D_SM4_OP_DCL_INPUT_PRIMITIVE:
4586 tpf->stat->fields[stat_field] = (instr->opcode & VKD3D_SM4_PRIMITIVE_TYPE_MASK)
4587 >> VKD3D_SM4_PRIMITIVE_TYPE_SHIFT;
4588 break;
4589 case VKD3D_SM4_OP_DCL_VERTICES_OUT:
4590 case VKD3D_SM5_OP_DCL_GS_INSTANCES:
4591 tpf->stat->fields[stat_field] = instr->idx[0];
4592 break;
4593 case VKD3D_SM5_OP_DCL_TESSELLATOR_DOMAIN:
4594 case VKD3D_SM5_OP_DCL_TESSELLATOR_PARTITIONING:
4595 case VKD3D_SM5_OP_DCL_TESSELLATOR_OUTPUT_PRIMITIVE:
4596 tpf->stat->fields[stat_field] = (instr->opcode & VKD3D_SM5_TESSELLATOR_MASK) >> VKD3D_SM5_TESSELLATOR_SHIFT;
4597 break;
4598 case VKD3D_SM5_OP_DCL_INPUT_CONTROL_POINT_COUNT:
4599 case VKD3D_SM5_OP_DCL_OUTPUT_CONTROL_POINT_COUNT:
4600 if ((shader_type == VKD3D_SHADER_TYPE_HULL && opcode == VKD3D_SM5_OP_DCL_OUTPUT_CONTROL_POINT_COUNT)
4601 || (shader_type == VKD3D_SHADER_TYPE_DOMAIN
4602 && opcode == VKD3D_SM5_OP_DCL_INPUT_CONTROL_POINT_COUNT))
4603 {
4604 tpf->stat->fields[stat_field] = (instr->opcode & VKD3D_SM5_CONTROL_POINT_COUNT_MASK)
4605 >> VKD3D_SM5_CONTROL_POINT_COUNT_SHIFT;
4606 }
4607 break;
4608 default:
4609 ++tpf->stat->fields[stat_field];
4610 }
4611}
sm4_instruction::idx
uint32_t idx[3]
Definition: tpf.c:4092
sm4_instruction::opcode
enum vkd3d_sm4_opcode opcode
Definition: tpf.c:4078
tpf_compiler::stat
struct sm4_stat * stat
Definition: tpf.c:1414
vkd3d_sm4_stat_field
vkd3d_sm4_stat_field
Definition: tpf.c:621
get_stat_field_from_sm4_opcode
static enum vkd3d_sm4_stat_field get_stat_field_from_sm4_opcode(const struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_sm4_opcode sm4_opcode)
Definition: tpf.c:1980

Referenced by write_sm4_instruction().

◆ sm4_write_dst_register()

static void sm4_write_dst_register ( const struct tpf_compiler *  tpf,
const struct vkd3d_shader_dst_param *  dst 
)
static

Definition at line 4494 of file tpf.c.

4495{
4496 struct vkd3d_bytecode_buffer *buffer = tpf->buffer;
4497 uint32_t token = 0;
4498 unsigned int j;
4499
4500 token = sm4_encode_register(tpf, &dst->reg, VKD3D_SM4_SWIZZLE_NONE, dst->write_mask);
4501 put_u32(buffer, token);
4502
4503 for (j = 0; j < dst->reg.idx_count; ++j)
4504 sm4_write_register_index(tpf, &dst->reg, j);
4505}
put_u32
static void put_u32(struct bytecode_buffer *buffer, uint32_t value)
Definition: bytecodewriter.c:405
tpf_compiler::buffer
struct vkd3d_bytecode_buffer * buffer
Definition: tpf.c:1418
vkd3d_bytecode_buffer
Definition: vkd3d_shader_private.h:1553
sm4_encode_register
static uint32_t sm4_encode_register(const struct tpf_compiler *tpf, const struct vkd3d_shader_register *reg, enum vkd3d_sm4_swizzle_type sm4_swizzle_type, uint32_t sm4_swizzle)
Definition: tpf.c:4404
sm4_write_register_index
static void sm4_write_register_index(const struct tpf_compiler *tpf, const struct vkd3d_shader_register *reg, unsigned int j)
Definition: tpf.c:4464

Referenced by write_sm4_instruction().

◆ sm4_write_register_index()

static void sm4_write_register_index ( const struct tpf_compiler *  tpf,
const struct vkd3d_shader_register *  reg,
unsigned int  j 
)
static

Definition at line 4464 of file tpf.c.

4466{
4467 unsigned int addressing = sm4_get_index_addressing_from_reg(reg, j);
4468 struct vkd3d_bytecode_buffer *buffer = tpf->buffer;
4469 unsigned int k;
4470
4471 if (addressing & VKD3D_SM4_ADDRESSING_RELATIVE)
4472 {
4473 const struct vkd3d_shader_src_param *idx_src = reg->idx[j].rel_addr;
4474 uint32_t idx_src_token;
4475
4476 VKD3D_ASSERT(idx_src);
4477 VKD3D_ASSERT(!idx_src->modifiers);
4478 VKD3D_ASSERT(idx_src->reg.type != VKD3DSPR_IMMCONST);
4479 idx_src_token = sm4_encode_register(tpf, &idx_src->reg, VKD3D_SM4_SWIZZLE_SCALAR, idx_src->swizzle);
4480
4481 put_u32(buffer, idx_src_token);
4482 for (k = 0; k < idx_src->reg.idx_count; ++k)
4483 {
4484 put_u32(buffer, idx_src->reg.idx[k].offset);
4485 VKD3D_ASSERT(!idx_src->reg.idx[k].rel_addr);
4486 }
4487 }
4488 else
4489 {
4490 put_u32(tpf->buffer, reg->idx[j].offset);
4491 }
4492}

Referenced by sm4_write_dst_register(), and sm4_write_src_register().

◆ sm4_write_src_register()

static void sm4_write_src_register ( const struct tpf_compiler *  tpf,
const struct vkd3d_shader_src_param *  src 
)
static

Definition at line 4507 of file tpf.c.

4508{
4509 struct vkd3d_bytecode_buffer *buffer = tpf->buffer;
4510 uint32_t token = 0, mod_token = 0;
4511 unsigned int j;
4512
4513 token = sm4_encode_register(tpf, &src->reg, VKD3D_SM4_SWIZZLE_DEFAULT, swizzle_to_sm4(src->swizzle));
4514
4515 switch (src->modifiers)
4516 {
4517 case VKD3DSPSM_NONE:
4518 mod_token = VKD3D_SM4_REGISTER_MODIFIER_NONE;
4519 break;
4520
4521 case VKD3DSPSM_ABS:
4522 mod_token = (VKD3D_SM4_REGISTER_MODIFIER_ABS << VKD3D_SM4_REGISTER_MODIFIER_SHIFT)
4523 | VKD3D_SM4_EXTENDED_OPERAND_MODIFIER;
4524 break;
4525
4526 case VKD3DSPSM_NEG:
4527 mod_token = (VKD3D_SM4_REGISTER_MODIFIER_NEGATE << VKD3D_SM4_REGISTER_MODIFIER_SHIFT)
4528 | VKD3D_SM4_EXTENDED_OPERAND_MODIFIER;
4529 break;
4530
4531 case VKD3DSPSM_ABSNEG:
4532 mod_token = (VKD3D_SM4_REGISTER_MODIFIER_ABS_NEGATE << VKD3D_SM4_REGISTER_MODIFIER_SHIFT)
4533 | VKD3D_SM4_EXTENDED_OPERAND_MODIFIER;
4534 break;
4535
4536 default:
4537 ERR("Unhandled register modifier %#x.\n", src->modifiers);
4538 vkd3d_unreachable();
4539 break;
4540 }
4541
4542 if (src->modifiers)
4543 {
4544 token |= VKD3D_SM4_EXTENDED_OPERAND;
4545 put_u32(buffer, token);
4546 put_u32(buffer, mod_token);
4547 }
4548 else
4549 {
4550 put_u32(buffer, token);
4551 }
4552
4553 for (j = 0; j < src->reg.idx_count; ++j)
4554 sm4_write_register_index(tpf, &src->reg, j);
4555
4556 if (src->reg.type == VKD3DSPR_IMMCONST)
4557 {
4558 put_u32(buffer, src->reg.u.immconst_u32[0]);
4559 if (src->reg.dimension == VSIR_DIMENSION_VEC4)
4560 {
4561 put_u32(buffer, src->reg.u.immconst_u32[1]);
4562 put_u32(buffer, src->reg.u.immconst_u32[2]);
4563 put_u32(buffer, src->reg.u.immconst_u32[3]);
4564 }
4565 }
4566}
swizzle_to_sm4
static uint32_t swizzle_to_sm4(uint32_t s)
Definition: tpf.c:2263

Referenced by write_sm4_instruction().

◆ STATIC_ASSERT()

STATIC_ASSERT ( SM4_MAX_SRC_COUNT<=  SPIRV_MAX_SRC_COUNT)

◆ string_skip_tag()

static const char * string_skip_tag ( const char *  string)
static

Definition at line 3556 of file tpf.c.

3557{
3558 if (!strncmp(string, "<resource>", strlen("<resource>")))
3559 return string + strlen("<resource>");
3560 return string;
3561}
strlen
_ACRTIMP size_t __cdecl strlen(const char *)
Definition: string.c:1597
strncmp
_ACRTIMP int __cdecl strncmp(const char *, const char *, size_t)
Definition: string.c:3335
string
char string[160]
Definition: util.h:11

Referenced by sm4_get_extern_resources().

◆ swizzle_from_sm4()

static uint32_t swizzle_from_sm4 ( uint32_t  s)
static

Definition at line 2258 of file tpf.c.

2259{
2260 return vkd3d_shader_create_swizzle(s & 0x3, (s >> 2) & 0x3, (s >> 4) & 0x3, (s >> 6) & 0x3);
2261}
s
GLdouble s
Definition: gl.h:2039
vkd3d_shader_create_swizzle
static uint32_t vkd3d_shader_create_swizzle(enum vkd3d_shader_swizzle_component x, enum vkd3d_shader_swizzle_component y, enum vkd3d_shader_swizzle_component z, enum vkd3d_shader_swizzle_component w)
Definition: vkd3d_shader.h:2268

Referenced by shader_sm4_read_dst_param(), shader_sm4_read_src_param(), sm4_numeric_register_from_deref(), sm4_src_from_deref(), sm4_src_from_node(), and write_sm4_swizzle().

◆ swizzle_to_sm4()

static uint32_t swizzle_to_sm4 ( uint32_t  s)
static

Definition at line 2263 of file tpf.c.

2264{
2265 uint32_t ret = 0;
2266 ret |= ((vsir_swizzle_get_component(s, 0)) & 0x3);
2267 ret |= ((vsir_swizzle_get_component(s, 1)) & 0x3) << 2;
2268 ret |= ((vsir_swizzle_get_component(s, 2)) & 0x3) << 4;
2269 ret |= ((vsir_swizzle_get_component(s, 3)) & 0x3) << 6;
2270 return ret;
2271}

Referenced by sm4_write_src_register().

◆ tpf_compile()

int tpf_compile ( struct vsir_program *  program,
uint64_t  config_flags,
struct vkd3d_shader_code *  out,
struct vkd3d_shader_message_context *  message_context,
struct hlsl_ctx *  ctx,
struct hlsl_ir_function_decl *  entry_func 
)

Definition at line 6046 of file tpf.c.

6049{
6050 enum vkd3d_shader_type shader_type = program->shader_version.type;
6051 struct tpf_compiler tpf = {0};
6052 struct sm4_stat stat = {0};
6053 size_t i;
6054 int ret;
6055
6056 tpf.ctx = ctx;
6057 tpf.program = program;
6058 tpf.buffer = NULL;
6059 tpf.stat = &stat;
6060 init_sm4_lookup_tables(&tpf.lookup);
6061 dxbc_writer_init(&tpf.dxbc);
6062
6063 tpf_write_signature(&tpf, &program->input_signature, TAG_ISGN);
6064 tpf_write_signature(&tpf, &program->output_signature, TAG_OSGN);
6065 if (shader_type == VKD3D_SHADER_TYPE_HULL || shader_type == VKD3D_SHADER_TYPE_DOMAIN)
6066 tpf_write_signature(&tpf, &program->patch_constant_signature, TAG_PCSG);
6067 write_sm4_rdef(ctx, &tpf.dxbc);
6068 tpf_write_shdr(&tpf, entry_func);
6069 tpf_write_sfi0(&tpf);
6070 tpf_write_stat(&tpf);
6071
6072 ret = VKD3D_OK;
6073 if (ctx->result)
6074 ret = ctx->result;
6075 if (tpf.result)
6076 ret = tpf.result;
6077
6078 if (!ret)
6079 ret = dxbc_writer_write(&tpf.dxbc, out);
6080 for (i = 0; i < tpf.dxbc.section_count; ++i)
6081 vkd3d_shader_free_shader_code(&tpf.dxbc.sections[i].data);
6082 return ret;
6083}
stat
#define stat
Definition: acwin.h:100
TAG_ISGN
#define TAG_ISGN
Definition: d3dcompiler_private.h:527
TAG_OSGN
#define TAG_OSGN
Definition: d3dcompiler_private.h:528
TAG_PCSG
#define TAG_PCSG
Definition: d3dcompiler_private.h:530
dxbc_writer_write
int dxbc_writer_write(struct dxbc_writer *dxbc, struct vkd3d_shader_code *out)
Definition: dxbc.c:100
dxbc_writer_init
void dxbc_writer_init(struct dxbc_writer *dxbc)
Definition: dxbc.c:36
sm4_stat
Definition: tpf.c:1404
stat
Definition: stat.h:66
tpf_compiler
Definition: tpf.c:1409
tpf_compiler::result
int result
Definition: tpf.c:1416
tpf_compiler::dxbc
struct dxbc_writer dxbc
Definition: tpf.c:1419
tpf_write_stat
static void tpf_write_stat(struct tpf_compiler *tpf)
Definition: tpf.c:5992
tpf_write_signature
static void tpf_write_signature(struct tpf_compiler *tpf, const struct shader_signature *signature, uint32_t tag)
Definition: tpf.c:3245
tpf_write_shdr
static void tpf_write_shdr(struct tpf_compiler *tpf, struct hlsl_ir_function_decl *entry_func)
Definition: tpf.c:5861
write_sm4_rdef
static void write_sm4_rdef(struct hlsl_ctx *ctx, struct dxbc_writer *dxbc)
Definition: tpf.c:3773
tpf_write_sfi0
static void tpf_write_sfi0(struct tpf_compiler *tpf)
Definition: tpf.c:5966
vkd3d_shader_free_shader_code
VKD3D_SHADER_API void vkd3d_shader_free_shader_code(struct vkd3d_shader_code *code)
Definition: vkd3d_shader_main.c:1784
VKD3D_OK
@ VKD3D_OK
Definition: vkd3d_types.h:43
out
wchar_t tm const _CrtWcstime_Writes_and_advances_ptr_ count wchar_t ** out
Definition: wcsftime.cpp:383

Referenced by hlsl_emit_bytecode().

◆ tpf_dcl_indexable_temp()

static void tpf_dcl_indexable_temp ( const struct tpf_compiler *  tpf,
const struct vkd3d_shader_indexable_temp *  temp 
)
static

Definition at line 4866 of file tpf.c.

4867{
4868 struct sm4_instruction instr =
4869 {
4870 .opcode = VKD3D_SM4_OP_DCL_INDEXABLE_TEMP,
4871
4872 .idx = {temp->register_idx, temp->register_size, temp->component_count},
4873 .idx_count = 3,
4874 };
4875
4876 write_sm4_instruction(tpf, &instr);
4877}
temp
static calc_node_t temp
Definition: rpn_ieee.c:38
sm4_instruction
Definition: tpf.c:4077
write_sm4_instruction
static void write_sm4_instruction(const struct tpf_compiler *tpf, const struct sm4_instruction *instr)
Definition: tpf.c:4613

Referenced by tpf_handle_instruction().

◆ tpf_dcl_semantic()

static void tpf_dcl_semantic ( const struct tpf_compiler *  tpf,
enum vkd3d_sm4_opcode  opcode,
const struct vkd3d_shader_dst_param *  dst,
uint32_t  interpolation_flags 
)
static

Definition at line 4879 of file tpf.c.

4881{
4882 struct sm4_instruction instr =
4883 {
4884 .opcode = opcode,
4885
4886 .dsts[0] = *dst,
4887 .dst_count = 1,
4888
4889 .extra_bits = interpolation_flags << VKD3D_SM4_INTERPOLATION_MODE_SHIFT,
4890 };
4891
4892 write_sm4_instruction(tpf, &instr);
4893}

Referenced by tpf_handle_instruction().

◆ tpf_dcl_siv_semantic()

static void tpf_dcl_siv_semantic ( const struct tpf_compiler *  tpf,
enum vkd3d_sm4_opcode  opcode,
const struct vkd3d_shader_register_semantic *  semantic,
uint32_t  interpolation_flags 
)
static

Definition at line 4895 of file tpf.c.

4897{
4898 struct sm4_instruction instr =
4899 {
4900 .opcode = opcode,
4901
4902 .dsts[0] = semantic->reg,
4903 .dst_count = 1,
4904
4905 .idx[0] = semantic->sysval_semantic,
4906 .idx_count = 1,
4907
4908 .extra_bits = interpolation_flags << VKD3D_SM4_INTERPOLATION_MODE_SHIFT,
4909 };
4910
4911 write_sm4_instruction(tpf, &instr);
4912}
vkd3d_shader_register_semantic::reg
struct vkd3d_shader_dst_param reg
Definition: vkd3d_shader_private.h:1138
vkd3d_shader_register_semantic::sysval_semantic
enum vkd3d_shader_input_sysval_semantic sysval_semantic
Definition: vkd3d_shader_private.h:1139

Referenced by tpf_handle_instruction().

◆ tpf_dcl_temps()

static void tpf_dcl_temps ( const struct tpf_compiler *  tpf,
unsigned int  count 
)
static

Definition at line 4853 of file tpf.c.

4854{
4855 struct sm4_instruction instr =
4856 {
4857 .opcode = VKD3D_SM4_OP_DCL_TEMPS,
4858
4859 .idx = {count},
4860 .idx_count = 1,
4861 };
4862
4863 write_sm4_instruction(tpf, &instr);
4864}

Referenced by tpf_handle_instruction().

◆ tpf_dcl_thread_group()

static void tpf_dcl_thread_group ( const struct tpf_compiler *  tpf,
const struct vsir_thread_group_size *  group_size 
)
static

Definition at line 4914 of file tpf.c.

4915{
4916 struct sm4_instruction instr =
4917 {
4918 .opcode = VKD3D_SM5_OP_DCL_THREAD_GROUP,
4919
4920 .idx = {group_size->x, group_size->y, group_size->z},
4921 .idx_count = 3,
4922 };
4923
4924 write_sm4_instruction(tpf, &instr);
4925}
vsir_thread_group_size::y
unsigned int y
Definition: vkd3d_shader_private.h:1191
vsir_thread_group_size::x
unsigned int x
Definition: vkd3d_shader_private.h:1191
vsir_thread_group_size::z
unsigned int z
Definition: vkd3d_shader_private.h:1191

Referenced by tpf_write_shader_function().

◆ tpf_handle_instruction()

static void tpf_handle_instruction ( struct tpf_compiler *  tpf,
const struct vkd3d_shader_instruction *  ins 
)
static

Definition at line 5661 of file tpf.c.

5662{
5663 switch (ins->opcode)
5664 {
5665 case VKD3DSIH_DCL_TEMPS:
5666 tpf_dcl_temps(tpf, ins->declaration.count);
5667 break;
5668
5669 case VKD3DSIH_DCL_INDEXABLE_TEMP:
5670 tpf_dcl_indexable_temp(tpf, &ins->declaration.indexable_temp);
5671 break;
5672
5673 case VKD3DSIH_DCL_INPUT:
5674 tpf_dcl_semantic(tpf, VKD3D_SM4_OP_DCL_INPUT, &ins->declaration.dst, 0);
5675 break;
5676
5677 case VKD3DSIH_DCL_INPUT_PS:
5678 tpf_dcl_semantic(tpf, VKD3D_SM4_OP_DCL_INPUT_PS, &ins->declaration.dst, ins->flags);
5679 break;
5680
5681 case VKD3DSIH_DCL_INPUT_PS_SGV:
5682 tpf_dcl_siv_semantic(tpf, VKD3D_SM4_OP_DCL_INPUT_PS_SGV, &ins->declaration.register_semantic, 0);
5683 break;
5684
5685 case VKD3DSIH_DCL_INPUT_PS_SIV:
5686 tpf_dcl_siv_semantic(tpf, VKD3D_SM4_OP_DCL_INPUT_PS_SIV, &ins->declaration.register_semantic, ins->flags);
5687 break;
5688
5689 case VKD3DSIH_DCL_INPUT_SGV:
5690 tpf_dcl_siv_semantic(tpf, VKD3D_SM4_OP_DCL_INPUT_SGV, &ins->declaration.register_semantic, 0);
5691 break;
5692
5693 case VKD3DSIH_DCL_INPUT_SIV:
5694 tpf_dcl_siv_semantic(tpf, VKD3D_SM4_OP_DCL_INPUT_SIV, &ins->declaration.register_semantic, 0);
5695 break;
5696
5697 case VKD3DSIH_DCL_OUTPUT:
5698 tpf_dcl_semantic(tpf, VKD3D_SM4_OP_DCL_OUTPUT, &ins->declaration.dst, 0);
5699 break;
5700
5701 case VKD3DSIH_DCL_OUTPUT_SIV:
5702 tpf_dcl_siv_semantic(tpf, VKD3D_SM4_OP_DCL_OUTPUT_SIV, &ins->declaration.register_semantic, 0);
5703 break;
5704
5705 case VKD3DSIH_ADD:
5706 case VKD3DSIH_AND:
5707 case VKD3DSIH_DIV:
5708 case VKD3DSIH_DP2:
5709 case VKD3DSIH_DP3:
5710 case VKD3DSIH_DP4:
5711 case VKD3DSIH_DSX:
5712 case VKD3DSIH_DSX_COARSE:
5713 case VKD3DSIH_DSX_FINE:
5714 case VKD3DSIH_DSY:
5715 case VKD3DSIH_DSY_COARSE:
5716 case VKD3DSIH_DSY_FINE:
5717 case VKD3DSIH_EQO:
5718 case VKD3DSIH_EXP:
5719 case VKD3DSIH_F16TOF32:
5720 case VKD3DSIH_F32TOF16:
5721 case VKD3DSIH_FRC:
5722 case VKD3DSIH_FTOI:
5723 case VKD3DSIH_FTOU:
5724 case VKD3DSIH_GEO:
5725 case VKD3DSIH_IADD:
5726 case VKD3DSIH_IEQ:
5727 case VKD3DSIH_IGE:
5728 case VKD3DSIH_ILT:
5729 case VKD3DSIH_IMAD:
5730 case VKD3DSIH_IMAX:
5731 case VKD3DSIH_IMIN:
5732 case VKD3DSIH_IMUL:
5733 case VKD3DSIH_INE:
5734 case VKD3DSIH_INEG:
5735 case VKD3DSIH_ISHL:
5736 case VKD3DSIH_ISHR:
5737 case VKD3DSIH_ITOF:
5738 case VKD3DSIH_LOG:
5739 case VKD3DSIH_LTO:
5740 case VKD3DSIH_MAD:
5741 case VKD3DSIH_MAX:
5742 case VKD3DSIH_MIN:
5743 case VKD3DSIH_MOV:
5744 case VKD3DSIH_MOVC:
5745 case VKD3DSIH_MUL:
5746 case VKD3DSIH_NEU:
5747 case VKD3DSIH_NOT:
5748 case VKD3DSIH_OR:
5749 case VKD3DSIH_RCP:
5750 case VKD3DSIH_ROUND_NE:
5751 case VKD3DSIH_ROUND_NI:
5752 case VKD3DSIH_ROUND_PI:
5753 case VKD3DSIH_ROUND_Z:
5754 case VKD3DSIH_RSQ:
5755 case VKD3DSIH_SAMPLE_INFO:
5756 case VKD3DSIH_SINCOS:
5757 case VKD3DSIH_SQRT:
5758 case VKD3DSIH_UDIV:
5759 case VKD3DSIH_UGE:
5760 case VKD3DSIH_ULT:
5761 case VKD3DSIH_UMAX:
5762 case VKD3DSIH_UMIN:
5763 case VKD3DSIH_USHR:
5764 case VKD3DSIH_UTOF:
5765 case VKD3DSIH_XOR:
5766 tpf_simple_instruction(tpf, ins);
5767 break;
5768
5769 default:
5770 vkd3d_unreachable();
5771 break;
5772 }
5773}
tpf_dcl_temps
static void tpf_dcl_temps(const struct tpf_compiler *tpf, unsigned int count)
Definition: tpf.c:4853
tpf_dcl_indexable_temp
static void tpf_dcl_indexable_temp(const struct tpf_compiler *tpf, const struct vkd3d_shader_indexable_temp *temp)
Definition: tpf.c:4866
tpf_dcl_semantic
static void tpf_dcl_semantic(const struct tpf_compiler *tpf, enum vkd3d_sm4_opcode opcode, const struct vkd3d_shader_dst_param *dst, uint32_t interpolation_flags)
Definition: tpf.c:4879
tpf_simple_instruction
static void tpf_simple_instruction(struct tpf_compiler *tpf, const struct vkd3d_shader_instruction *ins)
Definition: tpf.c:5611
tpf_dcl_siv_semantic
static void tpf_dcl_siv_semantic(const struct tpf_compiler *tpf, enum vkd3d_sm4_opcode opcode, const struct vkd3d_shader_register_semantic *semantic, uint32_t interpolation_flags)
Definition: tpf.c:4895

Referenced by write_sm4_block().

◆ tpf_parse()

int tpf_parse ( const struct vkd3d_shader_compile_info *  compile_info,
uint64_t  config_flags,
struct vkd3d_shader_message_context *  message_context,
struct vsir_program *  program 
)

Definition at line 2900 of file tpf.c.

2902{
2903 struct vkd3d_shader_instruction_array *instructions;
2904 struct vkd3d_shader_sm4_parser sm4 = {0};
2905 struct dxbc_shader_desc dxbc_desc = {0};
2906 struct vkd3d_shader_instruction *ins;
2907 int ret;
2908
2909 dxbc_desc.is_dxil = false;
2910 if ((ret = shader_extract_from_dxbc(&compile_info->source,
2911 message_context, compile_info->source_name, &dxbc_desc)) < 0)
2912 {
2913 WARN("Failed to extract shader, vkd3d result %d.\n", ret);
2914 return ret;
2915 }
2916
2917 if (!shader_sm4_init(&sm4, program, dxbc_desc.byte_code, dxbc_desc.byte_code_size,
2918 compile_info, message_context))
2919 {
2920 WARN("Failed to initialise shader parser.\n");
2921 free_dxbc_shader_desc(&dxbc_desc);
2922 return VKD3D_ERROR_INVALID_ARGUMENT;
2923 }
2924
2925 program->input_signature = dxbc_desc.input_signature;
2926 program->output_signature = dxbc_desc.output_signature;
2927 program->patch_constant_signature = dxbc_desc.patch_constant_signature;
2928 memset(&dxbc_desc, 0, sizeof(dxbc_desc));
2929
2930 /* DXBC stores used masks inverted for output signatures, for some reason.
2931 * We return them un-inverted. */
2932 uninvert_used_masks(&program->output_signature);
2933 if (program->shader_version.type == VKD3D_SHADER_TYPE_HULL)
2934 uninvert_used_masks(&program->patch_constant_signature);
2935
2936 switch (program->shader_version.type)
2937 {
2938 case VKD3D_SHADER_TYPE_HULL:
2939 case VKD3D_SHADER_TYPE_DOMAIN:
2940 break;
2941
2942 default:
2943 if (program->patch_constant_signature.element_count != 0)
2944 {
2945 WARN("The patch constant signature only makes sense for Hull and Domain Shaders, ignoring it.\n");
2946 shader_signature_cleanup(&program->patch_constant_signature);
2947 }
2948 break;
2949 }
2950
2951 if (!shader_sm4_parser_validate_signature(&sm4, &program->input_signature,
2952 sm4.input_register_masks, "Input")
2953 || !shader_sm4_parser_validate_signature(&sm4, &program->output_signature,
2954 sm4.output_register_masks, "Output")
2955 || !shader_sm4_parser_validate_signature(&sm4, &program->patch_constant_signature,
2956 sm4.patch_constant_register_masks, "Patch constant"))
2957 {
2958 vsir_program_cleanup(program);
2959 return VKD3D_ERROR_INVALID_SHADER;
2960 }
2961
2962 instructions = &program->instructions;
2963 while (sm4.ptr != sm4.end)
2964 {
2965 if (!shader_instruction_array_reserve(instructions, instructions->count + 1))
2966 {
2967 ERR("Failed to allocate instructions.\n");
2968 vkd3d_shader_parser_error(&sm4.p, VKD3D_SHADER_ERROR_TPF_OUT_OF_MEMORY, "Out of memory.");
2969 vsir_program_cleanup(program);
2970 return VKD3D_ERROR_OUT_OF_MEMORY;
2971 }
2972 ins = &instructions->elements[instructions->count];
2973 shader_sm4_read_instruction(&sm4, ins);
2974
2975 if (ins->opcode == VKD3DSIH_INVALID)
2976 {
2977 WARN("Encountered unrecognized or invalid instruction.\n");
2978 vsir_program_cleanup(program);
2979 return VKD3D_ERROR_OUT_OF_MEMORY;
2980 }
2981 ++instructions->count;
2982 }
2983 if (program->shader_version.type == VKD3D_SHADER_TYPE_HULL
2984 && !sm4.has_control_point_phase && !sm4.p.failed)
2985 shader_sm4_validate_default_phase_index_ranges(&sm4);
2986
2987 if (sm4.p.failed)
2988 {
2989 vsir_program_cleanup(program);
2990 return VKD3D_ERROR_INVALID_SHADER;
2991 }
2992
2993 return VKD3D_OK;
2994}
shader_extract_from_dxbc
int shader_extract_from_dxbc(const struct vkd3d_shader_code *dxbc, struct vkd3d_shader_message_context *message_context, const char *source_name, struct dxbc_shader_desc *desc)
Definition: dxbc.c:580
free_dxbc_shader_desc
void free_dxbc_shader_desc(struct dxbc_shader_desc *desc)
Definition: dxbc.c:573
vsir_program_cleanup
void vsir_program_cleanup(struct vsir_program *program)
Definition: ir.c:105
dxbc_shader_desc
Definition: vkd3d_shader_private.h:1127
dxbc_shader_desc::byte_code
const uint32_t * byte_code
Definition: vkd3d_shader_private.h:1128
dxbc_shader_desc::is_dxil
bool is_dxil
Definition: vkd3d_shader_private.h:1130
dxbc_shader_desc::input_signature
struct shader_signature input_signature
Definition: vkd3d_shader_private.h:1131
dxbc_shader_desc::patch_constant_signature
struct shader_signature patch_constant_signature
Definition: vkd3d_shader_private.h:1133
dxbc_shader_desc::byte_code_size
size_t byte_code_size
Definition: vkd3d_shader_private.h:1129
dxbc_shader_desc::output_signature
struct shader_signature output_signature
Definition: vkd3d_shader_private.h:1132
vkd3d_shader_compile_info::source
struct vkd3d_shader_code source
Definition: vkd3d_shader.h:1307
vkd3d_shader_instruction_array
Definition: vkd3d_shader_private.h:1366
vkd3d_shader_instruction_array::count
size_t count
Definition: vkd3d_shader_private.h:1369
vkd3d_shader_instruction_array::elements
struct vkd3d_shader_instruction * elements
Definition: vkd3d_shader_private.h:1367
vkd3d_shader_instruction
Definition: vkd3d_shader_private.h:1238
vkd3d_shader_sm4_parser
Definition: tpf.c:684
uninvert_used_masks
static void uninvert_used_masks(struct shader_signature *signature)
Definition: tpf.c:2829
shader_sm4_validate_default_phase_index_ranges
static void shader_sm4_validate_default_phase_index_ranges(struct vkd3d_shader_sm4_parser *sm4)
Definition: tpf.c:2877
shader_sm4_read_instruction
static void shader_sm4_read_instruction(struct vkd3d_shader_sm4_parser *sm4, struct vkd3d_shader_instruction *ins)
Definition: tpf.c:2616
shader_sm4_init
static bool shader_sm4_init(struct vkd3d_shader_sm4_parser *sm4, struct vsir_program *program, const uint32_t *byte_code, size_t byte_code_size, const struct vkd3d_shader_compile_info *compile_info, struct vkd3d_shader_message_context *message_context)
Definition: tpf.c:2758
shader_sm4_parser_validate_signature
static bool shader_sm4_parser_validate_signature(struct vkd3d_shader_sm4_parser *sm4, const struct shader_signature *signature, unsigned int *masks, const char *name)
Definition: tpf.c:2839
shader_signature_cleanup
void shader_signature_cleanup(struct shader_signature *signature)
Definition: vkd3d_shader_main.c:1846
shader_instruction_array_reserve
bool shader_instruction_array_reserve(struct vkd3d_shader_instruction_array *instructions, unsigned int reserve)
Definition: vkd3d_shader_main.c:2143
VKD3D_ERROR_INVALID_ARGUMENT
@ VKD3D_ERROR_INVALID_ARGUMENT
Definition: vkd3d_types.h:51
VKD3D_ERROR_INVALID_SHADER
@ VKD3D_ERROR_INVALID_SHADER
Definition: vkd3d_types.h:53
VKD3D_ERROR_OUT_OF_MEMORY
@ VKD3D_ERROR_OUT_OF_MEMORY
Definition: vkd3d_types.h:49

Referenced by hlsl_compile_shader(), and vsir_parse().

◆ tpf_simple_instruction()

static void tpf_simple_instruction ( struct tpf_compiler *  tpf,
const struct vkd3d_shader_instruction *  ins 
)
static

Definition at line 5611 of file tpf.c.

5612{
5613 const struct vkd3d_sm4_opcode_info *info;
5614 struct sm4_instruction instr = {0};
5615 unsigned int dst_count, src_count;
5616
5617 info = get_info_from_vsir_opcode(&tpf->lookup, ins->opcode);
5618 VKD3D_ASSERT(info);
5619
5620 dst_count = opcode_info_get_dst_count(info);
5621 src_count = opcode_info_get_src_count(info);
5622
5623 if (ins->dst_count != dst_count)
5624 {
5625 ERR("Invalid destination count %u for vsir instruction %#x (expected %u).\n",
5626 ins->dst_count, ins->opcode, dst_count);
5627 tpf->result = VKD3D_ERROR_INVALID_SHADER;
5628 return;
5629 }
5630 if (ins->src_count != src_count)
5631 {
5632 ERR("Invalid source count %u for vsir instruction %#x (expected %u).\n",
5633 ins->src_count, ins->opcode, src_count);
5634 tpf->result = VKD3D_ERROR_INVALID_SHADER;
5635 return;
5636 }
5637
5638 instr.opcode = info->opcode;
5639 instr.extra_bits = ins->flags << VKD3D_SM4_INSTRUCTION_FLAGS_SHIFT;
5640 instr.dst_count = ins->dst_count;
5641 instr.src_count = ins->src_count;
5642
5643 for (unsigned int i = 0; i < ins->dst_count; ++i)
5644 {
5645 instr.dsts[i] = ins->dst[i];
5646
5647 if (instr.dsts[i].modifiers & VKD3DSPDM_SATURATE)
5648 {
5649 /* For vsir SATURATE is a dst modifier, while for tpf it is an instruction flag. */
5650 VKD3D_ASSERT(ins->dst_count == 1);
5651 instr.dsts[i].modifiers &= ~VKD3DSPDM_SATURATE;
5652 instr.extra_bits |= VKD3D_SM4_INSTRUCTION_FLAG_SATURATE << VKD3D_SM4_INSTRUCTION_FLAGS_SHIFT;
5653 }
5654 }
5655 for (unsigned int i = 0; i < ins->src_count; ++i)
5656 instr.srcs[i] = ins->src[i];
5657
5658 write_sm4_instruction(tpf, &instr);
5659}
sm4_instruction::dsts
struct vkd3d_shader_dst_param dsts[2]
Definition: tpf.c:4084
sm4_instruction::src_count
unsigned int src_count
Definition: tpf.c:4088
sm4_instruction::dst_count
unsigned int dst_count
Definition: tpf.c:4085
sm4_instruction::extra_bits
uint32_t extra_bits
Definition: tpf.c:4079
sm4_instruction::srcs
struct vkd3d_shader_src_param srcs[5]
Definition: tpf.c:4087
get_info_from_vsir_opcode
static const struct vkd3d_sm4_opcode_info * get_info_from_vsir_opcode(const struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_shader_opcode vsir_opcode)
Definition: tpf.c:1936

Referenced by tpf_handle_instruction().

◆ tpf_write_dcl_input_control_point_count()

static void tpf_write_dcl_input_control_point_count ( const struct tpf_compiler *  tpf,
const uint32_t  count 
)
static

Definition at line 4968 of file tpf.c.

4969{
4970 struct sm4_instruction instr =
4971 {
4972 .opcode = VKD3D_SM5_OP_DCL_INPUT_CONTROL_POINT_COUNT,
4973 .extra_bits = count << VKD3D_SM5_CONTROL_POINT_COUNT_SHIFT,
4974 };
4975
4976 write_sm4_instruction(tpf, &instr);
4977}

Referenced by tpf_write_shdr().

◆ tpf_write_dcl_output_control_point_count()

static void tpf_write_dcl_output_control_point_count ( const struct tpf_compiler *  tpf,
const uint32_t  count 
)
static

Definition at line 4979 of file tpf.c.

4980{
4981 struct sm4_instruction instr =
4982 {
4983 .opcode = VKD3D_SM5_OP_DCL_OUTPUT_CONTROL_POINT_COUNT,
4984 .extra_bits = count << VKD3D_SM5_CONTROL_POINT_COUNT_SHIFT,
4985 };
4986
4987 write_sm4_instruction(tpf, &instr);
4988}

Referenced by tpf_write_shdr().

◆ tpf_write_dcl_tessellator_domain()

static void tpf_write_dcl_tessellator_domain ( const struct tpf_compiler *  tpf,
enum vkd3d_tessellator_domain  domain 
)
static

Definition at line 4990 of file tpf.c.

4991{
4992 struct sm4_instruction instr =
4993 {
4994 .opcode = VKD3D_SM5_OP_DCL_TESSELLATOR_DOMAIN,
4995 .extra_bits = domain << VKD3D_SM5_TESSELLATOR_SHIFT,
4996 };
4997
4998 write_sm4_instruction(tpf, &instr);
4999}

Referenced by tpf_write_shdr().

◆ tpf_write_dcl_tessellator_output_primitive()

static void tpf_write_dcl_tessellator_output_primitive ( const struct tpf_compiler *  tpf,
enum vkd3d_shader_tessellator_output_primitive  output_primitive 
)
static

Definition at line 5013 of file tpf.c.

5015{
5016 struct sm4_instruction instr =
5017 {
5018 .opcode = VKD3D_SM5_OP_DCL_TESSELLATOR_OUTPUT_PRIMITIVE,
5019 .extra_bits = output_primitive << VKD3D_SM5_TESSELLATOR_SHIFT,
5020 };
5021
5022 write_sm4_instruction(tpf, &instr);
5023}

Referenced by tpf_write_shdr().

◆ tpf_write_dcl_tessellator_partitioning()

static void tpf_write_dcl_tessellator_partitioning ( const struct tpf_compiler *  tpf,
enum vkd3d_shader_tessellator_partitioning  partitioning 
)
static

Definition at line 5001 of file tpf.c.

5003{
5004 struct sm4_instruction instr =
5005 {
5006 .opcode = VKD3D_SM5_OP_DCL_TESSELLATOR_PARTITIONING,
5007 .extra_bits = partitioning << VKD3D_SM5_TESSELLATOR_SHIFT,
5008 };
5009
5010 write_sm4_instruction(tpf, &instr);
5011}

Referenced by tpf_write_shdr().

◆ tpf_write_hs_control_point_phase()

static void tpf_write_hs_control_point_phase ( const struct tpf_compiler *  tpf)
static

Definition at line 4948 of file tpf.c.

4949{
4950 struct sm4_instruction instr =
4951 {
4952 .opcode = VKD3D_SM5_OP_HS_CONTROL_POINT_PHASE,
4953 };
4954
4955 write_sm4_instruction(tpf, &instr);
4956}

Referenced by tpf_write_shdr().

◆ tpf_write_hs_decls()

static void tpf_write_hs_decls ( const struct tpf_compiler *  tpf)
static

Definition at line 4938 of file tpf.c.

4939{
4940 struct sm4_instruction instr =
4941 {
4942 .opcode = VKD3D_SM5_OP_HS_DECLS,
4943 };
4944
4945 write_sm4_instruction(tpf, &instr);
4946}

Referenced by tpf_write_shdr().

◆ tpf_write_hs_fork_phase()

static void tpf_write_hs_fork_phase ( const struct tpf_compiler *  tpf)
static

Definition at line 4958 of file tpf.c.

4959{
4960 struct sm4_instruction instr =
4961 {
4962 .opcode = VKD3D_SM5_OP_HS_FORK_PHASE,
4963 };
4964
4965 write_sm4_instruction(tpf, &instr);
4966}

Referenced by tpf_write_shdr().

◆ tpf_write_sfi0()

static void tpf_write_sfi0 ( struct tpf_compiler *  tpf)
static

Definition at line 5966 of file tpf.c.

5967{
5968 struct extern_resource *extern_resources;
5969 unsigned int extern_resources_count;
5970 struct hlsl_ctx *ctx = tpf->ctx;
5971 uint64_t *flags;
5972
5973 flags = vkd3d_calloc(1, sizeof(*flags));
5974
5975 extern_resources = sm4_get_extern_resources(ctx, &extern_resources_count);
5976 for (unsigned int i = 0; i < extern_resources_count; ++i)
5977 {
5978 if (extern_resources[i].component_type && extern_resources[i].component_type->e.resource.rasteriser_ordered)
5979 *flags |= VKD3D_SM4_REQUIRES_ROVS;
5980 }
5981 sm4_free_extern_resources(extern_resources, extern_resources_count);
5982
5983 /* FIXME: We also emit code that should require UAVS_AT_EVERY_STAGE,
5984 * STENCIL_REF, and TYPED_UAV_LOAD_ADDITIONAL_FORMATS. */
5985
5986 if (*flags)
5987 dxbc_writer_add_section(&tpf->dxbc, TAG_SFI0, flags, sizeof(*flags));
5988 else
5989 vkd3d_free(flags);
5990}
uint64_t
UINT64 uint64_t
Definition: types.h:77
flags
GLbitfield flags
Definition: glext.h:7161
VKD3D_SM4_REQUIRES_ROVS
#define VKD3D_SM4_REQUIRES_ROVS
Definition: tpf.c:181
sm4_get_extern_resources
static struct extern_resource * sm4_get_extern_resources(struct hlsl_ctx *ctx, unsigned int *count)
Definition: tpf.c:3563
TAG_SFI0
#define TAG_SFI0
Definition: vkd3d_common.h:82
vkd3d_calloc
static void * vkd3d_calloc(size_t count, size_t size)
Definition: vkd3d_memory.h:43

Referenced by tpf_compile().

◆ tpf_write_shader_function()

static void tpf_write_shader_function ( struct tpf_compiler *  tpf,
struct hlsl_ir_function_decl *  func 
)
static

Definition at line 5851 of file tpf.c.

5852{
5853 if (tpf->program->shader_version.type == VKD3D_SHADER_TYPE_COMPUTE)
5854 tpf_dcl_thread_group(tpf, &tpf->program->thread_group_size);
5855
5856 write_sm4_block(tpf, &func->body);
5857
5858 write_sm4_ret(tpf);
5859}
func
GLenum func
Definition: glext.h:6028
write_sm4_ret
static void write_sm4_ret(const struct tpf_compiler *tpf)
Definition: tpf.c:5025
tpf_dcl_thread_group
static void tpf_dcl_thread_group(const struct tpf_compiler *tpf, const struct vsir_thread_group_size *group_size)
Definition: tpf.c:4914
write_sm4_block
static void write_sm4_block(struct tpf_compiler *tpf, const struct hlsl_block *block)
Definition: tpf.c:5775

Referenced by tpf_write_shdr().

◆ tpf_write_shdr()

static void tpf_write_shdr ( struct tpf_compiler *  tpf,
struct hlsl_ir_function_decl *  entry_func 
)
static

Definition at line 5861 of file tpf.c.

5862{
5863 const struct vkd3d_shader_version *version = &tpf->program->shader_version;
5864 struct vkd3d_bytecode_buffer buffer = {0};
5865 struct extern_resource *extern_resources;
5866 unsigned int extern_resources_count, i;
5867 const struct hlsl_buffer *cbuffer;
5868 struct hlsl_ctx *ctx = tpf->ctx;
5869 size_t token_count_position;
5870 uint32_t global_flags = 0;
5871
5872 static const uint16_t shader_types[VKD3D_SHADER_TYPE_COUNT] =
5873 {
5874 VKD3D_SM4_PS,
5875 VKD3D_SM4_VS,
5876 VKD3D_SM4_GS,
5877 VKD3D_SM5_HS,
5878 VKD3D_SM5_DS,
5879 VKD3D_SM5_CS,
5880 0, /* EFFECT */
5881 0, /* TEXTURE */
5882 VKD3D_SM4_LIB,
5883 };
5884
5885 tpf->buffer = &buffer;
5886
5887 extern_resources = sm4_get_extern_resources(ctx, &extern_resources_count);
5888
5889 put_u32(&buffer, vkd3d_make_u32((version->major << 4) | version->minor, shader_types[version->type]));
5890 token_count_position = put_u32(&buffer, 0);
5891
5892 if (version->major == 4)
5893 {
5894 for (i = 0; i < extern_resources_count; ++i)
5895 {
5896 const struct extern_resource *resource = &extern_resources[i];
5897 const struct hlsl_type *type = resource->component_type;
5898
5899 if (type && type->class == HLSL_CLASS_TEXTURE && type->sampler_dim == HLSL_SAMPLER_DIM_RAW_BUFFER)
5900 {
5901 global_flags |= VKD3DSGF_ENABLE_RAW_AND_STRUCTURED_BUFFERS;
5902 break;
5903 }
5904 }
5905 }
5906
5907 if (entry_func->early_depth_test && vkd3d_shader_ver_ge(version, 5, 0))
5908 global_flags |= VKD3DSGF_FORCE_EARLY_DEPTH_STENCIL;
5909
5910 if (global_flags)
5911 write_sm4_dcl_global_flags(tpf, global_flags);
5912
5913 if (version->type == VKD3D_SHADER_TYPE_HULL)
5914 {
5915 tpf_write_hs_decls(tpf);
5916
5917 tpf_write_dcl_input_control_point_count(tpf, 1); /* TODO: Obtain from InputPatch */
5918 tpf_write_dcl_output_control_point_count(tpf, ctx->output_control_point_count);
5919 tpf_write_dcl_tessellator_domain(tpf, ctx->domain);
5920 tpf_write_dcl_tessellator_partitioning(tpf, ctx->partitioning);
5921 tpf_write_dcl_tessellator_output_primitive(tpf, ctx->output_primitive);
5922 }
5923 else if (version->type == VKD3D_SHADER_TYPE_DOMAIN)
5924 {
5925 tpf_write_dcl_input_control_point_count(tpf, 0); /* TODO: Obtain from OutputPatch */
5926 tpf_write_dcl_tessellator_domain(tpf, ctx->domain);
5927 }
5928
5929 LIST_FOR_EACH_ENTRY(cbuffer, &ctx->buffers, struct hlsl_buffer, entry)
5930 {
5931 if (cbuffer->reg.allocated)
5932 write_sm4_dcl_constant_buffer(tpf, cbuffer);
5933 }
5934
5935 for (i = 0; i < extern_resources_count; ++i)
5936 {
5937 const struct extern_resource *resource = &extern_resources[i];
5938
5939 if (resource->regset == HLSL_REGSET_SAMPLERS)
5940 write_sm4_dcl_samplers(tpf, resource);
5941 else if (resource->regset == HLSL_REGSET_TEXTURES)
5942 write_sm4_dcl_textures(tpf, resource, false);
5943 else if (resource->regset == HLSL_REGSET_UAVS)
5944 write_sm4_dcl_textures(tpf, resource, true);
5945 }
5946
5947 if (version->type == VKD3D_SHADER_TYPE_HULL)
5948 tpf_write_hs_control_point_phase(tpf);
5949
5950 tpf_write_shader_function(tpf, entry_func);
5951
5952 if (version->type == VKD3D_SHADER_TYPE_HULL)
5953 {
5954 tpf_write_hs_fork_phase(tpf);
5955 tpf_write_shader_function(tpf, ctx->patch_constant_func);
5956 }
5957
5958 set_u32(&buffer, token_count_position, bytecode_get_size(&buffer) / sizeof(uint32_t));
5959
5960 add_section(ctx, &tpf->dxbc, TAG_SHDR, &buffer);
5961 tpf->buffer = NULL;
5962
5963 sm4_free_extern_resources(extern_resources, extern_resources_count);
5964}
TAG_SHDR
#define TAG_SHDR
Definition: d3dcompiler_private.h:533
uint16_t
unsigned short uint16_t
Definition: stdint.h:35
hlsl_buffer::reg
struct hlsl_reg reg
Definition: hlsl.h:1011
hlsl_ir_function_decl::early_depth_test
bool early_depth_test
Definition: hlsl.h:619
tpf_write_dcl_tessellator_domain
static void tpf_write_dcl_tessellator_domain(const struct tpf_compiler *tpf, enum vkd3d_tessellator_domain domain)
Definition: tpf.c:4990
tpf_write_dcl_tessellator_partitioning
static void tpf_write_dcl_tessellator_partitioning(const struct tpf_compiler *tpf, enum vkd3d_shader_tessellator_partitioning partitioning)
Definition: tpf.c:5001
tpf_write_hs_control_point_phase
static void tpf_write_hs_control_point_phase(const struct tpf_compiler *tpf)
Definition: tpf.c:4948
write_sm4_dcl_global_flags
static void write_sm4_dcl_global_flags(const struct tpf_compiler *tpf, uint32_t flags)
Definition: tpf.c:4927
add_section
static void add_section(struct hlsl_ctx *ctx, struct dxbc_writer *dxbc, uint32_t tag, struct vkd3d_bytecode_buffer *buffer)
Definition: tpf.c:3220
write_sm4_dcl_textures
static void write_sm4_dcl_textures(const struct tpf_compiler *tpf, const struct extern_resource *resource, bool uav)
Definition: tpf.c:4756
VKD3D_SM4_LIB
#define VKD3D_SM4_LIB
Definition: tpf.c:39
tpf_write_shader_function
static void tpf_write_shader_function(struct tpf_compiler *tpf, struct hlsl_ir_function_decl *func)
Definition: tpf.c:5851
tpf_write_dcl_output_control_point_count
static void tpf_write_dcl_output_control_point_count(const struct tpf_compiler *tpf, const uint32_t count)
Definition: tpf.c:4979
tpf_write_dcl_input_control_point_count
static void tpf_write_dcl_input_control_point_count(const struct tpf_compiler *tpf, const uint32_t count)
Definition: tpf.c:4968
tpf_write_dcl_tessellator_output_primitive
static void tpf_write_dcl_tessellator_output_primitive(const struct tpf_compiler *tpf, enum vkd3d_shader_tessellator_output_primitive output_primitive)
Definition: tpf.c:5013
tpf_write_hs_decls
static void tpf_write_hs_decls(const struct tpf_compiler *tpf)
Definition: tpf.c:4938
write_sm4_dcl_constant_buffer
static void write_sm4_dcl_constant_buffer(const struct tpf_compiler *tpf, const struct hlsl_buffer *cbuffer)
Definition: tpf.c:4680
write_sm4_dcl_samplers
static void write_sm4_dcl_samplers(const struct tpf_compiler *tpf, const struct extern_resource *resource)
Definition: tpf.c:4715
tpf_write_hs_fork_phase
static void tpf_write_hs_fork_phase(const struct tpf_compiler *tpf)
Definition: tpf.c:4958
vkd3d_make_u32
static uint32_t vkd3d_make_u32(uint16_t low, uint16_t high)
Definition: vkd3d_common.h:381
set_u32
void set_u32(struct vkd3d_bytecode_buffer *buffer, size_t offset, uint32_t value)
Definition: vkd3d_shader_main.c:436
VKD3DSGF_ENABLE_RAW_AND_STRUCTURED_BUFFERS
@ VKD3DSGF_ENABLE_RAW_AND_STRUCTURED_BUFFERS
Definition: vkd3d_shader_private.h:784
VKD3DSGF_FORCE_EARLY_DEPTH_STENCIL
@ VKD3DSGF_FORCE_EARLY_DEPTH_STENCIL
Definition: vkd3d_shader_private.h:783
VKD3D_SHADER_TYPE_COUNT
@ VKD3D_SHADER_TYPE_COUNT
Definition: vkd3d_shader_private.h:899
bytecode_get_size
static size_t bytecode_get_size(struct vkd3d_bytecode_buffer *buffer)
Definition: vkd3d_shader_private.h:1582

Referenced by tpf_compile().

◆ tpf_write_signature()

static void tpf_write_signature ( struct tpf_compiler *  tpf,
const struct shader_signature *  signature,
uint32_t  tag 
)
static

Definition at line 3245 of file tpf.c.

3246{
3247 bool output = tag == TAG_OSGN || (tag == TAG_PCSG
3248 && tpf->program->shader_version.type == VKD3D_SHADER_TYPE_HULL);
3249 const struct signature_element **sorted_elements;
3250 struct vkd3d_bytecode_buffer buffer = {0};
3251 unsigned int i;
3252
3253 put_u32(&buffer, signature->element_count);
3254 put_u32(&buffer, 8); /* unknown */
3255
3256 if (!(sorted_elements = vkd3d_calloc(signature->element_count, sizeof(*sorted_elements))))
3257 return;
3258 for (i = 0; i < signature->element_count; ++i)
3259 sorted_elements[i] = &signature->elements[i];
3260 qsort(sorted_elements, signature->element_count, sizeof(*sorted_elements), signature_element_pointer_compare);
3261
3262 for (i = 0; i < signature->element_count; ++i)
3263 {
3264 const struct signature_element *element = sorted_elements[i];
3265 enum vkd3d_shader_sysval_semantic sysval;
3266 uint32_t used_mask = element->used_mask;
3267
3268 if (output)
3269 used_mask = 0xf ^ used_mask;
3270
3271 sysval = element->sysval_semantic;
3272 if (sysval >= VKD3D_SHADER_SV_TARGET)
3273 sysval = VKD3D_SHADER_SV_NONE;
3274
3275 put_u32(&buffer, 0); /* name */
3276 put_u32(&buffer, element->semantic_index);
3277 put_u32(&buffer, sysval);
3278 put_u32(&buffer, element->component_type);
3279 put_u32(&buffer, element->register_index);
3280 put_u32(&buffer, vkd3d_make_u16(element->mask, used_mask));
3281 }
3282
3283 for (i = 0; i < signature->element_count; ++i)
3284 {
3285 const struct signature_element *element = sorted_elements[i];
3286 size_t string_offset;
3287
3288 string_offset = put_string(&buffer, element->semantic_name);
3289 set_u32(&buffer, (2 + i * 6) * sizeof(uint32_t), string_offset);
3290 }
3291
3292 add_section(tpf->ctx, &tpf->dxbc, tag, &buffer);
3293 vkd3d_free(sorted_elements);
3294}
sysval
enum vkd3d_shader_sysval_semantic sysval
Definition: spirv.c:4839
signature_element::used_mask
unsigned int used_mask
Definition: vkd3d_shader_private.h:1094
signature_element_pointer_compare
static int signature_element_pointer_compare(const void *x, const void *y)
Definition: tpf.c:3234
vkd3d_make_u16
static uint16_t vkd3d_make_u16(uint8_t low, uint8_t high)
Definition: vkd3d_common.h:376
put_string
static size_t put_string(struct vkd3d_bytecode_buffer *buffer, const char *string)
Definition: vkd3d_shader_private.h:1577

Referenced by tpf_compile().

◆ tpf_write_stat()

static void tpf_write_stat ( struct tpf_compiler *  tpf)
static

Definition at line 5992 of file tpf.c.

5993{
5994 struct vkd3d_bytecode_buffer buffer = {0};
5995 const struct sm4_stat *stat = tpf->stat;
5996 struct hlsl_ctx *ctx = tpf->ctx;
5997
5998 put_u32(&buffer, stat->fields[VKD3D_STAT_INSTR_COUNT]);
5999 put_u32(&buffer, stat->fields[VKD3D_STAT_TEMPS]);
6000 put_u32(&buffer, 0); /* Def count */
6001 put_u32(&buffer, 0); /* DCL count */
6002 put_u32(&buffer, stat->fields[VKD3D_STAT_FLOAT]);
6003 put_u32(&buffer, stat->fields[VKD3D_STAT_INT]);
6004 put_u32(&buffer, stat->fields[VKD3D_STAT_UINT]);
6005 put_u32(&buffer, 0); /* Static flow control count */
6006 put_u32(&buffer, 0); /* Dynamic flow control count */
6007 put_u32(&buffer, 0); /* Macro instruction count */
6008 put_u32(&buffer, 0); /* Temp array count */
6009 put_u32(&buffer, 0); /* Array instr count */
6010 put_u32(&buffer, stat->fields[VKD3D_STAT_CUT]);
6011 put_u32(&buffer, stat->fields[VKD3D_STAT_EMIT]);
6012 put_u32(&buffer, stat->fields[VKD3D_STAT_SAMPLE]);
6013 put_u32(&buffer, stat->fields[VKD3D_STAT_LOAD]);
6014 put_u32(&buffer, stat->fields[VKD3D_STAT_SAMPLE_C]);
6015 put_u32(&buffer, stat->fields[VKD3D_STAT_SAMPLE_BIAS]);
6016 put_u32(&buffer, stat->fields[VKD3D_STAT_SAMPLE_GRAD]);
6017 put_u32(&buffer, stat->fields[VKD3D_STAT_MOV]);
6018 put_u32(&buffer, stat->fields[VKD3D_STAT_MOVC]);
6019 put_u32(&buffer, stat->fields[VKD3D_STAT_CONV]);
6020 put_u32(&buffer, stat->fields[VKD3D_STAT_BITWISE]);
6021 put_u32(&buffer, stat->fields[VKD3D_STAT_DCL_INPUT_PRIMITIVE]);
6022 put_u32(&buffer, stat->fields[VKD3D_STAT_DCL_OUTPUT_TOPOLOGY]);
6023 put_u32(&buffer, stat->fields[VKD3D_STAT_DCL_VERTICES_OUT]);
6024 put_u32(&buffer, stat->fields[VKD3D_STAT_GATHER]);
6025 put_u32(&buffer, stat->fields[VKD3D_STAT_LOD]);
6026 put_u32(&buffer, 0); /* Sample frequency */
6027
6028 if (hlsl_version_ge(ctx, 5, 0))
6029 {
6030 put_u32(&buffer, stat->fields[VKD3D_STAT_DCL_GS_INSTANCES]);
6031 put_u32(&buffer, stat->fields[VKD3D_STAT_TESS_CONTROL_POINT_COUNT]);
6032 put_u32(&buffer, stat->fields[VKD3D_STAT_TESS_OUTPUT_PRIMITIVE]);
6033 put_u32(&buffer, stat->fields[VKD3D_STAT_TESS_PARTITIONING]);
6034 put_u32(&buffer, stat->fields[VKD3D_STAT_TESS_DOMAIN]);
6035 put_u32(&buffer, stat->fields[VKD3D_STAT_BARRIER]);
6036 put_u32(&buffer, stat->fields[VKD3D_STAT_ATOMIC]);
6037 put_u32(&buffer, stat->fields[VKD3D_STAT_STORE]);
6038 }
6039
6040 add_section(ctx, &tpf->dxbc, TAG_STAT, &buffer);
6041}
TAG_STAT
#define TAG_STAT
Definition: d3dcompiler_private.h:535
hlsl_version_ge
static bool hlsl_version_ge(const struct hlsl_ctx *ctx, unsigned int major, unsigned int minor)
Definition: hlsl.h:1141

Referenced by tpf_compile().

◆ uninvert_used_masks()

static void uninvert_used_masks ( struct shader_signature *  signature)
static

Definition at line 2829 of file tpf.c.

2830{
2831 for (unsigned int i = 0; i < signature->element_count; ++i)
2832 {
2833 struct signature_element *e = &signature->elements[i];
2834
2835 e->used_mask = e->mask & ~e->used_mask;
2836 }
2837}

Referenced by tpf_parse().

◆ var_is_user_input()

static bool var_is_user_input ( const struct vkd3d_shader_version *  version,
const struct hlsl_ir_var *  var 
)
static

Definition at line 5318 of file tpf.c.

5319{
5320 if (var->is_uniform)
5321 return true;
5322
5323 return var->is_input_semantic && version->type == VKD3D_SHADER_TYPE_VERTEX;
5324}

Referenced by write_sm4_load().

◆ vkd3d_sm4_get_default_swizzle_type()

static enum vkd3d_sm4_swizzle_type vkd3d_sm4_get_default_swizzle_type ( const struct vkd3d_sm4_lookup_tables *  lookup,
enum vkd3d_shader_register_type  vkd3d_type 
)
static

Definition at line 1970 of file tpf.c.

1972{
1973 const struct vkd3d_sm4_register_type_info *register_type_info =
1974 get_info_from_vkd3d_register_type(lookup, vkd3d_type);
1975
1976 VKD3D_ASSERT(register_type_info);
1977 return register_type_info->default_src_swizzle_type;
1978}

Referenced by sm4_src_from_deref(), and sm4_src_from_node().

◆ vsir_dimension_from_sm4_dimension()

static enum vsir_dimension vsir_dimension_from_sm4_dimension ( enum vkd3d_sm4_dimension  dim)
static

Definition at line 547 of file tpf.c.

548{
549 switch (dim)
550 {
551 case VKD3D_SM4_DIMENSION_NONE:
552 return VSIR_DIMENSION_NONE;
553 case VKD3D_SM4_DIMENSION_SCALAR:
554 return VSIR_DIMENSION_SCALAR;
555 case VKD3D_SM4_DIMENSION_VEC4:
556 return VSIR_DIMENSION_VEC4;
557 default:
558 FIXME("Unknown SM4 dimension %#x.\n", dim);
559 return VSIR_DIMENSION_NONE;
560 }
561}

Referenced by shader_sm4_read_param().

◆ write_sm4_block()

static void write_sm4_block ( struct tpf_compiler *  tpf,
const struct hlsl_block *  block 
)
static

Definition at line 5775 of file tpf.c.

5776{
5777 const struct hlsl_ir_node *instr;
5778 unsigned int vsir_instr_idx;
5779
5780 LIST_FOR_EACH_ENTRY(instr, &block->instrs, struct hlsl_ir_node, entry)
5781 {
5782 if (instr->data_type)
5783 {
5784 if (instr->data_type->class != HLSL_CLASS_SCALAR && instr->data_type->class != HLSL_CLASS_VECTOR)
5785 {
5786 hlsl_fixme(tpf->ctx, &instr->loc, "Class %#x should have been lowered or removed.",
5787 instr->data_type->class);
5788 break;
5789 }
5790
5791 if (!instr->reg.allocated)
5792 {
5793 VKD3D_ASSERT(instr->type == HLSL_IR_CONSTANT);
5794 continue;
5795 }
5796 }
5797
5798 switch (instr->type)
5799 {
5800 case HLSL_IR_CALL:
5801 case HLSL_IR_CONSTANT:
5802 vkd3d_unreachable();
5803
5804 case HLSL_IR_IF:
5805 write_sm4_if(tpf, hlsl_ir_if(instr));
5806 break;
5807
5808 case HLSL_IR_JUMP:
5809 write_sm4_jump(tpf, hlsl_ir_jump(instr));
5810 break;
5811
5812 case HLSL_IR_LOAD:
5813 write_sm4_load(tpf, hlsl_ir_load(instr));
5814 break;
5815
5816 case HLSL_IR_RESOURCE_LOAD:
5817 write_sm4_resource_load(tpf, hlsl_ir_resource_load(instr));
5818 break;
5819
5820 case HLSL_IR_RESOURCE_STORE:
5821 write_sm4_resource_store(tpf, hlsl_ir_resource_store(instr));
5822 break;
5823
5824 case HLSL_IR_LOOP:
5825 write_sm4_loop(tpf, hlsl_ir_loop(instr));
5826 break;
5827
5828 case HLSL_IR_STORE:
5829 write_sm4_store(tpf, hlsl_ir_store(instr));
5830 break;
5831
5832 case HLSL_IR_SWITCH:
5833 write_sm4_switch(tpf, hlsl_ir_switch(instr));
5834 break;
5835
5836 case HLSL_IR_SWIZZLE:
5837 write_sm4_swizzle(tpf, hlsl_ir_swizzle(instr));
5838 break;
5839
5840 case HLSL_IR_VSIR_INSTRUCTION_REF:
5841 vsir_instr_idx = hlsl_ir_vsir_instruction_ref(instr)->vsir_instr_idx;
5842 tpf_handle_instruction(tpf, &tpf->program->instructions.elements[vsir_instr_idx]);
5843 break;
5844
5845 default:
5846 hlsl_fixme(tpf->ctx, &instr->loc, "Instruction type %s.", hlsl_node_type_to_string(instr->type));
5847 }
5848 }
5849}
hlsl_fixme
void hlsl_fixme(struct hlsl_ctx *ctx, const struct vkd3d_shader_location *loc, const char *fmt,...)
Definition: hlsl.c:58
hlsl_node_type_to_string
const char * hlsl_node_type_to_string(enum hlsl_ir_node_type type)
Definition: hlsl.c:2949
HLSL_IR_LOOP
@ HLSL_IR_LOOP
Definition: hlsl.h:321
HLSL_IR_SWIZZLE
@ HLSL_IR_SWIZZLE
Definition: hlsl.h:327
HLSL_IR_IF
@ HLSL_IR_IF
Definition: hlsl.h:318
HLSL_IR_CALL
@ HLSL_IR_CALL
Definition: hlsl.h:315
HLSL_IR_LOAD
@ HLSL_IR_LOAD
Definition: hlsl.h:320
HLSL_IR_VSIR_INSTRUCTION_REF
@ HLSL_IR_VSIR_INSTRUCTION_REF
Definition: hlsl.h:334
HLSL_IR_RESOURCE_LOAD
@ HLSL_IR_RESOURCE_LOAD
Definition: hlsl.h:323
HLSL_IR_SWITCH
@ HLSL_IR_SWITCH
Definition: hlsl.h:328
HLSL_IR_RESOURCE_STORE
@ HLSL_IR_RESOURCE_STORE
Definition: hlsl.h:324
HLSL_IR_STORE
@ HLSL_IR_STORE
Definition: hlsl.h:326
HLSL_IR_JUMP
@ HLSL_IR_JUMP
Definition: hlsl.h:322
hlsl_ir_if
Definition: hlsl.h:640
hlsl_ir_jump
Definition: hlsl.h:773
hlsl_ir_load
Definition: hlsl.h:828
hlsl_ir_loop
Definition: hlsl.h:655
hlsl_ir_node
Definition: hlsl.h:339
hlsl_ir_node::loc
struct vkd3d_shader_location loc
Definition: hlsl.h:355
hlsl_ir_resource_load
Definition: hlsl.h:852
hlsl_ir_resource_store
Definition: hlsl.h:861
hlsl_ir_store
Definition: hlsl.h:868
hlsl_ir_switch
Definition: hlsl.h:674
hlsl_ir_swizzle
Definition: hlsl.h:781
hlsl_ir_vsir_instruction_ref
Definition: hlsl.h:940
hlsl_ir_vsir_instruction_ref::vsir_instr_idx
unsigned int vsir_instr_idx
Definition: hlsl.h:944
write_sm4_resource_load
static void write_sm4_resource_load(const struct tpf_compiler *tpf, const struct hlsl_ir_resource_load *load)
Definition: tpf.c:5423
write_sm4_swizzle
static void write_sm4_swizzle(const struct tpf_compiler *tpf, const struct hlsl_ir_swizzle *swizzle)
Definition: tpf.c:5590
write_sm4_resource_store
static void write_sm4_resource_store(const struct tpf_compiler *tpf, const struct hlsl_ir_resource_store *store)
Definition: tpf.c:5492
write_sm4_loop
static void write_sm4_loop(struct tpf_compiler *tpf, const struct hlsl_ir_loop *loop)
Definition: tpf.c:5366
write_sm4_load
static void write_sm4_load(const struct tpf_compiler *tpf, const struct hlsl_ir_load *load)
Definition: tpf.c:5326
write_sm4_switch
static void write_sm4_switch(struct tpf_compiler *tpf, const struct hlsl_ir_switch *s)
Definition: tpf.c:5550
write_sm4_store
static void write_sm4_store(const struct tpf_compiler *tpf, const struct hlsl_ir_store *store)
Definition: tpf.c:5531
write_sm4_jump
static void write_sm4_jump(const struct tpf_compiler *tpf, const struct hlsl_ir_jump *jump)
Definition: tpf.c:5279
tpf_handle_instruction
static void tpf_handle_instruction(struct tpf_compiler *tpf, const struct vkd3d_shader_instruction *ins)
Definition: tpf.c:5661
write_sm4_if
static void write_sm4_if(struct tpf_compiler *tpf, const struct hlsl_ir_if *iff)
Definition: tpf.c:5249
block
static unsigned int block
Definition: xmlmemory.c:101

Referenced by tpf_write_shader_function(), write_sm4_if(), write_sm4_loop(), and write_sm4_switch().

◆ write_sm4_dcl_constant_buffer()

static void write_sm4_dcl_constant_buffer ( const struct tpf_compiler *  tpf,
const struct hlsl_buffer *  cbuffer 
)
static

Definition at line 4680 of file tpf.c.

4681{
4682 size_t size = (cbuffer->used_size + 3) / 4;
4683
4684 struct sm4_instruction instr =
4685 {
4686 .opcode = VKD3D_SM4_OP_DCL_CONSTANT_BUFFER,
4687
4688 .srcs[0].reg.dimension = VSIR_DIMENSION_VEC4,
4689 .srcs[0].reg.type = VKD3DSPR_CONSTBUFFER,
4690 .srcs[0].swizzle = VKD3D_SHADER_NO_SWIZZLE,
4691 .src_count = 1,
4692 };
4693
4694 if (hlsl_version_ge(tpf->ctx, 5, 1))
4695 {
4696 instr.srcs[0].reg.idx[0].offset = cbuffer->reg.id;
4697 instr.srcs[0].reg.idx[1].offset = cbuffer->reg.index;
4698 instr.srcs[0].reg.idx[2].offset = cbuffer->reg.index; /* FIXME: array end */
4699 instr.srcs[0].reg.idx_count = 3;
4700
4701 instr.idx[0] = size;
4702 instr.idx[1] = cbuffer->reg.space;
4703 instr.idx_count = 2;
4704 }
4705 else
4706 {
4707 instr.srcs[0].reg.idx[0].offset = cbuffer->reg.index;
4708 instr.srcs[0].reg.idx[1].offset = size;
4709 instr.srcs[0].reg.idx_count = 2;
4710 }
4711
4712 write_sm4_instruction(tpf, &instr);
4713}
hlsl_buffer::used_size
unsigned used_size
Definition: hlsl.h:1009
sm4_instruction::idx_count
unsigned int idx_count
Definition: tpf.c:4093

Referenced by tpf_write_shdr().

◆ write_sm4_dcl_global_flags()

static void write_sm4_dcl_global_flags ( const struct tpf_compiler *  tpf,
uint32_t  flags 
)
static

Definition at line 4927 of file tpf.c.

4928{
4929 struct sm4_instruction instr =
4930 {
4931 .opcode = VKD3D_SM4_OP_DCL_GLOBAL_FLAGS,
4932 .extra_bits = flags << VKD3D_SM4_GLOBAL_FLAGS_SHIFT,
4933 };
4934
4935 write_sm4_instruction(tpf, &instr);
4936}

Referenced by tpf_write_shdr().

◆ write_sm4_dcl_samplers()

static void write_sm4_dcl_samplers ( const struct tpf_compiler *  tpf,
const struct extern_resource *  resource 
)
static

Definition at line 4715 of file tpf.c.

4716{
4717 unsigned int i;
4718 struct sm4_instruction instr =
4719 {
4720 .opcode = VKD3D_SM4_OP_DCL_SAMPLER,
4721
4722 .dsts[0].reg.type = VKD3DSPR_SAMPLER,
4723 .dst_count = 1,
4724 };
4725
4726 VKD3D_ASSERT(resource->regset == HLSL_REGSET_SAMPLERS);
4727
4728 if (resource->component_type->sampler_dim == HLSL_SAMPLER_DIM_COMPARISON)
4729 instr.extra_bits |= VKD3D_SM4_SAMPLER_COMPARISON << VKD3D_SM4_SAMPLER_MODE_SHIFT;
4730
4731 for (i = 0; i < resource->bind_count; ++i)
4732 {
4733 if (resource->var && !resource->var->objects_usage[HLSL_REGSET_SAMPLERS][i].used)
4734 continue;
4735
4736 if (hlsl_version_ge(tpf->ctx, 5, 1))
4737 {
4738 VKD3D_ASSERT(!i);
4739 instr.dsts[0].reg.idx[0].offset = resource->id;
4740 instr.dsts[0].reg.idx[1].offset = resource->index;
4741 instr.dsts[0].reg.idx[2].offset = resource->index; /* FIXME: array end */
4742 instr.dsts[0].reg.idx_count = 3;
4743
4744 instr.idx[0] = resource->space;
4745 instr.idx_count = 1;
4746 }
4747 else
4748 {
4749 instr.dsts[0].reg.idx[0].offset = resource->index + i;
4750 instr.dsts[0].reg.idx_count = 1;
4751 }
4752 write_sm4_instruction(tpf, &instr);
4753 }
4754}
HLSL_SAMPLER_DIM_COMPARISON
@ HLSL_SAMPLER_DIM_COMPARISON
Definition: hlsl.h:127

Referenced by tpf_write_shdr().

◆ write_sm4_dcl_textures()

static void write_sm4_dcl_textures ( const struct tpf_compiler *  tpf,
const struct extern_resource *  resource,
bool  uav 
)
static

Definition at line 4756 of file tpf.c.

4758{
4759 const struct vkd3d_shader_version *version = &tpf->program->shader_version;
4760 enum hlsl_regset regset = uav ? HLSL_REGSET_UAVS : HLSL_REGSET_TEXTURES;
4761 struct hlsl_type *component_type;
4762 struct sm4_instruction instr;
4763 bool multisampled;
4764 unsigned int i;
4765
4766 VKD3D_ASSERT(resource->regset == regset);
4767
4768 component_type = resource->component_type;
4769
4770 for (i = 0; i < resource->bind_count; ++i)
4771 {
4772 if (resource->var && !resource->var->objects_usage[regset][i].used)
4773 continue;
4774
4775 instr = (struct sm4_instruction)
4776 {
4777 .dsts[0].reg.type = uav ? VKD3DSPR_UAV : VKD3DSPR_RESOURCE,
4778 .dsts[0].reg.idx[0].offset = resource->id + i,
4779 .dsts[0].reg.idx_count = 1,
4780 .dst_count = 1,
4781
4782 .idx[0] = sm4_data_type(component_type) * 0x1111,
4783 .idx_count = 1,
4784 };
4785
4786 multisampled = component_type->sampler_dim == HLSL_SAMPLER_DIM_2DMS
4787 || component_type->sampler_dim == HLSL_SAMPLER_DIM_2DMSARRAY;
4788
4789 if (!vkd3d_shader_ver_ge(version, 4, 1) && multisampled && !component_type->sample_count)
4790 {
4791 hlsl_error(tpf->ctx, &resource->loc, VKD3D_SHADER_ERROR_HLSL_INVALID_TYPE,
4792 "Multisampled texture object declaration needs sample count for profile %u.%u.",
4793 version->major, version->minor);
4794 }
4795
4796 if (vkd3d_shader_ver_ge(version, 5, 1))
4797 {
4798 VKD3D_ASSERT(!i);
4799 instr.dsts[0].reg.idx[0].offset = resource->id;
4800 instr.dsts[0].reg.idx[1].offset = resource->index;
4801 instr.dsts[0].reg.idx[2].offset = resource->index; /* FIXME: array end */
4802 instr.dsts[0].reg.idx_count = 3;
4803
4804 instr.idx[1] = resource->space;
4805 instr.idx_count = 2;
4806 }
4807 else
4808 {
4809 instr.dsts[0].reg.idx[0].offset = resource->index + i;
4810 instr.dsts[0].reg.idx_count = 1;
4811 }
4812
4813 if (uav)
4814 {
4815 switch (component_type->sampler_dim)
4816 {
4817 case HLSL_SAMPLER_DIM_STRUCTURED_BUFFER:
4818 instr.opcode = VKD3D_SM5_OP_DCL_UAV_STRUCTURED;
4819 instr.byte_stride = component_type->e.resource.format->reg_size[HLSL_REGSET_NUMERIC] * 4;
4820 break;
4821 case HLSL_SAMPLER_DIM_RAW_BUFFER:
4822 instr.opcode = VKD3D_SM5_OP_DCL_UAV_RAW;
4823 break;
4824 default:
4825 instr.opcode = VKD3D_SM5_OP_DCL_UAV_TYPED;
4826 break;
4827 }
4828
4829 if (component_type->e.resource.rasteriser_ordered)
4830 instr.opcode |= VKD3DSUF_RASTERISER_ORDERED_VIEW << VKD3D_SM5_UAV_FLAGS_SHIFT;
4831 }
4832 else
4833 {
4834 switch (component_type->sampler_dim)
4835 {
4836 case HLSL_SAMPLER_DIM_RAW_BUFFER:
4837 instr.opcode = VKD3D_SM5_OP_DCL_RESOURCE_RAW;
4838 break;
4839 default:
4840 instr.opcode = VKD3D_SM4_OP_DCL_RESOURCE;
4841 break;
4842 }
4843 }
4844 instr.extra_bits |= (sm4_resource_dimension(component_type) << VKD3D_SM4_RESOURCE_TYPE_SHIFT);
4845
4846 if (multisampled)
4847 instr.extra_bits |= component_type->sample_count << VKD3D_SM4_RESOURCE_SAMPLE_COUNT_SHIFT;
4848
4849 write_sm4_instruction(tpf, &instr);
4850 }
4851}
hlsl_error
void hlsl_error(struct hlsl_ctx *ctx, const struct vkd3d_shader_location *loc, enum vkd3d_shader_error error, const char *fmt,...)
Definition: hlsl.c:35
sm4_resource_dimension
static enum vkd3d_sm4_resource_type sm4_resource_dimension(const struct hlsl_type *type)
Definition: tpf.c:4008
sm4_data_type
static enum vkd3d_sm4_data_type sm4_data_type(const struct hlsl_type *type)
Definition: tpf.c:3449
VKD3DSUF_RASTERISER_ORDERED_VIEW
@ VKD3DSUF_RASTERISER_ORDERED_VIEW
Definition: vkd3d_shader_private.h:827
VKD3D_SHADER_ERROR_HLSL_INVALID_TYPE
@ VKD3D_SHADER_ERROR_HLSL_INVALID_TYPE
Definition: vkd3d_shader_private.h:128

Referenced by tpf_write_shdr().

◆ write_sm4_gather()

static void write_sm4_gather ( const struct tpf_compiler *  tpf,
const struct hlsl_ir_node *  dst,
const struct hlsl_deref *  resource,
const struct hlsl_deref *  sampler,
const struct hlsl_ir_node *  coords,
uint32_t  swizzle,
const struct hlsl_ir_node *  texel_offset 
)
static

Definition at line 5381 of file tpf.c.

5384{
5385 const struct vkd3d_shader_version *version = &tpf->program->shader_version;
5386 struct vkd3d_shader_src_param *src;
5387 struct sm4_instruction instr;
5388
5389 memset(&instr, 0, sizeof(instr));
5390
5391 instr.opcode = VKD3D_SM4_OP_GATHER4;
5392
5393 sm4_dst_from_node(&instr.dsts[0], dst);
5394 instr.dst_count = 1;
5395
5396 sm4_src_from_node(tpf, &instr.srcs[instr.src_count++], coords, VKD3DSP_WRITEMASK_ALL);
5397
5398 if (texel_offset)
5399 {
5400 if (!encode_texel_offset_as_aoffimmi(&instr, texel_offset))
5401 {
5402 if (!vkd3d_shader_ver_ge(version, 5, 0))
5403 {
5404 hlsl_error(tpf->ctx, &texel_offset->loc, VKD3D_SHADER_ERROR_HLSL_INVALID_TEXEL_OFFSET,
5405 "Offset must resolve to integer literal in the range -8 to 7 for profiles < 5.");
5406 return;
5407 }
5408 instr.opcode = VKD3D_SM5_OP_GATHER4_PO;
5409 sm4_src_from_node(tpf, &instr.srcs[instr.src_count++], texel_offset, VKD3DSP_WRITEMASK_ALL);
5410 }
5411 }
5412
5413 sm4_src_from_deref(tpf, &instr.srcs[instr.src_count++], resource, instr.dsts[0].write_mask, &instr);
5414
5415 src = &instr.srcs[instr.src_count++];
5416 sm4_src_from_deref(tpf, src, sampler, VKD3DSP_WRITEMASK_ALL, &instr);
5417 src->reg.dimension = VSIR_DIMENSION_VEC4;
5418 src->swizzle = swizzle;
5419
5420 write_sm4_instruction(tpf, &instr);
5421}
sampler
GLuint sampler
Definition: glext.h:7283
coords
GLuint coords
Definition: glext.h:7368
sm4_src_from_deref
static void sm4_src_from_deref(const struct tpf_compiler *tpf, struct vkd3d_shader_src_param *src, const struct hlsl_deref *deref, unsigned int map_writemask, struct sm4_instruction *sm4_instr)
Definition: tpf.c:4324
sm4_src_from_node
static void sm4_src_from_node(const struct tpf_compiler *tpf, struct vkd3d_shader_src_param *src, const struct hlsl_ir_node *instr, uint32_t map_writemask)
Definition: tpf.c:4368
sm4_dst_from_node
static void sm4_dst_from_node(struct vkd3d_shader_dst_param *dst, const struct hlsl_ir_node *instr)
Definition: tpf.c:4338
encode_texel_offset_as_aoffimmi
static bool encode_texel_offset_as_aoffimmi(struct sm4_instruction *instr, const struct hlsl_ir_node *texel_offset)
Definition: tpf.c:4653
VKD3D_SHADER_ERROR_HLSL_INVALID_TEXEL_OFFSET
@ VKD3D_SHADER_ERROR_HLSL_INVALID_TEXEL_OFFSET
Definition: vkd3d_shader_private.h:144

Referenced by write_sm4_resource_load().

◆ write_sm4_if()

static void write_sm4_if ( struct tpf_compiler *  tpf,
const struct hlsl_ir_if *  iff 
)
static

Definition at line 5249 of file tpf.c.

5250{
5251 struct sm4_instruction instr =
5252 {
5253 .opcode = VKD3D_SM4_OP_IF,
5254 .extra_bits = VKD3D_SM4_CONDITIONAL_NZ,
5255 .src_count = 1,
5256 };
5257
5258 VKD3D_ASSERT(iff->condition.node->data_type->dimx == 1);
5259
5260 sm4_src_from_node(tpf, &instr.srcs[0], iff->condition.node, VKD3DSP_WRITEMASK_ALL);
5261 write_sm4_instruction(tpf, &instr);
5262
5263 write_sm4_block(tpf, &iff->then_block);
5264
5265 if (!list_empty(&iff->else_block.instrs))
5266 {
5267 instr.opcode = VKD3D_SM4_OP_ELSE;
5268 instr.src_count = 0;
5269 write_sm4_instruction(tpf, &instr);
5270
5271 write_sm4_block(tpf, &iff->else_block);
5272 }
5273
5274 instr.opcode = VKD3D_SM4_OP_ENDIF;
5275 instr.src_count = 0;
5276 write_sm4_instruction(tpf, &instr);
5277}
list_empty
static int list_empty(struct list_entry *head)
Definition: list.h:58
hlsl_ir_if::then_block
struct hlsl_block then_block
Definition: hlsl.h:643
hlsl_ir_if::condition
struct hlsl_src condition
Definition: hlsl.h:642
hlsl_ir_if::else_block
struct hlsl_block else_block
Definition: hlsl.h:644

Referenced by write_sm4_block().

◆ write_sm4_instruction()

static void write_sm4_instruction ( const struct tpf_compiler *  tpf,
const struct sm4_instruction *  instr 
)
static

Definition at line 4613 of file tpf.c.

4614{
4615 uint32_t token = instr->opcode | instr->extra_bits;
4616 struct vkd3d_bytecode_buffer *buffer = tpf->buffer;
4617 unsigned int size, i, j;
4618 size_t token_position;
4619
4620 if (instr->modifier_count > 0)
4621 token |= VKD3D_SM4_INSTRUCTION_MODIFIER;
4622
4623 token_position = put_u32(buffer, 0);
4624
4625 for (i = 0; i < instr->modifier_count; ++i)
4626 {
4627 uint32_t modifier_token = sm4_encode_instruction_modifier(&instr->modifiers[i]);
4628
4629 if (instr->modifier_count > i + 1)
4630 modifier_token |= VKD3D_SM4_INSTRUCTION_MODIFIER;
4631 put_u32(buffer, modifier_token);
4632 }
4633
4634 for (i = 0; i < instr->dst_count; ++i)
4635 sm4_write_dst_register(tpf, &instr->dsts[i]);
4636
4637 for (i = 0; i < instr->src_count; ++i)
4638 sm4_write_src_register(tpf, &instr->srcs[i]);
4639
4640 if (instr->byte_stride)
4641 put_u32(buffer, instr->byte_stride);
4642
4643 for (j = 0; j < instr->idx_count; ++j)
4644 put_u32(buffer, instr->idx[j]);
4645
4646 size = (bytecode_get_size(buffer) - token_position) / sizeof(uint32_t);
4647 token |= (size << VKD3D_SM4_INSTRUCTION_LENGTH_SHIFT);
4648 set_u32(buffer, token_position, token);
4649
4650 sm4_update_stat_counters(tpf, instr);
4651}
sm4_instruction::byte_stride
unsigned int byte_stride
Definition: tpf.c:4090
sm4_write_dst_register
static void sm4_write_dst_register(const struct tpf_compiler *tpf, const struct vkd3d_shader_dst_param *dst)
Definition: tpf.c:4494
sm4_encode_instruction_modifier
static uint32_t sm4_encode_instruction_modifier(const struct sm4_instruction_modifier *imod)
Definition: tpf.c:4052
sm4_update_stat_counters
static void sm4_update_stat_counters(const struct tpf_compiler *tpf, const struct sm4_instruction *instr)
Definition: tpf.c:4568
sm4_write_src_register
static void sm4_write_src_register(const struct tpf_compiler *tpf, const struct vkd3d_shader_src_param *src)
Definition: tpf.c:4507

Referenced by tpf_dcl_indexable_temp(), tpf_dcl_semantic(), tpf_dcl_siv_semantic(), tpf_dcl_temps(), tpf_dcl_thread_group(), tpf_simple_instruction(), tpf_write_dcl_input_control_point_count(), tpf_write_dcl_output_control_point_count(), tpf_write_dcl_tessellator_domain(), tpf_write_dcl_tessellator_output_primitive(), tpf_write_dcl_tessellator_partitioning(), tpf_write_hs_control_point_phase(), tpf_write_hs_decls(), tpf_write_hs_fork_phase(), write_sm4_dcl_constant_buffer(), write_sm4_dcl_global_flags(), write_sm4_dcl_samplers(), write_sm4_dcl_textures(), write_sm4_gather(), write_sm4_if(), write_sm4_jump(), write_sm4_ld(), write_sm4_load(), write_sm4_loop(), write_sm4_resinfo(), write_sm4_resource_store(), write_sm4_ret(), write_sm4_sample(), write_sm4_sampleinfo(), write_sm4_store(), write_sm4_switch(), and write_sm4_swizzle().

◆ write_sm4_jump()

static void write_sm4_jump ( const struct tpf_compiler *  tpf,
const struct hlsl_ir_jump *  jump 
)
static

Definition at line 5279 of file tpf.c.

5280{
5281 struct sm4_instruction instr = {0};
5282
5283 switch (jump->type)
5284 {
5285 case HLSL_IR_JUMP_BREAK:
5286 instr.opcode = VKD3D_SM4_OP_BREAK;
5287 break;
5288
5289 case HLSL_IR_JUMP_CONTINUE:
5290 instr.opcode = VKD3D_SM4_OP_CONTINUE;
5291 break;
5292
5293 case HLSL_IR_JUMP_DISCARD_NZ:
5294 {
5295 instr.opcode = VKD3D_SM4_OP_DISCARD;
5296 instr.extra_bits = VKD3D_SM4_CONDITIONAL_NZ;
5297
5298 memset(&instr.srcs[0], 0, sizeof(*instr.srcs));
5299 instr.src_count = 1;
5300 sm4_src_from_node(tpf, &instr.srcs[0], jump->condition.node, VKD3DSP_WRITEMASK_ALL);
5301 break;
5302 }
5303
5304 case HLSL_IR_JUMP_RETURN:
5305 vkd3d_unreachable();
5306
5307 default:
5308 hlsl_fixme(tpf->ctx, &jump->node.loc, "Jump type %s.", hlsl_jump_type_to_string(jump->type));
5309 return;
5310 }
5311
5312 write_sm4_instruction(tpf, &instr);
5313}
hlsl_jump_type_to_string
const char * hlsl_jump_type_to_string(enum hlsl_ir_jump_type type)
Definition: hlsl.c:2979
HLSL_IR_JUMP_DISCARD_NZ
@ HLSL_IR_JUMP_DISCARD_NZ
Definition: hlsl.h:764
HLSL_IR_JUMP_RETURN
@ HLSL_IR_JUMP_RETURN
Definition: hlsl.h:765
HLSL_IR_JUMP_CONTINUE
@ HLSL_IR_JUMP_CONTINUE
Definition: hlsl.h:762
HLSL_IR_JUMP_BREAK
@ HLSL_IR_JUMP_BREAK
Definition: hlsl.h:761
hlsl_ir_jump::node
struct hlsl_ir_node node
Definition: hlsl.h:774
hlsl_ir_jump::condition
struct hlsl_src condition
Definition: hlsl.h:777
hlsl_ir_jump::type
enum hlsl_ir_jump_type type
Definition: hlsl.h:775

Referenced by write_sm4_block().

◆ write_sm4_ld()

static void write_sm4_ld ( const struct tpf_compiler *  tpf,
const struct hlsl_ir_node *  dst,
const struct hlsl_deref *  resource,
const struct hlsl_ir_node *  coords,
const struct hlsl_ir_node *  sample_index,
const struct hlsl_ir_node *  texel_offset,
enum hlsl_sampler_dim  dim 
)
static

Definition at line 5035 of file tpf.c.

5039{
5040 const struct hlsl_type *resource_type = hlsl_deref_get_type(tpf->ctx, resource);
5041 bool multisampled = resource_type->class == HLSL_CLASS_TEXTURE
5042 && (resource_type->sampler_dim == HLSL_SAMPLER_DIM_2DMS || resource_type->sampler_dim == HLSL_SAMPLER_DIM_2DMSARRAY);
5043 bool uav = (hlsl_deref_get_regset(tpf->ctx, resource) == HLSL_REGSET_UAVS);
5044 const struct vkd3d_shader_version *version = &tpf->program->shader_version;
5045 bool raw = resource_type->sampler_dim == HLSL_SAMPLER_DIM_RAW_BUFFER;
5046 unsigned int coords_writemask = VKD3DSP_WRITEMASK_ALL;
5047 struct sm4_instruction instr;
5048
5049 memset(&instr, 0, sizeof(instr));
5050 if (uav)
5051 instr.opcode = VKD3D_SM5_OP_LD_UAV_TYPED;
5052 else if (raw)
5053 instr.opcode = VKD3D_SM5_OP_LD_RAW;
5054 else
5055 instr.opcode = multisampled ? VKD3D_SM4_OP_LD2DMS : VKD3D_SM4_OP_LD;
5056
5057 if (texel_offset)
5058 {
5059 if (!encode_texel_offset_as_aoffimmi(&instr, texel_offset))
5060 {
5061 hlsl_error(tpf->ctx, &texel_offset->loc, VKD3D_SHADER_ERROR_HLSL_INVALID_TEXEL_OFFSET,
5062 "Offset must resolve to integer literal in the range -8 to 7.");
5063 return;
5064 }
5065 }
5066
5067 sm4_dst_from_node(&instr.dsts[0], dst);
5068 instr.dst_count = 1;
5069
5070 if (!uav)
5071 {
5072 /* Mipmap level is in the last component in the IR, but needs to be in the W
5073 * component in the instruction. */
5074 unsigned int dim_count = hlsl_sampler_dim_count(dim);
5075
5076 if (dim_count == 1)
5077 coords_writemask = VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_3;
5078 if (dim_count == 2)
5079 coords_writemask = VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_1 | VKD3DSP_WRITEMASK_3;
5080 }
5081
5082 sm4_src_from_node(tpf, &instr.srcs[0], coords, coords_writemask);
5083
5084 sm4_src_from_deref(tpf, &instr.srcs[1], resource, instr.dsts[0].write_mask, &instr);
5085
5086 instr.src_count = 2;
5087
5088 if (multisampled)
5089 {
5090 if (sample_index->type == HLSL_IR_CONSTANT)
5091 {
5092 struct vkd3d_shader_register *reg = &instr.srcs[2].reg;
5093 struct hlsl_ir_constant *index;
5094
5095 index = hlsl_ir_constant(sample_index);
5096
5097 memset(&instr.srcs[2], 0, sizeof(instr.srcs[2]));
5098 reg->type = VKD3DSPR_IMMCONST;
5099 reg->dimension = VSIR_DIMENSION_SCALAR;
5100 reg->u.immconst_u32[0] = index->value.u[0].u;
5101 }
5102 else if (version->major == 4 && version->minor == 0)
5103 {
5104 hlsl_error(tpf->ctx, &sample_index->loc, VKD3D_SHADER_ERROR_HLSL_INVALID_TYPE, "Expected literal sample index.");
5105 }
5106 else
5107 {
5108 sm4_src_from_node(tpf, &instr.srcs[2], sample_index, 0);
5109 }
5110
5111 ++instr.src_count;
5112 }
5113
5114 write_sm4_instruction(tpf, &instr);
5115}
hlsl_sampler_dim_count
static unsigned int hlsl_sampler_dim_count(enum hlsl_sampler_dim dim)
Definition: hlsl.h:1393
hlsl_type::sampler_dim
enum hlsl_sampler_dim sampler_dim
Definition: hlsl.h:172
hlsl_type::class
enum hlsl_type_class class
Definition: hlsl.h:163
vkd3d_shader_register
Definition: vkd3d_shader_private.h:942
VKD3DSP_WRITEMASK_3
#define VKD3DSP_WRITEMASK_3
Definition: vkd3d_shader_private.h:753
VKD3DSP_WRITEMASK_1
#define VKD3DSP_WRITEMASK_1
Definition: vkd3d_shader_private.h:751

Referenced by write_sm4_resource_load().

◆ write_sm4_load()

static void write_sm4_load ( const struct tpf_compiler *  tpf,
const struct hlsl_ir_load *  load 
)
static

Definition at line 5326 of file tpf.c.

5327{
5328 const struct vkd3d_shader_version *version = &tpf->program->shader_version;
5329 const struct hlsl_type *type = load->node.data_type;
5330 struct sm4_instruction instr;
5331
5332 memset(&instr, 0, sizeof(instr));
5333
5334 sm4_dst_from_node(&instr.dsts[0], &load->node);
5335 instr.dst_count = 1;
5336
5337 VKD3D_ASSERT(hlsl_is_numeric_type(type));
5338 if (type->e.numeric.type == HLSL_TYPE_BOOL && var_is_user_input(version, load->src.var))
5339 {
5340 struct hlsl_constant_value value;
5341
5342 /* Uniform bools can be specified as anything, but internal bools always
5343 * have 0 for false and ~0 for true. Normalize that here. */
5344
5345 instr.opcode = VKD3D_SM4_OP_MOVC;
5346
5347 sm4_src_from_deref(tpf, &instr.srcs[0], &load->src, instr.dsts[0].write_mask, &instr);
5348
5349 memset(&value, 0xff, sizeof(value));
5350 sm4_src_from_constant_value(&instr.srcs[1], &value, type->dimx, instr.dsts[0].write_mask);
5351 memset(&value, 0, sizeof(value));
5352 sm4_src_from_constant_value(&instr.srcs[2], &value, type->dimx, instr.dsts[0].write_mask);
5353 instr.src_count = 3;
5354 }
5355 else
5356 {
5357 instr.opcode = VKD3D_SM4_OP_MOV;
5358
5359 sm4_src_from_deref(tpf, &instr.srcs[0], &load->src, instr.dsts[0].write_mask, &instr);
5360 instr.src_count = 1;
5361 }
5362
5363 write_sm4_instruction(tpf, &instr);
5364}
hlsl_is_numeric_type
static bool hlsl_is_numeric_type(const struct hlsl_type *type)
Definition: hlsl.h:1388
load
int load
Definition: msacm.c:1365
var_is_user_input
static bool var_is_user_input(const struct vkd3d_shader_version *version, const struct hlsl_ir_var *var)
Definition: tpf.c:5318

Referenced by write_sm4_block().

◆ write_sm4_loop()

static void write_sm4_loop ( struct tpf_compiler *  tpf,
const struct hlsl_ir_loop *  loop 
)
static

Definition at line 5366 of file tpf.c.

5367{
5368 struct sm4_instruction instr =
5369 {
5370 .opcode = VKD3D_SM4_OP_LOOP,
5371 };
5372
5373 write_sm4_instruction(tpf, &instr);
5374
5375 write_sm4_block(tpf, &loop->body);
5376
5377 instr.opcode = VKD3D_SM4_OP_ENDLOOP;
5378 write_sm4_instruction(tpf, &instr);
5379}
hlsl_ir_loop::body
struct hlsl_block body
Definition: hlsl.h:658

Referenced by write_sm4_block().

◆ write_sm4_rdef()

static void write_sm4_rdef ( struct hlsl_ctx *  ctx,
struct dxbc_writer *  dxbc 
)
static

Definition at line 3773 of file tpf.c.

3774{
3775 uint32_t binding_desc_size = (hlsl_version_ge(ctx, 5, 1) ? 10 : 8) * sizeof(uint32_t);
3776 size_t cbuffers_offset, resources_offset, creator_offset, string_offset;
3777 unsigned int cbuffer_count = 0, extern_resources_count, i, j;
3778 size_t cbuffer_position, resource_position, creator_position;
3779 const struct hlsl_profile_info *profile = ctx->profile;
3780 struct vkd3d_bytecode_buffer buffer = {0};
3781 struct extern_resource *extern_resources;
3782 const struct hlsl_buffer *cbuffer;
3783 const struct hlsl_ir_var *var;
3784
3785 static const uint16_t target_types[] =
3786 {
3787 0xffff, /* PIXEL */
3788 0xfffe, /* VERTEX */
3789 0x4753, /* GEOMETRY */
3790 0x4853, /* HULL */
3791 0x4453, /* DOMAIN */
3792 0x4353, /* COMPUTE */
3793 };
3794
3795 extern_resources = sm4_get_extern_resources(ctx, &extern_resources_count);
3796
3797 LIST_FOR_EACH_ENTRY(cbuffer, &ctx->buffers, struct hlsl_buffer, entry)
3798 {
3799 if (cbuffer->reg.allocated)
3800 ++cbuffer_count;
3801 }
3802
3803 put_u32(&buffer, cbuffer_count);
3804 cbuffer_position = put_u32(&buffer, 0);
3805 put_u32(&buffer, extern_resources_count);
3806 resource_position = put_u32(&buffer, 0);
3807 put_u32(&buffer, vkd3d_make_u32(vkd3d_make_u16(profile->minor_version, profile->major_version),
3808 target_types[profile->type]));
3809 put_u32(&buffer, 0); /* FIXME: compilation flags */
3810 creator_position = put_u32(&buffer, 0);
3811
3812 if (profile->major_version >= 5)
3813 {
3814 put_u32(&buffer, hlsl_version_ge(ctx, 5, 1) ? TAG_RD11_REVERSE : TAG_RD11);
3815 put_u32(&buffer, 15 * sizeof(uint32_t)); /* size of RDEF header including this header */
3816 put_u32(&buffer, 6 * sizeof(uint32_t)); /* size of buffer desc */
3817 put_u32(&buffer, binding_desc_size); /* size of binding desc */
3818 put_u32(&buffer, 10 * sizeof(uint32_t)); /* size of variable desc */
3819 put_u32(&buffer, 9 * sizeof(uint32_t)); /* size of type desc */
3820 put_u32(&buffer, 3 * sizeof(uint32_t)); /* size of member desc */
3821 put_u32(&buffer, 0); /* unknown; possibly a null terminator */
3822 }
3823
3824 /* Bound resources. */
3825
3826 resources_offset = bytecode_align(&buffer);
3827 set_u32(&buffer, resource_position, resources_offset);
3828
3829 for (i = 0; i < extern_resources_count; ++i)
3830 {
3831 const struct extern_resource *resource = &extern_resources[i];
3832 uint32_t flags = 0;
3833
3834 if (resource->is_user_packed)
3835 flags |= D3D_SIF_USERPACKED;
3836
3837 put_u32(&buffer, 0); /* name */
3838 if (resource->buffer)
3839 put_u32(&buffer, resource->buffer->type == HLSL_BUFFER_CONSTANT ? D3D_SIT_CBUFFER : D3D_SIT_TBUFFER);
3840 else
3841 put_u32(&buffer, sm4_resource_type(resource->component_type));
3842 if (resource->regset == HLSL_REGSET_TEXTURES || resource->regset == HLSL_REGSET_UAVS)
3843 {
3844 unsigned int dimx = resource->component_type->e.resource.format->dimx;
3845
3846 put_u32(&buffer, sm4_data_type(resource->component_type));
3847 put_u32(&buffer, sm4_rdef_resource_dimension(resource->component_type));
3848 put_u32(&buffer, ~0u); /* FIXME: multisample count */
3849 flags |= (dimx - 1) << VKD3D_SM4_SIF_TEXTURE_COMPONENTS_SHIFT;
3850 }
3851 else
3852 {
3853 put_u32(&buffer, 0);
3854 put_u32(&buffer, 0);
3855 put_u32(&buffer, 0);
3856 }
3857 put_u32(&buffer, resource->index);
3858 put_u32(&buffer, resource->bind_count);
3859 put_u32(&buffer, flags);
3860
3861 if (hlsl_version_ge(ctx, 5, 1))
3862 {
3863 put_u32(&buffer, resource->space);
3864 put_u32(&buffer, resource->id);
3865 }
3866 }
3867
3868 for (i = 0; i < extern_resources_count; ++i)
3869 {
3870 const struct extern_resource *resource = &extern_resources[i];
3871
3872 string_offset = put_string(&buffer, resource->name);
3873 set_u32(&buffer, resources_offset + i * binding_desc_size, string_offset);
3874 }
3875
3876 /* Buffers. */
3877
3878 cbuffers_offset = bytecode_align(&buffer);
3879 set_u32(&buffer, cbuffer_position, cbuffers_offset);
3880 LIST_FOR_EACH_ENTRY(cbuffer, &ctx->buffers, struct hlsl_buffer, entry)
3881 {
3882 unsigned int var_count = 0;
3883
3884 if (!cbuffer->reg.allocated)
3885 continue;
3886
3887 LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
3888 {
3889 if (var->is_uniform && var->buffer == cbuffer && var->data_type->reg_size[HLSL_REGSET_NUMERIC])
3890 ++var_count;
3891 }
3892
3893 put_u32(&buffer, 0); /* name */
3894 put_u32(&buffer, var_count);
3895 put_u32(&buffer, 0); /* variable offset */
3896 put_u32(&buffer, align(cbuffer->size, 4) * sizeof(float));
3897 put_u32(&buffer, 0); /* FIXME: flags */
3898 put_u32(&buffer, cbuffer->type == HLSL_BUFFER_CONSTANT ? D3D_CT_CBUFFER : D3D_CT_TBUFFER);
3899 }
3900
3901 i = 0;
3902 LIST_FOR_EACH_ENTRY(cbuffer, &ctx->buffers, struct hlsl_buffer, entry)
3903 {
3904 if (!cbuffer->reg.allocated)
3905 continue;
3906
3907 string_offset = put_string(&buffer, cbuffer->name);
3908 set_u32(&buffer, cbuffers_offset + i++ * 6 * sizeof(uint32_t), string_offset);
3909 }
3910
3911 i = 0;
3912 LIST_FOR_EACH_ENTRY(cbuffer, &ctx->buffers, struct hlsl_buffer, entry)
3913 {
3914 size_t vars_start = bytecode_align(&buffer);
3915
3916 if (!cbuffer->reg.allocated)
3917 continue;
3918
3919 set_u32(&buffer, cbuffers_offset + (i++ * 6 + 2) * sizeof(uint32_t), vars_start);
3920
3921 LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
3922 {
3923 if (var->is_uniform && var->buffer == cbuffer && var->data_type->reg_size[HLSL_REGSET_NUMERIC])
3924 {
3925 uint32_t flags = 0;
3926
3927 if (var->is_read)
3928 flags |= D3D_SVF_USED;
3929
3930 put_u32(&buffer, 0); /* name */
3931 put_u32(&buffer, var->buffer_offset * sizeof(float));
3932 put_u32(&buffer, var->data_type->reg_size[HLSL_REGSET_NUMERIC] * sizeof(float));
3933 put_u32(&buffer, flags);
3934 put_u32(&buffer, 0); /* type */
3935 put_u32(&buffer, 0); /* default value */
3936
3937 if (profile->major_version >= 5)
3938 {
3939 put_u32(&buffer, 0); /* texture start */
3940 put_u32(&buffer, 0); /* texture count */
3941 put_u32(&buffer, 0); /* sampler start */
3942 put_u32(&buffer, 0); /* sampler count */
3943 }
3944 }
3945 }
3946
3947 j = 0;
3948 LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
3949 {
3950 if (var->is_uniform && var->buffer == cbuffer && var->data_type->reg_size[HLSL_REGSET_NUMERIC])
3951 {
3952 const unsigned int var_size = (profile->major_version >= 5 ? 10 : 6);
3953 size_t var_offset = vars_start + j * var_size * sizeof(uint32_t);
3954
3955 string_offset = put_string(&buffer, var->name);
3956 set_u32(&buffer, var_offset, string_offset);
3957 write_sm4_type(ctx, &buffer, var->data_type);
3958 set_u32(&buffer, var_offset + 4 * sizeof(uint32_t), var->data_type->bytecode_offset);
3959
3960 if (var->default_values)
3961 {
3962 unsigned int reg_size = var->data_type->reg_size[HLSL_REGSET_NUMERIC];
3963 unsigned int comp_count = hlsl_type_component_count(var->data_type);
3964 unsigned int default_value_offset;
3965 unsigned int k;
3966
3967 default_value_offset = bytecode_reserve_bytes(&buffer, reg_size * sizeof(uint32_t));
3968 set_u32(&buffer, var_offset + 5 * sizeof(uint32_t), default_value_offset);
3969
3970 for (k = 0; k < comp_count; ++k)
3971 {
3972 struct hlsl_type *comp_type = hlsl_type_get_component_type(ctx, var->data_type, k);
3973 unsigned int comp_offset, comp_index;
3974 enum hlsl_regset regset;
3975
3976 if (comp_type->class == HLSL_CLASS_STRING)
3977 {
3978 hlsl_error(ctx, &var->loc, VKD3D_SHADER_ERROR_HLSL_INVALID_TYPE,
3979 "Cannot write string default value.");
3980 continue;
3981 }
3982
3983 comp_index = get_component_index_from_default_initializer_index(var->data_type, k);
3984 comp_offset = hlsl_type_get_component_offset(ctx, var->data_type, comp_index, &regset);
3985 if (regset == HLSL_REGSET_NUMERIC)
3986 {
3987 if (comp_type->e.numeric.type == HLSL_TYPE_DOUBLE)
3988 hlsl_fixme(ctx, &var->loc, "Write double default values.");
3989
3990 set_u32(&buffer, default_value_offset + comp_offset * sizeof(uint32_t),
3991 var->default_values[k].number.u);
3992 }
3993 }
3994 }
3995 ++j;
3996 }
3997 }
3998 }
3999
4000 creator_offset = put_string(&buffer, vkd3d_shader_get_version(NULL, NULL));
4001 set_u32(&buffer, creator_position, creator_offset);
4002
4003 add_section(ctx, dxbc, TAG_RDEF, &buffer);
4004
4005 sm4_free_extern_resources(extern_resources, extern_resources_count);
4006}
reg_size
static const unsigned char reg_size[]
Definition: amd64_sup.c:21
D3D_SIF_USERPACKED
@ D3D_SIF_USERPACKED
Definition: d3dcommon.idl:283
D3D_SIT_CBUFFER
@ D3D_SIT_CBUFFER
Definition: d3dcommon.idl:694
D3D_SIT_TBUFFER
@ D3D_SIT_TBUFFER
Definition: d3dcommon.idl:695
D3D_CT_TBUFFER
@ D3D_CT_TBUFFER
Definition: d3dcommon.idl:536
D3D_CT_CBUFFER
@ D3D_CT_CBUFFER
Definition: d3dcommon.idl:535
D3D_SVF_USED
@ D3D_SVF_USED
Definition: d3dcommon.idl:156
TAG_RDEF
#define TAG_RDEF
Definition: d3dcompiler_private.h:531
HLSL_BUFFER_CONSTANT
@ HLSL_BUFFER_CONSTANT
Definition: hlsl.h:985
profile
#define profile
Definition: kernel32.h:12
hlsl_buffer::type
enum hlsl_buffer_type type
Definition: hlsl.h:995
hlsl_buffer::size
unsigned size
Definition: hlsl.h:1009
hlsl_profile_info
Definition: hlsl.h:968
hlsl_type::numeric
struct hlsl_type::@5997::@5998 numeric
VKD3D_SM4_SIF_TEXTURE_COMPONENTS_SHIFT
#define VKD3D_SM4_SIF_TEXTURE_COMPONENTS_SHIFT
Definition: tpf.c:167
sm4_resource_type
static D3D_SHADER_INPUT_TYPE sm4_resource_type(const struct hlsl_type *type)
Definition: tpf.c:3432
sm4_rdef_resource_dimension
static D3D_SRV_DIMENSION sm4_rdef_resource_dimension(const struct hlsl_type *type)
Definition: tpf.c:3479
write_sm4_type
static void write_sm4_type(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer, struct hlsl_type *type)
Definition: tpf.c:3360
TAG_RD11
#define TAG_RD11
Definition: vkd3d_common.h:78
TAG_RD11_REVERSE
#define TAG_RD11_REVERSE
Definition: vkd3d_common.h:90
vkd3d_shader_get_version
VKD3D_SHADER_API const char * vkd3d_shader_get_version(unsigned int *major, unsigned int *minor)
Definition: vkd3d_shader_main.c:1919
bytecode_reserve_bytes
size_t bytecode_reserve_bytes(struct vkd3d_bytecode_buffer *buffer, size_t size)
Definition: vkd3d_shader_main.c:408
align
static size_t align(size_t addr, size_t alignment)
Definition: wined3d_private.h:54

Referenced by tpf_compile().

◆ write_sm4_resinfo()

static void write_sm4_resinfo ( const struct tpf_compiler *  tpf,
const struct hlsl_ir_resource_load *  load 
)
static

Definition at line 5219 of file tpf.c.

5220{
5221 const struct hlsl_deref *resource = &load->resource;
5222 const struct hlsl_ir_node *dst = &load->node;
5223 struct sm4_instruction instr;
5224
5225 if (resource->data_type->sampler_dim == HLSL_SAMPLER_DIM_BUFFER
5226 || resource->data_type->sampler_dim == HLSL_SAMPLER_DIM_STRUCTURED_BUFFER)
5227 {
5228 hlsl_fixme(tpf->ctx, &load->node.loc, "resinfo for buffers.");
5229 return;
5230 }
5231
5232 VKD3D_ASSERT(dst->data_type->e.numeric.type == HLSL_TYPE_UINT || dst->data_type->e.numeric.type == HLSL_TYPE_FLOAT);
5233
5234 memset(&instr, 0, sizeof(instr));
5235 instr.opcode = VKD3D_SM4_OP_RESINFO;
5236 if (dst->data_type->e.numeric.type == HLSL_TYPE_UINT)
5237 instr.extra_bits |= VKD3DSI_RESINFO_UINT << VKD3D_SM4_INSTRUCTION_FLAGS_SHIFT;
5238
5239 sm4_dst_from_node(&instr.dsts[0], dst);
5240 instr.dst_count = 1;
5241
5242 sm4_src_from_node(tpf, &instr.srcs[0], load->lod.node, VKD3DSP_WRITEMASK_ALL);
5243 sm4_src_from_deref(tpf, &instr.srcs[1], resource, instr.dsts[0].write_mask, &instr);
5244 instr.src_count = 2;
5245
5246 write_sm4_instruction(tpf, &instr);
5247}
hlsl_deref
Definition: hlsl.h:795
VKD3DSI_RESINFO_UINT
#define VKD3DSI_RESINFO_UINT
Definition: vkd3d_shader_private.h:853

Referenced by write_sm4_resource_load().

◆ write_sm4_resource_load()

static void write_sm4_resource_load ( const struct tpf_compiler *  tpf,
const struct hlsl_ir_resource_load *  load 
)
static

Definition at line 5423 of file tpf.c.

5424{
5425 const struct hlsl_ir_node *texel_offset = load->texel_offset.node;
5426 const struct hlsl_ir_node *sample_index = load->sample_index.node;
5427 const struct hlsl_ir_node *coords = load->coords.node;
5428
5429 if (load->sampler.var && !load->sampler.var->is_uniform)
5430 {
5431 hlsl_fixme(tpf->ctx, &load->node.loc, "Sample using non-uniform sampler variable.");
5432 return;
5433 }
5434
5435 if (!load->resource.var->is_uniform)
5436 {
5437 hlsl_fixme(tpf->ctx, &load->node.loc, "Load from non-uniform resource variable.");
5438 return;
5439 }
5440
5441 switch (load->load_type)
5442 {
5443 case HLSL_RESOURCE_LOAD:
5444 write_sm4_ld(tpf, &load->node, &load->resource,
5445 coords, sample_index, texel_offset, load->sampling_dim);
5446 break;
5447
5448 case HLSL_RESOURCE_SAMPLE:
5449 case HLSL_RESOURCE_SAMPLE_CMP:
5450 case HLSL_RESOURCE_SAMPLE_CMP_LZ:
5451 case HLSL_RESOURCE_SAMPLE_LOD:
5452 case HLSL_RESOURCE_SAMPLE_LOD_BIAS:
5453 case HLSL_RESOURCE_SAMPLE_GRAD:
5454 /* Combined sample expressions were lowered. */
5455 VKD3D_ASSERT(load->sampler.var);
5456 write_sm4_sample(tpf, load);
5457 break;
5458
5459 case HLSL_RESOURCE_GATHER_RED:
5460 write_sm4_gather(tpf, &load->node, &load->resource, &load->sampler, coords,
5461 VKD3D_SHADER_SWIZZLE(X, X, X, X), texel_offset);
5462 break;
5463
5464 case HLSL_RESOURCE_GATHER_GREEN:
5465 write_sm4_gather(tpf, &load->node, &load->resource, &load->sampler, coords,
5466 VKD3D_SHADER_SWIZZLE(Y, Y, Y, Y), texel_offset);
5467 break;
5468
5469 case HLSL_RESOURCE_GATHER_BLUE:
5470 write_sm4_gather(tpf, &load->node, &load->resource, &load->sampler, coords,
5471 VKD3D_SHADER_SWIZZLE(Z, Z, Z, Z), texel_offset);
5472 break;
5473
5474 case HLSL_RESOURCE_GATHER_ALPHA:
5475 write_sm4_gather(tpf, &load->node, &load->resource, &load->sampler, coords,
5476 VKD3D_SHADER_SWIZZLE(W, W, W, W), texel_offset);
5477 break;
5478
5479 case HLSL_RESOURCE_SAMPLE_INFO:
5480 write_sm4_sampleinfo(tpf, load);
5481 break;
5482
5483 case HLSL_RESOURCE_RESINFO:
5484 write_sm4_resinfo(tpf, load);
5485 break;
5486
5487 case HLSL_RESOURCE_SAMPLE_PROJ:
5488 vkd3d_unreachable();
5489 }
5490}
Z
#define Z(I)
Y
#define Y(I)
HLSL_RESOURCE_SAMPLE
@ HLSL_RESOURCE_SAMPLE
Definition: hlsl.h:836
HLSL_RESOURCE_GATHER_BLUE
@ HLSL_RESOURCE_GATHER_BLUE
Definition: hlsl.h:845
HLSL_RESOURCE_SAMPLE_GRAD
@ HLSL_RESOURCE_SAMPLE_GRAD
Definition: hlsl.h:841
HLSL_RESOURCE_SAMPLE_CMP
@ HLSL_RESOURCE_SAMPLE_CMP
Definition: hlsl.h:837
HLSL_RESOURCE_SAMPLE_CMP_LZ
@ HLSL_RESOURCE_SAMPLE_CMP_LZ
Definition: hlsl.h:838
HLSL_RESOURCE_RESINFO
@ HLSL_RESOURCE_RESINFO
Definition: hlsl.h:848
HLSL_RESOURCE_SAMPLE_LOD_BIAS
@ HLSL_RESOURCE_SAMPLE_LOD_BIAS
Definition: hlsl.h:840
HLSL_RESOURCE_SAMPLE_PROJ
@ HLSL_RESOURCE_SAMPLE_PROJ
Definition: hlsl.h:842
HLSL_RESOURCE_SAMPLE_INFO
@ HLSL_RESOURCE_SAMPLE_INFO
Definition: hlsl.h:847
HLSL_RESOURCE_GATHER_GREEN
@ HLSL_RESOURCE_GATHER_GREEN
Definition: hlsl.h:844
HLSL_RESOURCE_GATHER_RED
@ HLSL_RESOURCE_GATHER_RED
Definition: hlsl.h:843
HLSL_RESOURCE_SAMPLE_LOD
@ HLSL_RESOURCE_SAMPLE_LOD
Definition: hlsl.h:839
HLSL_RESOURCE_LOAD
@ HLSL_RESOURCE_LOAD
Definition: hlsl.h:835
HLSL_RESOURCE_GATHER_ALPHA
@ HLSL_RESOURCE_GATHER_ALPHA
Definition: hlsl.h:846
W
Definition: polytest.cpp:36
write_sm4_ld
static void write_sm4_ld(const struct tpf_compiler *tpf, const struct hlsl_ir_node *dst, const struct hlsl_deref *resource, const struct hlsl_ir_node *coords, const struct hlsl_ir_node *sample_index, const struct hlsl_ir_node *texel_offset, enum hlsl_sampler_dim dim)
Definition: tpf.c:5035
write_sm4_sampleinfo
static void write_sm4_sampleinfo(const struct tpf_compiler *tpf, const struct hlsl_ir_resource_load *load)
Definition: tpf.c:5197
write_sm4_gather
static void write_sm4_gather(const struct tpf_compiler *tpf, const struct hlsl_ir_node *dst, const struct hlsl_deref *resource, const struct hlsl_deref *sampler, const struct hlsl_ir_node *coords, uint32_t swizzle, const struct hlsl_ir_node *texel_offset)
Definition: tpf.c:5381
write_sm4_sample
static void write_sm4_sample(const struct tpf_compiler *tpf, const struct hlsl_ir_resource_load *load)
Definition: tpf.c:5117
write_sm4_resinfo
static void write_sm4_resinfo(const struct tpf_compiler *tpf, const struct hlsl_ir_resource_load *load)
Definition: tpf.c:5219

Referenced by write_sm4_block().

◆ write_sm4_resource_store()

static void write_sm4_resource_store ( const struct tpf_compiler *  tpf,
const struct hlsl_ir_resource_store *  store 
)
static

Definition at line 5492 of file tpf.c.

5493{
5494 struct hlsl_type *resource_type = hlsl_deref_get_type(tpf->ctx, &store->resource);
5495 struct hlsl_ir_node *coords = store->coords.node, *value = store->value.node;
5496 struct sm4_instruction instr;
5497
5498 if (!store->resource.var->is_uniform)
5499 {
5500 hlsl_fixme(tpf->ctx, &store->node.loc, "Store to non-uniform resource variable.");
5501 return;
5502 }
5503
5504 if (resource_type->sampler_dim == HLSL_SAMPLER_DIM_STRUCTURED_BUFFER)
5505 {
5506 hlsl_fixme(tpf->ctx, &store->node.loc, "Structured buffers store is not implemented.");
5507 return;
5508 }
5509
5510 memset(&instr, 0, sizeof(instr));
5511
5512 sm4_register_from_deref(tpf, &instr.dsts[0].reg, &instr.dsts[0].write_mask, &store->resource, &instr);
5513 instr.dst_count = 1;
5514 if (resource_type->sampler_dim == HLSL_SAMPLER_DIM_RAW_BUFFER)
5515 {
5516 instr.opcode = VKD3D_SM5_OP_STORE_RAW;
5517 instr.dsts[0].write_mask = vkd3d_write_mask_from_component_count(value->data_type->dimx);
5518 }
5519 else
5520 {
5521 instr.opcode = VKD3D_SM5_OP_STORE_UAV_TYPED;
5522 }
5523
5524 sm4_src_from_node(tpf, &instr.srcs[0], coords, VKD3DSP_WRITEMASK_ALL);
5525 sm4_src_from_node(tpf, &instr.srcs[1], value, VKD3DSP_WRITEMASK_ALL);
5526 instr.src_count = 2;
5527
5528 write_sm4_instruction(tpf, &instr);
5529}
hlsl_ir_resource_store::node
struct hlsl_ir_node node
Definition: hlsl.h:862
hlsl_ir_resource_store::value
struct hlsl_src coords value
Definition: hlsl.h:864
hlsl_ir_resource_store::resource
struct hlsl_deref resource
Definition: hlsl.h:863
vkd3d_write_mask_from_component_count
static unsigned int vkd3d_write_mask_from_component_count(unsigned int component_count)
Definition: vkd3d_shader_private.h:1785

Referenced by write_sm4_block().

◆ write_sm4_ret()

static void write_sm4_ret ( const struct tpf_compiler *  tpf)
static

Definition at line 5025 of file tpf.c.

5026{
5027 struct sm4_instruction instr =
5028 {
5029 .opcode = VKD3D_SM4_OP_RET,
5030 };
5031
5032 write_sm4_instruction(tpf, &instr);
5033}

Referenced by tpf_write_shader_function().

◆ write_sm4_sample()

static void write_sm4_sample ( const struct tpf_compiler *  tpf,
const struct hlsl_ir_resource_load *  load 
)
static

Definition at line 5117 of file tpf.c.

5118{
5119 const struct hlsl_ir_node *texel_offset = load->texel_offset.node;
5120 const struct hlsl_ir_node *coords = load->coords.node;
5121 const struct hlsl_deref *resource = &load->resource;
5122 const struct hlsl_deref *sampler = &load->sampler;
5123 const struct hlsl_ir_node *dst = &load->node;
5124 struct sm4_instruction instr;
5125
5126 memset(&instr, 0, sizeof(instr));
5127 switch (load->load_type)
5128 {
5129 case HLSL_RESOURCE_SAMPLE:
5130 instr.opcode = VKD3D_SM4_OP_SAMPLE;
5131 break;
5132
5133 case HLSL_RESOURCE_SAMPLE_CMP:
5134 instr.opcode = VKD3D_SM4_OP_SAMPLE_C;
5135 break;
5136
5137 case HLSL_RESOURCE_SAMPLE_CMP_LZ:
5138 instr.opcode = VKD3D_SM4_OP_SAMPLE_C_LZ;
5139 break;
5140
5141 case HLSL_RESOURCE_SAMPLE_LOD:
5142 instr.opcode = VKD3D_SM4_OP_SAMPLE_LOD;
5143 break;
5144
5145 case HLSL_RESOURCE_SAMPLE_LOD_BIAS:
5146 instr.opcode = VKD3D_SM4_OP_SAMPLE_B;
5147 break;
5148
5149 case HLSL_RESOURCE_SAMPLE_GRAD:
5150 instr.opcode = VKD3D_SM4_OP_SAMPLE_GRAD;
5151 break;
5152
5153 default:
5154 vkd3d_unreachable();
5155 }
5156
5157 if (texel_offset)
5158 {
5159 if (!encode_texel_offset_as_aoffimmi(&instr, texel_offset))
5160 {
5161 hlsl_error(tpf->ctx, &texel_offset->loc, VKD3D_SHADER_ERROR_HLSL_INVALID_TEXEL_OFFSET,
5162 "Offset must resolve to integer literal in the range -8 to 7.");
5163 return;
5164 }
5165 }
5166
5167 sm4_dst_from_node(&instr.dsts[0], dst);
5168 instr.dst_count = 1;
5169
5170 sm4_src_from_node(tpf, &instr.srcs[0], coords, VKD3DSP_WRITEMASK_ALL);
5171 sm4_src_from_deref(tpf, &instr.srcs[1], resource, instr.dsts[0].write_mask, &instr);
5172 sm4_src_from_deref(tpf, &instr.srcs[2], sampler, VKD3DSP_WRITEMASK_ALL, &instr);
5173 instr.src_count = 3;
5174
5175 if (load->load_type == HLSL_RESOURCE_SAMPLE_LOD
5176 || load->load_type == HLSL_RESOURCE_SAMPLE_LOD_BIAS)
5177 {
5178 sm4_src_from_node(tpf, &instr.srcs[3], load->lod.node, VKD3DSP_WRITEMASK_ALL);
5179 ++instr.src_count;
5180 }
5181 else if (load->load_type == HLSL_RESOURCE_SAMPLE_GRAD)
5182 {
5183 sm4_src_from_node(tpf, &instr.srcs[3], load->ddx.node, VKD3DSP_WRITEMASK_ALL);
5184 sm4_src_from_node(tpf, &instr.srcs[4], load->ddy.node, VKD3DSP_WRITEMASK_ALL);
5185 instr.src_count += 2;
5186 }
5187 else if (load->load_type == HLSL_RESOURCE_SAMPLE_CMP
5188 || load->load_type == HLSL_RESOURCE_SAMPLE_CMP_LZ)
5189 {
5190 sm4_src_from_node(tpf, &instr.srcs[3], load->cmp.node, VKD3DSP_WRITEMASK_ALL);
5191 ++instr.src_count;
5192 }
5193
5194 write_sm4_instruction(tpf, &instr);
5195}

Referenced by write_sm4_resource_load().

◆ write_sm4_sampleinfo()

static void write_sm4_sampleinfo ( const struct tpf_compiler *  tpf,
const struct hlsl_ir_resource_load *  load 
)
static

Definition at line 5197 of file tpf.c.

5198{
5199 const struct hlsl_deref *resource = &load->resource;
5200 const struct hlsl_ir_node *dst = &load->node;
5201 struct sm4_instruction instr;
5202
5203 VKD3D_ASSERT(dst->data_type->e.numeric.type == HLSL_TYPE_UINT || dst->data_type->e.numeric.type == HLSL_TYPE_FLOAT);
5204
5205 memset(&instr, 0, sizeof(instr));
5206 instr.opcode = VKD3D_SM4_OP_SAMPLE_INFO;
5207 if (dst->data_type->e.numeric.type == HLSL_TYPE_UINT)
5208 instr.extra_bits |= VKD3DSI_SAMPLE_INFO_UINT << VKD3D_SM4_INSTRUCTION_FLAGS_SHIFT;
5209
5210 sm4_dst_from_node(&instr.dsts[0], dst);
5211 instr.dst_count = 1;
5212
5213 sm4_src_from_deref(tpf, &instr.srcs[0], resource, instr.dsts[0].write_mask, &instr);
5214 instr.src_count = 1;
5215
5216 write_sm4_instruction(tpf, &instr);
5217}
VKD3DSI_SAMPLE_INFO_UINT
#define VKD3DSI_SAMPLE_INFO_UINT
Definition: vkd3d_shader_private.h:854

Referenced by write_sm4_resource_load().

◆ write_sm4_store()

static void write_sm4_store ( const struct tpf_compiler *  tpf,
const struct hlsl_ir_store *  store 
)
static

Definition at line 5531 of file tpf.c.

5532{
5533 const struct hlsl_ir_node *rhs = store->rhs.node;
5534 struct sm4_instruction instr;
5535 uint32_t writemask;
5536
5537 memset(&instr, 0, sizeof(instr));
5538 instr.opcode = VKD3D_SM4_OP_MOV;
5539
5540 sm4_register_from_deref(tpf, &instr.dsts[0].reg, &writemask, &store->lhs, &instr);
5541 instr.dsts[0].write_mask = hlsl_combine_writemasks(writemask, store->writemask);
5542 instr.dst_count = 1;
5543
5544 sm4_src_from_node(tpf, &instr.srcs[0], rhs, instr.dsts[0].write_mask);
5545 instr.src_count = 1;
5546
5547 write_sm4_instruction(tpf, &instr);
5548}
hlsl_ir_store::rhs
struct hlsl_src rhs
Definition: hlsl.h:871
hlsl_ir_store::lhs
struct hlsl_deref lhs
Definition: hlsl.h:870
hlsl_ir_store::writemask
unsigned char writemask
Definition: hlsl.h:872

Referenced by write_sm4_block().

◆ write_sm4_switch()

static void write_sm4_switch ( struct tpf_compiler *  tpf,
const struct hlsl_ir_switch *  s 
)
static

Definition at line 5550 of file tpf.c.

5551{
5552 const struct hlsl_ir_node *selector = s->selector.node;
5553 struct hlsl_ir_switch_case *c;
5554 struct sm4_instruction instr;
5555
5556 memset(&instr, 0, sizeof(instr));
5557 instr.opcode = VKD3D_SM4_OP_SWITCH;
5558
5559 sm4_src_from_node(tpf, &instr.srcs[0], selector, VKD3DSP_WRITEMASK_ALL);
5560 instr.src_count = 1;
5561
5562 write_sm4_instruction(tpf, &instr);
5563
5564 LIST_FOR_EACH_ENTRY(c, &s->cases, struct hlsl_ir_switch_case, entry)
5565 {
5566 memset(&instr, 0, sizeof(instr));
5567 if (c->is_default)
5568 {
5569 instr.opcode = VKD3D_SM4_OP_DEFAULT;
5570 }
5571 else
5572 {
5573 struct hlsl_constant_value value = { .u[0].u = c->value };
5574
5575 instr.opcode = VKD3D_SM4_OP_CASE;
5576 sm4_src_from_constant_value(&instr.srcs[0], &value, 1, VKD3DSP_WRITEMASK_ALL);
5577 instr.src_count = 1;
5578 }
5579
5580 write_sm4_instruction(tpf, &instr);
5581 write_sm4_block(tpf, &c->body);
5582 }
5583
5584 memset(&instr, 0, sizeof(instr));
5585 instr.opcode = VKD3D_SM4_OP_ENDSWITCH;
5586
5587 write_sm4_instruction(tpf, &instr);
5588}
c
const GLubyte * c
Definition: glext.h:8905
c
#define c
Definition: ke_i.h:80
hlsl_ir_switch_case
Definition: hlsl.h:665

Referenced by write_sm4_block().

◆ write_sm4_swizzle()

static void write_sm4_swizzle ( const struct tpf_compiler *  tpf,
const struct hlsl_ir_swizzle *  swizzle 
)
static

Definition at line 5590 of file tpf.c.

5591{
5592 unsigned int hlsl_swizzle;
5593 struct sm4_instruction instr;
5594 uint32_t writemask;
5595
5596 memset(&instr, 0, sizeof(instr));
5597 instr.opcode = VKD3D_SM4_OP_MOV;
5598
5599 sm4_dst_from_node(&instr.dsts[0], &swizzle->node);
5600 instr.dst_count = 1;
5601
5602 sm4_register_from_node(&instr.srcs[0].reg, &writemask, swizzle->val.node);
5603 hlsl_swizzle = hlsl_map_swizzle(hlsl_combine_swizzles(hlsl_swizzle_from_writemask(writemask),
5604 swizzle->swizzle, swizzle->node.data_type->dimx), instr.dsts[0].write_mask);
5605 instr.srcs[0].swizzle = swizzle_from_sm4(hlsl_swizzle);
5606 instr.src_count = 1;
5607
5608 write_sm4_instruction(tpf, &instr);
5609}
hlsl_combine_swizzles
uint32_t hlsl_combine_swizzles(uint32_t first, uint32_t second, unsigned int dim)
Definition: hlsl.c:4042

Referenced by write_sm4_block().

◆ write_sm4_type()

static void write_sm4_type ( struct hlsl_ctx *  ctx,
struct vkd3d_bytecode_buffer *  buffer,
struct hlsl_type *  type 
)
static

Definition at line 3360 of file tpf.c.

3361{
3362 const struct hlsl_type *array_type = hlsl_get_multiarray_element_type(type);
3363 const char *name = array_type->name ? array_type->name : "<unnamed>";
3364 const struct hlsl_profile_info *profile = ctx->profile;
3365 unsigned int array_size = 0;
3366 size_t name_offset = 0;
3367 size_t i;
3368
3369 if (type->bytecode_offset)
3370 return;
3371
3372 if (profile->major_version >= 5)
3373 name_offset = put_string(buffer, name);
3374
3375 if (type->class == HLSL_CLASS_ARRAY)
3376 array_size = hlsl_get_multiarray_size(type);
3377
3378 if (array_type->class == HLSL_CLASS_STRUCT)
3379 {
3380 unsigned int field_count = 0;
3381 size_t fields_offset = 0;
3382
3383 for (i = 0; i < array_type->e.record.field_count; ++i)
3384 {
3385 struct hlsl_struct_field *field = &array_type->e.record.fields[i];
3386
3387 if (!field->type->reg_size[HLSL_REGSET_NUMERIC])
3388 continue;
3389
3390 field->name_bytecode_offset = put_string(buffer, field->name);
3391 write_sm4_type(ctx, buffer, field->type);
3392 ++field_count;
3393 }
3394
3395 fields_offset = bytecode_align(buffer);
3396
3397 for (i = 0; i < array_type->e.record.field_count; ++i)
3398 {
3399 struct hlsl_struct_field *field = &array_type->e.record.fields[i];
3400
3401 if (!field->type->reg_size[HLSL_REGSET_NUMERIC])
3402 continue;
3403
3404 put_u32(buffer, field->name_bytecode_offset);
3405 put_u32(buffer, field->type->bytecode_offset);
3406 put_u32(buffer, field->reg_offset[HLSL_REGSET_NUMERIC] * sizeof(float));
3407 }
3408 type->bytecode_offset = put_u32(buffer, vkd3d_make_u32(D3D_SVC_STRUCT, D3D_SVT_VOID));
3409 put_u32(buffer, vkd3d_make_u32(1, hlsl_type_component_count(array_type)));
3410 put_u32(buffer, vkd3d_make_u32(array_size, field_count));
3411 put_u32(buffer, fields_offset);
3412 }
3413 else
3414 {
3415 VKD3D_ASSERT(array_type->class <= HLSL_CLASS_LAST_NUMERIC);
3416 type->bytecode_offset = put_u32(buffer, vkd3d_make_u32(sm4_class(array_type), sm4_base_type(array_type)));
3417 put_u32(buffer, vkd3d_make_u32(array_type->dimy, array_type->dimx));
3418 put_u32(buffer, vkd3d_make_u32(array_size, 0));
3419 put_u32(buffer, 1);
3420 }
3421
3422 if (profile->major_version >= 5)
3423 {
3424 put_u32(buffer, 0); /* FIXME: unknown */
3425 put_u32(buffer, 0); /* FIXME: unknown */
3426 put_u32(buffer, 0); /* FIXME: unknown */
3427 put_u32(buffer, 0); /* FIXME: unknown */
3428 put_u32(buffer, name_offset);
3429 }
3430}
D3D_SVC_STRUCT
@ D3D_SVC_STRUCT
Definition: d3dcommon.idl:139
D3D_SVT_VOID
@ D3D_SVT_VOID
Definition: d3dcommon.idl:168
hlsl_get_multiarray_element_type
const struct hlsl_type * hlsl_get_multiarray_element_type(const struct hlsl_type *type)
Definition: hlsl.c:226
hlsl_get_multiarray_size
unsigned int hlsl_get_multiarray_size(const struct hlsl_type *type)
Definition: hlsl.c:233
HLSL_CLASS_LAST_NUMERIC
@ HLSL_CLASS_LAST_NUMERIC
Definition: hlsl.h:86
array_size
static UINT array_size
Definition: msctf.cpp:39
field
Definition: parser.c:44
hlsl_struct_field
Definition: hlsl.h:259
hlsl_type::dimx
unsigned int dimx
Definition: hlsl.h:187
hlsl_type::name
const char * name
Definition: hlsl.h:174
hlsl_type::dimy
unsigned int dimy
Definition: hlsl.h:188
sm4_class
static D3D_SHADER_VARIABLE_CLASS sm4_class(const struct hlsl_type *type)
Definition: tpf.c:3296
sm4_base_type
static D3D_SHADER_VARIABLE_TYPE sm4_base_type(const struct hlsl_type *type)
Definition: tpf.c:3340

Referenced by write_sm4_rdef(), and write_sm4_type().

Variable Documentation

◆ control_point_count

unsigned int control_point_count

Definition at line 724 of file tpf.c.

◆ data_type_table

enum vkd3d_data_type data_type_table[]
static
Initial value:
=
{
VKD3D_DATA_FLOAT,
VKD3D_DATA_UNORM,
VKD3D_DATA_SNORM,
VKD3D_DATA_INT,
VKD3D_DATA_UINT,
VKD3D_DATA_FLOAT,
VKD3D_DATA_MIXED,
VKD3D_DATA_DOUBLE,
VKD3D_DATA_CONTINUED,
VKD3D_DATA_UNUSED,
}
VKD3D_DATA_SNORM
@ VKD3D_DATA_SNORM
Definition: vkd3d_shader_private.h:686
VKD3D_DATA_UNORM
@ VKD3D_DATA_UNORM
Definition: vkd3d_shader_private.h:685
VKD3D_DATA_MIXED
@ VKD3D_DATA_MIXED
Definition: vkd3d_shader_private.h:688
VKD3D_DATA_CONTINUED
@ VKD3D_DATA_CONTINUED
Definition: vkd3d_shader_private.h:690

Definition at line 753 of file tpf.c.

Referenced by shader_sm4_read_dcl_resource(), and shader_sm4_read_instruction_modifier().

◆ 

const struct { ... } input_primitive_type_table[]
Initial value:
=
{
[VKD3D_SM4_INPUT_PT_POINT] = {1, VKD3D_PT_POINTLIST},
[VKD3D_SM4_INPUT_PT_LINE] = {2, VKD3D_PT_LINELIST},
[VKD3D_SM4_INPUT_PT_TRIANGLE] = {3, VKD3D_PT_TRIANGLELIST},
[VKD3D_SM4_INPUT_PT_LINEADJ] = {4, VKD3D_PT_LINELIST_ADJ},
[VKD3D_SM4_INPUT_PT_TRIANGLEADJ] = {6, VKD3D_PT_TRIANGLELIST_ADJ},
}
VKD3D_PT_TRIANGLELIST
@ VKD3D_PT_TRIANGLELIST
Definition: vkd3d_shader_private.h:1213
VKD3D_PT_TRIANGLELIST_ADJ
@ VKD3D_PT_TRIANGLELIST_ADJ
Definition: vkd3d_shader_private.h:1218
VKD3D_PT_LINELIST_ADJ
@ VKD3D_PT_LINELIST_ADJ
Definition: vkd3d_shader_private.h:1216
VKD3D_PT_POINTLIST
@ VKD3D_PT_POINTLIST
Definition: vkd3d_shader_private.h:1210
VKD3D_PT_LINELIST
@ VKD3D_PT_LINELIST
Definition: vkd3d_shader_private.h:1211

Referenced by shader_sm4_read_dcl_input_primitive().

◆ output_primitive_type_table

enum vkd3d_primitive_type output_primitive_type_table[]
static
Initial value:
=
{
VKD3D_PT_UNDEFINED,
VKD3D_PT_POINTLIST,
VKD3D_PT_UNDEFINED,
VKD3D_PT_LINESTRIP,
VKD3D_PT_UNDEFINED,
VKD3D_PT_TRIANGLESTRIP,
}
VKD3D_PT_TRIANGLESTRIP
@ VKD3D_PT_TRIANGLESTRIP
Definition: vkd3d_shader_private.h:1214
VKD3D_PT_LINESTRIP
@ VKD3D_PT_LINESTRIP
Definition: vkd3d_shader_private.h:1212

Definition at line 712 of file tpf.c.

Referenced by shader_sm4_read_dcl_output_topology().

◆ register_precision_table

enum vkd3d_shader_register_precision register_precision_table[]
static
Initial value:
=
{
VKD3D_SHADER_REGISTER_PRECISION_DEFAULT,
VKD3D_SHADER_REGISTER_PRECISION_MIN_FLOAT_16,
VKD3D_SHADER_REGISTER_PRECISION_MIN_FLOAT_10,
VKD3D_SHADER_REGISTER_PRECISION_INVALID,
VKD3D_SHADER_REGISTER_PRECISION_MIN_INT_16,
VKD3D_SHADER_REGISTER_PRECISION_MIN_UINT_16,
}
VKD3D_SHADER_REGISTER_PRECISION_MIN_UINT_16
@ VKD3D_SHADER_REGISTER_PRECISION_MIN_UINT_16
Definition: vkd3d_shader_private.h:673
VKD3D_SHADER_REGISTER_PRECISION_MIN_INT_16
@ VKD3D_SHADER_REGISTER_PRECISION_MIN_INT_16
Definition: vkd3d_shader_private.h:672
VKD3D_SHADER_REGISTER_PRECISION_MIN_FLOAT_10
@ VKD3D_SHADER_REGISTER_PRECISION_MIN_FLOAT_10
Definition: vkd3d_shader_private.h:671
VKD3D_SHADER_REGISTER_PRECISION_MIN_FLOAT_16
@ VKD3D_SHADER_REGISTER_PRECISION_MIN_FLOAT_16
Definition: vkd3d_shader_private.h:670

Definition at line 1393 of file tpf.c.

Referenced by shader_sm4_read_param().

◆ resource_type_table

enum vkd3d_shader_resource_type resource_type_table[]
static
Initial value:
=
{
VKD3D_SHADER_RESOURCE_NONE,
VKD3D_SHADER_RESOURCE_BUFFER,
VKD3D_SHADER_RESOURCE_TEXTURE_1D,
VKD3D_SHADER_RESOURCE_TEXTURE_2D,
VKD3D_SHADER_RESOURCE_TEXTURE_2DMS,
VKD3D_SHADER_RESOURCE_TEXTURE_3D,
VKD3D_SHADER_RESOURCE_TEXTURE_CUBE,
VKD3D_SHADER_RESOURCE_TEXTURE_1DARRAY,
VKD3D_SHADER_RESOURCE_TEXTURE_2DARRAY,
VKD3D_SHADER_RESOURCE_TEXTURE_2DMSARRAY,
VKD3D_SHADER_RESOURCE_TEXTURE_CUBEARRAY,
VKD3D_SHADER_RESOURCE_BUFFER,
VKD3D_SHADER_RESOURCE_BUFFER,
}
VKD3D_SHADER_RESOURCE_TEXTURE_2DARRAY
@ VKD3D_SHADER_RESOURCE_TEXTURE_2DARRAY
Definition: vkd3d_shader.h:1854
VKD3D_SHADER_RESOURCE_TEXTURE_3D
@ VKD3D_SHADER_RESOURCE_TEXTURE_3D
Definition: vkd3d_shader.h:1848
VKD3D_SHADER_RESOURCE_TEXTURE_1DARRAY
@ VKD3D_SHADER_RESOURCE_TEXTURE_1DARRAY
Definition: vkd3d_shader.h:1852
VKD3D_SHADER_RESOURCE_BUFFER
@ VKD3D_SHADER_RESOURCE_BUFFER
Definition: vkd3d_shader.h:1840
VKD3D_SHADER_RESOURCE_TEXTURE_CUBE
@ VKD3D_SHADER_RESOURCE_TEXTURE_CUBE
Definition: vkd3d_shader.h:1850
VKD3D_SHADER_RESOURCE_TEXTURE_1D
@ VKD3D_SHADER_RESOURCE_TEXTURE_1D
Definition: vkd3d_shader.h:1842
VKD3D_SHADER_RESOURCE_TEXTURE_CUBEARRAY
@ VKD3D_SHADER_RESOURCE_TEXTURE_CUBEARRAY
Definition: vkd3d_shader.h:1858
VKD3D_SHADER_RESOURCE_TEXTURE_2D
@ VKD3D_SHADER_RESOURCE_TEXTURE_2D
Definition: vkd3d_shader.h:1844

Definition at line 736 of file tpf.c.

Referenced by shader_sm4_read_dcl_resource(), and shader_sm4_read_instruction_modifier().

◆ vkd3d_type

enum vkd3d_primitive_type vkd3d_type

Definition at line 725 of file tpf.c.

Referenced by get_info_from_vkd3d_register_type(), shader_spirv_resource_bindings_add_binding(), and vkd3d_sm4_get_default_swizzle_type().