ReactOS 0.4.15-dev-8093-g3285f69
pci.h File Reference
#include <ntifs.h>
#include <wdmguid.h>
#include <wchar.h>
#include <acpiioct.h>
#include <drivers/pci/pci.h>
#include <drivers/acpi/acpi.h>
#include <ndk/halfuncs.h>
#include <ndk/rtlfuncs.h>
#include <ndk/vffuncs.h>
#include <arbiter.h>
#include <cmreslist.h>
Include dependency graph for pci.h:
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Go to the source code of this file.

Classes

struct  _PCI_HACK_ENTRY
 
struct  _PCI_POWER_STATE
 
struct  _PCI_LOCK
 
struct  _PCI_FDO_EXTENSION
 
struct  _PCI_FUNCTION_RESOURCES
 
union  _PCI_HEADER_TYPE_DEPENDENT
 
struct  _PCI_PDO_EXTENSION
 
struct  _PCI_MN_DISPATCH_TABLE
 
struct  _PCI_MJ_DISPATCH_TABLE
 
struct  _PCI_INTERFACE
 
struct  PCI_SECONDARY_EXTENSION
 
struct  PCI_ARBITER_INSTANCE
 
struct  _PCI_VERIFIER_DATA
 
struct  _PCI_ID_BUFFER
 
struct  _PCI_CONFIGURATOR
 
struct  _PCI_CONFIGURATOR_CONTEXT
 
struct  _PCI_IPI_CONTEXT
 
struct  _PCI_LEGACY_DEVICE
 

Macros

#define PCI_POOL_TAG   'BicP'
 
#define PCI_IS_ROOT_FDO(x)   ((x)->BusRootFdoExtension == x)
 
#define ASSERT_FDO(x)   ASSERT((x)->ExtensionType == PciFdoExtensionType);
 
#define ASSERT_PDO(x)   ASSERT((x)->ExtensionType == PciPdoExtensionType);
 
#define PCI_HACK_ENTRY_SIZE   sizeof(L"VVVVdddd") - sizeof(UNICODE_NULL)
 
#define PCI_HACK_ENTRY_REV_SIZE   sizeof(L"VVVVddddRR") - sizeof(UNICODE_NULL)
 
#define PCI_HACK_ENTRY_SUBSYS_SIZE   sizeof(L"VVVVddddssssIIII") - sizeof(UNICODE_NULL)
 
#define PCI_HACK_ENTRY_FULL_SIZE   sizeof(L"VVVVddddssssIIIIRR") - sizeof(UNICODE_NULL)
 
#define PCI_HACK_HAS_REVISION_INFO   0x01
 
#define PCI_HACK_HAS_SUBSYSTEM_INFO   0x02
 
#define PCI_INTERFACE_PDO   0x01
 
#define PCI_INTERFACE_FDO   0x02
 
#define PCI_INTERFACE_ROOT   0x04
 
#define PCI_SKIP_DEVICE_ENUMERATION   0x01
 
#define PCI_SKIP_RESOURCE_ENUMERATION   0x02
 
#define PCI_HACK_FIXUP_BEFORE_CONFIGURATION   0x00
 
#define PCI_HACK_FIXUP_AFTER_CONFIGURATION   0x01
 
#define PCI_HACK_FIXUP_BEFORE_UPDATE   0x03
 
#define MAX_DEBUGGING_DEVICES_SUPPORTED   0x04
 
#define PCI_VERIFIER_CODES   0x04
 
#define MAX_ANSI_STRINGS   0x08
 

Typedefs

typedef enum _PCI_SIGNATURE PCI_SIGNATURE
 
typedef enum _PCI_SIGNATUREPPCI_SIGNATURE
 
typedef enum _PCI_DEVICE_TYPES PCI_DEVICE_TYPES
 
typedef enum _PCI_STATE PCI_STATE
 
typedef enum _PCI_DISPATCH_STYLE PCI_DISPATCH_STYLE
 
typedef struct _PCI_HACK_ENTRY PCI_HACK_ENTRY
 
typedef struct _PCI_HACK_ENTRYPPCI_HACK_ENTRY
 
typedef struct _PCI_POWER_STATE PCI_POWER_STATE
 
typedef struct _PCI_POWER_STATEPPCI_POWER_STATE
 
typedef struct _PCI_LOCK PCI_LOCK
 
typedef struct _PCI_LOCKPPCI_LOCK
 
typedef struct _PCI_FDO_EXTENSION PCI_FDO_EXTENSION
 
typedef struct _PCI_FDO_EXTENSIONPPCI_FDO_EXTENSION
 
typedef struct _PCI_FUNCTION_RESOURCES PCI_FUNCTION_RESOURCES
 
typedef struct _PCI_FUNCTION_RESOURCESPPCI_FUNCTION_RESOURCES
 
typedef union _PCI_HEADER_TYPE_DEPENDENT PCI_HEADER_TYPE_DEPENDENT
 
typedef union _PCI_HEADER_TYPE_DEPENDENTPPCI_HEADER_TYPE_DEPENDENT
 
typedef struct _PCI_PDO_EXTENSION PCI_PDO_EXTENSION
 
typedef struct _PCI_PDO_EXTENSIONPPCI_PDO_EXTENSION
 
typedef NTSTATUS(NTAPIPCI_DISPATCH_FUNCTION) (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PVOID DeviceExtension)
 
typedef struct _PCI_MN_DISPATCH_TABLE PCI_MN_DISPATCH_TABLE
 
typedef struct _PCI_MN_DISPATCH_TABLEPPCI_MN_DISPATCH_TABLE
 
typedef struct _PCI_MJ_DISPATCH_TABLE PCI_MJ_DISPATCH_TABLE
 
typedef struct _PCI_MJ_DISPATCH_TABLEPPCI_MJ_DISPATCH_TABLE
 
typedef NTSTATUS(NTAPIPCI_INTERFACE_CONSTRUCTOR) (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
typedef NTSTATUS(NTAPIPCI_INTERFACE_INITIALIZER) (IN PVOID Instance)
 
typedef struct _PCI_INTERFACE PCI_INTERFACE
 
typedef struct _PCI_INTERFACEPPCI_INTERFACE
 
typedef struct PCI_SECONDARY_EXTENSION PCI_SECONDARY_EXTENSION
 
typedef struct PCI_SECONDARY_EXTENSIONPPCI_SECONDARY_EXTENSION
 
typedef struct PCI_ARBITER_INSTANCE PCI_ARBITER_INSTANCE
 
typedef struct PCI_ARBITER_INSTANCEPPCI_ARBITER_INSTANCE
 
typedef struct _PCI_VERIFIER_DATA PCI_VERIFIER_DATA
 
typedef struct _PCI_VERIFIER_DATAPPCI_VERIFIER_DATA
 
typedef struct _PCI_ID_BUFFER PCI_ID_BUFFER
 
typedef struct _PCI_ID_BUFFERPPCI_ID_BUFFER
 
typedef VOID(NTAPIPCI_CONFIGURATOR_INITIALIZE) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)
 
typedef VOID(NTAPIPCI_CONFIGURATOR_RESTORE_CURRENT) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)
 
typedef VOID(NTAPIPCI_CONFIGURATOR_SAVE_LIMITS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)
 
typedef VOID(NTAPIPCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)
 
typedef VOID(NTAPIPCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS) (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
typedef VOID(NTAPIPCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)
 
typedef VOID(NTAPIPCI_CONFIGURATOR_RESET_DEVICE) (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
typedef struct _PCI_CONFIGURATOR PCI_CONFIGURATOR
 
typedef struct _PCI_CONFIGURATORPPCI_CONFIGURATOR
 
typedef struct _PCI_CONFIGURATOR_CONTEXT PCI_CONFIGURATOR_CONTEXT
 
typedef struct _PCI_CONFIGURATOR_CONTEXTPPCI_CONFIGURATOR_CONTEXT
 
typedef VOID(NTAPIPCI_IPI_FUNCTION) (IN PVOID Reserved, IN PVOID Context)
 
typedef struct _PCI_IPI_CONTEXT PCI_IPI_CONTEXT
 
typedef struct _PCI_IPI_CONTEXTPPCI_IPI_CONTEXT
 
typedef struct _PCI_LEGACY_DEVICE PCI_LEGACY_DEVICE
 
typedef struct _PCI_LEGACY_DEVICEPPCI_LEGACY_DEVICE
 

Enumerations

enum  _PCI_SIGNATURE {
  PciPdoExtensionType = 'icP0' , PciFdoExtensionType = 'icP1' , PciArb_Io = 'icP2' , PciArb_Memory = 'icP3' ,
  PciArb_Interrupt = 'icP4' , PciArb_BusNumber = 'icP5' , PciTrans_Interrupt = 'icP6' , PciInterface_BusHandler = 'icP7' ,
  PciInterface_IntRouteHandler = 'icP8' , PciInterface_PciCb = 'icP9' , PciInterface_LegacyDeviceDetection = 'icP:' , PciInterface_PmeHandler = 'icP;' ,
  PciInterface_DevicePresent = 'icP<' , PciInterface_NativeIde = 'icP=' , PciInterface_AgpTarget = 'icP>' , PciInterface_Location = 'icP?'
}
 
enum  _PCI_DEVICE_TYPES {
  PciTypeInvalid , PciTypeHostBridge , PciTypePciBridge , PciTypeCardbusBridge ,
  PciTypeDevice
}
 
enum  _PCI_STATE {
  PciNotStarted , PciStarted , PciDeleted , PciStopped ,
  PciSurpriseRemoved , PciSynchronizedOperation , PciMaxObjectState
}
 
enum  _PCI_DISPATCH_STYLE { IRP_COMPLETE , IRP_DOWNWARD , IRP_UPWARD , IRP_DISPATCH }
 

Functions

NTSTATUS NTAPI PciDispatchIrp (IN PDEVICE_OBJECT DeviceObject, IN PIRP Irp)
 
NTSTATUS NTAPI PciIrpNotSupported (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPassIrpFromFdoToPdo (IN PPCI_FDO_EXTENSION DeviceExtension, IN PIRP Irp)
 
NTSTATUS NTAPI PciCallDownIrpStack (IN PPCI_FDO_EXTENSION DeviceExtension, IN PIRP Irp)
 
NTSTATUS NTAPI PciIrpInvalidDeviceRequest (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoWaitWake (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoSetPowerState (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryPower (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciSetPowerManagedDevicePowerState (IN PPCI_PDO_EXTENSION DeviceExtension, IN DEVICE_POWER_STATE DeviceState, IN BOOLEAN IrpSet)
 
NTSTATUS NTAPI PciAddDevice (IN PDRIVER_OBJECT DriverObject, IN PDEVICE_OBJECT PhysicalDeviceObject)
 
NTSTATUS NTAPI PciFdoIrpStartDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpCancelRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpCancelStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryDeviceRelations (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryInterface (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryCapabilities (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpDeviceUsageNotification (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpSurpriseRemoval (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryLegacyBusInformation (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoCreate (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_SLOT_NUMBER Slot, OUT PDEVICE_OBJECT *PdoDeviceObject)
 
NTSTATUS NTAPI PciPdoWaitWake (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoSetPowerState (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryPower (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpStartDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpCancelRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpCancelStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryDeviceRelations (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryInterface (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryCapabilities (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryResources (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryResourceRequirements (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryDeviceText (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpReadConfig (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpWriteConfig (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryId (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryDeviceState (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryBusInformation (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpDeviceUsageNotification (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpSurpriseRemoval (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryLegacyBusInformation (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
VOID NTAPI PciHookHal (VOID)
 
VOID NTAPI PciVerifierInit (IN PDRIVER_OBJECT DriverObject)
 
PPCI_VERIFIER_DATA NTAPI PciVerifierRetrieveFailureData (IN ULONG FailureCode)
 
BOOLEAN NTAPI PciStringToUSHORT (IN PWCHAR String, OUT PUSHORT Value)
 
BOOLEAN NTAPI PciIsDatacenter (VOID)
 
NTSTATUS NTAPI PciBuildDefaultExclusionLists (VOID)
 
BOOLEAN NTAPI PciUnicodeStringStrStr (IN PUNICODE_STRING InputString, IN PCUNICODE_STRING EqualString, IN BOOLEAN CaseInSensitive)
 
BOOLEAN NTAPI PciOpenKey (IN PWCHAR KeyName, IN HANDLE RootKey, IN ACCESS_MASK DesiredAccess, OUT PHANDLE KeyHandle, OUT PNTSTATUS KeyStatus)
 
NTSTATUS NTAPI PciGetRegistryValue (IN PWCHAR ValueName, IN PWCHAR KeyName, IN HANDLE RootHandle, IN ULONG Type, OUT PVOID *OutputBuffer, OUT PULONG OutputLength)
 
PPCI_FDO_EXTENSION NTAPI PciFindParentPciFdoExtension (IN PDEVICE_OBJECT DeviceObject, IN PKEVENT Lock)
 
VOID NTAPI PciInsertEntryAtTail (IN PSINGLE_LIST_ENTRY ListHead, IN PPCI_FDO_EXTENSION DeviceExtension, IN PKEVENT Lock)
 
NTSTATUS NTAPI PciGetDeviceProperty (IN PDEVICE_OBJECT DeviceObject, IN DEVICE_REGISTRY_PROPERTY DeviceProperty, OUT PVOID *OutputBuffer)
 
NTSTATUS NTAPI PciSendIoctl (IN PDEVICE_OBJECT DeviceObject, IN ULONG IoControlCode, IN PVOID InputBuffer, IN ULONG InputBufferLength, IN PVOID OutputBuffer, IN ULONG OutputBufferLength)
 
VOID NTAPI PcipLinkSecondaryExtension (IN PSINGLE_LIST_ENTRY List, IN PVOID Lock, IN PPCI_SECONDARY_EXTENSION SecondaryExtension, IN PCI_SIGNATURE ExtensionType, IN PVOID Destructor)
 
PPCI_SECONDARY_EXTENSION NTAPI PciFindNextSecondaryExtension (IN PSINGLE_LIST_ENTRY ListHead, IN PCI_SIGNATURE ExtensionType)
 
ULONGLONG NTAPI PciGetHackFlags (IN USHORT VendorId, IN USHORT DeviceId, IN USHORT SubVendorId, IN USHORT SubSystemId, IN UCHAR RevisionId)
 
PPCI_PDO_EXTENSION NTAPI PciFindPdoByFunction (IN PPCI_FDO_EXTENSION DeviceExtension, IN ULONG FunctionNumber, IN PPCI_COMMON_HEADER PciData)
 
BOOLEAN NTAPI PciIsCriticalDeviceClass (IN UCHAR BaseClass, IN UCHAR SubClass)
 
BOOLEAN NTAPI PciIsDeviceOnDebugPath (IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciGetBiosConfig (IN PPCI_PDO_EXTENSION DeviceExtension, OUT PPCI_COMMON_HEADER PciData)
 
NTSTATUS NTAPI PciSaveBiosConfig (IN PPCI_PDO_EXTENSION DeviceExtension, OUT PPCI_COMMON_HEADER PciData)
 
UCHAR NTAPI PciReadDeviceCapability (IN PPCI_PDO_EXTENSION DeviceExtension, IN UCHAR Offset, IN ULONG CapabilityId, OUT PPCI_CAPABILITIES_HEADER Buffer, IN ULONG Length)
 
BOOLEAN NTAPI PciCanDisableDecodes (IN PPCI_PDO_EXTENSION DeviceExtension, IN PPCI_COMMON_HEADER Config, IN ULONGLONG HackFlags, IN BOOLEAN ForPowerDown)
 
PCI_DEVICE_TYPES NTAPI PciClassifyDeviceType (IN PPCI_PDO_EXTENSION PdoExtension)
 
ULONG_PTR NTAPI PciExecuteCriticalSystemRoutine (IN ULONG_PTR IpiContext)
 
BOOLEAN NTAPI PciCreateIoDescriptorFromBarLimit (PIO_RESOURCE_DESCRIPTOR ResourceDescriptor, IN PULONG BarArray, IN BOOLEAN Rom)
 
BOOLEAN NTAPI PciIsSlotPresentInParentMethod (IN PPCI_PDO_EXTENSION PdoExtension, IN ULONG Method)
 
VOID NTAPI PciDecodeEnable (IN PPCI_PDO_EXTENSION PdoExtension, IN BOOLEAN Enable, OUT PUSHORT Command)
 
NTSTATUS NTAPI PciQueryBusInformation (IN PPCI_PDO_EXTENSION PdoExtension, IN PPNP_BUS_INFORMATION *Buffer)
 
NTSTATUS NTAPI PciQueryCapabilities (IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PDEVICE_CAPABILITIES DeviceCapability)
 
NTSTATUS NTAPI PciGetConfigHandlers (IN PPCI_FDO_EXTENSION FdoExtension)
 
VOID NTAPI PciReadSlotConfig (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
 
VOID NTAPI PciWriteDeviceConfig (IN PPCI_PDO_EXTENSION DeviceExtension, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
 
VOID NTAPI PciReadDeviceConfig (IN PPCI_PDO_EXTENSION DeviceExtension, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
 
UCHAR NTAPI PciGetAdjustedInterruptLine (IN PPCI_PDO_EXTENSION PdoExtension)
 
VOID NTAPI PciInitializeState (IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciBeginStateTransition (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
 
NTSTATUS NTAPI PciCancelStateTransition (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
 
VOID NTAPI PciCommitStateTransition (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
 
NTSTATUS NTAPI PciInitializeArbiters (IN PPCI_FDO_EXTENSION FdoExtension)
 
NTSTATUS NTAPI PciInitializeArbiterRanges (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCM_RESOURCE_LIST Resources)
 
BOOLEAN NTAPI PciDebugIrpDispatchDisplay (IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension, IN USHORT MaxMinor)
 
VOID NTAPI PciDebugDumpCommonConfig (IN PPCI_COMMON_HEADER PciData)
 
VOID NTAPI PciDebugDumpQueryCapabilities (IN PDEVICE_CAPABILITIES DeviceCaps)
 
VOID NTAPI PciDebugPrintIoResReqList (IN PIO_RESOURCE_REQUIREMENTS_LIST Requirements)
 
VOID NTAPI PciDebugPrintCmResList (IN PCM_RESOURCE_LIST ResourceList)
 
VOID NTAPI PciDebugPrintPartialResource (IN PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialResource)
 
NTSTATUS NTAPI PciQueryInterface (IN PPCI_FDO_EXTENSION DeviceExtension, IN CONST GUID *InterfaceType, IN ULONG Size, IN ULONG Version, IN PVOID InterfaceData, IN PINTERFACE Interface, IN BOOLEAN LastChance)
 
NTSTATUS NTAPI PciPmeInterfaceInitializer (IN PVOID Instance)
 
NTSTATUS NTAPI routeintrf_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI arbusno_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI agpintrf_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI tranirq_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI busintrf_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI armem_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI ario_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI locintrf_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI pcicbintrf_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI lddintrf_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI devpresent_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI agpintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI arbusno_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI tranirq_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI armem_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI busintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI ario_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
VOID NTAPI ario_ApplyBrokenVideoHack (IN PPCI_FDO_EXTENSION FdoExtension)
 
NTSTATUS NTAPI pcicbintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI lddintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI locintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI PciPmeInterfaceConstructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI routeintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI devpresent_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI PciQueryDeviceRelations (IN PPCI_FDO_EXTENSION DeviceExtension, IN OUT PDEVICE_RELATIONS *pDeviceRelations)
 
NTSTATUS NTAPI PciQueryResources (IN PPCI_PDO_EXTENSION PdoExtension, OUT PCM_RESOURCE_LIST *Buffer)
 
NTSTATUS NTAPI PciQueryTargetDeviceRelations (IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PDEVICE_RELATIONS *pDeviceRelations)
 
NTSTATUS NTAPI PciQueryEjectionRelations (IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PDEVICE_RELATIONS *pDeviceRelations)
 
NTSTATUS NTAPI PciQueryRequirements (IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *RequirementsList)
 
BOOLEAN NTAPI PciComputeNewCurrentSettings (IN PPCI_PDO_EXTENSION PdoExtension, IN PCM_RESOURCE_LIST ResourceList)
 
NTSTATUS NTAPI PciSetResources (IN PPCI_PDO_EXTENSION PdoExtension, IN BOOLEAN DoReset, IN BOOLEAN SomethingSomethingDarkSide)
 
NTSTATUS NTAPI PciBuildRequirementsList (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData, OUT PIO_RESOURCE_REQUIREMENTS_LIST *Buffer)
 
PWCHAR NTAPI PciGetDeviceDescriptionMessage (IN UCHAR BaseClass, IN UCHAR SubClass)
 
NTSTATUS NTAPI PciQueryDeviceText (IN PPCI_PDO_EXTENSION PdoExtension, IN DEVICE_TEXT_TYPE QueryType, IN ULONG Locale, OUT PWCHAR *Buffer)
 
NTSTATUS NTAPI PciQueryId (IN PPCI_PDO_EXTENSION DeviceExtension, IN BUS_QUERY_ID_TYPE QueryType, OUT PWCHAR *Buffer)
 
VOID NTAPI Cardbus_MassageHeaderForLimitsDetermination (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Cardbus_SaveCurrentSettings (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Cardbus_SaveLimits (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Cardbus_RestoreCurrent (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Cardbus_GetAdditionalResourceDescriptors (IN PPCI_CONFIGURATOR_CONTEXT Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)
 
VOID NTAPI Cardbus_ResetDevice (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
VOID NTAPI Cardbus_ChangeResourceSettings (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
VOID NTAPI Device_MassageHeaderForLimitsDetermination (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Device_SaveCurrentSettings (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Device_SaveLimits (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Device_RestoreCurrent (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Device_GetAdditionalResourceDescriptors (IN PPCI_CONFIGURATOR_CONTEXT Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)
 
VOID NTAPI Device_ResetDevice (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
VOID NTAPI Device_ChangeResourceSettings (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
VOID NTAPI PPBridge_MassageHeaderForLimitsDetermination (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI PPBridge_SaveCurrentSettings (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI PPBridge_SaveLimits (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI PPBridge_RestoreCurrent (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI PPBridge_GetAdditionalResourceDescriptors (IN PPCI_CONFIGURATOR_CONTEXT Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)
 
VOID NTAPI PPBridge_ResetDevice (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
VOID NTAPI PPBridge_ChangeResourceSettings (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
BOOLEAN NTAPI PciAreBusNumbersConfigured (IN PPCI_PDO_EXTENSION PdoExtension)
 
NTSTATUS NTAPI PciCacheLegacyDeviceRouting (IN PDEVICE_OBJECT DeviceObject, IN ULONG BusNumber, IN ULONG SlotNumber, IN UCHAR InterruptLine, IN UCHAR InterruptPin, IN UCHAR BaseClass, IN UCHAR SubClass, IN PDEVICE_OBJECT PhysicalDeviceObject, IN PPCI_PDO_EXTENSION PdoExtension, OUT PDEVICE_OBJECT *pFoundDeviceObject)
 

Variables

DRIVER_DISPATCH PciDispatchIrp
 
DRIVER_ADD_DEVICE PciAddDevice
 
KIPI_BROADCAST_WORKER PciExecuteCriticalSystemRoutine
 
SINGLE_LIST_ENTRY PciFdoExtensionListHead
 
KEVENT PciGlobalLock
 
PPCI_INTERFACE PciInterfaces []
 
PCI_INTERFACE ArbiterInterfaceBusNumber
 
PCI_INTERFACE ArbiterInterfaceMemory
 
PCI_INTERFACE ArbiterInterfaceIo
 
PCI_INTERFACE BusHandlerInterface
 
PCI_INTERFACE PciRoutingInterface
 
PCI_INTERFACE PciCardbusPrivateInterface
 
PCI_INTERFACE PciLegacyDeviceDetectionInterface
 
PCI_INTERFACE PciPmeInterface
 
PCI_INTERFACE PciDevicePresentInterface
 
PCI_INTERFACE PciLocationInterface
 
PCI_INTERFACE AgpTargetInterface
 
PCI_INTERFACE TranslatorInterfaceInterrupt
 
PDRIVER_OBJECT PciDriverObject
 
PWATCHDOG_TABLE WdTable
 
PPCI_HACK_ENTRY PciHackTable
 
BOOLEAN PciAssignBusNumbers
 
BOOLEAN PciEnableNativeModeATA
 
PPCI_IRQ_ROUTING_TABLE PciIrqRoutingTable
 
BOOLEAN PciRunningDatacenter
 
NTSYSAPI BOOLEAN InitSafeBootMode
 

Macro Definition Documentation

◆ ASSERT_FDO

#define ASSERT_FDO (   x)    ASSERT((x)->ExtensionType == PciFdoExtensionType);

Definition at line 37 of file pci.h.

◆ ASSERT_PDO

#define ASSERT_PDO (   x)    ASSERT((x)->ExtensionType == PciPdoExtensionType);

Definition at line 38 of file pci.h.

◆ MAX_ANSI_STRINGS

#define MAX_ANSI_STRINGS   0x08

Definition at line 87 of file pci.h.

◆ MAX_DEBUGGING_DEVICES_SUPPORTED

#define MAX_DEBUGGING_DEVICES_SUPPORTED   0x04

Definition at line 77 of file pci.h.

◆ PCI_HACK_ENTRY_FULL_SIZE

#define PCI_HACK_ENTRY_FULL_SIZE   sizeof(L"VVVVddddssssIIIIRR") - sizeof(UNICODE_NULL)

Definition at line 46 of file pci.h.

◆ PCI_HACK_ENTRY_REV_SIZE

#define PCI_HACK_ENTRY_REV_SIZE   sizeof(L"VVVVddddRR") - sizeof(UNICODE_NULL)

Definition at line 44 of file pci.h.

◆ PCI_HACK_ENTRY_SIZE

#define PCI_HACK_ENTRY_SIZE   sizeof(L"VVVVdddd") - sizeof(UNICODE_NULL)

Definition at line 43 of file pci.h.

◆ PCI_HACK_ENTRY_SUBSYS_SIZE

#define PCI_HACK_ENTRY_SUBSYS_SIZE   sizeof(L"VVVVddddssssIIII") - sizeof(UNICODE_NULL)

Definition at line 45 of file pci.h.

◆ PCI_HACK_FIXUP_AFTER_CONFIGURATION

#define PCI_HACK_FIXUP_AFTER_CONFIGURATION   0x01

Definition at line 71 of file pci.h.

◆ PCI_HACK_FIXUP_BEFORE_CONFIGURATION

#define PCI_HACK_FIXUP_BEFORE_CONFIGURATION   0x00

Definition at line 70 of file pci.h.

◆ PCI_HACK_FIXUP_BEFORE_UPDATE

#define PCI_HACK_FIXUP_BEFORE_UPDATE   0x03

Definition at line 72 of file pci.h.

◆ PCI_HACK_HAS_REVISION_INFO

#define PCI_HACK_HAS_REVISION_INFO   0x01

Definition at line 51 of file pci.h.

◆ PCI_HACK_HAS_SUBSYSTEM_INFO

#define PCI_HACK_HAS_SUBSYSTEM_INFO   0x02

Definition at line 52 of file pci.h.

◆ PCI_INTERFACE_FDO

#define PCI_INTERFACE_FDO   0x02

Definition at line 58 of file pci.h.

◆ PCI_INTERFACE_PDO

#define PCI_INTERFACE_PDO   0x01

Definition at line 57 of file pci.h.

◆ PCI_INTERFACE_ROOT

#define PCI_INTERFACE_ROOT   0x04

Definition at line 59 of file pci.h.

◆ PCI_IS_ROOT_FDO

#define PCI_IS_ROOT_FDO (   x)    ((x)->BusRootFdoExtension == x)

Definition at line 32 of file pci.h.

◆ PCI_POOL_TAG

#define PCI_POOL_TAG   'BicP'

Definition at line 27 of file pci.h.

◆ PCI_SKIP_DEVICE_ENUMERATION

#define PCI_SKIP_DEVICE_ENUMERATION   0x01

Definition at line 64 of file pci.h.

◆ PCI_SKIP_RESOURCE_ENUMERATION

#define PCI_SKIP_RESOURCE_ENUMERATION   0x02

Definition at line 65 of file pci.h.

◆ PCI_VERIFIER_CODES

#define PCI_VERIFIER_CODES   0x04

Definition at line 82 of file pci.h.

Typedef Documentation

◆ PCI_ARBITER_INSTANCE

◆ PCI_CONFIGURATOR

◆ PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS

typedef VOID(NTAPI * PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS) (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)

Definition at line 455 of file pci.h.

◆ PCI_CONFIGURATOR_CONTEXT

◆ PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS

typedef VOID(NTAPI * PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)

Definition at line 460 of file pci.h.

◆ PCI_CONFIGURATOR_INITIALIZE

typedef VOID(NTAPI * PCI_CONFIGURATOR_INITIALIZE) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)

Definition at line 439 of file pci.h.

◆ PCI_CONFIGURATOR_RESET_DEVICE

typedef VOID(NTAPI * PCI_CONFIGURATOR_RESET_DEVICE) (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)

Definition at line 466 of file pci.h.

◆ PCI_CONFIGURATOR_RESTORE_CURRENT

typedef VOID(NTAPI * PCI_CONFIGURATOR_RESTORE_CURRENT) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)

Definition at line 443 of file pci.h.

◆ PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS

typedef VOID(NTAPI * PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)

Definition at line 451 of file pci.h.

◆ PCI_CONFIGURATOR_SAVE_LIMITS

typedef VOID(NTAPI * PCI_CONFIGURATOR_SAVE_LIMITS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)

Definition at line 447 of file pci.h.

◆ PCI_DEVICE_TYPES

◆ PCI_DISPATCH_FUNCTION

typedef NTSTATUS(NTAPI * PCI_DISPATCH_FUNCTION) (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PVOID DeviceExtension)

Definition at line 325 of file pci.h.

◆ PCI_DISPATCH_STYLE

◆ PCI_FDO_EXTENSION

◆ PCI_FUNCTION_RESOURCES

◆ PCI_HACK_ENTRY

◆ PCI_HEADER_TYPE_DEPENDENT

◆ PCI_ID_BUFFER

◆ PCI_INTERFACE

◆ PCI_INTERFACE_CONSTRUCTOR

typedef NTSTATUS(NTAPI * PCI_INTERFACE_CONSTRUCTOR) (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)

Definition at line 359 of file pci.h.

◆ PCI_INTERFACE_INITIALIZER

typedef NTSTATUS(NTAPI * PCI_INTERFACE_INITIALIZER) (IN PVOID Instance)

Definition at line 368 of file pci.h.

◆ PCI_IPI_CONTEXT

◆ PCI_IPI_FUNCTION

typedef VOID(NTAPI * PCI_IPI_FUNCTION) (IN PVOID Reserved, IN PVOID Context)

Definition at line 502 of file pci.h.

◆ PCI_LEGACY_DEVICE

◆ PCI_LOCK

◆ PCI_MJ_DISPATCH_TABLE

◆ PCI_MN_DISPATCH_TABLE

◆ PCI_PDO_EXTENSION

◆ PCI_POWER_STATE

◆ PCI_SECONDARY_EXTENSION

◆ PCI_SIGNATURE

◆ PCI_STATE

◆ PCI_VERIFIER_DATA

◆ PPCI_ARBITER_INSTANCE

◆ PPCI_CONFIGURATOR

◆ PPCI_CONFIGURATOR_CONTEXT

◆ PPCI_FDO_EXTENSION

◆ PPCI_FUNCTION_RESOURCES

◆ PPCI_HACK_ENTRY

◆ PPCI_HEADER_TYPE_DEPENDENT

◆ PPCI_ID_BUFFER

◆ PPCI_INTERFACE

◆ PPCI_IPI_CONTEXT

◆ PPCI_LEGACY_DEVICE

◆ PPCI_LOCK

◆ PPCI_MJ_DISPATCH_TABLE

◆ PPCI_MN_DISPATCH_TABLE

◆ PPCI_PDO_EXTENSION

◆ PPCI_POWER_STATE

◆ PPCI_SECONDARY_EXTENSION

◆ PPCI_SIGNATURE

◆ PPCI_VERIFIER_DATA

Enumeration Type Documentation

◆ _PCI_DEVICE_TYPES

Enumerator
PciTypeInvalid 
PciTypeHostBridge 
PciTypePciBridge 
PciTypeCardbusBridge 
PciTypeDevice 

Definition at line 115 of file pci.h.

116{
@ PciTypeHostBridge
Definition: pci.h:118
@ PciTypeDevice
Definition: pci.h:121
@ PciTypePciBridge
Definition: pci.h:119
@ PciTypeInvalid
Definition: pci.h:117
@ PciTypeCardbusBridge
Definition: pci.h:120
enum _PCI_DEVICE_TYPES PCI_DEVICE_TYPES

◆ _PCI_DISPATCH_STYLE

Enumerator
IRP_COMPLETE 
IRP_DOWNWARD 
IRP_UPWARD 
IRP_DISPATCH 

Definition at line 141 of file pci.h.

142{
enum _PCI_DISPATCH_STYLE PCI_DISPATCH_STYLE
@ IRP_UPWARD
Definition: pci.h:145
@ IRP_COMPLETE
Definition: pci.h:143
@ IRP_DISPATCH
Definition: pci.h:146
@ IRP_DOWNWARD
Definition: pci.h:144

◆ _PCI_SIGNATURE

Enumerator
PciPdoExtensionType 
PciFdoExtensionType 
PciArb_Io 
PciArb_Memory 
PciArb_Interrupt 
PciArb_BusNumber 
PciTrans_Interrupt 
PciInterface_BusHandler 
PciInterface_IntRouteHandler 
PciInterface_PciCb 
PciInterface_LegacyDeviceDetection 
PciInterface_PmeHandler 
PciInterface_DevicePresent 
PciInterface_NativeIde 
PciInterface_AgpTarget 
PciInterface_Location 

Definition at line 92 of file pci.h.

93{
94 PciPdoExtensionType = 'icP0',
95 PciFdoExtensionType = 'icP1',
96 PciArb_Io = 'icP2',
97 PciArb_Memory = 'icP3',
98 PciArb_Interrupt = 'icP4',
99 PciArb_BusNumber = 'icP5',
100 PciTrans_Interrupt = 'icP6',
103 PciInterface_PciCb = 'icP9',
107 PciInterface_NativeIde = 'icP=',
108 PciInterface_AgpTarget = 'icP>',
109 PciInterface_Location = 'icP?'
enum _PCI_SIGNATURE PCI_SIGNATURE
enum _PCI_SIGNATURE * PPCI_SIGNATURE
@ PciInterface_NativeIde
Definition: pci.h:107
@ PciFdoExtensionType
Definition: pci.h:95
@ PciPdoExtensionType
Definition: pci.h:94
@ PciInterface_PciCb
Definition: pci.h:103
@ PciInterface_IntRouteHandler
Definition: pci.h:102
@ PciArb_BusNumber
Definition: pci.h:99
@ PciInterface_Location
Definition: pci.h:109
@ PciArb_Io
Definition: pci.h:96
@ PciInterface_DevicePresent
Definition: pci.h:106
@ PciArb_Interrupt
Definition: pci.h:98
@ PciInterface_BusHandler
Definition: pci.h:101
@ PciTrans_Interrupt
Definition: pci.h:100
@ PciInterface_LegacyDeviceDetection
Definition: pci.h:104
@ PciArb_Memory
Definition: pci.h:97
@ PciInterface_AgpTarget
Definition: pci.h:108
@ PciInterface_PmeHandler
Definition: pci.h:105

◆ _PCI_STATE

Enumerator
PciNotStarted 
PciStarted 
PciDeleted 
PciStopped 
PciSurpriseRemoved 
PciSynchronizedOperation 
PciMaxObjectState 

Definition at line 127 of file pci.h.

128{
136} PCI_STATE;
enum _PCI_STATE PCI_STATE
@ PciMaxObjectState
Definition: pci.h:135
@ PciSurpriseRemoved
Definition: pci.h:133
@ PciDeleted
Definition: pci.h:131
@ PciStarted
Definition: pci.h:130
@ PciSynchronizedOperation
Definition: pci.h:134
@ PciStopped
Definition: pci.h:132
@ PciNotStarted
Definition: pci.h:129

Function Documentation

◆ agpintrf_Constructor()

NTSTATUS NTAPI agpintrf_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 47 of file agpintrf.c.

53{
55
57 UNREFERENCED_PARAMETER(InterfaceData);
61
62 /* Only AGP bridges are supported (which are PCI-to-PCI Bridge Devices) */
63 if ((PdoExtension->BaseClass != PCI_CLASS_BRIDGE_DEV) ||
65 {
66 /* Fail any other PDO */
68 }
69
70 /* Not yet implemented */
73}
struct _PCI_PDO_EXTENSION * PPCI_PDO_EXTENSION
#define UNIMPLEMENTED_DBGBREAK(...)
Definition: debug.h:57
@ PdoExtension
Definition: precomp.h:49
#define UNREFERENCED_PARAMETER(P)
Definition: ntbasedef.h:317
#define STATUS_NOT_SUPPORTED
Definition: ntstatus.h:423
#define STATUS_NOT_IMPLEMENTED
Definition: ntstatus.h:239
_Must_inspect_result_ _In_ WDFDEVICE _In_ PWDF_DEVICE_PROPERTY_DATA _In_ DEVPROPTYPE _In_ ULONG Size
Definition: wdfdevice.h:4533
_Must_inspect_result_ _In_ WDFDEVICE _In_ LPCGUID _Out_ PINTERFACE Interface
Definition: wdffdo.h:465
_Must_inspect_result_ _In_ WDFDEVICE _In_ LPCGUID _Out_ PINTERFACE _In_ USHORT _In_ USHORT Version
Definition: wdffdo.h:469
_Must_inspect_result_ _In_ WDFDEVICE _In_ PWDF_WMI_INSTANCE_CONFIG _In_opt_ PWDF_OBJECT_ATTRIBUTES _Out_opt_ WDFWMIINSTANCE * Instance
Definition: wdfwmi.h:481
#define PCI_SUBCLASS_BR_PCI_TO_PCI
Definition: iotypes.h:4165
#define PCI_CLASS_BRIDGE_DEV
Definition: iotypes.h:4109

◆ agpintrf_Initializer()

NTSTATUS NTAPI agpintrf_Initializer ( IN PVOID  Instance)

Definition at line 37 of file agpintrf.c.

38{
40 /* PnP Interfaces don't get Initialized */
41 ASSERTMSG("PCI agpintrf_Initializer, unexpected call.\n", FALSE);
43}
#define FALSE
Definition: types.h:117
#define ASSERTMSG(msg, exp)
Definition: nt_native.h:431
#define STATUS_UNSUCCESSFUL
Definition: udferr_usr.h:132

◆ arbusno_Constructor()

NTSTATUS NTAPI arbusno_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 73 of file ar_busno.c.

79{
82 PAGED_CODE();
83
84 UNREFERENCED_PARAMETER(PciInterface);
88
89 /* Make sure it's the expected interface */
90 if ((ULONG_PTR)InterfaceData != CmResourceTypeBusNumber)
91 {
92 /* Arbiter support must have been initialized first */
93 if (FdoExtension->ArbitersInitialized)
94 {
95 /* Not yet implemented */
97 while (TRUE);
98 }
99 else
100 {
101 /* No arbiters for this FDO */
103 }
104 }
105 else
106 {
107 /* Not the right interface */
109 }
110
111 /* Return the status */
112 return Status;
113}
#define PAGED_CODE()
LONG NTSTATUS
Definition: precomp.h:26
#define UNIMPLEMENTED
Definition: debug.h:118
#define TRUE
Definition: types.h:120
struct _PCI_FDO_EXTENSION * PPCI_FDO_EXTENSION
@ FdoExtension
Definition: precomp.h:48
Status
Definition: gdiplustypes.h:25
#define CmResourceTypeBusNumber
Definition: hwresource.cpp:128
#define STATUS_INVALID_PARAMETER_5
Definition: ntstatus.h:479
uint32_t ULONG_PTR
Definition: typedefs.h:65

◆ arbusno_Initializer()

NTSTATUS NTAPI arbusno_Initializer ( IN PVOID  Instance)

Definition at line 35 of file ar_busno.c.

36{
40
41 PAGED_CODE();
42
43 RtlZeroMemory(&Arbiter->CommonInstance, sizeof(Arbiter->CommonInstance));
44
46
47 /* Not yet implemented */
49
50#if 0
51 Arbiter->CommonInstance.UnpackRequirement = arbusno_UnpackRequirement;
52 Arbiter->CommonInstance.PackResource = arbusno_PackResource;
53 Arbiter->CommonInstance.UnpackResource = arbusno_UnpackResource;
54 Arbiter->CommonInstance.ScoreRequirement = arbusno_ScoreRequirement;
55#endif
56
58 FdoExtension->FunctionalDeviceObject,
60 Arbiter->InstanceName,
61 L"Pci",
62 NULL);
63 if (!NT_SUCCESS(Status))
64 {
65 DPRINT1("arbusno_Initializer: init arbiter return %X", Status);
66 }
67
68 return Status;
69}
NTSTATUS NTAPI ArbInitializeArbiterInstance(_Inout_ PARBITER_INSTANCE Arbiter, _In_ PDEVICE_OBJECT BusDeviceObject, _In_ CM_RESOURCE_TYPE ResourceType, _In_ PCWSTR ArbiterName, _In_ PCWSTR OrderName, _In_ PARB_TRANSLATE_ORDERING TranslateOrderingFunction)
Definition: arbiter.c:282
#define DPRINT1
Definition: precomp.h:8
#define NULL
Definition: types.h:112
#define NT_SUCCESS(StatCode)
Definition: apphelp.c:32
#define L(x)
Definition: ntvdm.h:50
PPCI_FDO_EXTENSION BusFdoExtension
Definition: pci.h:405
WCHAR InstanceName[24]
Definition: pci.h:406
ARBITER_INSTANCE CommonInstance
Definition: pci.h:407
PARB_UNPACK_RESOURCE UnpackResource
Definition: arbiter.h:196
PARB_SCORE_REQUIREMENT ScoreRequirement
Definition: arbiter.h:197
PARB_UNPACK_REQUIREMENT UnpackRequirement
Definition: arbiter.h:194
PARB_PACK_RESOURCE PackResource
Definition: arbiter.h:195
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:262

◆ ario_ApplyBrokenVideoHack()

VOID NTAPI ario_ApplyBrokenVideoHack ( IN PPCI_FDO_EXTENSION  FdoExtension)

Definition at line 104 of file ar_memio.c.

105{
106 PPCI_ARBITER_INSTANCE PciArbiter;
107 //PARBITER_INSTANCE CommonInstance;
108 //NTSTATUS Status;
109
110 /* Only valid for root FDOs who are being applied the hack for the first time */
111 ASSERT(!FdoExtension->BrokenVideoHackApplied);
113
114 /* Find the I/O arbiter */
116 SecondaryExtension.Next,
117 PciArb_Io);
118 ASSERT(PciArbiter);
119#if 0 // when arb exist
120 /* Get the Arb instance */
121 CommonInstance = &PciArbiter->CommonInstance;
122
123 /* Free the two lists, enabling full VGA access */
124 ArbFreeOrderingList(&CommonInstance->OrderingList);
125 ArbFreeOrderingList(&CommonInstance->ReservedList);
126
127 /* Build the ordering for broken video PCI access */
128 Status = ArbBuildAssignmentOrdering(CommonInstance,
129 L"Pci",
130 L"BrokenVideo",
131 NULL);
133#else
134 //Status = STATUS_SUCCESS;
136 while (TRUE);
137#endif
138 /* Now the hack has been applied */
139 FdoExtension->BrokenVideoHackApplied = TRUE;
140}
NTSTATUS NTAPI ArbBuildAssignmentOrdering(_Inout_ PARBITER_INSTANCE ArbInstance, _In_ PCWSTR OrderName, _In_ PCWSTR ReservedOrderName, _In_ PARB_TRANSLATE_ORDERING TranslateOrderingFunction)
Definition: arbiter.c:267
VOID NTAPI ArbFreeOrderingList(_Out_ PARBITER_ORDERING_LIST OrderList)
Definition: arbiter.c:256
PPCI_SECONDARY_EXTENSION NTAPI PciFindNextSecondaryExtension(IN PSINGLE_LIST_ENTRY ListHead, IN PCI_SIGNATURE ExtensionType)
Definition: utils.c:584
#define PCI_IS_ROOT_FDO(x)
Definition: pci.h:32
#define ASSERT(a)
Definition: mode.c:44
void * PVOID
Definition: typedefs.h:50

Referenced by PciApplyHacks().

◆ ario_Constructor()

NTSTATUS NTAPI ario_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 60 of file ar_memio.c.

66{
69 PAGED_CODE();
70
71 UNREFERENCED_PARAMETER(PciInterface);
75
76 /* Make sure it's the expected interface */
77 if ((ULONG_PTR)InterfaceData != CmResourceTypePort)
78 {
79 /* Arbiter support must have been initialized first */
80 if (FdoExtension->ArbitersInitialized)
81 {
82 /* Not yet implemented */
84 while (TRUE);
85 }
86 else
87 {
88 /* No arbiters for this FDO */
90 }
91 }
92 else
93 {
94 /* Not the right interface */
96 }
97
98 /* Return the status */
99 return Status;
100}
#define CmResourceTypePort
Definition: hwresource.cpp:123

◆ ario_Initializer()

NTSTATUS NTAPI ario_Initializer ( IN PVOID  Instance)

Definition at line 48 of file ar_memio.c.

49{
51
52 /* Not yet implemented */
54 //while (TRUE);
55 return STATUS_SUCCESS;
56}
#define STATUS_SUCCESS
Definition: shellext.h:65

◆ armem_Constructor()

NTSTATUS NTAPI armem_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 156 of file ar_memio.c.

162{
165 PAGED_CODE();
166
167 UNREFERENCED_PARAMETER(PciInterface);
171
172 /* Make sure it's the expected interface */
173 if ((ULONG_PTR)InterfaceData != CmResourceTypeMemory)
174 {
175 /* Arbiter support must have been initialized first */
176 if (FdoExtension->ArbitersInitialized)
177 {
178 /* Not yet implemented */
180 while (TRUE);
181 }
182 else
183 {
184 /* No arbiters for this FDO */
186 }
187 }
188 else
189 {
190 /* Not the right interface */
192 }
193
194 /* Return the status */
195 return Status;
196}
#define CmResourceTypeMemory
Definition: hwresource.cpp:125

◆ armem_Initializer()

NTSTATUS NTAPI armem_Initializer ( IN PVOID  Instance)

Definition at line 144 of file ar_memio.c.

145{
147
148 /* Not yet implemented */
150 //while (TRUE);
151 return STATUS_SUCCESS;
152}

◆ busintrf_Constructor()

NTSTATUS NTAPI busintrf_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 45 of file busintrf.c.

◆ busintrf_Initializer()

NTSTATUS NTAPI busintrf_Initializer ( IN PVOID  Instance)

Definition at line 35 of file busintrf.c.

36{
38 /* PnP Interfaces don't get Initialized */
39 ASSERTMSG("PCI busintrf_Initializer, unexpected call.\n", FALSE);
41}

◆ Cardbus_ChangeResourceSettings()

VOID NTAPI Cardbus_ChangeResourceSettings ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PPCI_COMMON_HEADER  PciData 
)

Definition at line 89 of file cardbus.c.

◆ Cardbus_GetAdditionalResourceDescriptors()

VOID NTAPI Cardbus_GetAdditionalResourceDescriptors ( IN PPCI_CONFIGURATOR_CONTEXT  Context,
IN PPCI_COMMON_HEADER  PciData,
IN PIO_RESOURCE_DESCRIPTOR  IoDescriptor 
)

Definition at line 67 of file cardbus.c.

◆ Cardbus_MassageHeaderForLimitsDetermination()

VOID NTAPI Cardbus_MassageHeaderForLimitsDetermination ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 51 of file cardbus.c.

◆ Cardbus_ResetDevice()

VOID NTAPI Cardbus_ResetDevice ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PPCI_COMMON_HEADER  PciData 
)

Definition at line 79 of file cardbus.c.

◆ Cardbus_RestoreCurrent()

VOID NTAPI Cardbus_RestoreCurrent ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 59 of file cardbus.c.

◆ Cardbus_SaveCurrentSettings()

VOID NTAPI Cardbus_SaveCurrentSettings ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 35 of file cardbus.c.

◆ Cardbus_SaveLimits()

VOID NTAPI Cardbus_SaveLimits ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 43 of file cardbus.c.

◆ Device_ChangeResourceSettings()

VOID NTAPI Device_ChangeResourceSettings ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PPCI_COMMON_HEADER  PciData 
)

Definition at line 283 of file device.c.

285{
287 UNREFERENCED_PARAMETER(PciData);
288 /* Not yet implemented */
290}

◆ Device_GetAdditionalResourceDescriptors()

VOID NTAPI Device_GetAdditionalResourceDescriptors ( IN PPCI_CONFIGURATOR_CONTEXT  Context,
IN PPCI_COMMON_HEADER  PciData,
IN PIO_RESOURCE_DESCRIPTOR  IoDescriptor 
)

Definition at line 259 of file device.c.

262{
264 UNREFERENCED_PARAMETER(PciData);
265 UNREFERENCED_PARAMETER(IoDescriptor);
266 /* Not yet implemented */
268}

◆ Device_MassageHeaderForLimitsDetermination()

VOID NTAPI Device_MassageHeaderForLimitsDetermination ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 218 of file device.c.

219{
220 PPCI_COMMON_HEADER PciData;
222 PULONG BarArray;
223 ULONG i = 0;
224
225 /* Get pointers from context data */
226 PdoExtension = Context->PdoExtension;
227 PciData = Context->PciData;
228
229 /* Get the array of BARs */
230 BarArray = PciData->u.type0.BaseAddresses;
231
232 /* Check for IDE controllers that are not in native mode */
233 if ((PdoExtension->BaseClass == PCI_CLASS_MASS_STORAGE_CTLR) &&
235 (PdoExtension->ProgIf & 5) != 5)
236 {
237 /* These controllers only use legacy resources */
238 i = 4;
239 }
240
241 /* Set all the bits on, which will allow us to recover the limit data */
242 for (i = 0; i < PCI_TYPE0_ADDRESSES; i++) BarArray[i] = 0xFFFFFFFF;
243
244 /* Do the same for the PCI ROM BAR */
245 PciData->u.type0.ROMBaseAddress = PCI_ADDRESS_ROM_ADDRESS_MASK;
246}
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
uint32_t * PULONG
Definition: typedefs.h:59
uint32_t ULONG
Definition: typedefs.h:59
#define PCI_TYPE0_ADDRESSES
Definition: iotypes.h:3500
#define PCI_CLASS_MASS_STORAGE_CTLR
Definition: iotypes.h:4104
#define PCI_SUBCLASS_MSC_IDE_CTLR
Definition: iotypes.h:4129
#define PCI_ADDRESS_ROM_ADDRESS_MASK
Definition: iotypes.h:4235

◆ Device_ResetDevice()

VOID NTAPI Device_ResetDevice ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PPCI_COMMON_HEADER  PciData 
)

Definition at line 272 of file device.c.

274{
276 UNREFERENCED_PARAMETER(PciData);
277 /* Not yet implemented */
279}

◆ Device_RestoreCurrent()

VOID NTAPI Device_RestoreCurrent ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 250 of file device.c.

251{
253 /* Nothing to do for devices */
254 return;
255}

◆ Device_SaveCurrentSettings()

VOID NTAPI Device_SaveCurrentSettings ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 20 of file device.c.

21{
22 PPCI_COMMON_HEADER PciData;
23 PIO_RESOURCE_DESCRIPTOR IoDescriptor;
26 PULONG BarArray;
27 ULONG Bar, BarMask, i;
28
29 /* Get variables from context */
30 PciData = Context->Current;
31 Resources = Context->PdoExtension->Resources;
32
33 /* Loop all the PCI BARs */
34 BarArray = PciData->u.type0.BaseAddresses;
35 for (i = 0; i <= PCI_TYPE0_ADDRESSES; i++)
36 {
37 /* Get the resource descriptor and limit descriptor for this BAR */
38 CmDescriptor = &Resources->Current[i];
39 IoDescriptor = &Resources->Limit[i];
40
41 /* Build the resource descriptor based on the limit descriptor */
42 CmDescriptor->Type = IoDescriptor->Type;
43 if (CmDescriptor->Type == CmResourceTypeNull) continue;
44 CmDescriptor->Flags = IoDescriptor->Flags;
45 CmDescriptor->ShareDisposition = IoDescriptor->ShareDisposition;
46 CmDescriptor->u.Generic.Start.HighPart = 0;
47 CmDescriptor->u.Generic.Length = IoDescriptor->u.Generic.Length;
48
49 /* Check if we're handling PCI BARs, or the ROM BAR */
51 {
52 /* Read the actual BAR value */
53 Bar = BarArray[i];
54
55 /* Check if this is an I/O BAR */
57 {
58 /* Use the right mask to get the I/O port base address */
59 ASSERT(CmDescriptor->Type == CmResourceTypePort);
61 }
62 else
63 {
64 /* It's a RAM BAR, use the right mask to get the base address */
65 ASSERT(CmDescriptor->Type == CmResourceTypeMemory);
67
68 /* Check if it's a 64-bit BAR */
70 {
71 /* The next BAR value is actually the high 32-bits */
72 CmDescriptor->u.Memory.Start.HighPart = BarArray[i + 1];
73 }
75 {
76 /* Legacy BAR, don't read more than 20 bits of the address */
77 BarMask = 0xFFFF0;
78 }
79 }
80 }
81 else
82 {
83 /* Actually a ROM BAR, so read the correct register */
84 Bar = PciData->u.type0.ROMBaseAddress;
85
86 /* Apply the correct mask for ROM BARs */
88
89 /* Make sure it's enabled */
91 {
92 /* If it isn't, then a descriptor won't be built for it */
93 CmDescriptor->Type = CmResourceTypeNull;
94 continue;
95 }
96 }
97
98 /* Now we have the right mask, read the actual address from the BAR */
99 Bar &= BarMask;
100 CmDescriptor->u.Memory.Start.LowPart = Bar;
101
102 /* And check for invalid BAR addresses */
103 if (!(CmDescriptor->u.Memory.Start.HighPart | Bar))
104 {
105 /* Skip these descriptors */
106 CmDescriptor->Type = CmResourceTypeNull;
107 DPRINT1("Invalid BAR\n");
108 }
109 }
110
111 /* Also save the sub-IDs that came directly from the PCI header */
112 Context->PdoExtension->SubsystemVendorId = PciData->u.type0.SubVendorID;
113 Context->PdoExtension->SubsystemId = PciData->u.type0.SubSystemID;
114}
#define CmResourceTypeNull
Definition: hwresource.cpp:122
void Bar(void)
Definition: terminate.cpp:70
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@395::@396 Generic
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@395::@400 Memory
union _CM_PARTIAL_RESOURCE_DESCRIPTOR::@395 u
union _IO_RESOURCE_DESCRIPTOR::@23 u
struct _IO_RESOURCE_DESCRIPTOR::@23::@28 Generic
UCHAR ShareDisposition
Definition: edit.c:61
#define PCI_TYPE_64BIT
Definition: iotypes.h:4239
#define PCI_ADDRESS_IO_ADDRESS_MASK
Definition: iotypes.h:4233
#define PCI_ADDRESS_IO_SPACE
Definition: iotypes.h:4230
#define PCI_TYPE_20BIT
Definition: iotypes.h:4238
#define PCI_ADDRESS_MEMORY_ADDRESS_MASK
Definition: iotypes.h:4234
#define PCI_ROMADDRESS_ENABLED
Definition: iotypes.h:4241
#define PCI_ADDRESS_MEMORY_TYPE_MASK
Definition: iotypes.h:4231

◆ Device_SaveLimits()

VOID NTAPI Device_SaveLimits ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 118 of file device.c.

119{
120 PPCI_COMMON_HEADER Current, PciData;
122 PULONG BarArray;
124 ULONG i;
125
126 /* Get pointers from the context */
127 PdoExtension = Context->PdoExtension;
128 Current = Context->Current;
129 PciData = Context->PciData;
130
131 /* And get the array of bARs */
132 BarArray = PciData->u.type0.BaseAddresses;
133
134 /* First, check for IDE controllers that are not in native mode */
135 if ((PdoExtension->BaseClass == PCI_CLASS_MASS_STORAGE_CTLR) &&
137 (PdoExtension->ProgIf & 5) != 5)
138 {
139 /* They should not be using any non-legacy resources */
140 BarArray[0] = 0;
141 BarArray[1] = 0;
142 BarArray[2] = 0;
143 BarArray[3] = 0;
144 }
145 else if ((PdoExtension->VendorId == 0x5333) &&
146 ((PdoExtension->DeviceId == 0x88F0) ||
147 (PdoExtension->DeviceId == 0x8880)))
148 {
149 /*
150 * The problem is caused by the S3 Vision 968/868 video controller which
151 * is used on the Diamond Stealth 64 Video 3000 series, Number Nine 9FX
152 * motion 771, and other popular video cards, all containing a memory bug.
153 * The 968/868 claims to require 32 MB of memory, but it actually decodes
154 * 64 MB of memory.
155 */
156 for (i = 0; i < PCI_TYPE0_ADDRESSES; i++)
157 {
158 /* Find its 32MB RAM BAR */
159 if (BarArray[i] == 0xFE000000)
160 {
161 /* Increase it to 64MB to make sure nobody touches the buffer */
162 BarArray[i] = 0xFC000000;
163 DPRINT1("PCI - Adjusted broken S3 requirement from 32MB to 64MB\n");
164 }
165 }
166 }
167
168 /* Check for Cirrus Logic GD5430/5440 cards */
169 if ((PdoExtension->VendorId == 0x1013) && (PdoExtension->DeviceId == 0xA0))
170 {
171 /* Check for the I/O port requirement */
172 if (BarArray[1] == 0xFC01)
173 {
174 /* Check for completely bogus BAR */
175 if (Current->u.type0.BaseAddresses[1] == 1)
176 {
177 /* Ignore it */
178 BarArray[1] = 0;
179 DPRINT1("PCI - Ignored Cirrus GD54xx broken IO requirement (400 ports)\n");
180 }
181 else
182 {
183 /* Otherwise, this BAR seems okay */
184 DPRINT1("PCI - Cirrus GD54xx 400 port IO requirement has a valid setting (%08x)\n",
185 Current->u.type0.BaseAddresses[1]);
186 }
187 }
188 else if (BarArray[1])
189 {
190 /* Strange, the I/O BAR was not found as expected (or at all) */
191 DPRINT1("PCI - Warning Cirrus Adapter 101300a0 has unexpected resource requirement (%08x)\n",
192 BarArray[1]);
193 }
194 }
195
196 /* Finally, process all the limit descriptors */
197 Limit = PdoExtension->Resources->Limit;
198 for (i = 0; i < PCI_TYPE0_ADDRESSES; i++)
199 {
200 /* And build them based on the BARs */
201 if (PciCreateIoDescriptorFromBarLimit(&Limit[i], &BarArray[i], FALSE))
202 {
203 /* This function returns TRUE if the BAR was 64-bit, handle this */
205 i++;
206 Limit[i].Type = CmResourceTypeNull;
207 }
208 }
209
210 /* Create the last descriptor based on the ROM address */
212 &PciData->u.type0.ROMBaseAddress,
213 TRUE);
214}
BOOLEAN NTAPI PciCreateIoDescriptorFromBarLimit(PIO_RESOURCE_DESCRIPTOR ResourceDescriptor, IN PULONG BarArray, IN BOOLEAN Rom)
Definition: utils.c:1175
_In_ LONG _In_ LONG Limit
Definition: kefuncs.h:304

◆ devpresent_Constructor()

NTSTATUS NTAPI devpresent_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 45 of file devhere.c.

◆ devpresent_Initializer()

NTSTATUS NTAPI devpresent_Initializer ( IN PVOID  Instance)

Definition at line 35 of file devhere.c.

36{
38 /* PnP Interfaces don't get Initialized */
39 ASSERTMSG("PCI devpresent_Initializer, unexpected call.\n", FALSE);
41}

◆ lddintrf_Constructor()

NTSTATUS NTAPI lddintrf_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 45 of file lddintrf.c.

◆ lddintrf_Initializer()

NTSTATUS NTAPI lddintrf_Initializer ( IN PVOID  Instance)

Definition at line 35 of file lddintrf.c.

36{
38 /* PnP Interfaces don't get Initialized */
39 ASSERTMSG("PCI lddintrf_Initializer, unexpected call.\n", FALSE);
41}

◆ locintrf_Constructor()

NTSTATUS NTAPI locintrf_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 45 of file locintrf.c.

◆ locintrf_Initializer()

NTSTATUS NTAPI locintrf_Initializer ( IN PVOID  Instance)

Definition at line 35 of file locintrf.c.

36{
38 /* PnP Interfaces don't get Initialized */
39 ASSERTMSG("PCI locintrf_Initializer, unexpected call.\n", FALSE);
41}

◆ PciAddDevice()

NTSTATUS NTAPI PciAddDevice ( IN PDRIVER_OBJECT  DriverObject,
IN PDEVICE_OBJECT  PhysicalDeviceObject 
)

Definition at line 458 of file fdo.c.

460{
462 PDEVICE_OBJECT AttachedTo;
464 PPCI_FDO_EXTENSION ParentExtension;
473 PAGED_CODE();
474 DPRINT1("PCI - AddDevice (a new bus). PDO: %p (Driver: %wZ)\n",
475 PhysicalDeviceObject, &PhysicalDeviceObject->DriverObject->DriverName);
476
477 /* Zero out variables so failure path knows what to do */
478 AttachedTo = NULL;
482
483 do
484 {
485 /* Check if there's already a device extension for this bus */
488 if (ParentExtension)
489 {
490 /* Make sure we find a real PDO */
493
494 /* Make sure it's a PCI-to-PCI bridge */
495 if ((PdoExtension->BaseClass != PCI_CLASS_BRIDGE_DEV) ||
497 {
498 /* This should never happen */
499 DPRINT1("PCI - PciAddDevice for Non-Root/Non-PCI-PCI bridge,\n"
500 " Class %02x, SubClass %02x, will not add.\n",
501 PdoExtension->BaseClass,
502 PdoExtension->SubClass);
503 ASSERT((PdoExtension->BaseClass == PCI_CLASS_BRIDGE_DEV) &&
505
506 /* Enter the failure path */
508 break;
509 }
510
511 /* Subordinate bus on the bridge */
512 DPRINT1("PCI - AddDevice (new bus is child of bus 0x%x).\n",
513 ParentExtension->BaseBus);
514
515 /* Make sure PCI bus numbers are configured */
517 {
518 /* This is a critical failure */
519 DPRINT1("PCI - Bus numbers not configured for bridge (0x%x.0x%x.0x%x)\n",
520 ParentExtension->BaseBus,
521 PdoExtension->Slot.u.bits.DeviceNumber,
522 PdoExtension->Slot.u.bits.FunctionNumber);
523
524 /* Enter the failure path */
526 break;
527 }
528 }
529
530 /* Create the FDO for the bus */
532 sizeof(PCI_FDO_EXTENSION),
533 NULL,
535 0,
536 0,
537 &DeviceObject);
538 if (!NT_SUCCESS(Status)) break;
539
540 /* Initialize the extension for the FDO */
541 FdoExtension = DeviceObject->DeviceExtension;
545
546 /* Attach to the root PDO */
550 ASSERT(AttachedTo != NULL);
551 if (!AttachedTo) break;
552 FdoExtension->AttachedDeviceObject = AttachedTo;
553
554 /* Check if this is a child bus, or the root */
555 if (ParentExtension)
556 {
557 /* The child inherits root data */
558 FdoExtension->BaseBus = PdoExtension->Dependent.type1.SecondaryBus;
559 FdoExtension->BusRootFdoExtension = ParentExtension->BusRootFdoExtension;
560 PdoExtension->BridgeFdoExtension = FdoExtension;
561 FdoExtension->ParentFdoExtension = ParentExtension;
562 }
563 else
564 {
565 /* Query the boot configuration */
568 (PVOID*)&Descriptor);
569 if (!NT_SUCCESS(Status))
570 {
571 /* No configuration has been set */
573 }
574 else
575 {
576 /* Root PDO in ReactOS does not assign boot resources */
577 UNIMPLEMENTED_DBGBREAK("Encountered during setup\n");
579 }
580
581 if (Descriptor)
582 {
583 /* Root PDO in ReactOS does not assign boot resources */
585 }
586 else
587 {
588 /* Default configuration isn't the normal path on Windows */
590 {
591 /* If a second bus is found and there's still no data, crash */
592 KeBugCheckEx(PCI_BUS_DRIVER_INTERNAL,
593 0xDEAD0010u,
595 0,
596 0);
597 }
598
599 /* Warn that a default configuration will be used, and set bus 0 */
600 DPRINT1("PCI Will use default configuration.\n");
602 FdoExtension->BaseBus = 0;
603 }
604
605 /* This is the root bus */
606 FdoExtension->BusRootFdoExtension = FdoExtension;
607 }
608
609 /* Get the HAL or ACPI Bus Handler Callbacks for Configuration Access */
611 if (!NT_SUCCESS(Status)) break;
612
613 /* Initialize all the supported PCI arbiters */
615 if (!NT_SUCCESS(Status)) break;
616
617 /* This is a real FDO, insert it into the list */
618 FdoExtension->Fake = FALSE;
622
623 /* Open the device registry key so that we can query the errata flags */
627 &KeyHandle),
628
629 /* Open the value that contains errata flags for this bus instance */
630 RtlInitUnicodeString(&ValueName, L"HackFlags");
631 Status = ZwQueryValueKey(KeyHandle,
632 &ValueName,
634 ValueInfo,
635 sizeof(Buffer),
636 &ResultLength);
638 if (NT_SUCCESS(Status))
639 {
640 /* Make sure the data is of expected type and size */
641 if ((ValueInfo->Type == REG_DWORD) &&
642 (ValueInfo->DataLength == sizeof(ULONG)))
643 {
644 /* Read the flags for this bus */
645 FdoExtension->BusHackFlags = *(PULONG)&ValueInfo->Data;
646 }
647 }
648
649 /* Query ACPI for PCI HotPlug Support */
651
652 /* The Bus FDO is now initialized */
653 DeviceObject->Flags &= ~DO_DEVICE_INITIALIZING;
654 return STATUS_SUCCESS;
655 } while (FALSE);
656
657 /* This is the failure path */
659
660 /* Check if the FDO extension exists */
661 if (FdoExtension) DPRINT1("Should destroy secondaries\n");
662
663 /* Delete device objects */
664 if (AttachedTo) IoDetachDevice(AttachedTo);
666 return Status;
667}
NTSTATUS NTAPI PciInitializeArbiters(IN PPCI_FDO_EXTENSION FdoExtension)
Definition: arb_comn.c:40
PDEVICE_OBJECT PhysicalDeviceObject
Definition: btrfs_drv.h:1157
VOID NTAPI PciInitializeFdoExtensionCommonFields(PPCI_FDO_EXTENSION FdoExtension, IN PDEVICE_OBJECT DeviceObject, IN PDEVICE_OBJECT PhysicalDeviceObject)
Definition: fdo.c:433
BOOLEAN PciBreakOnDefault
Definition: fdo.c:19
SINGLE_LIST_ENTRY PciFdoExtensionListHead
Definition: fdo.c:18
VOID NTAPI PciGetHotPlugParameters(IN PPCI_FDO_EXTENSION FdoExtension)
Definition: fdo.c:379
Definition: bufpool.h:45
KEVENT PciGlobalLock
Definition: init.c:20
VOID NTAPI PciInsertEntryAtTail(IN PSINGLE_LIST_ENTRY ListHead, IN PPCI_FDO_EXTENSION DeviceExtension, IN PKEVENT Lock)
Definition: utils.c:400
BOOLEAN NTAPI PciAreBusNumbersConfigured(IN PPCI_PDO_EXTENSION PdoExtension)
Definition: busno.c:20
PPCI_FDO_EXTENSION NTAPI PciFindParentPciFdoExtension(IN PDEVICE_OBJECT DeviceObject, IN PKEVENT Lock)
Definition: utils.c:340
NTSTATUS NTAPI PciGetDeviceProperty(IN PDEVICE_OBJECT DeviceObject, IN DEVICE_REGISTRY_PROPERTY DeviceProperty, OUT PVOID *OutputBuffer)
Definition: utils.c:475
#define ASSERT_PDO(x)
Definition: pci.h:38
NTSTATUS NTAPI PciGetConfigHandlers(IN PPCI_FDO_EXTENSION FdoExtension)
Definition: config.c:224
_Must_inspect_result_ _Out_ PNDIS_STATUS _In_ NDIS_HANDLE _In_ ULONG _Out_ PNDIS_STRING _Out_ PNDIS_HANDLE KeyHandle
Definition: ndis.h:4715
NTSYSAPI NTSTATUS NTAPI ZwClose(_In_ HANDLE Handle)
@ KeyValuePartialInformation
Definition: nt_native.h:1182
#define KEY_ALL_ACCESS
Definition: nt_native.h:1041
NTSYSAPI VOID NTAPI RtlInitUnicodeString(PUNICODE_STRING DestinationString, PCWSTR SourceString)
struct _KEY_VALUE_PARTIAL_INFORMATION KEY_VALUE_PARTIAL_INFORMATION
struct _KEY_VALUE_PARTIAL_INFORMATION * PKEY_VALUE_PARTIAL_INFORMATION
PDEVICE_OBJECT NTAPI IoAttachDeviceToDeviceStack(IN PDEVICE_OBJECT SourceDevice, IN PDEVICE_OBJECT TargetDevice)
Definition: device.c:966
NTSTATUS NTAPI IoCreateDevice(IN PDRIVER_OBJECT DriverObject, IN ULONG DeviceExtensionSize, IN PUNICODE_STRING DeviceName, IN DEVICE_TYPE DeviceType, IN ULONG DeviceCharacteristics, IN BOOLEAN Exclusive, OUT PDEVICE_OBJECT *DeviceObject)
Definition: device.c:1031
VOID NTAPI IoDetachDevice(IN PDEVICE_OBJECT TargetDevice)
Definition: device.c:1296
VOID NTAPI IoDeleteDevice(IN PDEVICE_OBJECT DeviceObject)
Definition: device.c:1251
NTSTATUS NTAPI IoOpenDeviceRegistryKey(IN PDEVICE_OBJECT DeviceObject, IN ULONG DevInstKeyType, IN ACCESS_MASK DesiredAccess, OUT PHANDLE DevInstRegKey)
Definition: pnpmgr.c:1621
#define FILE_DEVICE_BUS_EXTENDER
Definition: winioctl.h:148
VOID NTAPI KeBugCheckEx(_In_ ULONG BugCheckCode, _In_ ULONG_PTR BugCheckParameter1, _In_ ULONG_PTR BugCheckParameter2, _In_ ULONG_PTR BugCheckParameter3, _In_ ULONG_PTR BugCheckParameter4)
Definition: rtlcompat.c:108
#define REG_DWORD
Definition: sdbapi.c:596
PVOID DeviceExtension
Definition: env_spec_w32.h:418
BOOLEAN BaseBus
Definition: pci.h:211
struct _PCI_FDO_EXTENSION * BusRootFdoExtension
Definition: pci.h:205
#define STATUS_INVALID_DEVICE_REQUEST
Definition: udferr_usr.h:138
#define STATUS_NO_SUCH_DEVICE
Definition: udferr_usr.h:136
_In_ PDEVICE_OBJECT DeviceObject
Definition: wdfdevice.h:2055
_Must_inspect_result_ _In_ WDFDEVICE _In_ DEVICE_REGISTRY_PROPERTY _In_ ULONG _Out_ PULONG ResultLength
Definition: wdfdevice.h:3776
_Must_inspect_result_ _In_ PDRIVER_OBJECT DriverObject
Definition: wdfdriver.h:213
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING ValueName
Definition: wdfregistry.h:243
_Must_inspect_result_ _In_ WDFIORESLIST _In_ PIO_RESOURCE_DESCRIPTOR Descriptor
Definition: wdfresource.h:342
#define PLUGPLAY_REGKEY_DEVICE
Definition: iofuncs.h:2786
@ DevicePropertyBootConfiguration
Definition: iotypes.h:1198
unsigned char UCHAR
Definition: xmlstorage.h:181

◆ PciAreBusNumbersConfigured()

BOOLEAN NTAPI PciAreBusNumbersConfigured ( IN PPCI_PDO_EXTENSION  PdoExtension)

Definition at line 20 of file busno.c.

21{
22 UCHAR PrimaryBus, BaseBus, SecondaryBus, SubordinateBus;
23
24 PAGED_CODE();
25
26 /* Get all relevant bus number details */
27 PrimaryBus = PdoExtension->Dependent.type1.PrimaryBus;
28 BaseBus = PdoExtension->ParentFdoExtension->BaseBus;
29 SecondaryBus = PdoExtension->Dependent.type1.SecondaryBus;
30 SubordinateBus = PdoExtension->Dependent.type1.SubordinateBus;
31
32 /* The primary bus should be the base bus of the parent */
33 if ((PrimaryBus != BaseBus) || (SecondaryBus <= PrimaryBus)) return FALSE;
34
35 /* The subordinate should be a higher bus number than the secondary */
36 return SubordinateBus >= SecondaryBus;
37}

Referenced by PciAddDevice().

◆ PciBeginStateTransition()

NTSTATUS NTAPI PciBeginStateTransition ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN PCI_STATE  NewState 
)

Definition at line 97 of file state.c.

99{
102 DPRINT1("PCI Request to begin transition of Extension %p to %s ->",
103 DeviceExtension,
104 PciTransitionText[NewState]);
105
106 /* Assert the device isn't already in a pending transition */
107 ASSERT(DeviceExtension->TentativeNextState == DeviceExtension->DeviceState);
108
109 /* Assert this is a valid state */
110 CurrentState = DeviceExtension->DeviceState;
112 ASSERT(NewState < PciMaxObjectState);
113
114 /* Lookup if this state transition is valid */
117 {
118 /* Invalid transition (logical fault) */
119 DPRINT1("ERROR\nPCI: Error trying to enter state \"%s\" "
120 "from state \"%s\"\n",
121 PciTransitionText[NewState],
124 }
126 {
127 /* Invalid transition (illegal request) */
128 DPRINT1("ERROR\nPCI: Illegal request to try to enter state \"%s\" "
129 "from state \"%s\", rejecting",
130 PciTransitionText[NewState],
132 }
133
134 /* New state must be different from current, unless request is at fault */
135 ASSERT((NewState != DeviceExtension->DeviceState) || (!NT_SUCCESS(Status)));
136
137 /* Enter the new state if successful, and return state status */
138 if (NT_SUCCESS(Status)) DeviceExtension->TentativeNextState = NewState;
139 DbgPrint("%x\n", Status);
140 return Status;
141}
PCHAR PciTransitionText[PciMaxObjectState+1]
Definition: state.c:18
NTSTATUS PnpStateTransitionArray[PciMaxObjectState *PciMaxObjectState]
Definition: state.c:39
#define DbgPrint
Definition: hal.h:12
NTSYSAPI void WINAPI DbgBreakPoint(void)
#define STATUS_FAIL_CHECK
Definition: ntstatus.h:685
_Out_opt_ PBOOLEAN CurrentState
Definition: zwfuncs.h:393

Referenced by PciFdoIrpStartDevice(), PciPdoIrpStartDevice(), and PciQueryDeviceRelations().

◆ PciBuildDefaultExclusionLists()

NTSTATUS NTAPI PciBuildDefaultExclusionLists ( VOID  )

Definition at line 276 of file utils.c.

277{
278 ULONG Start;
282
283 /* Initialize the range lists */
286
287 /* Loop x86 I/O ranges */
288 for (Start = 0x100; Start <= 0xFEFF; Start += 0x400)
289 {
290 /* Add the ISA I/O ranges */
292 Start,
293 Start + 0x2FF,
294 0,
296 NULL,
297 NULL);
298 if (!NT_SUCCESS(Status)) break;
299
300 /* Add the ISA I/O ranges */
302 Start,
303 Start + 0x2AF,
304 0,
306 NULL,
307 NULL);
308 if (!NT_SUCCESS(Status)) break;
309
310 /* Add the VGA I/O range for Monochrome Video */
312 Start + 0x2BC,
313 Start + 0x2BF,
314 0,
316 NULL,
317 NULL);
318 if (!NT_SUCCESS(Status)) break;
319
320 /* Add the VGA I/O range for certain CGA adapters */
322 Start + 0x2E0,
323 Start + 0x2FF,
324 0,
326 NULL,
327 NULL);
328 if (!NT_SUCCESS(Status)) break;
329
330 /* Success, ranges added done */
331 };
332
335 return Status;
336}
RTL_RANGE_LIST PciVgaAndIsaBitExclusionList
Definition: utils.c:21
RTL_RANGE_LIST PciIsaBitExclusionList
Definition: utils.c:20
NTSYSAPI NTSTATUS NTAPI RtlAddRange(_Inout_ PRTL_RANGE_LIST RangeList, _In_ ULONGLONG Start, _In_ ULONGLONG End, _In_ UCHAR Attributes, _In_ ULONG Flags, _In_opt_ PVOID UserData, _In_opt_ PVOID Owner)
NTSYSAPI VOID NTAPI RtlInitializeRangeList(_Out_ PRTL_RANGE_LIST RangeList)
NTSYSAPI VOID NTAPI RtlFreeRangeList(_In_ PRTL_RANGE_LIST RangeList)
#define RTL_RANGE_LIST_ADD_IF_CONFLICT
Definition: rtltypes.h:81
@ Start
Definition: partlist.h:33

Referenced by DriverEntry().

◆ PciBuildRequirementsList()

NTSTATUS NTAPI PciBuildRequirementsList ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PPCI_COMMON_HEADER  PciData,
OUT PIO_RESOURCE_REQUIREMENTS_LIST Buffer 
)

Definition at line 551 of file enum.c.

554{
556
558 UNREFERENCED_PARAMETER(PciData);
559
560 {
561 /* There aren't, so use the zero descriptor */
563
564 /* Does it actually exist yet? */
566 {
567 /* Allocate it, and use it for future use */
571 }
572
573 /* Return the zero requirements list to the caller */
575 DPRINT1("PCI - build resource reqs - early out, 0 resources\n");
576 return STATUS_SUCCESS;
577 }
578 return STATUS_SUCCESS;
579}
PIO_RESOURCE_REQUIREMENTS_LIST PciZeroIoResourceRequirements
Definition: enum.c:18
PIO_RESOURCE_REQUIREMENTS_LIST NTAPI PciAllocateIoRequirementsList(IN ULONG Count, IN ULONG BusNumber, IN ULONG SlotNumber)
Definition: enum.c:291
#define STATUS_INSUFFICIENT_RESOURCES
Definition: udferr_usr.h:158
_In_ WDFIORESREQLIST RequirementsList
Definition: wdfresource.h:65

Referenced by PciAssignSlotResources(), and PciQueryRequirements().

◆ PciCacheLegacyDeviceRouting()

NTSTATUS NTAPI PciCacheLegacyDeviceRouting ( IN PDEVICE_OBJECT  DeviceObject,
IN ULONG  BusNumber,
IN ULONG  SlotNumber,
IN UCHAR  InterruptLine,
IN UCHAR  InterruptPin,
IN UCHAR  BaseClass,
IN UCHAR  SubClass,
IN PDEVICE_OBJECT  PhysicalDeviceObject,
IN PPCI_PDO_EXTENSION  PdoExtension,
OUT PDEVICE_OBJECT pFoundDeviceObject 
)

Definition at line 70 of file routintf.c.

80{
82 PPCI_LEGACY_DEVICE LegacyDevice;
83 PDEVICE_OBJECT FoundDeviceObject;
84 PAGED_CODE();
85
86 /* Scan current registered devices */
87 LegacyDevice = PciLegacyDeviceHead;
89 while (LegacyDevice)
90 {
91 /* Find a match */
92 if ((BusNumber == LegacyDevice->BusNumber) &&
93 (SlotNumber == LegacyDevice->SlotNumber))
94 {
95 /* We already know about this routing */
96 break;
97 }
98
99 /* We know about device already, but for a different location */
100 if (LegacyDevice->DeviceObject == DeviceObject)
101 {
102 /* Free the existing structure, move to the next one */
103 *Link = LegacyDevice->Next;
104 ExFreePoolWithTag(LegacyDevice, 0);
105 LegacyDevice = *Link;
106 }
107 else
108 {
109 /* Keep going */
110 Link = &LegacyDevice->Next;
111 LegacyDevice = LegacyDevice->Next;
112 }
113 }
114
115 /* Did we find a match? */
116 if (!LegacyDevice)
117 {
118 /* Allocate a new cache structure */
119 LegacyDevice = ExAllocatePoolWithTag(PagedPool,
120 sizeof(PCI_LEGACY_DEVICE),
121 'PciR');
122 if (!LegacyDevice) return STATUS_INSUFFICIENT_RESOURCES;
123
124 /* Save all the data in it */
125 RtlZeroMemory(LegacyDevice, sizeof(PCI_LEGACY_DEVICE));
126 LegacyDevice->BusNumber = BusNumber;
127 LegacyDevice->SlotNumber = SlotNumber;
128 LegacyDevice->InterruptLine = InterruptLine;
129 LegacyDevice->InterruptPin = InterruptPin;
130 LegacyDevice->BaseClass = BaseClass;
131 LegacyDevice->SubClass = SubClass;
133 LegacyDevice->DeviceObject = DeviceObject;
134 LegacyDevice->PdoExtension = PdoExtension;
135
136 /* Link it in the list */
137 LegacyDevice->Next = PciLegacyDeviceHead;
138 PciLegacyDeviceHead = LegacyDevice;
139 }
140
141 /* Check if we found, or created, a matching caching structure */
142 FoundDeviceObject = LegacyDevice->DeviceObject;
143 if (FoundDeviceObject == DeviceObject)
144 {
145 /* Return the device object and success */
146 if (pFoundDeviceObject) *pFoundDeviceObject = DeviceObject;
147 return STATUS_SUCCESS;
148 }
149
150 /* Otherwise, this is a new device object for this location */
151 LegacyDevice->DeviceObject = DeviceObject;
152 if (pFoundDeviceObject) *pFoundDeviceObject = FoundDeviceObject;
153 return STATUS_SUCCESS;
154}
#define ExAllocatePoolWithTag(hernya, size, tag)
Definition: env_spec_w32.h:350
#define PagedPool
Definition: env_spec_w32.h:308
#define ExFreePoolWithTag(_P, _T)
Definition: module.h:1109
PPCI_LEGACY_DEVICE PciLegacyDeviceHead
Definition: routintf.c:18
UCHAR InterruptPin
Definition: pci.h:529
UCHAR SubClass
Definition: pci.h:531
UCHAR BaseClass
Definition: pci.h:530
PPCI_PDO_EXTENSION PdoExtension
Definition: pci.h:534
UCHAR InterruptLine
Definition: pci.h:528
PDEVICE_OBJECT PhysicalDeviceObject
Definition: pci.h:532
PDEVICE_OBJECT DeviceObject
Definition: pci.h:525
struct _PCI_LEGACY_DEVICE * Next
Definition: pci.h:524
ULONG BusNumber
Definition: pci.h:526
ULONG SlotNumber
Definition: pci.h:527
static int Link(const char **args)
Definition: vfdcmd.c:2414
_In_ WDFIORESREQLIST _In_ ULONG SlotNumber
Definition: wdfresource.h:68
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG BusNumber
Definition: halfuncs.h:160

Referenced by PciAssignSlotResources().

◆ PciCallDownIrpStack()

NTSTATUS NTAPI PciCallDownIrpStack ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN PIRP  Irp 
)

Definition at line 39 of file dispatch.c.

41{
44 PAGED_CODE();
45 DPRINT1("PciCallDownIrpStack ...\n");
46 ASSERT_FDO(DeviceExtension);
47
48 /* Initialize the wait event */
50
51 /* Setup a completion routine */
54
55 /* Call the attached device */
56 Status = IoCallDriver(DeviceExtension->AttachedDeviceObject, Irp);
58 {
59 /* Wait for it to complete the request, and get its status */
61 Status = Irp->IoStatus.Status;
62 }
63
64 /* Return that status back to the caller */
65 return Status;
66}
_In_ PIRP Irp
Definition: csq.h:116
IO_COMPLETION_ROUTINE PciSetEventCompletion
Definition: dispatch.c:18
#define ASSERT_FDO(x)
Definition: pci.h:37
#define KeWaitForSingleObject(pEvt, foo, a, b, c)
Definition: env_spec_w32.h:478
#define KeInitializeEvent(pEvt, foo, foo2)
Definition: env_spec_w32.h:477
#define IoSetCompletionRoutine(_Irp, _CompletionRoutine, _Context, _InvokeOnSuccess, _InvokeOnError, _InvokeOnCancel)
Definition: irp.cpp:490
#define KernelMode
Definition: asm.h:34
@ SynchronizationEvent
#define IoCopyCurrentIrpStackLocationToNext(Irp)
Definition: ntifs_ex.h:413
#define IoCallDriver
Definition: irp.c:1225
#define STATUS_PENDING
Definition: ntstatus.h:82
@ Executive
Definition: ketypes.h:415

Referenced by PciDispatchIrp(), and PciFdoIrpQueryInterface().

◆ PciCancelStateTransition()

NTSTATUS NTAPI PciCancelStateTransition ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN PCI_STATE  NewState 
)

Definition at line 145 of file state.c.

147{
149 DPRINT1("PCI Request to cancel transition of Extension %p to %s ->",
150 DeviceExtension,
151 PciTransitionText[StateNotEntered]);
152
153 /* The next state can't be the state the device is already in */
154 if (DeviceExtension->TentativeNextState == DeviceExtension->DeviceState)
155 {
156 /* It's too late since the state was already committed */
157 ASSERT(StateNotEntered < PciMaxObjectState);
158 ASSERT(PnpStateCancelArray[StateNotEntered] != STATUS_FAIL_CHECK);
159
160 /* Return failure */
162 DbgPrint("%x\n", Status);
163 }
164 else
165 {
166 /* The device hasn't yet entered the state, so it's still possible to cancel */
167 ASSERT(DeviceExtension->TentativeNextState == StateNotEntered);
168 DeviceExtension->TentativeNextState = DeviceExtension->DeviceState;
169
170 /* Return success */
172 DbgPrint("%x\n", Status);
173 }
174
175 /* Return the cancel state */
176 return Status;
177}
NTSTATUS PnpStateCancelArray[PciMaxObjectState]
Definition: state.c:29
#define STATUS_INVALID_DEVICE_STATE
Definition: udferr_usr.h:178

Referenced by PciFdoIrpStartDevice(), PciPdoIrpStartDevice(), and PciQueryDeviceRelations().

◆ PciCanDisableDecodes()

BOOLEAN NTAPI PciCanDisableDecodes ( IN PPCI_PDO_EXTENSION  DeviceExtension,
IN PPCI_COMMON_HEADER  Config,
IN ULONGLONG  HackFlags,
IN BOOLEAN  ForPowerDown 
)

Definition at line 955 of file utils.c.

959{
960 UCHAR BaseClass, SubClass;
961 BOOLEAN IsVga;
962
963 /* Is there a device extension or should the PCI header be used? */
964 if (DeviceExtension)
965 {
966 /* Never disable decodes for a debug PCI Device */
967 if (DeviceExtension->OnDebugPath) return FALSE;
968
969 /* Hack flags will be obtained from the extension, not the caller */
970 ASSERT(HackFlags == 0);
971
972 /* Get hacks and classification from the device extension */
973 HackFlags = DeviceExtension->HackFlags;
974 SubClass = DeviceExtension->SubClass;
975 BaseClass = DeviceExtension->BaseClass;
976 }
977 else
978 {
979 /* There must be a PCI header, go read the classification information */
980 ASSERT(Config != NULL);
981 BaseClass = Config->BaseClass;
982 SubClass = Config->SubClass;
983 }
984
985 /* Check for hack flags that prevent disabling the decodes */
989 {
990 /* Don't do it */
991 return FALSE;
992 }
993
994 /* Is this a VGA adapter? */
995 if ((BaseClass == PCI_CLASS_DISPLAY_CTLR) &&
996 (SubClass == PCI_SUBCLASS_VID_VGA_CTLR))
997 {
998 /* Never disable decodes if this is for power down */
999 return ForPowerDown;
1000 }
1001
1002 /* Check for legacy devices */
1003 if (BaseClass == PCI_CLASS_PRE_20)
1004 {
1005 /* Never disable video adapter cards if this is for power down */
1006 if (SubClass == PCI_SUBCLASS_PRE_20_VGA) return ForPowerDown;
1007 }
1008 else if (BaseClass == PCI_CLASS_DISPLAY_CTLR)
1009 {
1010 /* Never disable VGA adapters if this is for power down */
1011 if (SubClass == PCI_SUBCLASS_VID_VGA_CTLR) return ForPowerDown;
1012 }
1013 else if (BaseClass == PCI_CLASS_BRIDGE_DEV)
1014 {
1015 /* Check for legacy bridges */
1016 if ((SubClass == PCI_SUBCLASS_BR_ISA) ||
1017 (SubClass == PCI_SUBCLASS_BR_EISA) ||
1018 (SubClass == PCI_SUBCLASS_BR_MCA) ||
1019 (SubClass == PCI_SUBCLASS_BR_HOST) ||
1020 (SubClass == PCI_SUBCLASS_BR_OTHER))
1021 {
1022 /* Never disable these */
1023 return FALSE;
1024 }
1025 else if ((SubClass == PCI_SUBCLASS_BR_PCI_TO_PCI) ||
1026 (SubClass == PCI_SUBCLASS_BR_CARDBUS))
1027 {
1028 /* This is a supported bridge, but does it have a VGA card? */
1029 if (!DeviceExtension)
1030 {
1031 /* Read the bridge control flag from the PCI header */
1032 IsVga = Config->u.type1.BridgeControl & PCI_ENABLE_BRIDGE_VGA;
1033 }
1034 else
1035 {
1036 /* Read the cached flag in the device extension */
1037 IsVga = DeviceExtension->Dependent.type1.VgaBitSet;
1038 }
1039
1040 /* Never disable VGA adapters if this is for power down */
1041 if (IsVga) return ForPowerDown;
1042 }
1043 }
1044
1045 /* Finally, never disable decodes if there's no power management */
1046 return !(HackFlags & PCI_HACK_NO_PM_CAPS);
1047}
unsigned char BOOLEAN
_In_ ULONG_PTR HackFlags
Definition: cdrom.h:983
#define PCI_HACK_PRESERVE_COMMAND
Definition: pci.h:24
#define PCI_ENABLE_BRIDGE_VGA
Definition: pci.h:62
#define PCI_HACK_DONT_DISABLE_DECODES
Definition: pci.h:40
#define PCI_HACK_CB_SHARE_CMD_BITS
Definition: pci.h:26
#define PCI_HACK_NO_PM_CAPS
Definition: pci.h:39
_Must_inspect_result_ _In_ WDFDEVICE _In_ PWDF_CHILD_LIST_CONFIG Config
Definition: wdfchildlist.h:476
#define PCI_SUBCLASS_BR_OTHER
Definition: iotypes.h:4170
#define PCI_SUBCLASS_BR_EISA
Definition: iotypes.h:4163
#define PCI_SUBCLASS_BR_HOST
Definition: iotypes.h:4161
#define PCI_SUBCLASS_BR_MCA
Definition: iotypes.h:4164
#define PCI_SUBCLASS_BR_ISA
Definition: iotypes.h:4162
#define PCI_SUBCLASS_BR_CARDBUS
Definition: iotypes.h:4168
#define PCI_CLASS_PRE_20
Definition: iotypes.h:4103
#define PCI_SUBCLASS_VID_VGA_CTLR
Definition: iotypes.h:4144
#define PCI_SUBCLASS_PRE_20_VGA
Definition: iotypes.h:4125
#define PCI_CLASS_DISPLAY_CTLR
Definition: iotypes.h:4106

Referenced by PciDecodeEnable(), and PciSetPowerManagedDevicePowerState().

◆ pcicbintrf_Constructor()

NTSTATUS NTAPI pcicbintrf_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 109 of file cardbus.c.

115{
116 UNREFERENCED_PARAMETER(DeviceExtension);
118 UNREFERENCED_PARAMETER(InterfaceData);
122
123 /* Not yet implemented */
126}

◆ pcicbintrf_Initializer()

NTSTATUS NTAPI pcicbintrf_Initializer ( IN PVOID  Instance)

Definition at line 99 of file cardbus.c.

100{
102 /* PnP Interfaces don't get Initialized */
103 ASSERTMSG("PCI pcicbintrf_Initializer, unexpected call.\n", FALSE);
104 return STATUS_UNSUCCESSFUL;
105}

◆ PciClassifyDeviceType()

PCI_DEVICE_TYPES NTAPI PciClassifyDeviceType ( IN PPCI_PDO_EXTENSION  PdoExtension)

Definition at line 1051 of file utils.c.

1052{
1053 ASSERT(PdoExtension->ExtensionType == PciPdoExtensionType);
1054
1055 /* Differentiate between devices and bridges */
1056 if (PdoExtension->BaseClass != PCI_CLASS_BRIDGE_DEV) return PciTypeDevice;
1057
1058 /* The PCI Bus driver handles only CardBus and PCI bridges (plus host) */
1059 if (PdoExtension->SubClass == PCI_SUBCLASS_BR_HOST) return PciTypeHostBridge;
1062
1063 /* Any other kind of bridge is treated like a device */
1064 return PciTypeDevice;
1065}

Referenced by PciProcessBus().

◆ PciCommitStateTransition()

VOID NTAPI PciCommitStateTransition ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN PCI_STATE  NewState 
)

Definition at line 181 of file state.c.

183{
184 DPRINT1("PCI Commit transition of Extension %p to %s\n",
185 DeviceExtension, PciTransitionText[NewState]);
186
187 /* Make sure this is a valid commit */
188 ASSERT(NewState != PciSynchronizedOperation);
189 ASSERT(DeviceExtension->TentativeNextState == NewState);
190
191 /* Enter the new state */
192 DeviceExtension->DeviceState = NewState;
193}

Referenced by PciFdoIrpStartDevice(), and PciPdoIrpStartDevice().

◆ PciComputeNewCurrentSettings()

BOOLEAN NTAPI PciComputeNewCurrentSettings ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PCM_RESOURCE_LIST  ResourceList 
)

Definition at line 55 of file enum.c.

57{
58 PCM_PARTIAL_RESOURCE_DESCRIPTOR Partial, InterruptResource;
59 PCM_PARTIAL_RESOURCE_DESCRIPTOR BaseResource, CurrentDescriptor;
60 PCM_PARTIAL_RESOURCE_DESCRIPTOR PreviousDescriptor;
61 CM_PARTIAL_RESOURCE_DESCRIPTOR ResourceArray[7];
63 BOOLEAN DrainPartial, RangeChange;
64 ULONG i, j;
65 PPCI_FUNCTION_RESOURCES PciResources;
66 PAGED_CODE();
67
68 /* Make sure we have either no resources, or at least one */
69 ASSERT((ResourceList == NULL) || (ResourceList->Count == 1));
70
71 /* Initialize no partial, interrupt descriptor, or range change */
72 Partial = NULL;
73 InterruptResource = NULL;
74 RangeChange = FALSE;
75
76 /* Check if there's not actually any resources */
77 if (!(ResourceList) || !(ResourceList->Count))
78 {
79 /* Then just return the hardware update state */
80 return PdoExtension->UpdateHardware;
81 }
82
83 /* Print the new specified resource list */
85
86 /* Clear the temporary resource array */
87 for (i = 0; i < 7; i++) ResourceArray[i].Type = CmResourceTypeNull;
88
89 /* Loop the full resource descriptor */
90 FullList = ResourceList->List;
91 for (i = 0; i < ResourceList->Count; i++)
92 {
93 /* Initialize loop variables */
94 DrainPartial = FALSE;
95 BaseResource = NULL;
96
97 /* Loop the partial descriptors */
98 Partial = FullList->PartialResourceList.PartialDescriptors;
99 for (j = 0; j < FullList->PartialResourceList.Count; j++)
100 {
101 /* Check if we were supposed to drain a partial due to device data */
102 if (DrainPartial)
103 {
104 /* Draining complete, move on to the next descriptor then */
105 DrainPartial--;
106 continue;
107 }
108
109 /* Check what kind of descriptor this was */
110 switch (Partial->Type)
111 {
112 /* Base BAR resources */
115
116 /* Set it as the base */
117 ASSERT(BaseResource == NULL);
118 BaseResource = Partial;
119 break;
120
121 /* Interrupt resource */
123
124 /* Make sure it's a compatible (and the only) PCI interrupt */
125 ASSERT(InterruptResource == NULL);
126 ASSERT(Partial->u.Interrupt.Level == Partial->u.Interrupt.Vector);
127 InterruptResource = Partial;
128
129 /* Only 255 interrupts on x86/x64 hardware */
130 if (Partial->u.Interrupt.Level < 256)
131 {
132 /* Use the passed interrupt line */
133 PdoExtension->AdjustedInterruptLine = Partial->u.Interrupt.Level;
134 }
135 else
136 {
137 /* Invalid vector, so ignore it */
138 PdoExtension->AdjustedInterruptLine = 0;
139 }
140
141 break;
142
143 /* Check for specific device data */
145
146 /* Check what kind of data this was */
147 switch (Partial->u.DevicePrivate.Data[0])
148 {
149 /* Not used in the driver yet */
150 case 1:
152 break;
153
154 /* Not used in the driver yet */
155 case 2:
157 break;
158
159 /* A drain request */
160 case 3:
161 /* Shouldn't be a base resource, this is a drain */
162 ASSERT(BaseResource == NULL);
163 DrainPartial = Partial->u.DevicePrivate.Data[1];
164 ASSERT(DrainPartial == TRUE);
165 break;
166 }
167 break;
168 }
169
170 /* Move to the next descriptor */
171 Partial = CmiGetNextPartialDescriptor(Partial);
172 }
173
174 /* We should be starting a new list now */
175 ASSERT(BaseResource == NULL);
176 FullList = (PVOID)Partial;
177 }
178
179 /* Check the current assigned PCI resources */
180 PciResources = PdoExtension->Resources;
181 if (!PciResources) return FALSE;
182
183 //if... // MISSING CODE
185 DPRINT1("Missing sanity checking code!\n");
186
187 /* Loop all the PCI function resources */
188 for (i = 0; i < 7; i++)
189 {
190 /* Get the current function resource descriptor, and the new one */
191 CurrentDescriptor = &PciResources->Current[i];
192 Partial = &ResourceArray[i];
193
194 /* Previous is current during the first loop iteration */
195 PreviousDescriptor = &PciResources->Current[(i == 0) ? (0) : (i - 1)];
196
197 /* Check if this new descriptor is different than the old one */
198 if (((Partial->Type != CurrentDescriptor->Type) ||
199 (Partial->Type != CmResourceTypeNull)) &&
200 ((Partial->u.Generic.Start.QuadPart !=
201 CurrentDescriptor->u.Generic.Start.QuadPart) ||
202 (Partial->u.Generic.Length != CurrentDescriptor->u.Generic.Length)))
203 {
204 /* Record a change */
205 RangeChange = TRUE;
206
207 /* Was there a range before? */
208 if (CurrentDescriptor->Type != CmResourceTypeNull)
209 {
210 /* Print it */
211 DbgPrint(" Old range-\n");
212 PciDebugPrintPartialResource(CurrentDescriptor);
213 }
214 else
215 {
216 /* There was no range */
217 DbgPrint(" Previously unset range\n");
218 }
219
220 /* Print new one */
221 DbgPrint(" changed to\n");
223
224 /* Update to new range */
225 CurrentDescriptor->Type = Partial->Type;
226 PreviousDescriptor->u.Generic.Start = Partial->u.Generic.Start;
227 PreviousDescriptor->u.Generic.Length = Partial->u.Generic.Length;
228 CurrentDescriptor = PreviousDescriptor;
229 }
230 }
231
232 /* Either the hardware was updated, or a resource range changed */
233 return ((RangeChange) || (PdoExtension->UpdateHardware));
234}
Type
Definition: Type.h:7
FORCEINLINE PCM_PARTIAL_RESOURCE_DESCRIPTOR CmiGetNextPartialDescriptor(_In_ const CM_PARTIAL_RESOURCE_DESCRIPTOR *PartialDescriptor)
Definition: cmreslist.h:31
VOID NTAPI PciDebugPrintPartialResource(IN PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialResource)
Definition: debug.c:348
VOID NTAPI PciDebugPrintCmResList(IN PCM_RESOURCE_LIST PartialList)
Definition: debug.c:364
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint GLint GLint j
Definition: glfuncs.h:250
#define CmResourceTypeDevicePrivate
Definition: hwresource.cpp:131
#define CmResourceTypeInterrupt
Definition: hwresource.cpp:124
CM_PARTIAL_RESOURCE_LIST PartialResourceList
Definition: hwresource.cpp:160
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@395::@398 Interrupt
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@395::@402 DevicePrivate
CM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptors[1]
Definition: hwresource.cpp:119
CM_PARTIAL_RESOURCE_DESCRIPTOR Current[7]
Definition: pci.h:237
_Must_inspect_result_ _In_ WDFIORESREQLIST _In_opt_ PWDF_OBJECT_ATTRIBUTES _Out_ WDFIORESLIST * ResourceList
Definition: wdfresource.h:309

Referenced by PciAssignSlotResources(), and PciPdoIrpStartDevice().

◆ PciCreateIoDescriptorFromBarLimit()

BOOLEAN NTAPI PciCreateIoDescriptorFromBarLimit ( PIO_RESOURCE_DESCRIPTOR  ResourceDescriptor,
IN PULONG  BarArray,
IN BOOLEAN  Rom 
)

Definition at line 1175 of file utils.c.

1178{
1179 ULONG CurrentBar, BarLength, BarMask;
1180 BOOLEAN Is64BitBar = FALSE;
1181
1182 /* Check if the BAR is nor I/O nor memory */
1183 CurrentBar = BarArray[0];
1184 if (!(CurrentBar & ~PCI_ADDRESS_IO_SPACE))
1185 {
1186 /* Fail this descriptor */
1187 ResourceDescriptor->Type = CmResourceTypeNull;
1188 return FALSE;
1189 }
1190
1191 /* Set default flag and clear high words */
1192 ResourceDescriptor->Flags = 0;
1193 ResourceDescriptor->u.Generic.MaximumAddress.HighPart = 0;
1194 ResourceDescriptor->u.Generic.MinimumAddress.LowPart = 0;
1195 ResourceDescriptor->u.Generic.MinimumAddress.HighPart = 0;
1196
1197 /* Check for ROM Address */
1198 if (Rom)
1199 {
1200 /* Clean up the BAR to get just the address */
1201 CurrentBar &= PCI_ADDRESS_ROM_ADDRESS_MASK;
1202 if (!CurrentBar)
1203 {
1204 /* Invalid ar, fail this descriptor */
1205 ResourceDescriptor->Type = CmResourceTypeNull;
1206 return FALSE;
1207 }
1208
1209 /* ROM Addresses are always read only */
1210 ResourceDescriptor->Flags = CM_RESOURCE_MEMORY_READ_ONLY;
1211 }
1212
1213 /* Compute the length, assume it's the alignment for now */
1214 BarLength = PciGetLengthFromBar(CurrentBar);
1215 ResourceDescriptor->u.Generic.Length = BarLength;
1216 ResourceDescriptor->u.Generic.Alignment = BarLength;
1217
1218 /* Check what kind of BAR this is */
1219 if (CurrentBar & PCI_ADDRESS_IO_SPACE)
1220 {
1221 /* Use correct mask to decode the address */
1223
1224 /* Set this as an I/O Port descriptor */
1225 ResourceDescriptor->Type = CmResourceTypePort;
1226 ResourceDescriptor->Flags = CM_RESOURCE_PORT_IO;
1227 }
1228 else
1229 {
1230 /* Use correct mask to decode the address */
1232
1233 /* Set this as a memory descriptor */
1234 ResourceDescriptor->Type = CmResourceTypeMemory;
1235
1236 /* Check if it's 64-bit or 20-bit decode */
1237 if ((CurrentBar & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_64BIT)
1238 {
1239 /* The next BAR has the high word, read it */
1240 ResourceDescriptor->u.Port.MaximumAddress.HighPart = BarArray[1];
1241 Is64BitBar = TRUE;
1242 }
1243 else if ((CurrentBar & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_20BIT)
1244 {
1245 /* Use the correct mask to decode the address */
1246 BarMask = ~0xFFF0000F;
1247 }
1248
1249 /* Check if the BAR is listed as prefetchable memory */
1250 if (CurrentBar & PCI_ADDRESS_MEMORY_PREFETCHABLE)
1251 {
1252 /* Mark the descriptor in the same way */
1253 ResourceDescriptor->Flags |= CM_RESOURCE_MEMORY_PREFETCHABLE;
1254 }
1255 }
1256
1257 /* Now write down the maximum address based on the base + length */
1258 ResourceDescriptor->u.Port.MaximumAddress.QuadPart = (CurrentBar & BarMask) +
1259 BarLength - 1;
1260
1261 /* Return if this is a 64-bit BAR, so the loop code knows to skip the next one */
1262 return Is64BitBar;
1263}
ULONG NTAPI PciGetLengthFromBar(IN ULONG Bar)
Definition: utils.c:1158
#define CM_RESOURCE_MEMORY_PREFETCHABLE
Definition: cmtypes.h:123
#define CM_RESOURCE_PORT_IO
Definition: cmtypes.h:109
#define CM_RESOURCE_MEMORY_READ_ONLY
Definition: cmtypes.h:121
struct _IO_RESOURCE_DESCRIPTOR::@23::@24 Port
#define PCI_ADDRESS_MEMORY_PREFETCHABLE
Definition: iotypes.h:4232

Referenced by Device_SaveLimits(), and PPBridge_SaveLimits().

◆ PciDebugDumpCommonConfig()

VOID NTAPI PciDebugDumpCommonConfig ( IN PPCI_COMMON_HEADER  PciData)

Definition at line 207 of file debug.c.

208{
209 USHORT i;
210
211 /* Loop the PCI header */
212 for (i = 0; i < PCI_COMMON_HDR_LENGTH; i += 4)
213 {
214 /* Dump each DWORD and its offset */
215 DPRINT1(" %02x - %08x\n", i, *(PULONG)((ULONG_PTR)PciData + i));
216 }
217}
unsigned short USHORT
Definition: pedump.c:61
#define PCI_COMMON_HDR_LENGTH
Definition: iotypes.h:3594

Referenced by PcipGetFunctionLimits(), and PciScanBus().

◆ PciDebugDumpQueryCapabilities()

VOID NTAPI PciDebugDumpQueryCapabilities ( IN PDEVICE_CAPABILITIES  DeviceCaps)

Definition at line 221 of file debug.c.

222{
223 ULONG i;
224
225 /* Dump the capabilities */
226 DPRINT1("Capabilities\n Lock:%u, Eject:%u, Remove:%u, Dock:%u, UniqueId:%u\n",
227 DeviceCaps->LockSupported,
228 DeviceCaps->EjectSupported,
229 DeviceCaps->Removable,
230 DeviceCaps->DockDevice,
231 DeviceCaps->UniqueID);
232 DbgPrint(" SilentInstall:%u, RawOk:%u, SurpriseOk:%u\n",
233 DeviceCaps->SilentInstall,
234 DeviceCaps->RawDeviceOK,
235 DeviceCaps->SurpriseRemovalOK);
236 DbgPrint(" Address %08x, UINumber %08x, Latencies D1 %u, D2 %u, D3 %u\n",
237 DeviceCaps->Address,
238 DeviceCaps->UINumber,
239 DeviceCaps->D1Latency,
240 DeviceCaps->D2Latency,
241 DeviceCaps->D3Latency);
242
243 /* Dump and convert the wake levels */
244 DbgPrint(" System Wake: %s, Device Wake: %s\n DeviceState[PowerState] [",
245 SystemPowerStates[min(DeviceCaps->SystemWake, PowerSystemMaximum)],
246 DevicePowerStates[min(DeviceCaps->DeviceWake, PowerDeviceMaximum)]);
247
248 /* Dump and convert the power state mappings */
250 DbgPrint(" %s", DevicePowerStates[DeviceCaps->DeviceState[i]]);
251
252 /* Finish the dump */
253 DbgPrint(" ]\n");
254}
PCHAR SystemPowerStates[]
Definition: debug.c:53
PCHAR DevicePowerStates[]
Definition: debug.c:64
#define min(a, b)
Definition: monoChain.cc:55
@ PowerSystemMaximum
Definition: ntpoapi.h:42
@ PowerSystemWorking
Definition: ntpoapi.h:36
@ PowerDeviceMaximum
Definition: ntpoapi.h:53

Referenced by PciFdoIrpQueryCapabilities(), and PciQueryCapabilities().

◆ PciDebugIrpDispatchDisplay()

BOOLEAN NTAPI PciDebugIrpDispatchDisplay ( IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension,
IN USHORT  MaxMinor 
)

Definition at line 124 of file debug.c.

127{
128 PPCI_PDO_EXTENSION PdoDeviceExtension;
129 ULONG BreakMask;
130 //ULONG DebugLevel = 0;
131 PCHAR IrpString;
132
133 /* Only two functions are recognized */
134 switch (IoStackLocation->MajorFunction)
135 {
136 case IRP_MJ_POWER:
137
138 /* Get the string and the correct break mask for the extension */
139 BreakMask = (DeviceExtension->ExtensionType == PciPdoExtensionType) ?
141 IrpString = PciDebugPoIrpTypeToText(IoStackLocation->MinorFunction);
142 break;
143
144 case IRP_MJ_PNP:
145
146 /* Get the string and the correct break mask for the extension */
147 BreakMask = (DeviceExtension->ExtensionType == PciFdoExtensionType) ?
149 IrpString = PciDebugPnpIrpTypeToText(IoStackLocation->MinorFunction);
150 break;
151
152 default:
153
154 /* Other functions are not decoded */
155 BreakMask = FALSE;
156 IrpString = "";
157 break;
158 }
159
160 /* Check if this is a PDO */
161 if (DeviceExtension->ExtensionType == PciPdoExtensionType)
162 {
163 /* Choose the correct debug level based on which function this is */
164 if (IoStackLocation->MajorFunction == IRP_MJ_POWER)
165 {
166 //DebugLevel = 0x500;
167 }
168 else if (IoStackLocation->MajorFunction == IRP_MJ_PNP)
169 {
170 //DebugLevel = 0x200;
171 }
172
173 /* For a PDO, print out the bus, device, and function number */
174 PdoDeviceExtension = (PVOID)DeviceExtension;
175 DPRINT1("PDO(b=0x%x, d=0x%x, f=0x%x)<-%s\n",
176 PdoDeviceExtension->ParentFdoExtension->BaseBus,
177 PdoDeviceExtension->Slot.u.bits.DeviceNumber,
178 PdoDeviceExtension->Slot.u.bits.FunctionNumber,
179 IrpString);
180 }
181 else if (DeviceExtension->ExtensionType == PciFdoExtensionType)
182 {
183 /* Choose the correct debug level based on which function this is */
184 if (IoStackLocation->MajorFunction == IRP_MJ_POWER)
185 {
186 //DebugLevel = 0x400;
187 }
188 else if (IoStackLocation->MajorFunction == IRP_MJ_PNP)
189 {
190 //DebugLevel = 0x100;
191 }
192
193 /* For an FDO, just dump the extension pointer and IRP string */
194 DPRINT1("FDO(%p)<-%s\n", DeviceExtension, IrpString);
195 }
196
197 /* If the function is illegal for this extension, complain */
198 if (IoStackLocation->MinorFunction > MaxMinor)
199 DPRINT1("Unknown IRP, minor = 0x%x\n", IoStackLocation->MinorFunction);
200
201 /* Return whether or not the debugger should be broken into for this IRP */
202 return ((1 << IoStackLocation->MinorFunction) & BreakMask);
203}
#define IRP_MJ_PNP
Definition: cdrw_usr.h:52
ULONG PciBreakOnFdoPnpIrp
Definition: debug.c:74
ULONG PciBreakOnPdoPowerIrp
Definition: debug.c:73
PCHAR NTAPI PciDebugPnpIrpTypeToText(IN USHORT MinorFunction)
Definition: debug.c:80
ULONG PciBreakOnPdoPnpIrp
Definition: debug.c:74
PCHAR NTAPI PciDebugPoIrpTypeToText(IN USHORT MinorFunction)
Definition: debug.c:102
ULONG PciBreakOnFdoPowerIrp
Definition: debug.c:73
PCI_SLOT_NUMBER Slot
Definition: pci.h:272
PPCI_FDO_EXTENSION ParentFdoExtension
Definition: pci.h:274
union _PCI_SLOT_NUMBER::@4026 u
struct _PCI_SLOT_NUMBER::@4026::@4027 bits
char * PCHAR
Definition: typedefs.h:51
#define IRP_MJ_POWER

Referenced by PciDispatchIrp().

◆ PciDebugPrintCmResList()

VOID NTAPI PciDebugPrintCmResList ( IN PCM_RESOURCE_LIST  ResourceList)

Definition at line 364 of file debug.c.

365{
366 PCM_FULL_RESOURCE_DESCRIPTOR FullDescriptor;
367 PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptor;
368 ULONG Count, i, ListCount;
369
370 /* Make sure there's something to dump */
371 if (!PartialList) return;
372
373 /* Get the full list count */
374 ListCount = PartialList->Count;
375 FullDescriptor = PartialList->List;
376 DPRINT1(" CM_RESOURCE_LIST (PCI Bus Driver) (List Count = %u)\n", PartialList->Count);
377
378 /* Loop full list */
379 for (i = 0; i < ListCount; i++)
380 {
381 /* Loop full descriptor */
382 DPRINT1(" InterfaceType %d\n", FullDescriptor->InterfaceType);
383 DPRINT1(" BusNumber 0x%x\n", FullDescriptor->BusNumber);
384
385 /* Get partial count and loop partials */
386 Count = FullDescriptor->PartialResourceList.Count;
387 for (PartialDescriptor = FullDescriptor->PartialResourceList.PartialDescriptors;
388 Count;
389 PartialDescriptor = CmiGetNextPartialDescriptor(PartialDescriptor))
390 {
391 /* Print each partial */
392 PciDebugPrintPartialResource(PartialDescriptor);
393 Count--;
394 }
395
396 /* Go to the next full descriptor */
397 FullDescriptor = (PCM_FULL_RESOURCE_DESCRIPTOR)PartialDescriptor;
398 }
399
400 /* Done printing data */
401 DPRINT1("\n");
402}
struct _CM_FULL_RESOURCE_DESCRIPTOR * PCM_FULL_RESOURCE_DESCRIPTOR
int Count
Definition: noreturn.cpp:7

Referenced by PciComputeNewCurrentSettings().

◆ PciDebugPrintIoResReqList()

VOID NTAPI PciDebugPrintIoResReqList ( IN PIO_RESOURCE_REQUIREMENTS_LIST  Requirements)

Definition at line 302 of file debug.c.

303{
304 ULONG AlternativeLists;
306 ULONG Count;
308
309 /* Make sure there's a list */
310 if (!Requirements) return;
311
312 /* Grab the main list and the alternates as well */
313 AlternativeLists = Requirements->AlternativeLists;
314 List = Requirements->List;
315
316 /* Print out the initial header*/
317 DPRINT1(" IO_RESOURCE_REQUIREMENTS_LIST (PCI Bus Driver)\n");
318 DPRINT1(" InterfaceType %d\n", Requirements->InterfaceType);
319 DPRINT1(" BusNumber 0x%x\n", Requirements->BusNumber);
320 DPRINT1(" SlotNumber %d (0x%x), (d/f = 0x%x/0x%x)\n",
321 Requirements->SlotNumber,
322 Requirements->SlotNumber,
323 ((PCI_SLOT_NUMBER*)&Requirements->SlotNumber)->u.bits.DeviceNumber,
324 ((PCI_SLOT_NUMBER*)&Requirements->SlotNumber)->u.bits.FunctionNumber);
325 DPRINT1(" AlternativeLists %u\n", AlternativeLists);
326
327 /* Scan alternative lists */
328 while (AlternativeLists--)
329 {
330 /* Get the descriptor array, and the count of descriptors */
331 Descriptor = List->Descriptors;
332 Count = List->Count;
333
334 /* Print out each descriptor */
335 DPRINT1("\n List[%u].Count = %u\n", AlternativeLists, Count);
337
338 /* Should've reached a new list now */
340 }
341
342 /* Terminate the dump */
343 DPRINT1("\n");
344}
struct _IO_RESOURCE_LIST * PIO_RESOURCE_LIST
VOID NTAPI PciDebugPrintIoResource(IN PIO_RESOURCE_DESCRIPTOR Descriptor)
Definition: debug.c:279
_Must_inspect_result_ _In_ WDFCMRESLIST List
Definition: wdfresource.h:550

Referenced by PciQueryRequirements().

◆ PciDebugPrintPartialResource()

VOID NTAPI PciDebugPrintPartialResource ( IN PCM_PARTIAL_RESOURCE_DESCRIPTOR  PartialResource)

Definition at line 348 of file debug.c.

349{
350 /* Dump all the data in the partial */
351 DPRINT1(" Partial Resource Descriptor @0x%p\n", PartialResource);
352 DPRINT1(" Type = %u (%s)\n", PartialResource->Type, PciDebugCmResourceTypeToText(PartialResource->Type));
353 DPRINT1(" ShareDisposition = %u\n", PartialResource->ShareDisposition);
354 DPRINT1(" Flags = 0x%04X\n", PartialResource->Flags);
355 DPRINT1(" Data[%d] = %08x %08x %08x\n",
356 0,
357 PartialResource->u.Generic.Start.LowPart,
358 PartialResource->u.Generic.Start.HighPart,
359 PartialResource->u.Generic.Length);
360}
PCHAR NTAPI PciDebugCmResourceTypeToText(IN UCHAR Type)
Definition: debug.c:258

Referenced by PciComputeNewCurrentSettings(), and PciDebugPrintCmResList().

◆ PciDecodeEnable()

VOID NTAPI PciDecodeEnable ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN BOOLEAN  Enable,
OUT PUSHORT  Command 
)

Definition at line 1267 of file utils.c.

1270{
1271 USHORT CommandValue;
1272
1273 /*
1274 * If decodes are being disabled, make sure it's allowed, and in both cases,
1275 * make sure that a hackflag isn't preventing touching the decodes at all.
1276 */
1277 if (((Enable) || (PciCanDisableDecodes(PdoExtension, 0, 0, 0))) &&
1279 {
1280 /* Did the caller already have a command word? */
1281 if (Command)
1282 {
1283 /* Use the caller's */
1284 CommandValue = *Command;
1285 }
1286 else
1287 {
1288 /* Otherwise, read the current command */
1290 &Command,
1292 sizeof(USHORT));
1293 }
1294
1295 /* Turn off decodes by default */
1296 CommandValue &= ~(PCI_ENABLE_IO_SPACE |
1299
1300 /* If requested, enable the decodes that were enabled at init time */
1301 if (Enable) CommandValue |= PdoExtension->CommandEnables &
1305
1306 /* Update the command word */
1308 &CommandValue,
1310 sizeof(USHORT));
1311 }
1312}
VOID NTAPI PciWriteDeviceConfig(IN PPCI_PDO_EXTENSION DeviceExtension, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: config.c:91
VOID NTAPI PciReadDeviceConfig(IN PPCI_PDO_EXTENSION DeviceExtension, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: config.c:107
BOOLEAN NTAPI PciCanDisableDecodes(IN PPCI_PDO_EXTENSION DeviceExtension, IN PPCI_COMMON_HEADER Config, IN ULONGLONG HackFlags, IN BOOLEAN ForPowerDown)
Definition: utils.c:955
_In_ ULONGLONG _In_ ULONGLONG _In_ BOOLEAN Enable
Definition: ntddpcm.h:142
Definition: shell.h:41
#define FIELD_OFFSET(t, f)
Definition: typedefs.h:255
#define PCI_ENABLE_BUS_MASTER
Definition: iotypes.h:3618
#define PCI_ENABLE_IO_SPACE
Definition: iotypes.h:3616
#define PCI_ENABLE_MEMORY_SPACE
Definition: iotypes.h:3617

Referenced by PciApplyHacks(), PciConfigureIdeController(), and PcipUpdateHardware().

◆ PciDispatchIrp()

NTSTATUS NTAPI PciDispatchIrp ( IN PDEVICE_OBJECT  DeviceObject,
IN PIRP  Irp 
)

Definition at line 99 of file dispatch.c.

101{
102 PPCI_FDO_EXTENSION DeviceExtension;
103 PIO_STACK_LOCATION IoStackLocation;
104 PPCI_MJ_DISPATCH_TABLE IrpDispatchTable;
105 BOOLEAN PassToPdo;
107 PPCI_MN_DISPATCH_TABLE TableArray = NULL, Table;
108 USHORT MaxMinor;
109 PCI_DISPATCH_STYLE DispatchStyle = 0;
110 PCI_DISPATCH_FUNCTION DispatchFunction = NULL;
111 DPRINT1("PCI: Dispatch IRP\n");
112
113 /* Get the extension and I/O stack location for this IRP */
114 DeviceExtension = (PPCI_FDO_EXTENSION)DeviceObject->DeviceExtension;
115 IoStackLocation = IoGetCurrentIrpStackLocation(Irp);
116 ASSERT((DeviceExtension->ExtensionType == PciPdoExtensionType) ||
117 (DeviceExtension->ExtensionType == PciFdoExtensionType));
118
119 /* Deleted extensions don't respond to IRPs */
120 if (DeviceExtension->DeviceState == PciDeleted)
121 {
122 /* Fail this IRP */
124 PassToPdo = FALSE;
125 }
126 else
127 {
128 /* Otherwise, get the dispatch table for the extension */
129 IrpDispatchTable = DeviceExtension->IrpDispatchTable;
130
131 /* And choose which function table to use */
132 switch (IoStackLocation->MajorFunction)
133 {
134 case IRP_MJ_POWER:
135
136 /* Power Manager IRPs */
137 TableArray = IrpDispatchTable->PowerIrpDispatchTable;
138 MaxMinor = IrpDispatchTable->PowerIrpMaximumMinorFunction;
139 break;
140
141 case IRP_MJ_PNP:
142
143 /* Plug-and-Play Manager IRPs */
144 TableArray = IrpDispatchTable->PnpIrpDispatchTable;
145 MaxMinor = IrpDispatchTable->PnpIrpMaximumMinorFunction;
146 break;
147
149
150 /* WMI IRPs */
151 DispatchFunction = IrpDispatchTable->SystemControlIrpDispatchFunction;
152 DispatchStyle = IrpDispatchTable->SystemControlIrpDispatchStyle;
153 MaxMinor = 0xFFFF;
154 break;
155
156 default:
157
158 /* Unrecognized IRPs */
159 DispatchFunction = IrpDispatchTable->OtherIrpDispatchFunction;
160 DispatchStyle = IrpDispatchTable->OtherIrpDispatchStyle;
161 MaxMinor = 0xFFFF;
162 break;
163 }
164
165 /* Only deal with recognized IRPs */
166 if (MaxMinor != 0xFFFF)
167 {
168 /* Make sure the function is recognized */
169 if (IoStackLocation->MinorFunction > MaxMinor)
170 {
171 /* Pick the terminator, which should return unrecognized */
172 Table = &TableArray[MaxMinor + 1];
173 }
174 else
175 {
176 /* Pick the appropriate table for this function */
177 Table = &TableArray[IoStackLocation->MinorFunction];
178 }
179
180 /* From that table, get the function code and dispatch style */
181 DispatchStyle = Table->DispatchStyle;
182 DispatchFunction = Table->DispatchFunction;
183 }
184
185 /* Print out debugging information, and see if we should break */
186 if (PciDebugIrpDispatchDisplay(IoStackLocation,
187 DeviceExtension,
188 MaxMinor))
189 {
190 /* The developer/user wants us to break for this IRP, do it */
192 }
193
194 /* Check if this IRP should be sent up the stack first */
195 if (DispatchStyle == IRP_UPWARD)
196 {
197 /* Do it now before handling it ourselves */
198 PciCallDownIrpStack(DeviceExtension, Irp);
199 }
200
201 /* Call the our driver's handler for this IRP and deal with the IRP */
202 Status = DispatchFunction(Irp, IoStackLocation, DeviceExtension);
203 switch (DispatchStyle)
204 {
205 /* Complete IRPs are completely immediately by our driver */
206 case IRP_COMPLETE:
207 PassToPdo = FALSE;
208 break;
209
210 /* Downward IRPs are send to the attached FDO */
211 case IRP_DOWNWARD:
212 PassToPdo = TRUE;
213 break;
214
215 /* Upward IRPs are completed immediately by our driver */
216 case IRP_UPWARD:
217 PassToPdo = FALSE;
218 break;
219
220 /* Dispatch IRPs are immediately returned */
221 case IRP_DISPATCH:
222 return Status;
223
224 /* There aren't any other dispatch styles! */
225 default:
226 ASSERT(FALSE);
227 return Status;
228 }
229 }
230
231 /* Pending IRPs are returned immediately */
232 if (Status == STATUS_PENDING) return Status;
233
234 /* Handled IRPs return their status in the status block */
235 if (Status != STATUS_NOT_SUPPORTED) Irp->IoStatus.Status = Status;
236
237 /* Successful, or unhandled IRPs that are "DOWNWARD" are sent to the PDO */
238 if ((PassToPdo) && ((NT_SUCCESS(Status)) || (Status == STATUS_NOT_SUPPORTED)))
239 {
240 /* Let the PDO deal with it */
241 Status = PciPassIrpFromFdoToPdo(DeviceExtension, Irp);
242 }
243 else
244 {
245 /* Otherwise, the IRP is returned with its status */
246 Status = Irp->IoStatus.Status;
247
248 /* Power IRPs need to notify the Power Manager that the next IRP can go */
249 if (IoStackLocation->MajorFunction == IRP_MJ_POWER) PoStartNextPowerIrp(Irp);
250
251 /* And now this IRP can be completed */
253 }
254
255 /* And the status returned back to the caller */
256 return Status;
257}
static PIO_STACK_LOCATION IoGetCurrentIrpStackLocation(PIRP Irp)
BOOLEAN NTAPI PciDebugIrpDispatchDisplay(IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension, IN USHORT MaxMinor)
Definition: debug.c:124
NTSTATUS NTAPI PciCallDownIrpStack(IN PPCI_FDO_EXTENSION DeviceExtension, IN PIRP Irp)
Definition: dispatch.c:39
NTSTATUS NTAPI PciPassIrpFromFdoToPdo(IN PPCI_FDO_EXTENSION DeviceExtension, IN PIRP Irp)
Definition: dispatch.c:70
NTSTATUS(NTAPI * PCI_DISPATCH_FUNCTION)(IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PVOID DeviceExtension)
Definition: pci.h:325
ASMGENDATA Table[]
Definition: genincdata.c:61
#define IoCompleteRequest
Definition: irp.c:1240
VOID NTAPI PoStartNextPowerIrp(IN PIRP Irp)
Definition: power.c:758
BOOLEAN DeviceState
Definition: pci.h:197
ULONG ExtensionType
Definition: pci.h:195
struct _PCI_MJ_DISPATCH_TABLE * IrpDispatchTable
Definition: pci.h:196
ULONG PnpIrpMaximumMinorFunction
Definition: pci.h:345
PCI_DISPATCH_FUNCTION SystemControlIrpDispatchFunction
Definition: pci.h:350
PPCI_MN_DISPATCH_TABLE PowerIrpDispatchTable
Definition: pci.h:348
PCI_DISPATCH_STYLE OtherIrpDispatchStyle
Definition: pci.h:351
PCI_DISPATCH_FUNCTION OtherIrpDispatchFunction
Definition: pci.h:352
ULONG PowerIrpMaximumMinorFunction
Definition: pci.h:347
PPCI_MN_DISPATCH_TABLE PnpIrpDispatchTable
Definition: pci.h:346
PCI_DISPATCH_STYLE SystemControlIrpDispatchStyle
Definition: pci.h:349
#define IO_NO_INCREMENT
Definition: iotypes.h:598
#define IRP_MJ_SYSTEM_CONTROL

◆ PciExecuteCriticalSystemRoutine()

ULONG_PTR NTAPI PciExecuteCriticalSystemRoutine ( IN ULONG_PTR  IpiContext)

Definition at line 1069 of file utils.c.

1070{
1072
1073 /* Check if the IPI is already running */
1074 if (!InterlockedDecrement(&Context->RunCount))
1075 {
1076 /* Nope, this is the first instance, so execute the IPI function */
1077 Context->Function(Context->DeviceExtension, Context->Context);
1078
1079 /* Notify anyone that was spinning that they can stop now */
1080 Context->Barrier = 0;
1081 }
1082 else
1083 {
1084 /* Spin until it has finished running */
1085 while (Context->Barrier);
1086 }
1087
1088 /* Done */
1089 return 0;
1090}
#define InterlockedDecrement
Definition: armddk.h:52
struct _PCI_IPI_CONTEXT * PPCI_IPI_CONTEXT

◆ PciFdoIrpCancelRemoveDevice()

NTSTATUS NTAPI PciFdoIrpCancelRemoveDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 152 of file fdo.c.

155{
157 UNREFERENCED_PARAMETER(IoStackLocation);
158 UNREFERENCED_PARAMETER(DeviceExtension);
159
162}

◆ PciFdoIrpCancelStopDevice()

NTSTATUS NTAPI PciFdoIrpCancelStopDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 194 of file fdo.c.

197{
199 UNREFERENCED_PARAMETER(IoStackLocation);
200 UNREFERENCED_PARAMETER(DeviceExtension);
201
204}

◆ PciFdoIrpDeviceUsageNotification()

NTSTATUS NTAPI PciFdoIrpDeviceUsageNotification ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 337 of file fdo.c.

340{
342 UNREFERENCED_PARAMETER(IoStackLocation);
343 UNREFERENCED_PARAMETER(DeviceExtension);
344
347}

◆ PciFdoIrpQueryCapabilities()

NTSTATUS NTAPI PciFdoIrpQueryCapabilities ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 310 of file fdo.c.

313{
315 PAGED_CODE();
316 ASSERT_FDO(DeviceExtension);
317
319
320 /* Get the capabilities */
321 Capabilities = IoStackLocation->Parameters.DeviceCapabilities.Capabilities;
322
323 /* Inherit wake levels and power mappings from the higher-up capabilities */
324 DeviceExtension->PowerState.SystemWakeLevel = Capabilities->SystemWake;
325 DeviceExtension->PowerState.DeviceWakeLevel = Capabilities->DeviceWake;
326 RtlCopyMemory(DeviceExtension->PowerState.SystemStateMapping,
327 Capabilities->DeviceState,
328 sizeof(DeviceExtension->PowerState.SystemStateMapping));
329
330 /* Dump the capabilities and return success */
332 return STATUS_SUCCESS;
333}
VOID NTAPI PciDebugDumpQueryCapabilities(IN PDEVICE_CAPABILITIES DeviceCaps)
Definition: debug.c:221
_Must_inspect_result_ typedef _Out_ PHIDP_CAPS Capabilities
Definition: hidclass.h:103
#define RtlCopyMemory(Destination, Source, Length)
Definition: typedefs.h:263
* PDEVICE_CAPABILITIES
Definition: iotypes.h:965

◆ PciFdoIrpQueryDeviceRelations()

NTSTATUS NTAPI PciFdoIrpQueryDeviceRelations ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 208 of file fdo.c.

211{
213 PAGED_CODE();
214
215 /* Are bus relations being queried? */
216 if (IoStackLocation->Parameters.QueryDeviceRelations.Type != BusRelations)
217 {
218 /* The FDO is a bus, so only bus relations can be obtained */
220 }
221 else
222 {
223 /* Scan the PCI bus and build the device relations for the caller */
224 Status = PciQueryDeviceRelations(DeviceExtension,
226 &Irp->IoStatus.Information);
227 }
228
229 /* Return the enumeration status back */
230 return Status;
231}
NTSTATUS NTAPI PciQueryDeviceRelations(IN PPCI_FDO_EXTENSION DeviceExtension, IN OUT PDEVICE_RELATIONS *pDeviceRelations)
Definition: enum.c:2034
@ BusRelations
Definition: iotypes.h:2152

◆ PciFdoIrpQueryInterface()

NTSTATUS NTAPI PciFdoIrpQueryInterface ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 235 of file fdo.c.

238{
240 PAGED_CODE();
241 ASSERT(DeviceExtension->ExtensionType == PciFdoExtensionType);
242
243 /* Deleted extensions don't respond to IRPs */
244 if (DeviceExtension->DeviceState == PciDeleted)
245 {
246 /* Hand it back to try to deal with it */
247 return PciPassIrpFromFdoToPdo(DeviceExtension, Irp);
248 }
249
250 /* Query our driver for this interface */
251 Status = PciQueryInterface(DeviceExtension,
252 IoStackLocation->Parameters.QueryInterface.
254 IoStackLocation->Parameters.QueryInterface.
255 Size,
256 IoStackLocation->Parameters.QueryInterface.
257 Version,
258 IoStackLocation->Parameters.QueryInterface.
260 IoStackLocation->Parameters.QueryInterface.
261 Interface,
262 FALSE);
263 if (NT_SUCCESS(Status))
264 {
265 /* We found it, let the PDO handle it */
266 Irp->IoStatus.Status = Status;
267 return PciPassIrpFromFdoToPdo(DeviceExtension, Irp);
268 }
269 else if (Status == STATUS_NOT_SUPPORTED)
270 {
271 /* Otherwise, we can't handle it, let someone else down the stack try */
272 Status = PciCallDownIrpStack(DeviceExtension, Irp);
274 {
275 /* They can't either, try a last-resort interface lookup */
276 Status = PciQueryInterface(DeviceExtension,
277 IoStackLocation->Parameters.QueryInterface.
279 IoStackLocation->Parameters.QueryInterface.
280 Size,
281 IoStackLocation->Parameters.QueryInterface.
282 Version,
283 IoStackLocation->Parameters.QueryInterface.
285 IoStackLocation->Parameters.QueryInterface.
286 Interface,
287 TRUE);
288 }
289 }
290
291 /* Has anyone claimed this interface yet? */
293 {
294 /* No, return the original IRP status */
295 Status = Irp->IoStatus.Status;
296 }
297 else
298 {
299 /* Yes, set the new IRP status */
300 Irp->IoStatus.Status = Status;
301 }
302
303 /* Complete this IRP */
305 return Status;
306}
NTSTATUS NTAPI PciQueryInterface(IN PPCI_FDO_EXTENSION DeviceExtension, IN CONST GUID *InterfaceType, IN ULONG Size, IN ULONG Version, IN PVOID InterfaceData, IN PINTERFACE Interface, IN BOOLEAN LastChance)
Definition: intrface.c:45
_Must_inspect_result_ _In_ WDFDEVICE _In_ LPCGUID InterfaceType
Definition: wdffdo.h:463
_Must_inspect_result_ _In_ WDFDEVICE _In_ LPCGUID _Out_ PINTERFACE _In_ USHORT _In_ USHORT _In_opt_ PVOID InterfaceSpecificData
Definition: wdffdo.h:472

◆ PciFdoIrpQueryLegacyBusInformation()

NTSTATUS NTAPI PciFdoIrpQueryLegacyBusInformation ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 365 of file fdo.c.

368{
370 UNREFERENCED_PARAMETER(IoStackLocation);
371 UNREFERENCED_PARAMETER(DeviceExtension);
372
375}

◆ PciFdoIrpQueryPower()

NTSTATUS NTAPI PciFdoIrpQueryPower ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 236 of file power.c.

239{
241 UNREFERENCED_PARAMETER(IoStackLocation);
242 UNREFERENCED_PARAMETER(DeviceExtension);
243
245 while (TRUE);
247}

◆ PciFdoIrpQueryRemoveDevice()

NTSTATUS NTAPI PciFdoIrpQueryRemoveDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 124 of file fdo.c.

127{
129 UNREFERENCED_PARAMETER(IoStackLocation);
130 UNREFERENCED_PARAMETER(DeviceExtension);
131
134}

◆ PciFdoIrpQueryStopDevice()

NTSTATUS NTAPI PciFdoIrpQueryStopDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 180 of file fdo.c.

183{
185 UNREFERENCED_PARAMETER(IoStackLocation);
186 UNREFERENCED_PARAMETER(DeviceExtension);
187
190}

◆ PciFdoIrpRemoveDevice()

NTSTATUS NTAPI PciFdoIrpRemoveDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 138 of file fdo.c.

141{
143 UNREFERENCED_PARAMETER(IoStackLocation);
144 UNREFERENCED_PARAMETER(DeviceExtension);
145
148}

◆ PciFdoIrpStartDevice()

NTSTATUS NTAPI PciFdoIrpStartDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 76 of file fdo.c.

79{
82 PAGED_CODE();
83
84 /* The device stack must be starting the FDO in a success path */
85 if (!NT_SUCCESS(Irp->IoStatus.Status)) return STATUS_NOT_SUPPORTED;
86
87 /* Attempt to switch the state machine to the started state */
88 Status = PciBeginStateTransition(DeviceExtension, PciStarted);
89 if (!NT_SUCCESS(Status)) return Status;
90
91 /* Check for any boot-provided resources */
92 Resources = IoStackLocation->Parameters.StartDevice.AllocatedResources;
93 if ((Resources) && !(PCI_IS_ROOT_FDO(DeviceExtension)))
94 {
95 /* These resources would only be for non-root FDOs, unhandled for now */
96 ASSERT(Resources->Count == 1);
98 }
99
100 /* Initialize the arbiter for this FDO */
101 Status = PciInitializeArbiterRanges(DeviceExtension, Resources);
102 if (!NT_SUCCESS(Status))
103 {
104 /* Cancel the transition if this failed */
105 PciCancelStateTransition(DeviceExtension, PciStarted);
106 return Status;
107 }
108
109 /* Again, check for boot-provided resources for non-root FDO */
110 if ((Resources) && !(PCI_IS_ROOT_FDO(DeviceExtension)))
111 {
112 /* Unhandled for now */
113 ASSERT(Resources->Count == 1);
115 }
116
117 /* Commit the transition to the started state */
118 PciCommitStateTransition(DeviceExtension, PciStarted);
119 return STATUS_SUCCESS;
120}
NTSTATUS NTAPI PciInitializeArbiterRanges(IN PPCI_FDO_EXTENSION DeviceExtension, IN PCM_RESOURCE_LIST Resources)
Definition: arb_comn.c:128
NTSTATUS NTAPI PciCancelStateTransition(IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
Definition: state.c:145
NTSTATUS NTAPI PciBeginStateTransition(IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
Definition: state.c:97
VOID NTAPI PciCommitStateTransition(IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
Definition: state.c:181

◆ PciFdoIrpStopDevice()

NTSTATUS NTAPI PciFdoIrpStopDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 166 of file fdo.c.

169{
171 UNREFERENCED_PARAMETER(IoStackLocation);
172 UNREFERENCED_PARAMETER(DeviceExtension);
173
176}

◆ PciFdoIrpSurpriseRemoval()

NTSTATUS NTAPI PciFdoIrpSurpriseRemoval ( IN PIRP  Irp,
IN P