pci.h File Reference

#include <ntifs.h>
#include <wdmguid.h>
#include <wchar.h>
#include <acpiioct.h>
#include <drivers/pci/pci.h>
#include <drivers/acpi/acpi.h>
#include <ndk/halfuncs.h>
#include <ndk/rtlfuncs.h>
#include <ndk/vffuncs.h>

Include dependency graph for pci.h:

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Go to the source code of this file.

Classes
struct	_PCI_HACK_ENTRY
struct	_PCI_POWER_STATE
struct	_PCI_LOCK
struct	_PCI_FDO_EXTENSION
struct	_PCI_FUNCTION_RESOURCES
union	_PCI_HEADER_TYPE_DEPENDENT
struct	_PCI_PDO_EXTENSION
struct	_PCI_MN_DISPATCH_TABLE
struct	_PCI_MJ_DISPATCH_TABLE
struct	_PCI_INTERFACE
struct	PCI_SECONDARY_EXTENSION
struct	PCI_ARBITER_INSTANCE
struct	_PCI_VERIFIER_DATA
struct	_PCI_ID_BUFFER
struct	_PCI_CONFIGURATOR
struct	_PCI_CONFIGURATOR_CONTEXT
struct	_PCI_IPI_CONTEXT
struct	_PCI_LEGACY_DEVICE

Macros
#define	PCI_POOL_TAG   'BicP'
#define	PCI_IS_ROOT_FDO(x)   ((x)->BusRootFdoExtension == x)
#define	ASSERT_FDO(x)   ASSERT((x)->ExtensionType == PciFdoExtensionType);
#define	ASSERT_PDO(x)   ASSERT((x)->ExtensionType == PciPdoExtensionType);
#define	PCI_HACK_ENTRY_SIZE   sizeof(L"VVVVdddd") - sizeof(UNICODE_NULL)
#define	PCI_HACK_ENTRY_REV_SIZE   sizeof(L"VVVVddddRR") - sizeof(UNICODE_NULL)
#define	PCI_HACK_ENTRY_SUBSYS_SIZE   sizeof(L"VVVVddddssssIIII") - sizeof(UNICODE_NULL)
#define	PCI_HACK_ENTRY_FULL_SIZE   sizeof(L"VVVVddddssssIIIIRR") - sizeof(UNICODE_NULL)
#define	PCI_HACK_HAS_REVISION_INFO   0x01
#define	PCI_HACK_HAS_SUBSYSTEM_INFO   0x02
#define	PCI_INTERFACE_PDO   0x01
#define	PCI_INTERFACE_FDO   0x02
#define	PCI_INTERFACE_ROOT   0x04
#define	PCI_SKIP_DEVICE_ENUMERATION   0x01
#define	PCI_SKIP_RESOURCE_ENUMERATION   0x02
#define	PCI_HACK_FIXUP_BEFORE_CONFIGURATION   0x00
#define	PCI_HACK_FIXUP_AFTER_CONFIGURATION   0x01
#define	PCI_HACK_FIXUP_BEFORE_UPDATE   0x03
#define	MAX_DEBUGGING_DEVICES_SUPPORTED   0x04
#define	PCI_VERIFIER_CODES   0x04
#define	MAX_ANSI_STRINGS   0x08

Typedefs
typedef enum _PCI_SIGNATURE	PCI_SIGNATURE
typedef enum _PCI_SIGNATURE *	PPCI_SIGNATURE
typedef enum _PCI_DEVICE_TYPES	PCI_DEVICE_TYPES
typedef enum _PCI_STATE	PCI_STATE
typedef enum _PCI_DISPATCH_STYLE	PCI_DISPATCH_STYLE
typedef struct _PCI_HACK_ENTRY	PCI_HACK_ENTRY
typedef struct _PCI_HACK_ENTRY *	PPCI_HACK_ENTRY
typedef struct _PCI_POWER_STATE	PCI_POWER_STATE
typedef struct _PCI_POWER_STATE *	PPCI_POWER_STATE
typedef struct _PCI_LOCK	PCI_LOCK
typedef struct _PCI_LOCK *	PPCI_LOCK
typedef struct _PCI_FDO_EXTENSION	PCI_FDO_EXTENSION
typedef struct _PCI_FDO_EXTENSION *	PPCI_FDO_EXTENSION
typedef struct _PCI_FUNCTION_RESOURCES	PCI_FUNCTION_RESOURCES
typedef struct _PCI_FUNCTION_RESOURCES *	PPCI_FUNCTION_RESOURCES
typedef union _PCI_HEADER_TYPE_DEPENDENT	PCI_HEADER_TYPE_DEPENDENT
typedef union _PCI_HEADER_TYPE_DEPENDENT *	PPCI_HEADER_TYPE_DEPENDENT
typedef struct _PCI_PDO_EXTENSION	PCI_PDO_EXTENSION
typedef struct _PCI_PDO_EXTENSION *	PPCI_PDO_EXTENSION
typedef NTSTATUS(NTAPI *	PCI_DISPATCH_FUNCTION) (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PVOID DeviceExtension)
typedef struct _PCI_MN_DISPATCH_TABLE	PCI_MN_DISPATCH_TABLE
typedef struct _PCI_MN_DISPATCH_TABLE *	PPCI_MN_DISPATCH_TABLE
typedef struct _PCI_MJ_DISPATCH_TABLE	PCI_MJ_DISPATCH_TABLE
typedef struct _PCI_MJ_DISPATCH_TABLE *	PPCI_MJ_DISPATCH_TABLE
typedef IN PVOID	Instance
typedef IN PVOID IN PVOID	InterfaceData
typedef IN PVOID IN PVOID IN USHORT	Version
typedef IN PVOID IN PVOID IN USHORT IN USHORT	Size
typedef IN PVOID IN PVOID IN USHORT IN USHORT IN PINTERFACE	Interface
typedef NTSTATUS(NTAPI *	PCI_INTERFACE_INITIALIZER) (IN PVOID Instance)
typedef struct _PCI_INTERFACE	PCI_INTERFACE
typedef struct _PCI_INTERFACE *	PPCI_INTERFACE
typedef struct PCI_SECONDARY_EXTENSION	PCI_SECONDARY_EXTENSION
typedef struct PCI_SECONDARY_EXTENSION *	PPCI_SECONDARY_EXTENSION
typedef struct PCI_ARBITER_INSTANCE	PCI_ARBITER_INSTANCE
typedef struct PCI_ARBITER_INSTANCE *	PPCI_ARBITER_INSTANCE
typedef struct _PCI_VERIFIER_DATA	PCI_VERIFIER_DATA
typedef struct _PCI_VERIFIER_DATA *	PPCI_VERIFIER_DATA
typedef struct _PCI_ID_BUFFER	PCI_ID_BUFFER
typedef struct _PCI_ID_BUFFER *	PPCI_ID_BUFFER
typedef VOID(NTAPI *	PCI_CONFIGURATOR_RESTORE_CURRENT) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)
typedef VOID(NTAPI *	PCI_CONFIGURATOR_SAVE_LIMITS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)
typedef VOID(NTAPI *	PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)
typedef VOID(NTAPI *	PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS) (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
typedef VOID(NTAPI *	PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)
typedef VOID(NTAPI *	PCI_CONFIGURATOR_RESET_DEVICE) (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
typedef struct _PCI_CONFIGURATOR	PCI_CONFIGURATOR
typedef struct _PCI_CONFIGURATOR *	PPCI_CONFIGURATOR
typedef struct _PCI_CONFIGURATOR_CONTEXT	PCI_CONFIGURATOR_CONTEXT
typedef struct _PCI_CONFIGURATOR_CONTEXT *	PPCI_CONFIGURATOR_CONTEXT
typedef VOID(NTAPI *	PCI_IPI_FUNCTION) (IN PVOID Reserved, IN PVOID Context)
typedef struct _PCI_IPI_CONTEXT	PCI_IPI_CONTEXT
typedef struct _PCI_IPI_CONTEXT *	PPCI_IPI_CONTEXT
typedef struct _PCI_LEGACY_DEVICE	PCI_LEGACY_DEVICE
typedef struct _PCI_LEGACY_DEVICE *	PPCI_LEGACY_DEVICE

Enumerations
enum	_PCI_SIGNATURE {   PciPdoExtensionType = 'icP0', PciFdoExtensionType = 'icP1', PciArb_Io = 'icP2', PciArb_Memory = 'icP3',   PciArb_Interrupt = 'icP4', PciArb_BusNumber = 'icP5', PciTrans_Interrupt = 'icP6', PciInterface_BusHandler = 'icP7',   PciInterface_IntRouteHandler = 'icP8', PciInterface_PciCb = 'icP9', PciInterface_LegacyDeviceDetection = 'icP:', PciInterface_PmeHandler = 'icP;',   PciInterface_DevicePresent = 'icP<', PciInterface_NativeIde = 'icP=', PciInterface_AgpTarget = 'icP>', PciInterface_Location = 'icP?' }
enum	_PCI_DEVICE_TYPES {   PciTypeInvalid, PciTypeHostBridge, PciTypePciBridge, PciTypeCardbusBridge,   PciTypeDevice }
enum	_PCI_STATE {   PciNotStarted, PciStarted, PciDeleted, PciStopped,   PciSurpriseRemoved, PciSynchronizedOperation, PciMaxObjectState }
enum	_PCI_DISPATCH_STYLE { IRP_COMPLETE, IRP_DOWNWARD, IRP_UPWARD, IRP_DISPATCH }

Functions
typedef	NTSTATUS (NTAPI *PCI_INTERFACE_CONSTRUCTOR)(IN PVOID DeviceExtension
typedef	VOID (NTAPI *PCI_CONFIGURATOR_INITIALIZE)(IN struct _PCI_CONFIGURATOR_CONTEXT *Context)
NTSTATUS NTAPI	PciDispatchIrp (IN PDEVICE_OBJECT DeviceObject, IN PIRP Irp)
NTSTATUS NTAPI	PciIrpNotSupported (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPassIrpFromFdoToPdo (IN PPCI_FDO_EXTENSION DeviceExtension, IN PIRP Irp)
NTSTATUS NTAPI	PciCallDownIrpStack (IN PPCI_FDO_EXTENSION DeviceExtension, IN PIRP Irp)
NTSTATUS NTAPI	PciIrpInvalidDeviceRequest (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoWaitWake (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoSetPowerState (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoIrpQueryPower (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciSetPowerManagedDevicePowerState (IN PPCI_PDO_EXTENSION DeviceExtension, IN DEVICE_POWER_STATE DeviceState, IN BOOLEAN IrpSet)
NTSTATUS NTAPI	PciAddDevice (IN PDRIVER_OBJECT DriverObject, IN PDEVICE_OBJECT PhysicalDeviceObject)
NTSTATUS NTAPI	PciFdoIrpStartDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoIrpQueryRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoIrpRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoIrpCancelRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoIrpStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoIrpQueryStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoIrpCancelStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoIrpQueryDeviceRelations (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoIrpQueryInterface (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoIrpQueryCapabilities (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoIrpDeviceUsageNotification (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoIrpSurpriseRemoval (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciFdoIrpQueryLegacyBusInformation (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoCreate (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_SLOT_NUMBER Slot, OUT PDEVICE_OBJECT *PdoDeviceObject)
NTSTATUS NTAPI	PciPdoWaitWake (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoSetPowerState (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpQueryPower (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpStartDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpQueryRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpCancelRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpQueryStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpCancelStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpQueryDeviceRelations (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpQueryInterface (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpQueryCapabilities (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpQueryResources (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpQueryResourceRequirements (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpQueryDeviceText (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpReadConfig (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpWriteConfig (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpQueryId (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpQueryDeviceState (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpQueryBusInformation (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpDeviceUsageNotification (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpSurpriseRemoval (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciPdoIrpQueryLegacyBusInformation (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
VOID NTAPI	PciHookHal (VOID)
VOID NTAPI	PciVerifierInit (IN PDRIVER_OBJECT DriverObject)
PPCI_VERIFIER_DATA NTAPI	PciVerifierRetrieveFailureData (IN ULONG FailureCode)
BOOLEAN NTAPI	PciStringToUSHORT (IN PWCHAR String, OUT PUSHORT Value)
BOOLEAN NTAPI	PciIsDatacenter (VOID)
NTSTATUS NTAPI	PciBuildDefaultExclusionLists (VOID)
BOOLEAN NTAPI	PciUnicodeStringStrStr (IN PUNICODE_STRING InputString, IN PCUNICODE_STRING EqualString, IN BOOLEAN CaseInSensitive)
BOOLEAN NTAPI	PciOpenKey (IN PWCHAR KeyName, IN HANDLE RootKey, IN ACCESS_MASK DesiredAccess, OUT PHANDLE KeyHandle, OUT PNTSTATUS KeyStatus)
NTSTATUS NTAPI	PciGetRegistryValue (IN PWCHAR ValueName, IN PWCHAR KeyName, IN HANDLE RootHandle, IN ULONG Type, OUT PVOID *OutputBuffer, OUT PULONG OutputLength)
PPCI_FDO_EXTENSION NTAPI	PciFindParentPciFdoExtension (IN PDEVICE_OBJECT DeviceObject, IN PKEVENT Lock)
VOID NTAPI	PciInsertEntryAtTail (IN PSINGLE_LIST_ENTRY ListHead, IN PPCI_FDO_EXTENSION DeviceExtension, IN PKEVENT Lock)
NTSTATUS NTAPI	PciGetDeviceProperty (IN PDEVICE_OBJECT DeviceObject, IN DEVICE_REGISTRY_PROPERTY DeviceProperty, OUT PVOID *OutputBuffer)
NTSTATUS NTAPI	PciSendIoctl (IN PDEVICE_OBJECT DeviceObject, IN ULONG IoControlCode, IN PVOID InputBuffer, IN ULONG InputBufferLength, IN PVOID OutputBuffer, IN ULONG OutputBufferLength)
VOID NTAPI	PcipLinkSecondaryExtension (IN PSINGLE_LIST_ENTRY List, IN PVOID Lock, IN PPCI_SECONDARY_EXTENSION SecondaryExtension, IN PCI_SIGNATURE ExtensionType, IN PVOID Destructor)
PPCI_SECONDARY_EXTENSION NTAPI	PciFindNextSecondaryExtension (IN PSINGLE_LIST_ENTRY ListHead, IN PCI_SIGNATURE ExtensionType)
ULONGLONG NTAPI	PciGetHackFlags (IN USHORT VendorId, IN USHORT DeviceId, IN USHORT SubVendorId, IN USHORT SubSystemId, IN UCHAR RevisionId)
PPCI_PDO_EXTENSION NTAPI	PciFindPdoByFunction (IN PPCI_FDO_EXTENSION DeviceExtension, IN ULONG FunctionNumber, IN PPCI_COMMON_HEADER PciData)
BOOLEAN NTAPI	PciIsCriticalDeviceClass (IN UCHAR BaseClass, IN UCHAR SubClass)
BOOLEAN NTAPI	PciIsDeviceOnDebugPath (IN PPCI_PDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciGetBiosConfig (IN PPCI_PDO_EXTENSION DeviceExtension, OUT PPCI_COMMON_HEADER PciData)
NTSTATUS NTAPI	PciSaveBiosConfig (IN PPCI_PDO_EXTENSION DeviceExtension, OUT PPCI_COMMON_HEADER PciData)
UCHAR NTAPI	PciReadDeviceCapability (IN PPCI_PDO_EXTENSION DeviceExtension, IN UCHAR Offset, IN ULONG CapabilityId, OUT PPCI_CAPABILITIES_HEADER Buffer, IN ULONG Length)
BOOLEAN NTAPI	PciCanDisableDecodes (IN PPCI_PDO_EXTENSION DeviceExtension, IN PPCI_COMMON_HEADER Config, IN ULONGLONG HackFlags, IN BOOLEAN ForPowerDown)
PCI_DEVICE_TYPES NTAPI	PciClassifyDeviceType (IN PPCI_PDO_EXTENSION PdoExtension)
ULONG_PTR NTAPI	PciExecuteCriticalSystemRoutine (IN ULONG_PTR IpiContext)
BOOLEAN NTAPI	PciCreateIoDescriptorFromBarLimit (PIO_RESOURCE_DESCRIPTOR ResourceDescriptor, IN PULONG BarArray, IN BOOLEAN Rom)
BOOLEAN NTAPI	PciIsSlotPresentInParentMethod (IN PPCI_PDO_EXTENSION PdoExtension, IN ULONG Method)
VOID NTAPI	PciDecodeEnable (IN PPCI_PDO_EXTENSION PdoExtension, IN BOOLEAN Enable, OUT PUSHORT Command)
NTSTATUS NTAPI	PciQueryBusInformation (IN PPCI_PDO_EXTENSION PdoExtension, IN PPNP_BUS_INFORMATION *Buffer)
NTSTATUS NTAPI	PciQueryCapabilities (IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PDEVICE_CAPABILITIES DeviceCapability)
PCM_PARTIAL_RESOURCE_DESCRIPTOR NTAPI	PciNextPartialDescriptor (PCM_PARTIAL_RESOURCE_DESCRIPTOR CmDescriptor)
NTSTATUS NTAPI	PciGetConfigHandlers (IN PPCI_FDO_EXTENSION FdoExtension)
VOID NTAPI	PciReadSlotConfig (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
VOID NTAPI	PciWriteDeviceConfig (IN PPCI_PDO_EXTENSION DeviceExtension, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
VOID NTAPI	PciReadDeviceConfig (IN PPCI_PDO_EXTENSION DeviceExtension, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
UCHAR NTAPI	PciGetAdjustedInterruptLine (IN PPCI_PDO_EXTENSION PdoExtension)
VOID NTAPI	PciInitializeState (IN PPCI_FDO_EXTENSION DeviceExtension)
NTSTATUS NTAPI	PciBeginStateTransition (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
NTSTATUS NTAPI	PciCancelStateTransition (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
VOID NTAPI	PciCommitStateTransition (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
NTSTATUS NTAPI	PciInitializeArbiters (IN PPCI_FDO_EXTENSION FdoExtension)
NTSTATUS NTAPI	PciInitializeArbiterRanges (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCM_RESOURCE_LIST Resources)
BOOLEAN NTAPI	PciDebugIrpDispatchDisplay (IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension, IN USHORT MaxMinor)
VOID NTAPI	PciDebugDumpCommonConfig (IN PPCI_COMMON_HEADER PciData)
VOID NTAPI	PciDebugDumpQueryCapabilities (IN PDEVICE_CAPABILITIES DeviceCaps)
VOID NTAPI	PciDebugPrintIoResReqList (IN PIO_RESOURCE_REQUIREMENTS_LIST Requirements)
VOID NTAPI	PciDebugPrintCmResList (IN PCM_RESOURCE_LIST ResourceList)
VOID NTAPI	PciDebugPrintPartialResource (IN PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialResource)
NTSTATUS NTAPI	PciQueryInterface (IN PPCI_FDO_EXTENSION DeviceExtension, IN CONST GUID *InterfaceType, IN ULONG Size, IN ULONG Version, IN PVOID InterfaceData, IN PINTERFACE Interface, IN BOOLEAN LastChance)
NTSTATUS NTAPI	PciPmeInterfaceInitializer (IN PVOID Instance)
NTSTATUS NTAPI	routeintrf_Initializer (IN PVOID Instance)
NTSTATUS NTAPI	arbusno_Initializer (IN PVOID Instance)
NTSTATUS NTAPI	agpintrf_Initializer (IN PVOID Instance)
NTSTATUS NTAPI	tranirq_Initializer (IN PVOID Instance)
NTSTATUS NTAPI	busintrf_Initializer (IN PVOID Instance)
NTSTATUS NTAPI	armem_Initializer (IN PVOID Instance)
NTSTATUS NTAPI	ario_Initializer (IN PVOID Instance)
NTSTATUS NTAPI	locintrf_Initializer (IN PVOID Instance)
NTSTATUS NTAPI	pcicbintrf_Initializer (IN PVOID Instance)
NTSTATUS NTAPI	lddintrf_Initializer (IN PVOID Instance)
NTSTATUS NTAPI	devpresent_Initializer (IN PVOID Instance)
NTSTATUS NTAPI	agpintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
NTSTATUS NTAPI	arbusno_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
NTSTATUS NTAPI	tranirq_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
NTSTATUS NTAPI	armem_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
NTSTATUS NTAPI	busintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
NTSTATUS NTAPI	ario_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
VOID NTAPI	ario_ApplyBrokenVideoHack (IN PPCI_FDO_EXTENSION FdoExtension)
NTSTATUS NTAPI	pcicbintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
NTSTATUS NTAPI	lddintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
NTSTATUS NTAPI	locintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
NTSTATUS NTAPI	PciPmeInterfaceConstructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
NTSTATUS NTAPI	routeintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
NTSTATUS NTAPI	devpresent_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
NTSTATUS NTAPI	PciQueryDeviceRelations (IN PPCI_FDO_EXTENSION DeviceExtension, IN OUT PDEVICE_RELATIONS *pDeviceRelations)
NTSTATUS NTAPI	PciQueryResources (IN PPCI_PDO_EXTENSION PdoExtension, OUT PCM_RESOURCE_LIST *Buffer)
NTSTATUS NTAPI	PciQueryTargetDeviceRelations (IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PDEVICE_RELATIONS *pDeviceRelations)
NTSTATUS NTAPI	PciQueryEjectionRelations (IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PDEVICE_RELATIONS *pDeviceRelations)
NTSTATUS NTAPI	PciQueryRequirements (IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *RequirementsList)
BOOLEAN NTAPI	PciComputeNewCurrentSettings (IN PPCI_PDO_EXTENSION PdoExtension, IN PCM_RESOURCE_LIST ResourceList)
NTSTATUS NTAPI	PciSetResources (IN PPCI_PDO_EXTENSION PdoExtension, IN BOOLEAN DoReset, IN BOOLEAN SomethingSomethingDarkSide)
NTSTATUS NTAPI	PciBuildRequirementsList (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData, OUT PIO_RESOURCE_REQUIREMENTS_LIST *Buffer)
PWCHAR NTAPI	PciGetDeviceDescriptionMessage (IN UCHAR BaseClass, IN UCHAR SubClass)
NTSTATUS NTAPI	PciQueryDeviceText (IN PPCI_PDO_EXTENSION PdoExtension, IN DEVICE_TEXT_TYPE QueryType, IN ULONG Locale, OUT PWCHAR *Buffer)
NTSTATUS NTAPI	PciQueryId (IN PPCI_PDO_EXTENSION DeviceExtension, IN BUS_QUERY_ID_TYPE QueryType, OUT PWCHAR *Buffer)
VOID NTAPI	Cardbus_MassageHeaderForLimitsDetermination (IN PPCI_CONFIGURATOR_CONTEXT Context)
VOID NTAPI	Cardbus_SaveCurrentSettings (IN PPCI_CONFIGURATOR_CONTEXT Context)
VOID NTAPI	Cardbus_SaveLimits (IN PPCI_CONFIGURATOR_CONTEXT Context)
VOID NTAPI	Cardbus_RestoreCurrent (IN PPCI_CONFIGURATOR_CONTEXT Context)
VOID NTAPI	Cardbus_GetAdditionalResourceDescriptors (IN PPCI_CONFIGURATOR_CONTEXT Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)
VOID NTAPI	Cardbus_ResetDevice (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
VOID NTAPI	Cardbus_ChangeResourceSettings (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
VOID NTAPI	Device_MassageHeaderForLimitsDetermination (IN PPCI_CONFIGURATOR_CONTEXT Context)
VOID NTAPI	Device_SaveCurrentSettings (IN PPCI_CONFIGURATOR_CONTEXT Context)
VOID NTAPI	Device_SaveLimits (IN PPCI_CONFIGURATOR_CONTEXT Context)
VOID NTAPI	Device_RestoreCurrent (IN PPCI_CONFIGURATOR_CONTEXT Context)
VOID NTAPI	Device_GetAdditionalResourceDescriptors (IN PPCI_CONFIGURATOR_CONTEXT Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)
VOID NTAPI	Device_ResetDevice (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
VOID NTAPI	Device_ChangeResourceSettings (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
VOID NTAPI	PPBridge_MassageHeaderForLimitsDetermination (IN PPCI_CONFIGURATOR_CONTEXT Context)
VOID NTAPI	PPBridge_SaveCurrentSettings (IN PPCI_CONFIGURATOR_CONTEXT Context)
VOID NTAPI	PPBridge_SaveLimits (IN PPCI_CONFIGURATOR_CONTEXT Context)
VOID NTAPI	PPBridge_RestoreCurrent (IN PPCI_CONFIGURATOR_CONTEXT Context)
VOID NTAPI	PPBridge_GetAdditionalResourceDescriptors (IN PPCI_CONFIGURATOR_CONTEXT Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)
VOID NTAPI	PPBridge_ResetDevice (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
VOID NTAPI	PPBridge_ChangeResourceSettings (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
BOOLEAN NTAPI	PciAreBusNumbersConfigured (IN PPCI_PDO_EXTENSION PdoExtension)
NTSTATUS NTAPI	PciCacheLegacyDeviceRouting (IN PDEVICE_OBJECT DeviceObject, IN ULONG BusNumber, IN ULONG SlotNumber, IN UCHAR InterruptLine, IN UCHAR InterruptPin, IN UCHAR BaseClass, IN UCHAR SubClass, IN PDEVICE_OBJECT PhysicalDeviceObject, IN PPCI_PDO_EXTENSION PdoExtension, OUT PDEVICE_OBJECT *pFoundDeviceObject)

Variables
DRIVER_DISPATCH	PciDispatchIrp
DRIVER_ADD_DEVICE	PciAddDevice
KIPI_BROADCAST_WORKER	PciExecuteCriticalSystemRoutine
SINGLE_LIST_ENTRY	PciFdoExtensionListHead
KEVENT	PciGlobalLock
PPCI_INTERFACE	PciInterfaces []
PCI_INTERFACE	ArbiterInterfaceBusNumber
PCI_INTERFACE	ArbiterInterfaceMemory
PCI_INTERFACE	ArbiterInterfaceIo
PCI_INTERFACE	BusHandlerInterface
PCI_INTERFACE	PciRoutingInterface
PCI_INTERFACE	PciCardbusPrivateInterface
PCI_INTERFACE	PciLegacyDeviceDetectionInterface
PCI_INTERFACE	PciPmeInterface
PCI_INTERFACE	PciDevicePresentInterface
PCI_INTERFACE	PciLocationInterface
PCI_INTERFACE	AgpTargetInterface
PCI_INTERFACE	TranslatorInterfaceInterrupt
PDRIVER_OBJECT	PciDriverObject
PWATCHDOG_TABLE	WdTable
PPCI_HACK_ENTRY	PciHackTable
BOOLEAN	PciAssignBusNumbers
BOOLEAN	PciEnableNativeModeATA
PPCI_IRQ_ROUTING_TABLE	PciIrqRoutingTable
BOOLEAN	PciRunningDatacenter
NTSYSAPI BOOLEAN	InitSafeBootMode

Macro Definition Documentation

ASSERT_FDO

#define ASSERT_FDO

(

x

)

ASSERT((x)->ExtensionType == PciFdoExtensionType);

Definition at line 35 of file pci.h.

ASSERT_PDO

#define ASSERT_PDO

(

x

)

ASSERT((x)->ExtensionType == PciPdoExtensionType);

Definition at line 36 of file pci.h.

MAX_ANSI_STRINGS

#define MAX_ANSI_STRINGS   0x08

Definition at line 85 of file pci.h.

MAX_DEBUGGING_DEVICES_SUPPORTED

#define MAX_DEBUGGING_DEVICES_SUPPORTED   0x04

Definition at line 75 of file pci.h.

PCI_HACK_ENTRY_FULL_SIZE

#define PCI_HACK_ENTRY_FULL_SIZE   sizeof(L"VVVVddddssssIIIIRR") - sizeof(UNICODE_NULL)

Definition at line 44 of file pci.h.

PCI_HACK_ENTRY_REV_SIZE

#define PCI_HACK_ENTRY_REV_SIZE   sizeof(L"VVVVddddRR") - sizeof(UNICODE_NULL)

Definition at line 42 of file pci.h.

PCI_HACK_ENTRY_SIZE

#define PCI_HACK_ENTRY_SIZE   sizeof(L"VVVVdddd") - sizeof(UNICODE_NULL)

Definition at line 41 of file pci.h.

PCI_HACK_ENTRY_SUBSYS_SIZE

#define PCI_HACK_ENTRY_SUBSYS_SIZE   sizeof(L"VVVVddddssssIIII") - sizeof(UNICODE_NULL)

Definition at line 43 of file pci.h.

PCI_HACK_FIXUP_AFTER_CONFIGURATION

#define PCI_HACK_FIXUP_AFTER_CONFIGURATION   0x01

Definition at line 69 of file pci.h.

PCI_HACK_FIXUP_BEFORE_CONFIGURATION

#define PCI_HACK_FIXUP_BEFORE_CONFIGURATION   0x00

Definition at line 68 of file pci.h.

PCI_HACK_FIXUP_BEFORE_UPDATE

#define PCI_HACK_FIXUP_BEFORE_UPDATE   0x03

Definition at line 70 of file pci.h.

PCI_HACK_HAS_REVISION_INFO

#define PCI_HACK_HAS_REVISION_INFO   0x01

Definition at line 49 of file pci.h.

PCI_HACK_HAS_SUBSYSTEM_INFO

#define PCI_HACK_HAS_SUBSYSTEM_INFO   0x02

Definition at line 50 of file pci.h.

PCI_INTERFACE_FDO

#define PCI_INTERFACE_FDO   0x02

Definition at line 56 of file pci.h.

PCI_INTERFACE_PDO

#define PCI_INTERFACE_PDO   0x01

Definition at line 55 of file pci.h.

PCI_INTERFACE_ROOT

#define PCI_INTERFACE_ROOT   0x04

Definition at line 57 of file pci.h.

PCI_IS_ROOT_FDO

#define PCI_IS_ROOT_FDO

(

x

)

((x)->BusRootFdoExtension == x)

Definition at line 30 of file pci.h.

PCI_POOL_TAG

#define PCI_POOL_TAG   'BicP'

Definition at line 25 of file pci.h.

PCI_SKIP_DEVICE_ENUMERATION

#define PCI_SKIP_DEVICE_ENUMERATION   0x01

Definition at line 62 of file pci.h.

PCI_SKIP_RESOURCE_ENUMERATION

#define PCI_SKIP_RESOURCE_ENUMERATION   0x02

Definition at line 63 of file pci.h.

PCI_VERIFIER_CODES

#define PCI_VERIFIER_CODES   0x04

Definition at line 80 of file pci.h.

Typedef Documentation

Instance

_In_opt_ PFLT_INSTANCE Instance

Definition at line 359 of file pci.h.

Interface

_In_ ULONG Interface

Definition at line 359 of file pci.h.

InterfaceData

typedef IN PVOID IN PVOID InterfaceData

Definition at line 359 of file pci.h.

PCI_ARBITER_INSTANCE

typedef struct PCI_ARBITER_INSTANCE PCI_ARBITER_INSTANCE

PCI_CONFIGURATOR

typedef struct _PCI_CONFIGURATOR PCI_CONFIGURATOR

PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS

typedef VOID(NTAPI * PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS) (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)

Definition at line 453 of file pci.h.

PCI_CONFIGURATOR_CONTEXT

typedef struct _PCI_CONFIGURATOR_CONTEXT PCI_CONFIGURATOR_CONTEXT

PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS

typedef VOID(NTAPI * PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)

Definition at line 458 of file pci.h.

PCI_CONFIGURATOR_RESET_DEVICE

typedef VOID(NTAPI * PCI_CONFIGURATOR_RESET_DEVICE) (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)

Definition at line 464 of file pci.h.

PCI_CONFIGURATOR_RESTORE_CURRENT

typedef VOID(NTAPI * PCI_CONFIGURATOR_RESTORE_CURRENT) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)

Definition at line 441 of file pci.h.

PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS

typedef VOID(NTAPI * PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)

Definition at line 449 of file pci.h.

PCI_CONFIGURATOR_SAVE_LIMITS

typedef VOID(NTAPI * PCI_CONFIGURATOR_SAVE_LIMITS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)

Definition at line 445 of file pci.h.

PCI_DEVICE_TYPES

typedef enum _PCI_DEVICE_TYPES PCI_DEVICE_TYPES

PCI_DISPATCH_FUNCTION

typedef NTSTATUS(NTAPI * PCI_DISPATCH_FUNCTION) (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PVOID DeviceExtension)

Definition at line 323 of file pci.h.

PCI_DISPATCH_STYLE

typedef enum _PCI_DISPATCH_STYLE PCI_DISPATCH_STYLE

PCI_FDO_EXTENSION

typedef struct _PCI_FDO_EXTENSION PCI_FDO_EXTENSION

PCI_FUNCTION_RESOURCES

typedef struct _PCI_FUNCTION_RESOURCES PCI_FUNCTION_RESOURCES

PCI_HACK_ENTRY

typedef struct _PCI_HACK_ENTRY PCI_HACK_ENTRY

PCI_HEADER_TYPE_DEPENDENT

typedef union _PCI_HEADER_TYPE_DEPENDENT PCI_HEADER_TYPE_DEPENDENT

PCI_ID_BUFFER

typedef struct _PCI_ID_BUFFER PCI_ID_BUFFER

PCI_INTERFACE

typedef struct _PCI_INTERFACE PCI_INTERFACE

PCI_INTERFACE_INITIALIZER

typedef NTSTATUS(NTAPI * PCI_INTERFACE_INITIALIZER) (IN PVOID Instance)

Definition at line 366 of file pci.h.

PCI_IPI_CONTEXT

typedef struct _PCI_IPI_CONTEXT PCI_IPI_CONTEXT

PCI_IPI_FUNCTION

typedef VOID(NTAPI * PCI_IPI_FUNCTION) (IN PVOID Reserved, IN PVOID Context)

Definition at line 500 of file pci.h.

PCI_LEGACY_DEVICE

typedef struct _PCI_LEGACY_DEVICE PCI_LEGACY_DEVICE

PCI_LOCK

typedef struct _PCI_LOCK PCI_LOCK

PCI_MJ_DISPATCH_TABLE

typedef struct _PCI_MJ_DISPATCH_TABLE PCI_MJ_DISPATCH_TABLE

PCI_MN_DISPATCH_TABLE

typedef struct _PCI_MN_DISPATCH_TABLE PCI_MN_DISPATCH_TABLE

PCI_PDO_EXTENSION

typedef struct _PCI_PDO_EXTENSION PCI_PDO_EXTENSION

PCI_POWER_STATE

typedef struct _PCI_POWER_STATE PCI_POWER_STATE

PCI_SECONDARY_EXTENSION

typedef struct PCI_SECONDARY_EXTENSION PCI_SECONDARY_EXTENSION

PCI_SIGNATURE

typedef enum _PCI_SIGNATURE PCI_SIGNATURE

PCI_STATE

typedef enum _PCI_STATE PCI_STATE

PCI_VERIFIER_DATA

typedef struct _PCI_VERIFIER_DATA PCI_VERIFIER_DATA

PPCI_ARBITER_INSTANCE

typedef struct PCI_ARBITER_INSTANCE * PPCI_ARBITER_INSTANCE

PPCI_CONFIGURATOR

typedef struct _PCI_CONFIGURATOR * PPCI_CONFIGURATOR

PPCI_CONFIGURATOR_CONTEXT

typedef struct _PCI_CONFIGURATOR_CONTEXT * PPCI_CONFIGURATOR_CONTEXT

PPCI_FDO_EXTENSION

typedef struct _PCI_FDO_EXTENSION * PPCI_FDO_EXTENSION

PPCI_FUNCTION_RESOURCES

typedef struct _PCI_FUNCTION_RESOURCES * PPCI_FUNCTION_RESOURCES

PPCI_HACK_ENTRY

typedef struct _PCI_HACK_ENTRY * PPCI_HACK_ENTRY

PPCI_HEADER_TYPE_DEPENDENT

typedef union _PCI_HEADER_TYPE_DEPENDENT * PPCI_HEADER_TYPE_DEPENDENT

PPCI_ID_BUFFER

typedef struct _PCI_ID_BUFFER * PPCI_ID_BUFFER

PPCI_INTERFACE

typedef struct _PCI_INTERFACE * PPCI_INTERFACE

PPCI_IPI_CONTEXT

typedef struct _PCI_IPI_CONTEXT * PPCI_IPI_CONTEXT

PPCI_LEGACY_DEVICE

typedef struct _PCI_LEGACY_DEVICE * PPCI_LEGACY_DEVICE

PPCI_LOCK

typedef struct _PCI_LOCK * PPCI_LOCK

PPCI_MJ_DISPATCH_TABLE

typedef struct _PCI_MJ_DISPATCH_TABLE * PPCI_MJ_DISPATCH_TABLE

PPCI_MN_DISPATCH_TABLE

typedef struct _PCI_MN_DISPATCH_TABLE * PPCI_MN_DISPATCH_TABLE

PPCI_PDO_EXTENSION

typedef struct _PCI_PDO_EXTENSION * PPCI_PDO_EXTENSION

PPCI_POWER_STATE

typedef struct _PCI_POWER_STATE * PPCI_POWER_STATE

PPCI_SECONDARY_EXTENSION

typedef struct PCI_SECONDARY_EXTENSION * PPCI_SECONDARY_EXTENSION

PPCI_SIGNATURE

typedef enum _PCI_SIGNATURE * PPCI_SIGNATURE

PPCI_VERIFIER_DATA

typedef struct _PCI_VERIFIER_DATA * PPCI_VERIFIER_DATA

Size

_In_ CONST DEVPROPKEY _In_ LCID _Reserved_ ULONG _In_ ULONG Size

Examples

/srv/doxygen/reactos/win32ss/gdi/gdi32/objects/utils.c.

Definition at line 359 of file pci.h.

Version

int Version

Definition at line 359 of file pci.h.

Enumeration Type Documentation

_PCI_DEVICE_TYPES

enum _PCI_DEVICE_TYPES

Enumerator
PciTypeInvalid
PciTypeHostBridge
PciTypePciBridge
PciTypeCardbusBridge
PciTypeDevice

Definition at line 113 of file pci.h.

{
    PciTypeInvalid,
    PciTypeHostBridge,
    PciTypePciBridge,
    PciTypeCardbusBridge,
    PciTypeDevice
} PCI_DEVICE_TYPES;

_PCI_DISPATCH_STYLE

enum _PCI_DISPATCH_STYLE

Enumerator
IRP_COMPLETE
IRP_DOWNWARD
IRP_UPWARD
IRP_DISPATCH

Definition at line 139 of file pci.h.

{
    IRP_COMPLETE,
    IRP_DOWNWARD,
    IRP_UPWARD,
    IRP_DISPATCH,
} PCI_DISPATCH_STYLE;

_PCI_SIGNATURE

enum _PCI_SIGNATURE

Enumerator
PciPdoExtensionType
PciFdoExtensionType
PciArb_Io
PciArb_Memory
PciArb_Interrupt
PciArb_BusNumber
PciTrans_Interrupt
PciInterface_BusHandler
PciInterface_IntRouteHandler
PciInterface_PciCb
PciInterface_LegacyDeviceDetection
PciInterface_PmeHandler
PciInterface_DevicePresent
PciInterface_NativeIde
PciInterface_AgpTarget
PciInterface_Location

Definition at line 90 of file pci.h.

{
    PciPdoExtensionType = 'icP0',
    PciFdoExtensionType = 'icP1',
    PciArb_Io = 'icP2',
    PciArb_Memory = 'icP3',
    PciArb_Interrupt = 'icP4',
    PciArb_BusNumber = 'icP5',
    PciTrans_Interrupt = 'icP6',
    PciInterface_BusHandler = 'icP7',
    PciInterface_IntRouteHandler = 'icP8',
    PciInterface_PciCb = 'icP9',
    PciInterface_LegacyDeviceDetection = 'icP:',
    PciInterface_PmeHandler = 'icP;',
    PciInterface_DevicePresent = 'icP<',
    PciInterface_NativeIde = 'icP=',
    PciInterface_AgpTarget = 'icP>',
    PciInterface_Location  = 'icP?'
} PCI_SIGNATURE, *PPCI_SIGNATURE;

_PCI_STATE

enum _PCI_STATE

Enumerator
PciNotStarted
PciStarted
PciDeleted
PciStopped
PciSurpriseRemoved
PciSynchronizedOperation
PciMaxObjectState

Definition at line 125 of file pci.h.

{
    PciNotStarted,
    PciStarted,
    PciDeleted,
    PciStopped,
    PciSurpriseRemoved,
    PciSynchronizedOperation,
    PciMaxObjectState
} PCI_STATE;

Function Documentation

agpintrf_Constructor()

NTSTATUS NTAPI agpintrf_Constructor	(	IN PVOID	DeviceExtension,
		IN PVOID	Instance,
		IN PVOID	InterfaceData,
		IN USHORT	Version,
		IN USHORT	Size,
		IN PINTERFACE	Interface
	)

Definition at line 47 of file agpintrf.c.

{
    PPCI_PDO_EXTENSION PdoExtension = (PPCI_PDO_EXTENSION)DeviceExtension;

    UNREFERENCED_PARAMETER(Instance);
    UNREFERENCED_PARAMETER(InterfaceData);
    UNREFERENCED_PARAMETER(Version);
    UNREFERENCED_PARAMETER(Size);
    UNREFERENCED_PARAMETER(Interface);

    /* Only AGP bridges are supported (which are PCI-to-PCI Bridge Devices) */
    if ((PdoExtension->BaseClass != PCI_CLASS_BRIDGE_DEV) ||
        (PdoExtension->SubClass != PCI_SUBCLASS_BR_PCI_TO_PCI))
    {
        /* Fail any other PDO */
        return STATUS_NOT_SUPPORTED;
    }

    /* Not yet implemented */
    UNIMPLEMENTED_DBGBREAK();
    return STATUS_NOT_IMPLEMENTED;
}

agpintrf_Initializer()

NTSTATUS NTAPI agpintrf_Initializer

(

IN PVOID

Instance

)

Definition at line 37 of file agpintrf.c.

{
    UNREFERENCED_PARAMETER(Instance);
    /* PnP Interfaces don't get Initialized */
    ASSERTMSG("PCI agpintrf_Initializer, unexpected call.\n", FALSE);
    return STATUS_UNSUCCESSFUL;
}

arbusno_Constructor()

NTSTATUS NTAPI arbusno_Constructor	(	IN PVOID	DeviceExtension,
		IN PVOID	Instance,
		IN PVOID	InterfaceData,
		IN USHORT	Version,
		IN USHORT	Size,
		IN PINTERFACE	Interface
	)

Definition at line 46 of file ar_busno.c.

{
    PPCI_FDO_EXTENSION FdoExtension = (PPCI_FDO_EXTENSION)DeviceExtension;
    NTSTATUS Status;
    PAGED_CODE();

    UNREFERENCED_PARAMETER(PciInterface);
    UNREFERENCED_PARAMETER(Version);
    UNREFERENCED_PARAMETER(Size);
    UNREFERENCED_PARAMETER(Interface);

    /* Make sure it's the expected interface */
    if ((ULONG_PTR)InterfaceData != CmResourceTypeBusNumber)
    {
        /* Arbiter support must have been initialized first */
        if (FdoExtension->ArbitersInitialized)
        {
            /* Not yet implemented */
            UNIMPLEMENTED;
            while (TRUE);
        }
        else
        {
            /* No arbiters for this FDO */
            Status = STATUS_NOT_SUPPORTED;
        }
    }
    else
    {
        /* Not the right interface */
        Status = STATUS_INVALID_PARAMETER_5;
    }

    /* Return the status */
    return Status;
}

arbusno_Initializer()

NTSTATUS NTAPI arbusno_Initializer

(

IN PVOID

Instance

)

Definition at line 35 of file ar_busno.c.

{
    UNREFERENCED_PARAMETER(Instance);
    /* Not yet implemented */
    UNIMPLEMENTED;
    //while (TRUE);
    return STATUS_SUCCESS;
}

ario_ApplyBrokenVideoHack()

VOID NTAPI ario_ApplyBrokenVideoHack

(

IN PPCI_FDO_EXTENSION

FdoExtension

)

Definition at line 104 of file ar_memio.c.

{
    PPCI_ARBITER_INSTANCE PciArbiter;
    //PARBITER_INSTANCE CommonInstance;
    //NTSTATUS Status;

    /* Only valid for root FDOs who are being applied the hack for the first time */
    ASSERT(!FdoExtension->BrokenVideoHackApplied);
    ASSERT(PCI_IS_ROOT_FDO(FdoExtension));

    /* Find the I/O arbiter */
    PciArbiter = (PVOID)PciFindNextSecondaryExtension(FdoExtension->
                                                      SecondaryExtension.Next,
                                                      PciArb_Io);
    ASSERT(PciArbiter);
#if 0 // when arb exist
    /* Get the Arb instance */
    CommonInstance = &PciArbiter->CommonInstance;

    /* Free the two lists, enabling full VGA access */
    ArbFreeOrderingList(&CommonInstance->OrderingList);
    ArbFreeOrderingList(&CommonInstance->ReservedList);

    /* Build the ordering for broken video PCI access */
    Status = ArbBuildAssignmentOrdering(CommonInstance,
                                        L"Pci",
                                        L"BrokenVideo",
                                        NULL);
    ASSERT(NT_SUCCESS(Status));
#else
    //Status = STATUS_SUCCESS;
    UNIMPLEMENTED;
    while (TRUE);
#endif
    /* Now the hack has been applied */
    FdoExtension->BrokenVideoHackApplied = TRUE;
}

Referenced by PciApplyHacks().

ario_Constructor()

NTSTATUS NTAPI ario_Constructor	(	IN PVOID	DeviceExtension,
		IN PVOID	Instance,
		IN PVOID	InterfaceData,
		IN USHORT	Version,
		IN USHORT	Size,
		IN PINTERFACE	Interface
	)

Definition at line 60 of file ar_memio.c.

{
    PPCI_FDO_EXTENSION FdoExtension = (PPCI_FDO_EXTENSION)DeviceExtension;
    NTSTATUS Status;
    PAGED_CODE();

    UNREFERENCED_PARAMETER(PciInterface);
    UNREFERENCED_PARAMETER(Version);
    UNREFERENCED_PARAMETER(Size);
    UNREFERENCED_PARAMETER(Interface);

    /* Make sure it's the expected interface */
    if ((ULONG_PTR)InterfaceData != CmResourceTypePort)
    {
        /* Arbiter support must have been initialized first */
        if (FdoExtension->ArbitersInitialized)
        {
            /* Not yet implemented */
            UNIMPLEMENTED;
            while (TRUE);
        }
        else
        {
            /* No arbiters for this FDO */
            Status = STATUS_NOT_SUPPORTED;
        }
    }
    else
    {
        /* Not the right interface */
        Status = STATUS_INVALID_PARAMETER_5;
    }

    /* Return the status */
    return Status;
}

ario_Initializer()

NTSTATUS NTAPI ario_Initializer

(

IN PVOID

Instance

)

Definition at line 48 of file ar_memio.c.

{
    UNREFERENCED_PARAMETER(Instance);

    /* Not yet implemented */
    UNIMPLEMENTED;
    //while (TRUE);
    return STATUS_SUCCESS;
}

armem_Constructor()

NTSTATUS NTAPI armem_Constructor	(	IN PVOID	DeviceExtension,
		IN PVOID	Instance,
		IN PVOID	InterfaceData,
		IN USHORT	Version,
		IN USHORT	Size,
		IN PINTERFACE	Interface
	)

Definition at line 156 of file ar_memio.c.

{
    PPCI_FDO_EXTENSION FdoExtension = (PPCI_FDO_EXTENSION)DeviceExtension;
    NTSTATUS Status;
    PAGED_CODE();

    UNREFERENCED_PARAMETER(PciInterface);
    UNREFERENCED_PARAMETER(Version);
    UNREFERENCED_PARAMETER(Size);
    UNREFERENCED_PARAMETER(Interface);

    /* Make sure it's the expected interface */
    if ((ULONG_PTR)InterfaceData != CmResourceTypeMemory)
    {
        /* Arbiter support must have been initialized first */
        if (FdoExtension->ArbitersInitialized)
        {
            /* Not yet implemented */
            UNIMPLEMENTED;
            while (TRUE);
        }
        else
        {
            /* No arbiters for this FDO */
            Status = STATUS_NOT_SUPPORTED;
        }
    }
    else
    {
        /* Not the right interface */
        Status = STATUS_INVALID_PARAMETER_5;
    }

    /* Return the status */
    return Status;
}

armem_Initializer()

NTSTATUS NTAPI armem_Initializer

(

IN PVOID

Instance

)

Definition at line 144 of file ar_memio.c.

{
    UNREFERENCED_PARAMETER(Instance);

    /* Not yet implemented */
    UNIMPLEMENTED;
    //while (TRUE);
    return STATUS_SUCCESS;
}

busintrf_Constructor()

NTSTATUS NTAPI busintrf_Constructor	(	IN PVOID	DeviceExtension,
		IN PVOID	Instance,
		IN PVOID	InterfaceData,
		IN USHORT	Version,
		IN USHORT	Size,
		IN PINTERFACE	Interface
	)

Definition at line 45 of file busintrf.c.

{
    UNREFERENCED_PARAMETER(DeviceExtension);
    UNREFERENCED_PARAMETER(Instance);
    UNREFERENCED_PARAMETER(InterfaceData);
    UNREFERENCED_PARAMETER(Version);
    UNREFERENCED_PARAMETER(Size);
    UNREFERENCED_PARAMETER(Interface);

    /* Not yet implemented */
    UNIMPLEMENTED_DBGBREAK();
    return STATUS_NOT_IMPLEMENTED;
}

busintrf_Initializer()

NTSTATUS NTAPI busintrf_Initializer

(

IN PVOID

Instance

)

Definition at line 35 of file busintrf.c.

{
    UNREFERENCED_PARAMETER(Instance);
    /* PnP Interfaces don't get Initialized */
    ASSERTMSG("PCI busintrf_Initializer, unexpected call.\n", FALSE);
    return STATUS_UNSUCCESSFUL;
}

Cardbus_ChangeResourceSettings()

VOID NTAPI Cardbus_ChangeResourceSettings	(	IN PPCI_PDO_EXTENSION	PdoExtension,
		IN PPCI_COMMON_HEADER	PciData
	)

Definition at line 89 of file cardbus.c.

{
    UNREFERENCED_PARAMETER(PdoExtension);
    UNREFERENCED_PARAMETER(PciData);
    UNIMPLEMENTED_DBGBREAK();
}

Cardbus_GetAdditionalResourceDescriptors()

VOID NTAPI Cardbus_GetAdditionalResourceDescriptors	(	IN PPCI_CONFIGURATOR_CONTEXT	Context,
		IN PPCI_COMMON_HEADER	PciData,
		IN PIO_RESOURCE_DESCRIPTOR	IoDescriptor
	)

Definition at line 67 of file cardbus.c.

{
    UNREFERENCED_PARAMETER(Context);
    UNREFERENCED_PARAMETER(PciData);
    UNREFERENCED_PARAMETER(IoDescriptor);
    UNIMPLEMENTED_DBGBREAK();
}

Cardbus_MassageHeaderForLimitsDetermination()

VOID NTAPI Cardbus_MassageHeaderForLimitsDetermination

(

IN PPCI_CONFIGURATOR_CONTEXT

Context

)

Definition at line 51 of file cardbus.c.

{
    UNREFERENCED_PARAMETER(Context);
    UNIMPLEMENTED_DBGBREAK();
}

Cardbus_ResetDevice()

VOID NTAPI Cardbus_ResetDevice	(	IN PPCI_PDO_EXTENSION	PdoExtension,
		IN PPCI_COMMON_HEADER	PciData
	)

Definition at line 79 of file cardbus.c.

{
    UNREFERENCED_PARAMETER(PdoExtension);
    UNREFERENCED_PARAMETER(PciData);
    UNIMPLEMENTED_DBGBREAK();
}

Cardbus_RestoreCurrent()

VOID NTAPI Cardbus_RestoreCurrent

(

IN PPCI_CONFIGURATOR_CONTEXT

Context

)

Definition at line 59 of file cardbus.c.

{
    UNREFERENCED_PARAMETER(Context);
    UNIMPLEMENTED_DBGBREAK();
}

Cardbus_SaveCurrentSettings()

VOID NTAPI Cardbus_SaveCurrentSettings

(

IN PPCI_CONFIGURATOR_CONTEXT

Context

)

Definition at line 35 of file cardbus.c.

{
    UNREFERENCED_PARAMETER(Context);
    UNIMPLEMENTED_DBGBREAK();
}

Cardbus_SaveLimits()

VOID NTAPI Cardbus_SaveLimits

(

IN PPCI_CONFIGURATOR_CONTEXT

Context

)

Definition at line 43 of file cardbus.c.

{
    UNREFERENCED_PARAMETER(Context);
    UNIMPLEMENTED_DBGBREAK();
}

Device_ChangeResourceSettings()

VOID NTAPI Device_ChangeResourceSettings	(	IN PPCI_PDO_EXTENSION	PdoExtension,
		IN PPCI_COMMON_HEADER	PciData
	)

Definition at line 283 of file device.c.

{
    UNREFERENCED_PARAMETER(PdoExtension);
    UNREFERENCED_PARAMETER(PciData);
    /* Not yet implemented */
    UNIMPLEMENTED_DBGBREAK();
}

Device_GetAdditionalResourceDescriptors()

VOID NTAPI Device_GetAdditionalResourceDescriptors	(	IN PPCI_CONFIGURATOR_CONTEXT	Context,
		IN PPCI_COMMON_HEADER	PciData,
		IN PIO_RESOURCE_DESCRIPTOR	IoDescriptor
	)

Definition at line 259 of file device.c.

{
    UNREFERENCED_PARAMETER(Context);
    UNREFERENCED_PARAMETER(PciData);
    UNREFERENCED_PARAMETER(IoDescriptor);
    /* Not yet implemented */
    UNIMPLEMENTED_DBGBREAK();
}

Device_MassageHeaderForLimitsDetermination()

VOID NTAPI Device_MassageHeaderForLimitsDetermination

(

IN PPCI_CONFIGURATOR_CONTEXT

Context

)

Definition at line 218 of file device.c.

{
    PPCI_COMMON_HEADER PciData;
    PPCI_PDO_EXTENSION PdoExtension;
    PULONG BarArray;
    ULONG i = 0;

    /* Get pointers from context data */
    PdoExtension = Context->PdoExtension;
    PciData = Context->PciData;

    /* Get the array of BARs */
    BarArray = PciData->u.type0.BaseAddresses;

    /* Check for IDE controllers that are not in native mode */
    if ((PdoExtension->BaseClass == PCI_CLASS_MASS_STORAGE_CTLR) &&
        (PdoExtension->SubClass == PCI_SUBCLASS_MSC_IDE_CTLR) &&
        (PdoExtension->ProgIf & 5) != 5)
    {
        /* These controllers only use legacy resources */
        i = 4;
    }

    /* Set all the bits on, which will allow us to recover the limit data */
    for (i = 0; i < PCI_TYPE0_ADDRESSES; i++) BarArray[i] = 0xFFFFFFFF;

    /* Do the same for the PCI ROM BAR */
    PciData->u.type0.ROMBaseAddress = PCI_ADDRESS_ROM_ADDRESS_MASK;
}

Device_ResetDevice()

VOID NTAPI Device_ResetDevice	(	IN PPCI_PDO_EXTENSION	PdoExtension,
		IN PPCI_COMMON_HEADER	PciData
	)

Definition at line 272 of file device.c.

{
    UNREFERENCED_PARAMETER(PdoExtension);
    UNREFERENCED_PARAMETER(PciData);
    /* Not yet implemented */
    UNIMPLEMENTED_DBGBREAK();
}

Device_RestoreCurrent()

VOID NTAPI Device_RestoreCurrent

(

IN PPCI_CONFIGURATOR_CONTEXT

Context

)

Definition at line 250 of file device.c.

{
    UNREFERENCED_PARAMETER(Context);
    /* Nothing to do for devices */
    return;
}

Device_SaveCurrentSettings()

VOID NTAPI Device_SaveCurrentSettings

(

IN PPCI_CONFIGURATOR_CONTEXT

Context

)

Definition at line 20 of file device.c.

{
    PPCI_COMMON_HEADER PciData;
    PIO_RESOURCE_DESCRIPTOR IoDescriptor;
    PCM_PARTIAL_RESOURCE_DESCRIPTOR CmDescriptor;
    PPCI_FUNCTION_RESOURCES Resources;
    PULONG BarArray;
    ULONG Bar, BarMask, i;

    /* Get variables from context */
    PciData = Context->Current;
    Resources = Context->PdoExtension->Resources;

    /* Loop all the PCI BARs */
    BarArray = PciData->u.type0.BaseAddresses;
    for (i = 0; i <= PCI_TYPE0_ADDRESSES; i++)
    {
        /* Get the resource descriptor and limit descriptor for this BAR */
        CmDescriptor = &Resources->Current[i];
        IoDescriptor = &Resources->Limit[i];

        /* Build the resource descriptor based on the limit descriptor */
        CmDescriptor->Type = IoDescriptor->Type;
        if (CmDescriptor->Type == CmResourceTypeNull) continue;
        CmDescriptor->Flags = IoDescriptor->Flags;
        CmDescriptor->ShareDisposition = IoDescriptor->ShareDisposition;
        CmDescriptor->u.Generic.Start.HighPart = 0;
        CmDescriptor->u.Generic.Length = IoDescriptor->u.Generic.Length;

        /* Check if we're handling PCI BARs, or the ROM BAR */
        if (i < PCI_TYPE0_ADDRESSES)
        {
            /* Read the actual BAR value */
            Bar = BarArray[i];

            /* Check if this is an I/O BAR */
            if (Bar & PCI_ADDRESS_IO_SPACE)
            {
                /* Use the right mask to get the I/O port base address */
                ASSERT(CmDescriptor->Type == CmResourceTypePort);
                BarMask = PCI_ADDRESS_IO_ADDRESS_MASK;
            }
            else
            {
                /* It's a RAM BAR, use the right mask to get the base address */
                ASSERT(CmDescriptor->Type == CmResourceTypeMemory);
                BarMask = PCI_ADDRESS_MEMORY_ADDRESS_MASK;

                /* Check if it's a 64-bit BAR */
                if ((Bar & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_64BIT)
                {
                    /* The next BAR value is actually the high 32-bits */
                    CmDescriptor->u.Memory.Start.HighPart = BarArray[i + 1];
                }
                else if ((Bar & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_20BIT)
                {
                    /* Legacy BAR, don't read more than 20 bits of the address */
                    BarMask = 0xFFFF0;
                }
            }
        }
        else
        {
            /* Actually a ROM BAR, so read the correct register */
            Bar = PciData->u.type0.ROMBaseAddress;

            /* Apply the correct mask for ROM BARs */
            BarMask = PCI_ADDRESS_ROM_ADDRESS_MASK;

            /* Make sure it's enabled */
            if (!(Bar & PCI_ROMADDRESS_ENABLED))
            {
                /* If it isn't, then a descriptor won't be built for it */
                CmDescriptor->Type = CmResourceTypeNull;
                continue;
            }
        }

        /* Now we have the right mask, read the actual address from the BAR */
        Bar &= BarMask;
        CmDescriptor->u.Memory.Start.LowPart = Bar;

        /* And check for invalid BAR addresses */
        if (!(CmDescriptor->u.Memory.Start.HighPart | Bar))
        {
            /* Skip these descriptors */
            CmDescriptor->Type = CmResourceTypeNull;
            DPRINT1("Invalid BAR\n");
        }
    }

    /* Also save the sub-IDs that came directly from the PCI header */
    Context->PdoExtension->SubsystemVendorId = PciData->u.type0.SubVendorID;
    Context->PdoExtension->SubsystemId = PciData->u.type0.SubSystemID;
}

Device_SaveLimits()

VOID NTAPI Device_SaveLimits

(

IN PPCI_CONFIGURATOR_CONTEXT

Context

)

Definition at line 118 of file device.c.

{
    PPCI_COMMON_HEADER Current, PciData;
    PPCI_PDO_EXTENSION PdoExtension;
    PULONG BarArray;
    PIO_RESOURCE_DESCRIPTOR Limit;
    ULONG i;

    /* Get pointers from the context */
    PdoExtension = Context->PdoExtension;
    Current = Context->Current;
    PciData = Context->PciData;

    /* And get the array of bARs */
    BarArray = PciData->u.type0.BaseAddresses;

    /* First, check for IDE controllers that are not in native mode */
    if ((PdoExtension->BaseClass == PCI_CLASS_MASS_STORAGE_CTLR) &&
        (PdoExtension->SubClass == PCI_SUBCLASS_MSC_IDE_CTLR) &&
        (PdoExtension->ProgIf & 5) != 5)
    {
        /* They should not be using any non-legacy resources */
        BarArray[0] = 0;
        BarArray[1] = 0;
        BarArray[2] = 0;
        BarArray[3] = 0;
    }
    else if ((PdoExtension->VendorId == 0x5333) &&
             ((PdoExtension->DeviceId == 0x88F0) ||
              (PdoExtension->DeviceId == 0x8880)))
    {
        /*
         * The problem is caused by the S3 Vision 968/868 video controller which
         * is used on the Diamond Stealth 64 Video 3000 series, Number Nine 9FX
         * motion 771, and other popular video cards, all containing a memory bug.
         * The 968/868 claims to require 32 MB of memory, but it actually decodes
         * 64 MB of memory.
         */
        for (i = 0; i < PCI_TYPE0_ADDRESSES; i++)
        {
            /* Find its 32MB RAM BAR */
            if (BarArray[i] == 0xFE000000)
            {
                /* Increase it to 64MB to make sure nobody touches the buffer */
                BarArray[i] = 0xFC000000;
                DPRINT1("PCI - Adjusted broken S3 requirement from 32MB to 64MB\n");
            }
        }
    }

    /* Check for Cirrus Logic GD5430/5440 cards */
    if ((PdoExtension->VendorId == 0x1013) && (PdoExtension->DeviceId == 0xA0))
    {
        /* Check for the I/O port requirement */
        if (BarArray[1] == 0xFC01)
        {
            /* Check for completely bogus BAR */
            if (Current->u.type0.BaseAddresses[1] == 1)
            {
                /* Ignore it */
                BarArray[1] = 0;
                DPRINT1("PCI - Ignored Cirrus GD54xx broken IO requirement (400 ports)\n");
            }
            else
            {
                /* Otherwise, this BAR seems okay */
                DPRINT1("PCI - Cirrus GD54xx 400 port IO requirement has a valid setting (%08x)\n",
                        Current->u.type0.BaseAddresses[1]);
            }
        }
        else if (BarArray[1])
        {
            /* Strange, the I/O BAR was not found as expected (or at all) */
            DPRINT1("PCI - Warning Cirrus Adapter 101300a0 has unexpected resource requirement (%08x)\n",
                    BarArray[1]);
        }
    }

    /* Finally, process all the limit descriptors */
    Limit = PdoExtension->Resources->Limit;
    for (i = 0; i < PCI_TYPE0_ADDRESSES; i++)
    {
        /* And build them based on the BARs */
        if (PciCreateIoDescriptorFromBarLimit(&Limit[i], &BarArray[i], FALSE))
        {
            /* This function returns TRUE if the BAR was 64-bit, handle this */
            ASSERT((i + 1) < PCI_TYPE0_ADDRESSES);
            i++;
            Limit[i].Type = CmResourceTypeNull;
        }
    }

    /* Create the last descriptor based on the ROM address */
    PciCreateIoDescriptorFromBarLimit(&Limit[i],
                                      &PciData->u.type0.ROMBaseAddress,
                                      TRUE);
}

devpresent_Constructor()

NTSTATUS NTAPI devpresent_Constructor	(	IN PVOID	DeviceExtension,
		IN PVOID	Instance,
		IN PVOID	InterfaceData,
		IN USHORT	Version,
		IN USHORT	Size,
		IN PINTERFACE	Interface
	)

Definition at line 45 of file devhere.c.

{
    PAGED_CODE();

    UNREFERENCED_PARAMETER(DeviceExtension);
    UNREFERENCED_PARAMETER(Instance);
    UNREFERENCED_PARAMETER(InterfaceData);
    UNREFERENCED_PARAMETER(Version);
    UNREFERENCED_PARAMETER(Size);
    UNREFERENCED_PARAMETER(Interface);

    /* Not yet implemented */
    UNIMPLEMENTED_DBGBREAK();
    return STATUS_NOT_IMPLEMENTED;
}

devpresent_Initializer()

NTSTATUS NTAPI devpresent_Initializer

(

IN PVOID

Instance

)

Definition at line 35 of file devhere.c.

{
    UNREFERENCED_PARAMETER(Instance);
    /* PnP Interfaces don't get Initialized */
    ASSERTMSG("PCI devpresent_Initializer, unexpected call.\n", FALSE);
    return STATUS_UNSUCCESSFUL;
}

lddintrf_Constructor()

NTSTATUS NTAPI lddintrf_Constructor	(	IN PVOID	DeviceExtension,
		IN PVOID	Instance,
		IN PVOID	InterfaceData,
		IN USHORT	Version,
		IN USHORT	Size,
		IN PINTERFACE	Interface
	)

Definition at line 45 of file lddintrf.c.

{
    UNREFERENCED_PARAMETER(DeviceExtension);
    UNREFERENCED_PARAMETER(Instance);
    UNREFERENCED_PARAMETER(InterfaceData);
    UNREFERENCED_PARAMETER(Version);
    UNREFERENCED_PARAMETER(Size);
    UNREFERENCED_PARAMETER(Interface);

    /* Not yet implemented */
    UNIMPLEMENTED_DBGBREAK();
    return STATUS_NOT_IMPLEMENTED;
}

lddintrf_Initializer()

NTSTATUS NTAPI lddintrf_Initializer

(

IN PVOID

Instance

)

Definition at line 35 of file lddintrf.c.

{
    UNREFERENCED_PARAMETER(Instance);
    /* PnP Interfaces don't get Initialized */
    ASSERTMSG("PCI lddintrf_Initializer, unexpected call.\n", FALSE);
    return STATUS_UNSUCCESSFUL;
}

locintrf_Constructor()

NTSTATUS NTAPI locintrf_Constructor	(	IN PVOID	DeviceExtension,
		IN PVOID	Instance,
		IN PVOID	InterfaceData,
		IN USHORT	Version,
		IN USHORT	Size,
		IN PINTERFACE	Interface
	)

Definition at line 45 of file locintrf.c.

{
    UNREFERENCED_PARAMETER(DeviceExtension);
    UNREFERENCED_PARAMETER(Instance);
    UNREFERENCED_PARAMETER(InterfaceData);
    UNREFERENCED_PARAMETER(Version);
    UNREFERENCED_PARAMETER(Size);
    UNREFERENCED_PARAMETER(Interface);

    /* Not yet implemented */
    UNIMPLEMENTED_DBGBREAK();
    return STATUS_NOT_IMPLEMENTED;
}

locintrf_Initializer()

NTSTATUS NTAPI locintrf_Initializer

(

IN PVOID

Instance

)

Definition at line 35 of file locintrf.c.

{
    UNREFERENCED_PARAMETER(Instance);
    /* PnP Interfaces don't get Initialized */
    ASSERTMSG("PCI locintrf_Initializer, unexpected call.\n", FALSE);
    return STATUS_UNSUCCESSFUL;
}

NTSTATUS()

typedef NTSTATUS

(

NTAPI *

PCI_INTERFACE_CONSTRUCTOR

)

PciAddDevice()

NTSTATUS NTAPI PciAddDevice	(	IN PDRIVER_OBJECT	DriverObject,
		IN PDEVICE_OBJECT	PhysicalDeviceObject
	)

Definition at line 458 of file fdo.c.

{
    PCM_RESOURCE_LIST Descriptor;
    PDEVICE_OBJECT AttachedTo;
    PPCI_FDO_EXTENSION FdoExtension;
    PPCI_FDO_EXTENSION ParentExtension;
    PPCI_PDO_EXTENSION PdoExtension;
    PDEVICE_OBJECT DeviceObject;
    UCHAR Buffer[sizeof(KEY_VALUE_PARTIAL_INFORMATION) + sizeof(ULONG)];
    PKEY_VALUE_PARTIAL_INFORMATION ValueInfo = (PKEY_VALUE_PARTIAL_INFORMATION)Buffer;
    NTSTATUS Status;
    HANDLE KeyHandle;
    UNICODE_STRING ValueName;
    ULONG ResultLength;
    PAGED_CODE();
    DPRINT1("PCI - AddDevice (a new bus). PDO: %p (Driver: %wZ)\n",
            PhysicalDeviceObject, &PhysicalDeviceObject->DriverObject->DriverName);

    /* Zero out variables so failure path knows what to do */
    AttachedTo = NULL;
    FdoExtension = NULL;
    PdoExtension = NULL;
    DeviceObject = NULL;

    do
    {
        /* Check if there's already a device extension for this bus */
        ParentExtension = PciFindParentPciFdoExtension(PhysicalDeviceObject,
                                                       &PciGlobalLock);
        if (ParentExtension)
        {
            /* Make sure we find a real PDO */
            PdoExtension = PhysicalDeviceObject->DeviceExtension;
            ASSERT_PDO(PdoExtension);

            /* Make sure it's a PCI-to-PCI bridge */
            if ((PdoExtension->BaseClass != PCI_CLASS_BRIDGE_DEV) ||
                (PdoExtension->SubClass != PCI_SUBCLASS_BR_PCI_TO_PCI))
            {
                /* This should never happen */
                DPRINT1("PCI - PciAddDevice for Non-Root/Non-PCI-PCI bridge,\n"
                        "      Class %02x, SubClass %02x, will not add.\n",
                        PdoExtension->BaseClass,
                        PdoExtension->SubClass);
                ASSERT((PdoExtension->BaseClass == PCI_CLASS_BRIDGE_DEV) &&
                       (PdoExtension->SubClass == PCI_SUBCLASS_BR_PCI_TO_PCI));

                /* Enter the failure path */
                Status = STATUS_INVALID_DEVICE_REQUEST;
                break;
            }

            /* Subordinate bus on the bridge */
            DPRINT1("PCI - AddDevice (new bus is child of bus 0x%x).\n",
                    ParentExtension->BaseBus);

            /* Make sure PCI bus numbers are configured */
            if (!PciAreBusNumbersConfigured(PdoExtension))
            {
                /* This is a critical failure */
                DPRINT1("PCI - Bus numbers not configured for bridge (0x%x.0x%x.0x%x)\n",
                        ParentExtension->BaseBus,
                        PdoExtension->Slot.u.bits.DeviceNumber,
                        PdoExtension->Slot.u.bits.FunctionNumber);

                /* Enter the failure path */
                Status = STATUS_INVALID_DEVICE_REQUEST;
                break;
            }
        }

        /* Create the FDO for the bus */
        Status = IoCreateDevice(DriverObject,
                                sizeof(PCI_FDO_EXTENSION),
                                NULL,
                                FILE_DEVICE_BUS_EXTENDER,
                                0,
                                0,
                                &DeviceObject);
        if (!NT_SUCCESS(Status)) break;

        /* Initialize the extension for the FDO */
        FdoExtension = DeviceObject->DeviceExtension;
        PciInitializeFdoExtensionCommonFields(DeviceObject->DeviceExtension,
                                              DeviceObject,
                                              PhysicalDeviceObject);

        /* Attach to the root PDO */
        Status = STATUS_NO_SUCH_DEVICE;
        AttachedTo = IoAttachDeviceToDeviceStack(DeviceObject,
                                                 PhysicalDeviceObject);
        ASSERT(AttachedTo != NULL);
        if (!AttachedTo) break;
        FdoExtension->AttachedDeviceObject = AttachedTo;

        /* Check if this is a child bus, or the root */
        if (ParentExtension)
        {
            /* The child inherits root data */
            FdoExtension->BaseBus = PdoExtension->Dependent.type1.SecondaryBus;
            FdoExtension->BusRootFdoExtension = ParentExtension->BusRootFdoExtension;
            PdoExtension->BridgeFdoExtension = FdoExtension;
            FdoExtension->ParentFdoExtension = ParentExtension;
        }
        else
        {
            /* Query the boot configuration */
            Status = PciGetDeviceProperty(PhysicalDeviceObject,
                                          DevicePropertyBootConfiguration,
                                          (PVOID*)&Descriptor);
            if (!NT_SUCCESS(Status))
            {
                /* No configuration has been set */
                Descriptor = NULL;
            }
            else
            {
                /* Root PDO in ReactOS does not assign boot resources */
                UNIMPLEMENTED_DBGBREAK("Encountered during setup\n");
                Descriptor = NULL;
            }

            if (Descriptor)
            {
                /* Root PDO in ReactOS does not assign boot resources */
                UNIMPLEMENTED_DBGBREAK();
            }
            else
            {
                /* Default configuration isn't the normal path on Windows */
                if (PciBreakOnDefault)
                {
                    /* If a second bus is found and there's still no data, crash */
                    KeBugCheckEx(PCI_BUS_DRIVER_INTERNAL,
                                 0xDEAD0010u,
                                 (ULONG_PTR)DeviceObject,
                                 0,
                                 0);
                }

                /* Warn that a default configuration will be used, and set bus 0 */
                DPRINT1("PCI   Will use default configuration.\n");
                PciBreakOnDefault = TRUE;
                FdoExtension->BaseBus = 0;
            }

            /* This is the root bus */
            FdoExtension->BusRootFdoExtension = FdoExtension;
        }

        /* Get the HAL or ACPI Bus Handler Callbacks for Configuration Access */
        Status = PciGetConfigHandlers(FdoExtension);
        if (!NT_SUCCESS(Status)) break;

        /* Initialize all the supported PCI arbiters */
        Status = PciInitializeArbiters(FdoExtension);
        if (!NT_SUCCESS(Status)) break;

        /* This is a real FDO, insert it into the list */
        FdoExtension->Fake = FALSE;
        PciInsertEntryAtTail(&PciFdoExtensionListHead,
                             FdoExtension,
                             &PciGlobalLock);

        /* Open the device registry key so that we can query the errata flags */
        IoOpenDeviceRegistryKey(DeviceObject,
                                PLUGPLAY_REGKEY_DEVICE,
                                KEY_ALL_ACCESS,
                                &KeyHandle),

        /* Open the value that contains errata flags for this bus instance */
        RtlInitUnicodeString(&ValueName, L"HackFlags");
        Status = ZwQueryValueKey(KeyHandle,
                                 &ValueName,
                                 KeyValuePartialInformation,
                                 ValueInfo,
                                 sizeof(Buffer),
                                 &ResultLength);
        ZwClose(KeyHandle);
        if (NT_SUCCESS(Status))
        {
            /* Make sure the data is of expected type and size */
            if ((ValueInfo->Type == REG_DWORD) &&
                (ValueInfo->DataLength == sizeof(ULONG)))
            {
                /* Read the flags for this bus */
                FdoExtension->BusHackFlags = *(PULONG)&ValueInfo->Data;
            }
        }

        /* Query ACPI for PCI HotPlug Support */
        PciGetHotPlugParameters(FdoExtension);

        /* The Bus FDO is now initialized */
        DeviceObject->Flags &= ~DO_DEVICE_INITIALIZING;
        return STATUS_SUCCESS;
    } while (FALSE);

    /* This is the failure path */
    ASSERT(!NT_SUCCESS(Status));

    /* Check if the FDO extension exists */
    if (FdoExtension) DPRINT1("Should destroy secondaries\n");

    /* Delete device objects */
    if (AttachedTo) IoDetachDevice(AttachedTo);
    if (DeviceObject) IoDeleteDevice(DeviceObject);
    return Status;
}

PciAreBusNumbersConfigured()

BOOLEAN NTAPI PciAreBusNumbersConfigured

(

IN PPCI_PDO_EXTENSION

PdoExtension

)

Definition at line 20 of file busno.c.

{
    UCHAR PrimaryBus, BaseBus, SecondaryBus, SubordinateBus;

    PAGED_CODE();

    /* Get all relevant bus number details */
    PrimaryBus = PdoExtension->Dependent.type1.PrimaryBus;
    BaseBus = PdoExtension->ParentFdoExtension->BaseBus;
    SecondaryBus = PdoExtension->Dependent.type1.SecondaryBus;
    SubordinateBus = PdoExtension->Dependent.type1.SubordinateBus;

    /* The primary bus should be the base bus of the parent */
    if ((PrimaryBus != BaseBus) || (SecondaryBus <= PrimaryBus)) return FALSE;

    /* The subordinate should be a higher bus number than the secondary */
    return SubordinateBus >= SecondaryBus;
}

Referenced by PciAddDevice().

PciBeginStateTransition()

NTSTATUS NTAPI PciBeginStateTransition	(	IN PPCI_FDO_EXTENSION	DeviceExtension,
		IN PCI_STATE	NewState
	)

Definition at line 97 of file state.c.

{
    PCI_STATE CurrentState;
    NTSTATUS Status;
    DPRINT1("PCI Request to begin transition of Extension %p to %s ->",
            DeviceExtension,
            PciTransitionText[NewState]);

    /* Assert the device isn't already in a pending transition */
    ASSERT(DeviceExtension->TentativeNextState == DeviceExtension->DeviceState);

    /* Assert this is a valid state */
    CurrentState = DeviceExtension->DeviceState;
    ASSERT(CurrentState < PciMaxObjectState);
    ASSERT(NewState < PciMaxObjectState);

    /* Lookup if this state transition is valid */
    Status = PnpStateTransitionArray[CurrentState + 6 * NewState];
    if (Status == STATUS_FAIL_CHECK)
    {
        /* Invalid transition (logical fault) */
        DPRINT1("ERROR\nPCI: Error trying to enter state \"%s\" "
                "from state \"%s\"\n",
                PciTransitionText[NewState],
                PciTransitionText[CurrentState]);
        DbgBreakPoint();
    }
    else if (Status == STATUS_INVALID_DEVICE_REQUEST)
    {
        /* Invalid transition (illegal request) */
        DPRINT1("ERROR\nPCI: Illegal request to try to enter state \"%s\" "
                "from state \"%s\", rejecting",
                PciTransitionText[NewState],
                PciTransitionText[CurrentState]);
    }

    /* New state must be different from current, unless request is at fault */
    ASSERT((NewState != DeviceExtension->DeviceState) || (!NT_SUCCESS(Status)));

    /* Enter the new state if successful, and return state status */
    if (NT_SUCCESS(Status)) DeviceExtension->TentativeNextState = NewState;
    DbgPrint("%x\n", Status);
    return Status;
}

Referenced by PciFdoIrpStartDevice(), PciPdoIrpStartDevice(), and PciQueryDeviceRelations().

PciBuildDefaultExclusionLists()

NTSTATUS NTAPI PciBuildDefaultExclusionLists

(

VOID

)

Definition at line 276 of file utils.c.

{
    ULONG Start;
    NTSTATUS Status;
    ASSERT(PciIsaBitExclusionList.Count == 0);
    ASSERT(PciVgaAndIsaBitExclusionList.Count == 0);

    /* Initialize the range lists */
    RtlInitializeRangeList(&PciIsaBitExclusionList);
    RtlInitializeRangeList(&PciVgaAndIsaBitExclusionList);

    /* Loop x86 I/O ranges */
    for (Start = 0x100; Start <= 0xFEFF; Start += 0x400)
    {
        /* Add the ISA I/O ranges */
        Status = RtlAddRange(&PciIsaBitExclusionList,
                             Start,
                             Start + 0x2FF,
                             0,
                             RTL_RANGE_LIST_ADD_IF_CONFLICT,
                             NULL,
                             NULL);
        if (!NT_SUCCESS(Status)) break;

        /* Add the ISA I/O ranges */
        Status = RtlAddRange(&PciVgaAndIsaBitExclusionList,
                             Start,
                             Start + 0x2AF,
                             0,
                             RTL_RANGE_LIST_ADD_IF_CONFLICT,
                             NULL,
                             NULL);
        if (!NT_SUCCESS(Status)) break;

        /* Add the VGA I/O range for Monochrome Video */
        Status = RtlAddRange(&PciVgaAndIsaBitExclusionList,
                             Start + 0x2BC,
                             Start + 0x2BF,
                             0,
                             RTL_RANGE_LIST_ADD_IF_CONFLICT,
                             NULL,
                             NULL);
        if (!NT_SUCCESS(Status)) break;

        /* Add the VGA I/O range for certain CGA adapters */
        Status = RtlAddRange(&PciVgaAndIsaBitExclusionList,
                             Start + 0x2E0,
                             Start + 0x2FF,
                             0,
                             RTL_RANGE_LIST_ADD_IF_CONFLICT,
                             NULL,
                             NULL);
        if (!NT_SUCCESS(Status)) break;

        /* Success, ranges added done */
    };

    RtlFreeRangeList(&PciIsaBitExclusionList);
    RtlFreeRangeList(&PciVgaAndIsaBitExclusionList);
    return Status;
}

Referenced by DriverEntry().

PciBuildRequirementsList()

NTSTATUS NTAPI PciBuildRequirementsList	(	IN PPCI_PDO_EXTENSION	PdoExtension,
		IN PPCI_COMMON_HEADER	PciData,
		OUT PIO_RESOURCE_REQUIREMENTS_LIST *	Buffer
	)

Definition at line 551 of file enum.c.

{
    PIO_RESOURCE_REQUIREMENTS_LIST RequirementsList;

    UNREFERENCED_PARAMETER(PdoExtension);
    UNREFERENCED_PARAMETER(PciData);

    {
        /* There aren't, so use the zero descriptor */
        RequirementsList = PciZeroIoResourceRequirements;

        /* Does it actually exist yet? */
        if (!PciZeroIoResourceRequirements)
        {
            /* Allocate it, and use it for future use */
            RequirementsList = PciAllocateIoRequirementsList(0, 0, 0);
            PciZeroIoResourceRequirements = RequirementsList;
            if (!PciZeroIoResourceRequirements) return STATUS_INSUFFICIENT_RESOURCES;
        }

        /* Return the zero requirements list to the caller */
        *Buffer = RequirementsList;
        DPRINT1("PCI - build resource reqs - early out, 0 resources\n");
        return STATUS_SUCCESS;
    }
    return STATUS_SUCCESS;
}

Referenced by PciAssignSlotResources(), and PciQueryRequirements().

PciCacheLegacyDeviceRouting()

NTSTATUS NTAPI PciCacheLegacyDeviceRouting	(	IN PDEVICE_OBJECT	DeviceObject,
		IN ULONG	BusNumber,
		IN ULONG	SlotNumber,
		IN UCHAR	InterruptLine,
		IN UCHAR	InterruptPin,
		IN UCHAR	BaseClass,
		IN UCHAR	SubClass,
		IN PDEVICE_OBJECT	PhysicalDeviceObject,
		IN PPCI_PDO_EXTENSION	PdoExtension,
		OUT PDEVICE_OBJECT *	pFoundDeviceObject
	)

Definition at line 70 of file routintf.c.

{
    PPCI_LEGACY_DEVICE *Link;
    PPCI_LEGACY_DEVICE LegacyDevice;
    PDEVICE_OBJECT FoundDeviceObject;
    PAGED_CODE();

    /* Scan current registered devices */
    LegacyDevice = PciLegacyDeviceHead;
    Link = &PciLegacyDeviceHead;
    while (LegacyDevice)
    {
        /* Find a match */
        if ((BusNumber == LegacyDevice->BusNumber) &&
            (SlotNumber == LegacyDevice->SlotNumber))
        {
            /* We already know about this routing */
            break;
        }

        /* We know about device already, but for a different location */
        if (LegacyDevice->DeviceObject == DeviceObject)
        {
            /* Free the existing structure, move to the next one */
            *Link = LegacyDevice->Next;
            ExFreePoolWithTag(LegacyDevice, 0);
            LegacyDevice = *Link;
        }
        else
        {
            /* Keep going */
            Link = &LegacyDevice->Next;
            LegacyDevice = LegacyDevice->Next;
        }
    }

    /* Did we find a match? */
    if (!LegacyDevice)
    {
        /* Allocate a new cache structure */
        LegacyDevice = ExAllocatePoolWithTag(PagedPool,
                                             sizeof(PCI_LEGACY_DEVICE),
                                             'PciR');
        if (!LegacyDevice) return STATUS_INSUFFICIENT_RESOURCES;

        /* Save all the data in it */
        RtlZeroMemory(LegacyDevice, sizeof(PCI_LEGACY_DEVICE));
        LegacyDevice->BusNumber = BusNumber;
        LegacyDevice->SlotNumber = SlotNumber;
        LegacyDevice->InterruptLine = InterruptLine;
        LegacyDevice->InterruptPin = InterruptPin;
        LegacyDevice->BaseClass = BaseClass;
        LegacyDevice->SubClass = SubClass;
        LegacyDevice->PhysicalDeviceObject = PhysicalDeviceObject;
        LegacyDevice->DeviceObject = DeviceObject;
        LegacyDevice->PdoExtension = PdoExtension;

        /* Link it in the list */
        LegacyDevice->Next = PciLegacyDeviceHead;
        PciLegacyDeviceHead = LegacyDevice;
    }

    /* Check if we found, or created, a matching caching structure */
    FoundDeviceObject = LegacyDevice->DeviceObject;
    if (FoundDeviceObject == DeviceObject)
    {
        /* Return the device object and success */
        if (pFoundDeviceObject) *pFoundDeviceObject = DeviceObject;
        return STATUS_SUCCESS;
    }

    /* Otherwise, this is a new device object for this location */
    LegacyDevice->DeviceObject = DeviceObject;
    if (pFoundDeviceObject) *pFoundDeviceObject = FoundDeviceObject;
    return STATUS_SUCCESS;
}

Referenced by PciAssignSlotResources().

PciCallDownIrpStack()

NTSTATUS NTAPI PciCallDownIrpStack	(	IN PPCI_FDO_EXTENSION	DeviceExtension,
		IN PIRP	Irp
	)

Definition at line 39 of file dispatch.c.

{
    NTSTATUS Status;
    KEVENT Event;
    PAGED_CODE();
    DPRINT1("PciCallDownIrpStack ...\n");
    ASSERT_FDO(DeviceExtension);

    /* Initialize the wait event */
    KeInitializeEvent(&Event, SynchronizationEvent, 0);

    /* Setup a completion routine */
    IoCopyCurrentIrpStackLocationToNext(Irp);
    IoSetCompletionRoutine(Irp, PciSetEventCompletion, &Event, TRUE, TRUE, TRUE);

    /* Call the attached device */
    Status = IoCallDriver(DeviceExtension->AttachedDeviceObject, Irp);
    if (Status == STATUS_PENDING)
    {
        /* Wait for it to complete the request, and get its status */
        KeWaitForSingleObject(&Event, Executive, KernelMode, FALSE, NULL);
        Status = Irp->IoStatus.Status;
    }

    /* Return that status back to the caller */
    return Status;
}

Referenced by PciDispatchIrp(), and PciFdoIrpQueryInterface().

PciCancelStateTransition()

NTSTATUS NTAPI PciCancelStateTransition	(	IN PPCI_FDO_EXTENSION	DeviceExtension,
		IN PCI_STATE	NewState
	)

Definition at line 145 of file state.c.

{
    NTSTATUS Status;
    DPRINT1("PCI Request to cancel transition of Extension %p to %s ->",
            DeviceExtension,
            PciTransitionText[StateNotEntered]);

    /* The next state can't be the state the device is already in */
    if (DeviceExtension->TentativeNextState == DeviceExtension->DeviceState)
    {
        /* It's too late since the state was already committed */
        ASSERT(StateNotEntered < PciMaxObjectState);
        ASSERT(PnpStateCancelArray[StateNotEntered] != STATUS_FAIL_CHECK);

        /* Return failure */
        Status = STATUS_INVALID_DEVICE_STATE;
        DbgPrint("%x\n", Status);
    }
    else
    {
        /* The device hasn't yet entered the state, so it's still possible to cancel */
        ASSERT(DeviceExtension->TentativeNextState == StateNotEntered);
        DeviceExtension->TentativeNextState = DeviceExtension->DeviceState;

        /* Return success */
        Status = STATUS_SUCCESS;
        DbgPrint("%x\n", Status);
    }

    /* Return the cancel state */
    return Status;
}

Referenced by PciFdoIrpStartDevice(), PciPdoIrpStartDevice(), and PciQueryDeviceRelations().

PciCanDisableDecodes()

BOOLEAN NTAPI PciCanDisableDecodes	(	IN PPCI_PDO_EXTENSION	DeviceExtension,
		IN PPCI_COMMON_HEADER	Config,
		IN ULONGLONG	HackFlags,
		IN BOOLEAN	ForPowerDown
	)

Definition at line 955 of file utils.c.

{
    UCHAR BaseClass, SubClass;
    BOOLEAN IsVga;

    /* Is there a device extension or should the PCI header be used? */
    if (DeviceExtension)
    {
        /* Never disable decodes for a debug PCI Device */
        if (DeviceExtension->OnDebugPath) return FALSE;

        /* Hack flags will be obtained from the extension, not the caller */
        ASSERT(HackFlags == 0);

        /* Get hacks and classification from the device extension */
        HackFlags = DeviceExtension->HackFlags;
        SubClass = DeviceExtension->SubClass;
        BaseClass = DeviceExtension->BaseClass;
    }
    else
    {
        /* There must be a PCI header, go read the classification information */
        ASSERT(Config != NULL);
        BaseClass = Config->BaseClass;
        SubClass = Config->SubClass;
    }

    /* Check for hack flags that prevent disabling the decodes */
    if (HackFlags & (PCI_HACK_PRESERVE_COMMAND |
                     PCI_HACK_CB_SHARE_CMD_BITS |
                     PCI_HACK_DONT_DISABLE_DECODES))
    {
        /* Don't do it */
        return FALSE;
    }

    /* Is this a VGA adapter? */
    if ((BaseClass == PCI_CLASS_DISPLAY_CTLR) &&
        (SubClass == PCI_SUBCLASS_VID_VGA_CTLR))
    {
        /* Never disable decodes if this is for power down */
        return ForPowerDown;
    }

    /* Check for legacy devices */
    if (BaseClass == PCI_CLASS_PRE_20)
    {
        /* Never disable video adapter cards if this is for power down */
        if (SubClass == PCI_SUBCLASS_PRE_20_VGA) return ForPowerDown;
    }
    else if (BaseClass == PCI_CLASS_DISPLAY_CTLR)
    {
        /* Never disable VGA adapters if this is for power down */
        if (SubClass == PCI_SUBCLASS_VID_VGA_CTLR) return ForPowerDown;
    }
    else if (BaseClass == PCI_CLASS_BRIDGE_DEV)
    {
        /* Check for legacy bridges */
        if ((SubClass == PCI_SUBCLASS_BR_ISA) ||
            (SubClass == PCI_SUBCLASS_BR_EISA) ||
            (SubClass == PCI_SUBCLASS_BR_MCA) ||
            (SubClass == PCI_SUBCLASS_BR_HOST) ||
            (SubClass == PCI_SUBCLASS_BR_OTHER))
        {
            /* Never disable these */
            return FALSE;
        }
        else if ((SubClass == PCI_SUBCLASS_BR_PCI_TO_PCI) ||
                 (SubClass == PCI_SUBCLASS_BR_CARDBUS))
        {
            /* This is a supported bridge, but does it have a VGA card? */
            if (!DeviceExtension)
            {
                /* Read the bridge control flag from the PCI header */
                IsVga = Config->u.type1.BridgeControl & PCI_ENABLE_BRIDGE_VGA;
            }
            else
            {
                /* Read the cached flag in the device extension */
                IsVga = DeviceExtension->Dependent.type1.VgaBitSet;
            }

            /* Never disable VGA adapters if this is for power down */
            if (IsVga) return ForPowerDown;
        }
    }

    /* Finally, never disable decodes if there's no power management */
    return !(HackFlags & PCI_HACK_NO_PM_CAPS);
}

Referenced by PciDecodeEnable(), and PciSetPowerManagedDevicePowerState().

pcicbintrf_Constructor()

NTSTATUS NTAPI pcicbintrf_Constructor	(	IN PVOID	DeviceExtension,
		IN PVOID	Instance,
		IN PVOID	InterfaceData,
		IN USHORT	Version,
		IN USHORT	Size,
		IN PINTERFACE	Interface
	)

Definition at line 109 of file cardbus.c.

{
    UNREFERENCED_PARAMETER(DeviceExtension);
    UNREFERENCED_PARAMETER(Instance);
    UNREFERENCED_PARAMETER(InterfaceData);
    UNREFERENCED_PARAMETER(Version);
    UNREFERENCED_PARAMETER(Size);
    UNREFERENCED_PARAMETER(Interface);

    /* Not yet implemented */
    UNIMPLEMENTED_DBGBREAK();
    return STATUS_NOT_IMPLEMENTED;
}

pcicbintrf_Initializer()

NTSTATUS NTAPI pcicbintrf_Initializer

(

IN PVOID

Instance

)

Definition at line 99 of file cardbus.c.

{
    UNREFERENCED_PARAMETER(Instance);
    /* PnP Interfaces don't get Initialized */
    ASSERTMSG("PCI pcicbintrf_Initializer, unexpected call.\n", FALSE);
    return STATUS_UNSUCCESSFUL;
}

PciClassifyDeviceType()

PCI_DEVICE_TYPES NTAPI PciClassifyDeviceType

(

IN PPCI_PDO_EXTENSION

PdoExtension

)

Definition at line 1051 of file utils.c.

{
    ASSERT(PdoExtension->ExtensionType == PciPdoExtensionType);

    /* Differentiate between devices and bridges */
    if (PdoExtension->BaseClass != PCI_CLASS_BRIDGE_DEV) return PciTypeDevice;

    /* The PCI Bus driver handles only CardBus and PCI bridges (plus host) */
    if (PdoExtension->SubClass == PCI_SUBCLASS_BR_HOST) return PciTypeHostBridge;
    if (PdoExtension->SubClass == PCI_SUBCLASS_BR_PCI_TO_PCI) return PciTypePciBridge;
    if (PdoExtension->SubClass == PCI_SUBCLASS_BR_CARDBUS) return PciTypeCardbusBridge;

    /* Any other kind of bridge is treated like a device */
    return PciTypeDevice;
}

Referenced by PciProcessBus().

PciCommitStateTransition()

VOID NTAPI PciCommitStateTransition	(	IN PPCI_FDO_EXTENSION	DeviceExtension,
		IN PCI_STATE	NewState
	)

Definition at line 181 of file state.c.

{
    DPRINT1("PCI Commit transition of Extension %p to %s\n",
            DeviceExtension, PciTransitionText[NewState]);

    /* Make sure this is a valid commit */
    ASSERT(NewState != PciSynchronizedOperation);
    ASSERT(DeviceExtension->TentativeNextState == NewState);

    /* Enter the new state */
    DeviceExtension->DeviceState = NewState;
}

Referenced by PciFdoIrpStartDevice(), and PciPdoIrpStartDevice().

PciComputeNewCurrentSettings()

BOOLEAN NTAPI PciComputeNewCurrentSettings	(	IN PPCI_PDO_EXTENSION	PdoExtension,
		IN PCM_RESOURCE_LIST	ResourceList
	)

Definition at line 55 of file enum.c.

{
    PCM_PARTIAL_RESOURCE_DESCRIPTOR Partial, InterruptResource;
    PCM_PARTIAL_RESOURCE_DESCRIPTOR BaseResource, CurrentDescriptor;
    PCM_PARTIAL_RESOURCE_DESCRIPTOR PreviousDescriptor;
    CM_PARTIAL_RESOURCE_DESCRIPTOR ResourceArray[7];
    PCM_FULL_RESOURCE_DESCRIPTOR FullList;
    BOOLEAN DrainPartial, RangeChange;
    ULONG i, j;
    PPCI_FUNCTION_RESOURCES PciResources;
    PAGED_CODE();

    /* Make sure we have either no resources, or at least one */
    ASSERT((ResourceList == NULL) || (ResourceList->Count == 1));

    /* Initialize no partial, interrupt descriptor, or range change */
    Partial = NULL;
    InterruptResource = NULL;
    RangeChange = FALSE;

    /* Check if there's not actually any resources */
    if (!(ResourceList) || !(ResourceList->Count))
    {
        /* Then just return the hardware update state */
        return PdoExtension->UpdateHardware;
    }

    /* Print the new specified resource list */
    PciDebugPrintCmResList(ResourceList);

    /* Clear the temporary resource array */
    for (i = 0; i < 7; i++) ResourceArray[i].Type = CmResourceTypeNull;

    /* Loop the full resource descriptor */
    FullList = ResourceList->List;
    for (i = 0; i < ResourceList->Count; i++)
    {
        /* Initialize loop variables */
        DrainPartial = FALSE;
        BaseResource = NULL;

        /* Loop the partial descriptors */
        Partial = FullList->PartialResourceList.PartialDescriptors;
        for (j = 0; j < FullList->PartialResourceList.Count; j++)
        {
            /* Check if we were supposed to drain a partial due to device data */
            if (DrainPartial)
            {
                /* Draining complete, move on to the next descriptor then */
                DrainPartial--;
                continue;
            }

            /* Check what kind of descriptor this was */
            switch (Partial->Type)
            {
                /* Base BAR resources */
                case CmResourceTypePort:
                case CmResourceTypeMemory:

                    /* Set it as the base */
                    ASSERT(BaseResource == NULL);
                    BaseResource = Partial;
                    break;

                /* Interrupt resource */
                case CmResourceTypeInterrupt:

                    /* Make sure it's a compatible (and the only) PCI interrupt */
                    ASSERT(InterruptResource == NULL);
                    ASSERT(Partial->u.Interrupt.Level == Partial->u.Interrupt.Vector);
                    InterruptResource = Partial;

                    /* Only 255 interrupts on x86/x64 hardware */
                    if (Partial->u.Interrupt.Level < 256)
                    {
                        /* Use the passed interrupt line */
                        PdoExtension->AdjustedInterruptLine = Partial->u.Interrupt.Level;
                    }
                    else
                    {
                        /* Invalid vector, so ignore it */
                        PdoExtension->AdjustedInterruptLine = 0;
                    }

                    break;

                /* Check for specific device data */
                case CmResourceTypeDevicePrivate:

                    /* Check what kind of data this was */
                    switch (Partial->u.DevicePrivate.Data[0])
                    {
                        /* Not used in the driver yet */
                        case 1:
                            UNIMPLEMENTED_DBGBREAK();
                            break;

                        /* Not used in the driver yet */
                        case 2:
                            UNIMPLEMENTED_DBGBREAK();
                            break;

                        /* A drain request */
                        case 3:
                            /* Shouldn't be a base resource, this is a drain */
                            ASSERT(BaseResource == NULL);
                            DrainPartial = Partial->u.DevicePrivate.Data[1];
                            ASSERT(DrainPartial == TRUE);
                            break;
                    }
                    break;
            }

            /* Move to the next descriptor */
            Partial = PciNextPartialDescriptor(Partial);
        }

        /* We should be starting a new list now */
        ASSERT(BaseResource == NULL);
        FullList = (PVOID)Partial;
    }

    /* Check the current assigned PCI resources */
    PciResources = PdoExtension->Resources;
    if (!PciResources) return FALSE;

    //if... // MISSING CODE
    UNIMPLEMENTED;
    DPRINT1("Missing sanity checking code!\n");

    /* Loop all the PCI function resources */
    for (i = 0; i < 7; i++)
    {
        /* Get the current function resource descriptor, and the new one */
        CurrentDescriptor = &PciResources->Current[i];
        Partial = &ResourceArray[i];

        /* Previous is current during the first loop iteration */
        PreviousDescriptor = &PciResources->Current[(i == 0) ? (0) : (i - 1)];

        /* Check if this new descriptor is different than the old one */
        if (((Partial->Type != CurrentDescriptor->Type) ||
             (Partial->Type != CmResourceTypeNull)) &&
            ((Partial->u.Generic.Start.QuadPart !=
              CurrentDescriptor->u.Generic.Start.QuadPart) ||
             (Partial->u.Generic.Length != CurrentDescriptor->u.Generic.Length)))
        {
            /* Record a change */
            RangeChange = TRUE;

            /* Was there a range before? */
            if (CurrentDescriptor->Type != CmResourceTypeNull)
            {
                /* Print it */
                DbgPrint("      Old range-\n");
                PciDebugPrintPartialResource(CurrentDescriptor);
            }
            else
            {
                /* There was no range */
                DbgPrint("      Previously unset range\n");
            }

            /* Print new one */
            DbgPrint("      changed to\n");
            PciDebugPrintPartialResource(Partial);

            /* Update to new range */
            CurrentDescriptor->Type = Partial->Type;
            PreviousDescriptor->u.Generic.Start = Partial->u.Generic.Start;
            PreviousDescriptor->u.Generic.Length = Partial->u.Generic.Length;
            CurrentDescriptor = PreviousDescriptor;
        }
    }

    /* Either the hardware was updated, or a resource range changed */
    return ((RangeChange) || (PdoExtension->UpdateHardware));
}

Referenced by PciAssignSlotResources(), and PciPdoIrpStartDevice().

PciCreateIoDescriptorFromBarLimit()

BOOLEAN NTAPI PciCreateIoDescriptorFromBarLimit	(	PIO_RESOURCE_DESCRIPTOR	ResourceDescriptor,
		IN PULONG	BarArray,
		IN BOOLEAN	Rom
	)

Definition at line 1175 of file utils.c.

{
    ULONG CurrentBar, BarLength, BarMask;
    BOOLEAN Is64BitBar = FALSE;

    /* Check if the BAR is nor I/O nor memory */
    CurrentBar = BarArray[0];
    if (!(CurrentBar & ~PCI_ADDRESS_IO_SPACE))
    {
        /* Fail this descriptor */
        ResourceDescriptor->Type = CmResourceTypeNull;
        return FALSE;
    }

    /* Set default flag and clear high words */
    ResourceDescriptor->Flags = 0;
    ResourceDescriptor->u.Generic.MaximumAddress.HighPart = 0;
    ResourceDescriptor->u.Generic.MinimumAddress.LowPart = 0;
    ResourceDescriptor->u.Generic.MinimumAddress.HighPart = 0;

    /* Check for ROM Address */
    if (Rom)
    {
        /* Clean up the BAR to get just the address */
        CurrentBar &= PCI_ADDRESS_ROM_ADDRESS_MASK;
        if (!CurrentBar)
        {
            /* Invalid ar, fail this descriptor */
            ResourceDescriptor->Type = CmResourceTypeNull;
            return FALSE;
        }

        /* ROM Addresses are always read only */
        ResourceDescriptor->Flags = CM_RESOURCE_MEMORY_READ_ONLY;
    }

    /* Compute the length, assume it's the alignment for now */
    BarLength = PciGetLengthFromBar(CurrentBar);
    ResourceDescriptor->u.Generic.Length = BarLength;
    ResourceDescriptor->u.Generic.Alignment = BarLength;

    /* Check what kind of BAR this is */
    if (CurrentBar & PCI_ADDRESS_IO_SPACE)
    {
        /* Use correct mask to decode the address */
        BarMask = PCI_ADDRESS_IO_ADDRESS_MASK;

        /* Set this as an I/O Port descriptor */
        ResourceDescriptor->Type = CmResourceTypePort;
        ResourceDescriptor->Flags = CM_RESOURCE_PORT_IO;
    }
    else
    {
        /* Use correct mask to decode the address */
        BarMask = PCI_ADDRESS_MEMORY_ADDRESS_MASK;

        /* Set this as a memory descriptor */
        ResourceDescriptor->Type = CmResourceTypeMemory;

        /* Check if it's 64-bit or 20-bit decode */
        if ((CurrentBar & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_64BIT)
        {
            /* The next BAR has the high word, read it */
            ResourceDescriptor->u.Port.MaximumAddress.HighPart = BarArray[1];
            Is64BitBar = TRUE;
        }
        else if ((CurrentBar & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_20BIT)
        {
            /* Use the correct mask to decode the address */
            BarMask = ~0xFFF0000F;
        }

        /* Check if the BAR is listed as prefetchable memory */
        if (CurrentBar & PCI_ADDRESS_MEMORY_PREFETCHABLE)
        {
            /* Mark the descriptor in the same way */
            ResourceDescriptor->Flags |= CM_RESOURCE_MEMORY_PREFETCHABLE;
        }
    }

    /* Now write down the maximum address based on the base + length */
    ResourceDescriptor->u.Port.MaximumAddress.QuadPart = (CurrentBar & BarMask) +
                                                         BarLength - 1;

    /* Return if this is a 64-bit BAR, so the loop code knows to skip the next one */
    return Is64BitBar;
}

Referenced by Device_SaveLimits(), and PPBridge_SaveLimits().

PciDebugDumpCommonConfig()

VOID NTAPI PciDebugDumpCommonConfig

(

IN PPCI_COMMON_HEADER

PciData

)

Definition at line 207 of file debug.c.

{
    USHORT i;

    /* Loop the PCI header */
    for (i = 0; i < PCI_COMMON_HDR_LENGTH; i += 4)
    {
        /* Dump each DWORD and its offset */
        DPRINT1("  %02x - %08x\n", i, *(PULONG)((ULONG_PTR)PciData + i));
    }
}

Referenced by PcipGetFunctionLimits(), and PciScanBus().

PciDebugDumpQueryCapabilities()

VOID NTAPI PciDebugDumpQueryCapabilities

(

IN PDEVICE_CAPABILITIES

DeviceCaps

)

Definition at line 221 of file debug.c.

{
    ULONG i;

    /* Dump the capabilities */
    DPRINT1("Capabilities\n  Lock:%u, Eject:%u, Remove:%u, Dock:%u, UniqueId:%u\n",
            DeviceCaps->LockSupported,
            DeviceCaps->EjectSupported,
            DeviceCaps->Removable,
            DeviceCaps->DockDevice,
            DeviceCaps->UniqueID);
    DbgPrint("  SilentInstall:%u, RawOk:%u, SurpriseOk:%u\n",
             DeviceCaps->SilentInstall,
             DeviceCaps->RawDeviceOK,
             DeviceCaps->SurpriseRemovalOK);
    DbgPrint("  Address %08x, UINumber %08x, Latencies D1 %u, D2 %u, D3 %u\n",
             DeviceCaps->Address,
             DeviceCaps->UINumber,
             DeviceCaps->D1Latency,
             DeviceCaps->D2Latency,
             DeviceCaps->D3Latency);

    /* Dump and convert the wake levels */
    DbgPrint("  System Wake: %s, Device Wake: %s\n  DeviceState[PowerState] [",
             SystemPowerStates[min(DeviceCaps->SystemWake, PowerSystemMaximum)],
             DevicePowerStates[min(DeviceCaps->DeviceWake, PowerDeviceMaximum)]);

    /* Dump and convert the power state mappings */
    for (i = PowerSystemWorking; i < PowerSystemMaximum; i++)
        DbgPrint(" %s", DevicePowerStates[DeviceCaps->DeviceState[i]]);

    /* Finish the dump */
    DbgPrint(" ]\n");
}

Referenced by PciFdoIrpQueryCapabilities(), and PciQueryCapabilities().

PciDebugIrpDispatchDisplay()

BOOLEAN NTAPI PciDebugIrpDispatchDisplay	(	IN PIO_STACK_LOCATION	IoStackLocation,
		IN PPCI_FDO_EXTENSION	DeviceExtension,
		IN USHORT	MaxMinor
	)

Definition at line 124 of file debug.c.

{
    PPCI_PDO_EXTENSION PdoDeviceExtension;
    ULONG BreakMask;
    //ULONG DebugLevel = 0;
    PCHAR IrpString;

    /* Only two functions are recognized */
    switch (IoStackLocation->MajorFunction)
    {
        case IRP_MJ_POWER:

            /* Get the string and the correct break mask for the extension */
            BreakMask = (DeviceExtension->ExtensionType == PciPdoExtensionType) ?
                         PciBreakOnPdoPowerIrp : PciBreakOnFdoPowerIrp;
            IrpString = PciDebugPoIrpTypeToText(IoStackLocation->MinorFunction);
            break;

        case IRP_MJ_PNP:

            /* Get the string and the correct break mask for the extension */
            BreakMask = (DeviceExtension->ExtensionType == PciFdoExtensionType) ?
                         PciBreakOnPdoPnpIrp : PciBreakOnFdoPnpIrp;
            IrpString = PciDebugPnpIrpTypeToText(IoStackLocation->MinorFunction);
            break;

        default:

            /* Other functions are not decoded */
            BreakMask = FALSE;
            IrpString = "";
            break;
    }

    /* Check if this is a PDO */
    if (DeviceExtension->ExtensionType == PciPdoExtensionType)
    {
        /* Choose the correct debug level based on which function this is */
        if (IoStackLocation->MajorFunction == IRP_MJ_POWER)
        {
            //DebugLevel = 0x500;
        }
        else if (IoStackLocation->MajorFunction == IRP_MJ_PNP)
        {
            //DebugLevel = 0x200;
        }

        /* For a PDO, print out the bus, device, and function number */
        PdoDeviceExtension = (PVOID)DeviceExtension;
        DPRINT1("PDO(b=0x%x, d=0x%x, f=0x%x)<-%s\n",
                PdoDeviceExtension->ParentFdoExtension->BaseBus,
                PdoDeviceExtension->Slot.u.bits.DeviceNumber,
                PdoDeviceExtension->Slot.u.bits.FunctionNumber,
                IrpString);
    }
    else if (DeviceExtension->ExtensionType == PciFdoExtensionType)
    {
        /* Choose the correct debug level based on which function this is */
        if (IoStackLocation->MajorFunction == IRP_MJ_POWER)
        {
            //DebugLevel = 0x400;
        }
        else if (IoStackLocation->MajorFunction == IRP_MJ_PNP)
        {
            //DebugLevel = 0x100;
        }

        /* For an FDO, just dump the extension pointer and IRP string */
        DPRINT1("FDO(%p)<-%s\n", DeviceExtension, IrpString);
    }

    /* If the function is illegal for this extension, complain */
    if (IoStackLocation->MinorFunction > MaxMinor)
        DPRINT1("Unknown IRP, minor = 0x%x\n", IoStackLocation->MinorFunction);

    /* Return whether or not the debugger should be broken into for this IRP */
    return ((1 << IoStackLocation->MinorFunction) & BreakMask);
}