ReactOS 0.4.15-dev-7788-g1ad9096
pci.h File Reference
#include <ntifs.h>
#include <wdmguid.h>
#include <wchar.h>
#include <acpiioct.h>
#include <drivers/pci/pci.h>
#include <drivers/acpi/acpi.h>
#include <ndk/halfuncs.h>
#include <ndk/rtlfuncs.h>
#include <ndk/vffuncs.h>
#include <arbiter.h>
#include <cmreslist.h>
Include dependency graph for pci.h:
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Go to the source code of this file.

Classes

struct  _PCI_HACK_ENTRY
 
struct  _PCI_POWER_STATE
 
struct  _PCI_LOCK
 
struct  _PCI_FDO_EXTENSION
 
struct  _PCI_FUNCTION_RESOURCES
 
union  _PCI_HEADER_TYPE_DEPENDENT
 
struct  _PCI_PDO_EXTENSION
 
struct  _PCI_MN_DISPATCH_TABLE
 
struct  _PCI_MJ_DISPATCH_TABLE
 
struct  _PCI_INTERFACE
 
struct  PCI_SECONDARY_EXTENSION
 
struct  PCI_ARBITER_INSTANCE
 
struct  _PCI_VERIFIER_DATA
 
struct  _PCI_ID_BUFFER
 
struct  _PCI_CONFIGURATOR
 
struct  _PCI_CONFIGURATOR_CONTEXT
 
struct  _PCI_IPI_CONTEXT
 
struct  _PCI_LEGACY_DEVICE
 

Macros

#define PCI_POOL_TAG   'BicP'
 
#define PCI_IS_ROOT_FDO(x)   ((x)->BusRootFdoExtension == x)
 
#define ASSERT_FDO(x)   ASSERT((x)->ExtensionType == PciFdoExtensionType);
 
#define ASSERT_PDO(x)   ASSERT((x)->ExtensionType == PciPdoExtensionType);
 
#define PCI_HACK_ENTRY_SIZE   sizeof(L"VVVVdddd") - sizeof(UNICODE_NULL)
 
#define PCI_HACK_ENTRY_REV_SIZE   sizeof(L"VVVVddddRR") - sizeof(UNICODE_NULL)
 
#define PCI_HACK_ENTRY_SUBSYS_SIZE   sizeof(L"VVVVddddssssIIII") - sizeof(UNICODE_NULL)
 
#define PCI_HACK_ENTRY_FULL_SIZE   sizeof(L"VVVVddddssssIIIIRR") - sizeof(UNICODE_NULL)
 
#define PCI_HACK_HAS_REVISION_INFO   0x01
 
#define PCI_HACK_HAS_SUBSYSTEM_INFO   0x02
 
#define PCI_INTERFACE_PDO   0x01
 
#define PCI_INTERFACE_FDO   0x02
 
#define PCI_INTERFACE_ROOT   0x04
 
#define PCI_SKIP_DEVICE_ENUMERATION   0x01
 
#define PCI_SKIP_RESOURCE_ENUMERATION   0x02
 
#define PCI_HACK_FIXUP_BEFORE_CONFIGURATION   0x00
 
#define PCI_HACK_FIXUP_AFTER_CONFIGURATION   0x01
 
#define PCI_HACK_FIXUP_BEFORE_UPDATE   0x03
 
#define MAX_DEBUGGING_DEVICES_SUPPORTED   0x04
 
#define PCI_VERIFIER_CODES   0x04
 
#define MAX_ANSI_STRINGS   0x08
 

Typedefs

typedef enum _PCI_SIGNATURE PCI_SIGNATURE
 
typedef enum _PCI_SIGNATUREPPCI_SIGNATURE
 
typedef enum _PCI_DEVICE_TYPES PCI_DEVICE_TYPES
 
typedef enum _PCI_STATE PCI_STATE
 
typedef enum _PCI_DISPATCH_STYLE PCI_DISPATCH_STYLE
 
typedef struct _PCI_HACK_ENTRY PCI_HACK_ENTRY
 
typedef struct _PCI_HACK_ENTRYPPCI_HACK_ENTRY
 
typedef struct _PCI_POWER_STATE PCI_POWER_STATE
 
typedef struct _PCI_POWER_STATEPPCI_POWER_STATE
 
typedef struct _PCI_LOCK PCI_LOCK
 
typedef struct _PCI_LOCKPPCI_LOCK
 
typedef struct _PCI_FDO_EXTENSION PCI_FDO_EXTENSION
 
typedef struct _PCI_FDO_EXTENSIONPPCI_FDO_EXTENSION
 
typedef struct _PCI_FUNCTION_RESOURCES PCI_FUNCTION_RESOURCES
 
typedef struct _PCI_FUNCTION_RESOURCESPPCI_FUNCTION_RESOURCES
 
typedef union _PCI_HEADER_TYPE_DEPENDENT PCI_HEADER_TYPE_DEPENDENT
 
typedef union _PCI_HEADER_TYPE_DEPENDENTPPCI_HEADER_TYPE_DEPENDENT
 
typedef struct _PCI_PDO_EXTENSION PCI_PDO_EXTENSION
 
typedef struct _PCI_PDO_EXTENSIONPPCI_PDO_EXTENSION
 
typedef NTSTATUS(NTAPIPCI_DISPATCH_FUNCTION) (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PVOID DeviceExtension)
 
typedef struct _PCI_MN_DISPATCH_TABLE PCI_MN_DISPATCH_TABLE
 
typedef struct _PCI_MN_DISPATCH_TABLEPPCI_MN_DISPATCH_TABLE
 
typedef struct _PCI_MJ_DISPATCH_TABLE PCI_MJ_DISPATCH_TABLE
 
typedef struct _PCI_MJ_DISPATCH_TABLEPPCI_MJ_DISPATCH_TABLE
 
typedef NTSTATUS(NTAPIPCI_INTERFACE_CONSTRUCTOR) (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
typedef NTSTATUS(NTAPIPCI_INTERFACE_INITIALIZER) (IN PVOID Instance)
 
typedef struct _PCI_INTERFACE PCI_INTERFACE
 
typedef struct _PCI_INTERFACEPPCI_INTERFACE
 
typedef struct PCI_SECONDARY_EXTENSION PCI_SECONDARY_EXTENSION
 
typedef struct PCI_SECONDARY_EXTENSIONPPCI_SECONDARY_EXTENSION
 
typedef struct PCI_ARBITER_INSTANCE PCI_ARBITER_INSTANCE
 
typedef struct PCI_ARBITER_INSTANCEPPCI_ARBITER_INSTANCE
 
typedef struct _PCI_VERIFIER_DATA PCI_VERIFIER_DATA
 
typedef struct _PCI_VERIFIER_DATAPPCI_VERIFIER_DATA
 
typedef struct _PCI_ID_BUFFER PCI_ID_BUFFER
 
typedef struct _PCI_ID_BUFFERPPCI_ID_BUFFER
 
typedef VOID(NTAPIPCI_CONFIGURATOR_INITIALIZE) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)
 
typedef VOID(NTAPIPCI_CONFIGURATOR_RESTORE_CURRENT) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)
 
typedef VOID(NTAPIPCI_CONFIGURATOR_SAVE_LIMITS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)
 
typedef VOID(NTAPIPCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)
 
typedef VOID(NTAPIPCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS) (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
typedef VOID(NTAPIPCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)
 
typedef VOID(NTAPIPCI_CONFIGURATOR_RESET_DEVICE) (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
typedef struct _PCI_CONFIGURATOR PCI_CONFIGURATOR
 
typedef struct _PCI_CONFIGURATORPPCI_CONFIGURATOR
 
typedef struct _PCI_CONFIGURATOR_CONTEXT PCI_CONFIGURATOR_CONTEXT
 
typedef struct _PCI_CONFIGURATOR_CONTEXTPPCI_CONFIGURATOR_CONTEXT
 
typedef VOID(NTAPIPCI_IPI_FUNCTION) (IN PVOID Reserved, IN PVOID Context)
 
typedef struct _PCI_IPI_CONTEXT PCI_IPI_CONTEXT
 
typedef struct _PCI_IPI_CONTEXTPPCI_IPI_CONTEXT
 
typedef struct _PCI_LEGACY_DEVICE PCI_LEGACY_DEVICE
 
typedef struct _PCI_LEGACY_DEVICEPPCI_LEGACY_DEVICE
 

Enumerations

enum  _PCI_SIGNATURE {
  PciPdoExtensionType = 'icP0' , PciFdoExtensionType = 'icP1' , PciArb_Io = 'icP2' , PciArb_Memory = 'icP3' ,
  PciArb_Interrupt = 'icP4' , PciArb_BusNumber = 'icP5' , PciTrans_Interrupt = 'icP6' , PciInterface_BusHandler = 'icP7' ,
  PciInterface_IntRouteHandler = 'icP8' , PciInterface_PciCb = 'icP9' , PciInterface_LegacyDeviceDetection = 'icP:' , PciInterface_PmeHandler = 'icP;' ,
  PciInterface_DevicePresent = 'icP<' , PciInterface_NativeIde = 'icP=' , PciInterface_AgpTarget = 'icP>' , PciInterface_Location = 'icP?'
}
 
enum  _PCI_DEVICE_TYPES {
  PciTypeInvalid , PciTypeHostBridge , PciTypePciBridge , PciTypeCardbusBridge ,
  PciTypeDevice
}
 
enum  _PCI_STATE {
  PciNotStarted , PciStarted , PciDeleted , PciStopped ,
  PciSurpriseRemoved , PciSynchronizedOperation , PciMaxObjectState
}
 
enum  _PCI_DISPATCH_STYLE { IRP_COMPLETE , IRP_DOWNWARD , IRP_UPWARD , IRP_DISPATCH }
 

Functions

NTSTATUS NTAPI PciDispatchIrp (IN PDEVICE_OBJECT DeviceObject, IN PIRP Irp)
 
NTSTATUS NTAPI PciIrpNotSupported (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPassIrpFromFdoToPdo (IN PPCI_FDO_EXTENSION DeviceExtension, IN PIRP Irp)
 
NTSTATUS NTAPI PciCallDownIrpStack (IN PPCI_FDO_EXTENSION DeviceExtension, IN PIRP Irp)
 
NTSTATUS NTAPI PciIrpInvalidDeviceRequest (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoWaitWake (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoSetPowerState (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryPower (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciSetPowerManagedDevicePowerState (IN PPCI_PDO_EXTENSION DeviceExtension, IN DEVICE_POWER_STATE DeviceState, IN BOOLEAN IrpSet)
 
NTSTATUS NTAPI PciAddDevice (IN PDRIVER_OBJECT DriverObject, IN PDEVICE_OBJECT PhysicalDeviceObject)
 
NTSTATUS NTAPI PciFdoIrpStartDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpCancelRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpCancelStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryDeviceRelations (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryInterface (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryCapabilities (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpDeviceUsageNotification (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpSurpriseRemoval (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciFdoIrpQueryLegacyBusInformation (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoCreate (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_SLOT_NUMBER Slot, OUT PDEVICE_OBJECT *PdoDeviceObject)
 
NTSTATUS NTAPI PciPdoWaitWake (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoSetPowerState (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryPower (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpStartDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpCancelRemoveDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpCancelStopDevice (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryDeviceRelations (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryInterface (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryCapabilities (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryResources (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryResourceRequirements (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryDeviceText (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpReadConfig (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpWriteConfig (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryId (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryDeviceState (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryBusInformation (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpDeviceUsageNotification (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpSurpriseRemoval (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciPdoIrpQueryLegacyBusInformation (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_PDO_EXTENSION DeviceExtension)
 
VOID NTAPI PciHookHal (VOID)
 
VOID NTAPI PciVerifierInit (IN PDRIVER_OBJECT DriverObject)
 
PPCI_VERIFIER_DATA NTAPI PciVerifierRetrieveFailureData (IN ULONG FailureCode)
 
BOOLEAN NTAPI PciStringToUSHORT (IN PWCHAR String, OUT PUSHORT Value)
 
BOOLEAN NTAPI PciIsDatacenter (VOID)
 
NTSTATUS NTAPI PciBuildDefaultExclusionLists (VOID)
 
BOOLEAN NTAPI PciUnicodeStringStrStr (IN PUNICODE_STRING InputString, IN PCUNICODE_STRING EqualString, IN BOOLEAN CaseInSensitive)
 
BOOLEAN NTAPI PciOpenKey (IN PWCHAR KeyName, IN HANDLE RootKey, IN ACCESS_MASK DesiredAccess, OUT PHANDLE KeyHandle, OUT PNTSTATUS KeyStatus)
 
NTSTATUS NTAPI PciGetRegistryValue (IN PWCHAR ValueName, IN PWCHAR KeyName, IN HANDLE RootHandle, IN ULONG Type, OUT PVOID *OutputBuffer, OUT PULONG OutputLength)
 
PPCI_FDO_EXTENSION NTAPI PciFindParentPciFdoExtension (IN PDEVICE_OBJECT DeviceObject, IN PKEVENT Lock)
 
VOID NTAPI PciInsertEntryAtTail (IN PSINGLE_LIST_ENTRY ListHead, IN PPCI_FDO_EXTENSION DeviceExtension, IN PKEVENT Lock)
 
NTSTATUS NTAPI PciGetDeviceProperty (IN PDEVICE_OBJECT DeviceObject, IN DEVICE_REGISTRY_PROPERTY DeviceProperty, OUT PVOID *OutputBuffer)
 
NTSTATUS NTAPI PciSendIoctl (IN PDEVICE_OBJECT DeviceObject, IN ULONG IoControlCode, IN PVOID InputBuffer, IN ULONG InputBufferLength, IN PVOID OutputBuffer, IN ULONG OutputBufferLength)
 
VOID NTAPI PcipLinkSecondaryExtension (IN PSINGLE_LIST_ENTRY List, IN PVOID Lock, IN PPCI_SECONDARY_EXTENSION SecondaryExtension, IN PCI_SIGNATURE ExtensionType, IN PVOID Destructor)
 
PPCI_SECONDARY_EXTENSION NTAPI PciFindNextSecondaryExtension (IN PSINGLE_LIST_ENTRY ListHead, IN PCI_SIGNATURE ExtensionType)
 
ULONGLONG NTAPI PciGetHackFlags (IN USHORT VendorId, IN USHORT DeviceId, IN USHORT SubVendorId, IN USHORT SubSystemId, IN UCHAR RevisionId)
 
PPCI_PDO_EXTENSION NTAPI PciFindPdoByFunction (IN PPCI_FDO_EXTENSION DeviceExtension, IN ULONG FunctionNumber, IN PPCI_COMMON_HEADER PciData)
 
BOOLEAN NTAPI PciIsCriticalDeviceClass (IN UCHAR BaseClass, IN UCHAR SubClass)
 
BOOLEAN NTAPI PciIsDeviceOnDebugPath (IN PPCI_PDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciGetBiosConfig (IN PPCI_PDO_EXTENSION DeviceExtension, OUT PPCI_COMMON_HEADER PciData)
 
NTSTATUS NTAPI PciSaveBiosConfig (IN PPCI_PDO_EXTENSION DeviceExtension, OUT PPCI_COMMON_HEADER PciData)
 
UCHAR NTAPI PciReadDeviceCapability (IN PPCI_PDO_EXTENSION DeviceExtension, IN UCHAR Offset, IN ULONG CapabilityId, OUT PPCI_CAPABILITIES_HEADER Buffer, IN ULONG Length)
 
BOOLEAN NTAPI PciCanDisableDecodes (IN PPCI_PDO_EXTENSION DeviceExtension, IN PPCI_COMMON_HEADER Config, IN ULONGLONG HackFlags, IN BOOLEAN ForPowerDown)
 
PCI_DEVICE_TYPES NTAPI PciClassifyDeviceType (IN PPCI_PDO_EXTENSION PdoExtension)
 
ULONG_PTR NTAPI PciExecuteCriticalSystemRoutine (IN ULONG_PTR IpiContext)
 
BOOLEAN NTAPI PciCreateIoDescriptorFromBarLimit (PIO_RESOURCE_DESCRIPTOR ResourceDescriptor, IN PULONG BarArray, IN BOOLEAN Rom)
 
BOOLEAN NTAPI PciIsSlotPresentInParentMethod (IN PPCI_PDO_EXTENSION PdoExtension, IN ULONG Method)
 
VOID NTAPI PciDecodeEnable (IN PPCI_PDO_EXTENSION PdoExtension, IN BOOLEAN Enable, OUT PUSHORT Command)
 
NTSTATUS NTAPI PciQueryBusInformation (IN PPCI_PDO_EXTENSION PdoExtension, IN PPNP_BUS_INFORMATION *Buffer)
 
NTSTATUS NTAPI PciQueryCapabilities (IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PDEVICE_CAPABILITIES DeviceCapability)
 
NTSTATUS NTAPI PciGetConfigHandlers (IN PPCI_FDO_EXTENSION FdoExtension)
 
VOID NTAPI PciReadSlotConfig (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
 
VOID NTAPI PciWriteDeviceConfig (IN PPCI_PDO_EXTENSION DeviceExtension, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
 
VOID NTAPI PciReadDeviceConfig (IN PPCI_PDO_EXTENSION DeviceExtension, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
 
UCHAR NTAPI PciGetAdjustedInterruptLine (IN PPCI_PDO_EXTENSION PdoExtension)
 
VOID NTAPI PciInitializeState (IN PPCI_FDO_EXTENSION DeviceExtension)
 
NTSTATUS NTAPI PciBeginStateTransition (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
 
NTSTATUS NTAPI PciCancelStateTransition (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
 
VOID NTAPI PciCommitStateTransition (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
 
NTSTATUS NTAPI PciInitializeArbiters (IN PPCI_FDO_EXTENSION FdoExtension)
 
NTSTATUS NTAPI PciInitializeArbiterRanges (IN PPCI_FDO_EXTENSION DeviceExtension, IN PCM_RESOURCE_LIST Resources)
 
BOOLEAN NTAPI PciDebugIrpDispatchDisplay (IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension, IN USHORT MaxMinor)
 
VOID NTAPI PciDebugDumpCommonConfig (IN PPCI_COMMON_HEADER PciData)
 
VOID NTAPI PciDebugDumpQueryCapabilities (IN PDEVICE_CAPABILITIES DeviceCaps)
 
VOID NTAPI PciDebugPrintIoResReqList (IN PIO_RESOURCE_REQUIREMENTS_LIST Requirements)
 
VOID NTAPI PciDebugPrintCmResList (IN PCM_RESOURCE_LIST ResourceList)
 
VOID NTAPI PciDebugPrintPartialResource (IN PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialResource)
 
NTSTATUS NTAPI PciQueryInterface (IN PPCI_FDO_EXTENSION DeviceExtension, IN CONST GUID *InterfaceType, IN ULONG Size, IN ULONG Version, IN PVOID InterfaceData, IN PINTERFACE Interface, IN BOOLEAN LastChance)
 
NTSTATUS NTAPI PciPmeInterfaceInitializer (IN PVOID Instance)
 
NTSTATUS NTAPI routeintrf_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI arbusno_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI agpintrf_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI tranirq_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI busintrf_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI armem_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI ario_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI locintrf_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI pcicbintrf_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI lddintrf_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI devpresent_Initializer (IN PVOID Instance)
 
NTSTATUS NTAPI agpintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI arbusno_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI tranirq_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI armem_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI busintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI ario_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
VOID NTAPI ario_ApplyBrokenVideoHack (IN PPCI_FDO_EXTENSION FdoExtension)
 
NTSTATUS NTAPI pcicbintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI lddintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI locintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI PciPmeInterfaceConstructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI routeintrf_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI devpresent_Constructor (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)
 
NTSTATUS NTAPI PciQueryDeviceRelations (IN PPCI_FDO_EXTENSION DeviceExtension, IN OUT PDEVICE_RELATIONS *pDeviceRelations)
 
NTSTATUS NTAPI PciQueryResources (IN PPCI_PDO_EXTENSION PdoExtension, OUT PCM_RESOURCE_LIST *Buffer)
 
NTSTATUS NTAPI PciQueryTargetDeviceRelations (IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PDEVICE_RELATIONS *pDeviceRelations)
 
NTSTATUS NTAPI PciQueryEjectionRelations (IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PDEVICE_RELATIONS *pDeviceRelations)
 
NTSTATUS NTAPI PciQueryRequirements (IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *RequirementsList)
 
BOOLEAN NTAPI PciComputeNewCurrentSettings (IN PPCI_PDO_EXTENSION PdoExtension, IN PCM_RESOURCE_LIST ResourceList)
 
NTSTATUS NTAPI PciSetResources (IN PPCI_PDO_EXTENSION PdoExtension, IN BOOLEAN DoReset, IN BOOLEAN SomethingSomethingDarkSide)
 
NTSTATUS NTAPI PciBuildRequirementsList (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData, OUT PIO_RESOURCE_REQUIREMENTS_LIST *Buffer)
 
PWCHAR NTAPI PciGetDeviceDescriptionMessage (IN UCHAR BaseClass, IN UCHAR SubClass)
 
NTSTATUS NTAPI PciQueryDeviceText (IN PPCI_PDO_EXTENSION PdoExtension, IN DEVICE_TEXT_TYPE QueryType, IN ULONG Locale, OUT PWCHAR *Buffer)
 
NTSTATUS NTAPI PciQueryId (IN PPCI_PDO_EXTENSION DeviceExtension, IN BUS_QUERY_ID_TYPE QueryType, OUT PWCHAR *Buffer)
 
VOID NTAPI Cardbus_MassageHeaderForLimitsDetermination (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Cardbus_SaveCurrentSettings (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Cardbus_SaveLimits (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Cardbus_RestoreCurrent (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Cardbus_GetAdditionalResourceDescriptors (IN PPCI_CONFIGURATOR_CONTEXT Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)
 
VOID NTAPI Cardbus_ResetDevice (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
VOID NTAPI Cardbus_ChangeResourceSettings (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
VOID NTAPI Device_MassageHeaderForLimitsDetermination (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Device_SaveCurrentSettings (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Device_SaveLimits (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Device_RestoreCurrent (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI Device_GetAdditionalResourceDescriptors (IN PPCI_CONFIGURATOR_CONTEXT Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)
 
VOID NTAPI Device_ResetDevice (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
VOID NTAPI Device_ChangeResourceSettings (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
VOID NTAPI PPBridge_MassageHeaderForLimitsDetermination (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI PPBridge_SaveCurrentSettings (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI PPBridge_SaveLimits (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI PPBridge_RestoreCurrent (IN PPCI_CONFIGURATOR_CONTEXT Context)
 
VOID NTAPI PPBridge_GetAdditionalResourceDescriptors (IN PPCI_CONFIGURATOR_CONTEXT Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)
 
VOID NTAPI PPBridge_ResetDevice (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
VOID NTAPI PPBridge_ChangeResourceSettings (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
 
BOOLEAN NTAPI PciAreBusNumbersConfigured (IN PPCI_PDO_EXTENSION PdoExtension)
 
NTSTATUS NTAPI PciCacheLegacyDeviceRouting (IN PDEVICE_OBJECT DeviceObject, IN ULONG BusNumber, IN ULONG SlotNumber, IN UCHAR InterruptLine, IN UCHAR InterruptPin, IN UCHAR BaseClass, IN UCHAR SubClass, IN PDEVICE_OBJECT PhysicalDeviceObject, IN PPCI_PDO_EXTENSION PdoExtension, OUT PDEVICE_OBJECT *pFoundDeviceObject)
 

Variables

DRIVER_DISPATCH PciDispatchIrp
 
DRIVER_ADD_DEVICE PciAddDevice
 
KIPI_BROADCAST_WORKER PciExecuteCriticalSystemRoutine
 
SINGLE_LIST_ENTRY PciFdoExtensionListHead
 
KEVENT PciGlobalLock
 
PPCI_INTERFACE PciInterfaces []
 
PCI_INTERFACE ArbiterInterfaceBusNumber
 
PCI_INTERFACE ArbiterInterfaceMemory
 
PCI_INTERFACE ArbiterInterfaceIo
 
PCI_INTERFACE BusHandlerInterface
 
PCI_INTERFACE PciRoutingInterface
 
PCI_INTERFACE PciCardbusPrivateInterface
 
PCI_INTERFACE PciLegacyDeviceDetectionInterface
 
PCI_INTERFACE PciPmeInterface
 
PCI_INTERFACE PciDevicePresentInterface
 
PCI_INTERFACE PciLocationInterface
 
PCI_INTERFACE AgpTargetInterface
 
PCI_INTERFACE TranslatorInterfaceInterrupt
 
PDRIVER_OBJECT PciDriverObject
 
PWATCHDOG_TABLE WdTable
 
PPCI_HACK_ENTRY PciHackTable
 
BOOLEAN PciAssignBusNumbers
 
BOOLEAN PciEnableNativeModeATA
 
PPCI_IRQ_ROUTING_TABLE PciIrqRoutingTable
 
BOOLEAN PciRunningDatacenter
 
NTSYSAPI BOOLEAN InitSafeBootMode
 

Macro Definition Documentation

◆ ASSERT_FDO

#define ASSERT_FDO (   x)    ASSERT((x)->ExtensionType == PciFdoExtensionType);

Definition at line 37 of file pci.h.

◆ ASSERT_PDO

#define ASSERT_PDO (   x)    ASSERT((x)->ExtensionType == PciPdoExtensionType);

Definition at line 38 of file pci.h.

◆ MAX_ANSI_STRINGS

#define MAX_ANSI_STRINGS   0x08

Definition at line 87 of file pci.h.

◆ MAX_DEBUGGING_DEVICES_SUPPORTED

#define MAX_DEBUGGING_DEVICES_SUPPORTED   0x04

Definition at line 77 of file pci.h.

◆ PCI_HACK_ENTRY_FULL_SIZE

#define PCI_HACK_ENTRY_FULL_SIZE   sizeof(L"VVVVddddssssIIIIRR") - sizeof(UNICODE_NULL)

Definition at line 46 of file pci.h.

◆ PCI_HACK_ENTRY_REV_SIZE

#define PCI_HACK_ENTRY_REV_SIZE   sizeof(L"VVVVddddRR") - sizeof(UNICODE_NULL)

Definition at line 44 of file pci.h.

◆ PCI_HACK_ENTRY_SIZE

#define PCI_HACK_ENTRY_SIZE   sizeof(L"VVVVdddd") - sizeof(UNICODE_NULL)

Definition at line 43 of file pci.h.

◆ PCI_HACK_ENTRY_SUBSYS_SIZE

#define PCI_HACK_ENTRY_SUBSYS_SIZE   sizeof(L"VVVVddddssssIIII") - sizeof(UNICODE_NULL)

Definition at line 45 of file pci.h.

◆ PCI_HACK_FIXUP_AFTER_CONFIGURATION

#define PCI_HACK_FIXUP_AFTER_CONFIGURATION   0x01

Definition at line 71 of file pci.h.

◆ PCI_HACK_FIXUP_BEFORE_CONFIGURATION

#define PCI_HACK_FIXUP_BEFORE_CONFIGURATION   0x00

Definition at line 70 of file pci.h.

◆ PCI_HACK_FIXUP_BEFORE_UPDATE

#define PCI_HACK_FIXUP_BEFORE_UPDATE   0x03

Definition at line 72 of file pci.h.

◆ PCI_HACK_HAS_REVISION_INFO

#define PCI_HACK_HAS_REVISION_INFO   0x01

Definition at line 51 of file pci.h.

◆ PCI_HACK_HAS_SUBSYSTEM_INFO

#define PCI_HACK_HAS_SUBSYSTEM_INFO   0x02

Definition at line 52 of file pci.h.

◆ PCI_INTERFACE_FDO

#define PCI_INTERFACE_FDO   0x02

Definition at line 58 of file pci.h.

◆ PCI_INTERFACE_PDO

#define PCI_INTERFACE_PDO   0x01

Definition at line 57 of file pci.h.

◆ PCI_INTERFACE_ROOT

#define PCI_INTERFACE_ROOT   0x04

Definition at line 59 of file pci.h.

◆ PCI_IS_ROOT_FDO

#define PCI_IS_ROOT_FDO (   x)    ((x)->BusRootFdoExtension == x)

Definition at line 32 of file pci.h.

◆ PCI_POOL_TAG

#define PCI_POOL_TAG   'BicP'

Definition at line 27 of file pci.h.

◆ PCI_SKIP_DEVICE_ENUMERATION

#define PCI_SKIP_DEVICE_ENUMERATION   0x01

Definition at line 64 of file pci.h.

◆ PCI_SKIP_RESOURCE_ENUMERATION

#define PCI_SKIP_RESOURCE_ENUMERATION   0x02

Definition at line 65 of file pci.h.

◆ PCI_VERIFIER_CODES

#define PCI_VERIFIER_CODES   0x04

Definition at line 82 of file pci.h.

Typedef Documentation

◆ PCI_ARBITER_INSTANCE

◆ PCI_CONFIGURATOR

◆ PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS

typedef VOID(NTAPI * PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS) (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)

Definition at line 455 of file pci.h.

◆ PCI_CONFIGURATOR_CONTEXT

◆ PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS

typedef VOID(NTAPI * PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context, IN PPCI_COMMON_HEADER PciData, IN PIO_RESOURCE_DESCRIPTOR IoDescriptor)

Definition at line 460 of file pci.h.

◆ PCI_CONFIGURATOR_INITIALIZE

typedef VOID(NTAPI * PCI_CONFIGURATOR_INITIALIZE) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)

Definition at line 439 of file pci.h.

◆ PCI_CONFIGURATOR_RESET_DEVICE

typedef VOID(NTAPI * PCI_CONFIGURATOR_RESET_DEVICE) (IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)

Definition at line 466 of file pci.h.

◆ PCI_CONFIGURATOR_RESTORE_CURRENT

typedef VOID(NTAPI * PCI_CONFIGURATOR_RESTORE_CURRENT) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)

Definition at line 443 of file pci.h.

◆ PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS

typedef VOID(NTAPI * PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)

Definition at line 451 of file pci.h.

◆ PCI_CONFIGURATOR_SAVE_LIMITS

typedef VOID(NTAPI * PCI_CONFIGURATOR_SAVE_LIMITS) (IN struct _PCI_CONFIGURATOR_CONTEXT *Context)

Definition at line 447 of file pci.h.

◆ PCI_DEVICE_TYPES

◆ PCI_DISPATCH_FUNCTION

typedef NTSTATUS(NTAPI * PCI_DISPATCH_FUNCTION) (IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PVOID DeviceExtension)

Definition at line 325 of file pci.h.

◆ PCI_DISPATCH_STYLE

◆ PCI_FDO_EXTENSION

◆ PCI_FUNCTION_RESOURCES

◆ PCI_HACK_ENTRY

◆ PCI_HEADER_TYPE_DEPENDENT

◆ PCI_ID_BUFFER

◆ PCI_INTERFACE

◆ PCI_INTERFACE_CONSTRUCTOR

typedef NTSTATUS(NTAPI * PCI_INTERFACE_CONSTRUCTOR) (IN PVOID DeviceExtension, IN PVOID Instance, IN PVOID InterfaceData, IN USHORT Version, IN USHORT Size, IN PINTERFACE Interface)

Definition at line 359 of file pci.h.

◆ PCI_INTERFACE_INITIALIZER

typedef NTSTATUS(NTAPI * PCI_INTERFACE_INITIALIZER) (IN PVOID Instance)

Definition at line 368 of file pci.h.

◆ PCI_IPI_CONTEXT

◆ PCI_IPI_FUNCTION

typedef VOID(NTAPI * PCI_IPI_FUNCTION) (IN PVOID Reserved, IN PVOID Context)

Definition at line 502 of file pci.h.

◆ PCI_LEGACY_DEVICE

◆ PCI_LOCK

◆ PCI_MJ_DISPATCH_TABLE

◆ PCI_MN_DISPATCH_TABLE

◆ PCI_PDO_EXTENSION

◆ PCI_POWER_STATE

◆ PCI_SECONDARY_EXTENSION

◆ PCI_SIGNATURE

◆ PCI_STATE

◆ PCI_VERIFIER_DATA

◆ PPCI_ARBITER_INSTANCE

◆ PPCI_CONFIGURATOR

◆ PPCI_CONFIGURATOR_CONTEXT

◆ PPCI_FDO_EXTENSION

◆ PPCI_FUNCTION_RESOURCES

◆ PPCI_HACK_ENTRY

◆ PPCI_HEADER_TYPE_DEPENDENT

◆ PPCI_ID_BUFFER

◆ PPCI_INTERFACE

◆ PPCI_IPI_CONTEXT

◆ PPCI_LEGACY_DEVICE

◆ PPCI_LOCK

◆ PPCI_MJ_DISPATCH_TABLE

◆ PPCI_MN_DISPATCH_TABLE

◆ PPCI_PDO_EXTENSION

◆ PPCI_POWER_STATE

◆ PPCI_SECONDARY_EXTENSION

◆ PPCI_SIGNATURE

◆ PPCI_VERIFIER_DATA

Enumeration Type Documentation

◆ _PCI_DEVICE_TYPES

Enumerator
PciTypeInvalid 
PciTypeHostBridge 
PciTypePciBridge 
PciTypeCardbusBridge 
PciTypeDevice 

Definition at line 115 of file pci.h.

116{
@ PciTypeHostBridge
Definition: pci.h:118
@ PciTypeDevice
Definition: pci.h:121
@ PciTypePciBridge
Definition: pci.h:119
@ PciTypeInvalid
Definition: pci.h:117
@ PciTypeCardbusBridge
Definition: pci.h:120
enum _PCI_DEVICE_TYPES PCI_DEVICE_TYPES

◆ _PCI_DISPATCH_STYLE

Enumerator
IRP_COMPLETE 
IRP_DOWNWARD 
IRP_UPWARD 
IRP_DISPATCH 

Definition at line 141 of file pci.h.

142{
enum _PCI_DISPATCH_STYLE PCI_DISPATCH_STYLE
@ IRP_UPWARD
Definition: pci.h:145
@ IRP_COMPLETE
Definition: pci.h:143
@ IRP_DISPATCH
Definition: pci.h:146
@ IRP_DOWNWARD
Definition: pci.h:144

◆ _PCI_SIGNATURE

Enumerator
PciPdoExtensionType 
PciFdoExtensionType 
PciArb_Io 
PciArb_Memory 
PciArb_Interrupt 
PciArb_BusNumber 
PciTrans_Interrupt 
PciInterface_BusHandler 
PciInterface_IntRouteHandler 
PciInterface_PciCb 
PciInterface_LegacyDeviceDetection 
PciInterface_PmeHandler 
PciInterface_DevicePresent 
PciInterface_NativeIde 
PciInterface_AgpTarget 
PciInterface_Location 

Definition at line 92 of file pci.h.

93{
94 PciPdoExtensionType = 'icP0',
95 PciFdoExtensionType = 'icP1',
96 PciArb_Io = 'icP2',
97 PciArb_Memory = 'icP3',
98 PciArb_Interrupt = 'icP4',
99 PciArb_BusNumber = 'icP5',
100 PciTrans_Interrupt = 'icP6',
103 PciInterface_PciCb = 'icP9',
107 PciInterface_NativeIde = 'icP=',
108 PciInterface_AgpTarget = 'icP>',
109 PciInterface_Location = 'icP?'
enum _PCI_SIGNATURE PCI_SIGNATURE
enum _PCI_SIGNATURE * PPCI_SIGNATURE
@ PciInterface_NativeIde
Definition: pci.h:107
@ PciFdoExtensionType
Definition: pci.h:95
@ PciPdoExtensionType
Definition: pci.h:94
@ PciInterface_PciCb
Definition: pci.h:103
@ PciInterface_IntRouteHandler
Definition: pci.h:102
@ PciArb_BusNumber
Definition: pci.h:99
@ PciInterface_Location
Definition: pci.h:109
@ PciArb_Io
Definition: pci.h:96
@ PciInterface_DevicePresent
Definition: pci.h:106
@ PciArb_Interrupt
Definition: pci.h:98
@ PciInterface_BusHandler
Definition: pci.h:101
@ PciTrans_Interrupt
Definition: pci.h:100
@ PciInterface_LegacyDeviceDetection
Definition: pci.h:104
@ PciArb_Memory
Definition: pci.h:97
@ PciInterface_AgpTarget
Definition: pci.h:108
@ PciInterface_PmeHandler
Definition: pci.h:105

◆ _PCI_STATE

Enumerator
PciNotStarted 
PciStarted 
PciDeleted 
PciStopped 
PciSurpriseRemoved 
PciSynchronizedOperation 
PciMaxObjectState 

Definition at line 127 of file pci.h.

128{
136} PCI_STATE;
enum _PCI_STATE PCI_STATE
@ PciMaxObjectState
Definition: pci.h:135
@ PciSurpriseRemoved
Definition: pci.h:133
@ PciDeleted
Definition: pci.h:131
@ PciStarted
Definition: pci.h:130
@ PciSynchronizedOperation
Definition: pci.h:134
@ PciStopped
Definition: pci.h:132
@ PciNotStarted
Definition: pci.h:129

Function Documentation

◆ agpintrf_Constructor()

NTSTATUS NTAPI agpintrf_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 47 of file agpintrf.c.

53{
55
57 UNREFERENCED_PARAMETER(InterfaceData);
61
62 /* Only AGP bridges are supported (which are PCI-to-PCI Bridge Devices) */
63 if ((PdoExtension->BaseClass != PCI_CLASS_BRIDGE_DEV) ||
65 {
66 /* Fail any other PDO */
68 }
69
70 /* Not yet implemented */
73}
struct _PCI_PDO_EXTENSION * PPCI_PDO_EXTENSION
#define UNIMPLEMENTED_DBGBREAK(...)
Definition: debug.h:57
@ PdoExtension
Definition: precomp.h:49
#define UNREFERENCED_PARAMETER(P)
Definition: ntbasedef.h:317
#define STATUS_NOT_SUPPORTED
Definition: ntstatus.h:423
#define STATUS_NOT_IMPLEMENTED
Definition: ntstatus.h:239
_Must_inspect_result_ _In_ WDFDEVICE _In_ PWDF_DEVICE_PROPERTY_DATA _In_ DEVPROPTYPE _In_ ULONG Size
Definition: wdfdevice.h:4533
_Must_inspect_result_ _In_ WDFDEVICE _In_ LPCGUID _Out_ PINTERFACE Interface
Definition: wdffdo.h:465
_Must_inspect_result_ _In_ WDFDEVICE _In_ LPCGUID _Out_ PINTERFACE _In_ USHORT _In_ USHORT Version
Definition: wdffdo.h:469
_Must_inspect_result_ _In_ WDFDEVICE _In_ PWDF_WMI_INSTANCE_CONFIG _In_opt_ PWDF_OBJECT_ATTRIBUTES _Out_opt_ WDFWMIINSTANCE * Instance
Definition: wdfwmi.h:481
#define PCI_SUBCLASS_BR_PCI_TO_PCI
Definition: iotypes.h:4165
#define PCI_CLASS_BRIDGE_DEV
Definition: iotypes.h:4109

◆ agpintrf_Initializer()

NTSTATUS NTAPI agpintrf_Initializer ( IN PVOID  Instance)

Definition at line 37 of file agpintrf.c.

38{
40 /* PnP Interfaces don't get Initialized */
41 ASSERTMSG("PCI agpintrf_Initializer, unexpected call.\n", FALSE);
43}
#define FALSE
Definition: types.h:117
#define ASSERTMSG(msg, exp)
Definition: nt_native.h:431
#define STATUS_UNSUCCESSFUL
Definition: udferr_usr.h:132

◆ arbusno_Constructor()

NTSTATUS NTAPI arbusno_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 73 of file ar_busno.c.

79{
82 PAGED_CODE();
83
84 UNREFERENCED_PARAMETER(PciInterface);
88
89 /* Make sure it's the expected interface */
90 if ((ULONG_PTR)InterfaceData != CmResourceTypeBusNumber)
91 {
92 /* Arbiter support must have been initialized first */
93 if (FdoExtension->ArbitersInitialized)
94 {
95 /* Not yet implemented */
97 while (TRUE);
98 }
99 else
100 {
101 /* No arbiters for this FDO */
103 }
104 }
105 else
106 {
107 /* Not the right interface */
109 }
110
111 /* Return the status */
112 return Status;
113}
#define PAGED_CODE()
LONG NTSTATUS
Definition: precomp.h:26
#define UNIMPLEMENTED
Definition: debug.h:115
#define TRUE
Definition: types.h:120
struct _PCI_FDO_EXTENSION * PPCI_FDO_EXTENSION
@ FdoExtension
Definition: precomp.h:48
Status
Definition: gdiplustypes.h:25
#define CmResourceTypeBusNumber
Definition: hwresource.cpp:128
#define STATUS_INVALID_PARAMETER_5
Definition: ntstatus.h:479
uint32_t ULONG_PTR
Definition: typedefs.h:65

◆ arbusno_Initializer()

NTSTATUS NTAPI arbusno_Initializer ( IN PVOID  Instance)

Definition at line 35 of file ar_busno.c.

36{
40
41 PAGED_CODE();
42
43 RtlZeroMemory(&Arbiter->CommonInstance, sizeof(Arbiter->CommonInstance));
44
46
47 /* Not yet implemented */
49
50#if 0
51 Arbiter->CommonInstance.UnpackRequirement = arbusno_UnpackRequirement;
52 Arbiter->CommonInstance.PackResource = arbusno_PackResource;
53 Arbiter->CommonInstance.UnpackResource = arbusno_UnpackResource;
54 Arbiter->CommonInstance.ScoreRequirement = arbusno_ScoreRequirement;
55#endif
56
58 FdoExtension->FunctionalDeviceObject,
60 Arbiter->InstanceName,
61 L"Pci",
62 NULL);
63 if (!NT_SUCCESS(Status))
64 {
65 DPRINT1("arbusno_Initializer: init arbiter return %X", Status);
66 }
67
68 return Status;
69}
NTSTATUS NTAPI ArbInitializeArbiterInstance(_Inout_ PARBITER_INSTANCE Arbiter, _In_ PDEVICE_OBJECT BusDeviceObject, _In_ CM_RESOURCE_TYPE ResourceType, _In_ PCWSTR ArbiterName, _In_ PCWSTR OrderName, _In_ PARB_TRANSLATE_ORDERING TranslateOrderingFunction)
Definition: arbiter.c:282
#define DPRINT1
Definition: precomp.h:8
#define NULL
Definition: types.h:112
#define NT_SUCCESS(StatCode)
Definition: apphelp.c:32
#define L(x)
Definition: ntvdm.h:50
PPCI_FDO_EXTENSION BusFdoExtension
Definition: pci.h:405
WCHAR InstanceName[24]
Definition: pci.h:406
ARBITER_INSTANCE CommonInstance
Definition: pci.h:407
PARB_UNPACK_RESOURCE UnpackResource
Definition: arbiter.h:196
PARB_SCORE_REQUIREMENT ScoreRequirement
Definition: arbiter.h:197
PARB_UNPACK_REQUIREMENT UnpackRequirement
Definition: arbiter.h:194
PARB_PACK_RESOURCE PackResource
Definition: arbiter.h:195
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:262

◆ ario_ApplyBrokenVideoHack()

VOID NTAPI ario_ApplyBrokenVideoHack ( IN PPCI_FDO_EXTENSION  FdoExtension)

Definition at line 104 of file ar_memio.c.

105{
106 PPCI_ARBITER_INSTANCE PciArbiter;
107 //PARBITER_INSTANCE CommonInstance;
108 //NTSTATUS Status;
109
110 /* Only valid for root FDOs who are being applied the hack for the first time */
111 ASSERT(!FdoExtension->BrokenVideoHackApplied);
113
114 /* Find the I/O arbiter */
116 SecondaryExtension.Next,
117 PciArb_Io);
118 ASSERT(PciArbiter);
119#if 0 // when arb exist
120 /* Get the Arb instance */
121 CommonInstance = &PciArbiter->CommonInstance;
122
123 /* Free the two lists, enabling full VGA access */
124 ArbFreeOrderingList(&CommonInstance->OrderingList);
125 ArbFreeOrderingList(&CommonInstance->ReservedList);
126
127 /* Build the ordering for broken video PCI access */
128 Status = ArbBuildAssignmentOrdering(CommonInstance,
129 L"Pci",
130 L"BrokenVideo",
131 NULL);
133#else
134 //Status = STATUS_SUCCESS;
136 while (TRUE);
137#endif
138 /* Now the hack has been applied */
139 FdoExtension->BrokenVideoHackApplied = TRUE;
140}
NTSTATUS NTAPI ArbBuildAssignmentOrdering(_Inout_ PARBITER_INSTANCE ArbInstance, _In_ PCWSTR OrderName, _In_ PCWSTR ReservedOrderName, _In_ PARB_TRANSLATE_ORDERING TranslateOrderingFunction)
Definition: arbiter.c:267
VOID NTAPI ArbFreeOrderingList(_Out_ PARBITER_ORDERING_LIST OrderList)
Definition: arbiter.c:256
PPCI_SECONDARY_EXTENSION NTAPI PciFindNextSecondaryExtension(IN PSINGLE_LIST_ENTRY ListHead, IN PCI_SIGNATURE ExtensionType)
Definition: utils.c:584
#define PCI_IS_ROOT_FDO(x)
Definition: pci.h:32
#define ASSERT(a)
Definition: mode.c:44
void * PVOID
Definition: typedefs.h:50

Referenced by PciApplyHacks().

◆ ario_Constructor()

NTSTATUS NTAPI ario_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 60 of file ar_memio.c.

66{
69 PAGED_CODE();
70
71 UNREFERENCED_PARAMETER(PciInterface);
75
76 /* Make sure it's the expected interface */
77 if ((ULONG_PTR)InterfaceData != CmResourceTypePort)
78 {
79 /* Arbiter support must have been initialized first */
80 if (FdoExtension->ArbitersInitialized)
81 {
82 /* Not yet implemented */
84 while (TRUE);
85 }
86 else
87 {
88 /* No arbiters for this FDO */
90 }
91 }
92 else
93 {
94 /* Not the right interface */
96 }
97
98 /* Return the status */
99 return Status;
100}
#define CmResourceTypePort
Definition: hwresource.cpp:123

◆ ario_Initializer()

NTSTATUS NTAPI ario_Initializer ( IN PVOID  Instance)

Definition at line 48 of file ar_memio.c.

49{
51
52 /* Not yet implemented */
54 //while (TRUE);
55 return STATUS_SUCCESS;
56}
#define STATUS_SUCCESS
Definition: shellext.h:65

◆ armem_Constructor()

NTSTATUS NTAPI armem_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 156 of file ar_memio.c.

162{
165 PAGED_CODE();
166
167 UNREFERENCED_PARAMETER(PciInterface);
171
172 /* Make sure it's the expected interface */
173 if ((ULONG_PTR)InterfaceData != CmResourceTypeMemory)
174 {
175 /* Arbiter support must have been initialized first */
176 if (FdoExtension->ArbitersInitialized)
177 {
178 /* Not yet implemented */
180 while (TRUE);
181 }
182 else
183 {
184 /* No arbiters for this FDO */
186 }
187 }
188 else
189 {
190 /* Not the right interface */
192 }
193
194 /* Return the status */
195 return Status;
196}
#define CmResourceTypeMemory
Definition: hwresource.cpp:125

◆ armem_Initializer()

NTSTATUS NTAPI armem_Initializer ( IN PVOID  Instance)

Definition at line 144 of file ar_memio.c.

145{
147
148 /* Not yet implemented */
150 //while (TRUE);
151 return STATUS_SUCCESS;
152}

◆ busintrf_Constructor()

NTSTATUS NTAPI busintrf_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 45 of file busintrf.c.

◆ busintrf_Initializer()

NTSTATUS NTAPI busintrf_Initializer ( IN PVOID  Instance)

Definition at line 35 of file busintrf.c.

36{
38 /* PnP Interfaces don't get Initialized */
39 ASSERTMSG("PCI busintrf_Initializer, unexpected call.\n", FALSE);
41}

◆ Cardbus_ChangeResourceSettings()

VOID NTAPI Cardbus_ChangeResourceSettings ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PPCI_COMMON_HEADER  PciData 
)

Definition at line 89 of file cardbus.c.

◆ Cardbus_GetAdditionalResourceDescriptors()

VOID NTAPI Cardbus_GetAdditionalResourceDescriptors ( IN PPCI_CONFIGURATOR_CONTEXT  Context,
IN PPCI_COMMON_HEADER  PciData,
IN PIO_RESOURCE_DESCRIPTOR  IoDescriptor 
)

Definition at line 67 of file cardbus.c.

◆ Cardbus_MassageHeaderForLimitsDetermination()

VOID NTAPI Cardbus_MassageHeaderForLimitsDetermination ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 51 of file cardbus.c.

◆ Cardbus_ResetDevice()

VOID NTAPI Cardbus_ResetDevice ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PPCI_COMMON_HEADER  PciData 
)

Definition at line 79 of file cardbus.c.

◆ Cardbus_RestoreCurrent()

VOID NTAPI Cardbus_RestoreCurrent ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 59 of file cardbus.c.

◆ Cardbus_SaveCurrentSettings()

VOID NTAPI Cardbus_SaveCurrentSettings ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 35 of file cardbus.c.

◆ Cardbus_SaveLimits()

VOID NTAPI Cardbus_SaveLimits ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 43 of file cardbus.c.

◆ Device_ChangeResourceSettings()

VOID NTAPI Device_ChangeResourceSettings ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PPCI_COMMON_HEADER  PciData 
)

Definition at line 283 of file device.c.

285{
287 UNREFERENCED_PARAMETER(PciData);
288 /* Not yet implemented */
290}

◆ Device_GetAdditionalResourceDescriptors()

VOID NTAPI Device_GetAdditionalResourceDescriptors ( IN PPCI_CONFIGURATOR_CONTEXT  Context,
IN PPCI_COMMON_HEADER  PciData,
IN PIO_RESOURCE_DESCRIPTOR  IoDescriptor 
)

Definition at line 259 of file device.c.

262{
264 UNREFERENCED_PARAMETER(PciData);
265 UNREFERENCED_PARAMETER(IoDescriptor);
266 /* Not yet implemented */
268}

◆ Device_MassageHeaderForLimitsDetermination()

VOID NTAPI Device_MassageHeaderForLimitsDetermination ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 218 of file device.c.

219{
220 PPCI_COMMON_HEADER PciData;
222 PULONG BarArray;
223 ULONG i = 0;
224
225 /* Get pointers from context data */
226 PdoExtension = Context->PdoExtension;
227 PciData = Context->PciData;
228
229 /* Get the array of BARs */
230 BarArray = PciData->u.type0.BaseAddresses;
231
232 /* Check for IDE controllers that are not in native mode */
233 if ((PdoExtension->BaseClass == PCI_CLASS_MASS_STORAGE_CTLR) &&
235 (PdoExtension->ProgIf & 5) != 5)
236 {
237 /* These controllers only use legacy resources */
238 i = 4;
239 }
240
241 /* Set all the bits on, which will allow us to recover the limit data */
242 for (i = 0; i < PCI_TYPE0_ADDRESSES; i++) BarArray[i] = 0xFFFFFFFF;
243
244 /* Do the same for the PCI ROM BAR */
245 PciData->u.type0.ROMBaseAddress = PCI_ADDRESS_ROM_ADDRESS_MASK;
246}
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
uint32_t * PULONG
Definition: typedefs.h:59
uint32_t ULONG
Definition: typedefs.h:59
#define PCI_TYPE0_ADDRESSES
Definition: iotypes.h:3500
#define PCI_CLASS_MASS_STORAGE_CTLR
Definition: iotypes.h:4104
#define PCI_SUBCLASS_MSC_IDE_CTLR
Definition: iotypes.h:4129
#define PCI_ADDRESS_ROM_ADDRESS_MASK
Definition: iotypes.h:4235

◆ Device_ResetDevice()

VOID NTAPI Device_ResetDevice ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PPCI_COMMON_HEADER  PciData 
)

Definition at line 272 of file device.c.

274{
276 UNREFERENCED_PARAMETER(PciData);
277 /* Not yet implemented */
279}

◆ Device_RestoreCurrent()

VOID NTAPI Device_RestoreCurrent ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 250 of file device.c.

251{
253 /* Nothing to do for devices */
254 return;
255}

◆ Device_SaveCurrentSettings()

VOID NTAPI Device_SaveCurrentSettings ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 20 of file device.c.

21{
22 PPCI_COMMON_HEADER PciData;
23 PIO_RESOURCE_DESCRIPTOR IoDescriptor;
26 PULONG BarArray;
27 ULONG Bar, BarMask, i;
28
29 /* Get variables from context */
30 PciData = Context->Current;
31 Resources = Context->PdoExtension->Resources;
32
33 /* Loop all the PCI BARs */
34 BarArray = PciData->u.type0.BaseAddresses;
35 for (i = 0; i <= PCI_TYPE0_ADDRESSES; i++)
36 {
37 /* Get the resource descriptor and limit descriptor for this BAR */
38 CmDescriptor = &Resources->Current[i];
39 IoDescriptor = &Resources->Limit[i];
40
41 /* Build the resource descriptor based on the limit descriptor */
42 CmDescriptor->Type = IoDescriptor->Type;
43 if (CmDescriptor->Type == CmResourceTypeNull) continue;
44 CmDescriptor->Flags = IoDescriptor->Flags;
45 CmDescriptor->ShareDisposition = IoDescriptor->ShareDisposition;
46 CmDescriptor->u.Generic.Start.HighPart = 0;
47 CmDescriptor->u.Generic.Length = IoDescriptor->u.Generic.Length;
48
49 /* Check if we're handling PCI BARs, or the ROM BAR */
51 {
52 /* Read the actual BAR value */
53 Bar = BarArray[i];
54
55 /* Check if this is an I/O BAR */
57 {
58 /* Use the right mask to get the I/O port base address */
59 ASSERT(CmDescriptor->Type == CmResourceTypePort);
61 }
62 else
63 {
64 /* It's a RAM BAR, use the right mask to get the base address */
65 ASSERT(CmDescriptor->Type == CmResourceTypeMemory);
67
68 /* Check if it's a 64-bit BAR */
70 {
71 /* The next BAR value is actually the high 32-bits */
72 CmDescriptor->u.Memory.Start.HighPart = BarArray[i + 1];
73 }
75 {
76 /* Legacy BAR, don't read more than 20 bits of the address */
77 BarMask = 0xFFFF0;
78 }
79 }
80 }
81 else
82 {
83 /* Actually a ROM BAR, so read the correct register */
84 Bar = PciData->u.type0.ROMBaseAddress;
85
86 /* Apply the correct mask for ROM BARs */
88
89 /* Make sure it's enabled */
91 {
92 /* If it isn't, then a descriptor won't be built for it */
93 CmDescriptor->Type = CmResourceTypeNull;
94 continue;
95 }
96 }
97
98 /* Now we have the right mask, read the actual address from the BAR */
99 Bar &= BarMask;
100 CmDescriptor->u.Memory.Start.LowPart = Bar;
101
102 /* And check for invalid BAR addresses */
103 if (!(CmDescriptor->u.Memory.Start.HighPart | Bar))
104 {
105 /* Skip these descriptors */
106 CmDescriptor->Type = CmResourceTypeNull;
107 DPRINT1("Invalid BAR\n");
108 }
109 }
110
111 /* Also save the sub-IDs that came directly from the PCI header */
112 Context->PdoExtension->SubsystemVendorId = PciData->u.type0.SubVendorID;
113 Context->PdoExtension->SubsystemId = PciData->u.type0.SubSystemID;
114}
#define CmResourceTypeNull
Definition: hwresource.cpp:122
void Bar(void)
Definition: terminate.cpp:70
union _CM_PARTIAL_RESOURCE_DESCRIPTOR::@393 u
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@393::@394 Generic
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@393::@398 Memory
struct _IO_RESOURCE_DESCRIPTOR::@21::@26 Generic
union _IO_RESOURCE_DESCRIPTOR::@21 u
UCHAR ShareDisposition
Definition: edit.c:61
#define PCI_TYPE_64BIT
Definition: iotypes.h:4239
#define PCI_ADDRESS_IO_ADDRESS_MASK
Definition: iotypes.h:4233
#define PCI_ADDRESS_IO_SPACE
Definition: iotypes.h:4230
#define PCI_TYPE_20BIT
Definition: iotypes.h:4238
#define PCI_ADDRESS_MEMORY_ADDRESS_MASK
Definition: iotypes.h:4234
#define PCI_ROMADDRESS_ENABLED
Definition: iotypes.h:4241
#define PCI_ADDRESS_MEMORY_TYPE_MASK
Definition: iotypes.h:4231

◆ Device_SaveLimits()

VOID NTAPI Device_SaveLimits ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 118 of file device.c.

119{
120 PPCI_COMMON_HEADER Current, PciData;
122 PULONG BarArray;
124 ULONG i;
125
126 /* Get pointers from the context */
127 PdoExtension = Context->PdoExtension;
128 Current = Context->Current;
129 PciData = Context->PciData;
130
131 /* And get the array of bARs */
132 BarArray = PciData->u.type0.BaseAddresses;
133
134 /* First, check for IDE controllers that are not in native mode */
135 if ((PdoExtension->BaseClass == PCI_CLASS_MASS_STORAGE_CTLR) &&
137 (PdoExtension->ProgIf & 5) != 5)
138 {
139 /* They should not be using any non-legacy resources */
140 BarArray[0] = 0;
141 BarArray[1] = 0;
142 BarArray[2] = 0;
143 BarArray[3] = 0;
144 }
145 else if ((PdoExtension->VendorId == 0x5333) &&
146 ((PdoExtension->DeviceId == 0x88F0) ||
147 (PdoExtension->DeviceId == 0x8880)))
148 {
149 /*
150 * The problem is caused by the S3 Vision 968/868 video controller which
151 * is used on the Diamond Stealth 64 Video 3000 series, Number Nine 9FX
152 * motion 771, and other popular video cards, all containing a memory bug.
153 * The 968/868 claims to require 32 MB of memory, but it actually decodes
154 * 64 MB of memory.
155 */
156 for (i = 0; i < PCI_TYPE0_ADDRESSES; i++)
157 {
158 /* Find its 32MB RAM BAR */
159 if (BarArray[i] == 0xFE000000)
160 {
161 /* Increase it to 64MB to make sure nobody touches the buffer */
162 BarArray[i] = 0xFC000000;
163 DPRINT1("PCI - Adjusted broken S3 requirement from 32MB to 64MB\n");
164 }
165 }
166 }
167
168 /* Check for Cirrus Logic GD5430/5440 cards */
169 if ((PdoExtension->VendorId == 0x1013) && (PdoExtension->DeviceId == 0xA0))
170 {
171 /* Check for the I/O port requirement */
172 if (BarArray[1] == 0xFC01)
173 {
174 /* Check for completely bogus BAR */
175 if (Current->u.type0.BaseAddresses[1] == 1)
176 {
177 /* Ignore it */
178 BarArray[1] = 0;
179 DPRINT1("PCI - Ignored Cirrus GD54xx broken IO requirement (400 ports)\n");
180 }
181 else
182 {
183 /* Otherwise, this BAR seems okay */
184 DPRINT1("PCI - Cirrus GD54xx 400 port IO requirement has a valid setting (%08x)\n",
185 Current->u.type0.BaseAddresses[1]);
186 }
187 }
188 else if (BarArray[1])
189 {
190 /* Strange, the I/O BAR was not found as expected (or at all) */
191 DPRINT1("PCI - Warning Cirrus Adapter 101300a0 has unexpected resource requirement (%08x)\n",
192 BarArray[1]);
193 }
194 }
195
196 /* Finally, process all the limit descriptors */
197 Limit = PdoExtension->Resources->Limit;
198 for (i = 0; i < PCI_TYPE0_ADDRESSES; i++)
199 {
200 /* And build them based on the BARs */
201 if (PciCreateIoDescriptorFromBarLimit(&Limit[i], &BarArray[i], FALSE))
202 {
203 /* This function returns TRUE if the BAR was 64-bit, handle this */
205 i++;
206 Limit[i].Type = CmResourceTypeNull;
207 }
208 }
209
210 /* Create the last descriptor based on the ROM address */
212 &PciData->u.type0.ROMBaseAddress,
213 TRUE);
214}
BOOLEAN NTAPI PciCreateIoDescriptorFromBarLimit(PIO_RESOURCE_DESCRIPTOR ResourceDescriptor, IN PULONG BarArray, IN BOOLEAN Rom)
Definition: utils.c:1175
_In_ LONG _In_ LONG Limit
Definition: kefuncs.h:304

◆ devpresent_Constructor()

NTSTATUS NTAPI devpresent_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 45 of file devhere.c.

◆ devpresent_Initializer()

NTSTATUS NTAPI devpresent_Initializer ( IN PVOID  Instance)

Definition at line 35 of file devhere.c.

36{
38 /* PnP Interfaces don't get Initialized */
39 ASSERTMSG("PCI devpresent_Initializer, unexpected call.\n", FALSE);
41}

◆ lddintrf_Constructor()

NTSTATUS NTAPI lddintrf_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 45 of file lddintrf.c.

◆ lddintrf_Initializer()

NTSTATUS NTAPI lddintrf_Initializer ( IN PVOID  Instance)

Definition at line 35 of file lddintrf.c.

36{
38 /* PnP Interfaces don't get Initialized */
39 ASSERTMSG("PCI lddintrf_Initializer, unexpected call.\n", FALSE);
41}

◆ locintrf_Constructor()

NTSTATUS NTAPI locintrf_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 45 of file locintrf.c.

◆ locintrf_Initializer()

NTSTATUS NTAPI locintrf_Initializer ( IN PVOID  Instance)

Definition at line 35 of file locintrf.c.

36{
38 /* PnP Interfaces don't get Initialized */
39 ASSERTMSG("PCI locintrf_Initializer, unexpected call.\n", FALSE);
41}

◆ PciAddDevice()

NTSTATUS NTAPI PciAddDevice ( IN PDRIVER_OBJECT  DriverObject,
IN PDEVICE_OBJECT  PhysicalDeviceObject 
)

Definition at line 458 of file fdo.c.

460{
462 PDEVICE_OBJECT AttachedTo;
464 PPCI_FDO_EXTENSION ParentExtension;
473 PAGED_CODE();
474 DPRINT1("PCI - AddDevice (a new bus). PDO: %p (Driver: %wZ)\n",
475 PhysicalDeviceObject, &PhysicalDeviceObject->DriverObject->DriverName);
476
477 /* Zero out variables so failure path knows what to do */
478 AttachedTo = NULL;
482
483 do
484 {
485 /* Check if there's already a device extension for this bus */
488 if (ParentExtension)
489 {
490 /* Make sure we find a real PDO */
493
494 /* Make sure it's a PCI-to-PCI bridge */
495 if ((PdoExtension->BaseClass != PCI_CLASS_BRIDGE_DEV) ||
497 {
498 /* This should never happen */
499 DPRINT1("PCI - PciAddDevice for Non-Root/Non-PCI-PCI bridge,\n"
500 " Class %02x, SubClass %02x, will not add.\n",
501 PdoExtension->BaseClass,
502 PdoExtension->SubClass);
503 ASSERT((PdoExtension->BaseClass == PCI_CLASS_BRIDGE_DEV) &&
505
506 /* Enter the failure path */
508 break;
509 }
510
511 /* Subordinate bus on the bridge */
512 DPRINT1("PCI - AddDevice (new bus is child of bus 0x%x).\n",
513 ParentExtension->BaseBus);
514
515 /* Make sure PCI bus numbers are configured */
517 {
518 /* This is a critical failure */
519 DPRINT1("PCI - Bus numbers not configured for bridge (0x%x.0x%x.0x%x)\n",
520 ParentExtension->BaseBus,
521 PdoExtension->Slot.u.bits.DeviceNumber,
522 PdoExtension->Slot.u.bits.FunctionNumber);
523
524 /* Enter the failure path */
526 break;
527 }
528 }
529
530 /* Create the FDO for the bus */
532 sizeof(PCI_FDO_EXTENSION),
533 NULL,
535 0,
536 0,
537 &DeviceObject);
538 if (!NT_SUCCESS(Status)) break;
539
540 /* Initialize the extension for the FDO */
541 FdoExtension = DeviceObject->DeviceExtension;
545
546 /* Attach to the root PDO */
550 ASSERT(AttachedTo != NULL);
551 if (!AttachedTo) break;
552 FdoExtension->AttachedDeviceObject = AttachedTo;
553
554 /* Check if this is a child bus, or the root */
555 if (ParentExtension)
556 {
557 /* The child inherits root data */
558 FdoExtension->BaseBus = PdoExtension->Dependent.type1.SecondaryBus;
559 FdoExtension->BusRootFdoExtension = ParentExtension->BusRootFdoExtension;
560 PdoExtension->BridgeFdoExtension = FdoExtension;
561 FdoExtension->ParentFdoExtension = ParentExtension;
562 }
563 else
564 {
565 /* Query the boot configuration */
568 (PVOID*)&Descriptor);
569 if (!NT_SUCCESS(Status))
570 {
571 /* No configuration has been set */
573 }
574 else
575 {
576 /* Root PDO in ReactOS does not assign boot resources */
577 UNIMPLEMENTED_DBGBREAK("Encountered during setup\n");
579 }
580
581 if (Descriptor)
582 {
583 /* Root PDO in ReactOS does not assign boot resources */
585 }
586 else
587 {
588 /* Default configuration isn't the normal path on Windows */
590 {
591 /* If a second bus is found and there's still no data, crash */
592 KeBugCheckEx(PCI_BUS_DRIVER_INTERNAL,
593 0xDEAD0010u,
595 0,
596 0);
597 }
598
599 /* Warn that a default configuration will be used, and set bus 0 */
600 DPRINT1("PCI Will use default configuration.\n");
602 FdoExtension->BaseBus = 0;
603 }
604
605 /* This is the root bus */
606 FdoExtension->BusRootFdoExtension = FdoExtension;
607 }
608
609 /* Get the HAL or ACPI Bus Handler Callbacks for Configuration Access */
611 if (!NT_SUCCESS(Status)) break;
612
613 /* Initialize all the supported PCI arbiters */
615 if (!NT_SUCCESS(Status)) break;
616
617 /* This is a real FDO, insert it into the list */
618 FdoExtension->Fake = FALSE;
622
623 /* Open the device registry key so that we can query the errata flags */
627 &KeyHandle),
628
629 /* Open the value that contains errata flags for this bus instance */
630 RtlInitUnicodeString(&ValueName, L"HackFlags");
631 Status = ZwQueryValueKey(KeyHandle,
632 &ValueName,
634 ValueInfo,
635 sizeof(Buffer),
636 &ResultLength);
638 if (NT_SUCCESS(Status))
639 {
640 /* Make sure the data is of expected type and size */
641 if ((ValueInfo->Type == REG_DWORD) &&
642 (ValueInfo->DataLength == sizeof(ULONG)))
643 {
644 /* Read the flags for this bus */
645 FdoExtension->BusHackFlags = *(PULONG)&ValueInfo->Data;
646 }
647 }
648
649 /* Query ACPI for PCI HotPlug Support */
651
652 /* The Bus FDO is now initialized */
653 DeviceObject->Flags &= ~DO_DEVICE_INITIALIZING;
654 return STATUS_SUCCESS;
655 } while (FALSE);
656
657 /* This is the failure path */
659
660 /* Check if the FDO extension exists */
661 if (FdoExtension) DPRINT1("Should destroy secondaries\n");
662
663 /* Delete device objects */
664 if (AttachedTo) IoDetachDevice(AttachedTo);
666 return Status;
667}
NTSTATUS NTAPI PciInitializeArbiters(IN PPCI_FDO_EXTENSION FdoExtension)
Definition: arb_comn.c:40
PDEVICE_OBJECT PhysicalDeviceObject
Definition: btrfs_drv.h:1157
VOID NTAPI PciInitializeFdoExtensionCommonFields(PPCI_FDO_EXTENSION FdoExtension, IN PDEVICE_OBJECT DeviceObject, IN PDEVICE_OBJECT PhysicalDeviceObject)
Definition: fdo.c:433
BOOLEAN PciBreakOnDefault
Definition: fdo.c:19
SINGLE_LIST_ENTRY PciFdoExtensionListHead
Definition: fdo.c:18
VOID NTAPI PciGetHotPlugParameters(IN PPCI_FDO_EXTENSION FdoExtension)
Definition: fdo.c:379
Definition: bufpool.h:45
KEVENT PciGlobalLock
Definition: init.c:20
VOID NTAPI PciInsertEntryAtTail(IN PSINGLE_LIST_ENTRY ListHead, IN PPCI_FDO_EXTENSION DeviceExtension, IN PKEVENT Lock)
Definition: utils.c:400
BOOLEAN NTAPI PciAreBusNumbersConfigured(IN PPCI_PDO_EXTENSION PdoExtension)
Definition: busno.c:20
PPCI_FDO_EXTENSION NTAPI PciFindParentPciFdoExtension(IN PDEVICE_OBJECT DeviceObject, IN PKEVENT Lock)
Definition: utils.c:340
NTSTATUS NTAPI PciGetDeviceProperty(IN PDEVICE_OBJECT DeviceObject, IN DEVICE_REGISTRY_PROPERTY DeviceProperty, OUT PVOID *OutputBuffer)
Definition: utils.c:475
#define ASSERT_PDO(x)
Definition: pci.h:38
NTSTATUS NTAPI PciGetConfigHandlers(IN PPCI_FDO_EXTENSION FdoExtension)
Definition: config.c:224
_Must_inspect_result_ _Out_ PNDIS_STATUS _In_ NDIS_HANDLE _In_ ULONG _Out_ PNDIS_STRING _Out_ PNDIS_HANDLE KeyHandle
Definition: ndis.h:4715
NTSYSAPI NTSTATUS NTAPI ZwClose(_In_ HANDLE Handle)
@ KeyValuePartialInformation
Definition: nt_native.h:1182
#define KEY_ALL_ACCESS
Definition: nt_native.h:1041
NTSYSAPI VOID NTAPI RtlInitUnicodeString(PUNICODE_STRING DestinationString, PCWSTR SourceString)
struct _KEY_VALUE_PARTIAL_INFORMATION KEY_VALUE_PARTIAL_INFORMATION
struct _KEY_VALUE_PARTIAL_INFORMATION * PKEY_VALUE_PARTIAL_INFORMATION
PDEVICE_OBJECT NTAPI IoAttachDeviceToDeviceStack(IN PDEVICE_OBJECT SourceDevice, IN PDEVICE_OBJECT TargetDevice)
Definition: device.c:966
NTSTATUS NTAPI IoCreateDevice(IN PDRIVER_OBJECT DriverObject, IN ULONG DeviceExtensionSize, IN PUNICODE_STRING DeviceName, IN DEVICE_TYPE DeviceType, IN ULONG DeviceCharacteristics, IN BOOLEAN Exclusive, OUT PDEVICE_OBJECT *DeviceObject)
Definition: device.c:1031
VOID NTAPI IoDetachDevice(IN PDEVICE_OBJECT TargetDevice)
Definition: device.c:1296
VOID NTAPI IoDeleteDevice(IN PDEVICE_OBJECT DeviceObject)
Definition: device.c:1251
NTSTATUS NTAPI IoOpenDeviceRegistryKey(IN PDEVICE_OBJECT DeviceObject, IN ULONG DevInstKeyType, IN ACCESS_MASK DesiredAccess, OUT PHANDLE DevInstRegKey)
Definition: pnpmgr.c:1621
#define FILE_DEVICE_BUS_EXTENDER
Definition: winioctl.h:148
VOID NTAPI KeBugCheckEx(_In_ ULONG BugCheckCode, _In_ ULONG_PTR BugCheckParameter1, _In_ ULONG_PTR BugCheckParameter2, _In_ ULONG_PTR BugCheckParameter3, _In_ ULONG_PTR BugCheckParameter4)
Definition: rtlcompat.c:108
#define REG_DWORD
Definition: sdbapi.c:596
PVOID DeviceExtension
Definition: env_spec_w32.h:418
BOOLEAN BaseBus
Definition: pci.h:211
struct _PCI_FDO_EXTENSION * BusRootFdoExtension
Definition: pci.h:205
#define STATUS_INVALID_DEVICE_REQUEST
Definition: udferr_usr.h:138
#define STATUS_NO_SUCH_DEVICE
Definition: udferr_usr.h:136
_In_ PDEVICE_OBJECT DeviceObject
Definition: wdfdevice.h:2055
_Must_inspect_result_ _In_ WDFDEVICE _In_ DEVICE_REGISTRY_PROPERTY _In_ ULONG _Out_ PULONG ResultLength
Definition: wdfdevice.h:3776
_Must_inspect_result_ _In_ PDRIVER_OBJECT DriverObject
Definition: wdfdriver.h:213
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING ValueName
Definition: wdfregistry.h:243
_Must_inspect_result_ _In_ WDFIORESLIST _In_ PIO_RESOURCE_DESCRIPTOR Descriptor
Definition: wdfresource.h:342
#define PLUGPLAY_REGKEY_DEVICE
Definition: iofuncs.h:2786
@ DevicePropertyBootConfiguration
Definition: iotypes.h:1198
unsigned char UCHAR
Definition: xmlstorage.h:181

◆ PciAreBusNumbersConfigured()

BOOLEAN NTAPI PciAreBusNumbersConfigured ( IN PPCI_PDO_EXTENSION  PdoExtension)

Definition at line 20 of file busno.c.

21{
22 UCHAR PrimaryBus, BaseBus, SecondaryBus, SubordinateBus;
23
24 PAGED_CODE();
25
26 /* Get all relevant bus number details */
27 PrimaryBus = PdoExtension->Dependent.type1.PrimaryBus;
28 BaseBus = PdoExtension->ParentFdoExtension->BaseBus;
29 SecondaryBus = PdoExtension->Dependent.type1.SecondaryBus;
30 SubordinateBus = PdoExtension->Dependent.type1.SubordinateBus;
31
32 /* The primary bus should be the base bus of the parent */
33 if ((PrimaryBus != BaseBus) || (SecondaryBus <= PrimaryBus)) return FALSE;
34
35 /* The subordinate should be a higher bus number than the secondary */
36 return SubordinateBus >= SecondaryBus;
37}

Referenced by PciAddDevice().

◆ PciBeginStateTransition()

NTSTATUS NTAPI PciBeginStateTransition ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN PCI_STATE  NewState 
)

Definition at line 97 of file state.c.

99{
102 DPRINT1("PCI Request to begin transition of Extension %p to %s ->",
103 DeviceExtension,
104 PciTransitionText[NewState]);
105
106 /* Assert the device isn't already in a pending transition */
107 ASSERT(DeviceExtension->TentativeNextState == DeviceExtension->DeviceState);
108
109 /* Assert this is a valid state */
110 CurrentState = DeviceExtension->DeviceState;
112 ASSERT(NewState < PciMaxObjectState);
113
114 /* Lookup if this state transition is valid */
117 {
118 /* Invalid transition (logical fault) */
119 DPRINT1("ERROR\nPCI: Error trying to enter state \"%s\" "
120 "from state \"%s\"\n",
121 PciTransitionText[NewState],
124 }
126 {
127 /* Invalid transition (illegal request) */
128 DPRINT1("ERROR\nPCI: Illegal request to try to enter state \"%s\" "
129 "from state \"%s\", rejecting",
130 PciTransitionText[NewState],
132 }
133
134 /* New state must be different from current, unless request is at fault */
135 ASSERT((NewState != DeviceExtension->DeviceState) || (!NT_SUCCESS(Status)));
136
137 /* Enter the new state if successful, and return state status */
138 if (NT_SUCCESS(Status)) DeviceExtension->TentativeNextState = NewState;
139 DbgPrint("%x\n", Status);
140 return Status;
141}
PCHAR PciTransitionText[PciMaxObjectState+1]
Definition: state.c:18
NTSTATUS PnpStateTransitionArray[PciMaxObjectState *PciMaxObjectState]
Definition: state.c:39
#define DbgPrint
Definition: hal.h:12
NTSYSAPI void WINAPI DbgBreakPoint(void)
#define STATUS_FAIL_CHECK
Definition: ntstatus.h:685
_Out_opt_ PBOOLEAN CurrentState
Definition: zwfuncs.h:393

Referenced by PciFdoIrpStartDevice(), PciPdoIrpStartDevice(), and PciQueryDeviceRelations().

◆ PciBuildDefaultExclusionLists()

NTSTATUS NTAPI PciBuildDefaultExclusionLists ( VOID  )

Definition at line 276 of file utils.c.

277{
278 ULONG Start;
282
283 /* Initialize the range lists */
286
287 /* Loop x86 I/O ranges */
288 for (Start = 0x100; Start <= 0xFEFF; Start += 0x400)
289 {
290 /* Add the ISA I/O ranges */
292 Start,
293 Start + 0x2FF,
294 0,
296 NULL,
297 NULL);
298 if (!NT_SUCCESS(Status)) break;
299
300 /* Add the ISA I/O ranges */
302 Start,
303 Start + 0x2AF,
304 0,
306 NULL,
307 NULL);
308 if (!NT_SUCCESS(Status)) break;
309
310 /* Add the VGA I/O range for Monochrome Video */
312 Start + 0x2BC,
313 Start + 0x2BF,
314 0,
316 NULL,
317 NULL);
318 if (!NT_SUCCESS(Status)) break;
319
320 /* Add the VGA I/O range for certain CGA adapters */
322 Start + 0x2E0,
323 Start + 0x2FF,
324 0,
326 NULL,
327 NULL);
328 if (!NT_SUCCESS(Status)) break;
329
330 /* Success, ranges added done */
331 };
332
335 return Status;
336}
RTL_RANGE_LIST PciVgaAndIsaBitExclusionList
Definition: utils.c:21
RTL_RANGE_LIST PciIsaBitExclusionList
Definition: utils.c:20
NTSYSAPI NTSTATUS NTAPI RtlAddRange(_Inout_ PRTL_RANGE_LIST RangeList, _In_ ULONGLONG Start, _In_ ULONGLONG End, _In_ UCHAR Attributes, _In_ ULONG Flags, _In_opt_ PVOID UserData, _In_opt_ PVOID Owner)
NTSYSAPI VOID NTAPI RtlInitializeRangeList(_Out_ PRTL_RANGE_LIST RangeList)
NTSYSAPI VOID NTAPI RtlFreeRangeList(_In_ PRTL_RANGE_LIST RangeList)
#define RTL_RANGE_LIST_ADD_IF_CONFLICT
Definition: rtltypes.h:81
@ Start
Definition: partlist.h:33

Referenced by DriverEntry().

◆ PciBuildRequirementsList()

NTSTATUS NTAPI PciBuildRequirementsList ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PPCI_COMMON_HEADER  PciData,
OUT PIO_RESOURCE_REQUIREMENTS_LIST Buffer 
)

Definition at line 551 of file enum.c.

554{
556
558 UNREFERENCED_PARAMETER(PciData);
559
560 {
561 /* There aren't, so use the zero descriptor */
563
564 /* Does it actually exist yet? */
566 {
567 /* Allocate it, and use it for future use */
571 }
572
573 /* Return the zero requirements list to the caller */
575 DPRINT1("PCI - build resource reqs - early out, 0 resources\n");
576 return STATUS_SUCCESS;
577 }
578 return STATUS_SUCCESS;
579}
PIO_RESOURCE_REQUIREMENTS_LIST PciZeroIoResourceRequirements
Definition: enum.c:18
PIO_RESOURCE_REQUIREMENTS_LIST NTAPI PciAllocateIoRequirementsList(IN ULONG Count, IN ULONG BusNumber, IN ULONG SlotNumber)
Definition: enum.c:291
#define STATUS_INSUFFICIENT_RESOURCES
Definition: udferr_usr.h:158
_In_ WDFIORESREQLIST RequirementsList
Definition: wdfresource.h:65

Referenced by PciAssignSlotResources(), and PciQueryRequirements().

◆ PciCacheLegacyDeviceRouting()

NTSTATUS NTAPI PciCacheLegacyDeviceRouting ( IN PDEVICE_OBJECT  DeviceObject,
IN ULONG  BusNumber,
IN ULONG  SlotNumber,
IN UCHAR  InterruptLine,
IN UCHAR  InterruptPin,
IN UCHAR  BaseClass,
IN UCHAR  SubClass,
IN PDEVICE_OBJECT  PhysicalDeviceObject,
IN PPCI_PDO_EXTENSION  PdoExtension,
OUT PDEVICE_OBJECT pFoundDeviceObject 
)

Definition at line 70 of file routintf.c.

80{
82 PPCI_LEGACY_DEVICE LegacyDevice;
83 PDEVICE_OBJECT FoundDeviceObject;
84 PAGED_CODE();
85
86 /* Scan current registered devices */
87 LegacyDevice = PciLegacyDeviceHead;
89 while (LegacyDevice)
90 {
91 /* Find a match */
92 if ((BusNumber == LegacyDevice->BusNumber) &&
93 (SlotNumber == LegacyDevice->SlotNumber))
94 {
95 /* We already know about this routing */
96 break;
97 }
98
99 /* We know about device already, but for a different location */
100 if (LegacyDevice->DeviceObject == DeviceObject)
101 {
102 /* Free the existing structure, move to the next one */
103 *Link = LegacyDevice->Next;
104 ExFreePoolWithTag(LegacyDevice, 0);
105 LegacyDevice = *Link;
106 }
107 else
108 {
109 /* Keep going */
110 Link = &LegacyDevice->Next;
111 LegacyDevice = LegacyDevice->Next;
112 }
113 }
114
115 /* Did we find a match? */
116 if (!LegacyDevice)
117 {
118 /* Allocate a new cache structure */
119 LegacyDevice = ExAllocatePoolWithTag(PagedPool,
120 sizeof(PCI_LEGACY_DEVICE),
121 'PciR');
122 if (!LegacyDevice) return STATUS_INSUFFICIENT_RESOURCES;
123
124 /* Save all the data in it */
125 RtlZeroMemory(LegacyDevice, sizeof(PCI_LEGACY_DEVICE));
126 LegacyDevice->BusNumber = BusNumber;
127 LegacyDevice->SlotNumber = SlotNumber;
128 LegacyDevice->InterruptLine = InterruptLine;
129 LegacyDevice->InterruptPin = InterruptPin;
130 LegacyDevice->BaseClass = BaseClass;
131 LegacyDevice->SubClass = SubClass;
133 LegacyDevice->DeviceObject = DeviceObject;
134 LegacyDevice->PdoExtension = PdoExtension;
135
136 /* Link it in the list */
137 LegacyDevice->Next = PciLegacyDeviceHead;
138 PciLegacyDeviceHead = LegacyDevice;
139 }
140
141 /* Check if we found, or created, a matching caching structure */
142 FoundDeviceObject = LegacyDevice->DeviceObject;
143 if (FoundDeviceObject == DeviceObject)
144 {
145 /* Return the device object and success */
146 if (pFoundDeviceObject) *pFoundDeviceObject = DeviceObject;
147 return STATUS_SUCCESS;
148 }
149
150 /* Otherwise, this is a new device object for this location */
151 LegacyDevice->DeviceObject = DeviceObject;
152 if (pFoundDeviceObject) *pFoundDeviceObject = FoundDeviceObject;
153 return STATUS_SUCCESS;
154}
#define ExAllocatePoolWithTag(hernya, size, tag)
Definition: env_spec_w32.h:350
#define PagedPool
Definition: env_spec_w32.h:308
#define ExFreePoolWithTag(_P, _T)
Definition: module.h:1109
PPCI_LEGACY_DEVICE PciLegacyDeviceHead
Definition: routintf.c:18
UCHAR InterruptPin
Definition: pci.h:529
UCHAR SubClass
Definition: pci.h:531
UCHAR BaseClass
Definition: pci.h:530
PPCI_PDO_EXTENSION PdoExtension
Definition: pci.h:534
UCHAR InterruptLine
Definition: pci.h:528
PDEVICE_OBJECT PhysicalDeviceObject
Definition: pci.h:532
PDEVICE_OBJECT DeviceObject
Definition: pci.h:525
struct _PCI_LEGACY_DEVICE * Next
Definition: pci.h:524
ULONG BusNumber
Definition: pci.h:526
ULONG SlotNumber
Definition: pci.h:527
static int Link(const char **args)
Definition: vfdcmd.c:2414
_In_ WDFIORESREQLIST _In_ ULONG SlotNumber
Definition: wdfresource.h:68
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG BusNumber
Definition: halfuncs.h:160

Referenced by PciAssignSlotResources().

◆ PciCallDownIrpStack()

NTSTATUS NTAPI PciCallDownIrpStack ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN PIRP  Irp 
)

Definition at line 39 of file dispatch.c.

41{
44 PAGED_CODE();
45 DPRINT1("PciCallDownIrpStack ...\n");
46 ASSERT_FDO(DeviceExtension);
47
48 /* Initialize the wait event */
50
51 /* Setup a completion routine */
54
55 /* Call the attached device */
56 Status = IoCallDriver(DeviceExtension->AttachedDeviceObject, Irp);
58 {
59 /* Wait for it to complete the request, and get its status */
61 Status = Irp->IoStatus.Status;
62 }
63
64 /* Return that status back to the caller */
65 return Status;
66}
_In_ PIRP Irp
Definition: csq.h:116
IO_COMPLETION_ROUTINE PciSetEventCompletion
Definition: dispatch.c:18
#define ASSERT_FDO(x)
Definition: pci.h:37
#define KeWaitForSingleObject(pEvt, foo, a, b, c)
Definition: env_spec_w32.h:478
#define KeInitializeEvent(pEvt, foo, foo2)
Definition: env_spec_w32.h:477
#define IoSetCompletionRoutine(_Irp, _CompletionRoutine, _Context, _InvokeOnSuccess, _InvokeOnError, _InvokeOnCancel)
Definition: irp.cpp:490
#define KernelMode
Definition: asm.h:34
@ SynchronizationEvent
#define IoCopyCurrentIrpStackLocationToNext(Irp)
Definition: ntifs_ex.h:413
#define IoCallDriver
Definition: irp.c:1225
#define STATUS_PENDING
Definition: ntstatus.h:82
@ Executive
Definition: ketypes.h:415

Referenced by PciDispatchIrp(), and PciFdoIrpQueryInterface().

◆ PciCancelStateTransition()

NTSTATUS NTAPI PciCancelStateTransition ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN PCI_STATE  NewState 
)

Definition at line 145 of file state.c.

147{
149 DPRINT1("PCI Request to cancel transition of Extension %p to %s ->",
150 DeviceExtension,
151 PciTransitionText[StateNotEntered]);
152
153 /* The next state can't be the state the device is already in */
154 if (DeviceExtension->TentativeNextState == DeviceExtension->DeviceState)
155 {
156 /* It's too late since the state was already committed */
157 ASSERT(StateNotEntered < PciMaxObjectState);
158 ASSERT(PnpStateCancelArray[StateNotEntered] != STATUS_FAIL_CHECK);
159
160 /* Return failure */
162 DbgPrint("%x\n", Status);
163 }
164 else
165 {
166 /* The device hasn't yet entered the state, so it's still possible to cancel */
167 ASSERT(DeviceExtension->TentativeNextState == StateNotEntered);
168 DeviceExtension->TentativeNextState = DeviceExtension->DeviceState;
169
170 /* Return success */
172 DbgPrint("%x\n", Status);
173 }
174
175 /* Return the cancel state */
176 return Status;
177}
NTSTATUS PnpStateCancelArray[PciMaxObjectState]
Definition: state.c:29
#define STATUS_INVALID_DEVICE_STATE
Definition: udferr_usr.h:178

Referenced by PciFdoIrpStartDevice(), PciPdoIrpStartDevice(), and PciQueryDeviceRelations().

◆ PciCanDisableDecodes()

BOOLEAN NTAPI PciCanDisableDecodes ( IN PPCI_PDO_EXTENSION  DeviceExtension,
IN PPCI_COMMON_HEADER  Config,
IN ULONGLONG  HackFlags,
IN BOOLEAN  ForPowerDown 
)

Definition at line 955 of file utils.c.

959{
960 UCHAR BaseClass, SubClass;
961 BOOLEAN IsVga;
962
963 /* Is there a device extension or should the PCI header be used? */
964 if (DeviceExtension)
965 {
966 /* Never disable decodes for a debug PCI Device */
967 if (DeviceExtension->OnDebugPath) return FALSE;
968
969 /* Hack flags will be obtained from the extension, not the caller */
970 ASSERT(HackFlags == 0);
971
972 /* Get hacks and classification from the device extension */
973 HackFlags = DeviceExtension->HackFlags;
974 SubClass = DeviceExtension->SubClass;
975 BaseClass = DeviceExtension->BaseClass;
976 }
977 else
978 {
979 /* There must be a PCI header, go read the classification information */
980 ASSERT(Config != NULL);
981 BaseClass = Config->BaseClass;
982 SubClass = Config->SubClass;
983 }
984
985 /* Check for hack flags that prevent disabling the decodes */
989 {
990 /* Don't do it */
991 return FALSE;
992 }
993
994 /* Is this a VGA adapter? */
995 if ((BaseClass == PCI_CLASS_DISPLAY_CTLR) &&
996 (SubClass == PCI_SUBCLASS_VID_VGA_CTLR))
997 {
998 /* Never disable decodes if this is for power down */
999 return ForPowerDown;
1000 }
1001
1002 /* Check for legacy devices */
1003 if (BaseClass == PCI_CLASS_PRE_20)
1004 {
1005 /* Never disable video adapter cards if this is for power down */
1006 if (SubClass == PCI_SUBCLASS_PRE_20_VGA) return ForPowerDown;
1007 }
1008 else if (BaseClass == PCI_CLASS_DISPLAY_CTLR)
1009 {
1010 /* Never disable VGA adapters if this is for power down */
1011 if (SubClass == PCI_SUBCLASS_VID_VGA_CTLR) return ForPowerDown;
1012 }
1013 else if (BaseClass == PCI_CLASS_BRIDGE_DEV)
1014 {
1015 /* Check for legacy bridges */
1016 if ((SubClass == PCI_SUBCLASS_BR_ISA) ||
1017 (SubClass == PCI_SUBCLASS_BR_EISA) ||
1018 (SubClass == PCI_SUBCLASS_BR_MCA) ||
1019 (SubClass == PCI_SUBCLASS_BR_HOST) ||
1020 (SubClass == PCI_SUBCLASS_BR_OTHER))
1021 {
1022 /* Never disable these */
1023 return FALSE;
1024 }
1025 else if ((SubClass == PCI_SUBCLASS_BR_PCI_TO_PCI) ||
1026 (SubClass == PCI_SUBCLASS_BR_CARDBUS))
1027 {
1028 /* This is a supported bridge, but does it have a VGA card? */
1029 if (!DeviceExtension)
1030 {
1031 /* Read the bridge control flag from the PCI header */
1032 IsVga = Config->u.type1.BridgeControl & PCI_ENABLE_BRIDGE_VGA;
1033 }
1034 else
1035 {
1036 /* Read the cached flag in the device extension */
1037 IsVga = DeviceExtension->Dependent.type1.VgaBitSet;
1038 }
1039
1040 /* Never disable VGA adapters if this is for power down */
1041 if (IsVga) return ForPowerDown;
1042 }
1043 }
1044
1045 /* Finally, never disable decodes if there's no power management */
1046 return !(HackFlags & PCI_HACK_NO_PM_CAPS);
1047}
unsigned char BOOLEAN
_In_ ULONG_PTR HackFlags
Definition: cdrom.h:983
#define PCI_HACK_PRESERVE_COMMAND
Definition: pci.h:24
#define PCI_ENABLE_BRIDGE_VGA
Definition: pci.h:62
#define PCI_HACK_DONT_DISABLE_DECODES
Definition: pci.h:40
#define PCI_HACK_CB_SHARE_CMD_BITS
Definition: pci.h:26
#define PCI_HACK_NO_PM_CAPS
Definition: pci.h:39
_Must_inspect_result_ _In_ WDFDEVICE _In_ PWDF_CHILD_LIST_CONFIG Config
Definition: wdfchildlist.h:476
#define PCI_SUBCLASS_BR_OTHER
Definition: iotypes.h:4170
#define PCI_SUBCLASS_BR_EISA
Definition: iotypes.h:4163
#define PCI_SUBCLASS_BR_HOST
Definition: iotypes.h:4161
#define PCI_SUBCLASS_BR_MCA
Definition: iotypes.h:4164
#define PCI_SUBCLASS_BR_ISA
Definition: iotypes.h:4162
#define PCI_SUBCLASS_BR_CARDBUS
Definition: iotypes.h:4168
#define PCI_CLASS_PRE_20
Definition: iotypes.h:4103
#define PCI_SUBCLASS_VID_VGA_CTLR
Definition: iotypes.h:4144
#define PCI_SUBCLASS_PRE_20_VGA
Definition: iotypes.h:4125
#define PCI_CLASS_DISPLAY_CTLR
Definition: iotypes.h:4106

Referenced by PciDecodeEnable(), and PciSetPowerManagedDevicePowerState().

◆ pcicbintrf_Constructor()

NTSTATUS NTAPI pcicbintrf_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 109 of file cardbus.c.

115{
116 UNREFERENCED_PARAMETER(DeviceExtension);
118 UNREFERENCED_PARAMETER(InterfaceData);
122
123 /* Not yet implemented */
126}

◆ pcicbintrf_Initializer()

NTSTATUS NTAPI pcicbintrf_Initializer ( IN PVOID  Instance)

Definition at line 99 of file cardbus.c.

100{
102 /* PnP Interfaces don't get Initialized */
103 ASSERTMSG("PCI pcicbintrf_Initializer, unexpected call.\n", FALSE);
104 return STATUS_UNSUCCESSFUL;
105}

◆ PciClassifyDeviceType()

PCI_DEVICE_TYPES NTAPI PciClassifyDeviceType ( IN PPCI_PDO_EXTENSION  PdoExtension)

Definition at line 1051 of file utils.c.

1052{
1053 ASSERT(PdoExtension->ExtensionType == PciPdoExtensionType);
1054
1055 /* Differentiate between devices and bridges */
1056 if (PdoExtension->BaseClass != PCI_CLASS_BRIDGE_DEV) return PciTypeDevice;
1057
1058 /* The PCI Bus driver handles only CardBus and PCI bridges (plus host) */
1059 if (PdoExtension->SubClass == PCI_SUBCLASS_BR_HOST) return PciTypeHostBridge;
1062
1063 /* Any other kind of bridge is treated like a device */
1064 return PciTypeDevice;
1065}

Referenced by PciProcessBus().

◆ PciCommitStateTransition()

VOID NTAPI PciCommitStateTransition ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN PCI_STATE  NewState 
)

Definition at line 181 of file state.c.

183{
184 DPRINT1("PCI Commit transition of Extension %p to %s\n",
185 DeviceExtension, PciTransitionText[NewState]);
186
187 /* Make sure this is a valid commit */
188 ASSERT(NewState != PciSynchronizedOperation);
189 ASSERT(DeviceExtension->TentativeNextState == NewState);
190
191 /* Enter the new state */
192 DeviceExtension->DeviceState = NewState;
193}

Referenced by PciFdoIrpStartDevice(), and PciPdoIrpStartDevice().

◆ PciComputeNewCurrentSettings()

BOOLEAN NTAPI PciComputeNewCurrentSettings ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PCM_RESOURCE_LIST  ResourceList 
)

Definition at line 55 of file enum.c.

57{
58 PCM_PARTIAL_RESOURCE_DESCRIPTOR Partial, InterruptResource;
59 PCM_PARTIAL_RESOURCE_DESCRIPTOR BaseResource, CurrentDescriptor;
60 PCM_PARTIAL_RESOURCE_DESCRIPTOR PreviousDescriptor;
61 CM_PARTIAL_RESOURCE_DESCRIPTOR ResourceArray[7];
63 BOOLEAN DrainPartial, RangeChange;
64 ULONG i, j;
65 PPCI_FUNCTION_RESOURCES PciResources;
66 PAGED_CODE();
67
68 /* Make sure we have either no resources, or at least one */
69 ASSERT((ResourceList == NULL) || (ResourceList->Count == 1));
70
71 /* Initialize no partial, interrupt descriptor, or range change */
72 Partial = NULL;
73 InterruptResource = NULL;
74 RangeChange = FALSE;
75
76 /* Check if there's not actually any resources */
77 if (!(ResourceList) || !(ResourceList->Count))
78 {
79 /* Then just return the hardware update state */
80 return PdoExtension->UpdateHardware;
81 }
82
83 /* Print the new specified resource list */
85
86 /* Clear the temporary resource array */
87 for (i = 0; i < 7; i++) ResourceArray[i].Type = CmResourceTypeNull;
88
89 /* Loop the full resource descriptor */
90 FullList = ResourceList->List;
91 for (i = 0; i < ResourceList->Count; i++)
92 {
93 /* Initialize loop variables */
94 DrainPartial = FALSE;
95 BaseResource = NULL;
96
97 /* Loop the partial descriptors */
98 Partial = FullList->PartialResourceList.PartialDescriptors;
99 for (j = 0; j < FullList->PartialResourceList.Count; j++)
100 {
101 /* Check if we were supposed to drain a partial due to device data */
102 if (DrainPartial)
103 {
104 /* Draining complete, move on to the next descriptor then */
105 DrainPartial--;
106 continue;
107 }
108
109 /* Check what kind of descriptor this was */
110 switch (Partial->Type)
111 {
112 /* Base BAR resources */
115
116 /* Set it as the base */
117 ASSERT(BaseResource == NULL);
118 BaseResource = Partial;
119 break;
120
121 /* Interrupt resource */
123
124 /* Make sure it's a compatible (and the only) PCI interrupt */
125 ASSERT(InterruptResource == NULL);
126 ASSERT(Partial->u.Interrupt.Level == Partial->u.Interrupt.Vector);
127 InterruptResource = Partial;
128
129 /* Only 255 interrupts on x86/x64 hardware */
130 if (Partial->u.Interrupt.Level < 256)
131 {
132 /* Use the passed interrupt line */
133 PdoExtension->AdjustedInterruptLine = Partial->u.Interrupt.Level;
134 }
135 else
136 {
137 /* Invalid vector, so ignore it */
138 PdoExtension->AdjustedInterruptLine = 0;
139 }
140
141 break;
142
143 /* Check for specific device data */
145
146 /* Check what kind of data this was */
147 switch (Partial->u.DevicePrivate.Data[0])
148 {
149 /* Not used in the driver yet */
150 case 1:
152 break;
153
154 /* Not used in the driver yet */
155 case 2:
157 break;
158
159 /* A drain request */
160 case 3:
161 /* Shouldn't be a base resource, this is a drain */
162 ASSERT(BaseResource == NULL);
163 DrainPartial = Partial->u.DevicePrivate.Data[1];
164 ASSERT(DrainPartial == TRUE);
165 break;
166 }
167 break;
168 }
169
170 /* Move to the next descriptor */
171 Partial = CmiGetNextPartialDescriptor(Partial);
172 }
173
174 /* We should be starting a new list now */
175 ASSERT(BaseResource == NULL);
176 FullList = (PVOID)Partial;
177 }
178
179 /* Check the current assigned PCI resources */
180 PciResources = PdoExtension->Resources;
181 if (!PciResources) return FALSE;
182
183 //if... // MISSING CODE
185 DPRINT1("Missing sanity checking code!\n");
186
187 /* Loop all the PCI function resources */
188 for (i = 0; i < 7; i++)
189 {
190 /* Get the current function resource descriptor, and the new one */
191 CurrentDescriptor = &PciResources->Current[i];
192 Partial = &ResourceArray[i];
193
194 /* Previous is current during the first loop iteration */
195 PreviousDescriptor = &PciResources->Current[(i == 0) ? (0) : (i - 1)];
196
197 /* Check if this new descriptor is different than the old one */
198 if (((Partial->Type != CurrentDescriptor->Type) ||
199 (Partial->Type != CmResourceTypeNull)) &&
200 ((Partial->u.Generic.Start.QuadPart !=
201 CurrentDescriptor->u.Generic.Start.QuadPart) ||
202 (Partial->u.Generic.Length != CurrentDescriptor->u.Generic.Length)))
203 {
204 /* Record a change */
205 RangeChange = TRUE;
206
207 /* Was there a range before? */
208 if (CurrentDescriptor->Type != CmResourceTypeNull)
209 {
210 /* Print it */
211 DbgPrint(" Old range-\n");
212 PciDebugPrintPartialResource(CurrentDescriptor);
213 }
214 else
215 {
216 /* There was no range */
217 DbgPrint(" Previously unset range\n");
218 }
219
220 /* Print new one */
221 DbgPrint(" changed to\n");
223
224 /* Update to new range */
225 CurrentDescriptor->Type = Partial->Type;
226 PreviousDescriptor->u.Generic.Start = Partial->u.Generic.Start;
227 PreviousDescriptor->u.Generic.Length = Partial->u.Generic.Length;
228 CurrentDescriptor = PreviousDescriptor;
229 }
230 }
231
232 /* Either the hardware was updated, or a resource range changed */
233 return ((RangeChange) || (PdoExtension->UpdateHardware));
234}
Type
Definition: Type.h:7
FORCEINLINE PCM_PARTIAL_RESOURCE_DESCRIPTOR CmiGetNextPartialDescriptor(_In_ const CM_PARTIAL_RESOURCE_DESCRIPTOR *PartialDescriptor)
Definition: cmreslist.h:31
VOID NTAPI PciDebugPrintPartialResource(IN PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialResource)
Definition: debug.c:348
VOID NTAPI PciDebugPrintCmResList(IN PCM_RESOURCE_LIST PartialList)
Definition: debug.c:364
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint GLint GLint j
Definition: glfuncs.h:250
#define CmResourceTypeDevicePrivate
Definition: hwresource.cpp:131
#define CmResourceTypeInterrupt
Definition: hwresource.cpp:124
CM_PARTIAL_RESOURCE_LIST PartialResourceList
Definition: hwresource.cpp:160
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@393::@396 Interrupt
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@393::@400 DevicePrivate
CM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptors[1]
Definition: hwresource.cpp:119
CM_PARTIAL_RESOURCE_DESCRIPTOR Current[7]
Definition: pci.h:237
_Must_inspect_result_ _In_ WDFIORESREQLIST _In_opt_ PWDF_OBJECT_ATTRIBUTES _Out_ WDFIORESLIST * ResourceList
Definition: wdfresource.h:309

Referenced by PciAssignSlotResources(), and PciPdoIrpStartDevice().

◆ PciCreateIoDescriptorFromBarLimit()

BOOLEAN NTAPI PciCreateIoDescriptorFromBarLimit ( PIO_RESOURCE_DESCRIPTOR  ResourceDescriptor,
IN PULONG  BarArray,
IN BOOLEAN  Rom 
)

Definition at line 1175 of file utils.c.

1178{
1179 ULONG CurrentBar, BarLength, BarMask;
1180 BOOLEAN Is64BitBar = FALSE;
1181
1182 /* Check if the BAR is nor I/O nor memory */
1183 CurrentBar = BarArray[0];
1184 if (!(CurrentBar & ~PCI_ADDRESS_IO_SPACE))
1185 {
1186 /* Fail this descriptor */
1187 ResourceDescriptor->Type = CmResourceTypeNull;
1188 return FALSE;
1189 }
1190
1191 /* Set default flag and clear high words */
1192 ResourceDescriptor->Flags = 0;
1193 ResourceDescriptor->u.Generic.MaximumAddress.HighPart = 0;
1194 ResourceDescriptor->u.Generic.MinimumAddress.LowPart = 0;
1195 ResourceDescriptor->u.Generic.MinimumAddress.HighPart = 0;
1196
1197 /* Check for ROM Address */
1198 if (Rom)
1199 {
1200 /* Clean up the BAR to get just the address */
1201 CurrentBar &= PCI_ADDRESS_ROM_ADDRESS_MASK;
1202 if (!CurrentBar)
1203 {
1204 /* Invalid ar, fail this descriptor */
1205 ResourceDescriptor->Type = CmResourceTypeNull;
1206 return FALSE;
1207 }
1208
1209 /* ROM Addresses are always read only */
1210 ResourceDescriptor->Flags = CM_RESOURCE_MEMORY_READ_ONLY;
1211 }
1212
1213 /* Compute the length, assume it's the alignment for now */
1214 BarLength = PciGetLengthFromBar(CurrentBar);
1215 ResourceDescriptor->u.Generic.Length = BarLength;
1216 ResourceDescriptor->u.Generic.Alignment = BarLength;
1217
1218 /* Check what kind of BAR this is */
1219 if (CurrentBar & PCI_ADDRESS_IO_SPACE)
1220 {
1221 /* Use correct mask to decode the address */
1223
1224 /* Set this as an I/O Port descriptor */
1225 ResourceDescriptor->Type = CmResourceTypePort;
1226 ResourceDescriptor->Flags = CM_RESOURCE_PORT_IO;
1227 }
1228 else
1229 {
1230 /* Use correct mask to decode the address */
1232
1233 /* Set this as a memory descriptor */
1234 ResourceDescriptor->Type = CmResourceTypeMemory;
1235
1236 /* Check if it's 64-bit or 20-bit decode */
1237 if ((CurrentBar & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_64BIT)
1238 {
1239 /* The next BAR has the high word, read it */
1240 ResourceDescriptor->u.Port.MaximumAddress.HighPart = BarArray[1];
1241 Is64BitBar = TRUE;
1242 }
1243 else if ((CurrentBar & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_20BIT)
1244 {
1245 /* Use the correct mask to decode the address */
1246 BarMask = ~0xFFF0000F;
1247 }
1248
1249 /* Check if the BAR is listed as prefetchable memory */
1250 if (CurrentBar & PCI_ADDRESS_MEMORY_PREFETCHABLE)
1251 {
1252 /* Mark the descriptor in the same way */
1253 ResourceDescriptor->Flags |= CM_RESOURCE_MEMORY_PREFETCHABLE;
1254 }
1255 }
1256
1257 /* Now write down the maximum address based on the base + length */
1258 ResourceDescriptor->u.Port.MaximumAddress.QuadPart = (CurrentBar & BarMask) +
1259 BarLength - 1;
1260
1261 /* Return if this is a 64-bit BAR, so the loop code knows to skip the next one */
1262 return Is64BitBar;
1263}
ULONG NTAPI PciGetLengthFromBar(IN ULONG Bar)
Definition: utils.c:1158
#define CM_RESOURCE_MEMORY_PREFETCHABLE
Definition: cmtypes.h:123
#define CM_RESOURCE_PORT_IO
Definition: cmtypes.h:109
#define CM_RESOURCE_MEMORY_READ_ONLY
Definition: cmtypes.h:121
struct _IO_RESOURCE_DESCRIPTOR::@21::@22 Port
#define PCI_ADDRESS_MEMORY_PREFETCHABLE
Definition: iotypes.h:4232

Referenced by Device_SaveLimits(), and PPBridge_SaveLimits().

◆ PciDebugDumpCommonConfig()

VOID NTAPI PciDebugDumpCommonConfig ( IN PPCI_COMMON_HEADER  PciData)

Definition at line 207 of file debug.c.

208{
209 USHORT i;
210
211 /* Loop the PCI header */
212 for (i = 0; i < PCI_COMMON_HDR_LENGTH; i += 4)
213 {
214 /* Dump each DWORD and its offset */
215 DPRINT1(" %02x - %08x\n", i, *(PULONG)((ULONG_PTR)PciData + i));
216 }
217}
unsigned short USHORT
Definition: pedump.c:61
#define PCI_COMMON_HDR_LENGTH
Definition: iotypes.h:3594

Referenced by PcipGetFunctionLimits(), and PciScanBus().

◆ PciDebugDumpQueryCapabilities()

VOID NTAPI PciDebugDumpQueryCapabilities ( IN PDEVICE_CAPABILITIES  DeviceCaps)

Definition at line 221 of file debug.c.

222{
223 ULONG i;
224
225 /* Dump the capabilities */
226 DPRINT1("Capabilities\n Lock:%u, Eject:%u, Remove:%u, Dock:%u, UniqueId:%u\n",
227 DeviceCaps->LockSupported,
228 DeviceCaps->EjectSupported,
229 DeviceCaps->Removable,
230 DeviceCaps->DockDevice,
231 DeviceCaps->UniqueID);
232 DbgPrint(" SilentInstall:%u, RawOk:%u, SurpriseOk:%u\n",
233 DeviceCaps->SilentInstall,
234 DeviceCaps->RawDeviceOK,
235 DeviceCaps->SurpriseRemovalOK);
236 DbgPrint(" Address %08x, UINumber %08x, Latencies D1 %u, D2 %u, D3 %u\n",
237 DeviceCaps->Address,
238 DeviceCaps->UINumber,
239 DeviceCaps->D1Latency,
240 DeviceCaps->D2Latency,
241 DeviceCaps->D3Latency);
242
243 /* Dump and convert the wake levels */
244 DbgPrint(" System Wake: %s, Device Wake: %s\n DeviceState[PowerState] [",
245 SystemPowerStates[min(DeviceCaps->SystemWake, PowerSystemMaximum)],
246 DevicePowerStates[min(DeviceCaps->DeviceWake, PowerDeviceMaximum)]);
247
248 /* Dump and convert the power state mappings */
250 DbgPrint(" %s", DevicePowerStates[DeviceCaps->DeviceState[i]]);
251
252 /* Finish the dump */
253 DbgPrint(" ]\n");
254}
PCHAR SystemPowerStates[]
Definition: debug.c:53
PCHAR DevicePowerStates[]
Definition: debug.c:64
#define min(a, b)
Definition: monoChain.cc:55
@ PowerSystemMaximum
Definition: ntpoapi.h:42
@ PowerSystemWorking
Definition: ntpoapi.h:36
@ PowerDeviceMaximum
Definition: ntpoapi.h:53

Referenced by PciFdoIrpQueryCapabilities(), and PciQueryCapabilities().

◆ PciDebugIrpDispatchDisplay()

BOOLEAN NTAPI PciDebugIrpDispatchDisplay ( IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension,
IN USHORT  MaxMinor 
)

Definition at line 124 of file debug.c.

127{
128 PPCI_PDO_EXTENSION PdoDeviceExtension;
129 ULONG BreakMask;
130 //ULONG DebugLevel = 0;
131 PCHAR IrpString;
132
133 /* Only two functions are recognized */
134 switch (IoStackLocation->MajorFunction)
135 {
136 case IRP_MJ_POWER:
137
138 /* Get the string and the correct break mask for the extension */
139 BreakMask = (DeviceExtension->ExtensionType == PciPdoExtensionType) ?
141 IrpString = PciDebugPoIrpTypeToText(IoStackLocation->MinorFunction);
142 break;
143
144 case IRP_MJ_PNP:
145
146 /* Get the string and the correct break mask for the extension */
147 BreakMask = (DeviceExtension->ExtensionType == PciFdoExtensionType) ?
149 IrpString = PciDebugPnpIrpTypeToText(IoStackLocation->MinorFunction);
150 break;
151
152 default:
153
154 /* Other functions are not decoded */
155 BreakMask = FALSE;
156 IrpString = "";
157 break;
158 }
159
160 /* Check if this is a PDO */
161 if (DeviceExtension->ExtensionType == PciPdoExtensionType)
162 {
163 /* Choose the correct debug level based on which function this is */
164 if (IoStackLocation->MajorFunction == IRP_MJ_POWER)
165 {
166 //DebugLevel = 0x500;
167 }
168 else if (IoStackLocation->MajorFunction == IRP_MJ_PNP)
169 {
170 //DebugLevel = 0x200;
171 }
172
173 /* For a PDO, print out the bus, device, and function number */
174 PdoDeviceExtension = (PVOID)DeviceExtension;
175 DPRINT1("PDO(b=0x%x, d=0x%x, f=0x%x)<-%s\n",
176 PdoDeviceExtension->ParentFdoExtension->BaseBus,
177 PdoDeviceExtension->Slot.u.bits.DeviceNumber,
178 PdoDeviceExtension->Slot.u.bits.FunctionNumber,
179 IrpString);
180 }
181 else if (DeviceExtension->ExtensionType == PciFdoExtensionType)
182 {
183 /* Choose the correct debug level based on which function this is */
184 if (IoStackLocation->MajorFunction == IRP_MJ_POWER)
185 {
186 //DebugLevel = 0x400;
187 }
188 else if (IoStackLocation->MajorFunction == IRP_MJ_PNP)
189 {
190 //DebugLevel = 0x100;
191 }
192
193 /* For an FDO, just dump the extension pointer and IRP string */
194 DPRINT1("FDO(%p)<-%s\n", DeviceExtension, IrpString);
195 }
196
197 /* If the function is illegal for this extension, complain */
198 if (IoStackLocation->MinorFunction > MaxMinor)
199 DPRINT1("Unknown IRP, minor = 0x%x\n", IoStackLocation->MinorFunction);
200
201 /* Return whether or not the debugger should be broken into for this IRP */
202 return ((1 << IoStackLocation->MinorFunction) & BreakMask);
203}
#define IRP_MJ_PNP
Definition: cdrw_usr.h:52
ULONG PciBreakOnFdoPnpIrp
Definition: debug.c:74
ULONG PciBreakOnPdoPowerIrp
Definition: debug.c:73
PCHAR NTAPI PciDebugPnpIrpTypeToText(IN USHORT MinorFunction)
Definition: debug.c:80
ULONG PciBreakOnPdoPnpIrp
Definition: debug.c:74
PCHAR NTAPI PciDebugPoIrpTypeToText(IN USHORT MinorFunction)
Definition: debug.c:102
ULONG PciBreakOnFdoPowerIrp
Definition: debug.c:73
PCI_SLOT_NUMBER Slot
Definition: pci.h:272
PPCI_FDO_EXTENSION ParentFdoExtension
Definition: pci.h:274
struct _PCI_SLOT_NUMBER::@4017::@4018 bits
union _PCI_SLOT_NUMBER::@4017 u
char * PCHAR
Definition: typedefs.h:51
#define IRP_MJ_POWER

Referenced by PciDispatchIrp().

◆ PciDebugPrintCmResList()

VOID NTAPI PciDebugPrintCmResList ( IN PCM_RESOURCE_LIST  ResourceList)

Definition at line 364 of file debug.c.

365{
366 PCM_FULL_RESOURCE_DESCRIPTOR FullDescriptor;
367 PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptor;
368 ULONG Count, i, ListCount;
369
370 /* Make sure there's something to dump */
371 if (!PartialList) return;
372
373 /* Get the full list count */
374 ListCount = PartialList->Count;
375 FullDescriptor = PartialList->List;
376 DPRINT1(" CM_RESOURCE_LIST (PCI Bus Driver) (List Count = %u)\n", PartialList->Count);
377
378 /* Loop full list */
379 for (i = 0; i < ListCount; i++)
380 {
381 /* Loop full descriptor */
382 DPRINT1(" InterfaceType %d\n", FullDescriptor->InterfaceType);
383 DPRINT1(" BusNumber 0x%x\n", FullDescriptor->BusNumber);
384
385 /* Get partial count and loop partials */
386 Count = FullDescriptor->PartialResourceList.Count;
387 for (PartialDescriptor = FullDescriptor->PartialResourceList.PartialDescriptors;
388 Count;
389 PartialDescriptor = CmiGetNextPartialDescriptor(PartialDescriptor))
390 {
391 /* Print each partial */
392 PciDebugPrintPartialResource(PartialDescriptor);
393 Count--;
394 }
395
396 /* Go to the next full descriptor */
397 FullDescriptor = (PCM_FULL_RESOURCE_DESCRIPTOR)PartialDescriptor;
398 }
399
400 /* Done printing data */
401 DPRINT1("\n");
402}
struct _CM_FULL_RESOURCE_DESCRIPTOR * PCM_FULL_RESOURCE_DESCRIPTOR
int Count
Definition: noreturn.cpp:7

Referenced by PciComputeNewCurrentSettings().

◆ PciDebugPrintIoResReqList()

VOID NTAPI PciDebugPrintIoResReqList ( IN PIO_RESOURCE_REQUIREMENTS_LIST  Requirements)

Definition at line 302 of file debug.c.

303{
304 ULONG AlternativeLists;
306 ULONG Count;
308
309 /* Make sure there's a list */
310 if (!Requirements) return;
311
312 /* Grab the main list and the alternates as well */
313 AlternativeLists = Requirements->AlternativeLists;
314 List = Requirements->List;
315
316 /* Print out the initial header*/
317 DPRINT1(" IO_RESOURCE_REQUIREMENTS_LIST (PCI Bus Driver)\n");
318 DPRINT1(" InterfaceType %d\n", Requirements->InterfaceType);
319 DPRINT1(" BusNumber 0x%x\n", Requirements->BusNumber);
320 DPRINT1(" SlotNumber %d (0x%x), (d/f = 0x%x/0x%x)\n",
321 Requirements->SlotNumber,
322 Requirements->SlotNumber,
323 ((PCI_SLOT_NUMBER*)&Requirements->SlotNumber)->u.bits.DeviceNumber,
324 ((PCI_SLOT_NUMBER*)&Requirements->SlotNumber)->u.bits.FunctionNumber);
325 DPRINT1(" AlternativeLists %u\n", AlternativeLists);
326
327 /* Scan alternative lists */
328 while (AlternativeLists--)
329 {
330 /* Get the descriptor array, and the count of descriptors */
331 Descriptor = List->Descriptors;
332 Count = List->Count;
333
334 /* Print out each descriptor */
335 DPRINT1("\n List[%u].Count = %u\n", AlternativeLists, Count);
337
338 /* Should've reached a new list now */
340 }
341
342 /* Terminate the dump */
343 DPRINT1("\n");
344}
struct _IO_RESOURCE_LIST * PIO_RESOURCE_LIST
VOID NTAPI PciDebugPrintIoResource(IN PIO_RESOURCE_DESCRIPTOR Descriptor)
Definition: debug.c:279
_Must_inspect_result_ _In_ WDFCMRESLIST List
Definition: wdfresource.h:550

Referenced by PciQueryRequirements().

◆ PciDebugPrintPartialResource()

VOID NTAPI PciDebugPrintPartialResource ( IN PCM_PARTIAL_RESOURCE_DESCRIPTOR  PartialResource)

Definition at line 348 of file debug.c.

349{
350 /* Dump all the data in the partial */
351 DPRINT1(" Partial Resource Descriptor @0x%p\n", PartialResource);
352 DPRINT1(" Type = %u (%s)\n", PartialResource->Type, PciDebugCmResourceTypeToText(PartialResource->Type));
353 DPRINT1(" ShareDisposition = %u\n", PartialResource->ShareDisposition);
354 DPRINT1(" Flags = 0x%04X\n", PartialResource->Flags);
355 DPRINT1(" Data[%d] = %08x %08x %08x\n",
356 0,
357 PartialResource->u.Generic.Start.LowPart,
358 PartialResource->u.Generic.Start.HighPart,
359 PartialResource->u.Generic.Length);
360}
PCHAR NTAPI PciDebugCmResourceTypeToText(IN UCHAR Type)
Definition: debug.c:258

Referenced by PciComputeNewCurrentSettings(), and PciDebugPrintCmResList().

◆ PciDecodeEnable()

VOID NTAPI PciDecodeEnable ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN BOOLEAN  Enable,
OUT PUSHORT  Command 
)

Definition at line 1267 of file utils.c.

1270{
1271 USHORT CommandValue;
1272
1273 /*
1274 * If decodes are being disabled, make sure it's allowed, and in both cases,
1275 * make sure that a hackflag isn't preventing touching the decodes at all.
1276 */
1277 if (((Enable) || (PciCanDisableDecodes(PdoExtension, 0, 0, 0))) &&
1279 {
1280 /* Did the caller already have a command word? */
1281 if (Command)
1282 {
1283 /* Use the caller's */
1284 CommandValue = *Command;
1285 }
1286 else
1287 {
1288 /* Otherwise, read the current command */
1290 &Command,
1292 sizeof(USHORT));
1293 }
1294
1295 /* Turn off decodes by default */
1296 CommandValue &= ~(PCI_ENABLE_IO_SPACE |
1299
1300 /* If requested, enable the decodes that were enabled at init time */
1301 if (Enable) CommandValue |= PdoExtension->CommandEnables &
1305
1306 /* Update the command word */
1308 &CommandValue,
1310 sizeof(USHORT));
1311 }
1312}
VOID NTAPI PciWriteDeviceConfig(IN PPCI_PDO_EXTENSION DeviceExtension, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: config.c:91
VOID NTAPI PciReadDeviceConfig(IN PPCI_PDO_EXTENSION DeviceExtension, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: config.c:107
BOOLEAN NTAPI PciCanDisableDecodes(IN PPCI_PDO_EXTENSION DeviceExtension, IN PPCI_COMMON_HEADER Config, IN ULONGLONG HackFlags, IN BOOLEAN ForPowerDown)
Definition: utils.c:955
_In_ ULONGLONG _In_ ULONGLONG _In_ BOOLEAN Enable
Definition: ntddpcm.h:142
Definition: shell.h:41
#define FIELD_OFFSET(t, f)
Definition: typedefs.h:255
#define PCI_ENABLE_BUS_MASTER
Definition: iotypes.h:3618
#define PCI_ENABLE_IO_SPACE
Definition: iotypes.h:3616
#define PCI_ENABLE_MEMORY_SPACE
Definition: iotypes.h:3617

Referenced by PciApplyHacks(), PciConfigureIdeController(), and PcipUpdateHardware().

◆ PciDispatchIrp()

NTSTATUS NTAPI PciDispatchIrp ( IN PDEVICE_OBJECT  DeviceObject,
IN PIRP  Irp 
)

Definition at line 99 of file dispatch.c.

101{
102 PPCI_FDO_EXTENSION DeviceExtension;
103 PIO_STACK_LOCATION IoStackLocation;
104 PPCI_MJ_DISPATCH_TABLE IrpDispatchTable;
105 BOOLEAN PassToPdo;
107 PPCI_MN_DISPATCH_TABLE TableArray = NULL, Table;
108 USHORT MaxMinor;
109 PCI_DISPATCH_STYLE DispatchStyle = 0;
110 PCI_DISPATCH_FUNCTION DispatchFunction = NULL;
111 DPRINT1("PCI: Dispatch IRP\n");
112
113 /* Get the extension and I/O stack location for this IRP */
114 DeviceExtension = (PPCI_FDO_EXTENSION)DeviceObject->DeviceExtension;
115 IoStackLocation = IoGetCurrentIrpStackLocation(Irp);
116 ASSERT((DeviceExtension->ExtensionType == PciPdoExtensionType) ||
117 (DeviceExtension->ExtensionType == PciFdoExtensionType));
118
119 /* Deleted extensions don't respond to IRPs */
120 if (DeviceExtension->DeviceState == PciDeleted)
121 {
122 /* Fail this IRP */
124 PassToPdo = FALSE;
125 }
126 else
127 {
128 /* Otherwise, get the dispatch table for the extension */
129 IrpDispatchTable = DeviceExtension->IrpDispatchTable;
130
131 /* And choose which function table to use */
132 switch (IoStackLocation->MajorFunction)
133 {
134 case IRP_MJ_POWER:
135
136 /* Power Manager IRPs */
137 TableArray = IrpDispatchTable->PowerIrpDispatchTable;
138 MaxMinor = IrpDispatchTable->PowerIrpMaximumMinorFunction;
139 break;
140
141 case IRP_MJ_PNP:
142
143 /* Plug-and-Play Manager IRPs */
144 TableArray = IrpDispatchTable->PnpIrpDispatchTable;
145 MaxMinor = IrpDispatchTable->PnpIrpMaximumMinorFunction;
146 break;
147
149
150 /* WMI IRPs */
151 DispatchFunction = IrpDispatchTable->SystemControlIrpDispatchFunction;
152 DispatchStyle = IrpDispatchTable->SystemControlIrpDispatchStyle;
153 MaxMinor = 0xFFFF;
154 break;
155
156 default:
157
158 /* Unrecognized IRPs */
159 DispatchFunction = IrpDispatchTable->OtherIrpDispatchFunction;
160 DispatchStyle = IrpDispatchTable->OtherIrpDispatchStyle;
161 MaxMinor = 0xFFFF;
162 break;
163 }
164
165 /* Only deal with recognized IRPs */
166 if (MaxMinor != 0xFFFF)
167 {
168 /* Make sure the function is recognized */
169 if (IoStackLocation->MinorFunction > MaxMinor)
170 {
171 /* Pick the terminator, which should return unrecognized */
172 Table = &TableArray[MaxMinor + 1];
173 }
174 else
175 {
176 /* Pick the appropriate table for this function */
177 Table = &TableArray[IoStackLocation->MinorFunction];
178 }
179
180 /* From that table, get the function code and dispatch style */
181 DispatchStyle = Table->DispatchStyle;
182 DispatchFunction = Table->DispatchFunction;
183 }
184
185 /* Print out debugging information, and see if we should break */
186 if (PciDebugIrpDispatchDisplay(IoStackLocation,
187 DeviceExtension,
188 MaxMinor))
189 {
190 /* The developer/user wants us to break for this IRP, do it */
192 }
193
194 /* Check if this IRP should be sent up the stack first */
195 if (DispatchStyle == IRP_UPWARD)
196 {
197 /* Do it now before handling it ourselves */
198 PciCallDownIrpStack(DeviceExtension, Irp);
199 }
200
201 /* Call the our driver's handler for this IRP and deal with the IRP */
202 Status = DispatchFunction(Irp, IoStackLocation, DeviceExtension);
203 switch (DispatchStyle)
204 {
205 /* Complete IRPs are completely immediately by our driver */
206 case IRP_COMPLETE:
207 PassToPdo = FALSE;
208 break;
209
210 /* Downward IRPs are send to the attached FDO */
211 case IRP_DOWNWARD:
212 PassToPdo = TRUE;
213 break;
214
215 /* Upward IRPs are completed immediately by our driver */
216 case IRP_UPWARD:
217 PassToPdo = FALSE;
218 break;
219
220 /* Dispatch IRPs are immediately returned */
221 case IRP_DISPATCH:
222 return Status;
223
224 /* There aren't any other dispatch styles! */
225 default:
226 ASSERT(FALSE);
227 return Status;
228 }
229 }
230
231 /* Pending IRPs are returned immediately */
232 if (Status == STATUS_PENDING) return Status;
233
234 /* Handled IRPs return their status in the status block */
235 if (Status != STATUS_NOT_SUPPORTED) Irp->IoStatus.Status = Status;
236
237 /* Successful, or unhandled IRPs that are "DOWNWARD" are sent to the PDO */
238 if ((PassToPdo) && ((NT_SUCCESS(Status)) || (Status == STATUS_NOT_SUPPORTED)))
239 {
240 /* Let the PDO deal with it */
241 Status = PciPassIrpFromFdoToPdo(DeviceExtension, Irp);
242 }
243 else
244 {
245 /* Otherwise, the IRP is returned with its status */
246 Status = Irp->IoStatus.Status;
247
248 /* Power IRPs need to notify the Power Manager that the next IRP can go */
249 if (IoStackLocation->MajorFunction == IRP_MJ_POWER) PoStartNextPowerIrp(Irp);
250
251 /* And now this IRP can be completed */
253 }
254
255 /* And the status returned back to the caller */
256 return Status;
257}
BOOLEAN NTAPI PciDebugIrpDispatchDisplay(IN PIO_STACK_LOCATION IoStackLocation, IN PPCI_FDO_EXTENSION DeviceExtension, IN USHORT MaxMinor)
Definition: debug.c:124
NTSTATUS NTAPI PciCallDownIrpStack(IN PPCI_FDO_EXTENSION DeviceExtension, IN PIRP Irp)
Definition: dispatch.c:39
NTSTATUS NTAPI PciPassIrpFromFdoToPdo(IN PPCI_FDO_EXTENSION DeviceExtension, IN PIRP Irp)
Definition: dispatch.c:70
NTSTATUS(NTAPI * PCI_DISPATCH_FUNCTION)(IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, IN PVOID DeviceExtension)
Definition: pci.h:325
ASMGENDATA Table[]
Definition: genincdata.c:61
#define IoCompleteRequest
Definition: irp.c:1240
VOID NTAPI PoStartNextPowerIrp(IN PIRP Irp)
Definition: power.c:758
BOOLEAN DeviceState
Definition: pci.h:197
ULONG ExtensionType
Definition: pci.h:195
struct _PCI_MJ_DISPATCH_TABLE * IrpDispatchTable
Definition: pci.h:196
ULONG PnpIrpMaximumMinorFunction
Definition: pci.h:345
PCI_DISPATCH_FUNCTION SystemControlIrpDispatchFunction
Definition: pci.h:350
PPCI_MN_DISPATCH_TABLE PowerIrpDispatchTable
Definition: pci.h:348
PCI_DISPATCH_STYLE OtherIrpDispatchStyle
Definition: pci.h:351
PCI_DISPATCH_FUNCTION OtherIrpDispatchFunction
Definition: pci.h:352
ULONG PowerIrpMaximumMinorFunction
Definition: pci.h:347
PPCI_MN_DISPATCH_TABLE PnpIrpDispatchTable
Definition: pci.h:346
PCI_DISPATCH_STYLE SystemControlIrpDispatchStyle
Definition: pci.h:349
__drv_aliasesMem FORCEINLINE PIO_STACK_LOCATION IoGetCurrentIrpStackLocation(_In_ PIRP Irp)
Definition: iofuncs.h:2793
#define IO_NO_INCREMENT
Definition: iotypes.h:598
#define IRP_MJ_SYSTEM_CONTROL

◆ PciExecuteCriticalSystemRoutine()

ULONG_PTR NTAPI PciExecuteCriticalSystemRoutine ( IN ULONG_PTR  IpiContext)

Definition at line 1069 of file utils.c.

1070{
1072
1073 /* Check if the IPI is already running */
1074 if (!InterlockedDecrement(&Context->RunCount))
1075 {
1076 /* Nope, this is the first instance, so execute the IPI function */
1077 Context->Function(Context->DeviceExtension, Context->Context);
1078
1079 /* Notify anyone that was spinning that they can stop now */
1080 Context->Barrier = 0;
1081 }
1082 else
1083 {
1084 /* Spin until it has finished running */
1085 while (Context->Barrier);
1086 }
1087
1088 /* Done */
1089 return 0;
1090}
#define InterlockedDecrement
Definition: armddk.h:52
struct _PCI_IPI_CONTEXT * PPCI_IPI_CONTEXT

◆ PciFdoIrpCancelRemoveDevice()

NTSTATUS NTAPI PciFdoIrpCancelRemoveDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 152 of file fdo.c.

155{
157 UNREFERENCED_PARAMETER(IoStackLocation);
158 UNREFERENCED_PARAMETER(DeviceExtension);
159
162}

◆ PciFdoIrpCancelStopDevice()

NTSTATUS NTAPI PciFdoIrpCancelStopDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 194 of file fdo.c.

197{
199 UNREFERENCED_PARAMETER(IoStackLocation);
200 UNREFERENCED_PARAMETER(DeviceExtension);
201
204}

◆ PciFdoIrpDeviceUsageNotification()

NTSTATUS NTAPI PciFdoIrpDeviceUsageNotification ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 337 of file fdo.c.

340{
342 UNREFERENCED_PARAMETER(IoStackLocation);
343 UNREFERENCED_PARAMETER(DeviceExtension);
344
347}

◆ PciFdoIrpQueryCapabilities()

NTSTATUS NTAPI PciFdoIrpQueryCapabilities ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 310 of file fdo.c.

313{
315 PAGED_CODE();
316 ASSERT_FDO(DeviceExtension);
317
319
320 /* Get the capabilities */
321 Capabilities = IoStackLocation->Parameters.DeviceCapabilities.Capabilities;
322
323 /* Inherit wake levels and power mappings from the higher-up capabilities */
324 DeviceExtension->PowerState.SystemWakeLevel = Capabilities->SystemWake;
325 DeviceExtension->PowerState.DeviceWakeLevel = Capabilities->DeviceWake;
326 RtlCopyMemory(DeviceExtension->PowerState.SystemStateMapping,
327 Capabilities->DeviceState,
328 sizeof(DeviceExtension->PowerState.SystemStateMapping));
329
330 /* Dump the capabilities and return success */
332 return STATUS_SUCCESS;
333}
VOID NTAPI PciDebugDumpQueryCapabilities(IN PDEVICE_CAPABILITIES DeviceCaps)
Definition: debug.c:221
_Must_inspect_result_ typedef _Out_ PHIDP_CAPS Capabilities
Definition: hidclass.h:103
#define RtlCopyMemory(Destination, Source, Length)
Definition: typedefs.h:263
* PDEVICE_CAPABILITIES
Definition: iotypes.h:965

◆ PciFdoIrpQueryDeviceRelations()

NTSTATUS NTAPI PciFdoIrpQueryDeviceRelations ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 208 of file fdo.c.

211{
213 PAGED_CODE();
214
215 /* Are bus relations being queried? */
216 if (IoStackLocation->Parameters.QueryDeviceRelations.Type != BusRelations)
217 {
218 /* The FDO is a bus, so only bus relations can be obtained */
220 }
221 else
222 {
223 /* Scan the PCI bus and build the device relations for the caller */
224 Status = PciQueryDeviceRelations(DeviceExtension,
226 &Irp->IoStatus.Information);
227 }
228
229 /* Return the enumeration status back */
230 return Status;
231}
NTSTATUS NTAPI PciQueryDeviceRelations(IN PPCI_FDO_EXTENSION DeviceExtension, IN OUT PDEVICE_RELATIONS *pDeviceRelations)
Definition: enum.c:2034
@ BusRelations
Definition: iotypes.h:2152

◆ PciFdoIrpQueryInterface()

NTSTATUS NTAPI PciFdoIrpQueryInterface ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 235 of file fdo.c.

238{
240 PAGED_CODE();
241 ASSERT(DeviceExtension->ExtensionType == PciFdoExtensionType);
242
243 /* Deleted extensions don't respond to IRPs */
244 if (DeviceExtension->DeviceState == PciDeleted)
245 {
246 /* Hand it back to try to deal with it */
247 return PciPassIrpFromFdoToPdo(DeviceExtension, Irp);
248 }
249
250 /* Query our driver for this interface */
251 Status = PciQueryInterface(DeviceExtension,
252 IoStackLocation->Parameters.QueryInterface.
254 IoStackLocation->Parameters.QueryInterface.
255 Size,
256 IoStackLocation->Parameters.QueryInterface.
257 Version,
258 IoStackLocation->Parameters.QueryInterface.
260 IoStackLocation->Parameters.QueryInterface.
261 Interface,
262 FALSE);
263 if (NT_SUCCESS(Status))
264 {
265 /* We found it, let the PDO handle it */
266 Irp->IoStatus.Status = Status;
267 return PciPassIrpFromFdoToPdo(DeviceExtension, Irp);
268 }
269 else if (Status == STATUS_NOT_SUPPORTED)
270 {
271 /* Otherwise, we can't handle it, let someone else down the stack try */
272 Status = PciCallDownIrpStack(DeviceExtension, Irp);
274 {
275 /* They can't either, try a last-resort interface lookup */
276 Status = PciQueryInterface(DeviceExtension,
277 IoStackLocation->Parameters.QueryInterface.
279 IoStackLocation->Parameters.QueryInterface.
280 Size,
281 IoStackLocation->Parameters.QueryInterface.
282 Version,
283 IoStackLocation->Parameters.QueryInterface.
285 IoStackLocation->Parameters.QueryInterface.
286 Interface,
287 TRUE);
288 }
289 }
290
291 /* Has anyone claimed this interface yet? */
293 {
294 /* No, return the original IRP status */
295 Status = Irp->IoStatus.Status;
296 }
297 else
298 {
299 /* Yes, set the new IRP status */
300 Irp->IoStatus.Status = Status;
301 }
302
303 /* Complete this IRP */
305 return Status;
306}
NTSTATUS NTAPI PciQueryInterface(IN PPCI_FDO_EXTENSION DeviceExtension, IN CONST GUID *InterfaceType, IN ULONG Size, IN ULONG Version, IN PVOID InterfaceData, IN PINTERFACE Interface, IN BOOLEAN LastChance)
Definition: intrface.c:45
_Must_inspect_result_ _In_ WDFDEVICE _In_ LPCGUID InterfaceType
Definition: wdffdo.h:463
_Must_inspect_result_ _In_ WDFDEVICE _In_ LPCGUID _Out_ PINTERFACE _In_ USHORT _In_ USHORT _In_opt_ PVOID InterfaceSpecificData
Definition: wdffdo.h:472

◆ PciFdoIrpQueryLegacyBusInformation()

NTSTATUS NTAPI PciFdoIrpQueryLegacyBusInformation ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 365 of file fdo.c.

368{
370 UNREFERENCED_PARAMETER(IoStackLocation);
371 UNREFERENCED_PARAMETER(DeviceExtension);
372
375}

◆ PciFdoIrpQueryPower()

NTSTATUS NTAPI PciFdoIrpQueryPower ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 236 of file power.c.

239{
241 UNREFERENCED_PARAMETER(IoStackLocation);
242 UNREFERENCED_PARAMETER(DeviceExtension);
243
245 while (TRUE);
247}

◆ PciFdoIrpQueryRemoveDevice()

NTSTATUS NTAPI PciFdoIrpQueryRemoveDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 124 of file fdo.c.

127{
129 UNREFERENCED_PARAMETER(IoStackLocation);
130 UNREFERENCED_PARAMETER(DeviceExtension);
131
134}

◆ PciFdoIrpQueryStopDevice()

NTSTATUS NTAPI PciFdoIrpQueryStopDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 180 of file fdo.c.

183{
185 UNREFERENCED_PARAMETER(IoStackLocation);
186 UNREFERENCED_PARAMETER(DeviceExtension);
187
190}

◆ PciFdoIrpRemoveDevice()

NTSTATUS NTAPI PciFdoIrpRemoveDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 138 of file fdo.c.

141{
143 UNREFERENCED_PARAMETER(IoStackLocation);
144 UNREFERENCED_PARAMETER(DeviceExtension);
145
148}

◆ PciFdoIrpStartDevice()

NTSTATUS NTAPI PciFdoIrpStartDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 76 of file fdo.c.

79{
82 PAGED_CODE();
83
84 /* The device stack must be starting the FDO in a success path */
85 if (!NT_SUCCESS(Irp->IoStatus.Status)) return STATUS_NOT_SUPPORTED;
86
87 /* Attempt to switch the state machine to the started state */
88 Status = PciBeginStateTransition(DeviceExtension, PciStarted);
89 if (!NT_SUCCESS(Status)) return Status;
90
91 /* Check for any boot-provided resources */
92 Resources = IoStackLocation->Parameters.StartDevice.AllocatedResources;
93 if ((Resources) && !(PCI_IS_ROOT_FDO(DeviceExtension)))
94 {
95 /* These resources would only be for non-root FDOs, unhandled for now */
96 ASSERT(Resources->Count == 1);
98 }
99
100 /* Initialize the arbiter for this FDO */
101 Status = PciInitializeArbiterRanges(DeviceExtension, Resources);
102 if (!NT_SUCCESS(Status))
103 {
104 /* Cancel the transition if this failed */
105 PciCancelStateTransition(DeviceExtension, PciStarted);
106 return Status;
107 }
108
109 /* Again, check for boot-provided resources for non-root FDO */
110 if ((Resources) && !(PCI_IS_ROOT_FDO(DeviceExtension)))
111 {
112 /* Unhandled for now */
113 ASSERT(Resources->Count == 1);
115 }
116
117 /* Commit the transition to the started state */
118 PciCommitStateTransition(DeviceExtension, PciStarted);
119 return STATUS_SUCCESS;
120}
NTSTATUS NTAPI PciInitializeArbiterRanges(IN PPCI_FDO_EXTENSION DeviceExtension, IN PCM_RESOURCE_LIST Resources)
Definition: arb_comn.c:128
NTSTATUS NTAPI PciCancelStateTransition(IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
Definition: state.c:145
NTSTATUS NTAPI PciBeginStateTransition(IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
Definition: state.c:97
VOID NTAPI PciCommitStateTransition(IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_STATE NewState)
Definition: state.c:181

◆ PciFdoIrpStopDevice()

NTSTATUS NTAPI PciFdoIrpStopDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 166 of file fdo.c.

169{
171 UNREFERENCED_PARAMETER(IoStackLocation);
172 UNREFERENCED_PARAMETER(DeviceExtension);
173
176}

◆ PciFdoIrpSurpriseRemoval()

NTSTATUS NTAPI PciFdoIrpSurpriseRemoval ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 351 of file fdo.c.

354{
356 UNREFERENCED_PARAMETER(IoStackLocation);
357 UNREFERENCED_PARAMETER(DeviceExtension);
358
361}

◆ PciFdoSetPowerState()

NTSTATUS NTAPI PciFdoSetPowerState ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 221 of file power.c.

224{
226 UNREFERENCED_PARAMETER(IoStackLocation);
227 UNREFERENCED_PARAMETER(DeviceExtension);
228
230 while (TRUE);
232}

◆ PciFdoWaitWake()

NTSTATUS NTAPI PciFdoWaitWake ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 206 of file power.c.

209{
211 UNREFERENCED_PARAMETER(IoStackLocation);
212 UNREFERENCED_PARAMETER(DeviceExtension);
213
215 while (TRUE);
217}

◆ PciFindNextSecondaryExtension()

PPCI_SECONDARY_EXTENSION NTAPI PciFindNextSecondaryExtension ( IN PSINGLE_LIST_ENTRY  ListHead,
IN PCI_SIGNATURE  ExtensionType 
)

Definition at line 584 of file utils.c.

586{
587 PSINGLE_LIST_ENTRY NextEntry;
589
590 /* Scan the list */
591 for (NextEntry = ListHead; NextEntry; NextEntry = NextEntry->Next)
592 {
593 /* Grab each extension and check if it's the one requested */
595 if (Extension->ExtensionType == ExtensionType) return Extension;
596 }
597
598 /* Nothing was found */
599 return NULL;
600}
_Inout_opt_ PUNICODE_STRING Extension
Definition: fltkernel.h:1092
Definition: ntbasedef.h:628
struct _SINGLE_LIST_ENTRY * Next
Definition: ntbasedef.h:629
#define CONTAINING_RECORD(address, type, field)
Definition: typedefs.h:260

Referenced by ario_ApplyBrokenVideoHack(), and PciInitializeArbiterRanges().

◆ PciFindParentPciFdoExtension()

PPCI_FDO_EXTENSION NTAPI PciFindParentPciFdoExtension ( IN PDEVICE_OBJECT  DeviceObject,
IN PKEVENT  Lock 
)

Definition at line 340 of file utils.c.

342{
343 PPCI_FDO_EXTENSION DeviceExtension;
344 PPCI_PDO_EXTENSION SearchExtension, FoundExtension;
345
346 /* Assume we'll find nothing */
347 SearchExtension = DeviceObject->DeviceExtension;
348 FoundExtension = NULL;
349
350 /* Check if a lock was specified */
351 if (Lock)
352 {
353 /* Wait for the lock to be released */
356 }
357
358 /* Now search for the extension */
360 while (DeviceExtension)
361 {
362 /* Acquire this device's lock */
364 KeWaitForSingleObject(&DeviceExtension->ChildListLock,
365 Executive,
367 FALSE,
368 NULL);
369
370 /* Scan all children PDO, stop when no more PDOs, or found it */
371 for (FoundExtension = DeviceExtension->ChildPdoList;
372 ((FoundExtension) && (FoundExtension != SearchExtension));
373 FoundExtension = FoundExtension->Next);
374
375 /* Release this device's lock */
376 KeSetEvent(&DeviceExtension->ChildListLock, IO_NO_INCREMENT, FALSE);
378
379 /* If we found it, break out */
380 if (FoundExtension) break;
381
382 /* Move to the next device */
383 DeviceExtension = (PPCI_FDO_EXTENSION)DeviceExtension->List.Next;
384 }
385
386 /* Check if we had acquired a lock previously */
387 if (Lock)
388 {
389 /* Release it */
392 }
393
394 /* Return which extension was found, if any */
395 return DeviceExtension;
396}
while(CdLookupNextInitialFileDirent(IrpContext, Fcb, FileContext))
#define KeSetEvent(pEvt, foo, foo2)
Definition: env_spec_w32.h:476
#define KeLeaveCriticalRegion()
Definition: ke_x.h:119
#define KeEnterCriticalRegion()
Definition: ke_x.h:88
SINGLE_LIST_ENTRY List
Definition: pci.h:194
struct _PCI_PDO_EXTENSION * ChildPdoList
Definition: pci.h:204
KEVENT ChildListLock
Definition: pci.h:203
PVOID Next
Definition: pci.h:265
_Must_inspect_result_ _In_opt_ PWDF_OBJECT_ATTRIBUTES _Out_ WDFWAITLOCK * Lock
Definition: wdfsync.h:127

Referenced by PciAddDevice().

◆ PciFindPdoByFunction()

PPCI_PDO_EXTENSION NTAPI PciFindPdoByFunction ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN ULONG  FunctionNumber,
IN PPCI_COMMON_HEADER  PciData 
)

Definition at line 695 of file utils.c.

698{
699 KIRQL Irql;
701
702 /* Get the current IRQL when this call was made */
704
705 /* Is this a low-IRQL call? */
706 if (Irql < DISPATCH_LEVEL)
707 {
708 /* Acquire this device's lock */
710 KeWaitForSingleObject(&DeviceExtension->ChildListLock,
711 Executive,
713 FALSE,
714 NULL);
715 }
716
717 /* Loop every child PDO */
718 for (PdoExtension = DeviceExtension->ChildPdoList;
721 {
722 /* Find only enumerated PDOs */
723 if (!PdoExtension->ReportedMissing)
724 {
725 /* Check if the function number and header data matches */
726 if ((FunctionNumber == PdoExtension->Slot.u.AsULONG) &&
727 (PdoExtension->VendorId == PciData->VendorID) &&
728 (PdoExtension->DeviceId == PciData->DeviceID) &&
729 (PdoExtension->RevisionId == PciData->RevisionID))
730 {
731 /* This is considered to be the same PDO */
732 break;
733 }
734 }
735 }
736
737 /* Was this a low-IRQL call? */
738 if (Irql < DISPATCH_LEVEL)
739 {
740 /* Release this device's lock */
741 KeSetEvent(&DeviceExtension->ChildListLock, IO_NO_INCREMENT, FALSE);
743 }
744
745 /* If the search found something, this is non-NULL, otherwise it's NULL */
746 return PdoExtension;
747}
_Out_ PKIRQL Irql
Definition: csq.h:179
UCHAR KIRQL
Definition: env_spec_w32.h:591
#define KeGetCurrentIrql()
Definition: env_spec_w32.h:706
#define DISPATCH_LEVEL
Definition: env_spec_w32.h:696

Referenced by PciScanBus().

◆ PciGetAdjustedInterruptLine()

UCHAR NTAPI PciGetAdjustedInterruptLine ( IN PPCI_PDO_EXTENSION  PdoExtension)

Definition at line 24 of file config.c.

25{
26 UCHAR InterruptLine = 0, PciInterruptLine;
28
29 /* Does the device have an interrupt pin? */
30 if (PdoExtension->InterruptPin)
31 {
32 /* Find the associated line on the parent bus */
34 PdoExtension->ParentFdoExtension->BaseBus,
35 PdoExtension->Slot.u.AsULONG,
36 &PciInterruptLine,
38 u.type0.InterruptLine),
39 sizeof(UCHAR));
40 if (Length) InterruptLine = PciInterruptLine;
41 }
42
43 /* Either keep the original interrupt line, or the one on the master bus */
44 return InterruptLine ? PdoExtension->RawInterruptLine : InterruptLine;
45}
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble * u
Definition: glfuncs.h:240
ULONG NTAPI HalGetBusDataByOffset(IN BUS_DATA_TYPE BusDataType, IN ULONG BusNumber, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: bus.c:73
_In_ ULONG _In_ ULONG _In_ ULONG Length
Definition: ntddpcm.h:102
@ PCIConfiguration
Definition: miniport.h:93

Referenced by PciScanBus().

◆ PciGetBiosConfig()

NTSTATUS NTAPI PciGetBiosConfig ( IN PPCI_PDO_EXTENSION  DeviceExtension,
OUT PPCI_COMMON_HEADER  PciData 
)

Definition at line 768 of file utils.c.

770{
773 UNICODE_STRING KeyName, KeyValue;
774 WCHAR Buffer[32];
776 PKEY_VALUE_PARTIAL_INFORMATION PartialInfo = (PVOID)DataBuffer;
779 PAGED_CODE();
780
781 /* Open the PCI key */
782 Status = IoOpenDeviceRegistryKey(DeviceExtension->ParentFdoExtension->
784 TRUE,
786 &KeyHandle);
787 if (!NT_SUCCESS(Status)) return Status;
788
789 /* Create a volatile BIOS configuration key */
790 RtlInitUnicodeString(&KeyName, L"BiosConfig");
792 &KeyName,
794 KeyHandle,
795 NULL);
796 Status = ZwCreateKey(&SubKeyHandle,
797 KEY_READ,
799 0,
800 NULL,
802 NULL);
804 if (!NT_SUCCESS(Status)) return Status;
805
806 /* Create the key value based on the device and function number */
808 L"DEV_%02x&FUN_%02x",
809 DeviceExtension->Slot.u.bits.DeviceNumber,
810 DeviceExtension->Slot.u.bits.FunctionNumber);
811 RtlInitUnicodeString(&KeyValue, Buffer);
812
813 /* Query the value information (PCI BIOS configuration header) */
814 Status = ZwQueryValueKey(SubKeyHandle,
815 &KeyValue,
817 PartialInfo,
818 sizeof(DataBuffer),
819 &ResultLength);
821 if (!NT_SUCCESS(Status)) return Status;
822
823 /* If any information was returned, go ahead and copy its data */
824 ASSERT(PartialInfo->DataLength == PCI_COMMON_HDR_LENGTH);
825 RtlCopyMemory(PciData, PartialInfo->Data, PCI_COMMON_HDR_LENGTH);
826 return Status;
827}
IN PUNICODE_STRING IN POBJECT_ATTRIBUTES ObjectAttributes
Definition: conport.c:36
#define swprintf
Definition: precomp.h:40
#define OBJ_KERNEL_HANDLE
Definition: winternl.h:231
#define InitializeObjectAttributes(p, n, a, r, s)
Definition: reg.c:106
_Must_inspect_result_ _Out_ PNDIS_STATUS _In_ NDIS_HANDLE _In_ PNDIS_STRING _Out_ PNDIS_HANDLE SubKeyHandle
Definition: ndis.h:4726
#define KEY_READ
Definition: nt_native.h:1023
#define REG_OPTION_VOLATILE
Definition: nt_native.h:1060
_Must_inspect_result_ _In_ WDFDEVICE _In_ PCUNICODE_STRING KeyName
Definition: wdfdevice.h:2699
__wchar_t WCHAR
Definition: xmlstorage.h:180

Referenced by PciScanBus(), and PPBridge_SaveCurrentSettings().

◆ PciGetConfigHandlers()

NTSTATUS NTAPI PciGetConfigHandlers ( IN PPCI_FDO_EXTENSION  FdoExtension)

Definition at line 224 of file config.c.

225{
226 PBUS_HANDLER BusHandler;
228 ASSERT(FdoExtension->BusHandler == NULL);
229
230 /* Check if this is the FDO for the root bus */
232 {
233 /* Query the PCI Bus Interface that ACPI exposes */
234 ASSERT(FdoExtension->PciBusInterface == NULL);
236 if (!NT_SUCCESS(Status))
237 {
238 /* No ACPI, so Bus Numbers should be maintained by BIOS */
240 }
241 else
242 {
243 /* ACPI detected, PCI Bus Driver will reconfigure bus numbers*/
245 }
246 }
247 else
248 {
249 /* Check if the root bus already has the interface set up */
250 if (FdoExtension->BusRootFdoExtension->PciBusInterface)
251 {
252 /* Nothing for this FDO to do */
253 return STATUS_SUCCESS;
254 }
255
256 /* Fail into case below so we can query the HAL interface */
258 }
259
260 /* If the ACPI PCI Bus Interface couldn't be obtained, try the HAL */
261 if (!NT_SUCCESS(Status))
262 {
263 /* Bus number assignment should be static */
266
267 /* Call the HAL to obtain the bus handler for PCI */
268 BusHandler = HalReferenceHandlerForBus(PCIBus, FdoExtension->BaseBus);
269 FdoExtension->BusHandler = BusHandler;
270
271 /* Fail if the HAL does not have a PCI Bus Handler for this bus */
272 if (!BusHandler) return STATUS_INVALID_DEVICE_REQUEST;
273 }
274
275 /* Appropriate interface was obtained */
276 return STATUS_SUCCESS;
277}
NTSTATUS NTAPI PciQueryForPciBusInterface(IN PPCI_FDO_EXTENSION FdoExtension)
Definition: config.c:135
BOOLEAN PciAssignBusNumbers
Definition: config.c:18
@ PCIBus
Definition: hwresource.cpp:142
#define HalReferenceHandlerForBus
Definition: haltypes.h:297

Referenced by PciAddDevice().

◆ PciGetDeviceDescriptionMessage()

PWCHAR NTAPI PciGetDeviceDescriptionMessage ( IN UCHAR  BaseClass,
IN UCHAR  SubClass 
)

Definition at line 88 of file id.c.

90{
93
94 /* The message identifier in the table is encoded based on the PCI class */
95 Identifier = (BaseClass << 8) | SubClass;
96
97 /* Go grab the description message for this device */
99 if (!Message)
100 {
101 /* It wasn't found, allocate a buffer for a generic description */
102 Message = ExAllocatePoolWithTag(PagedPool, sizeof(L"PCI Device"), 'bicP');
103 if (Message) RtlCopyMemory(Message, L"PCI Device", sizeof(L"PCI Device"));
104 }
105
106 /* Return the description message */
107 return Message;
108}
@ Identifier
Definition: asmpp.cpp:95
static const WCHAR Message[]
Definition: register.c:74
PWCHAR NTAPI PciGetDescriptionMessage(IN ULONG Identifier, OUT PULONG Length)
Definition: id.c:21
uint16_t * PWCHAR
Definition: typedefs.h:56

Referenced by PciQueryDeviceText(), and PciScanBus().

◆ PciGetDeviceProperty()

NTSTATUS NTAPI PciGetDeviceProperty ( IN PDEVICE_OBJECT  DeviceObject,
IN DEVICE_REGISTRY_PROPERTY  DeviceProperty,
OUT PVOID OutputBuffer 
)

Definition at line 475 of file utils.c.

478{
482 do
483 {
484 /* Query the requested property size */
487 0,
488 NULL,
489 &BufferLength);
491 {
492 /* Call should've failed with buffer too small! */
493 DPRINT1("PCI - Unexpected status from GetDeviceProperty, saw %08X, expected %08X.\n",
494 Status,
497 ASSERTMSG("PCI Successfully did the impossible!\n", FALSE);
498 break;
499 }
500
501 /* Allocate the required buffer */
503 if (!Buffer)
504 {
505 /* No memory, fail the request */
506 DPRINT1("PCI - Failed to allocate DeviceProperty buffer (%u bytes).\n", BufferLength);
508 break;
509 }
510
511 /* Do the actual property query call */
515 Buffer,
516 &ResultLength);
517 if (!NT_SUCCESS(Status)) break;
518
519 /* Return the buffer to the caller */
522 return STATUS_SUCCESS;
523 } while (FALSE);
524
525 /* Failure path */
526 return STATUS_UNSUCCESSFUL;
527}
NTSTATUS NTAPI IoGetDeviceProperty(IN PDEVICE_OBJECT DeviceObject, IN DEVICE_REGISTRY_PROPERTY DeviceProperty, IN ULONG BufferLength, OUT PVOID PropertyBuffer, OUT PULONG ResultLength)
Definition: pnpmgr.c:1382
#define STATUS_BUFFER_TOO_SMALL
Definition: shellext.h:69
_Must_inspect_result_ _In_ WDFDEVICE _In_ DEVICE_REGISTRY_PROPERTY DeviceProperty
Definition: wdfdevice.h:3769
_Must_inspect_result_ _In_ WDFDEVICE _In_ DEVICE_REGISTRY_PROPERTY _In_ ULONG BufferLength
Definition: wdfdevice.h:3771
_Must_inspect_result_ _In_ WDFIOTARGET _In_opt_ WDFREQUEST _In_opt_ PWDF_MEMORY_DESCRIPTOR OutputBuffer
Definition: wdfiotarget.h:863

Referenced by PciAddDevice().

◆ PciGetHackFlags()

ULONGLONG NTAPI PciGetHackFlags ( IN USHORT  VendorId,
IN USHORT  DeviceId,
IN USHORT  SubVendorId,
IN USHORT  SubSystemId,
IN UCHAR  RevisionId 
)

Definition at line 604 of file utils.c.

609{
610 PPCI_HACK_ENTRY HackEntry;
612 ULONG LastWeight, MatchWeight;
613 ULONG EntryFlags;
614
615 /* ReactOS SetupLDR Hack */
616 if (!PciHackTable) return 0;
617
618 /* Initialize the variables before looping */
619 LastWeight = 0;
620 HackFlags = 0;
622
623 /* Scan the hack table */
624 for (HackEntry = PciHackTable;
625 HackEntry->VendorID != PCI_INVALID_VENDORID;
626 ++HackEntry)
627 {
628 /* Check if there's an entry for this device */
629 if ((HackEntry->DeviceID == DeviceId) &&
630 (HackEntry->VendorID == VendorId))
631 {
632 /* This is a basic match */
633 EntryFlags = HackEntry->Flags;
634 MatchWeight = 1;
635
636 /* Does the entry have revision information? */
637 if (EntryFlags & PCI_HACK_HAS_REVISION_INFO)
638 {
639 /* Check if the revision matches, if so, this is a better match */
640 if (HackEntry->RevisionID != RevisionId) continue;
641 MatchWeight = 3;
642 }
643
644 /* Does the netry have subsystem information? */
645 if (EntryFlags & PCI_HACK_HAS_SUBSYSTEM_INFO)
646 {
647 /* Check if it matches, if so, this is the best possible match */
648 if ((HackEntry->SubVendorID != SubVendorId) ||
649 (HackEntry->SubSystemID != SubSystemId))
650 {
651 continue;
652 }
653 MatchWeight += 4;
654 }
655
656 /* Is this the best match yet? */
657 if (MatchWeight > LastWeight)
658 {
659 /* This is the best match for now, use this as the hack flags */
660 HackFlags = HackEntry->HackFlags;
661 LastWeight = MatchWeight;
662 }
663 }
664 }
665
666 /* Return the best match */
667 return HackFlags;
668}
PPCI_HACK_ENTRY PciHackTable
Definition: init.c:28
#define PCI_HACK_HAS_REVISION_INFO
Definition: pci.h:51
#define PCI_HACK_HAS_SUBSYSTEM_INFO
Definition: pci.h:52
Definition: pci.h:153
ULONGLONG HackFlags
Definition: pci.h:158
USHORT SubSystemID
Definition: pci.h:157
USHORT VendorID
Definition: pci.h:154
USHORT RevisionID
Definition: pci.h:159
USHORT DeviceID
Definition: pci.h:155
UCHAR Flags
Definition: pci.h:160
USHORT SubVendorID
Definition: pci.h:156
uint64_t ULONGLONG
Definition: typedefs.h:67
#define PCI_INVALID_VENDORID
Definition: iotypes.h:3601

Referenced by PciScanBus().

◆ PciGetRegistryValue()

NTSTATUS NTAPI PciGetRegistryValue ( IN PWCHAR  ValueName,
IN PWCHAR  KeyName,
IN HANDLE  RootHandle,
IN ULONG  Type,
OUT PVOID OutputBuffer,
OUT PULONG  OutputLength 
)

Definition at line 192 of file utils.c.

198{
201 ULONG NeededLength, ActualLength;
202 UNICODE_STRING ValueString;
205
206 /* So we know what to free at the end of the body */
207 PartialInfo = NULL;
208 KeyHandle = NULL;
209 do
210 {
211 /* Open the key by name, rooted off the handle passed */
213 RootHandle,
215 &KeyHandle,
216 &Status);
217 if (!Result) break;
218
219 /* Query for the size that's needed for the value that was passed in */
220 RtlInitUnicodeString(&ValueString, ValueName);
221 Status = ZwQueryValueKey(KeyHandle,
222 &ValueString,
224 NULL,
225 0,
226 &NeededLength);
228 if (Status != STATUS_BUFFER_TOO_SMALL) break;
229
230 /* Allocate an appropriate buffer for the size that was returned */
231 ASSERT(NeededLength != 0);
233 PartialInfo = ExAllocatePoolWithTag(PagedPool,
234 NeededLength,
236 if (!PartialInfo) break;
237
238 /* Query the actual value information now that the size is known */
239 Status = ZwQueryValueKey(KeyHandle,
240 &ValueString,
242 PartialInfo,
243 NeededLength,
244 &ActualLength);
245 if (!NT_SUCCESS(Status)) break;
246
247 /* Make sure it's of the type that the caller expects */
249 if (PartialInfo->Type != Type) break;
250
251 /* Subtract the registry-specific header, to get the data size */
252 ASSERT(NeededLength == ActualLength);
253 NeededLength -= sizeof(KEY_VALUE_PARTIAL_INFORMATION);
254
255 /* Allocate a buffer to hold the data and return it to the caller */
258 NeededLength,
260 if (!*OutputBuffer) break;
261
262 /* Copy the data into the buffer and return its length to the caller */
263 RtlCopyMemory(*OutputBuffer, PartialInfo->Data, NeededLength);
264 if (OutputLength) *OutputLength = NeededLength;
266 } while (0);
267
268 /* Close any opened keys and free temporary allocations */
270 if (PartialInfo) ExFreePoolWithTag(PartialInfo, 0);
271 return Status;
272}
#define PCI_POOL_TAG
Definition: pci.h:27
BOOLEAN NTAPI PciOpenKey(IN PWCHAR KeyName, IN HANDLE RootKey, IN ACCESS_MASK DesiredAccess, OUT PHANDLE KeyHandle, OUT PNTSTATUS KeyStatus)
Definition: utils.c:165
#define KEY_QUERY_VALUE
Definition: nt_native.h:1016
#define STATUS_INVALID_PARAMETER
Definition: udferr_usr.h:135
_At_(*)(_In_ PWSK_CLIENT Client, _In_opt_ PUNICODE_STRING NodeName, _In_opt_ PUNICODE_STRING ServiceName, _In_opt_ ULONG NameSpace, _In_opt_ GUID *Provider, _In_opt_ PADDRINFOEXW Hints, _Outptr_ PADDRINFOEXW *Result, _In_opt_ PEPROCESS OwningProcess, _In_opt_ PETHREAD OwningThread, _Inout_ PIRP Irp Result)(Mem)) NTSTATUS(WSKAPI *PFN_WSK_GET_ADDRESS_INFO
Definition: wsk.h:409

Referenced by DriverEntry(), PciAcpiFindRsdt(), PciGetIrqRoutingTableFromRegistry(), and PciIsDatacenter().

◆ PciHookHal()

VOID NTAPI PciHookHal ( VOID  )

Definition at line 248 of file hookhal.c.

249{
250 /* Save the old HAL routines */
255
256 /* Take over the HAL's Bus Handler functions */
257// HalPciAssignSlotResources = PciAssignSlotResources;
259}
pHalTranslateBusAddress PcipSavedTranslateBusAddress
Definition: hookhal.c:18
pHalAssignSlotResources PcipSavedAssignSlotResources
Definition: hookhal.c:19
BOOLEAN NTAPI PciTranslateBusAddress(IN INTERFACE_TYPE InterfaceType, IN ULONG BusNumber, IN PHYSICAL_ADDRESS BusAddress, OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
Definition: hookhal.c:25
#define HalPciTranslateBusAddress
Definition: halfuncs.h:41
#define HalPciAssignSlotResources
Definition: halfuncs.h:42

Referenced by DriverEntry().

◆ PciInitializeArbiterRanges()

NTSTATUS NTAPI PciInitializeArbiterRanges ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN PCM_RESOURCE_LIST  Resources 
)

Definition at line 128 of file arb_comn.c.

130{
132 //CM_RESOURCE_TYPE DesiredType;
134 PCI_SIGNATURE ArbiterType;
135
137
138 /* Arbiters should not already be initialized */
139 if (DeviceExtension->ArbitersInitialized)
140 {
141 /* Duplicated start request, fail initialization */
142 DPRINT1("PCI Warning hot start FDOx %p, resource ranges not checked.\n", DeviceExtension);
144 }
145
146 /* Check for non-root FDO */
147 if (!PCI_IS_ROOT_FDO(DeviceExtension))
148 {
149 /* Grab the PDO */
150 PdoExtension = (PPCI_PDO_EXTENSION)DeviceExtension->PhysicalDeviceObject->DeviceExtension;
152
153 /* Check if this is a subtractive bus */
154 if (PdoExtension->Dependent.type1.SubtractiveDecode)
155 {
156 /* There is nothing to do regarding arbitration of resources */
157 DPRINT1("PCI Skipping arbiter initialization for subtractive bridge FDOX %p\n", DeviceExtension);
158 return STATUS_SUCCESS;
159 }
160 }
161
162 /* Loop all arbiters */
163 for (ArbiterType = PciArb_Io; ArbiterType <= PciArb_Memory; ArbiterType++)
164 {
165 /* Pick correct resource type for each arbiter */
166 if (ArbiterType == PciArb_Io)
167 {
168 /* I/O Port */
169 //DesiredType = CmResourceTypePort;
170 }
171 else if (ArbiterType == PciArb_Memory)
172 {
173 /* Device RAM */
174 //DesiredType = CmResourceTypeMemory;
175 }
176 else
177 {
178 /* Ignore anything else */
179 continue;
180 }
181
182 /* Find an arbiter of this type */
183 Instance = PciFindNextSecondaryExtension(&DeviceExtension->SecondaryExtension,
184 ArbiterType);
185 if (Instance)
186 {
187 /*
188 * Now we should initialize it, not yet implemented because Arb
189 * library isn't yet implemented, not even the headers.
190 */
192 //while (TRUE);
193 }
194 else
195 {
196 /* The arbiter was not found, this is an error! */
197 DPRINT1("PCI - FDO ext 0x%p %s arbiter (REQUIRED) is missing.\n",
198 DeviceExtension,
199 PciArbiterNames[ArbiterType - PciArb_Io]);
200 }
201 }
202
203 /* Arbiters are now initialized */
204 DeviceExtension->ArbitersInitialized = TRUE;
205 return STATUS_SUCCESS;
206}
PCHAR PciArbiterNames[]
Definition: arb_comn.c:18

Referenced by PciFdoIrpStartDevice().

◆ PciInitializeArbiters()

NTSTATUS NTAPI PciInitializeArbiters ( IN PPCI_FDO_EXTENSION  FdoExtension)

Definition at line 40 of file arb_comn.c.

41{
42 PPCI_INTERFACE CurrentInterface, *Interfaces;
44 PPCI_ARBITER_INSTANCE ArbiterInterface;
46 PCI_SIGNATURE ArbiterType;
48
49 /* Loop all the arbiters */
50 for (ArbiterType = PciArb_Io; ArbiterType <= PciArb_BusNumber; ArbiterType++)
51 {
52 /* Check if this is the extension for the Root PCI Bus */
54 {
55 /* Get the PDO extension */
56 PdoExtension = FdoExtension->PhysicalDeviceObject->DeviceExtension;
58
59 /* Skip this bus if it does subtractive decode */
60 if (PdoExtension->Dependent.type1.SubtractiveDecode)
61 {
62 DPRINT1("PCI Not creating arbiters for subtractive bus %u\n",
63 PdoExtension->Dependent.type1.SubtractiveDecode);
64 continue;
65 }
66 }
67
68 /* Query all the registered arbiter interfaces */
69 Interfaces = PciInterfaces;
70 while (*Interfaces)
71 {
72 /* Find the one that matches the arbiter currently being setup */
73 CurrentInterface = *Interfaces;
74 if (CurrentInterface->Signature == ArbiterType) break;
75 Interfaces++;
76 }
77
78 /* Check if the required arbiter was not found in the list */
79 if (!*Interfaces)
80 {
81 /* Skip this arbiter and try the next one */
82 DPRINT1("PCI - FDO ext 0x%p no %s arbiter.\n",
84 PciArbiterNames[ArbiterType - PciArb_Io]);
85 continue;
86 }
87
88 /* An arbiter was found, allocate an instance for it */
90 ArbiterInterface = ExAllocatePoolWithTag(PagedPool,
93 if (!ArbiterInterface) break;
94
95 /* Setup the instance */
96 ArbiterInterface->BusFdoExtension = FdoExtension;
97 ArbiterInterface->Interface = CurrentInterface;
98 swprintf(ArbiterInterface->InstanceName,
99 L"PCI %S (b=%02x)",
100 PciArbiterNames[ArbiterType - PciArb_Io],
101 FdoExtension->BaseBus);
102
103 /* Call the interface initializer for it */
104 Status = CurrentInterface->Initializer(ArbiterInterface);
105 if (!NT_SUCCESS(Status)) break;
106
107 /* Link it with this FDO */
108 PcipLinkSecondaryExtension(&FdoExtension->SecondaryExtension,
109 &FdoExtension->SecondaryExtLock,
110 &ArbiterInterface->Header,
111 ArbiterType,
113
114 /* This arbiter is now initialized, move to the next one */
115 DPRINT1("PCI - FDO ext 0x%p %S arbiter initialized (context 0x%p).\n",
117 L"ARBITER HEADER MISSING", //ArbiterInterface->CommonInstance.Name,
118 ArbiterInterface);
120 }
121
122 /* Return to caller */
123 return Status;
124}
VOID NTAPI PciArbiterDestructor(IN PPCI_ARBITER_INSTANCE Arbiter)
Definition: arb_comn.c:30
VOID NTAPI PcipLinkSecondaryExtension(IN PSINGLE_LIST_ENTRY List, IN PVOID Lock, IN PPCI_SECONDARY_EXTENSION SecondaryExtension, IN PCI_SIGNATURE ExtensionType, IN PVOID Destructor)
Definition: utils.c:459
PPCI_INTERFACE PciInterfaces[]
Definition: intrface.c:18
PCI_SECONDARY_EXTENSION Header
Definition: pci.h:403
PPCI_INTERFACE Interface
Definition: pci.h:404
PCI_SIGNATURE Signature
Definition: pci.h:383
PCI_INTERFACE_INITIALIZER Initializer
Definition: pci.h:385

Referenced by PciAddDevice().

◆ PciInitializeState()

VOID NTAPI PciInitializeState ( IN PPCI_FDO_EXTENSION  DeviceExtension)

Definition at line 88 of file state.c.

89{
90 /* Set the initial state */
91 DeviceExtension->DeviceState = PciNotStarted;
92 DeviceExtension->TentativeNextState = PciNotStarted;
93}

Referenced by PciInitializeFdoExtensionCommonFields(), and PciPdoCreate().

◆ PciInsertEntryAtTail()

VOID NTAPI PciInsertEntryAtTail ( IN PSINGLE_LIST_ENTRY  ListHead,
IN PPCI_FDO_EXTENSION  DeviceExtension,
IN PKEVENT  Lock 
)

Definition at line 400 of file utils.c.

403{
404 PSINGLE_LIST_ENTRY NextEntry;
405 PAGED_CODE();
406
407 /* Check if a lock was specified */
408 if (Lock)
409 {
410 /* Wait for the lock to be released */
413 }
414
415 /* Loop the list until we get to the end, then insert this entry there */
416 for (NextEntry = ListHead; NextEntry->Next; NextEntry = NextEntry->Next);
417 NextEntry->Next = &DeviceExtension->List;
418
419 /* Check if we had acquired a lock previously */
420 if (Lock)
421 {
422 /* Release it */
425 }
426}

Referenced by PciAddDevice(), and PciPdoCreate().

◆ PciIrpInvalidDeviceRequest()

NTSTATUS NTAPI PciIrpInvalidDeviceRequest ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 277 of file dispatch.c.

280{
282 UNREFERENCED_PARAMETER(IoStackLocation);
283 UNREFERENCED_PARAMETER(DeviceExtension);
284
285 /* Not supported */
287}

◆ PciIrpNotSupported()

NTSTATUS NTAPI PciIrpNotSupported ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_FDO_EXTENSION  DeviceExtension 
)

Definition at line 261 of file dispatch.c.

264{
266 UNREFERENCED_PARAMETER(IoStackLocation);
267 UNREFERENCED_PARAMETER(DeviceExtension);
268
269 /* Not supported */
270 DPRINT1("WARNING: PCI received unsupported IRP!\n");
271 //DbgBreakPoint();
273}

◆ PciIsCriticalDeviceClass()

BOOLEAN NTAPI PciIsCriticalDeviceClass ( IN UCHAR  BaseClass,
IN UCHAR  SubClass 
)

Definition at line 672 of file utils.c.

674{
675 /* Check for system or bridge devices */
676 if (BaseClass == PCI_CLASS_BASE_SYSTEM_DEV)
677 {
678 /* Interrupt controllers are critical */
679 return SubClass == PCI_SUBCLASS_SYS_INTERRUPT_CTLR;
680 }
681 else if (BaseClass == PCI_CLASS_BRIDGE_DEV)
682 {
683 /* ISA Bridges are critical */
684 return SubClass == PCI_SUBCLASS_BR_ISA;
685 }
686 else
687 {
688 /* All display controllers are critical */
689 return BaseClass == PCI_CLASS_DISPLAY_CTLR;
690 }
691}
#define PCI_SUBCLASS_SYS_INTERRUPT_CTLR
Definition: iotypes.h:4178
#define PCI_CLASS_BASE_SYSTEM_DEV
Definition: iotypes.h:4111

Referenced by PciScanBus().

◆ PciIsDatacenter()

BOOLEAN NTAPI PciIsDatacenter ( VOID  )

Definition at line 131 of file utils.c.

132{
134 PVOID Value;
137
138 /* Assume this isn't Datacenter */
139 Result = FALSE;
140
141 /* First, try opening the setup key */
143 L"\\REGISTRY\\MACHINE\\SYSTEM\\CurrentControlSet\\Services\\setupdd",
144 0,
146 &Value,
147 &ResultLength);
148 if (!NT_SUCCESS(Status))
149 {
150 /* This is not an in-progress Setup boot, so query the suite version */
152 }
153 else
154 {
155 /* This scenario shouldn't happen yet, since SetupDD isn't used */
156 UNIMPLEMENTED_FATAL("ReactOS doesn't use SetupDD for its installation program. Therefore this scenario must not happen!\n");
157 }
158
159 /* Return if this is Datacenter or not */
160 return Result;
161}
BOOLEAN NTAPI PciIsSuiteVersion(IN USHORT SuiteMask)
Definition: utils.c:114
NTSTATUS NTAPI PciGetRegistryValue(IN PWCHAR ValueName, IN PWCHAR KeyName, IN HANDLE RootHandle, IN ULONG Type, OUT PVOID *OutputBuffer, OUT PULONG OutputLength)
Definition: utils.c:192
#define REG_BINARY
Definition: nt_native.h:1496
#define VER_SUITE_DATACENTER
#define UNIMPLEMENTED_FATAL(...)
Definition: debug.h:244
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:413

Referenced by DriverEntry().

◆ PciIsDeviceOnDebugPath()

BOOLEAN NTAPI PciIsDeviceOnDebugPath ( IN PPCI_PDO_EXTENSION  DeviceExtension)

Definition at line 751 of file utils.c.

752{
753 PAGED_CODE();
754
755 UNREFERENCED_PARAMETER(DeviceExtension);
756
757 /* Check for too many, or no, debug ports */
759 if (!PciDebugPortsCount) return FALSE;
760
761 /* eVb has not been able to test such devices yet */
763 return FALSE;
764}
#define MAX_DEBUGGING_DEVICES_SUPPORTED
Definition: pci.h:77
ULONG PciDebugPortsCount
Definition: utils.c:18

Referenced by PciScanBus().

◆ PciIsSlotPresentInParentMethod()

BOOLEAN NTAPI PciIsSlotPresentInParentMethod ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN ULONG  Method 
)

Definition at line 1094 of file utils.c.

1096{
1097 BOOLEAN FoundSlot;
1098 PACPI_METHOD_ARGUMENT Argument;
1101 ULONG i, Length;
1103 PAGED_CODE();
1104
1105 /* Assume slot is not part of the parent method */
1106 FoundSlot = FALSE;
1107
1108 /* Allocate a 2KB buffer for the method return parameters */
1109 Length = sizeof(ACPI_EVAL_OUTPUT_BUFFER) + 2048;
1111 if (OutputBuffer)
1112 {
1113 /* Clear out the output buffer */
1115
1116 /* Initialize the input buffer with the method requested */
1117 InputBuffer.Signature = 0;
1118 *(PULONG)InputBuffer.MethodName = Method;
1120
1121 /* Send it to the ACPI driver */
1122 Status = PciSendIoctl(PdoExtension->ParentFdoExtension->PhysicalDeviceObject,
1124 &InputBuffer,
1125 sizeof(ACPI_EVAL_INPUT_BUFFER),
1127 Length);
1128 if (NT_SUCCESS(Status))
1129 {
1130 /* Scan all output arguments */
1131 for (i = 0; i < OutputBuffer->Count; i++)
1132 {
1133 /* Make sure it's an integer */
1134 Argument = &OutputBuffer->Argument[i];
1135 if (Argument->Type != ACPI_METHOD_ARGUMENT_INTEGER) continue;
1136
1137 /* Check if the argument matches this PCI slot structure */
1138 if (Argument->Argument == ((PdoExtension->Slot.u.bits.DeviceNumber) |
1139 ((PdoExtension->Slot.u.bits.FunctionNumber) << 16)))
1140 {
1141 /* This slot has been found, return it */
1142 FoundSlot = TRUE;
1143 break;
1144 }
1145 }
1146 }
1147
1148 /* Finished with the buffer, free it */
1150 }
1151
1152 /* Return if the slot was found */
1153 return FoundSlot;
1154}
ACPI_METHOD_ARGUMENT UNALIGNED * PACPI_METHOD_ARGUMENT
Definition: acpiioct.h:71
struct _ACPI_EVAL_OUTPUT_BUFFER ACPI_EVAL_OUTPUT_BUFFER
#define ACPI_METHOD_ARGUMENT_INTEGER
Definition: acpiioct.h:21
#define ACPI_EVAL_INPUT_BUFFER_SIGNATURE
Definition: acpiioct.h:7
#define IOCTL_ACPI_EVAL_METHOD
Definition: acpiioct.h:178
ACPI_EVAL_OUTPUT_BUFFER UNALIGNED * PACPI_EVAL_OUTPUT_BUFFER
Definition: acpiioct.h:90
NTSTATUS NTAPI PciSendIoctl(IN PDEVICE_OBJECT DeviceObject, IN ULONG IoControlCode, IN PVOID InputBuffer, IN ULONG InputBufferLength, IN PVOID OutputBuffer, IN ULONG OutputBufferLength)
Definition: utils.c:531
_Must_inspect_result_ _In_ WDFIOTARGET _In_opt_ WDFREQUEST _In_opt_ PWDF_MEMORY_DESCRIPTOR InputBuffer
Definition: wdfiotarget.h:953

Referenced by PciApplyHacks(), and PciBridgeIsPositiveDecode().

◆ PciOpenKey()

BOOLEAN NTAPI PciOpenKey ( IN PWCHAR  KeyName,
IN HANDLE  RootKey,
IN ACCESS_MASK  DesiredAccess,
OUT PHANDLE  KeyHandle,
OUT PNTSTATUS  KeyStatus 
)

Definition at line 165 of file utils.c.

170{
173 UNICODE_STRING KeyString;
174 PAGED_CODE();
175
176 /* Initialize the object attributes */
177 RtlInitUnicodeString(&KeyString, KeyName);
179 &KeyString,
181 RootKey,
182 NULL);
183
184 /* Open the key, returning a boolean, and the status, if requested */
186 if (KeyStatus) *KeyStatus = Status;
187 return NT_SUCCESS(Status);
188}
#define OBJ_CASE_INSENSITIVE
Definition: winternl.h:228
static PMEMKEY RootKey
Definition: registry.c:55
_Must_inspect_result_ _In_ WDFDEVICE _In_ ULONG _In_ ACCESS_MASK DesiredAccess
Definition: wdfdevice.h:2658

Referenced by DriverEntry(), PciAcpiFindRsdt(), PciGetIrqRoutingTableFromRegistry(), and PciGetRegistryValue().

◆ PciPassIrpFromFdoToPdo()

NTSTATUS NTAPI PciPassIrpFromFdoToPdo ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN PIRP  Irp 
)

Definition at line 70 of file dispatch.c.

72{
73 PIO_STACK_LOCATION IoStackLocation;
75 DPRINT1("Pci PassIrp ...\n");
76
77 /* Get the stack location to check which function this is */
78 IoStackLocation = IoGetCurrentIrpStackLocation(Irp);
79 if (IoStackLocation->MajorFunction == IRP_MJ_POWER)
80 {
81 /* Power IRPs are special since we have to notify the Power Manager */
84 Status = PoCallDriver(DeviceExtension->AttachedDeviceObject, Irp);
85 }
86 else
87 {
88 /* For a normal IRP, just call the next driver in the stack */
90 Status = IoCallDriver(DeviceExtension->AttachedDeviceObject, Irp);
91 }
92
93 /* Return the status back to the caller */
94 return Status;
95}
#define IoSkipCurrentIrpStackLocation(Irp)
Definition: ntifs_ex.h:421

Referenced by PciDispatchIrp(), and PciFdoIrpQueryInterface().

◆ PciPdoCreate()

NTSTATUS NTAPI PciPdoCreate ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN PCI_SLOT_NUMBER  Slot,
OUT PDEVICE_OBJECT PdoDeviceObject 
)

Definition at line 530 of file pdo.c.

533{
534 WCHAR DeviceName[32];
535 UNICODE_STRING DeviceString;
539 ULONG SequenceNumber;
540 PAGED_CODE();
541
542 /* Pick an atomically unique sequence number for this device */
544
545 /* Create the standard PCI device name for a PDO */
546 swprintf(DeviceName, L"\\Device\\NTPNP_PCI%04d", SequenceNumber);
547 RtlInitUnicodeString(&DeviceString, DeviceName);
548
549 /* Create the actual device now */
550 Status = IoCreateDevice(DeviceExtension->FunctionalDeviceObject->DriverObject,
551 sizeof(PCI_PDO_EXTENSION),
552 &DeviceString,
554 0,
555 0,
556 &DeviceObject);
558
559 /* Get the extension for it */
560 PdoExtension = (PPCI_PDO_EXTENSION)DeviceObject->DeviceExtension;
561 DPRINT1("PCI: New PDO (b=0x%x, d=0x%x, f=0x%x) @ %p, ext @ %p\n",
562 DeviceExtension->BaseBus,
563 Slot.u.bits.DeviceNumber,
564 Slot.u.bits.FunctionNumber,
566 DeviceObject->DeviceExtension);
567
568 /* Configure the extension */
569 PdoExtension->ExtensionType = PciPdoExtensionType;
570 PdoExtension->IrpDispatchTable = &PciPdoDispatchTable;
571 PdoExtension->PhysicalDeviceObject = DeviceObject;
572 PdoExtension->Slot = Slot;
573 PdoExtension->PowerState.CurrentSystemState = PowerDeviceD0;
574 PdoExtension->PowerState.CurrentDeviceState = PowerDeviceD0;
575 PdoExtension->ParentFdoExtension = DeviceExtension;
576
577 /* Initialize the lock for arbiters and other interfaces */
579
580 /* Initialize the state machine */
582
583 /* Add the PDO to the parent's list */
584 PdoExtension->Next = NULL;
585 PciInsertEntryAtTail((PSINGLE_LIST_ENTRY)&DeviceExtension->ChildPdoList,
587 &DeviceExtension->ChildListLock);
588
589 /* And finally return it to the caller */
591 return STATUS_SUCCESS;
592}
#define InterlockedIncrement
Definition: armddk.h:53
PCI_MJ_DISPATCH_TABLE PciPdoDispatchTable
Definition: pdo.c:63
LONG PciPdoSequenceNumber
Definition: pdo.c:18
VOID NTAPI PciInitializeState(IN PPCI_FDO_EXTENSION DeviceExtension)
Definition: state.c:88
_Outptr_ PUSB_DEVICE_HANDLE _In_ PUSB_DEVICE_HANDLE _In_ USHORT _In_ PUSB_PORT_PATH _Out_ PUSB_CD_ERROR_INFORMATION _In_ USHORT _In_ PDEVICE_OBJECT PdoDeviceObject
Definition: hubbusif.h:95
@ PowerDeviceD0
Definition: ntpoapi.h:49
_Must_inspect_result_ _In_ PWDFDEVICE_INIT _In_opt_ PCUNICODE_STRING DeviceName
Definition: wdfdevice.h:3275

Referenced by PciScanBus().

◆ PciPdoIrpCancelRemoveDevice()

NTSTATUS NTAPI PciPdoIrpCancelRemoveDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 248 of file pdo.c.

251{
253 UNREFERENCED_PARAMETER(IoStackLocation);
254 UNREFERENCED_PARAMETER(DeviceExtension);
255
258}

◆ PciPdoIrpCancelStopDevice()

NTSTATUS NTAPI PciPdoIrpCancelStopDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 290 of file pdo.c.

293{
295 UNREFERENCED_PARAMETER(IoStackLocation);
296 UNREFERENCED_PARAMETER(DeviceExtension);
297
300}

◆ PciPdoIrpDeviceUsageNotification()

NTSTATUS NTAPI PciPdoIrpDeviceUsageNotification ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 488 of file pdo.c.

491{
493 UNREFERENCED_PARAMETER(IoStackLocation);
494 UNREFERENCED_PARAMETER(DeviceExtension);
495
498}

◆ PciPdoIrpQueryBusInformation()

NTSTATUS NTAPI PciPdoIrpQueryBusInformation ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 430 of file pdo.c.

433{
434 PAGED_CODE();
435
436 UNREFERENCED_PARAMETER(IoStackLocation);
437
438 /* Call the worker function */
439 return PciQueryBusInformation(DeviceExtension,
441 IoStatus.Information);
442}
NTSTATUS NTAPI PciQueryBusInformation(IN PPCI_PDO_EXTENSION PdoExtension, IN PPNP_BUS_INFORMATION *Buffer)
Definition: utils.c:1316
__in UCHAR __in POWER_STATE __in_opt PVOID __in PIO_STATUS_BLOCK IoStatus
Definition: mxum.h:159

◆ PciPdoIrpQueryCapabilities()

NTSTATUS NTAPI PciPdoIrpQueryCapabilities ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 352 of file pdo.c.

355{
356 PAGED_CODE();
357
359
360 /* Call the worker function */
361 return PciQueryCapabilities(DeviceExtension,
362 IoStackLocation->
363 Parameters.DeviceCapabilities.Capabilities);
364}
NTSTATUS NTAPI PciQueryCapabilities(IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PDEVICE_CAPABILITIES DeviceCapability)
Definition: utils.c:1727
_Must_inspect_result_ _In_ WDFQUEUE _In_opt_ WDFREQUEST _In_opt_ WDFFILEOBJECT _Inout_opt_ PWDF_REQUEST_PARAMETERS Parameters
Definition: wdfio.h:869

◆ PciPdoIrpQueryDeviceRelations()

NTSTATUS NTAPI PciPdoIrpQueryDeviceRelations ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 318 of file pdo.c.

321{
323 PAGED_CODE();
324
325 /* Are ejection relations being queried? */
326 if (IoStackLocation->Parameters.QueryDeviceRelations.Type == EjectionRelations)
327 {
328 /* Call the worker function */
329 Status = PciQueryEjectionRelations(DeviceExtension,
331 IoStatus.Information);
332 }
333 else if (IoStackLocation->Parameters.QueryDeviceRelations.Type == TargetDeviceRelation)
334 {
335 /* The only other relation supported is the target device relation */
336 Status = PciQueryTargetDeviceRelations(DeviceExtension,
338 IoStatus.Information);
339 }
340 else
341 {
342 /* All other relations are unsupported */
344 }
345
346 /* Return either the result of the worker function, or unsupported status */
347 return Status;
348}
NTSTATUS NTAPI PciQueryEjectionRelations(IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PDEVICE_RELATIONS *pDeviceRelations)
Definition: enum.c:538
NTSTATUS NTAPI PciQueryTargetDeviceRelations(IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PDEVICE_RELATIONS *pDeviceRelations)
Definition: enum.c:511
@ EjectionRelations
Definition: iotypes.h:2153
@ TargetDeviceRelation
Definition: iotypes.h:2156

◆ PciPdoIrpQueryDeviceState()

NTSTATUS NTAPI PciPdoIrpQueryDeviceState ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 474 of file pdo.c.

477{
479 UNREFERENCED_PARAMETER(IoStackLocation);
480 UNREFERENCED_PARAMETER(DeviceExtension);
481
484}

◆ PciPdoIrpQueryDeviceText()

NTSTATUS NTAPI PciPdoIrpQueryDeviceText ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 399 of file pdo.c.

402{
403 PAGED_CODE();
404
405 /* Call the worker function */
406 return PciQueryDeviceText(DeviceExtension,
407 IoStackLocation->
408 Parameters.QueryDeviceText.DeviceTextType,
409 IoStackLocation->
410 Parameters.QueryDeviceText.LocaleId,
411 (PWCHAR*)&Irp->IoStatus.Information);
412}
NTSTATUS NTAPI PciQueryDeviceText(IN PPCI_PDO_EXTENSION PdoExtension, IN DEVICE_TEXT_TYPE QueryType, IN ULONG Locale, OUT PWCHAR *Buffer)
Definition: id.c:394

◆ PciPdoIrpQueryId()

NTSTATUS NTAPI PciPdoIrpQueryId ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 416 of file pdo.c.

419{
420 PAGED_CODE();
421
422 /* Call the worker function */
423 return PciQueryId(DeviceExtension,
424 IoStackLocation->Parameters.QueryId.IdType,
425 (PWCHAR*)&Irp->IoStatus.Information);
426}
NTSTATUS NTAPI PciQueryId(IN PPCI_PDO_EXTENSION DeviceExtension, IN BUS_QUERY_ID_TYPE QueryType, OUT PWCHAR *Buffer)
Definition: id.c:200

◆ PciPdoIrpQueryInterface()

NTSTATUS NTAPI PciPdoIrpQueryInterface ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 304 of file pdo.c.

307{
309 UNREFERENCED_PARAMETER(IoStackLocation);
310 UNREFERENCED_PARAMETER(DeviceExtension);
311
314}

◆ PciPdoIrpQueryLegacyBusInformation()

NTSTATUS NTAPI PciPdoIrpQueryLegacyBusInformation ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 516 of file pdo.c.

519{
521 UNREFERENCED_PARAMETER(IoStackLocation);
522 UNREFERENCED_PARAMETER(DeviceExtension);
523
526}

◆ PciPdoIrpQueryPower()

NTSTATUS NTAPI PciPdoIrpQueryPower ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 107 of file pdo.c.

110{
112 UNREFERENCED_PARAMETER(IoStackLocation);
113 UNREFERENCED_PARAMETER(DeviceExtension);
114
117}

◆ PciPdoIrpQueryRemoveDevice()

NTSTATUS NTAPI PciPdoIrpQueryRemoveDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 220 of file pdo.c.

223{
225 UNREFERENCED_PARAMETER(IoStackLocation);
226 UNREFERENCED_PARAMETER(DeviceExtension);
227
230}

◆ PciPdoIrpQueryResourceRequirements()

NTSTATUS NTAPI PciPdoIrpQueryResourceRequirements ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 383 of file pdo.c.

386{
387 PAGED_CODE();
388
389 UNREFERENCED_PARAMETER(IoStackLocation);
390
391 /* Call the worker function */
392 return PciQueryRequirements(DeviceExtension,
394 IoStatus.Information);
395}
NTSTATUS NTAPI PciQueryRequirements(IN PPCI_PDO_EXTENSION PdoExtension, IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *RequirementsList)
Definition: enum.c:583

◆ PciPdoIrpQueryResources()

NTSTATUS NTAPI PciPdoIrpQueryResources ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 368 of file pdo.c.

371{
372 PAGED_CODE();
373
374 UNREFERENCED_PARAMETER(IoStackLocation);
375
376 /* Call the worker function */
377 return PciQueryResources(DeviceExtension,
378 (PCM_RESOURCE_LIST*)&Irp->IoStatus.Information);
379}
NTSTATUS NTAPI PciQueryResources(IN PPCI_PDO_EXTENSION PdoExtension, OUT PCM_RESOURCE_LIST *Buffer)
Definition: enum.c:354

◆ PciPdoIrpQueryStopDevice()

NTSTATUS NTAPI PciPdoIrpQueryStopDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 276 of file pdo.c.

279{
281 UNREFERENCED_PARAMETER(IoStackLocation);
282 UNREFERENCED_PARAMETER(DeviceExtension);
283
286}

◆ PciPdoIrpReadConfig()

NTSTATUS NTAPI PciPdoIrpReadConfig ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 446 of file pdo.c.

449{
451 UNREFERENCED_PARAMETER(IoStackLocation);
452 UNREFERENCED_PARAMETER(DeviceExtension);
453
456}

◆ PciPdoIrpRemoveDevice()

NTSTATUS NTAPI PciPdoIrpRemoveDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 234 of file pdo.c.

237{
239 UNREFERENCED_PARAMETER(IoStackLocation);
240 UNREFERENCED_PARAMETER(DeviceExtension);
241
244}

◆ PciPdoIrpStartDevice()

NTSTATUS NTAPI PciPdoIrpStartDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 121 of file pdo.c.

124{
126 BOOLEAN Changed, DoReset;
128 PAGED_CODE();
129
131
132 DoReset = FALSE;
133
134 /* Begin entering the start phase */
135 Status = PciBeginStateTransition((PVOID)DeviceExtension, PciStarted);
136 if (!NT_SUCCESS(Status)) return Status;
137
138 /* Check if this is a VGA device */
139 if (((DeviceExtension->BaseClass == PCI_CLASS_PRE_20) &&
140 (DeviceExtension->SubClass == PCI_SUBCLASS_PRE_20_VGA)) ||
141 ((DeviceExtension->BaseClass == PCI_CLASS_DISPLAY_CTLR) &&
142 (DeviceExtension->SubClass == PCI_SUBCLASS_VID_VGA_CTLR)))
143 {
144 /* Always force it on */
145 DeviceExtension->CommandEnables |= (PCI_ENABLE_IO_SPACE |
147 }
148
149 /* Check if native IDE is enabled and it owns the I/O ports */
150 if (DeviceExtension->IoSpaceUnderNativeIdeControl)
151 {
152 /* Then don't allow I/O access */
153 DeviceExtension->CommandEnables &= ~PCI_ENABLE_IO_SPACE;
154 }
155
156 /* Always enable bus mastering */
157 DeviceExtension->CommandEnables |= PCI_ENABLE_BUS_MASTER;
158
159 /* Check if the OS assigned resources differ from the PCI configuration */
160 Changed = PciComputeNewCurrentSettings(DeviceExtension,
161 IoStackLocation->Parameters.
162 StartDevice.AllocatedResources);
163 if (Changed)
164 {
165 /* Remember this for later */
166 DeviceExtension->MovedDevice = TRUE;
167 }
168 else
169 {
170 /* All good */
171 DPRINT1("PCI - START not changing resource settings.\n");
172 }
173
174 /* Check if the device was sleeping */
175 if (DeviceExtension->PowerState.CurrentDeviceState != PowerDeviceD0)
176 {
177 /* Power it up */
180 FALSE);
181 if (!NT_SUCCESS(Status))
182 {
183 /* Powerup fail, fail the request */
184 PciCancelStateTransition((PVOID)DeviceExtension, PciStarted);
186 }
187
188 /* Tell the power manager that the device is powered up */
189 PowerState.DeviceState = PowerDeviceD0;
190 PoSetPowerState(DeviceExtension->PhysicalDeviceObject,
192 PowerState);
193
194 /* Update internal state */
195 DeviceExtension->PowerState.CurrentDeviceState = PowerDeviceD0;
196
197 /* This device's resources and decodes will need to be reset */
198 DoReset = TRUE;
199 }
200
201 /* Update resource information now that the device is powered up and active */
202 Status = PciSetResources(DeviceExtension, DoReset, TRUE);
203 if (!NT_SUCCESS(Status))
204 {
205 /* That failed, so cancel the transition */
206 PciCancelStateTransition((PVOID)DeviceExtension, PciStarted);
207 }
208 else
209 {
210 /* Fully commit, as the device is now started up and ready to go */
211 PciCommitStateTransition((PVOID)DeviceExtension, PciStarted);
212 }
213
214 /* Return the result of the start request */
215 return Status;
216}
NTSTATUS NTAPI PciSetResources(IN PPCI_PDO_EXTENSION PdoExtension, IN BOOLEAN DoReset, IN BOOLEAN SomethingSomethingDarkSide)
Definition: enum.c:2155
BOOLEAN NTAPI PciComputeNewCurrentSettings(IN PPCI_PDO_EXTENSION PdoExtension, IN PCM_RESOURCE_LIST ResourceList)
Definition: enum.c:55
NTSTATUS NTAPI PciSetPowerManagedDevicePowerState(IN PPCI_PDO_EXTENSION DeviceExtension, IN DEVICE_POWER_STATE DeviceState, IN BOOLEAN IrpSet)
Definition: power.c:121
static BOOL StartDevice(IN HDEVINFO DeviceInfoSet, IN PSP_DEVINFO_DATA DevInfoData OPTIONAL, IN BOOL bEnable, IN DWORD HardwareProfile OPTIONAL, OUT BOOL *bNeedReboot OPTIONAL)
Definition: wizard.c:173
POWER_STATE NTAPI PoSetPowerState(IN PDEVICE_OBJECT DeviceObject, IN POWER_STATE_TYPE Type, IN POWER_STATE State)
Definition: power.c:729
@ DevicePowerState
Definition: ntpoapi.h:63
#define STATUS_DEVICE_POWER_FAILURE
Definition: ntstatus.h:394
_Must_inspect_result_ _In_ PWDFDEVICE_INIT _In_ WDF_DEVICE_POWER_STATE PowerState
Definition: wdfdevice.h:3034

◆ PciPdoIrpStopDevice()

NTSTATUS NTAPI PciPdoIrpStopDevice ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 262 of file pdo.c.

265{
267 UNREFERENCED_PARAMETER(IoStackLocation);
268 UNREFERENCED_PARAMETER(DeviceExtension);
269
272}

◆ PciPdoIrpSurpriseRemoval()

NTSTATUS NTAPI PciPdoIrpSurpriseRemoval ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 502 of file pdo.c.

505{
507 UNREFERENCED_PARAMETER(IoStackLocation);
508 UNREFERENCED_PARAMETER(DeviceExtension);
509
512}

◆ PciPdoIrpWriteConfig()

NTSTATUS NTAPI PciPdoIrpWriteConfig ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 460 of file pdo.c.

463{
465 UNREFERENCED_PARAMETER(IoStackLocation);
466 UNREFERENCED_PARAMETER(DeviceExtension);
467
470}

◆ PciPdoSetPowerState()

NTSTATUS NTAPI PciPdoSetPowerState ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 93 of file pdo.c.

96{
98 UNREFERENCED_PARAMETER(IoStackLocation);
99 UNREFERENCED_PARAMETER(DeviceExtension);
100
103}

◆ PciPdoWaitWake()

NTSTATUS NTAPI PciPdoWaitWake ( IN PIRP  Irp,
IN PIO_STACK_LOCATION  IoStackLocation,
IN PPCI_PDO_EXTENSION  DeviceExtension 
)

Definition at line 79 of file pdo.c.

82{
84 UNREFERENCED_PARAMETER(IoStackLocation);
85 UNREFERENCED_PARAMETER(DeviceExtension);
86
89}

◆ PcipLinkSecondaryExtension()

VOID NTAPI PcipLinkSecondaryExtension ( IN PSINGLE_LIST_ENTRY  List,
IN PVOID  Lock,
IN PPCI_SECONDARY_EXTENSION  SecondaryExtension,
IN PCI_SIGNATURE  ExtensionType,
IN PVOID  Destructor 
)

Definition at line 459 of file utils.c.

464{
465 PAGED_CODE();
466
467 /* Setup the extension data, and insert it into the primary's list */
468 SecondaryExtension->ExtensionType = ExtensionType;
469 SecondaryExtension->Destructor = Destructor;
470 PciInsertEntryAtHead(List, &SecondaryExtension->List, Lock);
471}
VOID NTAPI PciInsertEntryAtHead(IN PSINGLE_LIST_ENTRY ListHead, IN PSINGLE_LIST_ENTRY Entry, IN PKEVENT Lock)
Definition: utils.c:430

Referenced by PciInitializeArbiters().

◆ PciPmeInterfaceConstructor()

NTSTATUS NTAPI PciPmeInterfaceConstructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 45 of file pmeintf.c.

51{
52 UNREFERENCED_PARAMETER(DeviceExtension);
54 UNREFERENCED_PARAMETER(InterfaceData);
57
58 /* Only version 1 is supported */
60
61 /* Not yet implemented */
64}
#define STATUS_NOINTERFACE
Definition: ntstatus.h:812
#define PCI_PME_INTRF_STANDARD_VER
Definition: iotypes.h:5519

◆ PciPmeInterfaceInitializer()

NTSTATUS NTAPI PciPmeInterfaceInitializer ( IN PVOID  Instance)

Definition at line 35 of file pmeintf.c.

36{
38 /* PnP Interfaces don't get Initialized */
39 ASSERTMSG("PCI PciPmeInterfaceInitializer, unexpected call.\n", FALSE);
41}

◆ PciQueryBusInformation()

NTSTATUS NTAPI PciQueryBusInformation ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PPNP_BUS_INFORMATION Buffer 
)

Definition at line 1316 of file utils.c.

1318{
1319 PPNP_BUS_INFORMATION BusInfo;
1320
1322
1323 /* Allocate a structure for the bus information */
1325 sizeof(PNP_BUS_INFORMATION),
1326 'BicP');
1327 if (!BusInfo) return STATUS_INSUFFICIENT_RESOURCES;
1328
1329 /* Write the correct GUID and bus type identifier, and fill the bus number */
1330 BusInfo->BusTypeGuid = GUID_BUS_TYPE_PCI;
1331 BusInfo->LegacyBusType = PCIBus;
1332 BusInfo->BusNumber = PdoExtension->ParentFdoExtension->BaseBus;
1333 return STATUS_SUCCESS;
1334}
INTERFACE_TYPE LegacyBusType
Definition: cmtypes.h:365

Referenced by PciPdoIrpQueryBusInformation().

◆ PciQueryCapabilities()

NTSTATUS NTAPI PciQueryCapabilities ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN OUT PDEVICE_CAPABILITIES  DeviceCapability 
)

Definition at line 1727 of file utils.c.

1729{
1731
1732 /* A PDO ID is never unique, and its address is its function and device */
1733 DeviceCapability->UniqueID = FALSE;
1734 DeviceCapability->Address = PdoExtension->Slot.u.bits.FunctionNumber |
1735 (PdoExtension->Slot.u.bits.DeviceNumber << 16);
1736
1737 /* Check for host bridges */
1738 if ((PdoExtension->BaseClass == PCI_CLASS_BRIDGE_DEV) &&
1739 (PdoExtension->SubClass == PCI_SUBCLASS_BR_HOST))
1740 {
1741 /* Raw device opens to a host bridge are acceptable */
1742 DeviceCapability->RawDeviceOK = TRUE;
1743 }
1744 else
1745 {
1746 /* Otherwise, other PDOs cannot be directly opened */
1747 DeviceCapability->RawDeviceOK = FALSE;
1748 }
1749
1750 /* PCI PDOs are pretty fixed things */
1751 DeviceCapability->LockSupported = FALSE;
1752 DeviceCapability->EjectSupported = FALSE;
1753 DeviceCapability->Removable = FALSE;
1754 DeviceCapability->DockDevice = FALSE;
1755
1756 /* The slot number is stored as a device property, go query it */
1757 PciDetermineSlotNumber(PdoExtension, &DeviceCapability->UINumber);
1758
1759 /* Finally, query and power capabilities and convert them for PnP usage */
1760 Status = PciQueryPowerCapabilities(PdoExtension, DeviceCapability);
1761
1762 /* Dump the capabilities if it all worked, and return the status */
1763 if (NT_SUCCESS(Status)) PciDebugDumpQueryCapabilities(DeviceCapability);
1764 return Status;
1765}
NTSTATUS NTAPI PciQueryPowerCapabilities(IN PPCI_PDO_EXTENSION PdoExtension, IN PDEVICE_CAPABILITIES DeviceCapability)
Definition: utils.c:1477
NTSTATUS NTAPI PciDetermineSlotNumber(IN PPCI_PDO_EXTENSION PdoExtension, OUT PULONG SlotNumber)
Definition: utils.c:1338

Referenced by PciPdoIrpQueryCapabilities().

◆ PciQueryDeviceRelations()

NTSTATUS NTAPI PciQueryDeviceRelations ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN OUT PDEVICE_RELATIONS pDeviceRelations 
)

Definition at line 2034 of file enum.c.

2036{
2039 ULONG PdoCount = 0;
2040 PDEVICE_RELATIONS DeviceRelations, NewRelations;
2041 SIZE_T Size;
2042 PDEVICE_OBJECT DeviceObject, *ObjectArray;
2043 PAGED_CODE();
2044
2045 /* Make sure the FDO is started */
2046 ASSERT(DeviceExtension->DeviceState == PciStarted);
2047
2048 /* Synchronize while we enumerate the bus */
2050 if (!NT_SUCCESS(Status)) return Status;
2051
2052 /* Scan all children PDO */
2053 for (PdoExtension = DeviceExtension->ChildPdoList;
2055 PdoExtension = PdoExtension->Next)
2056 {
2057 /* Invalidate them */
2058 PdoExtension->NotPresent = TRUE;
2059 }
2060
2061 /* Scan the PCI Bus */
2062 Status = PciScanBus(DeviceExtension);
2064
2065 /* Enumerate all children PDO again */
2066 for (PdoExtension = DeviceExtension->ChildPdoList;
2068 PdoExtension = PdoExtension->Next)
2069 {
2070 /* Check for PDOs that are still invalidated */
2071 if (PdoExtension->NotPresent)
2072 {
2073 /* This means this PDO existed before, but not anymore */
2074 PdoExtension->ReportedMissing = TRUE;
2075 DPRINT1("PCI - Old device (pdox) %p not found on rescan.\n",
2076 PdoExtension);
2077 }
2078 else
2079 {
2080 /* Increase count of detected PDOs */
2081 PdoCount++;
2082 }
2083 }
2084
2085 /* Read the current relations and add the newly discovered relations */
2086 DeviceRelations = *pDeviceRelations;
2087 Size = FIELD_OFFSET(DEVICE_RELATIONS, Objects) +
2088 PdoCount * sizeof(PDEVICE_OBJECT);
2089 if (DeviceRelations) Size += sizeof(PDEVICE_OBJECT) * DeviceRelations->Count;
2090
2091 /* Allocate the device relations */
2092 NewRelations = (PDEVICE_RELATIONS)ExAllocatePoolWithTag(0, Size, 'BicP');
2093 if (!NewRelations)
2094 {
2095 /* Out of space, cancel the operation */
2098 }
2099
2100 /* Check if there were any older relations */
2101 NewRelations->Count = 0;
2102 if (DeviceRelations)
2103 {
2104 /* Copy the old relations into the new buffer, then free the old one */
2105 RtlCopyMemory(NewRelations,
2106 DeviceRelations,
2107 FIELD_OFFSET(DEVICE_RELATIONS, Objects) +
2108 DeviceRelations->Count * sizeof(PDEVICE_OBJECT));
2109 ExFreePoolWithTag(DeviceRelations, 0);
2110 }
2111
2112 /* Print out that we're ready to dump relations */
2113 DPRINT1("PCI QueryDeviceRelations/BusRelations FDOx %p (bus 0x%02x)\n",
2114 DeviceExtension,
2115 DeviceExtension->BaseBus);
2116
2117 /* Loop the current PDO children and the device relation object array */
2118 PdoExtension = DeviceExtension->ChildPdoList;
2119 ObjectArray = &NewRelations->Objects[NewRelations->Count];
2120 while (PdoExtension)
2121 {
2122 /* Dump this relation */
2123 DPRINT1(" QDR PDO %p (x %p)%s\n",
2124 PdoExtension->PhysicalDeviceObject,
2126 PdoExtension->NotPresent ?
2127 "<Omitted, device flaged not present>" : "");
2128
2129 /* Is this PDO present? */
2130 if (!PdoExtension->NotPresent)
2131 {
2132 /* Reference it and add it to the array */
2133 DeviceObject = PdoExtension->PhysicalDeviceObject;
2135 *ObjectArray++ = DeviceObject;
2136 }
2137
2138 /* Go to the next PDO */
2139 PdoExtension = PdoExtension->Next;
2140 }
2141
2142 /* Terminate dumping the relations */
2143 DPRINT1(" QDR Total PDO count = %u (%u already in list)\n",
2144 NewRelations->Count + PdoCount,
2145 NewRelations->Count);
2146
2147 /* Return the final count and the new buffer */
2148 NewRelations->Count += PdoCount;
2149 *pDeviceRelations = NewRelations;
2150 return STATUS_SUCCESS;
2151}
NTSTATUS NTAPI PciScanBus(IN PPCI_FDO_EXTENSION DeviceExtension)
Definition: enum.c:1571
struct _DEVICE_OBJECT * PDEVICE_OBJECT
PDEVICE_OBJECT Objects[1]
Definition: iotypes.h:2163
ULONG_PTR SIZE_T
Definition: typedefs.h:80
#define ObReferenceObject
Definition: obfuncs.h:204

Referenced by PciFdoIrpQueryDeviceRelations().

◆ PciQueryDeviceText()

NTSTATUS NTAPI PciQueryDeviceText ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN DEVICE_TEXT_TYPE  QueryType,
IN ULONG  Locale,
OUT PWCHAR Buffer 
)

Definition at line 394 of file id.c.

398{
399 PWCHAR MessageBuffer, LocationBuffer;
402
404
405 /* Check what the caller is requesting */
406 switch (QueryType)
407 {
409
410 /* Get the message from the resource section */
411 MessageBuffer = PciGetDeviceDescriptionMessage(PdoExtension->BaseClass,
412 PdoExtension->SubClass);
413
414 /* Return it to the caller, and select proper status code */
415 *Buffer = MessageBuffer;
416 Status = MessageBuffer ? STATUS_SUCCESS : STATUS_NOT_SUPPORTED;
417 break;
418
420
421 /* Get the message from the resource section */
422 MessageBuffer = PciGetDescriptionMessage(0x10000, &Length);
423 if (!MessageBuffer)
424 {
425 /* It should be there, but fail if it wasn't found for some reason */
427 break;
428 }
429
430 /* Add space for a null-terminator, and allocate the buffer */
431 Length += 2 * sizeof(UNICODE_NULL);
432 LocationBuffer = ExAllocatePoolWithTag(PagedPool,
433 Length * sizeof(WCHAR),
434 'BicP');
435 *Buffer = LocationBuffer;
436
437 /* Check if the allocation succeeded */
438 if (LocationBuffer)
439 {
440 /* Build the location string based on bus, function, and device */
441 swprintf(LocationBuffer,
442 MessageBuffer,
443 PdoExtension->ParentFdoExtension->BaseBus,
444 PdoExtension->Slot.u.bits.FunctionNumber,
445 PdoExtension->Slot.u.bits.DeviceNumber);
446 }
447
448 /* Free the original string from the resource section */
449 ExFreePoolWithTag(MessageBuffer, 0);
450
451 /* Select the correct status */
453 break;
454
455 default:
456
457 /* Anything else is unsupported */
459 break;
460 }
461
462 /* Return whether or not a device text string was indeed found */
463 return Status;
464}
PWCHAR NTAPI PciGetDeviceDescriptionMessage(IN UCHAR BaseClass, IN UCHAR SubClass)
Definition: id.c:88
#define UNICODE_NULL
_Must_inspect_result_ _In_ KTMOBJECT_TYPE QueryType
Definition: nttmapi.h:404
@ DeviceTextLocationInformation
Definition: iotypes.h:2946
@ DeviceTextDescription
Definition: iotypes.h:2945

Referenced by PciPdoIrpQueryDeviceText().

◆ PciQueryEjectionRelations()

NTSTATUS NTAPI PciQueryEjectionRelations ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN OUT PDEVICE_RELATIONS pDeviceRelations 
)

Definition at line 538 of file enum.c.

540{
542 UNREFERENCED_PARAMETER(pDeviceRelations);
543
544 /* Not yet implemented */
547}

Referenced by PciPdoIrpQueryDeviceRelations().

◆ PciQueryId()

NTSTATUS NTAPI PciQueryId ( IN PPCI_PDO_EXTENSION  DeviceExtension,
IN BUS_QUERY_ID_TYPE  QueryType,
OUT PWCHAR Buffer 
)

Definition at line 200 of file id.c.

203{
204 ULONG SubsysId;
205 CHAR VendorString[22];
207 PPCI_FDO_EXTENSION ParentExtension;
209 ULONG i, Size;
211 PANSI_STRING NextString;
213 PCI_ID_BUFFER IdBuffer;
214 PAGED_CODE();
215
216 /* Assume failure */
218 *Buffer = NULL;
219
220 /* Start with the genric vendor string, which is the vendor ID + device ID */
221 sprintf(VendorString,
222 "PCI\\VEN_%04X&DEV_%04X",
223 DeviceExtension->VendorId,
224 DeviceExtension->DeviceId);
225
226 /* Initialize the PCI ID Buffer */
227 PciInitIdBuffer(&IdBuffer);
228
229 /* Build the subsystem ID as shown in PCI ID Strings */
230 SubsysId = DeviceExtension->SubsystemVendorId | (DeviceExtension->SubsystemId << 16);
231
232 /* Check what the caller is requesting */
233 switch (QueryType)
234 {
235 case BusQueryDeviceID:
236
237 /* A single ID, the vendor string + the revision ID */
238 PciIdPrintf(&IdBuffer,
239 "%s&SUBSYS_%08X&REV_%02X",
240 VendorString,
241 SubsysId,
242 DeviceExtension->RevisionId);
243 break;
244
246
247 /* First the vendor string + the subsystem ID + the revision ID */
248 PciIdPrintf(&IdBuffer,
249 "%s&SUBSYS_%08X&REV_%02X",
250 VendorString,
251 SubsysId,
252 DeviceExtension->RevisionId);
253
254 /* Next, without the revision */
255 PciIdPrintf(&IdBuffer,
256 "%s&SUBSYS_%08X",
257 VendorString,
258 SubsysId);
259
260 /* Next, the vendor string + the base class + sub class + progif */
261 PciIdPrintf(&IdBuffer,
262 "%s&CC_%02X%02X%02X",
263 VendorString,
264 DeviceExtension->BaseClass,
265 DeviceExtension->SubClass,
266 DeviceExtension->ProgIf);
267
268 /* Next, without the progif */
269 PciIdPrintf(&IdBuffer,
270 "%s&CC_%02X%02X",
271 VendorString,
272 DeviceExtension->BaseClass,
273 DeviceExtension->SubClass);
274
275 /* And finally, a terminator */
276 PciIdPrintf(&IdBuffer, "\0");
277 break;
278
280
281 /* First, the vendor + revision ID only */
282 PciIdPrintf(&IdBuffer,
283 "%s&REV_%02X",
284 VendorString,
285 DeviceExtension->RevisionId);
286
287 /* Next, the vendor string alone */
288 PciIdPrintf(&IdBuffer, "%s", VendorString);
289
290 /* Next, the vendor ID + the base class + the sub class + progif */
291 PciIdPrintf(&IdBuffer,
292 "PCI\\VEN_%04X&CC_%02X%02X%02X",
293 DeviceExtension->VendorId,
294 DeviceExtension->BaseClass,
295 DeviceExtension->SubClass,
296 DeviceExtension->ProgIf);
297
298 /* Now without the progif */
299 PciIdPrintf(&IdBuffer,
300 "PCI\\VEN_%04X&CC_%02X%02X",
301 DeviceExtension->VendorId,
302 DeviceExtension->BaseClass,
303 DeviceExtension->SubClass);
304
305 /* And then just the vendor ID itself */
306 PciIdPrintf(&IdBuffer,
307 "PCI\\VEN_%04X",
308 DeviceExtension->VendorId);
309
310 /* Then the base class + subclass + progif, without any vendor */
311 PciIdPrintf(&IdBuffer,
312 "PCI\\CC_%02X%02X%02X",
313 DeviceExtension->BaseClass,
314 DeviceExtension->SubClass,
315 DeviceExtension->ProgIf);
316
317 /* Next, without the progif */
318 PciIdPrintf(&IdBuffer,
319 "PCI\\CC_%02X%02X",
320 DeviceExtension->BaseClass,
321 DeviceExtension->SubClass);
322
323 /* And finally, a terminator */
324 PciIdPrintf(&IdBuffer, "\0");
325 break;
326
328
329 /* Start with a terminator */
330 PciIdPrintf(&IdBuffer, "\0");
331
332 /* And then encode the device and function number */
333 PciIdPrintfAppend(&IdBuffer,
334 "%02X",
335 (DeviceExtension->Slot.u.bits.DeviceNumber << 3) |
336 DeviceExtension->Slot.u.bits.FunctionNumber);
337
338 /* Loop every parent until the root */
339 ParentExtension = DeviceExtension->ParentFdoExtension;
340 while (!PCI_IS_ROOT_FDO(ParentExtension))
341 {
342 /* And encode the parent's device and function number as well */
344 PciIdPrintfAppend(&IdBuffer,
345 "%02X",
346 (PdoExtension->Slot.u.bits.DeviceNumber << 3) |
347 PdoExtension->Slot.u.bits.FunctionNumber);
348 }
349 break;
350
351 default:
352
353 /* Unknown query type */
354 DPRINT1("PciQueryId expected ID type = %d\n", QueryType);
356 }
357
358 /* Something should've been generated if this has been reached */
359 ASSERT(IdBuffer.Count > 0);
360
361 /* Allocate the final string buffer to hold the ID */
364
365 /* Build the UNICODE_STRING structure for it */
366 DPRINT1("PciQueryId(%d)\n", QueryType);
369
370 /* Loop every ID in the buffer */
371 for (i = 0; i < IdBuffer.Count; i++)
372 {
373 /* Select the ANSI_STRING for the ID */
374 NextString = &IdBuffer.Strings[i];
375 DPRINT1(" <- \"%s\"\n", NextString->Buffer);
376
377 /* Convert it to a UNICODE_STRING */
380
381 /* Add it into the final destination buffer */
382 Size = IdBuffer.StringSize[i];
384 DestinationString.Buffer += (Size / sizeof(WCHAR));
385 }
386
387 /* Return the buffer to the caller and return status (should be success) */
389 return Status;
390}
ULONG __cdecl PciIdPrintfAppend(IN PPCI_ID_BUFFER IdBuffer, IN PCCH Format,...)
Definition: id.c:159
VOID NTAPI PciInitIdBuffer(IN PPCI_ID_BUFFER IdBuffer)
Definition: id.c:112
ULONG __cdecl PciIdPrintf(IN PPCI_ID_BUFFER IdBuffer, IN PCCH Format,...)
Definition: id.c:122
WCHAR StringBuffer[156]
Definition: ldrinit.c:41
#define sprintf(buf, format,...)
Definition: sprintf.c:55
_Out_ _Inout_ POEM_STRING DestinationString
Definition: rtlfuncs.h:1909
NTSYSAPI NTSTATUS NTAPI RtlAnsiStringToUnicodeString(PUNICODE_STRING DestinationString, PANSI_STRING SourceString, BOOLEAN AllocateDestinationString)
PDEVICE_OBJECT PhysicalDeviceObject
Definition: pci.h:200
struct _PCI_FDO_EXTENSION * ParentFdoExtension
Definition: pci.h:206
ULONG Count
Definition: pci.h:426
ULONG StringSize[MAX_ANSI_STRINGS]
Definition: pci.h:428
ANSI_STRING Strings[MAX_ANSI_STRINGS]
Definition: pci.h:427
ULONG TotalLength
Definition: pci.h:429
void * Buffer
Definition: sprintf.c:453
unsigned short MaximumLength
Definition: sprintf.c:452
@ BusQueryCompatibleIDs
Definition: iotypes.h:2938
@ BusQueryInstanceID
Definition: iotypes.h:2939
@ BusQueryDeviceID
Definition: iotypes.h:2936
@ BusQueryHardwareIDs
Definition: iotypes.h:2937
char CHAR
Definition: xmlstorage.h:175

Referenced by PciPdoIrpQueryId().

◆ PciQueryInterface()

NTSTATUS NTAPI PciQueryInterface ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN CONST GUID InterfaceType,
IN ULONG  Size,
IN ULONG  Version,
IN PVOID  InterfaceData,
IN PINTERFACE  Interface,
IN BOOLEAN  LastChance 
)

Definition at line 45 of file intrface.c.

52{
56 PPCI_INTERFACE PciInterface;
58 DPRINT1("PCI - PciQueryInterface TYPE = %wZ\n", &GuidString);
60 DPRINT1(" Size = %u, Version = %u, InterfaceData = %p, LastChance = %s\n",
61 Size,
62 Version,
63 InterfaceData,
64 LastChance ? "TRUE" : "FALSE");
65
66 /* Loop all the available interfaces */
70 {
71 /* Get the current interface */
72 PciInterface = *InterfaceList;
73
74 /* For debugging, construct the GUID string */
76
77 /* Check if this is an FDO or PDO */
78 if (DeviceExtension->ExtensionType == PciFdoExtensionType)
79 {
80 /* Check if the interface is for FDOs */
81 if (!(PciInterface->Flags & PCI_INTERFACE_FDO))
82 {
83 /* This interface is not for FDOs, skip it */
84 DPRINT1("PCI - PciQueryInterface: guid = %wZ only for FDOs\n",
85 &GuidString);
87 continue;
88 }
89
90 /* Check if the interface is for root FDO only */
91 if ((PciInterface->Flags & PCI_INTERFACE_ROOT) &&
92 (!PCI_IS_ROOT_FDO(DeviceExtension)))
93 {
94 /* This FDO isn't the root, skip the interface */
95 DPRINT1("PCI - PciQueryInterface: guid = %wZ only for ROOT\n",
96 &GuidString);
98 continue;
99 }
100 }
101 else
102 {
103 /* This is a PDO, check if the interface is for PDOs too */
104 if (!(PciInterface->Flags & PCI_INTERFACE_PDO))
105 {
106 /* It isn't, skip it */
107 DPRINT1("PCI - PciQueryInterface: guid = %wZ only for PDOs\n",
108 &GuidString);
110 continue;
111 }
112 }
113
114 /* Print the GUID for debugging, and then free the string */
115 DPRINT1("PCI - PciQueryInterface looking at guid = %wZ\n", &GuidString);
117
118 /* Check if the GUID, version, and size all match */
119 if ((IsEqualGUIDAligned(PciInterface->InterfaceType, InterfaceType)) &&
120 (Version >= PciInterface->MinVersion) &&
121 (Version <= PciInterface->MaxVersion) &&
122 (Size >= PciInterface->MinSize))
123 {
124 /* Call the interface's constructor */
125 Status = PciInterface->Constructor(DeviceExtension,
126 PciInterface,
127 InterfaceData,
128 Version,
129 Size,
130 Interface);
131 if (!NT_SUCCESS(Status))
132 {
133 /* This interface was not initialized correctly, skip it */
134 DPRINT1("PCI - PciQueryInterface - Constructor %p = %08lx\n",
135 PciInterface->Constructor, Status);
136 continue;
137 }
138
139 /* Reference the interface and return success, all is good */
140 Interface->InterfaceReference(Interface->Context);
141 DPRINT1("PCI - PciQueryInterface returning SUCCESS\n");
142 return Status;
143 }
144 }
145
146 /* An interface of this type, and for this device, could not be found */
147 DPRINT1("PCI - PciQueryInterface FAILED TO FIND INTERFACE\n");
149}
#define PCI_INTERFACE_PDO
Definition: pci.h:57
#define PCI_INTERFACE_FDO
Definition: pci.h:58
#define PCI_INTERFACE_ROOT
Definition: pci.h:59
NTSYSAPI NTSTATUS WINAPI RtlStringFromGUID(REFGUID, PUNICODE_STRING)
PPCI_INTERFACE PciInterfacesLastResort[]
Definition: intrface.c:35
static PWSTR GuidString
Definition: apphelp.c:93
NTSYSAPI VOID NTAPI RtlFreeUnicodeString(PUNICODE_STRING UnicodeString)
USHORT MinSize
Definition: pci.h:378
USHORT Flags
Definition: pci.h:381
PCI_INTERFACE_CONSTRUCTOR Constructor
Definition: pci.h:384
USHORT MinVersion
Definition: pci.h:379
CONST GUID * InterfaceType
Definition: pci.h:377
_In_ PUSBD_INTERFACE_LIST_ENTRY InterfaceList
Definition: usbdlib.h:181
#define IsEqualGUIDAligned(guid1, guid2)
Definition: wdm.template.h:235

Referenced by PciFdoIrpQueryInterface().

◆ PciQueryRequirements()

NTSTATUS NTAPI PciQueryRequirements ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN OUT PIO_RESOURCE_REQUIREMENTS_LIST RequirementsList 
)

Definition at line 583 of file enum.c.

585{
587 PCI_COMMON_HEADER PciHeader;
588 PAGED_CODE();
589
590 /* Check if the PDO has any resources, or at least an interrupt pin */
591 if ((PdoExtension->Resources) || (PdoExtension->InterruptPin))
592 {
593 /* Read the current PCI header */
595
596 /* Use it to build a list of requirements */
598 if (!NT_SUCCESS(Status)) return Status;
599
600 /* Is this a Compaq PCI Hotplug Controller (r17) on a PAE system ? */
601 if ((PciHeader.VendorID == 0xE11) &&
602 (PciHeader.DeviceID == 0xA0F7) &&
603 (PciHeader.RevisionID == 17) &&
605 {
606 /* Have not tested this on eVb's machine yet */
608 }
609
610 /* Check if the requirements are actually the zero list */
612 {
613 /* A simple NULL will suffice for the PnP Manager */
615 DPRINT1("Returning NULL requirements list\n");
616 }
617 else
618 {
619 /* Otherwise, print out the requirements list */
621 }
622 }
623 else
624 {
625 /* There aren't any resources, so simply return NULL */
626 DPRINT1("PciQueryRequirements returning NULL requirements list\n");
628 }
629
630 /* This call always succeeds (but maybe with no requirements) */
631 return STATUS_SUCCESS;
632}
VOID NTAPI PciDebugPrintIoResReqList(IN PIO_RESOURCE_REQUIREMENTS_LIST Requirements)
Definition: debug.c:302
NTSTATUS NTAPI PciBuildRequirementsList(IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData, OUT PIO_RESOURCE_REQUIREMENTS_LIST *Buffer)
Definition: enum.c:551
BOOLEAN NTAPI ExIsProcessorFeaturePresent(IN ULONG ProcessorFeature)
Definition: sysinfo.c:363
#define PF_PAE_ENABLED
Definition: ketypes.h:133

Referenced by PciPdoIrpQueryResourceRequirements().

◆ PciQueryResources()

NTSTATUS NTAPI PciQueryResources ( IN PPCI_PDO_EXTENSION  PdoExtension,
OUT PCM_RESOURCE_LIST Buffer 
)

Definition at line 354 of file enum.c.

356{
357 PPCI_FUNCTION_RESOURCES PciResources;
358 BOOLEAN HaveVga, HaveMemSpace, HaveIoSpace;
359 USHORT BridgeControl, PciCommand;
360 ULONG Count, i;
361 PCM_PARTIAL_RESOURCE_DESCRIPTOR Partial, Resource, LastResource;
363 UCHAR InterruptLine;
364 PAGED_CODE();
365
366 /* Assume failure */
367 Count = 0;
368 HaveVga = FALSE;
369 *Buffer = NULL;
370
371 /* Make sure there's some resources to query */
372 PciResources = PdoExtension->Resources;
373 if (!PciResources) return STATUS_SUCCESS;
374
375 /* Read the decodes */
377 &PciCommand,
379 sizeof(USHORT));
380
381 /* Check which ones are turned on */
382 HaveIoSpace = PciCommand & PCI_ENABLE_IO_SPACE;
383 HaveMemSpace = PciCommand & PCI_ENABLE_MEMORY_SPACE;
384
385 /* Loop maximum possible descriptors */
386 for (i = 0; i < 7; i++)
387 {
388 /* Check if the decode for this descriptor is actually turned on */
389 Partial = &PciResources->Current[i];
390 if (((HaveMemSpace) && (Partial->Type == CmResourceTypeMemory)) ||
391 ((HaveIoSpace) && (Partial->Type == CmResourceTypePort)))
392 {
393 /* One more fully active descriptor */
394 Count++;
395 }
396 }
397
398 /* If there's an interrupt pin associated, check at least one decode is on */
399 if ((PdoExtension->InterruptPin) && ((HaveMemSpace) || (HaveIoSpace)))
400 {
401 /* Read the interrupt line for the pin, add a descriptor if it's valid */
402 InterruptLine = PdoExtension->AdjustedInterruptLine;
403 if ((InterruptLine) && (InterruptLine != -1)) Count++;
404 }
405
406 /* Check for PCI bridge */
407 if (PdoExtension->HeaderType == PCI_BRIDGE_TYPE)
408 {
409 /* Read bridge settings, check if VGA is present */
411 &BridgeControl,
412 FIELD_OFFSET(PCI_COMMON_HEADER, u.type1.BridgeControl),
413 sizeof(USHORT));
414 if (BridgeControl & PCI_ENABLE_BRIDGE_VGA)
415 {
416 /* Remember for later */
417 HaveVga = TRUE;
418
419 /* One memory descriptor for 0xA0000, plus the two I/O port ranges */
420 if (HaveMemSpace) Count++;
421 if (HaveIoSpace) Count += 2;
422 }
423 }
424
425 /* If there's no descriptors in use, there's no resources, so return */
426 if (!Count) return STATUS_SUCCESS;
427
428 /* Allocate a resource list to hold the resources */
430 PdoExtension->ParentFdoExtension->BaseBus);
432
433 /* This is where the descriptors will be copied into */
434 Resource = ResourceList->List[0].PartialResourceList.PartialDescriptors;
435 LastResource = Resource + Count + 1;
436
437 /* Loop maximum possible descriptors */
438 for (i = 0; i < 7; i++)
439 {
440 /* Check if the decode for this descriptor is actually turned on */
441 Partial = &PciResources->Current[i];
442 if (((HaveMemSpace) && (Partial->Type == CmResourceTypeMemory)) ||
443 ((HaveIoSpace) && (Partial->Type == CmResourceTypePort)))
444 {
445 /* Copy the descriptor into the resource list */
446 *Resource++ = *Partial;
447 }
448 }
449
450 /* Check if earlier the code detected this was a PCI bridge with VGA on it */
451 if (HaveVga)
452 {
453 /* Are the memory decodes enabled? */
454 if (HaveMemSpace)
455 {
456 /* Build a memory descriptor for a 128KB framebuffer at 0xA0000 */
458 Resource->u.Generic.Start.HighPart = 0;
460 Resource->u.Generic.Start.LowPart = 0xA0000;
461 Resource->u.Generic.Length = 0x20000;
462 Resource++;
463 }
464
465 /* Are the I/O decodes enabled? */
466 if (HaveIoSpace)
467 {
468 /* Build an I/O descriptor for the graphic ports at 0x3B0 */
471 Resource->u.Port.Start.QuadPart = 0x3B0u;
472 Resource->u.Port.Length = 0xC;
473 Resource++;
474
475 /* Build an I/O descriptor for the graphic ports at 0x3C0 */
478 Resource->u.Port.Start.QuadPart = 0x3C0u;
479 Resource->u.Port.Length = 0x20;
480 Resource++;
481 }
482 }
483
484 /* If there's an interrupt pin associated, check at least one decode is on */
485 if ((PdoExtension->InterruptPin) && ((HaveMemSpace) || (HaveIoSpace)))
486 {
487 /* Read the interrupt line for the pin, check if it's valid */
488 InterruptLine = PdoExtension->AdjustedInterruptLine;
489 if ((InterruptLine) && (InterruptLine != -1))
490 {
491 /* Make sure there's still space */
492 ASSERT(Resource < LastResource);
493
494 /* Add the interrupt descriptor */
497 Resource->ShareDisposition = CmResourceShareShared;
498 Resource->u.Interrupt.Affinity = -1;
499 Resource->u.Interrupt.Level = InterruptLine;
500 Resource->u.Interrupt.Vector = InterruptLine;
501 }
502 }
503
504 /* Return the resource list */
506 return STATUS_SUCCESS;
507}
_Acquires_exclusive_lock_ Resource _Acquires_shared_lock_ Resource _Inout_ PERESOURCE Resource
Definition: cdprocs.h:843
PCM_RESOURCE_LIST NTAPI PciAllocateCmResourceList(IN ULONG Count, IN ULONG BusNumber)
Definition: enum.c:324
#define CM_RESOURCE_PORT_POSITIVE_DECODE
Definition: cmtypes.h:113
#define CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE
Definition: cmtypes.h:143
#define CM_RESOURCE_MEMORY_READ_WRITE
Definition: cmtypes.h:120
#define CM_RESOURCE_PORT_10_BIT_DECODE
Definition: cmtypes.h:110
@ CmResourceShareShared
Definition: cmtypes.h:243
#define PCI_BRIDGE_TYPE
Definition: iotypes.h:3606

Referenced by PciPdoIrpQueryResources().

◆ PciQueryTargetDeviceRelations()

NTSTATUS NTAPI PciQueryTargetDeviceRelations ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN OUT PDEVICE_RELATIONS pDeviceRelations 
)

Definition at line 511 of file enum.c.

513{
514 PDEVICE_RELATIONS DeviceRelations;
515 PAGED_CODE();
516
517 /* If there were existing relations, free them */
518 if (*pDeviceRelations) ExFreePoolWithTag(*pDeviceRelations, 0);
519
520 /* Allocate a new structure for the relations */
521 DeviceRelations = ExAllocatePoolWithTag(NonPagedPool,
522 sizeof(DEVICE_RELATIONS),
523 'BicP');
524 if (!DeviceRelations) return STATUS_INSUFFICIENT_RESOURCES;
525
526 /* Only one relation: the PDO */
527 DeviceRelations->Count = 1;
528 DeviceRelations->Objects[0] = PdoExtension->PhysicalDeviceObject;
529 ObReferenceObject(DeviceRelations->Objects[0]);
530
531 /* Return the new relations */
532 *pDeviceRelations = DeviceRelations;
533 return STATUS_SUCCESS;
534}
#define NonPagedPool
Definition: env_spec_w32.h:307

Referenced by PciPdoIrpQueryDeviceRelations().

◆ PciReadDeviceCapability()

UCHAR NTAPI PciReadDeviceCapability ( IN PPCI_PDO_EXTENSION  DeviceExtension,
IN UCHAR  Offset,
IN ULONG  CapabilityId,
OUT PPCI_CAPABILITIES_HEADER  Buffer,
IN ULONG  Length 
)

Definition at line 886 of file utils.c.

891{
892 ULONG CapabilityCount = 0;
893
894 /* If the device has no capabilility list, fail */
895 if (!Offset) return 0;
896
897 /* Validate a PDO with capabilities, a valid buffer, and a valid length */
898 ASSERT(DeviceExtension->ExtensionType == PciPdoExtensionType);
899 ASSERT(DeviceExtension->CapabilitiesPtr != 0);
900 ASSERT(Buffer);
902
903 /* Loop all capabilities */
904 while (Offset)
905 {
906 /* Make sure the pointer is spec-aligned and spec-sized */
907 ASSERT((Offset >= PCI_COMMON_HDR_LENGTH) && ((Offset & 0x3) == 0));
908
909 /* Read the capability header */
910 PciReadDeviceConfig(DeviceExtension,
911 Buffer,
912 Offset,
914
915 /* Check if this is the capability being looked up */
916 if ((Buffer->CapabilityID == CapabilityId) || !(CapabilityId))
917 {
918 /* Check if was at a valid offset and length */
919 if ((Offset) && (Length > sizeof(PCI_CAPABILITIES_HEADER)))
920 {
921 /* Sanity check */
922 ASSERT(Length <= (sizeof(PCI_COMMON_CONFIG) - Offset));
923
924 /* Now read the whole capability data into the buffer */
925 PciReadDeviceConfig(DeviceExtension,
930 }
931
932 /* Return the offset where the capability was found */
933 return Offset;
934 }
935
936 /* Try the next capability instead */
937 CapabilityCount++;
938 Offset = Buffer->Next;
939
940 /* There can't be more than 48 capabilities (256 bytes max) */
941 if (CapabilityCount > 48)
942 {
943 /* Fail, since this is basically a broken PCI device */
944 DPRINT1("PCI device %p capabilities list is broken.\n", DeviceExtension);
945 return 0;
946 }
947 }
948
949 /* Capability wasn't found, fail */
950 return 0;
951}
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101

Referenced by PciGetEnhancedCapabilities(), PciScanBus(), and PciSetPowerManagedDevicePowerState().

◆ PciReadDeviceConfig()

VOID NTAPI PciReadDeviceConfig ( IN PPCI_PDO_EXTENSION  DeviceExtension,
IN PVOID  Buffer,
IN ULONG  Offset,
IN ULONG  Length 
)

Definition at line 107 of file config.c.

111{
112 /* Call the generic worker function */
113 PciReadWriteConfigSpace(DeviceExtension->ParentFdoExtension,
114 DeviceExtension->Slot,
115 Buffer,
116 Offset,
117 Length,
118 TRUE);
119}
VOID NTAPI PciReadWriteConfigSpace(IN PPCI_FDO_EXTENSION DeviceExtension, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length, IN BOOLEAN Read)
Definition: config.c:49

Referenced by PciApplyHacks(), PciAssignSlotResources(), PciConfigureIdeController(), PciDecodeEnable(), PcipGetFunctionLimits(), PciQueryRequirements(), PciQueryResources(), PciReadDeviceCapability(), PciScanBus(), PciSetResources(), PciStallForPowerChange(), and PciWriteLimitsAndRestoreCurrent().

◆ PciReadSlotConfig()

VOID NTAPI PciReadSlotConfig ( IN PPCI_FDO_EXTENSION  DeviceExtension,
IN PCI_SLOT_NUMBER  Slot,
IN PVOID  Buffer,
IN ULONG  Offset,
IN ULONG  Length 
)

Definition at line 123 of file config.c.

128{
129 /* Call the generic worker function */
130 PciReadWriteConfigSpace(DeviceExtension, Slot, Buffer, Offset, Length, TRUE);
131}

Referenced by PciScanBus().

◆ PciSaveBiosConfig()

NTSTATUS NTAPI PciSaveBiosConfig ( IN PPCI_PDO_EXTENSION  DeviceExtension,
OUT PPCI_COMMON_HEADER  PciData 
)

Referenced by PciScanBus().

◆ PciSendIoctl()

NTSTATUS NTAPI PciSendIoctl ( IN PDEVICE_OBJECT  DeviceObject,
IN ULONG  IoControlCode,
IN PVOID  InputBuffer,
IN ULONG  InputBufferLength,
IN PVOID  OutputBuffer,
IN ULONG  OutputBufferLength 
)

Definition at line 531 of file utils.c.

537{
538 PIRP Irp;
542 PDEVICE_OBJECT AttachedDevice;
543 PAGED_CODE();
544
545 /* Initialize the pending IRP event */
547
548 /* Get a reference to the root PDO (ACPI) */
550 if (!AttachedDevice) return STATUS_INVALID_PARAMETER;
551
552 /* Build the requested IOCTL IRP */
554 AttachedDevice,
559 0,
560 &Event,
563
564 /* Send the IOCTL to the driver */
565 Status = IoCallDriver(AttachedDevice, Irp);
566 if (Status == STATUS_PENDING)
567 {
568 /* Wait for a response */
570 Executive,
572 FALSE,
573 NULL);
574 Status = Irp->IoStatus.Status;
575 }
576
577 /* Take away the reference we took and return the result to the caller */
578 ObDereferenceObject(AttachedDevice);
579 return Status;
580}
static OUT PIO_STATUS_BLOCK IoStatusBlock
Definition: pipe.c:75
PDEVICE_OBJECT NTAPI IoGetAttachedDeviceReference(PDEVICE_OBJECT DeviceObject)
Definition: device.c:1406
PIRP NTAPI IoBuildDeviceIoControlRequest(IN ULONG IoControlCode, IN PDEVICE_OBJECT DeviceObject, IN PVOID InputBuffer, IN ULONG InputBufferLength, IN PVOID OutputBuffer, IN ULONG OutputBufferLength, IN BOOLEAN InternalDeviceIoControl, IN PKEVENT Event, IN PIO_STATUS_BLOCK IoStatusBlock)
Definition: irp.c:881
_In_ WDFREQUEST _In_ size_t _In_ size_t _In_ ULONG IoControlCode
Definition: wdfio.h:325
_In_ WDFREQUEST _In_ size_t OutputBufferLength
Definition: wdfio.h:320
_In_ WDFREQUEST _In_ size_t _In_ size_t InputBufferLength
Definition: wdfio.h:322
#define ObDereferenceObject
Definition: obfuncs.h:203

Referenced by PciGetHotPlugParameters(), and PciIsSlotPresentInParentMethod().

◆ PciSetPowerManagedDevicePowerState()

NTSTATUS NTAPI PciSetPowerManagedDevicePowerState ( IN PPCI_PDO_EXTENSION  DeviceExtension,
IN DEVICE_POWER_STATE  DeviceState,
IN BOOLEAN  IrpSet 
)

Definition at line 121 of file power.c.

124{
126 PCI_PM_CAPABILITY PmCaps;
127 ULONG CapsOffset;
128
129 /* Assume success */
131
132 /* Check if this device can support low power states */
133 if (!(PciCanDisableDecodes(DeviceExtension, NULL, 0, TRUE)) &&
135 {
136 /* Simply return success, ignoring this request */
137 DPRINT1("Cannot disable decodes on this device, ignoring PM request...\n");
138 return Status;
139 }
140
141 /* Does the device support power management at all? */
142 if (!(DeviceExtension->HackFlags & PCI_HACK_NO_PM_CAPS))
143 {
144 /* Get the PM capabilities register */
145 CapsOffset = PciReadDeviceCapability(DeviceExtension,
146 DeviceExtension->CapabilitiesPtr,
148 &PmCaps.Header,
149 sizeof(PCI_PM_CAPABILITY));
150 ASSERT(CapsOffset);
152
153 /* Check if the device is being powered up */
155 {
156 /* Set full power state */
157 PmCaps.PMCSR.ControlStatus.PowerState = 0;
158
159 /* Check if the device supports Cold-D3 poweroff */
160 if (PmCaps.PMC.Capabilities.Support.PMED3Cold)
161 {
162 /* If there was a pending PME, clear it */
163 PmCaps.PMCSR.ControlStatus.PMEStatus = 1;
164 }
165 }
166 else
167 {
168 /* Otherwise, just set the new power state, converting from NT */
170 }
171
172 /* Write the new power state in the PMCSR */
173 PciWriteDeviceConfig(DeviceExtension,
174 &PmCaps.PMCSR,
175 CapsOffset + FIELD_OFFSET(PCI_PM_CAPABILITY, PMCSR),
176 sizeof(PCI_PMCSR));
177
178 /* Now wait for the change to "stick" based on the spec-mandated time */
179 Status = PciStallForPowerChange(DeviceExtension, DeviceState, CapsOffset);
180 if (!NT_SUCCESS(Status)) return Status;
181 }
182 else
183 {
184 /* Nothing to do! */
185 DPRINT1("No PM on this device, ignoring request\n");
186 }
187
188 /* Check if new resources have to be assigned */
189 if (IrpSet)
190 {
191 /* Check if the new device state is lower (higher power) than now */
192 if (DeviceState < DeviceExtension->PowerState.CurrentDeviceState)
193 {
194 /* We would normally re-assign resources after powerup */
197 }
198 }
199
200 /* Return the power state change status */
201 return Status;
202}
UCHAR NTAPI PciReadDeviceCapability(IN PPCI_PDO_EXTENSION DeviceExtension, IN UCHAR Offset, IN ULONG CapabilityId, OUT PPCI_CAPABILITIES_HEADER Buffer, IN ULONG Length)
Definition: utils.c:886
BOOLEAN NTAPI PciCanDisableDecodes(IN PPCI_PDO_EXTENSION DeviceExtension, IN PPCI_COMMON_HEADER Config, IN ULONGLONG HackFlags, IN BOOLEAN ForPowerDown)
Definition: utils.c:955
NTSTATUS NTAPI PciStallForPowerChange(IN PPCI_PDO_EXTENSION PdoExtension, IN DEVICE_POWER_STATE PowerState, IN ULONG_PTR CapOffset)
Definition: power.c:45
@ PowerDeviceUnspecified
Definition: ntpoapi.h:48
USHORT PowerState
Definition: iotypes.h:3689
USHORT PMEStatus
Definition: iotypes.h:3694
struct _PCI_PMC::_PM_SUPPORT Support
union _PCI_PM_CAPABILITY::@4019 PMC
union _PCI_PM_CAPABILITY::@4020 PMCSR
PCI_CAPABILITIES_HEADER Header
Definition: iotypes.h:3704
PCI_PMCSR ControlStatus
Definition: iotypes.h:3710
PCI_PMC Capabilities
Definition: iotypes.h:3706
_In_ WDFDEVICE _Out_ PWDF_DEVICE_STATE DeviceState
Definition: wdfdevice.h:1999
#define PCI_CAPABILITY_ID_POWER_MANAGEMENT
Definition: iotypes.h:3647

Referenced by PciPdoIrpStartDevice(), and PciScanBus().

◆ PciSetResources()

NTSTATUS NTAPI PciSetResources ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN BOOLEAN  DoReset,
IN BOOLEAN  SomethingSomethingDarkSide 
)

Definition at line 2155 of file enum.c.

2158{
2160 UCHAR NewCacheLineSize, NewLatencyTimer;
2161 PCI_COMMON_HEADER PciData;
2163 PPCI_CONFIGURATOR Configurator;
2164
2165 UNREFERENCED_PARAMETER(SomethingSomethingDarkSide);
2166
2167 /* Get the FDO and read the configuration data */
2168 FdoExtension = PdoExtension->ParentFdoExtension;
2170
2171 /* Make sure this is still the same device */
2172 if (!PcipIsSameDevice(PdoExtension, &PciData))
2173 {
2174 /* Fail */
2175 ASSERTMSG("PCI Set resources - not same device.\n", FALSE);
2177 }
2178
2179 /* Nothing to set for a host bridge */
2180 if ((PdoExtension->BaseClass == PCI_CLASS_BRIDGE_DEV) &&
2181 (PdoExtension->SubClass == PCI_SUBCLASS_BR_HOST))
2182 {
2183 /* Fake success */
2184 return STATUS_SUCCESS;
2185 }
2186
2187 /* Check if an IDE controller is being reset */
2188 if ((DoReset) &&
2189 (PdoExtension->BaseClass == PCI_CLASS_MASS_STORAGE_CTLR) &&
2191 {
2192 /* Turn off native mode */
2194 ASSERT(Native == PdoExtension->IDEInNativeMode);
2195 }
2196
2197 /* Check for update of a hotplug device, or first configuration of one */
2198 if ((PdoExtension->NeedsHotPlugConfiguration) &&
2199 (FdoExtension->HotPlugParameters.Acquired))
2200 {
2201 /* Don't have hotplug devices to test with yet, QEMU 0.14 should */
2203 }
2204
2205 /* Locate the correct resource configurator for this type of device */
2206 Configurator = &PciConfigurators[PdoExtension->HeaderType];
2207
2208 /* Apply the settings change */
2209 Configurator->ChangeResourceSettings(PdoExtension, &PciData);
2210
2211 /* Assume no update needed */
2212 PdoExtension->UpdateHardware = FALSE;
2213
2214 /* Check if a reset is needed */
2215 if (DoReset)
2216 {
2217 /* Reset resources */
2218 Configurator->ResetDevice(PdoExtension, &PciData);
2219 PciData.u.type0.InterruptLine = PdoExtension->RawInterruptLine;
2220 }
2221
2222 /* Check if the latency timer changed */
2223 NewLatencyTimer = PdoExtension->SavedLatencyTimer;
2224 if (PciData.LatencyTimer != NewLatencyTimer)
2225 {
2226 /* Debug notification */
2227 DPRINT1("PCI (pdox %p) changing latency from %02x to %02x.\n",
2229 PciData.LatencyTimer,
2230 NewLatencyTimer);
2231 }
2232
2233 /* Check if the cache line changed */
2234 NewCacheLineSize = PdoExtension->SavedCacheLineSize;
2235 if (PciData.CacheLineSize != NewCacheLineSize)
2236 {
2237 /* Debug notification */
2238 DPRINT1("PCI (pdox %p) changing cache line size from %02x to %02x.\n",
2240 PciData.CacheLineSize,
2241 NewCacheLineSize);
2242 }
2243
2244 /* Inherit data from PDO extension */
2245 PciData.LatencyTimer = PdoExtension->SavedLatencyTimer;
2246 PciData.CacheLineSize = PdoExtension->SavedCacheLineSize;
2247 PciData.u.type0.InterruptLine = PdoExtension->RawInterruptLine;
2248
2249 /* Apply any resource hacks required */
2251 &PciData,
2252 PdoExtension->Slot,
2254 PdoExtension);
2255
2256 /* Check if I/O space was disabled by administrator or driver */
2257 if (PdoExtension->IoSpaceNotRequired)
2258 {
2259 /* Don't turn on the decode */
2260 PdoExtension->CommandEnables &= ~PCI_ENABLE_IO_SPACE;
2261 }
2262
2263 /* Update the device with the new settings */
2265
2266 /* Update complete */
2267 PdoExtension->RawInterruptLine = PciData.u.type0.InterruptLine;
2268 PdoExtension->NeedsHotPlugConfiguration = FALSE;
2269 return STATUS_SUCCESS;
2270}
BOOLEAN NTAPI PcipIsSameDevice(IN PPCI_PDO_EXTENSION DeviceExtension, IN PPCI_COMMON_HEADER PciData)
Definition: enum.c:1063
BOOLEAN NTAPI PciConfigureIdeController(IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData, IN BOOLEAN Initial)
Definition: enum.c:654
VOID NTAPI PciUpdateHardware(IN PPCI_PDO_EXTENSION PdoExtension, IN PPCI_COMMON_HEADER PciData)
Definition: enum.c:265
PCI_CONFIGURATOR PciConfigurators[]
Definition: enum.c:20
VOID NTAPI PciApplyHacks(IN PPCI_FDO_EXTENSION DeviceExtension, IN PPCI_COMMON_HEADER PciData, IN PCI_SLOT_NUMBER SlotNumber, IN ULONG OperationType, PPCI_PDO_EXTENSION PdoExtension)
Definition: enum.c:794
#define PCI_HACK_FIXUP_BEFORE_UPDATE
Definition: pci.h:72
unsigned int Native
Definition: fpcontrol.c:84
#define STATUS_DEVICE_DOES_NOT_EXIST
Definition: ntstatus.h:428
PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS ChangeResourceSettings
Definition: pci.h:480
PCI_CONFIGURATOR_RESET_DEVICE ResetDevice
Definition: pci.h:482

Referenced by PciAssignSlotResources(), and PciPdoIrpStartDevice().

◆ PciStringToUSHORT()

BOOLEAN NTAPI PciStringToUSHORT ( IN PWCHAR  String,
OUT PUSHORT  Value 
)

Definition at line 61 of file utils.c.

63{
66 WCHAR Char;
67
68 /* Initialize everything to zero */
69 Short = 0;
70 Length = 0;
71 while (TRUE)
72 {
73 /* Get the character and set the high byte based on the previous one */
74 Char = *String++;
75 High = 16 * Short;
76
77 /* Check for numbers */
78 if ( Char >= '0' && Char <= '9' )
79 {
80 /* Convert them to a byte */
81 Low = Char - '0';
82 }
83 else if ( Char >= 'A' && Char <= 'F' )
84 {
85 /* Convert upper-case hex letters into a byte */
86 Low = Char - '7';
87 }
88 else if ( Char >= 'a' && Char <= 'f' )
89 {
90 /* Convert lower-case hex letters into a byte */
91 Low = Char - 'W';
92 }
93 else
94 {
95 /* Invalid string, fail the conversion */
96 return FALSE;
97 }
98
99 /* Combine the high and low byte */
100 Short = High | Low;
101
102 /* If 4 letters have been reached, the 16-bit integer should exist */
103 if (++Length >= 4)
104 {
105 /* Return it to the caller */
106 *Value = Short;
107 return TRUE;
108 }
109 }
110}
short Short
Definition: ftraster.c:311
@ High
Definition: strmini.h:378
@ Low
Definition: strmini.h:380
_Must_inspect_result_ _In_ WDFDEVICE _In_ WDFSTRING String
Definition: wdfdevice.h:2433

Referenced by PciBuildHackTable().

◆ PciUnicodeStringStrStr()

BOOLEAN NTAPI PciUnicodeStringStrStr ( IN PUNICODE_STRING  InputString,
IN PCUNICODE_STRING  EqualString,
IN BOOLEAN  CaseInSensitive 
)

Definition at line 27 of file utils.c.

30{
31 UNICODE_STRING PartialString;
32 LONG EqualChars, TotalChars;
33
34 /* Build a partial string with the smaller substring */
35 PartialString.Length = EqualString->Length;
36 PartialString.MaximumLength = InputString->MaximumLength;
37 PartialString.Buffer = InputString->Buffer;
38
39 /* Check how many characters that need comparing */
40 EqualChars = 0;
41 TotalChars = (InputString->Length - EqualString->Length) / sizeof(WCHAR);
42
43 /* If the substring is bigger, just fail immediately */
44 if (TotalChars < 0) return FALSE;
45
46 /* Keep checking each character */
47 while (!RtlEqualUnicodeString(EqualString, &PartialString, CaseInSensitive))
48 {
49 /* Continue checking until all the required characters are equal */
50 PartialString.Buffer++;
51 PartialString.MaximumLength -= sizeof(WCHAR);
52 if (++EqualChars > TotalChars) return FALSE;
53 }
54
55 /* The string is equal */
56 return TRUE;
57}
_In_ const STRING _In_ BOOLEAN CaseInSensitive
Definition: rtlfuncs.h:2390
NTSYSAPI BOOLEAN NTAPI RtlEqualUnicodeString(PUNICODE_STRING String1, PUNICODE_STRING String2, BOOLEAN CaseInSensitive)
long LONG
Definition: pedump.c:60
USHORT MaximumLength
Definition: env_spec_w32.h:370

Referenced by DriverEntry().

◆ PciVerifierInit()

VOID NTAPI PciVerifierInit ( IN PDRIVER_OBJECT  DriverObject)

Definition at line 94 of file pcivrify.c.

95{
97
98 /* Check if the kernel driver verifier is enabled */
100 {
101 /* Register a notification for changes, to keep track of the PCI tree */
103 0,
104 NULL,
107 NULL,
110 }
111}
BOOLEAN NTAPI VfIsVerificationEnabled(IN VF_OBJECT_TYPE VfObjectType, IN PVOID Object OPTIONAL)
Definition: driver.c:22
DRIVER_NOTIFICATION_CALLBACK_ROUTINE PciVerifierProfileChangeCallback
Definition: pcivrify.c:77
PVOID PciVerifierNotificationHandle
Definition: pcivrify.c:19
BOOLEAN PciVerifierRegistered
Definition: pcivrify.c:18
NTSTATUS NTAPI IoRegisterPlugPlayNotification(_In_ IO_NOTIFICATION_EVENT_CATEGORY EventCategory, _In_ ULONG EventCategoryFlags, _In_opt_ PVOID EventCategoryData, _In_ PDRIVER_OBJECT DriverObject, _In_ PDRIVER_NOTIFICATION_CALLBACK_ROUTINE CallbackRoutine, _Inout_opt_ PVOID Context, _Out_ PVOID *NotificationEntry)
Definition: pnpnotify.c:345
@ VFOBJTYPE_SYSTEM_BIOS
Definition: vftypes.h:44
@ EventCategoryHardwareProfileChange
Definition: iotypes.h:1225

Referenced by DriverEntry().

◆ PciVerifierRetrieveFailureData()

PPCI_VERIFIER_DATA NTAPI PciVerifierRetrieveFailureData ( IN ULONG  FailureCode)

Definition at line 60 of file pcivrify.c.

61{
62 PPCI_VERIFIER_DATA VerifierData;
63
64 /* Scan the verifier failure table for this code */
65 VerifierData = PciVerifierFailureTable;
66 while (VerifierData->FailureCode != FailureCode)
67 {
68 /* Keep searching */
69 ++VerifierData;
71 }
72
73 /* Return the entry for this code */
74 return VerifierData;
75}
#define PCI_VERIFIER_CODES
Definition: pci.h:82
PCI_VERIFIER_DATA PciVerifierFailureTable[PCI_VERIFIER_CODES]
Definition: pcivrify.c:21
ULONG FailureCode
Definition: pci.h:415

Referenced by PciStallForPowerChange().

◆ PciWriteDeviceConfig()

VOID NTAPI PciWriteDeviceConfig ( IN PPCI_PDO_EXTENSION  DeviceExtension,
IN PVOID  Buffer,
IN ULONG  Offset,
IN ULONG  Length 
)

Definition at line 91 of file config.c.

95{
96 /* Call the generic worker function */
97 PciReadWriteConfigSpace(DeviceExtension->ParentFdoExtension,
98 DeviceExtension->Slot,
99 Buffer,
100 Offset,
101 Length,
102 FALSE);
103}

Referenced by PciApplyHacks(), PciConfigureIdeController(), PciDecodeEnable(), PcipUpdateHardware(), PciScanBus(), PciSetPowerManagedDevicePowerState(), and PciWriteLimitsAndRestoreCurrent().

◆ PPBridge_ChangeResourceSettings()

VOID NTAPI PPBridge_ChangeResourceSettings ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PPCI_COMMON_HEADER  PciData 
)

Definition at line 683 of file ppbridge.c.

685{
686 //BOOLEAN IoActive;
688 PPCI_FUNCTION_RESOURCES PciResources;
689 ULONG i;
690
691 /* Check if I/O Decodes are enabled */
692 //IoActive = (PciData->u.type1.IOBase & 0xF) == 1;
693
694 /*
695 * Check for Intel ICH PCI-to-PCI (i82801) bridges (used on the i810,
696 * i820, i840, i845 Chipsets) that don't have subtractive decode broken.
697 * If they do have broken subtractive support, or if they are not ICH bridges,
698 * then check if the bridge supports subtractive decode at all.
699 */
700 if ((((PdoExtension->VendorId == 0x8086) &&
701 ((PdoExtension->DeviceId == 0x2418) ||
702 (PdoExtension->DeviceId == 0x2428) ||
703 (PdoExtension->DeviceId == 0x244E) ||
704 (PdoExtension->DeviceId == 0x2448))) &&
706 (PdoExtension->Dependent.type1.SubtractiveDecode == FALSE))) ||
707 (PdoExtension->Dependent.type1.SubtractiveDecode == FALSE))
708 {
709 /* No resources are needed on a subtractive decode bridge */
710 PciData->u.type1.MemoryBase = 0xFFFF;
711 PciData->u.type1.PrefetchBase = 0xFFFF;
712 PciData->u.type1.IOBase = 0xFF;
713 PciData->u.type1.IOLimit = 0;
714 PciData->u.type1.MemoryLimit = 0;
715 PciData->u.type1.PrefetchLimit = 0;
716 PciData->u.type1.PrefetchBaseUpper32 = 0;
717 PciData->u.type1.PrefetchLimitUpper32 = 0;
718 PciData->u.type1.IOBaseUpper16 = 0;
719 PciData->u.type1.IOLimitUpper16 = 0;
720 }
721 else
722 {
723 /*
724 * Otherwise, get the FDO to read the old PCI configuration header that
725 * had been saved by the hack in PPBridge_SaveCurrentSettings.
726 */
727 FdoExtension = PdoExtension->ParentFdoExtension;
728 ASSERT(PdoExtension->Resources == NULL);
729
730 /* Read the PCI header data and use that here */
731 PciData->u.type1.IOBase = FdoExtension->PreservedConfig->u.type1.IOBase;
732 PciData->u.type1.IOLimit = FdoExtension->PreservedConfig->u.type1.IOLimit;
733 PciData->u.type1.MemoryBase = FdoExtension->PreservedConfig->u.type1.MemoryBase;
734 PciData->u.type1.MemoryLimit = FdoExtension->PreservedConfig->u.type1.MemoryLimit;
735 PciData->u.type1.PrefetchBase = FdoExtension->PreservedConfig->u.type1.PrefetchBase;
736 PciData->u.type1.PrefetchLimit = FdoExtension->PreservedConfig->u.type1.PrefetchLimit;
737 PciData->u.type1.PrefetchBaseUpper32 = FdoExtension->PreservedConfig->u.type1.PrefetchBaseUpper32;
738 PciData->u.type1.PrefetchLimitUpper32 = FdoExtension->PreservedConfig->u.type1.PrefetchLimitUpper32;
739 PciData->u.type1.IOBaseUpper16 = FdoExtension->PreservedConfig->u.type1.IOBaseUpper16;
740 PciData->u.type1.IOLimitUpper16 = FdoExtension->PreservedConfig->u.type1.IOLimitUpper16;
741 }
742
743 /* Loop bus resources */
744 PciResources = PdoExtension->Resources;
745 if (PciResources)
746 {
747 /* Loop each resource type (the BARs, ROM BAR and Prefetch) */
748 for (i = 0; i < 6; i++)
749 {
751 }
752 }
753
754 /* Copy the bus number data */
755 PciData->u.type1.PrimaryBus = PdoExtension->Dependent.type1.PrimaryBus;
756 PciData->u.type1.SecondaryBus = PdoExtension->Dependent.type1.SecondaryBus;
757 PciData->u.type1.SubordinateBus = PdoExtension->Dependent.type1.SubordinateBus;
758
759 /* Copy the decode flags */
760 if (PdoExtension->Dependent.type1.IsaBitSet)
761 {
762 PciData->u.type1.BridgeControl |= PCI_ENABLE_BRIDGE_ISA;
763 }
764
765 if (PdoExtension->Dependent.type1.VgaBitSet)
766 {
767 PciData->u.type1.BridgeControl |= PCI_ENABLE_BRIDGE_VGA;
768 }
769}
#define PCI_ENABLE_BRIDGE_ISA
Definition: pci.h:61
#define PCI_HACK_BROKEN_SUBTRACTIVE_DECODE
Definition: pci.h:49

◆ PPBridge_GetAdditionalResourceDescriptors()

VOID NTAPI PPBridge_GetAdditionalResourceDescriptors ( IN PPCI_CONFIGURATOR_CONTEXT  Context,
IN PPCI_COMMON_HEADER  PciData,
IN PIO_RESOURCE_DESCRIPTOR  IoDescriptor 
)

Definition at line 628 of file ppbridge.c.

631{
632
634
635 /* Does this bridge have VGA decodes on it? */
636 if (PciData->u.type1.BridgeControl & PCI_ENABLE_BRIDGE_VGA)
637 {
638 /* Build a private descriptor with 3 entries */
639 IoDescriptor->Type = CmResourceTypeDevicePrivate;
640 IoDescriptor->u.DevicePrivate.Data[0] = 3;
641 IoDescriptor->u.DevicePrivate.Data[1] = 3;
642
643 /* First, the VGA range at 0xA0000 */
644 IoDescriptor[1].Type = CmResourceTypeMemory;
645 IoDescriptor[1].Flags = CM_RESOURCE_MEMORY_READ_WRITE;
646 IoDescriptor[1].u.Port.Length = 0x20000;
647 IoDescriptor[1].u.Port.Alignment = 1;
648 IoDescriptor[1].u.Port.MinimumAddress.QuadPart = 0xA0000;
649 IoDescriptor[1].u.Port.MaximumAddress.QuadPart = 0xBFFFF;
650
651 /* Then, the VGA registers at 0x3B0 */
652 IoDescriptor[2].Type = CmResourceTypePort;
653 IoDescriptor[2].Flags = CM_RESOURCE_PORT_POSITIVE_DECODE |
655 IoDescriptor[2].u.Port.Length = 12;
656 IoDescriptor[2].u.Port.Alignment = 1;
657 IoDescriptor[2].u.Port.MinimumAddress.QuadPart = 0x3B0;
658 IoDescriptor[2].u.Port.MaximumAddress.QuadPart = 0x3BB;
659
660 /* And finally the VGA registers at 0x3C0 */
661 IoDescriptor[3].Type = CmResourceTypePort;
662 IoDescriptor[3].Flags = CM_RESOURCE_PORT_POSITIVE_DECODE |
664 IoDescriptor[3].u.Port.Length = 32;
665 IoDescriptor[3].u.Port.Alignment = 1;
666 IoDescriptor[3].u.Port.MinimumAddress.QuadPart = 0x3C0;
667 IoDescriptor[3].u.Port.MaximumAddress.QuadPart = 0x3DF;
668 }
669}

◆ PPBridge_MassageHeaderForLimitsDetermination()

VOID NTAPI PPBridge_MassageHeaderForLimitsDetermination ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 582 of file ppbridge.c.

583{
584 PPCI_COMMON_HEADER PciData, Current;
585
586 /* Get pointers from context */
587 PciData = Context->PciData;
588 Current = Context->Current;
589
590 /*
591 * Write FFh everywhere so that the PCI bridge ignores what it can't handle.
592 * Based on the bits that were ignored (still 0), this is how we can tell
593 * what the limit is.
594 */
595 RtlFillMemory(PciData->u.type1.BaseAddresses,
596 FIELD_OFFSET(PCI_COMMON_HEADER, u.type1.CapabilitiesPtr) -
597 FIELD_OFFSET(PCI_COMMON_HEADER, u.type1.BaseAddresses),
598 0xFF);
599
600 /* Copy the saved settings from the current context into the PCI header */
601 PciData->u.type1.PrimaryBus = Current->u.type1.PrimaryBus;
602 PciData->u.type1.SecondaryBus = Current->u.type1.SecondaryBus;
603 PciData->u.type1.SubordinateBus = Current->u.type1.SubordinateBus;
604 PciData->u.type1.SecondaryLatency = Current->u.type1.SecondaryLatency;
605
606 /* No I/O limit or base. The bottom base bit specifies that FIXME */
607 PciData->u.type1.IOBaseUpper16 = 0xFFFE;
608 PciData->u.type1.IOLimitUpper16 = 0xFFFF;
609
610 /* Save secondary status before it gets cleared */
611 Context->SecondaryStatus = Current->u.type1.SecondaryStatus;
612
613 /* Clear secondary status */
614 Current->u.type1.SecondaryStatus = 0;
615 PciData->u.type1.SecondaryStatus = 0;
616}
#define RtlFillMemory(Dest, Length, Fill)
Definition: winternl.h:599

◆ PPBridge_ResetDevice()

VOID NTAPI PPBridge_ResetDevice ( IN PPCI_PDO_EXTENSION  PdoExtension,
IN PPCI_COMMON_HEADER  PciData 
)

Definition at line 673 of file ppbridge.c.

◆ PPBridge_RestoreCurrent()

VOID NTAPI PPBridge_RestoreCurrent ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 620 of file ppbridge.c.

621{
622 /* Copy back the secondary status register */
623 Context->Current->u.type1.SecondaryStatus = Context->SecondaryStatus;
624}

◆ PPBridge_SaveCurrentSettings()

VOID NTAPI PPBridge_SaveCurrentSettings ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 225 of file ppbridge.c.

226{
229 PIO_RESOURCE_DESCRIPTOR IoDescriptor;
232 PPCI_COMMON_HEADER Current;
233 PPCI_COMMON_CONFIG SavedConfig;
234 ULONG i, Bar, BarMask;
235 PULONG BarArray;
237 BOOLEAN HaveIoLimit, CheckAlignment;
239
240 /* Get the pointers from the extension */
241 PdoExtension = Context->PdoExtension;
242 Resources = PdoExtension->Resources;
243 Current = Context->Current;
244
245 /* Check if decodes are disabled */
247 {
248 /* Well, we're going to need them from somewhere, use the registry data */
250 if (NT_SUCCESS(Status)) Current = &BiosData;
251 }
252
253 /* Scan all current and limit descriptors for each BAR needed */
254 BarArray = Current->u.type1.BaseAddresses;
255 for (i = 0; i < 6; i++)
256 {
257 /* Get the current resource descriptor, and the limit requirement */
258 CmDescriptor = &Resources->Current[i];
259 IoDescriptor = &Resources->Limit[i];
260
261 /* Copy descriptor data, skipping null descriptors */
262 CmDescriptor->Type = IoDescriptor->Type;
263 if (CmDescriptor->Type == CmResourceTypeNull) continue;
264 CmDescriptor->Flags = IoDescriptor->Flags;
265 CmDescriptor->ShareDisposition = IoDescriptor->ShareDisposition;
266
267 /* Initialize the high-parts to zero, since most stuff is 32-bit only */
268 Base.QuadPart = Limit.QuadPart = Length.QuadPart = 0;
269
270 /* Check if we're handling PCI BARs, or the ROM BAR */
271 if ((i < PCI_TYPE1_ADDRESSES) || (i == 5))
272 {
273 /* Is this the ROM BAR? */
274 if (i == 5)
275 {
276 /* Read the correct bar, with the appropriate mask */
277 Bar = Current->u.type1.ROMBaseAddress;
279
280 /* Decode the base address, and write down the length */
281 Base.LowPart = Bar & BarMask;
282 DPRINT1("ROM BAR Base: %lx\n", Base.LowPart);
283 CmDescriptor->u.Memory.Length = IoDescriptor->u.Memory.Length;
284 }
285 else
286 {
287 /* Otherwise, get the BAR from the array */
288 Bar = BarArray[i];
289
290 /* Is this an I/O BAR? */
292 {
293 /* Set the correct mask */
294 ASSERT(CmDescriptor->Type == CmResourceTypePort);
296 }
297 else
298 {
299 /* This is a memory BAR, set the correct base */
300 ASSERT(CmDescriptor->Type == CmResourceTypeMemory);
302
303 /* IS this a 64-bit BAR? */
305 {
306 /* Read the next 32-bits as well, ie, the next BAR */
307 Base.HighPart = BarArray[i + 1];
308 }
309 }
310
311 /* Decode the base address, and write down the length */
312 Base.LowPart = Bar & BarMask;
313 DPRINT1("BAR Base: %lx\n", Base.LowPart);
314 CmDescriptor->u.Generic.Length = IoDescriptor->u.Generic.Length;
315 }
316 }
317 else
318 {
319 /* Reset loop conditions */
320 HaveIoLimit = FALSE;
322
323 /* Check which descriptor is being parsed */
324 if (i == 2)
325 {
326 /* I/O Port Requirements */
327 Base.LowPart = PciBridgeIoBase(Current);
328 Limit.LowPart = PciBridgeIoLimit(Current);
329 DPRINT1("Bridge I/O Base and Limit: %lx %lx\n",
330 Base.LowPart, Limit.LowPart);
331
332 /* Do we have any I/O Port data? */
333 if (!(Base.LowPart) && (Current->u.type1.IOLimit))
334 {
335 /* There's a limit */
336 HaveIoLimit = TRUE;
337 }
338 }
339 else if (i == 3)
340 {
341 /* Memory requirements */
342 Base.LowPart = PciBridgeMemoryBase(Current);
343 Limit.LowPart = PciBridgeMemoryLimit(Current);
344
345 /* These should always be there, so check their alignment */
346 DPRINT1("Bridge MEM Base and Limit: %lx %lx\n",
347 Base.LowPart, Limit.LowPart);
349 }
350 else if (i == 4)
351 {
352 /* This should only be present for prefetch memory */
356
357 /* If it's there, check the alignment */
358 DPRINT1("Bridge Prefetch MEM Base and Limit: %I64x %I64x\n", Base, Limit);
360 }
361
362 /* Check for invalid base address */
363 if (Base.QuadPart >= Limit.QuadPart)
364 {
365 /* Assume the descriptor is bogus */
366 CmDescriptor->Type = CmResourceTypeNull;
367 IoDescriptor->Type = CmResourceTypeNull;
368 continue;
369 }
370
371 /* Check if there's no memory, and no I/O port either */
372 if (!(Base.LowPart) && !(HaveIoLimit))
373 {
374 /* This seems like a bogus requirement, ignore it */
375 CmDescriptor->Type = CmResourceTypeNull;
376 continue;
377 }
378
379 /* Set the length to be the limit - the base; should always be 32-bit */
380 Length.QuadPart = Limit.LowPart - Base.LowPart + 1;
381 ASSERT(Length.HighPart == 0);
382 CmDescriptor->u.Generic.Length = Length.LowPart;
383
384 /* Check if alignment should be set */
385 if (CheckAlignment)
386 {
387 /* Compute the required alignment for this length */
388 ASSERT(CmDescriptor->u.Memory.Length > 0);
389 IoDescriptor->u.Memory.Alignment =
390 PciBridgeMemoryWorstCaseAlignment(CmDescriptor->u.Memory.Length);
391 }
392 }
393
394 /* Now set the base address */
395 CmDescriptor->u.Generic.Start.LowPart = Base.LowPart;
396 }
397
398 /* Save PCI settings into the PDO extension for easy access later */
399 PdoExtension->Dependent.type1.PrimaryBus = Current->u.type1.PrimaryBus;
400 PdoExtension->Dependent.type1.SecondaryBus = Current->u.type1.SecondaryBus;
401 PdoExtension->Dependent.type1.SubordinateBus = Current->u.type1.SubordinateBus;
402
403 /* Check for subtractive decode bridges */
404 if (PdoExtension->Dependent.type1.SubtractiveDecode)
405 {
406 /* Check if legacy VGA decodes are enabled */
407 DPRINT1("Subtractive decode bridge\n");
408 if (Current->u.type1.BridgeControl & PCI_ENABLE_BRIDGE_VGA)
409 {
410 /* Save this setting for later */
411 DPRINT1("VGA Bridge\n");
412 PdoExtension->Dependent.type1.VgaBitSet = TRUE;
413 }
414
415 /* Legacy ISA decoding is not compatible with subtractive decode */
416 ASSERT(PdoExtension->Dependent.type1.IsaBitSet == FALSE);
417 }
418 else
419 {
420 /* Check if legacy VGA decodes are enabled */
421 if (Current->u.type1.BridgeControl & PCI_ENABLE_BRIDGE_VGA)
422 {
423 /* Save this setting for later */
424 DPRINT1("VGA Bridge\n");
425 PdoExtension->Dependent.type1.VgaBitSet = TRUE;
426
427 /* And on positive decode, we'll also need extra resources locked */
428 PdoExtension->AdditionalResourceCount = 4;
429 }
430
431 /* Check if legacy ISA decoding is enabled */
432 if (Current->u.type1.BridgeControl & PCI_ENABLE_BRIDGE_ISA)
433 {
434 /* Save this setting for later */
435 DPRINT1("ISA Bridge\n");
436 PdoExtension->Dependent.type1.IsaBitSet = TRUE;
437 }
438 }
439
440 /*
441 * Check for Intel ICH PCI-to-PCI (i82801) bridges (used on the i810,
442 * i820, i840, i845 Chipsets) that have subtractive decode broken.
443 */
444 if (((PdoExtension->VendorId == 0x8086) &&
445 ((PdoExtension->DeviceId == 0x2418) ||
446 (PdoExtension->DeviceId == 0x2428) ||
447 (PdoExtension->DeviceId == 0x244E) ||
448 (PdoExtension->DeviceId == 0x2448))) ||
450 {
451 /* Check if subtractive decode is actually enabled */
452 if (PdoExtension->Dependent.type1.SubtractiveDecode)
453 {
454 /* We're going to need a copy of the configuration for later use */
455 DPRINT1("apply config save hack to ICH subtractive decode\n");
456 SavedConfig = ExAllocatePoolWithTag(0, PCI_COMMON_HDR_LENGTH, 'PciP');
457 PdoExtension->ParentFdoExtension->PreservedConfig = SavedConfig;
458 if (SavedConfig) RtlCopyMemory(SavedConfig, Current, PCI_COMMON_HDR_LENGTH);
459 }
460 }
461}
VOID CheckAlignment()
NTSTATUS NTAPI PciGetBiosConfig(IN PPCI_PDO_EXTENSION DeviceExtension, OUT PPCI_COMMON_HEADER PciData)
Definition: utils.c:768
_In_opt_ ULONG Base
Definition: rtlfuncs.h:2439
PHYSICAL_ADDRESS NTAPI PciBridgePrefetchMemoryBase(IN PPCI_COMMON_HEADER PciData)
Definition: ppbridge.c:94
ULONG NTAPI PciBridgeMemoryWorstCaseAlignment(IN ULONG Length)
Definition: ppbridge.c:148
PHYSICAL_ADDRESS NTAPI PciBridgePrefetchMemoryLimit(IN PPCI_COMMON_HEADER PciData)
Definition: ppbridge.c:121
ULONG NTAPI PciBridgeIoBase(IN PPCI_COMMON_HEADER PciData)
Definition: ppbridge.c:20
ULONG NTAPI PciBridgeMemoryLimit(IN PPCI_COMMON_HEADER PciData)
Definition: ppbridge.c:84
ULONG NTAPI PciBridgeIoLimit(IN PPCI_COMMON_HEADER PciData)
Definition: ppbridge.c:47
ULONG NTAPI PciBridgeMemoryBase(IN PPCI_COMMON_HEADER PciData)
Definition: ppbridge.c:74
struct _IO_RESOURCE_DESCRIPTOR::@21::@23 Memory
PBIOS_DATA BiosData
Definition: bios.c:42
#define PCI_TYPE1_ADDRESSES
Definition: iotypes.h:3501

◆ PPBridge_SaveLimits()

VOID NTAPI PPBridge_SaveLimits ( IN PPCI_CONFIGURATOR_CONTEXT  Context)

Definition at line 465 of file ppbridge.c.

466{
468 PULONG BarArray;
469 PHYSICAL_ADDRESS MemoryLimit;
470 ULONG i;
473
474 /* Get the pointers from the context */
475 Working = Context->PciData;
476 PdoExtension = Context->PdoExtension;
477
478 /* Scan the BARs into the limit descriptors */
479 BarArray = Working->u.type1.BaseAddresses;
480 Limit = PdoExtension->Resources->Limit;
481
482 /* First of all, loop all the BARs */
483 for (i = 0; i < PCI_TYPE1_ADDRESSES; i++)
484 {
485 /* Create a descriptor for their limits */
486 if (PciCreateIoDescriptorFromBarLimit(&Limit[i], &BarArray[i], FALSE))
487 {
488 /* This was a 64-bit descriptor, make sure there's space */
490
491 /* Skip the next descriptor since this one is double sized */
492 i++;
493 Limit[i].Type = CmResourceTypeNull;
494 }
495 }
496
497 /* Check if this is a subtractive decode bridge */
499 {
500 /* This bridge is subtractive */
501 PdoExtension->Dependent.type1.SubtractiveDecode = TRUE;
502
503 /* Subtractive bridges cannot use legacy ISA or VGA functionality */
504 PdoExtension->Dependent.type1.IsaBitSet = FALSE;
505 PdoExtension->Dependent.type1.VgaBitSet = FALSE;
506 }
507
508 /* For normal decode bridges, we'll need to find the bridge limits too */
509 if (!PdoExtension->Dependent.type1.SubtractiveDecode)
510 {
511 /* Loop the descriptors that are left, to store the bridge limits */
512 for (i = PCI_TYPE1_ADDRESSES; i < 5; i++)
513 {
514 /* No 64-bit memory addresses, and set the address to 0 to begin */
515 MemoryLimit.HighPart = 0;
516 (&Limit[i])->u.Port.MinimumAddress.QuadPart = 0;
517
518 /* Are we getting the I/O limit? */
519 if (i == 2)
520 {
521 /* There should be one, get it */
522 ASSERT(Working->u.type1.IOLimit != 0);
523 ASSERT((Working->u.type1.IOLimit & 0x0E) == 0);
524 MemoryLimit.LowPart = PciBridgeIoLimit(Working);
525
526 /* Build a descriptor for this limit */
530 (&Limit[i])->u.Port.Alignment = 0x1000;
531 (&Limit[i])->u.Port.MinimumAddress.QuadPart = 0;
532 (&Limit[i])->u.Port.MaximumAddress = MemoryLimit;
533 (&Limit[i])->u.Port.Length = 0;
534 }
535 else if (i == 3)
536 {
537 /* There should be a valid memory limit, get it */
538 ASSERT((Working->u.type1.MemoryLimit & 0xF) == 0);
539 MemoryLimit.LowPart = PciBridgeMemoryLimit(Working);
540
541 /* Build the descriptor for it */
544 (&Limit[i])->u.Memory.Alignment = 0x100000;
545 (&Limit[i])->u.Memory.MinimumAddress.QuadPart = 0;
546 (&Limit[i])->u.Memory.MaximumAddress = MemoryLimit;
547 (&Limit[i])->u.Memory.Length = 0;
548 }
549 else if (Working->u.type1.PrefetchLimit)
550 {
551 /* Get the prefetch memory limit, if there is one */
553
554 /* Write out the descriptor for it */
557 (&Limit[i])->u.Memory.Alignment = 0x100000;
558 (&Limit[i])->u.Memory.MinimumAddress.QuadPart = 0;
559 (&Limit[i])->u.Memory.MaximumAddress = MemoryLimit;
560 (&Limit[i])->u.Memory.Length = 0;
561 }
562 else
563 {
564 /* Blank descriptor */
566 }
567 }
568 }
569
570 /* Does the ROM have its own BAR? */
571 if (Working->u.type1.ROMBaseAddress & PCI_ROMADDRESS_ENABLED)
572 {
573 /* Build a limit for it as well */
575 &Working->u.type1.ROMBaseAddress,
576 TRUE);
577 }
578}
@ Working
Definition: fbtusb.h:82
if(dx< 0)
Definition: linetemp.h:194
#define CM_RESOURCE_PORT_WINDOW_DECODE
Definition: cmtypes.h:115
BOOLEAN NTAPI PciBridgeIsSubtractiveDecode(IN PPCI_CONFIGURATOR_CONTEXT Context)
Definition: ppbridge.c:173
ULONG LowPart
Definition: typedefs.h:106
_Must_inspect_result_ _In_ ULONG Flags
Definition: wsk.h:170

◆ routeintrf_Constructor()

NTSTATUS NTAPI routeintrf_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 47 of file routintf.c.

53{
54 UNREFERENCED_PARAMETER(DeviceExtension);
56 UNREFERENCED_PARAMETER(InterfaceData);
59
60 /* Only version 1 is supported */
62
63 /* Not yet implemented */
66}
#define PCI_INT_ROUTE_INTRF_STANDARD_VER
Definition: iotypes.h:5457

◆ routeintrf_Initializer()

NTSTATUS NTAPI routeintrf_Initializer ( IN PVOID  Instance)

Definition at line 37 of file routintf.c.

38{
40 /* PnP Interfaces don't get Initialized */
41 ASSERTMSG("PCI routeintrf_Initializer, unexpected call.\n", FALSE);
43}

◆ tranirq_Constructor()

NTSTATUS NTAPI tranirq_Constructor ( IN PVOID  DeviceExtension,
IN PVOID  Instance,
IN PVOID  InterfaceData,
IN USHORT  Version,
IN USHORT  Size,
IN PINTERFACE  Interface 
)

Definition at line 45 of file tr_irq.c.

51{
53 ULONG BaseBus, ParentBus;
54 INTERFACE_TYPE ParentInterface;
56
60
61 /* Make sure it's the right resource type */
62 if ((ULONG_PTR)InterfaceData != CmResourceTypeInterrupt)
63 {
64 /* Fail this invalid request */
65 DPRINT1("PCI - IRQ trans constructor doesn't like %p in InterfaceSpecificData\n",
66 InterfaceData);
68 }
69
70 /* Get the bus, and use this as the interface-specific data */
71 BaseBus = FdoExtension->BaseBus;
72 InterfaceData = UlongToPtr(BaseBus);
73
74 /* Check if this is the root bus */
76 {
77 /* It is, so there is no parent, and it's connected on the system bus */
78 ParentBus = 0;
79 ParentInterface = Internal;
80 DPRINT1(" Is root FDO\n");
81 }
82 else
83 {
84 /* It's not, so we have to get the root bus' bus number instead */
85 #if 0 // when have PDO commit
86 ParentBus = FdoExtension->PhysicalDeviceObject->DeviceExtension->ParentFdoExtension->BaseBus;
87 ParentInterface = PCIBus;
88 DPRINT1(" Is bridge FDO, parent bus %x, secondary bus %x\n",
89 ParentBus, BaseBus);
90 #endif
91 }
92
93 /* Now call the legacy HAL interface to get the correct translator */
94 return HalGetInterruptTranslator(ParentInterface,
95 ParentBus,
96 PCIBus,
98 0,
100 (PULONG)&InterfaceData);
101}
#define UlongToPtr(u)
Definition: config.h:106
@ Internal
Definition: hwresource.cpp:137
enum _INTERFACE_TYPE INTERFACE_TYPE
#define STATUS_INVALID_PARAMETER_3
Definition: ntstatus.h:477
#define HalGetInterruptTranslator
Definition: haltypes.h:303

◆ tranirq_Initializer()

NTSTATUS NTAPI tranirq_Initializer ( IN PVOID  Instance)

Definition at line 35 of file tr_irq.c.

36{
38 /* PnP Interfaces don't get Initialized */
39 ASSERTMSG("PCI tranirq_Initializer, unexpected call.\n", FALSE);
41}

Variable Documentation

◆ AgpTargetInterface

PCI_INTERFACE AgpTargetInterface
extern

Definition at line 20 of file agpintrf.c.

◆ ArbiterInterfaceBusNumber

PCI_INTERFACE ArbiterInterfaceBusNumber
extern

Definition at line 18 of file ar_busno.c.

◆ ArbiterInterfaceIo

PCI_INTERFACE ArbiterInterfaceIo
extern

Definition at line 31 of file ar_memio.c.

◆ ArbiterInterfaceMemory

PCI_INTERFACE ArbiterInterfaceMemory
extern

Definition at line 18 of file ar_memio.c.

◆ BusHandlerInterface

PCI_INTERFACE BusHandlerInterface
extern

Definition at line 18 of file busintrf.c.

◆ InitSafeBootMode

NTSYSAPI BOOLEAN InitSafeBootMode
extern

Definition at line 71 of file init.c.

Referenced by PciApplyHacks().

◆ PciAddDevice

DRIVER_ADD_DEVICE PciAddDevice

Definition at line 619 of file pci.h.

◆ PciAssignBusNumbers

BOOLEAN PciAssignBusNumbers
extern

Definition at line 18 of file config.c.

Referenced by PciGetConfigHandlers(), PciProcessBus(), and PciReadWriteConfigSpace().

◆ PciCardbusPrivateInterface

PCI_INTERFACE PciCardbusPrivateInterface
extern

Definition at line 18 of file cardbus.c.

◆ PciDevicePresentInterface

PCI_INTERFACE PciDevicePresentInterface
extern

Definition at line 18 of file devhere.c.

Referenced by PdoQueryInterface(), and VideoPortCheckForDeviceExistence().

◆ PciDispatchIrp

DRIVER_DISPATCH PciDispatchIrp

Definition at line 541 of file pci.h.

Referenced by DriverEntry().

◆ PciDriverObject

PDRIVER_OBJECT PciDriverObject
extern

Definition at line 19 of file init.c.

Referenced by DriverEntry(), and PciGetDescriptionMessage().

◆ PciEnableNativeModeATA

BOOLEAN PciEnableNativeModeATA
extern

Definition at line 24 of file init.c.

Referenced by DriverEntry(), and PciApplyHacks().

◆ PciExecuteCriticalSystemRoutine

KIPI_BROADCAST_WORKER PciExecuteCriticalSystemRoutine

Definition at line 1132 of file pci.h.

Referenced by PcipGetFunctionLimits(), and PciUpdateHardware().

◆ PciFdoExtensionListHead

SINGLE_LIST_ENTRY PciFdoExtensionListHead
extern

Definition at line 18 of file fdo.c.

Referenced by PciAddDevice(), PciFindParentPciFdoExtension(), and PciFindPdoByLocation().

◆ PciGlobalLock

KEVENT PciGlobalLock
extern

Definition at line 20 of file init.c.

Referenced by DriverEntry(), PciAddDevice(), PciAssignSlotResources(), and PciFindPdoByLocation().

◆ PciHackTable

PPCI_HACK_ENTRY PciHackTable
extern

Definition at line 28 of file init.c.

Referenced by PciBuildHackTable(), and PciGetHackFlags().

◆ PciInterfaces

PPCI_INTERFACE PciInterfaces[]
extern

Definition at line 18 of file intrface.c.

Referenced by PciInitializeArbiters(), and PciQueryInterface().

◆ PciIrqRoutingTable

PPCI_IRQ_ROUTING_TABLE PciIrqRoutingTable
extern

Definition at line 26 of file init.c.

Referenced by DriverEntry(), and PciDetermineSlotNumber().

◆ PciLegacyDeviceDetectionInterface

PCI_INTERFACE PciLegacyDeviceDetectionInterface
extern

Definition at line 18 of file lddintrf.c.

◆ PciLocationInterface

PCI_INTERFACE PciLocationInterface
extern

Definition at line 18 of file locintrf.c.

◆ PciPmeInterface

PCI_INTERFACE PciPmeInterface
extern

Definition at line 18 of file pmeintf.c.

◆ PciRoutingInterface

PCI_INTERFACE PciRoutingInterface
extern

Definition at line 20 of file routintf.c.

◆ PciRunningDatacenter

BOOLEAN PciRunningDatacenter
extern

Definition at line 18 of file init.c.

Referenced by DriverEntry().

◆ TranslatorInterfaceInterrupt

PCI_INTERFACE TranslatorInterfaceInterrupt
extern

Definition at line 18 of file tr_irq.c.

◆ WdTable

PWATCHDOG_TABLE WdTable
extern

Definition at line 27 of file init.c.

Referenced by PciScanBus().