ReactOS  0.4.15-dev-2991-g632fa1c
init.c File Reference
#include <ntoskrnl.h>
#include <debug.h>
#include <mm/ARM3/miarm.h>
#include <fltkernel.h>
Include dependency graph for init.c:

Go to the source code of this file.

Macros

#define IS_PAGE_ALIGNED(addr)   IS_ALIGNED(addr, PAGE_SIZE)
 

Functions

VOID NTAPI MiInitializeSessionSpaceLayout (VOID)
 
VOID NTAPI MiMapPPEs (PVOID StartAddress, PVOID EndAddress)
 
VOID NTAPI MiMapPDEs (PVOID StartAddress, PVOID EndAddress)
 
VOID NTAPI MiMapPTEs (PVOID StartAddress, PVOID EndAddress)
 
VOID NTAPI MiInitializePageTable (VOID)
 
VOID NTAPI MiBuildNonPagedPool (VOID)
 
VOID NTAPI MiBuildSystemPteSpace (VOID)
 
static VOID MiSetupPfnForPageTable (PFN_NUMBER PageFrameIndex, PMMPTE PointerPte)
 
static VOID MiBuildPfnDatabaseFromPageTables (VOID)
 
static VOID MiAddDescriptorToDatabase (PFN_NUMBER BasePage, PFN_NUMBER PageCount, TYPE_OF_MEMORY MemoryType)
 
VOID NTAPI MiBuildPfnDatabase (IN PLOADER_PARAMETER_BLOCK LoaderBlock)
 
NTSTATUS NTAPI MiInitMachineDependent (IN PLOADER_PARAMETER_BLOCK LoaderBlock)
 

Variables

PMMPTE MmDebugPte
 
MMPTE ValidKernelPde = {{PTE_VALID|PTE_EXECUTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}}
 
MMPTE ValidKernelPte = {{PTE_VALID|PTE_EXECUTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}}
 
MMPTE ValidKernelPdeLocal = {{PTE_VALID|PTE_EXECUTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}}
 
MMPTE ValidKernelPteLocal = {{PTE_VALID|PTE_EXECUTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}}
 
MMPDE DemandZeroPde = {{MM_EXECUTE_READWRITE << MM_PTE_SOFTWARE_PROTECTION_BITS}}
 
MMPTE DemandZeroPte = {{MM_READWRITE << MM_PTE_SOFTWARE_PROTECTION_BITS}}
 
MMPTE PrototypePte
 
MMPTE MmDecommittedPte = {{MM_DECOMMIT << MM_PTE_SOFTWARE_PROTECTION_BITS}}
 
PVOID MiSessionViewEnd
 
PVOID MiSystemPteSpaceStart
 
PVOID MiSystemPteSpaceEnd
 
ULONG64 MxPfnSizeInBytes
 
BOOLEAN MiIncludeType [LoaderMaximum]
 
PFN_NUMBER MxFreePageBase
 
ULONG64 MxFreePageCount = 0
 
BOOLEAN MiPfnsInitialized = FALSE
 

Macro Definition Documentation

◆ IS_PAGE_ALIGNED

#define IS_PAGE_ALIGNED (   addr)    IS_ALIGNED(addr, PAGE_SIZE)

Definition at line 23 of file init.c.

Function Documentation

◆ MiAddDescriptorToDatabase()

static VOID MiAddDescriptorToDatabase ( PFN_NUMBER  BasePage,
PFN_NUMBER  PageCount,
TYPE_OF_MEMORY  MemoryType 
)
static

Definition at line 547 of file init.c.

551 {
552  PMMPFN Pfn;
553 
554  ASSERT(!MiIsMemoryTypeInvisible(MemoryType));
555 
556  /* Check if the memory is free */
557  if (MiIsMemoryTypeFree(MemoryType))
558  {
559  /* Get the last pfn of this descriptor. Note we loop backwards */
560  Pfn = &MmPfnDatabase[BasePage + PageCount - 1];
561 
562  /* Loop all pages */
563  while (PageCount--)
564  {
565  /* Add it to the free list */
566  Pfn->u3.e1.CacheAttribute = MiNonCached; // FIXME: Windows ASSERTs MiChached, but why not MiNotMapped?
567  MiInsertPageInFreeList(BasePage + PageCount);
568 
569  /* Go to the previous page */
570  Pfn--;
571  }
572  }
573  else if (MemoryType == LoaderXIPRom)
574  {
575  Pfn = &MmPfnDatabase[BasePage];
576  while (PageCount--)
577  {
578  /* Make it a pseudo-I/O ROM mapping */
579  Pfn->PteAddress = 0;
580  Pfn->u1.Flink = 0;
581  Pfn->u2.ShareCount = 0;
582  Pfn->u3.e1.PageLocation = 0;
584  Pfn->u3.e1.Rom = 1;
585  Pfn->u3.e1.PrototypePte = 1;
586  Pfn->u3.e2.ReferenceCount = 0;
587  Pfn->u4.InPageError = 0;
588  Pfn->u4.PteFrame = 0;
589 
590  /* Advance one */
591  Pfn++;
592  }
593  }
594  else if (MemoryType == LoaderBad)
595  {
596  // FIXME: later
597  ASSERT(FALSE);
598  }
599  else
600  {
601  /* For now skip it */
602  Pfn = &MmPfnDatabase[BasePage];
603  while (PageCount--)
604  {
605  /* Make an active PFN */
607 
608  /* Advance one */
609  Pfn++;
610  }
611  }
612 }
VOID NTAPI MiInsertPageInFreeList(IN PFN_NUMBER PageFrameIndex)
Definition: pfnlist.c:606
PFN_NUMBER Flink
Definition: mm.h:366
union _MMPFN::@1761 u3
USHORT PageLocation
Definition: mm.h:354
PMMPFN MmPfnDatabase
Definition: freelist.c:24
USHORT PrototypePte
Definition: mm.h:352
FORCEINLINE BOOLEAN MiIsMemoryTypeInvisible(TYPE_OF_MEMORY MemoryType)
Definition: miarm.h:683
MMPFNENTRY e1
Definition: mm.h:386
USHORT CacheAttribute
Definition: mm.h:356
#define FALSE
Definition: types.h:117
ULONG_PTR ShareCount
Definition: mm.h:379
Definition: arc.h:130
union _MMPFN::@1760 u2
#define ASSERT(a)
Definition: mode.c:44
Definition: mm.h:362
ULONG_PTR PteFrame
Definition: mm.h:407
struct _MMPFN::@1761::@1767 e2
USHORT Rom
Definition: mm.h:357
PMMPTE PteAddress
Definition: mm.h:375
FORCEINLINE BOOLEAN MiIsMemoryTypeFree(TYPE_OF_MEMORY MemoryType)
Definition: miarm.h:673
union _MMPFN::@1759 u1
ULONG_PTR InPageError
Definition: mm.h:408
union _MMPFN::@1764 u4

Referenced by MiBuildPfnDatabase().

◆ MiBuildNonPagedPool()

VOID NTAPI MiBuildNonPagedPool ( VOID  )

Definition at line 288 of file init.c.

289 {
290  /* Check if this is a machine with less than 256MB of RAM, and no overide */
293  {
294  /* Force the non paged pool to be 2MB so we can reduce RAM usage */
295  MmSizeOfNonPagedPoolInBytes = 2 * 1024 * 1024;
296  }
297 
298  /* Check if the user gave a ridicuously large nonpaged pool RAM size */
300  (MmNumberOfPhysicalPages * 7 / 8))
301  {
302  /* More than 7/8ths of RAM was dedicated to nonpaged pool, ignore! */
304  }
305 
306  /* Check if no registry setting was set, or if the setting was too low */
308  {
309  /* Start with the minimum (256 KB) and add 32 KB for each MB above 4 */
313  }
314 
315  /* Check if the registy setting or our dynamic calculation was too high */
317  {
318  /* Set it to the maximum */
320  }
321 
322  /* Check if a percentage cap was set through the registry */
324  {
325  /* Don't feel like supporting this right now */
327  }
328 
329  /* Page-align the nonpaged pool size */
331 
332  /* Now, check if there was a registry size for the maximum size */
334  {
335  /* Start with the default (1MB) and add 400 KB for each MB above 4 */
339  }
340 
341  /* Don't let the maximum go too high */
343  {
344  /* Set it to the upper limit */
346  }
347 
348  /* Convert nonpaged pool size from bytes to pages */
350 
351  /* Non paged pool starts after the PFN database */
353 
354  /* Calculate the nonpaged pool expansion start region */
358 
359  /* And this is where the none paged pool ends */
362 
363  /* Map PPEs and PDEs for non paged pool (including expansion) */
366 
367  /* Map the nonpaged pool PTEs (without expansion) */
369 
370  /* Initialize the ARM3 nonpaged pool */
373 
374 }
signed char * PCHAR
Definition: retypes.h:7
#define PAGE_SHIFT
Definition: env_spec_w32.h:45
#define MI_MAX_NONPAGED_POOL_SIZE
Definition: mm.h:60
#define MM_HAL_VA_START
Definition: ketypes.h:260
VOID NTAPI MiMapPDEs(PVOID StartAddress, PVOID EndAddress)
Definition: init.c:145
SIZE_T MmMinimumNonPagedPoolSize
Definition: mminit.c:39
ULONG MmMaximumNonPagedPoolPercent
Definition: init.c:20
ULONG MmMaxAdditionNonPagedPoolPerMb
Definition: mminit.c:42
PVOID MmNonPagedPoolExpansionStart
Definition: init.c:25
VOID NTAPI MiMapPTEs(PVOID StartAddress, PVOID EndAddress)
Definition: init.c:172
PMMPFN MmPfnDatabase
Definition: freelist.c:24
PVOID MmNonPagedPoolEnd
Definition: mminit.c:99
#define PCHAR
Definition: match.c:90
#define ASSERT(a)
Definition: mode.c:44
#define MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING
Definition: mm.h:54
PFN_NUMBER MmMaximumNonPagedPoolInPages
Definition: mminit.c:30
ULONG MmMinAdditionNonPagedPoolPerMb
Definition: mminit.c:40
#define PAGE_SIZE
Definition: env_spec_w32.h:49
PVOID MmNonPagedPoolStart
Definition: init.c:24
SIZE_T MmDefaultMaximumNonPagedPool
Definition: mminit.c:41
#define IS_PAGE_ALIGNED(addr)
Definition: init.c:23
ULONG MmMaximumNonPagedPoolInBytes
Definition: init.c:22
VOID NTAPI MiInitializeNonPagedPoolThresholds(VOID)
Definition: pool.c:184
ULONG MmNumberOfPhysicalPages
Definition: init.c:48
#define MI_MAX_INIT_NONPAGED_POOL_SIZE
Definition: mm.h:59
ULONG MxPfnAllocation
Definition: init.c:43
#define UNIMPLEMENTED
Definition: debug.h:115
VOID NTAPI MiMapPPEs(PVOID StartAddress, PVOID EndAddress)
Definition: init.c:118
VOID NTAPI MiInitializeNonPagedPool(VOID)
Definition: pool.c:276
ULONG MmSizeOfNonPagedPoolInBytes
Definition: init.c:21

Referenced by MiInitMachineDependent().

◆ MiBuildPfnDatabase()

VOID NTAPI MiBuildPfnDatabase ( IN PLOADER_PARAMETER_BLOCK  LoaderBlock)

Definition at line 617 of file init.c.

618 {
619  PLIST_ENTRY ListEntry;
621  PFN_NUMBER BasePage, PageCount;
622  KIRQL OldIrql;
623 
624  /* Lock the PFN Database */
625  OldIrql = MiAcquirePfnLock();
626 
627  /* Map the PDEs and PPEs for the pfn database (ignore holes) */
628 #if (_MI_PAGING_LEVELS >= 3)
630 #endif
632 
633  /* First initialize the color tables */
635 
636  /* Loop the memory descriptors */
637  for (ListEntry = LoaderBlock->MemoryDescriptorListHead.Flink;
638  ListEntry != &LoaderBlock->MemoryDescriptorListHead;
639  ListEntry = ListEntry->Flink)
640  {
641  /* Get the descriptor */
642  Descriptor = CONTAINING_RECORD(ListEntry,
644  ListEntry);
645 
646  /* Skip invisible memory */
647  if (MiIsMemoryTypeInvisible(Descriptor->MemoryType)) continue;
648 
649  /* If this is the free descriptor, use the copy instead */
651 
652  /* Get the range for this descriptor */
653  BasePage = Descriptor->BasePage;
654  PageCount = Descriptor->PageCount;
655 
656  /* Map the pages for the database */
657  MiMapPTEs(&MmPfnDatabase[BasePage],
658  (PUCHAR)(&MmPfnDatabase[BasePage + PageCount]) - 1);
659 
660  /* If this was the free descriptor, skip the next step */
661  if (Descriptor == &MxOldFreeDescriptor) continue;
662 
663  /* Add this descriptor to the database */
664  MiAddDescriptorToDatabase(BasePage, PageCount, Descriptor->MemoryType);
665  }
666 
667  /* At this point the whole pfn database is mapped. We are about to add the
668  pages from the free descriptor to the database, so from now on we cannot
669  use it anymore. */
670 
671  /* Now add the free descriptor */
672  BasePage = MxFreeDescriptor->BasePage;
673  PageCount = MxFreeDescriptor->PageCount;
674  MiAddDescriptorToDatabase(BasePage, PageCount, LoaderFree);
675 
676  /* And finally the memory we used */
677  BasePage = MxOldFreeDescriptor.BasePage;
678  PageCount = MxFreeDescriptor->BasePage - BasePage;
679  MiAddDescriptorToDatabase(BasePage, PageCount, LoaderMemoryData);
680 
681  /* Reset the descriptor back so we can create the correct memory blocks */
683 
684  /* Now process the page tables */
686 
687  /* PFNs are initialized now! */
689 
690  /* Release PFN database */
691  MiReleasePfnLock(OldIrql);
692 }
VOID NTAPI MiMapPDEs(PVOID StartAddress, PVOID EndAddress)
Definition: init.c:145
_Must_inspect_result_ _In_ WDFIORESLIST _In_ PIO_RESOURCE_DESCRIPTOR Descriptor
Definition: wdfresource.h:339
#define TRUE
Definition: types.h:120
unsigned char * PUCHAR
Definition: retypes.h:3
BOOLEAN MiPfnsInitialized
Definition: init.c:56
VOID NTAPI MiMapPTEs(PVOID StartAddress, PVOID EndAddress)
Definition: init.c:172
PMEMORY_ALLOCATION_DESCRIPTOR MxFreeDescriptor
Definition: init.c:46
PMMPFN MmPfnDatabase
Definition: freelist.c:24
UCHAR KIRQL
Definition: env_spec_w32.h:591
FORCEINLINE BOOLEAN MiIsMemoryTypeInvisible(TYPE_OF_MEMORY MemoryType)
Definition: miarm.h:683
ULONG PFN_NUMBER
Definition: ke.h:9
PFLT_MESSAGE_WAITER_QUEUE CONTAINING_RECORD(Csq, DEVICE_EXTENSION, IrpQueue)) -> WaiterQ.mLock) _IRQL_raises_(DISPATCH_LEVEL) VOID NTAPI FltpAcquireMessageWaiterLock(_In_ PIO_CSQ Csq, _Out_ PKIRQL Irql)
Definition: Messaging.c:560
KIRQL OldIrql
Definition: mm.h:1502
struct _LIST_ENTRY * Flink
Definition: typedefs.h:121
#define PAGE_SIZE
Definition: env_spec_w32.h:49
Definition: typedefs.h:119
static VOID MiAddDescriptorToDatabase(PFN_NUMBER BasePage, PFN_NUMBER PageCount, TYPE_OF_MEMORY MemoryType)
Definition: init.c:547
ULONG MxPfnAllocation
Definition: init.c:43
VOID NTAPI MiInitializeColorTables(VOID)
Definition: mminit.c:562
VOID NTAPI MiMapPPEs(PVOID StartAddress, PVOID EndAddress)
Definition: init.c:118
MEMORY_ALLOCATION_DESCRIPTOR MxOldFreeDescriptor
Definition: init.c:47
static VOID MiBuildPfnDatabaseFromPageTables(VOID)
Definition: init.c:446

Referenced by MiInitMachineDependent().

◆ MiBuildPfnDatabaseFromPageTables()

static VOID MiBuildPfnDatabaseFromPageTables ( VOID  )
static

Definition at line 446 of file init.c.

447 {
448  PVOID Address = NULL;
449  PFN_NUMBER PageFrameIndex;
450  PMMPDE PointerPde;
451  PMMPTE PointerPte;
452  ULONG k, l;
453  PMMPFN Pfn;
454 #if (_MI_PAGING_LEVELS >= 3)
455  PMMPDE PointerPpe;
456  ULONG j;
457 #endif
458 #if (_MI_PAGING_LEVELS == 4)
459  PMMPDE PointerPxe;
460  ULONG i;
461 #endif
462 
463  /* Manual setup of the top level page directory */
464 #if (_MI_PAGING_LEVELS == 4)
465  PageFrameIndex = PFN_FROM_PTE(MiAddressToPte(PXE_BASE));
466 #elif (_MI_PAGING_LEVELS == 3)
467  PageFrameIndex = PFN_FROM_PTE(MiAddressToPte(PPE_BASE));
468 #else
469  PageFrameIndex = PFN_FROM_PTE(MiAddressToPte(PDE_BASE));
470 #endif
471  Pfn = MiGetPfnEntry(PageFrameIndex);
473  Pfn->u1.WsIndex = 0;
474  Pfn->u2.ShareCount = 1;
475  Pfn->PteAddress = NULL;
477  Pfn->u3.e2.ReferenceCount = 1;
478  Pfn->u4.PteFrame = 0;
479 
480 #if (_MI_PAGING_LEVELS == 4)
481  /* Loop all PXEs in the PML4 */
482  PointerPxe = MiAddressToPxe(Address);
483  for (i = 0; i < PXE_PER_PAGE; i++, PointerPxe++)
484  {
485  /* Skip invalid PXEs */
486  if (!PointerPxe->u.Hard.Valid) continue;
487 
488  /* Handle the PFN */
489  PageFrameIndex = PFN_FROM_PXE(PointerPxe);
490  MiSetupPfnForPageTable(PageFrameIndex, PointerPxe);
491 
492  /* Get starting VA for this PXE */
493  Address = MiPxeToAddress(PointerPxe);
494 #endif
495 #if (_MI_PAGING_LEVELS >= 3)
496  /* Loop all PPEs in this PDP */
497  PointerPpe = MiAddressToPpe(Address);
498  for (j = 0; j < PPE_PER_PAGE; j++, PointerPpe++)
499  {
500  /* Skip invalid PPEs */
501  if (!PointerPpe->u.Hard.Valid) continue;
502 
503  /* Handle the PFN */
504  PageFrameIndex = PFN_FROM_PPE(PointerPpe);
505  MiSetupPfnForPageTable(PageFrameIndex, PointerPpe);
506 
507  /* Get starting VA for this PPE */
508  Address = MiPpeToAddress(PointerPpe);
509 #endif
510  /* Loop all PDEs in this PD */
511  PointerPde = MiAddressToPde(Address);
512  for (k = 0; k < PDE_PER_PAGE; k++, PointerPde++)
513  {
514  /* Skip invalid PDEs */
515  if (!PointerPde->u.Hard.Valid) continue;
516 
517  /* Handle the PFN */
518  PageFrameIndex = PFN_FROM_PDE(PointerPde);
519  MiSetupPfnForPageTable(PageFrameIndex, PointerPde);
520 
521  /* Get starting VA for this PDE */
522  Address = MiPdeToAddress(PointerPde);
523 
524  /* Loop all PTEs in this PT */
525  PointerPte = MiAddressToPte(Address);
526  for (l = 0; l < PTE_PER_PAGE; l++, PointerPte++)
527  {
528  /* Skip invalid PTEs */
529  if (!PointerPte->u.Hard.Valid) continue;
530 
531  /* Handle the PFN */
532  PageFrameIndex = PFN_FROM_PTE(PointerPte);
533  MiSetupPfnForPageTable(PageFrameIndex, PointerPte);
534  }
535  }
536 #if (_MI_PAGING_LEVELS >= 3)
537  }
538 #endif
539 #if (_MI_PAGING_LEVELS == 4)
540  }
541 #endif
542 }
#define PDE_PER_PAGE
Definition: mm.h:21
#define PXE_PER_PAGE
#define PFN_FROM_PDE(v)
Definition: mm.h:93
#define MiAddressToPde(x)
Definition: mmx86.c:20
FORCEINLINE PMMPTE MiAddressToPpe(PVOID Address)
Definition: mm.h:154
union _MMPFN::@1761 u3
#define PPE_PER_PAGE
Definition: mm.h:22
USHORT PageLocation
Definition: mm.h:354
MMPFNENTRY e1
Definition: mm.h:386
USHORT CacheAttribute
Definition: mm.h:356
#define MiAddressToPte(x)
Definition: mmx86.c:19
ULONG PFN_NUMBER
Definition: ke.h:9
ULONG_PTR ShareCount
Definition: mm.h:379
#define PDE_BASE
Definition: winldr.c:21
static WCHAR Address[46]
Definition: ping.c:68
union _MMPFN::@1760 u2
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint GLint GLint j
Definition: glfuncs.h:250
r l[0]
Definition: byte_order.h:167
FORCEINLINE PMMPTE MiAddressToPxe(PVOID Address)
Definition: mm.h:164
#define ASSERT(a)
Definition: mode.c:44
ULONG64 Valid
Definition: mmtypes.h:150
#define PTE_PER_PAGE
Definition: mm.h:20
#define PPE_BASE
Definition: mm.h:362
FORCEINLINE PVOID MiPxeToAddress(PMMPTE PointerPxe)
Definition: mm.h:228
FORCEINLINE PMMPFN MiGetPfnEntry(IN PFN_NUMBER Pfn)
Definition: mm.h:1000
static VOID MiSetupPfnForPageTable(PFN_NUMBER PageFrameIndex, PMMPTE PointerPte)
Definition: init.c:411
MMPTE_HARDWARE Hard
Definition: mmtypes.h:217
#define PXE_BASE
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
ULONG_PTR PteFrame
Definition: mm.h:407
FORCEINLINE PVOID MiPdeToAddress(PMMPTE PointerPde)
Definition: mm.h:210
struct _MMPFN::@1761::@1767 e2
PMMPTE PteAddress
Definition: mm.h:375
#define NULL
Definition: types.h:112
ULONG WsIndex
Definition: mm.h:367
union _MMPFN::@1759 u1
FORCEINLINE PVOID MiPpeToAddress(PMMPTE PointerPpe)
Definition: mm.h:219
unsigned int ULONG
Definition: retypes.h:1
#define PFN_FROM_PXE(v)
Definition: mm.h:95
union _MMPTE::@2287 u
#define PFN_FROM_PTE(v)
Definition: mm.h:92
int k
Definition: mpi.c:3369
#define PFN_FROM_PPE(v)
Definition: mm.h:94
union _MMPFN::@1764 u4

Referenced by MiBuildPfnDatabase().

◆ MiBuildSystemPteSpace()

VOID NTAPI MiBuildSystemPteSpace ( VOID  )

Definition at line 379 of file init.c.

380 {
381  PMMPTE PointerPte;
382  SIZE_T NonPagedSystemSize;
383 
384  /* Use the default number of system PTEs */
386  NonPagedSystemSize = (MmNumberOfSystemPtes + 1) * PAGE_SIZE;
387 
388  /* Put system PTEs at the start of the system VA space */
390  MiSystemPteSpaceEnd = (PUCHAR)MiSystemPteSpaceStart + NonPagedSystemSize;
391 
392  /* Map the PPEs and PDEs for the system PTEs */
395 
396  /* Initialize the system PTE space */
399 
400  /* Reserve system PTEs for zeroing PTEs and clear them */
404 
405  /* Set the counter to maximum */
407 }
VOID NTAPI MiMapPDEs(PVOID StartAddress, PVOID EndAddress)
Definition: init.c:145
PMMPTE NTAPI MiReserveSystemPtes(IN ULONG NumberOfPtes, IN MMSYSTEM_PTE_POOL_TYPE SystemPtePoolType)
Definition: syspte.c:246
PVOID MiSystemPteSpaceStart
Definition: init.c:48
unsigned char * PUCHAR
Definition: retypes.h:3
ULONG MmNumberOfSystemPtes
Definition: init.c:42
#define MiAddressToPte(x)
Definition: mmx86.c:19
PVOID MmNonPagedSystemStart
Definition: init.c:23
#define MI_NUMBER_SYSTEM_PTES
Definition: mm.h:79
VOID NTAPI MiInitializeSystemPtes(IN PMMPTE StartingPte, IN ULONG NumberOfPtes, IN MMSYSTEM_PTE_POOL_TYPE PoolType)
Definition: syspte.c:388
PVOID MiSystemPteSpaceEnd
Definition: init.c:49
#define PAGE_SIZE
Definition: env_spec_w32.h:49
ULONG_PTR SIZE_T
Definition: typedefs.h:80
MMPTE_HARDWARE Hard
Definition: mmtypes.h:217
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:262
ULONG64 PageFrameNumber
Definition: mmtypes.h:171
PMMPTE MiFirstReservedZeroingPte
Definition: hypermap.c:21
VOID NTAPI MiMapPPEs(PVOID StartAddress, PVOID EndAddress)
Definition: init.c:118
#define MI_ZERO_PTES
Definition: mm.h:82
union _MMPTE::@2287 u

Referenced by MiInitMachineDependent().

◆ MiInitializePageTable()

VOID NTAPI MiInitializePageTable ( VOID  )

Definition at line 200 of file init.c.

201 {
202  ULONG64 PxePhysicalAddress;
203  MMPTE TmplPte, *PointerPxe;
204  PFN_NUMBER PxePfn;
205 
206  /* Get current directory base */
207  PxePfn = ((PMMPTE)PXE_SELFMAP)->u.Hard.PageFrameNumber;
208  PxePhysicalAddress = PxePfn << PAGE_SHIFT;
209  ASSERT(PxePhysicalAddress == __readcr3());
210 
211  /* Set directory base for the system process */
212  PsGetCurrentProcess()->Pcb.DirectoryTableBase[0] = PxePhysicalAddress;
213 
214  /* Enable global pages */
216  ASSERT(__readcr4() & CR4_PGE);
217 
218  /* Loop the user mode PXEs */
219  for (PointerPxe = MiAddressToPxe(0);
220  PointerPxe <= MiAddressToPxe(MmHighestUserAddress);
221  PointerPxe++)
222  {
223  /* Zero the PXE, clear all mappings */
224  PointerPxe->u.Long = 0;
225  }
226 
227  /* Flush the TLB */
229 
230  /* Set up a template PTE */
231  TmplPte.u.Long = 0;
232  TmplPte.u.Flush.Valid = 1;
233  TmplPte.u.Flush.Write = 1;
234  HyperTemplatePte = TmplPte;
235 
236  /* Create PDPTs (72 KB) for shared system address space,
237  * skip page tables TODO: use global pages. */
238 
239  /* Loop the PXEs */
240  for (PointerPxe = MiAddressToPxe((PVOID)HYPER_SPACE);
242  PointerPxe++)
243  {
244  /* Is the PXE already valid? */
245  if (!PointerPxe->u.Hard.Valid)
246  {
247  /* It's not Initialize it */
248  TmplPte.u.Flush.PageFrameNumber = MxGetNextPage(1);
249  *PointerPxe = TmplPte;
250 
251  /* Zero the page. The PXE is the PTE for the PDPT. */
252  RtlZeroMemory(MiPteToAddress(PointerPxe), PAGE_SIZE);
253  }
254  }
256  PsGetCurrentProcess()->Pcb.DirectoryTableBase[1] = PxePfn << PAGE_SHIFT;
257 
258  /* Map PPEs for paged pool */
260 
261  /* Setup 1 PPE for hyper space */
263 
264  /* Setup PPEs for system space view */
266 
267  /* Setup the mapping PDEs */
269 
270  /* Setup the mapping PTEs */
274 
275  /* Setup debug mapping PTE */
279 
280  /* Setup PDE and PTEs for VAD bitmap and working set list */
283 }
ULONG64 Valid
Definition: mmtypes.h:66
signed char * PCHAR
Definition: retypes.h:7
__INTRIN_INLINE void __writecr4(unsigned int Data)
Definition: intrin_x86.h:1800
#define PAGE_SHIFT
Definition: env_spec_w32.h:45
VOID NTAPI MiMapPDEs(PVOID StartAddress, PVOID EndAddress)
Definition: init.c:145
#define MI_VAD_BITMAP
Definition: mm.h:50
HARDWARE_PTE Flush
Definition: mmtypes.h:216
PVOID MmPagedPoolEnd
Definition: init.c:26
PMMPTE MmLastReservedMappingPte
Definition: hypermap.c:20
VOID NTAPI MiMapPTEs(PVOID StartAddress, PVOID EndAddress)
Definition: init.c:172
__INTRIN_INLINE unsigned long __readcr3(void)
Definition: intrin_x86.h:1819
MMPTE HyperTemplatePte
Definition: hypermap.c:22
#define CR4_PGE
Definition: ketypes.h:91
#define MiAddressToPte(x)
Definition: mmx86.c:19
ULONG PFN_NUMBER
Definition: ke.h:9
ULONG MmSystemViewSize
Definition: init.c:39
PMMPTE MmFirstReservedMappingPte
Definition: hypermap.c:20
PVOID MiSystemViewStart
Definition: init.c:38
#define PsGetCurrentProcess
Definition: psfuncs.h:17
#define MI_HYPERSPACE_PTES
Definition: mm.h:81
#define PXE_SELFMAP
#define MI_DEBUG_MAPPING
Definition: mm.h:20
FORCEINLINE PMMPTE MiAddressToPxe(PVOID Address)
Definition: mm.h:164
#define ASSERT(a)
Definition: mode.c:44
#define MI_WORKING_SET_LIST
Definition: mm.h:51
#define MI_MAPPING_RANGE_END
Definition: mm.h:48
ULONG64 Valid
Definition: mmtypes.h:150
struct _MMPTE * PMMPTE
#define HYPER_SPACE_END
Definition: mm.h:15
unsigned __int64 ULONG64
Definition: imports.h:198
ULONG64 PageFrameNumber
Definition: mmtypes.h:78
PVOID MmHighestUserAddress
Definition: init.c:51
#define MI_MAPPING_RANGE_START
Definition: mm.h:47
#define PAGE_SIZE
Definition: env_spec_w32.h:49
__INTRIN_INLINE unsigned long __readcr4(void)
Definition: intrin_x86.h:1826
ULONG_PTR Long
Definition: mmtypes.h:215
PVOID MmPagedPoolStart
Definition: miarm.h:579
MMPTE_HARDWARE Hard
Definition: mmtypes.h:217
PFN_NUMBER NTAPI MxGetNextPage(IN PFN_NUMBER PageCount)
Definition: mminit.c:483
ULONG64 Write
Definition: mmtypes.h:67
#define HYPER_SPACE
Definition: mm.h:14
#define PFN_FROM_PXE(v)
Definition: mm.h:95
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:262
ULONG64 PageFrameNumber
Definition: mmtypes.h:171
VOID NTAPI MiMapPPEs(PVOID StartAddress, PVOID EndAddress)
Definition: init.c:118
FORCEINLINE PVOID MiPteToAddress(PMMPTE PointerPte)
Definition: mm.h:201
union _MMPTE::@2287 u
PMMPTE MmDebugPte
Definition: mmdbg.c:31
#define MI_HIGHEST_SYSTEM_ADDRESS
Definition: mm.h:31
VOID NTAPI KeFlushCurrentTb(VOID)
Definition: cpu.c:312

Referenced by MiInitMachineDependent().

◆ MiInitializeSessionSpaceLayout()

VOID NTAPI MiInitializeSessionSpaceLayout ( VOID  )

Definition at line 63 of file init.c.

64 {
65  /* This is the entire size */
67 
68  /* Start with session space end */
70 
71  /* The highest range is the session image range */
76 
77  /* Session working set is below the session image range */
79 
80  /* Session view is below the session working set */
85 
86  /* Session pool is below session view */
91 
92  /* And it all begins here */
94 
95  /* System view space ends at session space, so now that we know where
96  * this is, we can compute the base address of system view space itself. */
100 
101  /* Sanity checks */
105 
106  /* Compute the PTE addresses for all the addresses we carved out */
111 
112  /* Initialize the pointer to the session space structure */
114 }
#define Add2Ptr(PTR, INC)
#define MI_SESSION_SIZE
Definition: mm.h:66
PVOID MiSessionPoolStart
Definition: init.c:32
ULONG MmSessionSize
Definition: init.c:34
unsigned char * PUCHAR
Definition: retypes.h:3
PVOID MiSessionImageStart
Definition: init.c:29
PMMPTE MiSessionLastPte
Definition: mminit.c:146
PMM_SESSION_SPACE MmSessionSpace
Definition: session.c:21
PVOID MiSessionSpaceWs
Definition: mminit.c:130
ULONG MmSessionImageSize
Definition: init.c:37
PVOID MmSessionBase
Definition: init.c:33
#define MI_SESSION_WORKING_SET_SIZE
Definition: mm.h:65
#define MiAddressToPte(x)
Definition: mmx86.c:19
ULONG MmSystemViewSize
Definition: init.c:39
ULONG MmSessionViewSize
Definition: init.c:35
PVOID MiSystemViewStart
Definition: init.c:38
void * PVOID
Definition: retypes.h:9
PVOID MiSessionViewEnd
Definition: init.c:47
#define ASSERT(a)
Definition: mode.c:44
PVOID MiSessionSpaceEnd
Definition: init.c:27
#define MI_SESSION_IMAGE_SIZE
Definition: mm.h:64
PVOID MiSessionImageEnd
Definition: init.c:28
PMMPTE MiSessionImagePteStart
Definition: mminit.c:143
ULONG MmSessionPoolSize
Definition: init.c:36
PVOID MiSessionViewStart
Definition: init.c:30
#define IS_PAGE_ALIGNED(addr)
Definition: init.c:23
struct _MM_SESSION_SPACE * PMM_SESSION_SPACE
#define MI_SYSTEM_VIEW_SIZE
Definition: mm.h:61
#define MI_SESSION_SPACE_END
Definition: mm.h:25
PVOID MiSessionPoolEnd
Definition: init.c:31
#define MI_SESSION_VIEW_SIZE
Definition: mm.h:62
#define MI_SESSION_POOL_SIZE
Definition: mm.h:63
PMMPTE MiSessionBasePte
Definition: mminit.c:145
PMMPTE MiSessionImagePteEnd
Definition: mminit.c:144

Referenced by MmArmInitSystem().

◆ MiInitMachineDependent()

NTSTATUS NTAPI MiInitMachineDependent ( IN PLOADER_PARAMETER_BLOCK  LoaderBlock)

Definition at line 697 of file init.c.

698 {
700  ULONG Flags;
701 
702  ASSERT(MxPfnAllocation != 0);
703 
704  /* Set some hardcoded addresses */
709 
710 
711 // PrototypePte.u.Proto.Valid = 1
712 // PrototypePte.u.ReadOnly
713 // PrototypePte.u.Prototype
714 // PrototypePte.u.Protection = MM_READWRITE;
715 // PrototypePte.u.ProtoAddress
717 
719 
721 
723 
724  /* Map the PFN database pages */
725  MiBuildPfnDatabase(LoaderBlock);
726 
727  /* Reset the ref/share count so that MmInitializeProcessAddressSpace works */
729  Pfn->u2.ShareCount = 0;
730  Pfn->u3.e2.ReferenceCount = 0;
731 
733  Pfn->u2.ShareCount = 0;
734  Pfn->u3.e2.ReferenceCount = 0;
735 
737  Pfn->u2.ShareCount = 0;
738  Pfn->u3.e2.ReferenceCount = 0;
739 
741  Pfn->u2.ShareCount = 0;
742  Pfn->u3.e2.ReferenceCount = 0;
743 
745  Pfn->u2.ShareCount = 0;
746  Pfn->u3.e2.ReferenceCount = 0;
747 
748  /* Initialize the nonpaged pool */
750 
751  /* Initialize the bogus address space */
752  Flags = 0;
754  if (!NT_SUCCESS(Status))
755  {
756  DPRINT1("MmInitializeProcessAddressSpace(9 failed: 0x%lx\n", Status);
757  return Status;
758  }
759 
760  /* Initialize the balancer */
762 
763  /* Make sure we have everything we need */
774 
775  return STATUS_SUCCESS;
776 }
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble * u
Definition: glfuncs.h:240
VOID NTAPI MiBuildNonPagedPool(VOID)
Definition: init.c:288
#define MM_SYSTEM_SPACE_START
Definition: mm.h:19
MMPTE PrototypePte
Definition: init.c:40
#define MI_PFN_DATABASE
Definition: mm.h:28
#define PFN_FROM_PDE(v)
Definition: mm.h:93
VOID NTAPI InitializePool(IN POOL_TYPE PoolType, IN ULONG Threshold)
Definition: expool.c:1017
#define MiAddressToPde(x)
Definition: mmx86.c:20
VOID NTAPI MiInitializePageTable(VOID)
Definition: init.c:200
ULONG MmNumberOfSystemPtes
Definition: init.c:42
LONG NTSTATUS
Definition: precomp.h:26
FORCEINLINE PMMPTE MiAddressToPpe(PVOID Address)
Definition: mm.h:154
union _MMPFN::@1761 u3
PVOID MmNonPagedPoolExpansionStart
Definition: init.c:25
#define MI_PTE_LOOKUP_NEEDED
Definition: miarm.h:246
PFN_NUMBER MmAvailablePages
Definition: freelist.c:26
PMMPFN MmPfnDatabase
Definition: freelist.c:24
#define MiAddressToPte(x)
Definition: mmx86.c:19
PVOID MmNonPagedSystemStart
Definition: init.c:23
ULONG_PTR ShareCount
Definition: mm.h:379
#define PsGetCurrentProcess
Definition: psfuncs.h:17
void * PVOID
Definition: retypes.h:9
union _MMPFN::@1760 u2
#define PXE_SELFMAP
Status
Definition: gdiplustypes.h:24
FORCEINLINE PMMPTE MiAddressToPxe(PVOID Address)
Definition: mm.h:164
_Must_inspect_result_ _In_ ULONG Flags
Definition: wsk.h:170
#define ASSERT(a)
Definition: mode.c:44
#define MI_WORKING_SET_LIST
Definition: mm.h:51
#define NT_SUCCESS(StatCode)
Definition: apphelp.c:32
NTSTATUS NTAPI MmInitializeProcessAddressSpace(IN PEPROCESS Process, IN PEPROCESS Clone OPTIONAL, IN PVOID Section OPTIONAL, IN OUT PULONG Flags, IN POBJECT_NAME_INFORMATION *AuditName OPTIONAL)
VOID NTAPI MiBuildSystemPteSpace(VOID)
Definition: init.c:379
VOID NTAPI MiBuildPfnDatabase(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
Definition: init.c:617
#define HYPER_SPACE_END
Definition: mm.h:15
ULONG64 PageFileHigh
Definition: mmtypes.h:93
Definition: mm.h:362
FORCEINLINE PMMPFN MiGetPfnEntry(IN PFN_NUMBER Pfn)
Definition: mm.h:1000
PMMWSL MmWorkingSetList
Definition: wslist.cpp:19
PVOID MmNonPagedPoolStart
Definition: init.c:24
VOID NTAPI MmInitializeBalancer(ULONG NrAvailablePages, ULONG NrSystemPages)
Definition: balance.c:48
struct _MMPFN::@1761::@1767 e2
ULONG MmMaximumNonPagedPoolInBytes
Definition: init.c:22
MMPTE_SOFTWARE Soft
Definition: mmtypes.h:219
#define NULL
Definition: types.h:112
#define DPRINT1
Definition: precomp.h:8
ULONG MxPfnAllocation
Definition: init.c:43
#define HYPER_SPACE
Definition: mm.h:14
PVOID MmHyperSpaceEnd
Definition: init.c:56
unsigned int ULONG
Definition: retypes.h:1
#define PFN_FROM_PXE(v)
Definition: mm.h:95
#define STATUS_SUCCESS
Definition: shellext.h:65
ULONG MmSizeOfNonPagedPoolInBytes
Definition: init.c:21
union _MMPTE::@2287 u
#define PFN_FROM_PTE(v)
Definition: mm.h:92
#define PFN_FROM_PPE(v)
Definition: mm.h:94

Referenced by MmArmInitSystem().

◆ MiMapPDEs()

VOID NTAPI MiMapPDEs ( PVOID  StartAddress,
PVOID  EndAddress 
)

Definition at line 145 of file init.c.

148 {
149  PMMPDE PointerPde;
150  MMPDE TmplPde = ValidKernelPde;
151 
152  /* Loop the PDEs */
153  for (PointerPde = MiAddressToPde(StartAddress);
154  PointerPde <= MiAddressToPde(EndAddress);
155  PointerPde++)
156  {
157  /* Check if its already mapped */
158  if (!PointerPde->u.Hard.Valid)
159  {
160  /* No, map it! */
161  TmplPde.u.Hard.PageFrameNumber = MxGetNextPage(1);
162  MI_WRITE_VALID_PTE(PointerPde, TmplPde);
163 
164  /* Zero out the page table */
165  RtlZeroMemory(MiPteToAddress(PointerPde), PAGE_SIZE);
166  }
167  }
168 }
#define MiAddressToPde(x)
Definition: mmx86.c:20
FORCEINLINE VOID MI_WRITE_VALID_PTE(IN PMMPTE PointerPte, IN MMPTE TempPte)
Definition: miarm.h:964
ULONG64 Valid
Definition: mmtypes.h:150
#define PAGE_SIZE
Definition: env_spec_w32.h:49
MMPTE ValidKernelPde
Definition: init.c:28
MMPTE_HARDWARE Hard
Definition: mmtypes.h:217
PFN_NUMBER NTAPI MxGetNextPage(IN PFN_NUMBER PageCount)
Definition: mminit.c:483
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:262
ULONG64 PageFrameNumber
Definition: mmtypes.h:171
FORCEINLINE PVOID MiPteToAddress(PMMPTE PointerPte)
Definition: mm.h:201
union _MMPTE::@2287 u

Referenced by MiBuildNonPagedPool(), MiBuildPfnDatabase(), MiBuildSystemPteSpace(), and MiInitializePageTable().

◆ MiMapPPEs()

VOID NTAPI MiMapPPEs ( PVOID  StartAddress,
PVOID  EndAddress 
)

Definition at line 118 of file init.c.

121 {
122  PMMPDE PointerPpe;
123  MMPDE TmplPde = ValidKernelPde;
124 
125  /* Loop the PPEs */
126  for (PointerPpe = MiAddressToPpe(StartAddress);
127  PointerPpe <= MiAddressToPpe(EndAddress);
128  PointerPpe++)
129  {
130  /* Check if its already mapped */
131  if (!PointerPpe->u.Hard.Valid)
132  {
133  /* No, map it! */
134  TmplPde.u.Hard.PageFrameNumber = MxGetNextPage(1);
135  MI_WRITE_VALID_PTE(PointerPpe, TmplPde);
136 
137  /* Zero out the page table */
138  RtlZeroMemory(MiPteToAddress(PointerPpe), PAGE_SIZE);
139  }
140  }
141 }
FORCEINLINE PMMPTE MiAddressToPpe(PVOID Address)
Definition: mm.h:154
FORCEINLINE VOID MI_WRITE_VALID_PTE(IN PMMPTE PointerPte, IN MMPTE TempPte)
Definition: miarm.h:964
ULONG64 Valid
Definition: mmtypes.h:150
#define PAGE_SIZE
Definition: env_spec_w32.h:49
MMPTE ValidKernelPde
Definition: init.c:28
MMPTE_HARDWARE Hard
Definition: mmtypes.h:217
PFN_NUMBER NTAPI MxGetNextPage(IN PFN_NUMBER PageCount)
Definition: mminit.c:483
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:262
ULONG64 PageFrameNumber
Definition: mmtypes.h:171
FORCEINLINE PVOID MiPteToAddress(PMMPTE PointerPte)
Definition: mm.h:201
union _MMPTE::@2287 u

Referenced by MiBuildNonPagedPool(), MiBuildPfnDatabase(), MiBuildSystemPteSpace(), and MiInitializePageTable().

◆ MiMapPTEs()

VOID NTAPI MiMapPTEs ( PVOID  StartAddress,
PVOID  EndAddress 
)

Definition at line 172 of file init.c.

175 {
176  PMMPTE PointerPte;
177  MMPTE TmplPte = ValidKernelPte;
178 
179  /* Loop the PTEs */
180  for (PointerPte = MiAddressToPte(StartAddress);
181  PointerPte <= MiAddressToPte(EndAddress);
182  PointerPte++)
183  {
184  /* Check if its already mapped */
185  if (!PointerPte->u.Hard.Valid)
186  {
187  /* No, map it! */
188  TmplPte.u.Hard.PageFrameNumber = MxGetNextPage(1);
189  MI_WRITE_VALID_PTE(PointerPte, TmplPte);
190 
191  /* Zero out the page (FIXME: not always neccessary) */
192  RtlZeroMemory(MiPteToAddress(PointerPte), PAGE_SIZE);
193  }
194  }
195 }
#define MiAddressToPte(x)
Definition: mmx86.c:19
FORCEINLINE VOID MI_WRITE_VALID_PTE(IN PMMPTE PointerPte, IN MMPTE TempPte)
Definition: miarm.h:964
ULONG64 Valid
Definition: mmtypes.h:150
MMPTE ValidKernelPte
Definition: init.c:29
#define PAGE_SIZE
Definition: env_spec_w32.h:49
MMPTE_HARDWARE Hard
Definition: mmtypes.h:217
PFN_NUMBER NTAPI MxGetNextPage(IN PFN_NUMBER PageCount)
Definition: mminit.c:483
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:262
ULONG64 PageFrameNumber
Definition: mmtypes.h:171
FORCEINLINE PVOID MiPteToAddress(PMMPTE PointerPte)
Definition: mm.h:201
union _MMPTE::@2287 u

Referenced by MiBuildNonPagedPool(), MiBuildPfnDatabase(), and MiInitializePageTable().

◆ MiSetupPfnForPageTable()

static VOID MiSetupPfnForPageTable ( PFN_NUMBER  PageFrameIndex,
PMMPTE  PointerPte 
)
static

Definition at line 411 of file init.c.

414 {
415  PMMPFN Pfn;
416  PMMPDE PointerPde;
417 
418  /* Get the pfn entry for this page */
419  Pfn = MiGetPfnEntry(PageFrameIndex);
420 
421  /* Check if it's valid memory */
422  if ((PageFrameIndex <= MmHighestPhysicalPage) &&
423  (MmIsAddressValid(Pfn)) &&
424  (Pfn->u3.e1.PageLocation == ActiveAndValid))
425  {
426  /* Setup the PFN entry */
427  Pfn->u1.WsIndex = 0;
428  Pfn->u2.ShareCount++;
429  Pfn->PteAddress = PointerPte;
430  Pfn->OriginalPte = *PointerPte;
433  Pfn->u3.e2.ReferenceCount = 1;
434  Pfn->u4.PteFrame = PFN_FROM_PTE(MiAddressToPte(PointerPte));
435  }
436 
437  /* Increase the shared count of the PFN entry for the PDE */
438  PointerPde = MiAddressToPde(MiPteToAddress(PointerPte));
439  Pfn = MiGetPfnEntry(PFN_FROM_PTE(PointerPde));
440  Pfn->u2.ShareCount++;
441 }
#define MiAddressToPde(x)
Definition: mmx86.c:20
union _MMPFN::@1761 u3
USHORT PageLocation
Definition: mm.h:354
MMPFNENTRY e1
Definition: mm.h:386
USHORT CacheAttribute
Definition: mm.h:356
#define MiAddressToPte(x)
Definition: mmx86.c:19
ULONG_PTR ShareCount
Definition: mm.h:379
union _MMPFN::@1760 u2
ULONG MmHighestPhysicalPage
Definition: init.c:48
BOOLEAN NTAPI MmIsAddressValid(IN PVOID VirtualAddress)
Definition: mmsup.c:174
Definition: mm.h:362
FORCEINLINE PMMPFN MiGetPfnEntry(IN PFN_NUMBER Pfn)
Definition: mm.h:1000
ULONG_PTR PteFrame
Definition: mm.h:407
struct _MMPFN::@1761::@1767 e2
PMMPTE PteAddress
Definition: mm.h:375
MMPTE OriginalPte
Definition: mm.h:396
ULONG WsIndex
Definition: mm.h:367
union _MMPFN::@1759 u1
FORCEINLINE PVOID MiPteToAddress(PMMPTE PointerPte)
Definition: mm.h:201
#define PFN_FROM_PTE(v)
Definition: mm.h:92
union _MMPFN::@1764 u4

Referenced by MiBuildPfnDatabaseFromPageTables().

Variable Documentation

◆ DemandZeroPde

Definition at line 36 of file init.c.

Referenced by MmArmAccessFault().

◆ DemandZeroPte

Definition at line 37 of file init.c.

Referenced by MiInitializePfnAndMakePteValid(), and MiQueryAddressState().

◆ MiIncludeType

BOOLEAN MiIncludeType[LoaderMaximum]

Definition at line 52 of file init.c.

◆ MiPfnsInitialized

BOOLEAN MiPfnsInitialized = FALSE

Definition at line 56 of file init.c.

Referenced by MiBuildPfnDatabase().

◆ MiSessionViewEnd

PVOID MiSessionViewEnd

Definition at line 47 of file init.c.

Referenced by MiInitializeSessionSpaceLayout().

◆ MiSystemPteSpaceEnd

PVOID MiSystemPteSpaceEnd

Definition at line 49 of file init.c.

Referenced by MiBuildSystemPteSpace().

◆ MiSystemPteSpaceStart

PVOID MiSystemPteSpaceStart

Definition at line 48 of file init.c.

Referenced by MiBuildSystemPteSpace().

◆ MmDebugPte

◆ MmDecommittedPte

◆ MxFreePageBase

PFN_NUMBER MxFreePageBase

Definition at line 53 of file init.c.

◆ MxFreePageCount

ULONG64 MxFreePageCount = 0

Definition at line 54 of file init.c.

◆ MxPfnSizeInBytes

ULONG64 MxPfnSizeInBytes

Definition at line 51 of file init.c.

◆ PrototypePte

MMPTE PrototypePte
Initial value:
PTE_PROTOTYPE | (MI_PTE_LOOKUP_NEEDED << 32)}}
#define MI_PTE_LOOKUP_NEEDED
Definition: miarm.h:246
#define MM_PTE_SOFTWARE_PROTECTION_BITS
Definition: mm.h:75
#define MM_EXECUTE_READWRITE
Definition: miarm.h:49

Definition at line 40 of file init.c.

Referenced by MiDeletePte(), MiDeleteVirtualAddresses(), MiInitMachineDependent(), MiSetProtectionOnSection(), and MmArmAccessFault().

◆ ValidKernelPde

MMPTE ValidKernelPde = {{PTE_VALID|PTE_EXECUTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}}

◆ ValidKernelPdeLocal

MMPTE ValidKernelPdeLocal = {{PTE_VALID|PTE_EXECUTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}}

◆ ValidKernelPte

◆ ValidKernelPteLocal

MMPTE ValidKernelPteLocal = {{PTE_VALID|PTE_EXECUTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}}