15 #define MODULE_INVOLVED_IN_ARM3 60 if (!Mdl)
return NULL;
67 if (PageCount != MdlPageCount)
72 ASSERT(PageCount > MdlPageCount);
96 *(
PMDL*)PointerPte++ = Mdl;
116 switch (CacheAttribute)
151 PageFrameIndex = *MdlPages++;
158 }
while (--PageCount);
198 Mdl = *(
PMDL*)(--PointerPte);
#define MI_PAGE_WRITE_COMBINED(x)
PMMPTE NTAPI MiReserveSystemPtes(IN ULONG NumberOfPtes, IN MMSYSTEM_PTE_POOL_TYPE SystemPtePoolType)
enum _MI_PFN_CACHE_ATTRIBUTE MI_PFN_CACHE_ATTRIBUTE
#define MiAddressToPte(x)
NTSTATUS(* NTAPI)(IN PFILE_FULL_EA_INFORMATION EaBuffer, IN ULONG EaLength, OUT PULONG ErrorOffset)
FORCEINLINE VOID MI_WRITE_VALID_PTE(IN PMMPTE PointerPte, IN MMPTE TempPte)
MI_PFN_CACHE_ATTRIBUTE MiPlatformCacheAttributes[2][MmMaximumCacheType]
VOID NTAPI MmFreePagesFromMdl(IN PMDL Mdl)
PVOID FORCEINLINE MiPteToAddress(PMMPTE PointerPte)
VOID NTAPI MiReleaseSystemPtes(IN PMMPTE StartingPte, IN ULONG NumberOfPtes, IN MMSYSTEM_PTE_POOL_TYPE SystemPtePoolType)
_Must_inspect_result_ _In_ PHYSICAL_ADDRESS _In_ PHYSICAL_ADDRESS SkipBytes
#define ADDRESS_AND_SIZE_TO_SPAN_PAGES(_Va, _Size)
_In_ HANDLE _Outptr_result_bytebuffer_ ViewSize PVOID * BaseAddress
HARDWARE_PTE_ARMV6 TempPte
#define MI_PAGE_WRITE_THROUGH(x)
ASSERT((InvokeOnSuccess||InvokeOnError||InvokeOnCancel) ?(CompletionRoutine !=NULL) :TRUE)
#define BYTES_TO_PAGES(Size)
_Must_inspect_result_ _In_ PHYSICAL_ADDRESS HighAddress
#define MI_PAGE_DISABLE_CACHE(x)
VOID NTAPI MmFreeNonCachedMemory(IN PVOID BaseAddress, IN SIZE_T NumberOfBytes)
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS _Inout_ PLARGE_INTEGER NumberOfBytes
#define ExFreePoolWithTag(_P, _T)
PVOID NTAPI MmAllocateNonCachedMemory(IN SIZE_T NumberOfBytes)
PMDL NTAPI MiAllocatePagesForMdl(IN PHYSICAL_ADDRESS LowAddress, IN PHYSICAL_ADDRESS HighAddress, IN PHYSICAL_ADDRESS SkipBytes, IN SIZE_T TotalBytes, IN MI_PFN_CACHE_ATTRIBUTE CacheAttribute, IN ULONG Flags)