ReactOS  0.4.14-dev-41-g31d7680
iosup.c File Reference
#include <ntoskrnl.h>
#include <debug.h>
#include <mm/ARM3/miarm.h>
Include dependency graph for iosup.c:

Go to the source code of this file.

Macros

#define NDEBUG
 
#define MODULE_INVOLVED_IN_ARM3
 

Functions

PVOID NTAPI MmMapIoSpace (IN PHYSICAL_ADDRESS PhysicalAddress, IN SIZE_T NumberOfBytes, IN MEMORY_CACHING_TYPE CacheType)
 
VOID NTAPI MmUnmapIoSpace (IN PVOID BaseAddress, IN SIZE_T NumberOfBytes)
 
PVOID NTAPI MmMapVideoDisplay (IN PHYSICAL_ADDRESS PhysicalAddress, IN SIZE_T NumberOfBytes, IN MEMORY_CACHING_TYPE CacheType)
 
VOID NTAPI MmUnmapVideoDisplay (IN PVOID BaseAddress, IN SIZE_T NumberOfBytes)
 
LOGICAL NTAPI MmIsIoSpaceActive (IN PHYSICAL_ADDRESS StartAddress, IN SIZE_T NumberOfBytes)
 

Variables

MI_PFN_CACHE_ATTRIBUTE MiPlatformCacheAttributes [2][MmMaximumCacheType]
 

Macro Definition Documentation

◆ MODULE_INVOLVED_IN_ARM3

#define MODULE_INVOLVED_IN_ARM3

Definition at line 15 of file iosup.c.

◆ NDEBUG

#define NDEBUG

Definition at line 12 of file iosup.c.

Function Documentation

◆ MmIsIoSpaceActive()

LOGICAL NTAPI MmIsIoSpaceActive ( IN PHYSICAL_ADDRESS  StartAddress,
IN SIZE_T  NumberOfBytes 
)

Definition at line 271 of file iosup.c.

273 {
275  return FALSE;
276 }
#define UNIMPLEMENTED
Definition: debug.h:114

◆ MmMapIoSpace()

PVOID NTAPI MmMapIoSpace ( IN PHYSICAL_ADDRESS  PhysicalAddress,
IN SIZE_T  NumberOfBytes,
IN MEMORY_CACHING_TYPE  CacheType 
)

Definition at line 47 of file iosup.c.

50 {
51 
52  PFN_NUMBER Pfn;
53  PFN_COUNT PageCount;
54  PMMPTE PointerPte;
56  MMPTE TempPte;
57  PMMPFN Pfn1 = NULL;
58  MI_PFN_CACHE_ATTRIBUTE CacheAttribute;
59  BOOLEAN IsIoMapping;
60 
61  //
62  // Must be called with a non-zero count
63  //
64  ASSERT(NumberOfBytes != 0);
65 
66  //
67  // Make sure the upper bits are 0 if this system
68  // can't describe more than 4 GB of physical memory.
69  // FIXME: This doesn't respect PAE, but we currently don't
70  // define a PAE build flag since there is no such build.
71  //
72 #if !defined(_M_AMD64)
74 #endif
75 
76  //
77  // Normalize and validate the caching attributes
78  //
79  CacheType &= 0xFF;
80  if (CacheType >= MmMaximumCacheType) return NULL;
81 
82  //
83  // Calculate page count
84  //
87 
88  //
89  // Compute the PFN and check if it's a known I/O mapping
90  // Also translate the cache attribute
91  //
93  Pfn1 = MiGetPfnEntry(Pfn);
94  IsIoMapping = (Pfn1 == NULL) ? TRUE : FALSE;
95  CacheAttribute = MiPlatformCacheAttributes[IsIoMapping][CacheType];
96 
97  //
98  // Now allocate system PTEs for the mapping, and get the VA
99  //
100  PointerPte = MiReserveSystemPtes(PageCount, SystemPteSpace);
101  if (!PointerPte) return NULL;
102  BaseAddress = MiPteToAddress(PointerPte);
103 
104  //
105  // Check if this is uncached
106  //
107  if (CacheAttribute != MiCached)
108  {
109  //
110  // Flush all caches
111  //
114  }
115 
116  //
117  // Now compute the VA offset
118  //
121 
122  //
123  // Get the template and configure caching
124  //
126  switch (CacheAttribute)
127  {
128  case MiNonCached:
129 
130  //
131  // Disable the cache
132  //
135  break;
136 
137  case MiCached:
138 
139  //
140  // Leave defaults
141  //
142  break;
143 
144  case MiWriteCombined:
145 
146  //
147  // Disable the cache and allow combined writing
148  //
151  break;
152 
153  default:
154 
155  //
156  // Should never happen
157  //
158  ASSERT(FALSE);
159  break;
160  }
161 
162  //
163  // Sanity check and re-flush
164  //
166  ASSERT((Pfn1 == MiGetPfnEntry(Pfn)) || (Pfn1 == NULL));
169 
170  //
171  // Do the mapping
172  //
173  do
174  {
175  //
176  // Write the PFN
177  //
178  TempPte.u.Hard.PageFrameNumber = Pfn++;
179  MI_WRITE_VALID_PTE(PointerPte++, TempPte);
180  } while (--PageCount);
181 
182  //
183  // We're done!
184  //
185  return BaseAddress;
186 }
#define PAGE_SHIFT
Definition: env_spec_w32.h:45
#define TRUE
Definition: types.h:120
#define MI_PAGE_WRITE_COMBINED(x)
Definition: mm.h:100
ULONG PFN_COUNT
Definition: mmtypes.h:102
PMMPTE NTAPI MiReserveSystemPtes(IN ULONG NumberOfPtes, IN MMSYSTEM_PTE_POOL_TYPE SystemPtePoolType)
Definition: syspte.c:246
enum _MI_PFN_CACHE_ATTRIBUTE MI_PFN_CACHE_ATTRIBUTE
uint32_t ULONG_PTR
Definition: typedefs.h:63
ULONG PFN_NUMBER
Definition: ke.h:8
FORCEINLINE VOID MI_WRITE_VALID_PTE(IN PMMPTE PointerPte, IN MMPTE TempPte)
Definition: miarm.h:951
MI_PFN_CACHE_ATTRIBUTE MiPlatformCacheAttributes[2][MmMaximumCacheType]
Definition: iosup.c:27
unsigned char BOOLEAN
smooth NULL
Definition: ftsmooth.c:416
_Must_inspect_result_ _In_ PHYSICAL_ADDRESS _In_ PHYSICAL_ADDRESS _In_opt_ PHYSICAL_ADDRESS _In_ MEMORY_CACHING_TYPE CacheType
Definition: mmfuncs.h:214
PVOID FORCEINLINE MiPteToAddress(PMMPTE PointerPte)
Definition: mm.h:198
void * PVOID
Definition: retypes.h:9
VOID NTAPI KeFlushEntireTb(IN BOOLEAN Invalid, IN BOOLEAN AllProcessors)
Definition: cpu.c:413
#define ADDRESS_AND_SIZE_TO_SPAN_PAGES(_Va, _Size)
BOOLEAN NTAPI KeInvalidateAllCaches(VOID)
Definition: cpu.c:459
_In_ HANDLE _Outptr_result_bytebuffer_ ViewSize PVOID * BaseAddress
Definition: mmfuncs.h:404
HARDWARE_PTE_ARMV6 TempPte
Definition: winldr.c:76
MMPTE ValidKernelPte
Definition: init.c:31
#define MI_PAGE_WRITE_THROUGH(x)
Definition: mm.h:99
ASSERT((InvokeOnSuccess||InvokeOnError||InvokeOnCancel) ?(CompletionRoutine !=NULL) :TRUE)
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS PhysicalAddress
Definition: iotypes.h:1061
Definition: mm.h:305
ULONG LowPart
Definition: typedefs.h:104
FORCEINLINE PMMPFN MiGetPfnEntry(IN PFN_NUMBER Pfn)
Definition: mm.h:940
#define MI_PAGE_DISABLE_CACHE(x)
Definition: mm.h:98
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS _Inout_ PLARGE_INTEGER NumberOfBytes
Definition: iotypes.h:998
#define BYTE_OFFSET(Va)
LONGLONG QuadPart
Definition: typedefs.h:112
ULONG PageFrameNumber
Definition: mmtypes.h:109

Referenced by AcpiOsMapMemory(), ConfigCallback(), ConsoleInitHercules(), ConsoleInitVga(), HalpAcpiGetTableFromBios(), HalpAcpiTableCacheInit(), HalpMapPhysicalMemory64(), HDA_FDOStartDevice(), IntVideoPortMapMemory(), MiFindContiguousMemory(), MmMapVideoDisplay(), NdisMMapIoSpace(), NdisMRegisterIoPortRange(), OutTableData(), PciGetAcpiTable(), RamdiskMapPages(), ScrCreate(), ScrLoadFontTable(), ScsiPortGetDeviceBase(), StorPortGetDeviceBase(), StreamClassStartDevice(), TestPhysicalMemorySection(), USBPORT_ParseResources(), and VidInitialize().

◆ MmMapVideoDisplay()

PVOID NTAPI MmMapVideoDisplay ( IN PHYSICAL_ADDRESS  PhysicalAddress,
IN SIZE_T  NumberOfBytes,
IN MEMORY_CACHING_TYPE  CacheType 
)

Definition at line 243 of file iosup.c.

246 {
247  PAGED_CODE();
248 
249  //
250  // Call the real function
251  //
253 }
PVOID NTAPI MmMapIoSpace(IN PHYSICAL_ADDRESS PhysicalAddress, IN SIZE_T NumberOfBytes, IN MEMORY_CACHING_TYPE CacheType)
Definition: iosup.c:47
#define PAGED_CODE()
Definition: video.h:57
_Must_inspect_result_ _In_ PHYSICAL_ADDRESS _In_ PHYSICAL_ADDRESS _In_opt_ PHYSICAL_ADDRESS _In_ MEMORY_CACHING_TYPE CacheType
Definition: mmfuncs.h:214
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS PhysicalAddress
Definition: iotypes.h:1061
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS _Inout_ PLARGE_INTEGER NumberOfBytes
Definition: iotypes.h:998

◆ MmUnmapIoSpace()

VOID NTAPI MmUnmapIoSpace ( IN PVOID  BaseAddress,
IN SIZE_T  NumberOfBytes 
)

Definition at line 193 of file iosup.c.

195 {
196  PFN_NUMBER Pfn;
197  PFN_COUNT PageCount;
198  PMMPTE PointerPte;
199 
200  //
201  // Sanity check
202  //
203  ASSERT(NumberOfBytes != 0);
204 
205  //
206  // Get the page count
207  //
209 
210  //
211  // Get the PTE and PFN
212  //
213  PointerPte = MiAddressToPte(BaseAddress);
214  Pfn = PFN_FROM_PTE(PointerPte);
215 
216  //
217  // Is this an I/O mapping?
218  //
219  if (!MiGetPfnEntry(Pfn))
220  {
221  //
222  // Destroy the PTE
223  //
224  RtlZeroMemory(PointerPte, PageCount * sizeof(MMPTE));
225 
226  //
227  // Blow the TLB
228  //
230  }
231 
232  //
233  // Release the PTEs
234  //
235  MiReleaseSystemPtes(PointerPte, PageCount, 0);
236 }
#define TRUE
Definition: types.h:120
ULONG PFN_COUNT
Definition: mmtypes.h:102
#define MiAddressToPte(x)
Definition: mmx86.c:19
ULONG PFN_NUMBER
Definition: ke.h:8
VOID NTAPI MiReleaseSystemPtes(IN PMMPTE StartingPte, IN ULONG NumberOfPtes, IN MMSYSTEM_PTE_POOL_TYPE SystemPtePoolType)
Definition: syspte.c:275
VOID NTAPI KeFlushEntireTb(IN BOOLEAN Invalid, IN BOOLEAN AllProcessors)
Definition: cpu.c:413
#define ADDRESS_AND_SIZE_TO_SPAN_PAGES(_Va, _Size)
_In_ HANDLE _Outptr_result_bytebuffer_ ViewSize PVOID * BaseAddress
Definition: mmfuncs.h:404
ASSERT((InvokeOnSuccess||InvokeOnError||InvokeOnCancel) ?(CompletionRoutine !=NULL) :TRUE)
FORCEINLINE PMMPFN MiGetPfnEntry(IN PFN_NUMBER Pfn)
Definition: mm.h:940
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS _Inout_ PLARGE_INTEGER NumberOfBytes
Definition: iotypes.h:998
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:261
#define PFN_FROM_PTE(v)
Definition: mm.h:89

Referenced by AcpiOsUnmapMemory(), ConsoleShutdownHercules(), ConsoleShutdownVga(), HalpAcpiGetTable(), HalpAcpiGetTableFromBios(), HalpAcpiTableCacheInit(), HalpUnmapVirtualAddress(), HDA_FDORemoveDevice(), IntVideoPortUnmapMemory(), MiFreeContiguousMemory(), MmUnmapVideoDisplay(), NdisMDeregisterIoPortRange(), NdisMUnmapIoSpace(), OutTableData(), PciGetAcpiTable(), RamdiskUnmapPages(), ScrLoadFontTable(), ScsiPortFreeDeviceBase(), SpiCleanupAfterInit(), StreamClassReleaseResources(), StreamClassStartDevice(), TestPhysicalMemorySection(), and VidInitialize().

◆ MmUnmapVideoDisplay()

VOID NTAPI MmUnmapVideoDisplay ( IN PVOID  BaseAddress,
IN SIZE_T  NumberOfBytes 
)

Definition at line 260 of file iosup.c.

262 {
263  //
264  // Call the real function
265  //
267 }
_In_ HANDLE _Outptr_result_bytebuffer_ ViewSize PVOID * BaseAddress
Definition: mmfuncs.h:404
VOID NTAPI MmUnmapIoSpace(IN PVOID BaseAddress, IN SIZE_T NumberOfBytes)
Definition: iosup.c:193
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS _Inout_ PLARGE_INTEGER NumberOfBytes
Definition: iotypes.h:998

Variable Documentation

◆ MiPlatformCacheAttributes