78 &QueueMiniportHandleInterrupt,
85 QueueMiniportHandleInterrupt =
TRUE;
86 InterruptRecognized =
TRUE;
91 if (QueueMiniportHandleInterrupt)
99 return InterruptRecognized;
256 IN ULONG BaseMapRegistersNeeded,
290 UINT MapRegistersPerBaseRegister = 0;
291 ULONG AvailableMapRegisters;
298 NDIS_DbgPrint(
MAX_TRACE, (
"called: Handle 0x%x, DmaChannel 0x%x, DmaSize 0x%x, BaseMapRegsNeeded: 0x%x, MaxBuffer: 0x%x.\n",
329 ASSERT(MaximumBufferSize > 2);
330 MapRegistersPerBaseRegister = ((MaximumBufferSize-2) / (2*
PAGE_SIZE)) + 2;
356 if(AvailableMapRegisters < MapRegistersPerBaseRegister)
359 MapRegistersPerBaseRegister, AvailableMapRegisters));
379 while(BaseMapRegistersNeeded)
383 BaseMapRegistersNeeded--;
387 NtStatus = AdapterObject->
DmaOperations->AllocateAdapterChannel(
388 AdapterObject,
DeviceObject, MapRegistersPerBaseRegister,
444 ULONG MapRegistersNeeded;
446 NDIS_DbgPrint(
MAX_TRACE, (
"called: Handle 0x%x, Buffer 0x%x, Offset 0x%x, Length 0x%x, WriteToDevice 0x%x\n",
458 NtStatus = AdapterObject->
DmaOperations->AllocateAdapterChannel(AdapterObject,
468 AdapterObject->
DmaOperations->FreeAdapterChannel(AdapterObject);
478 AdapterObject->
DmaOperations->FreeAdapterChannel(AdapterObject);
533 NDIS_DbgPrint(
MAX_TRACE, (
"called: Handle 0x%x, Buffer 0x%x, Offset 0x%x, Length 0x%x, WriteToDevice 0x%x\n",
536 if (!AdapterObject->
DmaOperations->FlushAdapterBuffers(AdapterObject,
548 AdapterObject->
DmaOperations->FreeAdapterChannel(AdapterObject);
620 ReturnedAddress = Adapter->
NdisMiniportBlock.SystemAdapterObject->DmaOperations->MapTransfer(
627 PhysicalAddressArray[LoopCount].PhysicalAddress = ReturnedAddress;
628 PhysicalAddressArray[LoopCount].Length =
Length;
636 *ArraySize = LoopCount;
669 Adapter->
NdisMiniportBlock.SystemAdapterObject->DmaOperations->FlushAdapterBuffers(
710 Interrupt->Miniport->RegisteredInterrupts--;
733 UINT MapRegistersPerBaseRegister;
758 MapRegistersPerBaseRegister);
835 return AdapterObject->
DmaOperations->ReadDmaCounter(AdapterObject);
852 return AdapterObject->
DmaOperations->GetDmaAlignment(AdapterObject);
880 DeviceDesc.
DemandMode = DmaDescription->DemandMode;
885 DeviceDesc.
DmaChannel = DmaDescription->DmaChannel;
887 DeviceDesc.
DmaWidth = DmaDescription->DmaWidth;
888 DeviceDesc.
DmaSpeed = DmaDescription->DmaSpeed;
912 *MiniportDmaHandle = DmaBlock;
970 "SharedInterrupt (%d) InterruptMode (0x%X)\n",
971 InterruptVector, InterruptLevel, SharedInterrupt,
InterruptMode));
981 Interrupt->SharedInterrupt = SharedInterrupt;
986 InterruptLevel, InterruptVector, &DIrql,
1042 memset(&PortAddress, 0,
sizeof(PortAddress));
#define KeGetCurrentIrql()
enum _IO_ALLOCATION_ACTION IO_ALLOCATION_ACTION
PDEVICE_OBJECT PhysicalDeviceObject
#define KeRaiseIrql(irql, oldIrql)
_In_ PKSERVICE_ROUTINE _In_opt_ PVOID _In_opt_ PKSPIN_LOCK _In_ ULONG _In_ KIRQL _In_ KIRQL _In_ KINTERRUPT_MODE InterruptMode
#define STATUS_INSUFFICIENT_RESOURCES
VOID EXPORT NdisImmediateWritePortUlong(IN NDIS_HANDLE WrapperConfigurationContext, IN ULONG Port, IN ULONG Data)
NDIS_MINIPORT_CHARACTERISTICS MiniportCharacteristics
#define KeLowerIrql(oldIrql)
_In_ ULONG _In_ ULONG _In_ ULONG Length
_Must_inspect_result_ _In_ PWDF_DPC_CONFIG _In_ PWDF_OBJECT_ATTRIBUTES _Out_ WDFDPC * Dpc
NDIS_STATUS EXPORT NdisMRegisterDmaChannel(OUT PNDIS_HANDLE MiniportDmaHandle, IN NDIS_HANDLE MiniportAdapterHandle, IN UINT DmaChannel, IN BOOLEAN Dma32BitAddresses, IN PNDIS_DMA_DESCRIPTION DmaDescription, IN ULONG MaximumLength)
VOID NTAPI WRITE_PORT_USHORT(IN PUSHORT Port, IN USHORT Value)
PDMA_ADAPTER NTAPI IoGetDmaAdapter(IN PDEVICE_OBJECT PhysicalDeviceObject, IN PDEVICE_DESCRIPTION DeviceDescription, IN OUT PULONG NumberOfMapRegisters)
#define MmGetMdlVirtualAddress(_Mdl)
#define READ_PORT_UCHAR(p)
_In_ ULONG _In_ PHYSICAL_ADDRESS _Inout_ PULONG AddressSpace
_Must_inspect_result_ _In_ WDFDEVICE _In_ PWDF_INTERRUPT_CONFIG _In_opt_ PWDF_OBJECT_ATTRIBUTES _Out_ WDFINTERRUPT * Interrupt
NDIS_STATUS EXPORT NdisMRegisterIoPortRange(OUT PVOID *PortOffset, IN NDIS_HANDLE MiniportAdapterHandle, IN UINT InitialPort, IN UINT NumberOfPorts)
BOOLEAN NTAPI KeInsertQueueDpc(IN PKDPC Dpc, IN PVOID SystemArgument1, IN PVOID SystemArgument2)
ULONG EXPORT NdisMReadDmaCounter(IN NDIS_HANDLE MiniportDmaHandle)
VOID EXPORT NdisMCompleteDmaTransfer(OUT PNDIS_STATUS Status, IN NDIS_HANDLE MiniportDmaHandle, IN PNDIS_BUFFER Buffer, IN ULONG Offset, IN ULONG Length, IN BOOLEAN WriteToDevice)
_In_ NDIS_HANDLE MiniportAdapterHandle
ULONG NTAPI READ_PORT_ULONG(IN PULONG Port)
VOID EXPORT NdisMUnmapIoSpace(IN NDIS_HANDLE MiniportAdapterHandle, IN PVOID VirtualAddress, IN UINT Length)
VOID NTAPI HandleDeferredProcessing(IN PKDPC Dpc, IN PVOID DeferredContext, IN PVOID SystemArgument1, IN PVOID SystemArgument2)
PADAPTER_OBJECT SystemAdapterObject
NDIS_STATUS EXPORT NdisMInitializeScatterGatherDma(IN NDIS_HANDLE MiniportAdapterHandle, IN BOOLEAN Dma64BitAddresses, IN ULONG MaximumPhysicalMapping)
static const WCHAR Description[]
PVOID NTAPI MmMapIoSpace(IN PHYSICAL_ADDRESS PhysicalAddress, IN SIZE_T NumberOfBytes, IN MEMORY_CACHING_TYPE CacheType)
struct _DMA_ADAPTER * PDMA_ADAPTER
_In_ ULONG _In_ PHYSICAL_ADDRESS _Inout_ PULONG _Out_ PPHYSICAL_ADDRESS TranslatedAddress
LONG NTAPI KeSetEvent(IN PKEVENT Event, IN KPRIORITY Increment, IN BOOLEAN Wait)
NTSTATUS NTAPI KeWaitForSingleObject(IN PVOID Object, IN KWAIT_REASON WaitReason, IN KPROCESSOR_MODE WaitMode, IN BOOLEAN Alertable, IN PLARGE_INTEGER Timeout OPTIONAL)
struct _DMA_OPERATIONS * DmaOperations
VOID EXPORT NdisImmediateWritePortUchar(IN NDIS_HANDLE WrapperConfigurationContext, IN ULONG Port, IN UCHAR Data)
VOID EXPORT NdisAllocateDmaChannel(OUT PNDIS_STATUS Status, OUT PNDIS_HANDLE NdisDmaHandle, IN NDIS_HANDLE NdisAdapterHandle, IN PNDIS_DMA_DESCRIPTION DmaDescription, IN ULONG MaximumLength)
_Must_inspect_result_ _Out_ PNDIS_STATUS _Out_ PNDIS_HANDLE _In_ NDIS_HANDLE WrapperConfigurationContext
#define DEVICE_DESCRIPTION_VERSION
#define GET_LOGICAL_ADAPTER(Handle)
#define NDIS_STATUS_NOT_SUPPORTED
_In_ PDEVICE_OBJECT DeviceObject
VOID EXPORT NdisSetupDmaTransfer(OUT PNDIS_STATUS Status, IN PNDIS_HANDLE NdisDmaHandle, IN PNDIS_BUFFER Buffer, IN ULONG Offset, IN ULONG Length, IN BOOLEAN WriteToDevice)
VOID NTAPI WRITE_PORT_ULONG(IN PULONG Port, IN ULONG Value)
NTSTATUS(* NTAPI)(IN PFILE_FULL_EA_INFORMATION EaBuffer, IN ULONG EaLength, OUT PULONG ErrorOffset)
NTSTATUS NTAPI IoConnectInterrupt(OUT PKINTERRUPT *InterruptObject, IN PKSERVICE_ROUTINE ServiceRoutine, IN PVOID ServiceContext, IN PKSPIN_LOCK SpinLock, IN ULONG Vector, IN KIRQL Irql, IN KIRQL SynchronizeIrql, IN KINTERRUPT_MODE InterruptMode, IN BOOLEAN ShareVector, IN KAFFINITY ProcessorEnableMask, IN BOOLEAN FloatingSave)
VOID EXPORT NdisFreeDmaChannel(IN PNDIS_HANDLE NdisDmaHandle)
NDIS_HANDLE MiniportAdapterContext
VOID EXPORT NdisImmediateReadPortUshort(IN NDIS_HANDLE WrapperConfigurationContext, IN ULONG Port, OUT PUSHORT Data)
VOID EXPORT NdisMSetupDmaTransfer(OUT PNDIS_STATUS Status, IN NDIS_HANDLE MiniportDmaHandle, IN PNDIS_BUFFER Buffer, IN ULONG Offset, IN ULONG Length, IN BOOLEAN WriteToDevice)
VOID EXPORT NdisImmediateWritePortUshort(IN NDIS_HANDLE WrapperConfigurationContext, IN ULONG Port, IN USHORT Data)
PNDIS_MINIPORT_INTERRUPT Interrupt
BOOLEAN NTAPI ServiceRoutine(IN PKINTERRUPT Interrupt, IN PVOID ServiceContext)
FORCEINLINE VOID KeInitializeSpinLock(_Out_ PKSPIN_LOCK SpinLock)
_In_ BOOLEAN Dma64BitAddresses
VOID NTAPI IoDisconnectInterrupt(PKINTERRUPT InterruptObject)
VOID EXPORT NdisMFreeMapRegisters(IN NDIS_HANDLE MiniportAdapterHandle)
VOID EXPORT NdisMapIoSpace(OUT PNDIS_STATUS Status, OUT PVOID *VirtualAddress, IN NDIS_HANDLE NdisAdapterHandle, IN NDIS_PHYSICAL_ADDRESS PhysicalAddress, IN UINT Length)
NDIS_STATUS EXPORT NdisMAllocateMapRegisters(IN NDIS_HANDLE MiniportAdapterHandle, IN UINT DmaChannel, IN NDIS_DMA_SIZE DmaSize, IN ULONG BaseMapRegistersNeeded, IN ULONG MaximumBufferSize)
NTHALAPI ULONG NTAPI HalGetInterruptVector(INTERFACE_TYPE, ULONG, ULONG, ULONG, PKIRQL, PKAFFINITY)
_Must_inspect_result_ _In_ WDFDMATRANSACTION _In_ PFN_WDF_PROGRAM_DMA _In_ WDF_DMA_DIRECTION _In_ PMDL _In_ PVOID VirtualAddress
BOOLEAN Dma32BitAddresses
NDIS_STATUS EXPORT NdisMRegisterInterrupt(OUT PNDIS_MINIPORT_INTERRUPT Interrupt, IN NDIS_HANDLE MiniportAdapterHandle, IN UINT InterruptVector, IN UINT InterruptLevel, IN BOOLEAN RequestIsr, IN BOOLEAN SharedInterrupt, IN NDIS_INTERRUPT_MODE InterruptMode)
_In_opt_ PVOID _In_opt_ PVOID SystemArgument1
BOOLEAN Dma64BitAddresses
_In_ UINT _In_ UINT NumberOfPorts
KINTERRUPT_MODE NDIS_INTERRUPT_MODE
_In_ WDFDMATRANSACTION _In_ size_t MaximumLength
#define NDIS_ATTRIBUTE_BUS_MASTER
NDIS_MINIPORT_BLOCK NdisMiniportBlock
#define NT_SUCCESS(StatCode)
_In_ ULONG _In_ ULONG _In_ ULONG _Out_ PKIRQL _Out_ PKAFFINITY Affinity
_In_ PKSERVICE_ROUTINE _In_opt_ PVOID ServiceContext
#define NDIS_STATUS_SUCCESS
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS PhysicalAddress
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
struct _LOGICAL_ADAPTER * PLOGICAL_ADAPTER
#define WRITE_PORT_UCHAR(p, d)
#define ExAllocatePool(type, size)
#define NDIS_STATUS_RESOURCE_CONFLICT
IO_ALLOCATION_ACTION NTAPI NdisSubordinateMapRegisterCallback(IN PDEVICE_OBJECT DeviceObject, IN PIRP Irp, IN PVOID MapRegisterBase, IN PVOID Context)
BOOLEAN NTAPI HalTranslateBusAddress(IN INTERFACE_TYPE InterfaceType, IN ULONG BusNumber, IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
_In_opt_ PVOID _In_opt_ PVOID _In_opt_ PVOID SystemArgument2
_In_ PSCSI_REQUEST_BLOCK _In_opt_ PVOID _In_ ULONG _In_ BOOLEAN WriteToDevice
_In_ ULONG _In_ ULONG Offset
NTSYSAPI ULONGLONG WINAPI RtlConvertUlongToLargeInteger(ULONG)
VOID EXPORT NdisCompleteDmaTransfer(OUT PNDIS_STATUS Status, IN PNDIS_HANDLE NdisDmaHandle, IN PNDIS_BUFFER Buffer, IN ULONG Offset, IN ULONG Length, IN BOOLEAN WriteToDevice)
_Inout_ struct _IRP _In_ PVOID MapRegisterBase
#define KeFlushIoBuffers(_Mdl, _ReadOperation, _DmaOperation)
#define KeInitializeEvent(pEvt, foo, foo2)
_In_ UINT _In_ UINT _In_ PVOID PortOffset
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
VOID EXPORT NdisImmediateReadPortUchar(IN NDIS_HANDLE WrapperConfigurationContext, IN ULONG Port, OUT PUCHAR Data)
VOID EXPORT NdisMDeregisterDmaChannel(IN NDIS_HANDLE MiniportDmaHandle)
PMAP_REGISTER_ENTRY MapRegisters
VOID NTAPI MmUnmapIoSpace(IN PVOID BaseAddress, IN SIZE_T NumberOfBytes)
#define MmGetMdlByteCount(_Mdl)
PDEVICE_OBJECT DeviceObject
VOID EXPORT NdisMDeregisterIoPortRange(IN NDIS_HANDLE MiniportAdapterHandle, IN UINT InitialPort, IN UINT NumberOfPorts, IN PVOID PortOffset)
#define NDIS_DbgPrint(_t_, _x_)
struct tagContext Context
VOID EXPORT NdisImmediateReadPortUlong(IN NDIS_HANDLE WrapperConfigurationContext, IN ULONG Port, OUT PULONG Data)
INTERFACE_TYPE InterfaceType
ULONG EXPORT NdisMGetDmaAlignment(IN NDIS_HANDLE MiniportAdapterHandle)
#define NDIS_STATUS_RESOURCES
#define RtlZeroMemory(Destination, Length)
NDIS_STATUS EXPORT NdisMMapIoSpace(OUT PVOID *VirtualAddress, IN NDIS_HANDLE MiniportAdapterHandle, IN NDIS_PHYSICAL_ADDRESS PhysicalAddress, IN UINT Length)
PNDIS_MINIPORT_BLOCK Miniport
USHORT NTAPI READ_PORT_USHORT(IN PUSHORT Port)
struct _LARGE_INTEGER::@2269 u
VOID NTAPI KeInitializeDpc(IN PKDPC Dpc, IN PKDEFERRED_ROUTINE DeferredRoutine, IN PVOID DeferredContext)
VOID NTAPI KeClearEvent(IN PKEVENT Event)
VOID EXPORT NdisMCompleteBufferPhysicalMapping(IN NDIS_HANDLE MiniportAdapterHandle, IN PNDIS_BUFFER Buffer, IN ULONG PhysicalMapRegister)
PNDIS_M_DRIVER_BLOCK DriverHandle
NDIS_INTERFACE_TYPE BusType
VOID EXPORT NdisMDeregisterInterrupt(IN PNDIS_MINIPORT_INTERRUPT Interrupt)
IO_ALLOCATION_ACTION NTAPI NdisBusMasterMapRegisterCallback(IN PDEVICE_OBJECT DeviceObject, IN PIRP Irp, IN PVOID MapRegisterBase, IN PVOID Context)
#define NDIS_STATUS_FAILURE
_In_ BOOLEAN _In_ ULONG MaximumPhysicalMapping
VOID EXPORT NdisMStartBufferPhysicalMapping(IN NDIS_HANDLE MiniportAdapterHandle, IN PNDIS_BUFFER Buffer, IN ULONG PhysicalMapRegister, IN BOOLEAN WriteToDevice, OUT PNDIS_PHYSICAL_ADDRESS_UNIT PhysicalAddressArray, OUT PUINT ArraySize)
_In_opt_ PVOID DeferredContext