ReactOS 0.4.15-dev-8241-g63935f8
bootvid.c
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1/*
2 * PROJECT: ReactOS Boot Video Driver for VGA-compatible cards
3 * LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
4 * PURPOSE: Main file
5 * COPYRIGHT: Copyright 2007 Alex Ionescu <alex.ionescu@reactos.org>
6 * Copyright 2019 Hermès Bélusca-Maïto <hermes.belusca-maito@reactos.org>
7 */
8
9#include "precomp.h"
10
11/* PRIVATE FUNCTIONS *********************************************************/
12
13static BOOLEAN
15 _In_ PUSHORT CmdStream)
16{
17 USHORT Cmd;
18 UCHAR Major, Minor;
23 USHORT ShortValue;
24
25 /* First make sure that we have a Command Stream */
26 if (!CmdStream) return TRUE;
27
28 /* Loop as long as we have commands */
29 while (*CmdStream != EOD)
30 {
31 /* Get the next command and its Major and Minor functions */
32 Cmd = *CmdStream++;
33 Major = Cmd & 0xF0;
34 Minor = Cmd & 0x0F;
35
36 /* Check which major function this is */
37 if (Major == INOUT)
38 {
39 /* Check the minor function */
40 if (Minor & IO /* CMD_STREAM_READ */)
41 {
42 /* Check the sub-type */
43 if (Minor & BW /* CMD_STREAM_USHORT */)
44 {
45 /* Get the port and read an USHORT from it */
46 Port = *CmdStream++;
47 ShortValue = __inpw(Port);
48 }
49 else // if (Minor & CMD_STREAM_WRITE)
50 {
51 /* Get the port and read an UCHAR from it */
52 Port = *CmdStream++;
53 Value = __inpb(Port);
54 }
55 }
56 else if (Minor & MULTI /* CMD_STREAM_WRITE_ARRAY */)
57 {
58 /* Check the sub-type */
59 if (Minor & BW /* CMD_STREAM_USHORT */)
60 {
61 /* Get the port and the count of elements */
62 Port = *CmdStream++;
63 Count = *CmdStream++;
64
65 /* Write the USHORT to the port; the buffer is what's in the command stream */
67
68 /* Move past the buffer in the command stream */
69 CmdStream += Count;
70 }
71 else // if (Minor & CMD_STREAM_WRITE)
72 {
73 /* Get the port and the count of elements */
74 Port = *CmdStream++;
75 Count = *CmdStream++;
76
77 /* Loop the command array */
78 for (; Count; --Count, ++CmdStream)
79 {
80 /* Get the UCHAR and write it to the port */
81 Value = (UCHAR)*CmdStream;
83 }
84 }
85 }
86 else if (Minor & BW /* CMD_STREAM_USHORT */)
87 {
88 /* Get the port */
89 Port = *CmdStream++;
90
91 /* Get the USHORT and write it to the port */
92 ShortValue = *CmdStream++;
93 __outpw(Port, ShortValue);
94 }
95 else // if (Minor & CMD_STREAM_WRITE)
96 {
97 /* Get the port */
98 Port = *CmdStream++;
99
100 /* Get the UCHAR and write it to the port */
101 Value = (UCHAR)*CmdStream++;
103 }
104 }
105 else if (Major == METAOUT)
106 {
107 /* Check the minor function. Note these are not flags. */
108 switch (Minor)
109 {
110 case INDXOUT:
111 {
112 /* Get the port, the count of elements and the start index */
113 Port = *CmdStream++;
114 Count = *CmdStream++;
115 Index = (UCHAR)*CmdStream++;
116
117 /* Loop the command array */
118 for (; Count; --Count, ++Index, ++CmdStream)
119 {
120 /* Get the USHORT and write it to the port */
121 ShortValue = (USHORT)Index + ((*CmdStream) << 8);
122 __outpw(Port, ShortValue);
123 }
124 break;
125 }
126
127 case ATCOUT:
128 {
129 /* Get the port, the count of elements and the start index */
130 Port = *CmdStream++;
131 Count = *CmdStream++;
132 Index = (UCHAR)*CmdStream++;
133
134 /* Loop the command array */
135 for (; Count; --Count, ++Index, ++CmdStream)
136 {
137 /* Write the index */
139
140 /* Get the UCHAR and write it to the port */
141 Value = (UCHAR)*CmdStream;
143 }
144 break;
145 }
146
147 case MASKOUT:
148 {
149 /* Get the port */
150 Port = *CmdStream++;
151
152 /* Read the current value and add the stream data */
153 Value = __inpb(Port);
154 Value &= *CmdStream++;
155 Value ^= *CmdStream++;
156
157 /* Write the value */
159 break;
160 }
161
162 default:
163 /* Unknown command, fail */
164 return FALSE;
165 }
166 }
167 else if (Major != NCMD)
168 {
169 /* Unknown major function, fail */
170 return FALSE;
171 }
172 }
173
174 /* If we got here, return success */
175 return TRUE;
176}
177
178static BOOLEAN
180{
181 UCHAR OrgGCAddr, OrgReadMap, OrgBitMask;
182 UCHAR OrgSCAddr, OrgMemMode;
183 UCHAR i;
184
185 /* Remember the original state of the Graphics Controller Address register */
187
188 /*
189 * Write the Read Map register with a known state so we can verify
190 * that it isn't changed after we fool with the Bit Mask. This ensures
191 * that we're dealing with indexed registers, since both the Read Map and
192 * the Bit Mask are addressed at GRAPH_DATA_PORT.
193 */
195
196 /*
197 * If we can't read back the Graphics Address register setting we just
198 * performed, it's not readable and this isn't a VGA.
199 */
201 return FALSE;
202
203 /*
204 * Set the Read Map register to a known state.
205 */
208
209 /* Read it back... it should be the same */
211 {
212 /*
213 * The Read Map setting we just performed can't be read back; not a
214 * VGA. Restore the default Read Map state and fail.
215 */
217 return FALSE;
218 }
219
220 /* Remember the original setting of the Bit Mask register */
222
223 /* Read it back... it should be the same */
225 {
226 /*
227 * The Graphics Address register setting we just made can't be read
228 * back; not a VGA. Restore the default Read Map state and fail.
229 */
232 return FALSE;
233 }
234
235 /* Read the VGA Data Register */
237
238 /*
239 * Set up the initial test mask we'll write to and read from the Bit Mask,
240 * and loop on the bitmasks.
241 */
242 for (i = 0xBB; i; i >>= 1)
243 {
244 /* Write the test mask to the Bit Mask */
246
247 /* Read it back... it should be the same */
249 {
250 /*
251 * The Bit Mask is not properly writable and readable; not a VGA.
252 * Restore the Bit Mask and Read Map to their default states and fail.
253 */
257 return FALSE;
258 }
259 }
260
261 /*
262 * There's something readable at GRAPH_DATA_PORT; now switch back and
263 * make sure that the Read Map register hasn't changed, to verify that
264 * we're dealing with indexed registers.
265 */
267
268 /* Read it back */
270 {
271 /*
272 * The Read Map is not properly writable and readable; not a VGA.
273 * Restore the Bit Mask and Read Map to their default states, in case
274 * this is an EGA, so subsequent writes to the screen aren't garbled.
275 * Then fail.
276 */
280 return FALSE;
281 }
282
283 /*
284 * We've pretty surely verified the existence of the Bit Mask register.
285 * Put the Graphics Controller back to the original state.
286 */
291
292 /*
293 * Now, check for the existence of the Chain4 bit.
294 */
295
296 /*
297 * Remember the original states of the Sequencer Address and Memory Mode
298 * registers.
299 */
302
303 /* Read it back... it should be the same */
305 {
306 /*
307 * Couldn't read back the Sequencer Address register setting
308 * we just performed, fail.
309 */
310 return FALSE;
311 }
312
313 /* Read sequencer Data */
314 OrgMemMode = __inpb(VGA_BASE_IO_PORT + SEQ_DATA_PORT);
315
316 /*
317 * Toggle the Chain4 bit and read back the result. This must be done during
318 * sync reset, since we're changing the chaining state.
319 */
320
321 /* Begin sync reset */
323
324 /* Toggle the Chain4 bit */
327
328 /* Read it back... it should be the same */
329 if (__inpb(VGA_BASE_IO_PORT + SEQ_DATA_PORT) != (OrgMemMode ^ CHAIN4_MASK))
330 {
331 /*
332 * Chain4 bit is not there, not a VGA.
333 * Set text mode default for Memory Mode register.
334 */
336
337 /* End sync reset */
339
340 /* Fail */
341 return FALSE;
342 }
343
344 /*
345 * It's a VGA.
346 */
347
348 /* Restore the original Memory Mode setting */
350
351 /* End sync reset */
353
354 /* Restore the original Sequencer Address setting */
356
357 /* VGA is present! */
358 return TRUE;
359}
360
361/* PUBLIC FUNCTIONS **********************************************************/
362
364NTAPI
366 _In_ BOOLEAN SetMode)
367{
368 ULONG_PTR Context = 0;
370 PHYSICAL_ADDRESS NullAddress = {{0, 0}}, VgaAddress;
374
375 /* Make sure that we have a bus translation function */
377
378 /* Loop trying to find possible VGA base addresses */
379 while (TRUE)
380 {
381 /* Get the VGA Register address */
382 AddressSpace = 1;
386 &Context,
387 TRUE);
388 if (!Result) return FALSE;
389
390 /* See if this is I/O Space, which we need to map */
391 if (!AddressSpace)
392 {
393 /* Map it */
395 }
396 else
397 {
398 /* The base is the translated address, no need to map I/O space */
400 }
401
402 /* Try to see if this is VGA */
404 if (VgaIsPresent())
405 {
406 /* Translate the VGA Memory Address */
407 VgaAddress.LowPart = MEM_VGA;
408 VgaAddress.HighPart = 0;
409 AddressSpace = 0;
413 &Context,
414 FALSE);
415 if (Result) break;
416 }
417 else
418 {
419 /* It's not, so unmap the I/O space if we mapped it */
421 }
422
423 /* Continue trying to see if there's any other address */
424 }
425
426 /* Success! See if this is I/O Space, which we need to map */
427 if (!AddressSpace)
428 {
429 /* Map it */
433 }
434 else
435 {
436 /* The base is the translated address, no need to map I/O space */
438 }
439
440 /* Set the VGA Memory Base */
441 VgaBase = Base;
442
443 /* Now check if we have to set the mode */
444 if (SetMode)
445 {
446 /* Clear the current position */
447 VidpCurrentX = 0;
448 VidpCurrentY = 0;
449
450 /* Reset the display and initialize it */
451 if (HalResetDisplay())
452 {
453 /* The HAL handled the display, re-initialize only the AC registers */
455 }
456 else
457 {
458 /* The HAL didn't handle the display, fully re-initialize the VGA */
460 }
461 }
462
463 /* VGA is ready */
464 return TRUE;
465}
466
467VOID
468NTAPI
470 _In_ BOOLEAN HalReset)
471{
472 /* Clear the current position */
473 VidpCurrentX = 0;
474 VidpCurrentY = 0;
475
476 /* Clear the screen with HAL if we were asked to */
477 if (HalReset)
478 {
479 if (!HalResetDisplay())
480 {
481 /* The HAL didn't handle the display, fully re-initialize the VGA */
483 }
484 }
485
486 /* Always re-initialize the AC registers */
488
489 /* Re-initialize the palette and fill the screen black */
492}
unsigned char BOOLEAN
VOID NTAPI VidSolidColorFill(_In_ ULONG Left, _In_ ULONG Top, _In_ ULONG Right, _In_ ULONG Bottom, _In_ UCHAR Color)
Definition: bootvid.c:261
VOID NTAPI VidResetDisplay(_In_ BOOLEAN HalReset)
Definition: bootvid.c:216
BOOLEAN NTAPI VidInitialize(_In_ BOOLEAN SetMode)
Definition: bootvid.c:183
#define TRUE
Definition: types.h:120
#define FALSE
Definition: types.h:117
ULONG VidpCurrentY
Definition: common.c:17
ULONG VidpCurrentX
Definition: common.c:16
USHORT VGA_640x480[]
Definition: bootdata.c:46
USHORT AT_Initialization[]
Definition: bootdata.c:15
#define ATCOUT
Definition: cmdcnst.h:76
#define NCMD
Definition: cmdcnst.h:63
#define INOUT
Definition: cmdcnst.h:61
#define INDXOUT
Definition: cmdcnst.h:75
#define BW
Definition: cmdcnst.h:70
#define MASKOUT
Definition: cmdcnst.h:77
#define EOD
Definition: cmdcnst.h:60
#define METAOUT
Definition: cmdcnst.h:62
#define MULTI
Definition: cmdcnst.h:69
#define IO
Definition: cmdcnst.h:71
#define START_SYNC_RESET_VALUE
Definition: vga.h:123
#define SEQ_ADDRESS_PORT
Definition: vga.h:69
#define SEQ_ADDR_MASK
Definition: vga.h:145
#define GRAPH_ADDRESS_PORT
Definition: vga.h:81
#define GRAPH_DATA_PORT
Definition: vga.h:82
#define MEM_VGA_SIZE
Definition: vga.h:22
#define BIT_MASK_DEFAULT
Definition: vga.h:167
#define GRAPH_ADDR_MASK
Definition: vga.h:144
#define CHAIN4_MASK
Definition: vga.h:151
#define IND_BIT_MASK
Definition: vga.h:114
#define READ_MAP_DEFAULT
Definition: vga.h:168
#define IND_READ_MAP
Definition: vga.h:111
#define IND_SYNC_RESET
Definition: vga.h:115
#define READ_MAP_TEST_SETTING
Definition: vga.h:159
#define IND_MEMORY_MODE
Definition: vga.h:117
#define VGA_BASE_IO_PORT
Definition: vga.h:38
#define SEQ_DATA_PORT
Definition: vga.h:70
#define END_SYNC_RESET_VALUE
Definition: vga.h:125
#define MEM_VGA
Definition: vga.h:21
#define MEMORY_MODE_TEXT_DEFAULT
Definition: vga.h:166
#define InitializePalette()
Definition: precomp.h:77
#define ULONG_PTR
Definition: config.h:101
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
VOID NTAPI WRITE_PORT_BUFFER_USHORT(IN PUSHORT Port, IN PUSHORT Buffer, IN ULONG Count)
Definition: portio.c:87
CPPORT Port[4]
Definition: headless.c:35
static BOOLEAN VgaIsPresent(VOID)
Definition: bootvid.c:179
static BOOLEAN VgaInterpretCmdStream(_In_ PUSHORT CmdStream)
Definition: bootvid.c:14
VOID NTAPI MmUnmapIoSpace(IN PVOID BaseAddress, IN SIZE_T NumberOfBytes)
Definition: iosup.c:193
PVOID NTAPI MmMapIoSpace(IN PHYSICAL_ADDRESS PhysicalAddress, IN SIZE_T NumberOfBytes, IN MEMORY_CACHING_TYPE CacheType)
Definition: iosup.c:47
#define _In_
Definition: ms_sal.h:308
#define HalFindBusAddressTranslation
Definition: halfuncs.h:44
#define HalResetDisplay
Definition: halfuncs.h:45
_In_opt_ ULONG Base
Definition: rtlfuncs.h:2439
int Count
Definition: noreturn.cpp:7
#define SCREEN_WIDTH
Definition: pc98video.c:27
#define SCREEN_HEIGHT
Definition: pc98video.c:28
ULONG_PTR VgaRegisterBase
Definition: vga.c:68
#define __inpb(Port)
Definition: pc.h:16
#define __outpw(Port, Value)
Definition: pc.h:25
ULONG_PTR VgaBase
Definition: vga.c:69
#define __outpb(Port, Value)
Definition: pc.h:22
#define __inpw(Port)
Definition: pc.h:19
unsigned short USHORT
Definition: pedump.c:61
@ Cmd
Definition: sacdrv.h:278
#define BV_COLOR_BLACK
Definition: display.h:15
#define NTAPI
Definition: typedefs.h:36
uint16_t * PUSHORT
Definition: typedefs.h:56
uint32_t ULONG_PTR
Definition: typedefs.h:65
uint32_t ULONG
Definition: typedefs.h:59
ULONG LowPart
Definition: typedefs.h:106
_In_ WDFCOLLECTION _In_ ULONG Index
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:413
_At_(*)(_In_ PWSK_CLIENT Client, _In_opt_ PUNICODE_STRING NodeName, _In_opt_ PUNICODE_STRING ServiceName, _In_opt_ ULONG NameSpace, _In_opt_ GUID *Provider, _In_opt_ PADDRINFOEXW Hints, _Outptr_ PADDRINFOEXW *Result, _In_opt_ PEPROCESS OwningProcess, _In_opt_ PETHREAD OwningThread, _Inout_ PIRP Irp Result)(Mem)) NTSTATUS(WSKAPI *PFN_WSK_GET_ADDRESS_INFO
Definition: wsk.h:409
_Out_opt_ PULONG Minor
Definition: cmfuncs.h:44
_In_ ULONG _In_ PHYSICAL_ADDRESS _Inout_ PULONG _Out_ PPHYSICAL_ADDRESS TranslatedAddress
Definition: iofuncs.h:2275
_In_ ULONG _In_ PHYSICAL_ADDRESS _Inout_ PULONG AddressSpace
Definition: iofuncs.h:2274
@ MmNonCached
Definition: mmtypes.h:129
unsigned char UCHAR
Definition: xmlstorage.h:181