ReactOS 0.4.17-dev-116-ga4b6fe9
fdo.c
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1/*
2 * PROJECT: PCI IDE bus driver extension
3 * LICENSE: See COPYING in the top level directory
4 * PURPOSE: ATA controller FDO dispatch routines
5 * COPYRIGHT: Copyright 2005 Hervé Poussineau <hpoussin@reactos.org>
6 * Copyright 2023 Dmitry Borisov <di.sean@protonmail.com>
7 */
8
9/* INCLUDES *******************************************************************/
10
11#include "pciidex.h"
12
13/* FUNCTIONS ******************************************************************/
14
15static
17VOID
19 _In_ PATA_CONTROLLER Controller)
20{
22
23 KeAcquireSpinLock(&Controller->Lock, &OldIrql);
24 Controller->Start(Controller);
25 KeReleaseSpinLock(&Controller->Lock, OldIrql);
26}
27
28static
30VOID
32 _In_ PATA_CONTROLLER Controller)
33{
35
36 KeAcquireSpinLock(&Controller->Lock, &OldIrql);
37 Controller->Stop(Controller);
38 KeReleaseSpinLock(&Controller->Lock, OldIrql);
39}
40
41extern
42VOID
45
46CODE_SEG("PAGE")
49 _In_ PVOID ChannelContext,
50 _In_ BOOLEAN Attach)
51{
52 PCHANNEL_DATA_COMMON ChanData = ChannelContext;
53 PATA_CONTROLLER Controller = ChanData->Controller;
54
55 PAGED_CODE();
56
57 return Controller->AttachChannel(ChanData, Attach);
58}
59
61VOID
63 _In_ PVOID ChannelContext,
65{
66 PCHANNEL_DATA_COMMON ChanData = ChannelContext;
67 PATA_CONTROLLER Controller = ChanData->Controller;
70
71 if (Controller->Flags & CTRL_FLAG_IS_AHCI)
72 InterruptObject = Controller->InterruptObject;
73 else
76
78 ChanData->EnableInterrupts(ChanData, Enable);
80}
81
82VOID
84 _In_ PVOID ChannelContext,
86{
87 PCHANNEL_DATA_COMMON ChanData = ChannelContext;
88 PATA_CONTROLLER Controller = ChanData->Controller;
90 ULONG i;
91 BOOLEAN DiscoveredNewDevice = FALSE;
92
93 for (i = 0; i < ATA_MAX_DEVICE; ++i)
94 {
96
97 if (!Device)
98 continue;
99
100 if (Device->IsNewDevice)
101 DiscoveredNewDevice = TRUE;
102
103 /* Apply the channel limit */
104 Device->SupportedModes &= ChanData->Current.TransferModeSupported;
105
106 if ((ChanData->ChanInfo & CHANNEL_FLAG_NO_ATAPI_DMA) && !Device->IsFixedDisk)
107 Device->SupportedModes &= PIO_ALL;
108
109 /*
110 * If we are booting in minimal safe mode we disable DMA for ATAPI devices
111 * to improve system stability.
112 */
113 if (InitSafeBootMode == 1)
114 {
115 if (!(ChanData->ChanInfo & CHANNEL_FLAG_PIO_VIA_DMA) && !Device->IsFixedDisk)
116 Device->SupportedModes &= PIO_ALL;
117 }
118
119 /* Set initial values for mode selection: Find the fastest supported PIO and DMA mode */
120 if (!_BitScanReverse(&Device->DmaMode, Device->SupportedModes & ~PIO_ALL))
121 Device->DmaMode = PIO_MODE(0);
122 NT_VERIFY(_BitScanReverse(&Device->PioMode, Device->SupportedModes & PIO_ALL));
123 }
124
125 KeAcquireSpinLock(&Controller->Lock, &OldIrql);
126
127 /*
128 * _GTF should be executed after _STM has been evaluated,
129 * because it is expected that ACPI BIOS will use the identity data buffers
130 * to construct the list of ATA commands to the drive.
131 *
132 * Therefore for any new device we have to evaluate a dummy _STM
133 * when the whole configuration of the channel's transfer timings
134 * is done at the controller minidriver.
135 */
136 if (DiscoveredNewDevice && (ChanData->ChanInfo & CHANNEL_FLAG_HAS_ACPI_GTM))
137 {
138 PCHANNEL_DATA_PATA PataData = ChannelContext;
139
140 /* Evaluate _STM */
141 AtaAcpiSetTimingMode(PataData->PdoExt->Common.Self,
142 &PataData->CurrentTimingMode,
143 DeviceList[0] ? DeviceList[0]->IdentifyDeviceData : NULL,
144 DeviceList[1] ? DeviceList[1]->IdentifyDeviceData : NULL);
145 }
146
147 /* Set the PATA transfer timings */
148 ChanData->SetTransferMode(Controller, ChanData->Channel, DeviceList);
149
150 KeReleaseSpinLock(&Controller->Lock, OldIrql);
151}
152
153CODE_SEG("PAGE")
154VOID
156 _In_ PVOID ChannelContext,
158 _In_ PIDENTIFY_DEVICE_DATA IdentifyDeviceData)
159{
160 PCHANNEL_DATA_COMMON ChanData = ChannelContext;
161 PATA_CONTROLLER Controller = ChanData->Controller;
162
163 PAGED_CODE();
164
165 if (!(Controller->Flags & CTRL_FLAG_SATA_HBA_ACPI))
166 return;
167
168 AtaAcpiSetDeviceData(DeviceObject, IdentifyDeviceData);
169}
170
171CODE_SEG("PAGE")
172PVOID
174 _In_ PVOID ChannelContext,
176{
177 PCHANNEL_DATA_COMMON ChanData = ChannelContext;
178 PATA_CONTROLLER Controller = ChanData->Controller;
179
180 PAGED_CODE();
181
182 if ((Controller->Flags & CTRL_FLAG_SATA_HBA_ACPI) ||
184 {
186 }
187
188 return NULL;
189}
190
193 _In_ PVOID ChannelContext)
194{
195 PCHANNEL_DATA_COMMON ChanData = ChannelContext;
196 PATA_CONTROLLER Controller = ChanData->Controller;
197
198 PAGED_CODE();
199
200 if (Controller->Flags & CTRL_FLAG_IS_AHCI)
201 return AtaAhciDowngradeInterfaceSpeed(ChannelContext);
202
203 /* Optionally, implement a SATA framework at some point in the future */
204 return FALSE;
205}
206
207VOID
209 _In_ PVOID ChannelContext,
210 _In_ BOOLEAN DisableInterrupts)
211{
212 PCHANNEL_DATA_COMMON ChanData = ChannelContext;
213
215
216 ChanData->ActiveSlotsBitmap = 0;
217 ChanData->ActiveQueuedSlotsBitmap = 0;
218
219 /* Disable and clear pending interrupts */
220 if (DisableInterrupts)
221 {
222 ChanData->EnableInterrupts(ChanData, FALSE);
223
224#if DBG
225 if (ChanData->Controller->Flags & CTRL_FLAG_IS_AHCI)
226 {
227 PVOID IoBase = ((PCHANNEL_DATA_AHCI)ChanData)->IoBase;
228
229 DbgPrint("PxIS 0x%08lX\n", AHCI_PORT_READ(IoBase, PxInterruptStatus));
230 DbgPrint("PxIE 0x%08lX\n", AHCI_PORT_READ(IoBase, PxInterruptEnable));
231 DbgPrint("PxCMD 0x%08lX\n", AHCI_PORT_READ(IoBase, PxCmdStatus));
232 DbgPrint("PxTFD 0x%08lX\n", AHCI_PORT_READ(IoBase, PxTaskFileData));
233 DbgPrint("PxSIG 0x%08lX\n", AHCI_PORT_READ(IoBase, PxSignature));
234 DbgPrint("PxSSTS 0x%08lX\n", AHCI_PORT_READ(IoBase, PxSataStatus));
235 DbgPrint("PxSCTL 0x%08lX\n", AHCI_PORT_READ(IoBase, PxSataControl));
236 DbgPrint("PxSERR 0x%08lX\n", AHCI_PORT_READ(IoBase, PxSataError));
237 DbgPrint("PxSACT 0x%08lX\n", AHCI_PORT_READ(IoBase, PxSataActive));
238 DbgPrint("PxCI 0x%08lX\n", AHCI_PORT_READ(IoBase, PxCommandIssue));
239 DbgPrint("PxSNTF 0x%08lX\n", AHCI_PORT_READ(IoBase, PxSataNotification));
240 DbgPrint("PxFBS 0x%08lX\n", AHCI_PORT_READ(IoBase, PxFisSwitchingControl));
241 DbgPrint("PxDEVSLP 0x%08lX\n", AHCI_PORT_READ(IoBase, PxDeviceSleep));
242 }
243#endif
244 }
245}
246
247CODE_SEG("PAGE")
248PVOID
250 _In_ PATA_CONTROLLER Controller,
252 _In_ ULONG MinimumIoLength)
253{
254 PAGED_CODE();
255
256 if (!(Controller->AccessRange[Index].Flags & RANGE_IS_VALID))
257 return NULL;
258
259 /* Validate the BAR length */
260 if (MinimumIoLength != 0)
261 {
262 if (Controller->AccessRange[Index].Length < MinimumIoLength)
263 {
264 ERR("%04X:%04X.%02X: Unexpected PCI BAR #%lu length 0x%lx, minimum required 0x%lx\n",
265 Controller->Pci.VendorID,
266 Controller->Pci.DeviceID,
267 Controller->Pci.RevisionID,
268 Index,
269 Controller->AccessRange[Index].Length,
270 MinimumIoLength);
271 return NULL;
272 }
273 }
274
275 if ((Controller->AccessRange[Index].Flags & RANGE_IS_MEMORY) &&
276 !(Controller->AccessRange[Index].Flags & RANGE_IS_MAPPED))
277 {
279
280 Controller->AccessRange[Index].Flags |= RANGE_IS_MAPPED;
281
282 PhysicalAddress.QuadPart = (ULONG_PTR)Controller->AccessRange[Index].IoBase;
283 Controller->AccessRange[Index].IoBase = MmMapIoSpace(PhysicalAddress,
284 Controller->AccessRange[Index].Length,
286 }
287
288 return Controller->AccessRange[Index].IoBase;
289}
290
291static
292CODE_SEG("PAGE")
295 _In_ PPCI_COMMON_HEADER PciData,
297{
298 PAGED_CODE();
299
300 for (; *Bar < PCI_TYPE0_ADDRESSES; (*Bar)++)
301 {
302 ULONG IoBase = PciData->u.type0.BaseAddresses[*Bar];
303
304 if (IoBase & PCI_ADDRESS_IO_SPACE)
305 IoBase &= ~PCI_ADDRESS_IO_SPACE;
306 else
308
309 /* Look for a valid BAR */
310 if (IoBase == 0)
311 continue;
312
313 return TRUE;
314 }
315
316 return FALSE;
317}
318
319static
320CODE_SEG("PAGE")
321VOID
323 _In_ PATA_CONTROLLER Controller,
325 _In_ PPCI_COMMON_HEADER PciData)
326{
327 ULONG i, Bar;
328
329 PAGED_CODE();
330
332 return;
333
334 for (i = 0; i < ResourcesTranslated->List[0].PartialResourceList.Count; ++i)
335 {
337
338 Desc = &ResourcesTranslated->List[0].PartialResourceList.PartialDescriptors[i];
339 if (Desc->Type == CmResourceTypeInterrupt)
340 {
341 RtlCopyMemory(&Controller->InterruptDesc, Desc, sizeof(*Desc));
342 break;
343 }
344 }
345
346 for (i = 0, Bar = 0; i < ResourcesTranslated->List[0].PartialResourceList.Count; ++i)
347 {
349 ULONG CurrBar, NextBar;
350
351 Desc = &ResourcesTranslated->List[0].PartialResourceList.PartialDescriptors[i];
352 if ((Desc->Type != CmResourceTypePort) && (Desc->Type != CmResourceTypeMemory))
353 continue;
354
355 if (!AtaCtrlPciGetNextBarIndex(PciData, &Bar))
356 break;
357
358 CurrBar = PciData->u.type0.BaseAddresses[Bar];
359 if (Bar < (PCI_TYPE0_ADDRESSES - 1))
360 NextBar = PciData->u.type0.BaseAddresses[Bar + 1];
361 else
362 NextBar = 0;
363
364 if (CurrBar & PCI_ADDRESS_IO_SPACE)
365 {
366 if (Desc->Type != CmResourceTypePort)
367 continue;
368
369 if (Desc->u.Port.Start.QuadPart != (CurrBar & PCI_ADDRESS_IO_ADDRESS_MASK))
370 continue;
371
372 INFO("BAR[%lu]: I/O %I64X Len %lX\n",
373 Bar, Desc->u.Port.Start.QuadPart, Desc->u.Port.Length);
374 Controller->AccessRange[Bar].Flags |= RANGE_IS_VALID;
375 Controller->AccessRange[Bar].IoBase = (PVOID)(ULONG_PTR)Desc->u.Port.Start.QuadPart;
376 Controller->AccessRange[Bar].Length = Desc->u.Port.Length;
377 }
378 else
379 {
380 if (Desc->Type != CmResourceTypeMemory)
381 continue;
382
383 if (Desc->u.Memory.Start.LowPart != (CurrBar & PCI_ADDRESS_MEMORY_ADDRESS_MASK))
384 continue;
385
387 {
388 if (Desc->u.Memory.Start.HighPart != NextBar)
389 continue;
390 }
391 else
392 {
393 if (Desc->u.Memory.Start.HighPart != 0)
394 continue;
395 }
396
397 INFO("BAR[%lu]: MEM %I64X Len %lX\n",
398 Bar, Desc->u.Memory.Start.QuadPart, Desc->u.Memory.Length);
399 Controller->AccessRange[Bar].Flags |= RANGE_IS_VALID | RANGE_IS_MEMORY;
400 Controller->AccessRange[Bar].IoBase = (PVOID)(ULONG_PTR)Desc->u.Memory.Start.QuadPart;
401 Controller->AccessRange[Bar].Length = Desc->u.Memory.Length;
402 }
403
404 ++Bar;
405 }
406}
407
408static
409CODE_SEG("PAGE")
410VOID
412 _Out_ PATA_CONTROLLER Controller,
413 _In_ PPCI_COMMON_HEADER PciData)
414{
415 PAGED_CODE();
416
417 Controller->Pci.VendorID = PciData->VendorID;
418 Controller->Pci.DeviceID = PciData->DeviceID;
419 Controller->Pci.Command = PciData->Command;
420 Controller->Pci.RevisionID = PciData->RevisionID;
421 Controller->Pci.ProgIf = PciData->ProgIf;
422 Controller->Pci.SubClass = PciData->SubClass;
423 Controller->Pci.BaseClass = PciData->BaseClass;
424 Controller->Pci.CacheLineSize = PciData->CacheLineSize;
425 Controller->Pci.SubVendorID = PciData->u.type0.SubVendorID;
426 Controller->Pci.SubSystemID = PciData->u.type0.SubSystemID;
427}
428
429static
430CODE_SEG("PAGE")
435{
436 PATA_CONTROLLER Controller = &FdoExt->Controller;
438 PPCI_COMMON_HEADER PciData = (PPCI_COMMON_HEADER)Buffer; // Partial PCI header
440
441 PAGED_CODE();
442
443 BytesRead = Controller->GetBusData(Controller->BusInterfaceContext,
445 Buffer,
446 0,
447 sizeof(Buffer));
448 if (BytesRead != sizeof(Buffer))
450
451 AtaCtrlPciSaveData(Controller, PciData);
453
454 return STATUS_SUCCESS;
455}
456
457CODE_SEG("PAGE")
460 _In_ PVOID ControllerContext,
462{
463 PFDO_DEVICE_EXTENSION FdoExt = ControllerContext;
464 PATA_CONTROLLER Controller = &FdoExt->Controller;
466
467 PAGED_CODE();
468
469 Controller->Flags &= CTRL_FLAG_NON_PNP;
470 Controller->Flags |= CTRL_FLAG_NATIVE_PCI;
471 Controller->QueueDepth = 1; // PATA_CHANNEL_SLOT
474 Controller->FreeResources = NULL;
475 Controller->Start = NULL;
476 Controller->Stop = NULL;
477 Controller->ChannelEnableBits = NULL;
478
479#if defined(ATA_DETECT_LEGACY_DEVICES)
480 if (Controller->Flags & CTRL_FLAG_NON_PNP)
481 {
483 }
484 else
485#endif
486 {
488 if (!NT_SUCCESS(Status))
489 {
490 ERR("Failed to collect PCI information 0x%lx\n", Status);
491 return Status;
492 }
493
494 INFO("Starting controller %04X:%04X.%02X-%04X.%04X-%02X.%02X.%02X\n",
495 Controller->Pci.VendorID,
496 Controller->Pci.DeviceID,
497 Controller->Pci.RevisionID,
498 Controller->Pci.SubVendorID,
499 Controller->Pci.SubSystemID,
500 Controller->Pci.BaseClass,
501 Controller->Pci.SubClass,
502 Controller->Pci.ProgIf);
503
505 if (Status == STATUS_NO_MATCH)
507 }
508 if (!NT_SUCCESS(Status))
509 {
510 ERR("Failed to match ATA controller with status %lx\n", Status);
511 return Status;
512 }
513
514 if (Controller->Start)
515 AtaCtrlCallStartController(Controller);
516
517 return STATUS_SUCCESS;
518}
519
520static
521CODE_SEG("PAGE")
522VOID
525{
526 PATA_CONTROLLER Controller = &FdoExtension->Controller;
527 ULONG i;
528
529 PAGED_CODE();
530
531 if (Controller->Stop)
532 AtaCtrlCallStopController(Controller);
533
534 if (Controller->FreeResources)
535 Controller->FreeResources(Controller);
536
537 Controller->InterruptObject = NULL;
538
539 for (i = 0; i < RTL_NUMBER_OF(Controller->AccessRange); ++i)
540 {
541 if ((Controller->AccessRange[i].Flags & RANGE_IS_VALID) &&
542 (Controller->AccessRange[i].Flags & RANGE_IS_MAPPED))
543 {
544 MmUnmapIoSpace(Controller->AccessRange[i].IoBase, Controller->AccessRange[i].Length);
545 }
546
547 Controller->AccessRange[i].Flags = 0;
548 }
549
550 if (Controller->ChanDataBlock)
551 {
553 Controller->ChanDataBlock = NULL;
554 }
555
556 if (Controller->HwSyncObject)
557 {
558 IoDeleteController(Controller->HwSyncObject);
559 Controller->HwSyncObject = NULL;
560 }
561
562 if (Controller->HwExt)
563 {
564 ExFreePoolWithTag(Controller->HwExt, TAG_PCIIDEX);
565 Controller->HwExt = NULL;
566 }
567
568 Controller->InterruptDesc.Type = 0;
569}
570
571static
572CODE_SEG("PAGE")
576{
577 PAGED_CODE();
578
580
581 return STATUS_SUCCESS;
582}
583
584CODE_SEG("PAGE")
585VOID
587 _In_ PVOID ControllerContext)
588{
589 PFDO_DEVICE_EXTENSION FdoExt = ControllerContext;
590 PLIST_ENTRY ListEntry;
591
592 PAGED_CODE();
593
595
596 for (ListEntry = FdoExt->PdoListHead.Flink;
597 ListEntry != &FdoExt->PdoListHead;
598 ListEntry = ListEntry->Flink)
599 {
601
602 PdoExt = CONTAINING_RECORD(ListEntry, PDO_DEVICE_EXTENSION, ListEntry);
603
606 }
607
609
611}
612
613static
614CODE_SEG("PAGE")
618 _In_ ULONG ChannelNumber)
619{
622 WCHAR DeviceNameBuffer[sizeof("\\Device\\Ide\\PciIde99999Channel99-FFF")];
626 static ULONG PdoNumber = 0;
627
628 PAGED_CODE();
629
630 Status = RtlStringCbPrintfW(DeviceNameBuffer,
631 sizeof(DeviceNameBuffer),
632 L"\\Device\\Ide\\PciIde%luChannel%lu-%lx",
633 FdoExtension->ControllerNumber,
634 ChannelNumber,
635 PdoNumber++);
637 RtlInitUnicodeString(&DeviceName, DeviceNameBuffer);
638
639 Status = IoCreateDevice(FdoExtension->Common.Self->DriverObject,
640 sizeof(*PdoExtension),
641 &DeviceName,
644 FALSE,
645 &Pdo);
646 if (!NT_SUCCESS(Status))
647 {
648 ERR("Failed to create PDO 0x%lx\n", Status);
649 return NULL;
650 }
651
652 INFO("Created device object %p '%wZ'\n", Pdo, &DeviceName);
653
654 /* DMA buffers alignment */
655 Alignment = FdoExtension->Controller.AlignmentRequirement;
656 Alignment = max(Alignment, FdoExtension->Common.Self->AlignmentRequirement);
658 Pdo->AlignmentRequirement = Alignment;
659
660 PdoExtension = Pdo->DeviceExtension;
661
663 PdoExtension->Common.Self = Pdo;
664 PdoExtension->Common.FdoExt = FdoExtension;
665 IoInitializeRemoveLock(&PdoExtension->Common.RemoveLock, TAG_PCIIDEX, 0, 0);
666
667 PdoExtension->Channel = ChannelNumber;
668 PdoExtension->ChanData = FdoExtension->Controller.Channels[ChannelNumber];
669 ASSERT(PdoExtension->ChanData);
670 PdoExtension->ChanData->PdoExt = PdoExtension;
671
672 Pdo->Flags &= ~DO_DEVICE_INITIALIZING;
673 return PdoExtension;
674}
675
676CODE_SEG("PAGE")
679 _In_ PATA_CONTROLLER Controller,
681{
682 PAGED_CODE();
683
684 if (Controller->Flags & CTRL_FLAG_IS_AHCI)
685 return ChannelStateUnknown;
686
687 return PciIdeGetChannelState(Controller, Channel);
688}
689
690static
691CODE_SEG("PAGE")
695 _In_ PIRP Irp)
696{
697 PATA_CONTROLLER Controller = &FdoExt->Controller;
698 PDEVICE_RELATIONS DeviceRelations;
699 PLIST_ENTRY ListEntry;
700 ULONG i, Size, ChannelBitmap = 0;
701
702 PAGED_CODE();
703
704 /*
705 * Preallocate the device relations structure we need for the QBR IRP,
706 * because we don't want to be in a state where allocation fails.
707 */
710 if (!DeviceRelations)
712
713 ExAcquireFastMutex(&FdoExt->PdoListSyncMutex);
714
715 /* Check existing ports */
716 for (ListEntry = FdoExt->PdoListHead.Flink;
717 ListEntry != &FdoExt->PdoListHead;
718 ListEntry = ListEntry->Flink)
719 {
721 IDE_CHANNEL_STATE ChannelState;
723
724 PdoExt = CONTAINING_RECORD(ListEntry, PDO_DEVICE_EXTENSION, ListEntry);
725 Channel = PdoExt->Channel;
726
727 ChannelBitmap |= 1 << Channel;
728
729 ChannelState = PciIdeXGetChannelState(Controller, Channel);
730 if (ChannelState == ChannelDisabled)
731 {
732 INFO("%04X:%04X.%02X: Skip disabled channel %lu\n",
733 Controller->Pci.VendorID,
734 Controller->Pci.DeviceID,
735 Controller->Pci.RevisionID,
736 Channel);
737
739 continue;
740 }
741 }
742
743 /* Enumerate the remaining ports */
744 ChannelBitmap = Controller->ChannelBitmap & ~ChannelBitmap;
745 for (i = 0; i < MAX_CHANNELS; ++i)
746 {
748 IDE_CHANNEL_STATE ChannelState;
749
750 if (!(ChannelBitmap & (1 << i)))
751 continue;
752
753 ChannelState = PciIdeXGetChannelState(Controller, i);
754 if (ChannelState == ChannelDisabled)
755 {
756 INFO("%04X:%04X.%02X: Skip disabled channel %lu\n",
757 Controller->Pci.VendorID,
758 Controller->Pci.DeviceID,
759 Controller->Pci.RevisionID,
760 i);
761 continue;
762 }
763
764 /* Need to create a PDO */
766 if (!PdoExt)
767 {
768 /* We are out of memory, trying to continue process the QBR IRP anyway */
769 continue;
770 }
771
772 InsertTailList(&FdoExt->PdoListHead, &PdoExt->ListEntry);
773 }
774
775 /* Initialize the device relations structure */
776 DeviceRelations->Count = 0;
777 for (ListEntry = FdoExt->PdoListHead.Flink;
778 ListEntry != &FdoExt->PdoListHead;
779 ListEntry = ListEntry->Flink)
780 {
782
783 PdoExt = CONTAINING_RECORD(ListEntry, PDO_DEVICE_EXTENSION, ListEntry);
784 if (PdoExt->Flags & PDO_FLAG_NOT_PRESENT)
785 {
787 continue;
788 }
789
790 DeviceRelations->Objects[DeviceRelations->Count++] = PdoExt->Common.Self;
792 }
793
794 ExReleaseFastMutex(&FdoExt->PdoListSyncMutex);
795
796 Irp->IoStatus.Information = (ULONG_PTR)DeviceRelations;
797 return STATUS_SUCCESS;
798}
799
800static
801CODE_SEG("PAGE")
805 _In_ PIO_STACK_LOCATION IoStack)
806{
807 PAGED_CODE();
808
809 if (IsEqualGUIDAligned(IoStack->Parameters.QueryInterface.InterfaceType,
810 &GUID_TRANSLATOR_INTERFACE_STANDARD))
811 {
812 PATA_CONTROLLER Controller = &FdoExtension->Controller;
813 PTRANSLATOR_INTERFACE TranslatorInterface;
814 CM_RESOURCE_TYPE ResourceType;
816
817 /* In native mode the IDE controller does not use any legacy interrupt resources */
818 if (Controller->Flags & (CTRL_FLAG_NATIVE_PCI | CTRL_FLAG_NON_PNP))
820
821 if (IoStack->Parameters.QueryInterface.Size < sizeof(*TranslatorInterface))
823
824 ResourceType = PtrToUlong(IoStack->Parameters.QueryInterface.InterfaceSpecificData);
825 if (ResourceType != CmResourceTypeInterrupt)
827
828 TranslatorInterface = (PTRANSLATOR_INTERFACE)IoStack->Parameters.QueryInterface.Interface;
829
831 0,
833 sizeof(*TranslatorInterface),
834 IoStack->Parameters.QueryInterface.Version,
835 TranslatorInterface,
836 &BusNumber);
837 }
838
840}
841
842static
843CODE_SEG("PAGE")
847 _In_ PIRP Irp,
848 _In_ PIO_STACK_LOCATION IoStack)
849{
851
852 PAGED_CODE();
853
854 switch (IoStack->Parameters.QueryId.IdType)
855 {
858 {
859 if (!NT_VERIFY(IoForwardIrpSynchronously(FdoExt->Common.LowerDeviceObject, Irp)))
860 {
862 break;
863 }
864 Status = Irp->IoStatus.Status;
865
866 /*
867 * We provide a generic identifier necessary to install the device
868 * in case our FDO is root-enumerated device.
869 */
871 {
872 static const WCHAR IdeGenericId[] = L"*PNP0600\0"; // multi-string
874
876 if (!Buffer)
877 {
879 break;
880 }
881 RtlCopyMemory(Buffer, IdeGenericId, sizeof(IdeGenericId));
882
883 INFO("Hardware/Compatible ID: '%S'\n", Buffer);
884
885 Irp->IoStatus.Information = (ULONG_PTR)Buffer;
887 }
888 break;
889 }
890
891 default:
892 {
894 Status = IoCallDriver(FdoExt->Common.LowerDeviceObject, Irp);
895
896 IoReleaseRemoveLock(&FdoExt->Common.RemoveLock, Irp);
897 return Status;
898 }
899 }
900
901 Irp->IoStatus.Status = Status;
903
904 IoReleaseRemoveLock(&FdoExt->Common.RemoveLock, Irp);
905 return Status;
906}
907
908CODE_SEG("PAGE")
913{
914 PIO_STACK_LOCATION IoStack;
916
917 PAGED_CODE();
918
919 Status = IoAcquireRemoveLock(&FdoExtension->Common.RemoveLock, Irp);
920 if (!NT_SUCCESS(Status))
921 {
922 Irp->IoStatus.Status = Status;
924
925 return Status;
926 }
927
929 switch (IoStack->MinorFunction)
930 {
932 {
933 if (!NT_VERIFY(IoForwardIrpSynchronously(FdoExtension->Common.LowerDeviceObject, Irp)))
934 {
936 goto CompleteIrp;
937 }
938 Status = Irp->IoStatus.Status;
939 if (!NT_SUCCESS(Status))
940 goto CompleteIrp;
941
943 IoStack->Parameters.
944 StartDevice.AllocatedResourcesTranslated);
945 goto CompleteIrp;
946 }
947
949 {
951 break;
952 }
953
955 {
956 IoReleaseRemoveLockAndWait(&FdoExtension->Common.RemoveLock, Irp);
957
959
960 Irp->IoStatus.Status = STATUS_SUCCESS;
962 Status = IoCallDriver(FdoExtension->Common.LowerDeviceObject, Irp);
963
964 IoDetachDevice(FdoExtension->Common.LowerDeviceObject);
965 IoDeleteDevice(FdoExtension->Common.Self);
966 return Status;
967 }
968
970 {
972 break;
973 }
974
976 {
977 if (IoStack->Parameters.QueryDeviceRelations.Type != BusRelations)
978 break;
979
981 if (!NT_SUCCESS(Status))
982 goto CompleteIrp;
983
984 Irp->IoStatus.Status = Status;
985 break;
986 }
987
989 {
991 break;
992 }
993
995 {
998 break;
999
1000 Irp->IoStatus.Status = Status;
1001 break;
1002 }
1003
1009 Irp->IoStatus.Status = STATUS_SUCCESS;
1010 break;
1011
1012 case IRP_MN_QUERY_ID:
1013 return PciIdeXFdoQueryId(FdoExtension, Irp, IoStack);
1014
1015 default:
1016 break;
1017 }
1018
1020 Status = IoCallDriver(FdoExtension->Common.LowerDeviceObject, Irp);
1021
1022 IoReleaseRemoveLock(&FdoExtension->Common.RemoveLock, Irp);
1023 return Status;
1024
1026 Irp->IoStatus.Status = Status;
1028
1029 IoReleaseRemoveLock(&FdoExtension->Common.RemoveLock, Irp);
1030 return Status;
1031}
#define ExAllocatePoolUninitialized
static PIO_STACK_LOCATION IoGetCurrentIrpStackLocation(PIRP Irp)
#define PAGED_CODE()
#define CODE_SEG(...)
#define RTL_NUMBER_OF(x)
Definition: RtlRegistry.c:12
NTSTATUS AtaAcpiSetTimingMode(_In_ PDEVICE_OBJECT DeviceObject, _In_ PIDE_ACPI_TIMING_MODE_BLOCK TimingMode, _In_opt_ PIDENTIFY_DEVICE_DATA IdBlock1, _In_opt_ PIDENTIFY_DEVICE_DATA IdBlock2)
Definition: acpi.c:147
VOID AtaAcpiSetDeviceData(_In_ PDEVICE_OBJECT DeviceObject, _In_ PIDENTIFY_DEVICE_DATA IdBlock)
Definition: acpi.c:296
PVOID AtaAcpiGetTaskFile(_In_ PDEVICE_OBJECT DeviceObject)
Definition: acpi.c:212
unsigned char BOOLEAN
Definition: actypes.h:127
FORCEINLINE ULONG AHCI_PORT_READ(_In_ PVOID PortIoBase, _In_ AHCI_PORT_REGISTER Register)
Definition: ahci.h:548
@ PxCmdStatus
Definition: ahci.h:104
@ PxTaskFileData
Definition: ahci.h:105
@ PxCommandIssue
Definition: ahci.h:111
@ PxSataStatus
Definition: ahci.h:107
@ PxSataControl
Definition: ahci.h:108
@ PxInterruptEnable
Definition: ahci.h:103
@ PxSataNotification
Definition: ahci.h:112
@ PxSataError
Definition: ahci.h:109
@ PxSignature
Definition: ahci.h:106
@ PxFisSwitchingControl
Definition: ahci.h:113
@ PxInterruptStatus
Definition: ahci.h:102
@ PxDeviceSleep
Definition: ahci.h:114
@ PxSataActive
Definition: ahci.h:110
NTSTATUS AhciGetControllerProperties(_Inout_ PATA_CONTROLLER Controller)
Definition: ahci_generic.c:625
BOOLEAN AtaAhciDowngradeInterfaceSpeed(_In_ PCHANNEL_DATA_AHCI ChanData)
Definition: ahci_hw.c:1542
#define ATA_MAX_DEVICE
Definition: ata_shared.h:15
#define ATA_MIN_BUFFER_ALIGNMENT
Definition: ata_shared.h:30
#define PIO_MODE(n)
Definition: ata_user.h:36
#define PIO_ALL
Definition: ata_user.h:19
LONG NTSTATUS
Definition: precomp.h:26
#define MAX_CHANNELS
Definition: channels.c:23
#define ERR(fmt,...)
Definition: precomp.h:57
#define FILE_DEVICE_SECURE_OPEN
Definition: cdrw_usr.h:46
Definition: bufpool.h:45
VOID NTAPI IoDeleteController(IN PCONTROLLER_OBJECT ControllerObject)
Definition: controller.c:114
_In_ PIRP Irp
Definition: csq.h:116
#define STATUS_NOT_SUPPORTED
Definition: d3dkmdt.h:48
#define NULL
Definition: types.h:112
#define TRUE
Definition: types.h:120
#define FALSE
Definition: types.h:117
#define NT_SUCCESS(StatCode)
Definition: apphelp.c:33
PDEVICE_LIST DeviceList
Definition: utils.c:27
#define L(x)
Definition: resources.c:13
NTSYSAPI BOOLEAN InitSafeBootMode
Definition: init.c:71
#define INFO
Definition: debug.h:89
#define ULONG_PTR
Definition: config.h:101
#define PtrToUlong(u)
Definition: config.h:107
@ PdoExtension
Definition: precomp.h:49
@ FdoExtension
Definition: precomp.h:48
VOID CompleteIrp(IN PIRP Irp, IN NTSTATUS Status, IN ULONG_PTR Information)
Definition: pnp.c:12
#define InsertTailList(ListHead, Entry)
UCHAR KIRQL
Definition: env_spec_w32.h:591
#define KeReleaseSpinLock(sl, irql)
Definition: env_spec_w32.h:627
#define KeAcquireSpinLock(sl, irql)
Definition: env_spec_w32.h:609
#define KeGetCurrentIrql()
Definition: env_spec_w32.h:706
#define DISPATCH_LEVEL
Definition: env_spec_w32.h:696
#define PagedPool
Definition: env_spec_w32.h:308
union Alignment_ Alignment
Status
Definition: gdiplustypes.h:25
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble * u
Definition: glfuncs.h:240
VOID FASTCALL ExAcquireFastMutex(IN PFAST_MUTEX FastMutex)
Definition: fmutex.c:23
VOID FASTCALL ExReleaseFastMutex(IN PFAST_MUTEX FastMutex)
Definition: fmutex.c:31
#define DbgPrint
Definition: hal.h:12
IDE_CHANNEL_STATE
Definition: ide.h:196
@ ChannelDisabled
Definition: ide.h:197
@ ChannelStateUnknown
Definition: ide.h:199
VOID NTAPI MmUnmapIoSpace(IN PVOID BaseAddress, IN SIZE_T NumberOfBytes)
Definition: iosup.c:193
PVOID NTAPI MmMapIoSpace(IN PHYSICAL_ADDRESS PhysicalAddress, IN SIZE_T NumberOfBytes, IN MEMORY_CACHING_TYPE CacheType)
Definition: iosup.c:47
#define ASSERT(a)
Definition: mode.c:44
#define ExFreePoolWithTag(_P, _T)
Definition: module.h:1109
void Bar(void)
Definition: terminate.cpp:70
@ InterruptObject
Definition: ketypes.h:428
static BOOL StartDevice(IN HDEVINFO DeviceInfoSet, IN PSP_DEVINFO_DATA DevInfoData OPTIONAL, IN BOOL bEnable, IN DWORD HardwareProfile OPTIONAL, OUT BOOL *bNeedReboot OPTIONAL)
Definition: wizard.c:173
#define _In_reads_(s)
Definition: no_sal2.h:168
#define _Inout_
Definition: no_sal2.h:162
#define _Out_
Definition: no_sal2.h:160
#define _In_
Definition: no_sal2.h:158
#define _In_range_(l, h)
Definition: no_sal2.h:368
NTSYSAPI VOID NTAPI RtlInitUnicodeString(PUNICODE_STRING DestinationString, PCWSTR SourceString)
#define RTL_SIZEOF_THROUGH_FIELD(type, field)
Definition: ntbasedef.h:684
_In_ ULONGLONG _In_ ULONGLONG _In_ BOOLEAN Enable
Definition: ntddpcm.h:142
#define IRP_MN_SURPRISE_REMOVAL
Definition: ntifs_ex.h:408
#define IoSkipCurrentIrpStackLocation(Irp)
Definition: ntifs_ex.h:421
NTSTATUS NTAPI IoCreateDevice(IN PDRIVER_OBJECT DriverObject, IN ULONG DeviceExtensionSize, IN PUNICODE_STRING DeviceName, IN DEVICE_TYPE DeviceType, IN ULONG DeviceCharacteristics, IN BOOLEAN Exclusive, OUT PDEVICE_OBJECT *DeviceObject)
Definition: device.c:1032
VOID NTAPI IoDetachDevice(IN PDEVICE_OBJECT TargetDevice)
Definition: device.c:1297
VOID NTAPI IoDeleteDevice(IN PDEVICE_OBJECT DeviceObject)
Definition: device.c:1252
#define IoCompleteRequest
Definition: irp.c:1240
BOOLEAN NTAPI IoForwardIrpSynchronously(IN PDEVICE_OBJECT DeviceObject, IN PIRP Irp)
Definition: irp.c:1625
#define IoCallDriver
Definition: irp.c:1225
KIRQL NTAPI KeAcquireInterruptSpinLock(IN PKINTERRUPT Interrupt)
Definition: spinlock.c:154
VOID NTAPI KeReleaseInterruptSpinLock(IN PKINTERRUPT Interrupt, IN KIRQL OldIrql)
Definition: spinlock.c:171
#define STATUS_NO_MATCH
Definition: ntstatus.h:873
NTSTRSAFEVAPI RtlStringCbPrintfW(_Out_writes_bytes_(cbDest) _Always_(_Post_z_) NTSTRSAFE_PWSTR pszDest, _In_ size_t cbDest, _In_ _Printf_format_string_ NTSTRSAFE_PCWSTR pszFormat,...)
Definition: ntstrsafe.h:1173
IDE_CHANNEL_STATE PciIdeGetChannelState(_In_ PATA_CONTROLLER Controller, _In_ ULONG Channel)
Definition: pata_generic.c:902
NTSTATUS PataGetControllerProperties(_Inout_ PATA_CONTROLLER Controller, _In_ PCM_RESOURCE_LIST ResourcesTranslated)
Definition: pata_legacy.c:16
NTSTATUS NTAPI PciIdeGetControllerProperties(IN PVOID DeviceExtension, OUT PIDE_CONTROLLER_PROPERTIES ControllerProperties)
Definition: pciide.c:46
NTSTATUS PciIdeXPnpQueryDeviceUsageNotification(_In_ PCOMMON_DEVICE_EXTENSION CommonExt, _In_ PIRP Irp)
Definition: pciidex.c:214
NTSTATUS PciIdeXPnpQueryPnpDeviceState(_In_ PCOMMON_DEVICE_EXTENSION CommonExt, _In_ PIRP Irp)
Definition: pciidex.c:266
#define CTRL_FLAG_NATIVE_PCI
Definition: pciidex.h:223
#define PDO_FLAG_REPORTED_MISSING
Definition: pciidex.h:410
struct _CHANNEL_DATA_AHCI * PCHANNEL_DATA_AHCI
CONTROLLER_PNP_START_DEVICE PciIdeXFdoStartDevice
Definition: pciidex.h:468
#define RANGE_IS_MAPPED
Definition: pciidex.h:192
#define CHANNEL_FLAG_NO_ATAPI_DMA
Definition: pciidex.h:278
CONTROLLER_ATTACH_CHANNEL AtaCtrlAttachChannel
Definition: pciidex.h:455
_In_ ULONG Channel
Definition: pciidex.h:74
CHANNEL_SET_MODE AtaCtrlSetTransferMode
Definition: pciidex.h:463
#define CTRL_FLAG_NON_PNP
Definition: pciidex.h:228
CHANNEL_SET_DEVICE_DATA AtaCtrlSetDeviceData
Definition: pciidex.h:458
NTSTATUS PciIdeXPdoRemoveDevice(_In_ PPDO_DEVICE_EXTENSION PdoExtension, _In_ PIRP Irp, _In_ BOOLEAN FinalRemove)
Definition: pdo.c:193
_In_ ULONG BusNumber
Definition: pciidex.h:65
CONTROLLER_ATTACH_CHANNEL_EX PciIdeAttachChannel
Definition: pciidex.h:636
#define PDO_FLAG_NOT_PRESENT
Definition: pciidex.h:409
#define CTRL_FLAG_SATA_HBA_ACPI
Definition: pciidex.h:225
CHANNEL_DOWNGRADE_INTERFACE_SPEED AtaCtrlDowngradeInterfaceSpeed
Definition: pciidex.h:464
#define CHANNEL_FLAG_PIO_VIA_DMA
Definition: pciidex.h:269
#define CTRL_FLAG_IS_AHCI
Definition: pciidex.h:227
#define RANGE_IS_MEMORY
Definition: pciidex.h:191
CHANNEL_ABORT_CHANNEL AtaCtrlAbortChannel
Definition: pciidex.h:465
CONTROLLER_PNP_REMOVE_DEVICE PciIdeXFdoRemoveDevice
Definition: pciidex.h:471
#define CHANNEL_FLAG_HAS_ACPI_GTM
Definition: pciidex.h:275
#define TAG_PCIIDEX
Definition: pciidex.h:32
CHANNEL_GET_INIT_TASK_FILE AtaCtrlGetInitTaskFile
Definition: pciidex.h:461
#define RANGE_IS_VALID
Definition: pciidex.h:190
short WCHAR
Definition: pedump.c:58
#define FILE_DEVICE_CONTROLLER
Definition: winioctl.h:49
#define CmResourceTypeMemory
Definition: restypes.h:106
@ InterfaceTypeUndefined
Definition: restypes.h:120
@ PCIBus
Definition: restypes.h:126
#define CmResourceTypePort
Definition: restypes.h:104
#define CmResourceTypeInterrupt
Definition: restypes.h:105
unsigned char _BitScanReverse(unsigned long *_Index, unsigned long _Mask)
Definition: intrin_arm.h:180
#define DECLSPEC_NOINLINE_FROM_PAGED
#define STATUS_SUCCESS
Definition: shellext.h:65
NTSTATUS PciIdeXFdoDispatchPnp(_In_ PFDO_DEVICE_EXTENSION FdoExtension, _Inout_ PIRP Irp)
Definition: fdo.c:910
static NTSTATUS AtaCtrlPciCollectInformation(_In_ PFDO_DEVICE_EXTENSION FdoExt, _In_ PCM_RESOURCE_LIST ResourcesTranslated)
Definition: fdo.c:432
static PPDO_DEVICE_EXTENSION PciIdeXPdoCreateDevice(_In_ PFDO_DEVICE_EXTENSION FdoExtension, _In_ ULONG ChannelNumber)
Definition: fdo.c:616
static NTSTATUS PciIdeXFdoQueryBusRelations(_In_ PFDO_DEVICE_EXTENSION FdoExt, _In_ PIRP Irp)
Definition: fdo.c:693
static NTSTATUS PciIdeXFdoQueryInterface(_In_ PFDO_DEVICE_EXTENSION FdoExtension, _In_ PIO_STACK_LOCATION IoStack)
Definition: fdo.c:803
VOID DumpTestMiniport(_Inout_ PFDO_DEVICE_EXTENSION FdoExt)
DECLSPEC_NOINLINE_FROM_PAGED VOID AtaChanEnableInterruptsSync(_In_ PVOID ChannelContext, _In_ BOOLEAN Enable)
Definition: fdo.c:62
static VOID AtaCtrlPciAssignResources(_In_ PATA_CONTROLLER Controller, _In_ PCM_RESOURCE_LIST ResourcesTranslated, _In_ PPCI_COMMON_HEADER PciData)
Definition: fdo.c:322
static NTSTATUS PciIdeXFdoQueryId(_In_ PFDO_DEVICE_EXTENSION FdoExt, _In_ PIRP Irp, _In_ PIO_STACK_LOCATION IoStack)
Definition: fdo.c:845
static DECLSPEC_NOINLINE_FROM_PAGED VOID AtaCtrlCallStopController(_In_ PATA_CONTROLLER Controller)
Definition: fdo.c:31
static NTSTATUS PciIdeXFdoStopDevice(_In_ PFDO_DEVICE_EXTENSION FdoExtension)
Definition: fdo.c:574
static VOID PciIdeXFdoFreeResources(_In_ PFDO_DEVICE_EXTENSION FdoExtension)
Definition: fdo.c:523
static VOID AtaCtrlPciSaveData(_Out_ PATA_CONTROLLER Controller, _In_ PPCI_COMMON_HEADER PciData)
Definition: fdo.c:411
static DECLSPEC_NOINLINE_FROM_PAGED VOID AtaCtrlCallStartController(_In_ PATA_CONTROLLER Controller)
Definition: fdo.c:18
static BOOLEAN AtaCtrlPciGetNextBarIndex(_In_ PPCI_COMMON_HEADER PciData, _Inout_ PULONG Bar)
Definition: fdo.c:294
PVOID AtaCtrlPciMapBar(_In_ PATA_CONTROLLER Controller, _In_range_(0, PCI_TYPE0_ADDRESSES) ULONG Index, _In_ ULONG MinimumIoLength)
Definition: fdo.c:249
IDE_CHANNEL_STATE PciIdeXGetChannelState(_In_ PATA_CONTROLLER Controller, _In_ ULONG Channel)
Definition: fdo.c:678
PCONTROLLER_OBJECT HwSyncObject
Definition: pciidex.h:201
ULONG AlignmentRequirement
Definition: pciidex.h:212
ULONG QueueDepth
Definition: pciidex.h:221
PCONTROLLER_START Start
Definition: pciidex.h:202
PCONTROLLER_ATTACH_CHANNEL_EX AttachChannel
Definition: pciidex.h:205
PVOID ChanDataBlock
Definition: pciidex.h:200
CM_PARTIAL_RESOURCE_DESCRIPTOR InterruptDesc
Definition: pciidex.h:171
struct _ATA_CONTROLLER::@1180 AccessRange[PCI_TYPE0_ADDRESSES]
PVOID BusInterfaceContext
Definition: pciidex.h:199
KSPIN_LOCK Lock
Definition: pciidex.h:232
PCONTROLLER_STOP Stop
Definition: pciidex.h:203
struct _ATA_CONTROLLER::@1179 Pci
ULONG ChannelBitmap
Definition: pciidex.h:214
const ATA_PCI_ENABLE_BITS * ChannelEnableBits
Definition: pciidex.h:208
PGET_SET_DEVICE_DATA GetBusData
Definition: pciidex.h:198
PKINTERRUPT InterruptObject
Definition: pciidex.h:172
PCONTROLLER_FREE_RESOURCES FreeResources
Definition: pciidex.h:204
PCHANNEL_SET_MODE_EX SetTransferMode
Definition: pciidex.h:243
struct _CHANNEL_DATA_COMMON::@1183 Current
PKINTERRUPT InterruptObject
Definition: pciidex.h:240
ULONG ActiveSlotsBitmap
Definition: pciidex.h:287
ULONG ActiveQueuedSlotsBitmap
Definition: pciidex.h:288
PATA_CONTROLLER Controller
Definition: pciidex.h:248
PCHANNEL_ENABLE_INTERRUPTS EnableInterrupts
Definition: pciidex.h:247
IDE_ACPI_TIMING_MODE_BLOCK CurrentTimingMode
Definition: pciidex.h:315
union _CM_PARTIAL_RESOURCE_DESCRIPTOR::@384 u
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@384::@386 Port
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@384::@389 Memory
PDEVICE_OBJECT Self
Definition: pciidex.h:376
PDEVICE_OBJECT Objects[1]
Definition: iotypes.h:2165
LIST_ENTRY PdoListHead
Definition: precomp.h:116
FAST_MUTEX PdoListSyncMutex
Definition: pciidex.h:392
ATA_CONTROLLER Controller
Definition: pciidex.h:395
union _IO_STACK_LOCATION::@1696 Parameters
struct _IO_STACK_LOCATION::@4454::@4479 QueryDeviceRelations
Definition: typedefs.h:120
struct _LIST_ENTRY * Flink
Definition: typedefs.h:121
COMMON_DEVICE_EXTENSION Common
Definition: usbhub.h:204
#define max(a, b)
Definition: svc.c:63
uint32_t * PULONG
Definition: typedefs.h:59
unsigned char UCHAR
Definition: typedefs.h:53
#define FIELD_OFFSET(t, f)
Definition: typedefs.h:255
void * PVOID
Definition: typedefs.h:50
#define RtlCopyMemory(Destination, Source, Length)
Definition: typedefs.h:263
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:262
uint32_t ULONG_PTR
Definition: typedefs.h:65
uint16_t * PWCHAR
Definition: typedefs.h:56
#define CONTAINING_RECORD(address, type, field)
Definition: typedefs.h:260
uint32_t ULONG
Definition: typedefs.h:59
#define STATUS_IO_DEVICE_ERROR
Definition: udferr_usr.h:179
#define STATUS_UNSUCCESSFUL
Definition: udferr_usr.h:132
#define STATUS_INSUFFICIENT_RESOURCES
Definition: udferr_usr.h:158
LONGLONG QuadPart
Definition: typedefs.h:114
PUSBHUB_PORT_PDO_EXTENSION NTAPI PdoExt(IN PDEVICE_OBJECT DeviceObject)
Definition: usbhub.c:133
_Must_inspect_result_ _In_ WDFDEVICE Device
Definition: wdfchildlist.h:474
_In_ WDFCOLLECTION _In_ ULONG Index
_In_ PDEVICE_OBJECT DeviceObject
Definition: wdfdevice.h:2061
_In_ WDFCMRESLIST _In_ WDFCMRESLIST ResourcesTranslated
Definition: wdfdevice.h:891
_Must_inspect_result_ _In_ WDFDEVICE _In_ PWDF_DEVICE_PROPERTY_DATA _In_ DEVPROPTYPE _In_ ULONG Size
Definition: wdfdevice.h:4539
_Must_inspect_result_ _In_ PWDFDEVICE_INIT _In_opt_ PCUNICODE_STRING DeviceName
Definition: wdfdevice.h:3281
_Must_inspect_result_ _In_ WDFIOTARGET _In_opt_ WDFREQUEST _In_opt_ PWDF_MEMORY_DESCRIPTOR _In_opt_ PLONGLONG _In_opt_ PWDF_REQUEST_SEND_OPTIONS _Out_opt_ PULONG_PTR BytesRead
Definition: wdfiotarget.h:870
WDF_EXTERN_C_START typedef _Must_inspect_result_ _In_ WDFDRIVER _In_opt_ PWDF_OBJECT_ATTRIBUTES _In_ PDEVICE_OBJECT _In_opt_ PDEVICE_OBJECT _In_opt_ PDEVICE_OBJECT Pdo
Definition: wdfminiport.h:72
#define IsEqualGUIDAligned(guid1, guid2)
Definition: wdm.template.h:235
#define HalGetInterruptTranslator
Definition: haltypes.h:313
#define IoAcquireRemoveLock(RemoveLock, Tag)
#define IoReleaseRemoveLockAndWait(_RemoveLock, _Tag)
Definition: iofuncs.h:2774
#define IoReleaseRemoveLock(_RemoveLock, _Tag)
Definition: iofuncs.h:2764
#define IoInitializeRemoveLock(Lock, AllocateTag, MaxLockedMinutes, HighWatermark)
Definition: iofuncs.h:2833
#define PCI_TYPE_64BIT
Definition: iotypes.h:4242
#define IRP_MN_CANCEL_STOP_DEVICE
@ BusRelations
Definition: iotypes.h:2154
#define IRP_MN_QUERY_PNP_DEVICE_STATE
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS PhysicalAddress
Definition: iotypes.h:1098
#define PCI_WHICHSPACE_CONFIG
Definition: iotypes.h:3646
#define PCI_ADDRESS_IO_ADDRESS_MASK
Definition: iotypes.h:4236
#define IO_NO_INCREMENT
Definition: iotypes.h:598
#define IRP_MN_QUERY_INTERFACE
#define PCI_TYPE0_ADDRESSES
Definition: iotypes.h:3502
#define IRP_MN_START_DEVICE
#define IRP_MN_DEVICE_USAGE_NOTIFICATION
#define IRP_MN_QUERY_ID
#define PCI_ADDRESS_IO_SPACE
Definition: iotypes.h:4233
#define IRP_MN_REMOVE_DEVICE
#define IRP_MN_QUERY_DEVICE_RELATIONS
#define PCI_ADDRESS_MEMORY_ADDRESS_MASK
Definition: iotypes.h:4237
#define IRP_MN_QUERY_STOP_DEVICE
struct _PCI_COMMON_HEADER * PPCI_COMMON_HEADER
#define IRP_MN_CANCEL_REMOVE_DEVICE
#define PCI_ADDRESS_MEMORY_PREFETCHABLE
Definition: iotypes.h:4235
#define IRP_MN_STOP_DEVICE
#define PCI_ADDRESS_MEMORY_TYPE_MASK
Definition: iotypes.h:4234
@ BusQueryCompatibleIDs
Definition: iotypes.h:2940
@ BusQueryHardwareIDs
Definition: iotypes.h:2939
struct _TRANSLATOR_INTERFACE * PTRANSLATOR_INTERFACE
#define IRP_MN_QUERY_REMOVE_DEVICE
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:778
@ MmNonCached
Definition: mmtypes.h:129
#define ObReferenceObject
Definition: obfuncs.h:204
#define NT_VERIFY(exp)
Definition: rtlfuncs.h:3304