1002 #endif //UNIATA_CORE 1005 ULONG SystemIoBusNumber;
1035 #ifdef UNIATA_INIT_ON_PROBE 1070 if(ConfigInfo->AdapterInterfaceType ==
Isa) {
1075 if(
i & 0x80000000) {
1083 if(
BMList[
i].slotNumber == ConfigInfo->SlotNumber &&
1107 if (!deviceExtension) {
1144 #endif //UNIATA_CORE 1146 VendorID = pciData.VendorID;
1148 BaseClass = pciData.BaseClass;
1149 SubClass = pciData.SubClass;
1150 RevID = pciData.RevisionID;
1151 dev_id = VendorID | (
DeviceID << 16);
1157 deviceExtension->
DevID = dev_id;
1158 deviceExtension->
RevID = RevID;
1164 "UATA%8.8x/%1.1x@%8.8x", dev_id, channel, slotNumber);
1174 if(VendorID !=
BMList[
i].nVendorId ||
1186 ConfigInfo->AlignmentMask = 0x00000003;
1266 #endif //UNIATA_CORE 1279 if((channel==0) && ConfigInfo->AtdiskPrimaryClaimed) {
1283 if((channel==1) && ConfigInfo->AtdiskSecondaryClaimed) {
1311 if(pciData.u.type0.BaseAddresses[
j] & ~0x7) {
1323 (
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, &pciData, SystemIoBusNumber,
1324 4, bm_offset, MasterDev ? 0x08 : 0x10));
1325 if(BaseIoAddressBM_0) {
1328 (*ConfigInfo->AccessRanges)[4].RangeInMemory ?
TRUE :
FALSE);
1331 if((*ConfigInfo->AccessRanges)[4].RangeInMemory) {
1343 if(deviceExtension->
BusMaster && !MasterDev) {
1372 if (dev_id == 0xc6931080 && slotData.
u.
bits.FunctionNumber > 1) {
1393 if(simplexOnly && MasterDev) {
1397 if(BaseIoAddressBM_0) {
1400 (*ConfigInfo->AccessRanges)[4].RangeInMemory ?
TRUE :
FALSE);
1412 if(!ConfigInfo->InitiatorBusId[0]) {
1414 KdPrint2((
PRINT_PREFIX "set ConfigInfo->InitiatorBusId[0] = %#x\n", ConfigInfo->InitiatorBusId[0]));
1417 ConfigInfo->MaximumNumberOfTargets = (
UCHAR)(deviceExtension->
NumberLuns);
1441 if (ConfigInfo->AdapterInterfaceType ==
MicroChannel) {
1442 ConfigInfo->InterruptMode2 =
1445 ConfigInfo->InterruptMode2 =
1446 ConfigInfo->InterruptMode =
Latched;
1448 ConfigInfo->BusInterruptLevel = 14;
1449 ConfigInfo->BusInterruptLevel2 = 15;
1452 if (ConfigInfo->AdapterInterfaceType ==
MicroChannel) {
1455 ConfigInfo->InterruptMode =
Latched;
1457 ConfigInfo->BusInterruptLevel = (channel == 0 ? 14 : 15);
1461 ConfigInfo->SlotNumber = slotNumber;
1462 ConfigInfo->SystemIoBusNumber = SystemIoBusNumber;
1466 if(!ConfigInfo->BusInterruptVector ||
1467 (ConfigInfo->BusInterruptVector != pciData.u.type0.InterruptLine)) {
1469 ConfigInfo->BusInterruptVector = pciData.u.type0.InterruptLine;
1470 if(!ConfigInfo->BusInterruptVector) {
1472 ConfigInfo->BusInterruptVector = 10;
1476 ConfigInfo->MultipleRequestPerLu =
TRUE;
1477 ConfigInfo->AutoRequestSense =
TRUE;
1478 ConfigInfo->TaggedQueuing =
TRUE;
1481 (ConfigInfo->Length >=
sizeof(_ConfigInfo->
comm) +
sizeof(_ConfigInfo->
nt4))) {
1493 (ConfigInfo->Length >=
sizeof(_ConfigInfo->
comm) +
sizeof(_ConfigInfo->
nt4) +
sizeof(_ConfigInfo->
w2k))) {
1495 deviceExtension->
Host64));
1500 #endif //USE_OWN_DMA 1509 deviceExtension->
Channel = channel;
1512 = ConfigInfo->AdapterInterfaceType;
1516 KdPrint2((
PRINT_PREFIX "chan[%d] InterruptMode: %d, Level %d, Level2 %d, Vector %d, Vector2 %d\n",
1518 ConfigInfo->InterruptMode,
1519 ConfigInfo->BusInterruptLevel,
1520 ConfigInfo->BusInterruptLevel2,
1521 ConfigInfo->BusInterruptVector,
1522 ConfigInfo->BusInterruptVector2
1531 ConfigInfo->NeedPhysicalAddresses =
FALSE;
1533 ConfigInfo->NeedPhysicalAddresses =
TRUE;
1534 #endif //USE_OWN_DMA 1540 ConfigInfo->Dma32BitAddresses =
TRUE;
1551 if(ConfigInfo->AdapterInterfaceType ==
Isa 1554 ConfigInfo->AdapterInterfaceType =
PCIBus;
1556 if(ConfigInfo->AdapterInterfaceType ==
PCIBus 1559 ConfigInfo->SlotNumber = slotNumber;
1560 ConfigInfo->SystemIoBusNumber = SystemIoBusNumber;
1565 ConfigInfo->Master =
TRUE;
1567 #endif //USE_OWN_DMA 1568 ConfigInfo->ScatterGather =
TRUE;
1570 ConfigInfo->MapBuffers =
TRUE;
1571 ConfigInfo->CachesData =
TRUE;
1579 chan = &deviceExtension->
chan[
c];
1597 (*ConfigInfo->AccessRanges)[channel * 2 + 0].RangeStart =
1599 (*ConfigInfo->AccessRanges)[channel * 2 + 0].RangeLength =
ATA_IOSIZE;
1601 (*ConfigInfo->AccessRanges)[channel * 2 + 1].RangeStart =
1603 (*ConfigInfo->AccessRanges)[channel * 2 + 1].RangeLength =
ATA_ALTIOSIZE;
1606 !(*ConfigInfo->AccessRanges)[channel * 2 + 0].RangeStart.QuadPart &&
1607 !(*ConfigInfo->AccessRanges)[channel * 2 + 1].RangeStart.QuadPart) {
1609 AtapiGetIoRange(HwDeviceExtension, ConfigInfo, &pciData, SystemIoBusNumber,
1611 AtapiGetIoRange(HwDeviceExtension, ConfigInfo, &pciData, SystemIoBusNumber,
1615 IoBasePort1 = (*ConfigInfo->AccessRanges)[channel * 2 + 0].RangeStart;
1616 IoBasePort2 = (*ConfigInfo->AccessRanges)[channel * 2 + 1].RangeStart;
1662 MasterDev ? ConfigInfo->AdapterInterfaceType :
PCIBus ,
1663 MasterDev ? ConfigInfo->SystemIoBusNumber : SystemIoBusNumber ,
1687 MasterDev ? ConfigInfo->AdapterInterfaceType :
PCIBus ,
1688 MasterDev ? ConfigInfo->SystemIoBusNumber : SystemIoBusNumber ,
1718 #ifdef UNIATA_INIT_ON_PROBE 1726 skip_find_dev =
FALSE;
1728 if ((statusByte & 0xf8) == 0xf8 ||
1729 (statusByte == 0xa5)) {
1735 if ((statusByte & 0xf8) == 0xf8 ||
1736 (statusByte == 0xa5)) {
1739 skip_find_dev =
TRUE;
1745 if (!skip_find_dev &&
1760 #else //UNIATA_INIT_ON_PROBE 1786 #endif //UNIATA_INIT_ON_PROBE 1797 ConfigInfo->AtdiskPrimaryClaimed =
TRUE;
1806 ConfigInfo->AtdiskSecondaryClaimed =
TRUE;
1815 ConfigInfo->AtdiskPrimaryClaimed =
TRUE;
1821 ConfigInfo->AtdiskSecondaryClaimed =
TRUE;
1829 #endif //UNIATA_CORE 1837 if(BaseIoAddress1[0])
1840 if(BaseIoAddress2[0])
1844 if(BaseIoAddress1[1])
1847 if(BaseIoAddress2[1])
1851 if(BaseIoAddressBM_0)
1887 (*ConfigInfo->AccessRanges)[4].RangeLength = 0;
1889 (*ConfigInfo->AccessRanges)[5].RangeLength = 0;
1898 KdPrint2((
PRINT_PREFIX "final chan[%d] InterruptMode: %d, Level %d, Level2 %d, Vector %d, Vector2 %d\n",
1900 ConfigInfo->InterruptMode,
1901 ConfigInfo->BusInterruptLevel,
1902 ConfigInfo->BusInterruptLevel2,
1903 ConfigInfo->BusInterruptVector,
1904 ConfigInfo->BusInterruptVector2
1909 #endif //UNIATA_CORE 1919 ConfigInfo->NumberOfBuses++;
#define PCI_TYPE0_ADDRESSES
#define CHAN_NOT_SPECIFIED_CHECK_CABLE
#define PCI_DEV_SUBCLASS_IDE
#define BM_STATUS_SIMPLEX_ONLY
#define GetDmaStatus(de, c)
#define CHAN_NOT_SPECIFIED
PBUSMASTER_CONTROLLER_INFORMATION BMList
NTSTATUS NTAPI UniataConnectIntr2(IN PVOID HwDeviceExtension)
PCONFIGURATION_INFORMATION NTAPI IoGetConfigurationInformation(VOID)
INTERFACE_TYPE OrigAdapterInterfaceType
NTSTATUS NTAPI UniataChipDetect(IN PVOID HwDeviceExtension, IN PPCI_COMMON_CONFIG pciData, IN ULONG DeviceNumber, IN OUT PPORT_CONFIGURATION_INFORMATION ConfigInfo, IN BOOLEAN *simplexOnly)
BOOLEAN NTAPI UniataCheckPCISubclass(BOOLEAN known, ULONG RaidFlags, UCHAR SubClass)
#define ScsiPortConvertPhysicalAddressToUlong(Address)
#define ATA_PCCARD_ALTOFFSET
UCHAR DDKFASTAPI SelectDrive(IN struct _HW_CHANNEL *chan, IN ULONG DeviceNumber)
struct _IDE_REGISTERS_2 * PIDE_REGISTERS_2
struct _IDE_BUSMASTER_REGISTERS * PIDE_BUSMASTER_REGISTERS
PVOID NTAPI ScsiPortGetDeviceBase(IN PVOID HwDeviceExtension, IN INTERFACE_TYPE BusType, IN ULONG SystemIoBusNumber, IN SCSI_PHYSICAL_ADDRESS IoAddress, IN ULONG NumberOfBytes, IN BOOLEAN InIoSpace)
#define GetBaseStatus(BaseIoAddress, Status)
VOID NTAPI ScsiPortFreeDeviceBase(IN PVOID HwDeviceExtension, IN PVOID MappedAddress)
#define IDE_DEFAULT_MAX_CHAN
VOID NTAPI UniataDumpATARegs(IN struct _HW_CHANNEL *chan)
struct _HW_LU_EXTENSION HW_LU_EXTENSION
struct _HW_DEVICE_EXTENSION HW_DEVICE_EXTENSION
struct _PCI_SLOT_NUMBER::@3783::@3784 bits
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint GLint GLint j
VOID NTAPI AtapiSetupLunPtrs(IN PHW_CHANNEL chan, IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG c)
UCHAR DDKFASTAPI AtapiReadPort1(IN PHW_CHANNEL chan, IN ULONGIO_PTR port)
ULONG NTAPI AtapiRegCheckDevValue(IN PVOID HwDeviceExtension, IN ULONG chan, IN ULONG dev, IN PCWSTR Name, IN ULONG Default)
#define PCI_INVALID_VENDORID
#define NT_SUCCESS(StatCode)
SCSI_PHYSICAL_ADDRESS NTAPI ScsiPortConvertUlongToPhysicalAddress(IN ULONG_PTR UlongAddress)
ULONGIO_PTR NTAPI AtapiGetIoRange(IN PVOID HwDeviceExtension, IN PPORT_CONFIGURATION_INFORMATION ConfigInfo, IN PPCI_COMMON_CONFIG pciData, IN ULONG SystemIoBusNumber, IN ULONG rid, IN ULONG offset, IN ULONG length)
#define DEVNUM_NOT_SPECIFIED
#define SP_RETURN_NOT_FOUND
VOID NTAPI UniataInitMapBase(IN struct _HW_CHANNEL *chan, IN PIDE_REGISTERS_1 BaseIoAddress1, IN PIDE_REGISTERS_2 BaseIoAddress2)
#define Ata_is_supported_dev(pciData)
BOOLEAN NTAPI AtapiReadChipConfig(IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG channel)
VOID NTAPI AtapiDmaAlloc(IN PVOID HwDeviceExtension, IN PPORT_CONFIGURATION_INFORMATION ConfigInfo, IN ULONG lChannel)
#define PCI_DEV_CLASS_STORAGE
_Must_inspect_result_ _In_ PWDFDEVICE_INIT _In_ PCUNICODE_STRING DeviceID
BOOLEAN AtdiskPrimaryClaimed
IORES RegTranslation[IDX_MAX_REG]
VOID NTAPI UniataFreeLunExt(PHW_DEVICE_EXTENSION deviceExtension)
struct _HW_DEVICE_EXTENSION * PHW_DEVICE_EXTENSION
BOOLEAN AtdiskSecondaryClaimed
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
USHORT NTAPI UniataEnableIoPCI(IN ULONG busNumber, IN ULONG slotNumber, IN OUT PPCI_COMMON_CONFIG pciData)
#define AtapiStallExecution(dt)
BOOLEAN NTAPI ScsiPortValidateRange(IN PVOID HwDeviceExtension, IN INTERFACE_TYPE BusType, IN ULONG SystemIoBusNumber, IN SCSI_PHYSICAL_ADDRESS IoAddress, IN ULONG NumberOfBytes, IN BOOLEAN InIoSpace)
VOID NTAPI UniataInitMapBM(IN struct _HW_DEVICE_EXTENSION *deviceExtension, IN struct _IDE_BUSMASTER_REGISTERS *BaseIoAddressBM_0, IN BOOLEAN MemIo)
NTHALAPI ULONG NTAPI HalGetBusData(BUS_DATA_TYPE, ULONG, ULONG, PVOID, ULONG)
#define RtlZeroMemory(Destination, Length)
BOOLEAN NTAPI AtapiChipInit(IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG c)
#define IDE_MAX_LUN_PER_CHAN
UCHAR NTAPI AtapiDmaDone(IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG lChannel, IN PSCSI_REQUEST_BLOCK Srb)
#define IsBusMaster(pciData)
#define IsMasterDev(pciData)
static SERVICE_STATUS status
BOOLEAN NTAPI FindDevices(IN PVOID HwDeviceExtension, IN ULONG Flags, IN ULONG Channel)
union _PCI_SLOT_NUMBER::@3783 u
struct _PORT_CONFIGURATION_INFORMATION_COMMON * PPORT_CONFIGURATION_INFORMATION_COMMON
INTERFACE_TYPE AdapterInterfaceType
struct _IDE_REGISTERS_1 * PIDE_REGISTERS_1
#define PCI_COMMON_HDR_LENGTH