350 ULONG VendorID = deviceExtension->
DevID & 0xffff;
378 BaseIoAddressBM = pciData->u.type0.BaseAddresses[4] & ~0x07;
380 ConfigInfo->MaximumTransferLength =
DEV_BSIZE*256;
551 switch(deviceExtension->
DevID) {
613 deviceExtension->
HwFlags = tmp32;
617 deviceExtension->
HwFlags |= tmp32;
627 if(tmp32 != 0xffffffff) {
691 BaseIoAddress1 =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
693 BaseIoAddress2 =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
695 BaseIoAddressBM =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
700 chan = &deviceExtension->
chan[
c];
725 BaseMemAddress =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
726 5, 0, ((ChipFlags &
NV4OFF) ? 0x400 : 0) + 0x40*2);
728 if(!BaseMemAddress) {
731 if((*ConfigInfo->AccessRanges)[5].RangeInMemory) {
737 chan = &deviceExtension->
chan[
c];
749 if(ChipType !=
PRMIO) {
758 BaseMemAddress =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
761 if(!BaseMemAddress) {
764 if((*ConfigInfo->AccessRanges)[4].RangeInMemory) {
771 BaseMemAddress =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
774 if(!BaseMemAddress) {
777 if((*ConfigInfo->AccessRanges)[3].RangeInMemory) {
788 ((reg48 & 0x02) ? 1 : 0) +
798 chan = &deviceExtension->
chan[
c];
814 if((ChipFlags &
PRSATA) ||
815 ((ChipFlags &
PRCMBO) &&
c<2)) {
836 chan = &deviceExtension->
chan[0];
861 BaseMemAddress =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
864 if(!BaseMemAddress) {
867 if((*ConfigInfo->AccessRanges)[5].RangeInMemory) {
877 chan = &deviceExtension->
chan[
c];
919 BaseMemAddress =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
922 if(!BaseMemAddress) {
925 if((*ConfigInfo->AccessRanges)[5].RangeInMemory) {
934 chan = &deviceExtension->
chan[
c];
995 if(SiSSouthAdapters[
i].nDeviceId == 0x1182 ||
996 SiSSouthAdapters[
i].nDeviceId == 0x1183) {
1019 BaseMemAddress =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
1022 if(BaseMemAddress) {
1023 if((*ConfigInfo->AccessRanges)[5].RangeInMemory) {
1030 ULONG offs =
c << (SIS_182 ? 5 : 6);
1032 chan = &deviceExtension->
chan[
c];
1070 BaseMemAddress =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
1072 if(BaseMemAddress && (*ConfigInfo->AccessRanges)[5].RangeInMemory) {
1078 if(BaseMemAddress) {
1082 ULONG BaseIoAddressBM_0;
1087 AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber, 4, 0,
1092 chan = &deviceExtension->
chan[
c];
1109 chan = &deviceExtension->
chan[
c];
1110 if((ChipFlags &
VIABAR) && (
c==2)) {
1138 BaseMemAddress =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
1140 if(!BaseMemAddress) {
1143 if((*ConfigInfo->AccessRanges)[0].RangeInMemory) {
1151 ULONG offs = 0x200 +
c*0x200;
1153 chan = &deviceExtension->
chan[
c];
1199 BaseIoAddressBM =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
1201 if(BaseIoAddressBM) {
1204 if((*ConfigInfo->AccessRanges)[4].RangeInMemory) {
1237 if(deviceExtension->
DevID == 0x28288086 &&
1238 pciData->u.type0.SubVendorID == 0x106b) {
1243 BaseMemAddress =
AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
1245 if(BaseMemAddress && (*ConfigInfo->AccessRanges)[5].RangeInMemory) {
1253 chan = &deviceExtension->
chan[
c];
1256 if(ChipFlags &
ICH5) {
1258 if ((tmp8 & 0x04) == 0) {
1260 }
else if ((tmp8 & 0x02) == 0) {
1265 }
else if ((tmp8 & 0x02) != 0) {
1272 if(ChipFlags &
I6CH2) {
1277 switch(tmp8 & 0x03) {
1298 if(!(ChipFlags &
ICH7) && BaseMemAddress) {
1303 if((ChipFlags &
ICH5) || BaseMemAddress) {
1309 deviceExtension->
HwFlags |= ChipType;
1311 if(ChipFlags &
ICH7) {
1328 if(deviceExtension->
DevID == 0x01021078) {
1329 ConfigInfo->AlignmentMask = 0x0f;
1337 KdPrint((
" Check JMicron AHCI\n"));
1342 KdPrint((
" JMicron PATA/SATA\n"));
1345 #if 0 // do not touch, see Linux sources 1351 KdPrint((
" JMicron Combined\n"));
BOOLEAN NTAPI UniataAllocateLunExt(PHW_DEVICE_EXTENSION deviceExtension, ULONG NewNumberChannels)
ULONG NTAPI AtapiFindListedDev(PBUSMASTER_CONTROLLER_INFORMATION_BASE BusMasterAdapters, ULONG lim, IN PVOID HwDeviceExtension, IN ULONG BusNumber, IN ULONG SlotNumber, OUT PCI_SLOT_NUMBER *_slotData)
#define PCI_DEV_SUBCLASS_IDE
VOID NTAPI UniataInitSyncBaseIO(IN PHW_CHANNEL chan)
#define CHAN_NOT_SPECIFIED
#define ChangePciConfig1(offs, _op)
#define ATA_SILICON_IMAGE_ID
#define IDX_IO2_o_Control
#define CTRFLAGS_NO_SLAVE
BOOLEAN NTAPI UniataAhciDetect(IN PVOID HwDeviceExtension, IN PPCI_COMMON_CONFIG pciData, IN OUT PPORT_CONFIGURATION_INFORMATION ConfigInfo)
#define IDX_IO2_AltStatus
#define ScsiPortConvertPhysicalAddressToUlong(Address)
VOID NTAPI AtapiSetupLunPtrs(IN PHW_CHANNEL chan, IN PHW_DEVICE_EXTENSION deviceExtension, IN ULONG c)
#define IDX_SATA_SControl
VOID NTAPI ScsiPortFreeDeviceBase(IN PVOID HwDeviceExtension, IN PVOID MappedAddress)
#define ATA_SERVERWORKS_ID
#define IDX_IO1_o_Feature
VOID UniataInitIoRes(IN PHW_CHANNEL chan, IN ULONG idx, IN ULONG addr, IN BOOLEAN MemIo, IN BOOLEAN Proc)
#define SetPciConfig1(offs, op)
IORES BaseIoAddressSATA_0
#define BMLIST_TERMINATOR
#define UNIATA_ALLOCATE_NEW_LUNS
ULONG NTAPI AtapiRegCheckDevValue(IN PVOID HwDeviceExtension, IN ULONG chan, IN ULONG dev, IN PCWSTR Name, IN ULONG Default)
#define SetPciConfig4(offs, op)
#define GetPciConfig4(offs, op)
#define PCI_DEV_HW_SPEC_BM(idhi, idlo, rev, mode, name, flags)
#define DEVNUM_NOT_SPECIFIED
#define ATA_MODE_NOT_SPEC
#define IDX_BM_DeviceSpecific0
#define STATUS_UNSUCCESSFUL
#define IDX_BM_DeviceSpecific1
_Must_inspect_result_ _In_ PWDFDEVICE_INIT _In_ PCUNICODE_STRING DeviceID
ULONG DmaSegmentAlignmentMask
UCHAR DDKFASTAPI AtapiReadPortEx1(IN PHW_CHANNEL chan, IN ULONGIO_PTR port, IN ULONG offs)
struct _HW_DEVICE_EXTENSION * PHW_DEVICE_EXTENSION
BOOLEAN NTAPI UniataChipDetectChannels(IN PVOID HwDeviceExtension, IN PPCI_COMMON_CONFIG pciData, IN ULONG DeviceNumber, IN PPORT_CONFIGURATION_INFORMATION ConfigInfo)
#define PCISLOTNUM_NOT_SPECIFIED
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
VOID UniataInitIoResEx(IN PIORES IoRes, IN ULONG addr, IN BOOLEAN MemIo, IN BOOLEAN Proc)
#define Ata_is_ahci_dev(pciData)
#define IDX_IO1_o_Command
struct _BUSMASTER_CONTROLLER_INFORMATION_BASE * PBUSMASTER_CONTROLLER_INFORMATION_BASE
#define GetPciConfig1(offs, op)
ULONGIO_PTR NTAPI AtapiGetIoRange(IN PVOID HwDeviceExtension, IN PPORT_CONFIGURATION_INFORMATION ConfigInfo, IN PPCI_COMMON_CONFIG pciData, IN ULONG SystemIoBusNumber, IN ULONG rid, IN ULONG offset, IN ULONG length)
BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[]
__inline ULONG Ata_is_dev_listed(IN PBUSMASTER_CONTROLLER_INFORMATION_BASE BusMasterAdapters, ULONG VendorId, ULONG DeviceId, ULONG RevId, ULONG lim)
ULONG MaximumDmaTransferLength
GLboolean GLboolean GLboolean GLboolean a
_In_ PCHAR _In_ ULONG DeviceNumber
ULONG const NUM_BUSMASTER_ADAPTERS
#define UNIATA_SIMPLEX_ONLY