ReactOS  r75632
pcibus.c File Reference
#include <hal.h>
#include <debug.h>
Include dependency graph for pcibus.c:

Go to the source code of this file.

Macros

#define NDEBUG
 

Functions

VOID NTAPI HalpPCISynchronizeType1 (IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PPCI_TYPE1_CFG_BITS PciCfg1)
 
VOID NTAPI HalpPCIReleaseSynchronzationType1 (IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
 
VOID NTAPI HalpPCISynchronizeType2 (IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PPCI_TYPE2_ADDRESS_BITS PciCfg)
 
VOID NTAPI HalpPCIReleaseSynchronizationType2 (IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
 
VOID NTAPI HalpPCIConfig (IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PUCHAR Buffer, IN ULONG Offset, IN ULONG Length, IN FncConfigIO *ConfigIO)
 
VOID NTAPI HalpReadPCIConfig (IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
 
VOID NTAPI HalpWritePCIConfig (IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
 
BOOLEAN NTAPI HalpValidPCISlot (IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot)
 
ULONG NTAPI HalpGetPCIData (IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
 
ULONG NTAPI HalpSetPCIData (IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
 
ULONG NTAPI HalpGetPCIIntOnISABus (IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG BusInterruptLevel, IN ULONG BusInterruptVector, OUT PKIRQL Irql, OUT PKAFFINITY Affinity)
 
VOID NTAPI HalpPCIPin2ISALine (IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PPCI_COMMON_CONFIG PciData)
 
VOID NTAPI HalpPCIISALine2Pin (IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PPCI_COMMON_CONFIG PciNewData, IN PPCI_COMMON_CONFIG PciOldData)
 
NTSTATUS NTAPI HalpGetISAFixedPCIIrq (IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER PciSlot, OUT PSUPPORTED_RANGE *Range)
 
INIT_SECTION NTSTATUS NTAPI HalpSetupPciDeviceForDebugging (IN PVOID LoaderBlock, IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice)
 
INIT_SECTION NTSTATUS NTAPI HalpReleasePciDeviceForDebugging (IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice)
 
INIT_SECTION VOID NTAPI HalpRegisterPciDebuggingDeviceInfo (VOID)
 
static ULONG NTAPI PciSize (ULONG Base, ULONG Mask)
 
NTSTATUS NTAPI HalpAdjustPCIResourceList (IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *pResourceList)
 
NTSTATUS NTAPI HalpAssignPCISlotResources (IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PUNICODE_STRING RegistryPath, IN PUNICODE_STRING DriverClassName OPTIONAL, IN PDRIVER_OBJECT DriverObject, IN PDEVICE_OBJECT DeviceObject OPTIONAL, IN ULONG Slot, IN OUT PCM_RESOURCE_LIST *AllocatedResources)
 
ULONG NTAPI HaliPciInterfaceReadConfig (IN PBUS_HANDLER RootBusHandler, IN ULONG BusNumber, IN PCI_SLOT_NUMBER SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
 
INIT_SECTION
PPCI_REGISTRY_INFO_INTERNAL
NTAPI 
HalpQueryPciRegistryInfo (VOID)
 
INIT_SECTION VOID NTAPI HalpInitializePciStubs (VOID)
 

Variables

BOOLEAN HalpPciLockSettings
 
ULONG HalpBusType
 
PCI_TYPE1_CFG_CYCLE_BITS HalpPciDebuggingDevice [2] = {{{{0}}}}
 
BOOLEAN HalpPCIConfigInitialized
 
ULONG HalpMinPciBus
 
ULONG HalpMaxPciBus
 
KSPIN_LOCK HalpPCIConfigLock
 
PCI_CONFIG_HANDLER PCIConfigHandler
 
UCHAR PCIDeref [4][4]
 
PCI_CONFIG_HANDLER PCIConfigHandlerType1
 
PCI_CONFIG_HANDLER PCIConfigHandlerType2
 
PCIPBUSDATA HalpFakePciBusData
 
BUS_HANDLER HalpFakePciBusHandler
 

Macro Definition Documentation

#define NDEBUG

Definition at line 12 of file pcibus.c.

Function Documentation

ULONG NTAPI HaliPciInterfaceReadConfig ( IN PBUS_HANDLER  RootBusHandler,
IN ULONG  BusNumber,
IN PCI_SLOT_NUMBER  SlotNumber,
IN PVOID  Buffer,
IN ULONG  Offset,
IN ULONG  Length 
)

Definition at line 845 of file pcibus.c.

Referenced by HalpInitializePciStubs().

851 {
852  BUS_HANDLER BusHandler;
853 
854  /* Setup fake PCI Bus handler */
855  RtlCopyMemory(&BusHandler, &HalpFakePciBusHandler, sizeof(BUS_HANDLER));
856  BusHandler.BusNumber = BusNumber;
857 
858  /* Read configuration data */
860 
861  /* Return length */
862  return Length;
863 }
NTSYSAPI VOID NTAPI RtlCopyMemory(VOID UNALIGNED *Destination, CONST VOID UNALIGNED *Source, ULONG Length)
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
Definition: bufpool.h:45
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG BusNumber
Definition: halfuncs.h:156
ULONG BusNumber
Definition: haltypes.h:226
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG _In_ ULONG SlotNumber
Definition: halfuncs.h:156
VOID UINTN Length
Definition: acefiex.h:744
BUS_HANDLER HalpFakePciBusHandler
Definition: pcibus.c:104
VOID NTAPI HalpReadPCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pcibus.c:269
NTSTATUS NTAPI HalpAdjustPCIResourceList ( IN PBUS_HANDLER  BusHandler,
IN PBUS_HANDLER  RootHandler,
IN OUT PIO_RESOURCE_REQUIREMENTS_LIST pResourceList 
)

Definition at line 668 of file pcibus.c.

Referenced by HalpAllocateAndInitPciBusHandler().

671 {
672  PPCIPBUSDATA BusData;
674  PSUPPORTED_RANGE Interrupt;
676 
677  /* Get PCI bus data */
678  BusData = BusHandler->BusData;
679  SlotNumber.u.AsULONG = (*pResourceList)->SlotNumber;
680 
681  /* Get the IRQ supported range */
682  Status = BusData->GetIrqRange(BusHandler, RootHandler, SlotNumber, &Interrupt);
683  if (!NT_SUCCESS(Status)) return Status;
684 #ifndef _MINIHAL_
685  /* Handle the /PCILOCK feature */
687  {
688  /* /PCILOCK is not yet supported */
689  UNIMPLEMENTED_DBGBREAK("/PCILOCK boot switch is not yet supported.");
690  }
691 #endif
692  /* Now create the correct resource list based on the supported bus ranges */
693 #if 0
694  Status = HaliAdjustResourceListRange(BusHandler->BusAddresses,
695  Interrupt,
696  pResourceList);
697 #else
698  DPRINT1("HAL: No PCI Resource Adjustment done! Hardware may malfunction\n");
699  Status = STATUS_SUCCESS;
700 #endif
701 
702  /* Return to caller */
703  ExFreePool(Interrupt);
704  return Status;
705 }
union _PCI_SLOT_NUMBER::@3422 u
#define STATUS_SUCCESS
Definition: contextmenu.cpp:55
BOOLEAN HalpPciLockSettings
Definition: halinit.c:18
#define UNIMPLEMENTED_DBGBREAK(...)
Definition: debug.h:226
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG _In_ ULONG SlotNumber
Definition: halfuncs.h:156
Status
Definition: gdiplustypes.h:24
#define NT_SUCCESS(StatCode)
Definition: cmd.c:149
LONG NTSTATUS
Definition: DriverTester.h:11
#define DPRINT1
Definition: precomp.h:8
PciIrqRange GetIrqRange
Definition: bus.h:111
#define ExFreePool(addr)
Definition: env_spec_w32.h:352
NTSTATUS NTAPI HalpAssignPCISlotResources ( IN PBUS_HANDLER  BusHandler,
IN PBUS_HANDLER  RootHandler,
IN PUNICODE_STRING  RegistryPath,
IN PUNICODE_STRING DriverClassName  OPTIONAL,
IN PDRIVER_OBJECT  DriverObject,
IN PDEVICE_OBJECT DeviceObject  OPTIONAL,
IN ULONG  Slot,
IN OUT PCM_RESOURCE_LIST AllocatedResources 
)

Definition at line 709 of file pcibus.c.

717 {
718  PCI_COMMON_CONFIG PciConfig;
719  SIZE_T Address;
723  UCHAR Offset;
727  DPRINT1("WARNING: PCI Slot Resource Assignment is FOOBAR\n");
728 
729  /* FIXME: Should handle 64-bit addresses */
730 
731  /* Read configuration data */
732  SlotNumber.u.AsULONG = Slot;
733  HalpReadPCIConfig(BusHandler, SlotNumber, &PciConfig, 0, PCI_COMMON_HDR_LENGTH);
734 
735  /* Check if we read it correctly */
736  if (PciConfig.VendorID == PCI_INVALID_VENDORID)
737  return STATUS_NO_SUCH_DEVICE;
738 
739  /* Read the PCI configuration space for the device and store base address and
740  size information in temporary storage. Count the number of valid base addresses */
741  ResourceCount = 0;
742  for (Address = 0; Address < PCI_TYPE0_ADDRESSES; Address++)
743  {
744  if (0xffffffff == PciConfig.u.type0.BaseAddresses[Address])
745  PciConfig.u.type0.BaseAddresses[Address] = 0;
746 
747  /* Memory resource */
748  if (0 != PciConfig.u.type0.BaseAddresses[Address])
749  {
750  ResourceCount++;
751 
752  Offset = (UCHAR)FIELD_OFFSET(PCI_COMMON_CONFIG, u.type0.BaseAddresses[Address]);
753 
754  /* Write 0xFFFFFFFF there */
755  WriteBuffer = 0xffffffff;
756  HalpWritePCIConfig(BusHandler, SlotNumber, &WriteBuffer, Offset, sizeof(ULONG));
757 
758  /* Read that figure back from the config space */
759  HalpReadPCIConfig(BusHandler, SlotNumber, &Size[Address], Offset, sizeof(ULONG));
760 
761  /* Write back initial value */
762  HalpWritePCIConfig(BusHandler, SlotNumber, &PciConfig.u.type0.BaseAddresses[Address], Offset, sizeof(ULONG));
763  }
764  }
765 
766  /* Interrupt resource */
767  if (0 != PciConfig.u.type0.InterruptPin &&
768  0 != PciConfig.u.type0.InterruptLine &&
769  0xFF != PciConfig.u.type0.InterruptLine)
770  ResourceCount++;
771 
772  /* Allocate output buffer and initialize */
774  PagedPool,
775  sizeof(CM_RESOURCE_LIST) +
776  (ResourceCount - 1) * sizeof(CM_PARTIAL_RESOURCE_DESCRIPTOR),
777  TAG_HAL);
778 
779  if (NULL == *AllocatedResources)
780  return STATUS_NO_MEMORY;
781 
782  (*AllocatedResources)->Count = 1;
783  (*AllocatedResources)->List[0].InterfaceType = PCIBus;
784  (*AllocatedResources)->List[0].BusNumber = BusHandler->BusNumber;
785  (*AllocatedResources)->List[0].PartialResourceList.Version = 1;
786  (*AllocatedResources)->List[0].PartialResourceList.Revision = 1;
787  (*AllocatedResources)->List[0].PartialResourceList.Count = ResourceCount;
788  Descriptor = (*AllocatedResources)->List[0].PartialResourceList.PartialDescriptors;
789 
790  /* Store configuration information */
791  for (Address = 0; Address < PCI_TYPE0_ADDRESSES; Address++)
792  {
793  if (0 != PciConfig.u.type0.BaseAddresses[Address])
794  {
796  (PciConfig.u.type0.BaseAddresses[Address] & 0x1))
797  {
798  Descriptor->Type = CmResourceTypeMemory;
799  Descriptor->ShareDisposition = CmResourceShareDeviceExclusive; /* FIXME I have no idea... */
800  Descriptor->Flags = CM_RESOURCE_MEMORY_READ_WRITE; /* FIXME Just a guess */
801  Descriptor->u.Memory.Start.QuadPart = (PciConfig.u.type0.BaseAddresses[Address] & PCI_ADDRESS_MEMORY_ADDRESS_MASK);
802  Descriptor->u.Memory.Length = PciSize(Size[Address], PCI_ADDRESS_MEMORY_ADDRESS_MASK);
803  }
804  else if (PCI_ADDRESS_IO_SPACE ==
805  (PciConfig.u.type0.BaseAddresses[Address] & 0x1))
806  {
807  Descriptor->Type = CmResourceTypePort;
808  Descriptor->ShareDisposition = CmResourceShareDeviceExclusive; /* FIXME I have no idea... */
809  Descriptor->Flags = CM_RESOURCE_PORT_IO; /* FIXME Just a guess */
810  Descriptor->u.Port.Start.QuadPart = PciConfig.u.type0.BaseAddresses[Address] &= PCI_ADDRESS_IO_ADDRESS_MASK;
811  Descriptor->u.Port.Length = PciSize(Size[Address], PCI_ADDRESS_IO_ADDRESS_MASK & 0xffff);
812  }
813  else
814  {
815  ASSERT(FALSE);
816  return STATUS_UNSUCCESSFUL;
817  }
818  Descriptor++;
819  }
820  }
821 
822  if (0 != PciConfig.u.type0.InterruptPin &&
823  0 != PciConfig.u.type0.InterruptLine &&
824  0xFF != PciConfig.u.type0.InterruptLine)
825  {
826  Descriptor->Type = CmResourceTypeInterrupt;
827  Descriptor->ShareDisposition = CmResourceShareShared; /* FIXME Just a guess */
828  Descriptor->Flags = CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE; /* FIXME Just a guess */
829  Descriptor->u.Interrupt.Level = PciConfig.u.type0.InterruptLine;
830  Descriptor->u.Interrupt.Vector = PciConfig.u.type0.InterruptLine;
831  Descriptor->u.Interrupt.Affinity = 0xFFFFFFFF;
832 
833  Descriptor++;
834  }
835 
836  ASSERT(Descriptor == (*AllocatedResources)->List[0].PartialResourceList.PartialDescriptors + ResourceCount);
837 
838  /* FIXME: Should store the resources in the registry resource map */
839 
840  return Status;
841 }
union _PCI_SLOT_NUMBER::@3422 u
#define STATUS_SUCCESS
Definition: contextmenu.cpp:55
#define PCI_TYPE0_ADDRESSES
Definition: iotypes.h:3111
#define PCI_ADDRESS_IO_ADDRESS_MASK
Definition: iotypes.h:3844
PVOID ULONG Address
Definition: oprghdlr.h:14
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@357::@360 Interrupt
_Inout_opt_ PDEVICE_OBJECT _Inout_opt_ PDEVICE_OBJECT _Inout_opt_ PDEVICE_OBJECT _Inout_opt_ PCM_RESOURCE_LIST * AllocatedResources
Definition: ndis.h:4621
ASSERT((InvokeOnSuccess||InvokeOnError||InvokeOnCancel)?(CompletionRoutine!=NULL):TRUE)
_In_ CLIPOBJ _In_ BRUSHOBJ _In_ LONG x1
Definition: winddi.h:3706
#define PCI_ADDRESS_MEMORY_SPACE
Definition: bus.h:3
GLenum GLclampf GLint GLenum GLuint GLenum GLenum GLsizei GLenum const GLvoid GLfloat GLfloat GLfloat GLfloat GLclampd GLint GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean GLboolean GLboolean GLboolean GLint GLenum GLsizei const GLvoid GLenum GLint GLenum GLint GLint GLsizei GLint GLenum GLint GLint GLint GLint GLsizei GLenum GLsizei const GLuint GLboolean GLenum GLenum GLint GLsizei GLenum GLsizei GLenum const GLvoid GLboolean const GLboolean GLenum const GLdouble * u
Definition: glfuncs.h:88
#define CM_RESOURCE_MEMORY_READ_WRITE
Definition: cmtypes.h:93
#define CmResourceTypePort
Definition: hwresource.cpp:123
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
#define FALSE
Definition: types.h:117
#define PCI_ADDRESS_MEMORY_ADDRESS_MASK
Definition: iotypes.h:3845
smooth NULL
Definition: ftsmooth.c:513
UINTN Size
Definition: acefiex.h:555
#define PCI_INVALID_VENDORID
Definition: iotypes.h:3212
#define STATUS_NO_SUCH_DEVICE
Definition: udferr_usr.h:136
#define STATUS_UNSUCCESSFUL
Definition: udferr_usr.h:132
#define ExAllocatePoolWithTag(hernya, size, tag)
Definition: env_spec_w32.h:350
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG _In_ ULONG SlotNumber
Definition: halfuncs.h:156
static ULONG ResourceCount
Definition: inbv.c:43
unsigned char UCHAR
Definition: xmlstorage.h:181
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@357::@359 Port
#define TAG_HAL
Definition: hal.h:55
Status
Definition: gdiplustypes.h:24
ULONG_PTR SIZE_T
Definition: typedefs.h:79
LONG NTSTATUS
Definition: DriverTester.h:11
#define CM_RESOURCE_PORT_IO
Definition: cmtypes.h:82
VOID NTAPI HalpWritePCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pcibus.c:295
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@357::@362 Memory
#define STATUS_NO_MEMORY
Definition: ntstatus.h:246
#define FIELD_OFFSET(t, f)
Definition: typedefs.h:255
#define CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE
Definition: cmtypes.h:116
#define CmResourceTypeInterrupt
Definition: hwresource.cpp:124
#define DPRINT1
Definition: precomp.h:8
unsigned int ULONG
Definition: retypes.h:1
VOID NTAPI HalpReadPCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pcibus.c:269
union _CM_PARTIAL_RESOURCE_DESCRIPTOR::@357 u
static ULONG NTAPI PciSize(ULONG Base, ULONG Mask)
Definition: pcibus.c:659
#define CmResourceTypeMemory
Definition: hwresource.cpp:125
#define PCI_ADDRESS_IO_SPACE
Definition: iotypes.h:3841
#define WriteBuffer(BaseIoAddress, Buffer, Count)
Definition: atapi.h:344
#define PCI_COMMON_HDR_LENGTH
Definition: iotypes.h:3205
_In_ PSTORAGE_PROPERTY_ID _Outptr_ PSTORAGE_DESCRIPTOR_HEADER * Descriptor
Definition: classpnp.h:966
NTSTATUS NTAPI HalpGetISAFixedPCIIrq ( IN PBUS_HANDLER  BusHandler,
IN PBUS_HANDLER  RootHandler,
IN PCI_SLOT_NUMBER  PciSlot,
OUT PSUPPORTED_RANGE Range 
)

Definition at line 567 of file pcibus.c.

Referenced by HalpAllocateAndInitPciBusHandler().

571 {
572  PCI_COMMON_HEADER PciData;
573 
574  /* Read PCI configuration data */
576  BusHandler->BusNumber,
577  PciSlot.u.AsULONG,
578  &PciData,
580 
581  /* Make sure it's a real device */
582  if (PciData.VendorID == PCI_INVALID_VENDORID) return STATUS_UNSUCCESSFUL;
583 
584  /* Allocate the supported range structure */
586  if (!*Range) return STATUS_INSUFFICIENT_RESOURCES;
587 
588  /* Set it up */
590  (*Range)->Base = 1;
591 
592  /* If the PCI device has no IRQ, nothing to do */
593  if (!PciData.u.type0.InterruptPin) return STATUS_SUCCESS;
594 
595  /* FIXME: The PCI IRQ Routing Miniport should be called */
596 
597  /* Also if the INT# seems bogus, nothing to do either */
598  if ((PciData.u.type0.InterruptLine == 0) ||
599  (PciData.u.type0.InterruptLine == 255))
600  {
601  /* Fake success */
602  return STATUS_SUCCESS;
603  }
604 
605  /* Otherwise, the INT# should be valid, return it to the caller */
606  (*Range)->Base = PciData.u.type0.InterruptLine;
607  (*Range)->Limit = PciData.u.type0.InterruptLine;
608  return STATUS_SUCCESS;
609 }
#define STATUS_SUCCESS
Definition: contextmenu.cpp:55
#define STATUS_INSUFFICIENT_RESOURCES
Definition: udferr_usr.h:158
#define PCI_INVALID_VENDORID
Definition: iotypes.h:3212
NTHALAPI ULONG NTAPI HalGetBusData(BUS_DATA_TYPE, ULONG, ULONG, PVOID, ULONG)
#define STATUS_UNSUCCESSFUL
Definition: udferr_usr.h:132
#define ExAllocatePoolWithTag(hernya, size, tag)
Definition: env_spec_w32.h:350
#define TAG_HAL
Definition: hal.h:55
Definition: range.c:23
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:262
#define PCI_COMMON_HDR_LENGTH
Definition: iotypes.h:3205
ULONG NTAPI HalpGetPCIData ( IN PBUS_HANDLER  BusHandler,
IN PBUS_HANDLER  RootHandler,
IN ULONG  SlotNumber,
IN PVOID  Buffer,
IN ULONG  Offset,
IN ULONG  Length 
)

Definition at line 352 of file pcibus.c.

358 {
359  PCI_SLOT_NUMBER Slot;
360  UCHAR PciBuffer[PCI_COMMON_HDR_LENGTH];
361  PPCI_COMMON_CONFIG PciConfig = (PPCI_COMMON_CONFIG)PciBuffer;
362  ULONG Len = 0;
363 
364  Slot.u.AsULONG = SlotNumber;
365 #ifdef SARCH_XBOX
366  /* Trying to get PCI config data from devices 0:0:1 and 0:0:2 will completely
367  * hang the Xbox. Also, the device number doesn't seem to be decoded for the
368  * video card, so it appears to be present on 1:0:0 - 1:31:0.
369  * We hack around these problems by indicating "device not present" for devices
370  * 0:0:1, 0:0:2, 1:1:0, 1:2:0, 1:3:0, ...., 1:31:0 */
371  if ((0 == BusHandler->BusNumber && 0 == Slot.u.bits.DeviceNumber &&
372  (1 == Slot.u.bits.FunctionNumber || 2 == Slot.u.bits.FunctionNumber)) ||
373  (1 == BusHandler->BusNumber && 0 != Slot.u.bits.DeviceNumber))
374  {
375  DPRINT("Blacklisted PCI slot\n");
376  if (0 == Offset && sizeof(USHORT) <= Length)
377  {
379  return sizeof(USHORT);
380  }
381  return 0;
382  }
383 #endif
384 
385  /* Normalize the length */
386  if (Length > sizeof(PCI_COMMON_CONFIG)) Length = sizeof(PCI_COMMON_CONFIG);
387 
388  /* Check if this is a vendor-specific read */
390  {
391  /* Read the header */
392  HalpReadPCIConfig(BusHandler, Slot, PciConfig, 0, sizeof(ULONG));
393 
394  /* Make sure the vendor is valid */
395  if (PciConfig->VendorID == PCI_INVALID_VENDORID) return 0;
396  }
397  else
398  {
399  /* Read the entire header */
400  Len = PCI_COMMON_HDR_LENGTH;
401  HalpReadPCIConfig(BusHandler, Slot, PciConfig, 0, Len);
402 
403  /* Validate the vendor ID */
404  if (PciConfig->VendorID == PCI_INVALID_VENDORID)
405  {
406  /* It's invalid, but we want to return this much */
407  Len = sizeof(USHORT);
408  }
409 
410  /* Now check if there's space left */
411  if (Len < Offset) return 0;
412 
413  /* There is, so return what's after the offset and normalize */
414  Len -= Offset;
415  if (Len > Length) Len = Length;
416 
417  /* Copy the data into the caller's buffer */
418  RtlMoveMemory(Buffer, PciBuffer + Offset, Len);
419 
420  /* Update buffer and offset, decrement total length */
421  Offset += Len;
422  Buffer = (PVOID)((ULONG_PTR)Buffer + Len);
423  Length -= Len;
424  }
425 
426  /* Now we still have something to copy */
427  if (Length)
428  {
429  /* Check if it's vendor-specific data */
431  {
432  /* Read it now */
433  HalpReadPCIConfig(BusHandler, Slot, Buffer, Offset, Length);
434  Len += Length;
435  }
436  }
437 
438  /* Update the total length read */
439  return Len;
440 }
DWORD *typedef PVOID
Definition: winlogon.h:52
union _PCI_SLOT_NUMBER::@3422 u
struct _PCI_SLOT_NUMBER::@3422::@3423 bits
struct _PCI_COMMON_CONFIG * PPCI_COMMON_CONFIG
#define RtlMoveMemory(Destination, Source, Length)
Definition: typedefs.h:264
uint32_t ULONG_PTR
Definition: typedefs.h:64
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
void DPRINT(...)
Definition: polytest.cpp:61
Definition: bufpool.h:45
#define PCI_INVALID_VENDORID
Definition: iotypes.h:3212
unsigned short * PUSHORT
Definition: retypes.h:2
#define Len
Definition: deflate.h:82
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG _In_ ULONG SlotNumber
Definition: halfuncs.h:156
unsigned char UCHAR
Definition: xmlstorage.h:181
VOID UINTN Length
Definition: acefiex.h:744
unsigned short USHORT
Definition: pedump.c:61
unsigned int ULONG
Definition: retypes.h:1
VOID NTAPI HalpReadPCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pcibus.c:269
#define PCI_COMMON_HDR_LENGTH
Definition: iotypes.h:3205
ULONG NTAPI HalpGetPCIIntOnISABus ( IN PBUS_HANDLER  BusHandler,
IN PBUS_HANDLER  RootHandler,
IN ULONG  BusInterruptLevel,
IN ULONG  BusInterruptVector,
OUT PKIRQL  Irql,
OUT PKAFFINITY  Affinity 
)

Definition at line 525 of file pcibus.c.

Referenced by HalpAllocateAndInitPciBusHandler().

531 {
532  /* Validate the level first */
533  if (BusInterruptLevel < 1) return 0;
534 
535  /* PCI has its IRQs on top of ISA IRQs, so pass it on to the ISA handler */
536  return HalGetInterruptVector(Isa,
537  0,
539  0,
540  Irql,
541  Affinity);
542 }
_In_ ULONG _In_ ULONG BusInterruptLevel
Definition: halfuncs.h:170
NTHALAPI ULONG NTAPI HalGetInterruptVector(INTERFACE_TYPE, ULONG, ULONG, ULONG, PKIRQL, PKAFFINITY)
_Out_ PKIRQL Irql
Definition: csq.h:179
_In_ ULONG _In_ ULONG _In_ ULONG _Out_ PKIRQL _Out_ PKAFFINITY Affinity
Definition: halfuncs.h:170
INIT_SECTION VOID NTAPI HalpInitializePciStubs ( VOID  )

Definition at line 1101 of file pcibus.c.

1102 {
1103  PPCI_REGISTRY_INFO_INTERNAL PciRegistryInfo;
1104  UCHAR PciType;
1106  ULONG i;
1108  ULONG VendorId = 0;
1109  ULONG MaxPciBusNumber;
1110 
1111  /* Query registry information */
1112  PciRegistryInfo = HalpQueryPciRegistryInfo();
1113  if (!PciRegistryInfo)
1114  {
1115  /* Assume type 1 */
1116  PciType = 1;
1117 
1118  /* Force a manual bus scan later */
1119  MaxPciBusNumber = MAXULONG;
1120  }
1121  else
1122  {
1123  /* Get the PCI type */
1124  PciType = PciRegistryInfo->HardwareMechanism & 0xF;
1125 
1126  /* Get MaxPciBusNumber and make it 0-based */
1127  MaxPciBusNumber = PciRegistryInfo->NoBuses - 1;
1128 
1129  /* Free the info structure */
1130  ExFreePoolWithTag(PciRegistryInfo, TAG_HAL);
1131  }
1132 
1133  /* Initialize the PCI lock */
1135 
1136  /* Check the type of PCI bus */
1137  switch (PciType)
1138  {
1139  /* Type 1 PCI Bus */
1140  case 1:
1141 
1142  /* Copy the Type 1 handler data */
1145  sizeof(PCIConfigHandler));
1146 
1147  /* Set correct I/O Ports */
1148  BusData->Config.Type1.Address = PCI_TYPE1_ADDRESS_PORT;
1149  BusData->Config.Type1.Data = PCI_TYPE1_DATA_PORT;
1150  break;
1151 
1152  /* Type 2 PCI Bus */
1153  case 2:
1154 
1155  /* Copy the Type 2 handler data */
1158  sizeof (PCIConfigHandler));
1159 
1160  /* Set correct I/O Ports */
1161  BusData->Config.Type2.CSE = PCI_TYPE2_CSE_PORT;
1162  BusData->Config.Type2.Forward = PCI_TYPE2_FORWARD_PORT;
1163  BusData->Config.Type2.Base = PCI_TYPE2_ADDRESS_BASE;
1164 
1165  /* Only 16 devices supported, not 32 */
1166  BusData->MaxDevice = 16;
1167  break;
1168 
1169  default:
1170 
1171  /* Invalid type */
1172  DbgPrint("HAL: Unknown PCI type\n");
1173  }
1174 
1175  /* Run a forced bus scan if needed */
1176  if (MaxPciBusNumber == MAXULONG)
1177  {
1178  /* Initialize the max bus number to 0xFF */
1179  HalpMaxPciBus = 0xFF;
1180 
1181  /* Initialize the counter */
1182  MaxPciBusNumber = 0;
1183 
1184  /* Loop all possible buses */
1185  for (i = 0; i < HalpMaxPciBus; i++)
1186  {
1187  /* Loop all devices */
1188  for (j.u.AsULONG = 0; j.u.AsULONG < BusData->MaxDevice; j.u.AsULONG++)
1189  {
1190  /* Query the interface */
1192  i,
1193  j,
1194  &VendorId,
1195  0,
1196  sizeof(ULONG)))
1197  {
1198  /* Validate the vendor ID */
1199  if ((VendorId & 0xFFFF) != PCI_INVALID_VENDORID)
1200  {
1201  /* Set this as the maximum ID */
1202  MaxPciBusNumber = i;
1203  break;
1204  }
1205  }
1206  }
1207  }
1208  }
1209 
1210  /* Set the real max bus number */
1211  HalpMaxPciBus = MaxPciBusNumber;
1212 
1213  /* We're done */
1215 }
GLenum GLclampf GLint GLenum GLuint GLenum GLenum GLsizei GLenum const GLvoid GLfloat GLfloat GLfloat GLfloat GLclampd GLint GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean GLboolean GLboolean GLboolean GLint GLenum GLsizei const GLvoid GLenum GLint GLenum GLint GLint GLsizei GLint GLenum GLint GLint GLint GLint GLsizei GLenum GLsizei const GLuint GLboolean GLenum GLenum GLint GLsizei GLenum GLsizei GLenum const GLvoid GLboolean const GLboolean GLenum const GLdouble const GLfloat const GLdouble const GLfloat GLenum GLint GLint GLint GLint GLint GLint j
Definition: glfuncs.h:98
#define TRUE
Definition: types.h:120
NTSYSAPI VOID NTAPI RtlCopyMemory(VOID UNALIGNED *Destination, CONST VOID UNALIGNED *Source, ULONG Length)
struct _PCIPBUSDATA::@1273::@1274 Type1
union _PCIPBUSDATA::@1273 Config
#define PCI_TYPE2_FORWARD_PORT
Definition: bus.h:171
ULONG MaxDevice
Definition: bus.h:100
#define DbgPrint
Definition: loader.c:26
#define PCI_TYPE1_ADDRESS_PORT
Definition: bus.h:164
struct _PCIPBUSDATA::@1273::@1275 Type2
GLenum GLclampf GLint i
Definition: glfuncs.h:14
FORCEINLINE VOID KeInitializeSpinLock(_Out_ PKSPIN_LOCK SpinLock)
Definition: kefuncs.h:251
smooth NULL
Definition: ftsmooth.c:513
#define PCI_TYPE1_DATA_PORT
Definition: bus.h:165
PCI_CONFIG_HANDLER PCIConfigHandler
Definition: pcibus.c:33
#define PCI_INVALID_VENDORID
Definition: iotypes.h:3212
KSPIN_LOCK HalpPCIConfigLock
Definition: pcibus.c:32
unsigned char UCHAR
Definition: xmlstorage.h:181
#define TAG_HAL
Definition: hal.h:55
PCI_CONFIG_HANDLER PCIConfigHandlerType2
Definition: pcibus.c:67
#define PCI_TYPE2_CSE_PORT
Definition: bus.h:170
BUS_HANDLER HalpFakePciBusHandler
Definition: pcibus.c:104
#define MAXULONG
Definition: typedefs.h:251
PCI_CONFIG_HANDLER PCIConfigHandlerType1
Definition: pcibus.c:45
BOOLEAN HalpPCIConfigInitialized
Definition: pcibus.c:30
struct _PCIPBUSDATA * PPCIPBUSDATA
unsigned int ULONG
Definition: retypes.h:1
ULONG NTAPI HaliPciInterfaceReadConfig(IN PBUS_HANDLER RootBusHandler, IN ULONG BusNumber, IN PCI_SLOT_NUMBER SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pcibus.c:845
#define ExFreePoolWithTag(_P, _T)
Definition: module.h:1097
INIT_SECTION PPCI_REGISTRY_INFO_INTERNAL NTAPI HalpQueryPciRegistryInfo(VOID)
Definition: pcibus.c:868
#define PCI_TYPE2_ADDRESS_BASE
Definition: bus.h:172
PVOID BusData
Definition: haltypes.h:229
ULONG HalpMaxPciBus
Definition: pcibus.c:31
VOID NTAPI HalpPCIConfig ( IN PBUS_HANDLER  BusHandler,
IN PCI_SLOT_NUMBER  Slot,
IN PUCHAR  Buffer,
IN ULONG  Offset,
IN ULONG  Length,
IN FncConfigIO ConfigIO 
)

Definition at line 231 of file pcibus.c.

Referenced by HalpReadPCIConfig(), and HalpWritePCIConfig().

237 {
238  KIRQL OldIrql;
239  ULONG i;
240  UCHAR State[20];
241 
242  /* Synchronize the operation */
243  PCIConfigHandler.Synchronize(BusHandler, Slot, &OldIrql, State);
244 
245  /* Loop every increment */
246  while (Length)
247  {
248  /* Find out the type of read/write we need to do */
249  i = PCIDeref[Offset % sizeof(ULONG)][Length % sizeof(ULONG)];
250 
251  /* Do the read/write and return the number of bytes */
252  i = ConfigIO[i]((PPCIPBUSDATA)BusHandler->BusData,
253  State,
254  Buffer,
255  Offset);
256 
257  /* Increment the buffer position and offset, and decrease the length */
258  Offset += i;
259  Buffer += i;
260  Length -= i;
261  }
262 
263  /* Release the lock and PCI bus */
264  PCIConfigHandler.ReleaseSynchronzation(BusHandler, OldIrql);
265 }
FncReleaseSync ReleaseSynchronzation
Definition: bus.h:128
UCHAR KIRQL
Definition: env_spec_w32.h:591
GLenum GLclampf GLint i
Definition: glfuncs.h:14
UCHAR PCIDeref[4][4]
Definition: pcibus.c:36
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
Definition: bufpool.h:45
PCI_CONFIG_HANDLER PCIConfigHandler
Definition: pcibus.c:33
unsigned char UCHAR
Definition: xmlstorage.h:181
VOID UINTN Length
Definition: acefiex.h:744
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
FncSync Synchronize
Definition: bus.h:127
struct _PCIPBUSDATA * PPCIPBUSDATA
unsigned int ULONG
Definition: retypes.h:1
VOID NTAPI HalpPCIISALine2Pin ( IN PBUS_HANDLER  BusHandler,
IN PBUS_HANDLER  RootHandler,
IN PCI_SLOT_NUMBER  SlotNumber,
IN PPCI_COMMON_CONFIG  PciNewData,
IN PPCI_COMMON_CONFIG  PciOldData 
)

Definition at line 556 of file pcibus.c.

Referenced by HalpAllocateAndInitPciBusHandler().

561 {
563 }
#define UNIMPLEMENTED_DBGBREAK(...)
Definition: debug.h:226
VOID NTAPI HalpPCIPin2ISALine ( IN PBUS_HANDLER  BusHandler,
IN PBUS_HANDLER  RootHandler,
IN PCI_SLOT_NUMBER  SlotNumber,
IN PPCI_COMMON_CONFIG  PciData 
)

Definition at line 546 of file pcibus.c.

Referenced by HalpAllocateAndInitPciBusHandler().

550 {
552 }
#define UNIMPLEMENTED_DBGBREAK(...)
Definition: debug.h:226
VOID NTAPI HalpPCIReleaseSynchronizationType2 ( IN PBUS_HANDLER  BusHandler,
IN KIRQL  Irql 
)

Definition at line 204 of file pcibus.c.

206 {
207  PCI_TYPE2_CSE_BITS PciCfg2Cse;
208  PPCIPBUSDATA BusData = (PPCIPBUSDATA)BusHandler->BusData;
209 
210  /* Clear CSE and bus number */
211  PciCfg2Cse.u.AsUCHAR = 0;
212  WRITE_PORT_UCHAR(BusData->Config.Type2.CSE, PciCfg2Cse.u.AsUCHAR);
213  WRITE_PORT_UCHAR(BusData->Config.Type2.Forward, 0);
214 
215  /* Release the lock */
217  KeLowerIrql(Irql);
218 }
#define KeLowerIrql(oldIrql)
Definition: env_spec_w32.h:602
union _PCIPBUSDATA::@1273 Config
_Out_ PKIRQL Irql
Definition: csq.h:179
struct _PCIPBUSDATA::@1273::@1275 Type2
VOID FASTCALL KiReleaseSpinLock(IN PKSPIN_LOCK SpinLock)
Definition: ntoskrnl.c:39
KSPIN_LOCK HalpPCIConfigLock
Definition: pcibus.c:32
struct _PCIPBUSDATA * PPCIPBUSDATA
UCHAR AsUCHAR
Definition: bus.h:210
void WRITE_PORT_UCHAR(PUCHAR Address, UCHAR Value)
Definition: mach.c:539
union _PCI_TYPE2_CSE_BITS::@1314 u
VOID NTAPI HalpPCIReleaseSynchronzationType1 ( IN PBUS_HANDLER  BusHandler,
IN KIRQL  Irql 
)

Definition at line 147 of file pcibus.c.

149 {
150  PCI_TYPE1_CFG_BITS PciCfg1;
151 
152  /* Clear the PCI Configuration Register */
153  PciCfg1.u.AsULONG = 0;
154  WRITE_PORT_ULONG(((PPCIPBUSDATA)BusHandler->BusData)->Config.Type1.Address,
155  PciCfg1.u.AsULONG);
156 
157  /* Release the lock */
159  KeLowerIrql(Irql);
160 }
#define KeLowerIrql(oldIrql)
Definition: env_spec_w32.h:602
_Out_ PKIRQL Irql
Definition: csq.h:179
VOID NTAPI WRITE_PORT_ULONG(IN PULONG Port, IN ULONG Value)
Definition: portio.c:123
VOID FASTCALL KiReleaseSpinLock(IN PKSPIN_LOCK SpinLock)
Definition: ntoskrnl.c:39
KSPIN_LOCK HalpPCIConfigLock
Definition: pcibus.c:32
union _PCI_TYPE1_CFG_BITS::@1312 u
ULONG AsULONG
Definition: bus.h:192
VOID NTAPI HalpPCISynchronizeType1 ( IN PBUS_HANDLER  BusHandler,
IN PCI_SLOT_NUMBER  Slot,
IN PKIRQL  Irql,
IN PPCI_TYPE1_CFG_BITS  PciCfg1 
)

Definition at line 128 of file pcibus.c.

132 {
133  /* Setup the PCI Configuration Register */
134  PciCfg1->u.AsULONG = 0;
135  PciCfg1->u.bits.BusNumber = BusHandler->BusNumber;
136  PciCfg1->u.bits.DeviceNumber = Slot.u.bits.DeviceNumber;
137  PciCfg1->u.bits.FunctionNumber = Slot.u.bits.FunctionNumber;
138  PciCfg1->u.bits.Enable = TRUE;
139 
140  /* Acquire the lock */
143 }
#define KeRaiseIrql(irql, oldIrql)
Definition: env_spec_w32.h:597
#define TRUE
Definition: types.h:120
_Out_ PKIRQL Irql
Definition: csq.h:179
KSPIN_LOCK HalpPCIConfigLock
Definition: pcibus.c:32
#define HIGH_LEVEL
Definition: env_spec_w32.h:703
VOID FASTCALL KiAcquireSpinLock(IN PKSPIN_LOCK SpinLock)
Definition: ntoskrnl.c:32
VOID NTAPI HalpPCISynchronizeType2 ( IN PBUS_HANDLER  BusHandler,
IN PCI_SLOT_NUMBER  Slot,
IN PKIRQL  Irql,
IN PPCI_TYPE2_ADDRESS_BITS  PciCfg 
)

Definition at line 173 of file pcibus.c.

177 {
178  PCI_TYPE2_CSE_BITS PciCfg2Cse;
179  PPCIPBUSDATA BusData = (PPCIPBUSDATA)BusHandler->BusData;
180 
181  /* Setup the configuration register */
182  PciCfg->u.AsUSHORT = 0;
183  PciCfg->u.bits.Agent = (USHORT)Slot.u.bits.DeviceNumber;
184  PciCfg->u.bits.AddressBase = (USHORT)BusData->Config.Type2.Base;
185 
186  /* Acquire the lock */
189 
190  /* Setup the CSE Register */
191  PciCfg2Cse.u.AsUCHAR = 0;
192  PciCfg2Cse.u.bits.Enable = TRUE;
193  PciCfg2Cse.u.bits.FunctionNumber = (UCHAR)Slot.u.bits.FunctionNumber;
194  PciCfg2Cse.u.bits.Key = -1;
195 
196  /* Write the bus number and CSE */
197  WRITE_PORT_UCHAR(BusData->Config.Type2.Forward,
198  (UCHAR)BusHandler->BusNumber);
199  WRITE_PORT_UCHAR(BusData->Config.Type2.CSE, PciCfg2Cse.u.AsUCHAR);
200 }
#define KeRaiseIrql(irql, oldIrql)
Definition: env_spec_w32.h:597
#define TRUE
Definition: types.h:120
union _PCIPBUSDATA::@1273 Config
_Out_ PKIRQL Irql
Definition: csq.h:179
struct _PCIPBUSDATA::@1273::@1275 Type2
KSPIN_LOCK HalpPCIConfigLock
Definition: pcibus.c:32
unsigned char UCHAR
Definition: xmlstorage.h:181
struct _PCI_TYPE2_CSE_BITS::@1314::@1315 bits
#define HIGH_LEVEL
Definition: env_spec_w32.h:703
unsigned short USHORT
Definition: pedump.c:61
VOID FASTCALL KiAcquireSpinLock(IN PKSPIN_LOCK SpinLock)
Definition: ntoskrnl.c:32
struct _PCIPBUSDATA * PPCIPBUSDATA
UCHAR AsUCHAR
Definition: bus.h:210
void WRITE_PORT_UCHAR(PUCHAR Address, UCHAR Value)
Definition: mach.c:539
union _PCI_TYPE2_CSE_BITS::@1314 u
INIT_SECTION PPCI_REGISTRY_INFO_INTERNAL NTAPI HalpQueryPciRegistryInfo ( VOID  )

Definition at line 868 of file pcibus.c.

Referenced by HalpInitializePciStubs().

869 {
870 #ifndef _MINIHAL_
871  WCHAR NameBuffer[8];
873  UNICODE_STRING KeyName, ConfigName, IdentName;
874  HANDLE KeyHandle, BusKeyHandle, CardListHandle;
876  UCHAR KeyBuffer[sizeof(CM_FULL_RESOURCE_DESCRIPTOR) + 100];
877  PKEY_VALUE_FULL_INFORMATION ValueInfo = (PVOID)KeyBuffer;
878  UCHAR PartialKeyBuffer[sizeof(KEY_VALUE_PARTIAL_INFORMATION) +
879  sizeof(PCI_CARD_DESCRIPTOR)];
880  PKEY_VALUE_PARTIAL_INFORMATION PartialValueInfo = (PVOID)PartialKeyBuffer;
881  KEY_FULL_INFORMATION KeyInformation;
883  PWSTR Tag;
884  ULONG i, ElementCount;
885  PCM_FULL_RESOURCE_DESCRIPTOR FullDescriptor;
886  PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptor;
887  PPCI_REGISTRY_INFO PciRegInfo;
888  PPCI_REGISTRY_INFO_INTERNAL PciRegistryInfo;
889  PPCI_CARD_DESCRIPTOR CardDescriptor;
890 
891  /* Setup the object attributes for the key */
892  RtlInitUnicodeString(&KeyName,
893  L"\\Registry\\Machine\\Hardware\\Description\\"
894  L"System\\MultiFunctionAdapter");
895  InitializeObjectAttributes(&ObjectAttributes,
896  &KeyName,
898  NULL,
899  NULL);
900 
901  /* Open the key */
902  Status = ZwOpenKey(&KeyHandle, KEY_READ, &ObjectAttributes);
903  if (!NT_SUCCESS(Status)) return NULL;
904 
905  /* Setup the receiving string */
906  KeyName.Buffer = NameBuffer;
907  KeyName.MaximumLength = sizeof(NameBuffer);
908 
909  /* Setup the configuration and identifier key names */
910  RtlInitUnicodeString(&ConfigName, L"Configuration Data");
911  RtlInitUnicodeString(&IdentName, L"Identifier");
912 
913  /* Keep looping for each ID */
914  for (i = 0; TRUE; i++)
915  {
916  /* Setup the key name */
917  RtlIntegerToUnicodeString(i, 10, &KeyName);
918  InitializeObjectAttributes(&ObjectAttributes,
919  &KeyName,
921  KeyHandle,
922  NULL);
923 
924  /* Open it */
925  Status = ZwOpenKey(&BusKeyHandle, KEY_READ, &ObjectAttributes);
926  if (!NT_SUCCESS(Status))
927  {
928  /* None left, fail */
929  ZwClose(KeyHandle);
930  return NULL;
931  }
932 
933  /* Read the registry data */
934  Status = ZwQueryValueKey(BusKeyHandle,
935  &IdentName,
937  ValueInfo,
938  sizeof(KeyBuffer),
939  &ResultLength);
940  if (!NT_SUCCESS(Status))
941  {
942  /* Failed, try the next one */
943  ZwClose(BusKeyHandle);
944  continue;
945  }
946 
947  /* Get the PCI Tag and validate it */
948  Tag = (PWSTR)((ULONG_PTR)ValueInfo + ValueInfo->DataOffset);
949  if ((Tag[0] != L'P') ||
950  (Tag[1] != L'C') ||
951  (Tag[2] != L'I') ||
952  (Tag[3]))
953  {
954  /* Not a valid PCI entry, skip it */
955  ZwClose(BusKeyHandle);
956  continue;
957  }
958 
959  /* Now read our PCI structure */
960  Status = ZwQueryValueKey(BusKeyHandle,
961  &ConfigName,
963  ValueInfo,
964  sizeof(KeyBuffer),
965  &ResultLength);
966  ZwClose(BusKeyHandle);
967  if (!NT_SUCCESS(Status)) continue;
968 
969  /* We read it OK! Get the actual resource descriptors */
970  FullDescriptor = (PCM_FULL_RESOURCE_DESCRIPTOR)
971  ((ULONG_PTR)ValueInfo + ValueInfo->DataOffset);
972  PartialDescriptor = (PCM_PARTIAL_RESOURCE_DESCRIPTOR)
973  ((ULONG_PTR)FullDescriptor->
974  PartialResourceList.PartialDescriptors);
975 
976  /* Check if this is our PCI Registry Information */
977  if (PartialDescriptor->Type == CmResourceTypeDeviceSpecific)
978  {
979  /* It is, stop searching */
980  break;
981  }
982  }
983 
984  /* Close the key */
985  ZwClose(KeyHandle);
986 
987  /* Save the PCI information for later */
988  PciRegInfo = (PPCI_REGISTRY_INFO)(PartialDescriptor + 1);
989 
990  /* Assume no Card List entries */
991  ElementCount = 0;
992 
993  /* Set up for checking the PCI Card List key */
994  RtlInitUnicodeString(&KeyName,
995  L"\\Registry\\Machine\\System\\CurrentControlSet\\"
996  L"Control\\PnP\\PCI\\CardList");
997  InitializeObjectAttributes(&ObjectAttributes,
998  &KeyName,
1000  NULL,
1001  NULL);
1002 
1003  /* Attempt to open it */
1004  Status = ZwOpenKey(&CardListHandle, KEY_READ, &ObjectAttributes);
1005  if (NT_SUCCESS(Status))
1006  {
1007  /* It exists, so let's query it */
1008  Status = ZwQueryKey(CardListHandle,
1010  &KeyInformation,
1011  sizeof(KEY_FULL_INFORMATION),
1012  &ResultLength);
1013  if (!NT_SUCCESS(Status))
1014  {
1015  /* Failed to query, so no info */
1016  PciRegistryInfo = NULL;
1017  }
1018  else
1019  {
1020  /* Allocate the full structure */
1021  PciRegistryInfo =
1023  sizeof(PCI_REGISTRY_INFO_INTERNAL) +
1024  (KeyInformation.Values *
1025  sizeof(PCI_CARD_DESCRIPTOR)),
1026  TAG_HAL);
1027  if (PciRegistryInfo)
1028  {
1029  /* Get the first card descriptor entry */
1030  CardDescriptor = (PPCI_CARD_DESCRIPTOR)(PciRegistryInfo + 1);
1031 
1032  /* Loop all the values */
1033  for (i = 0; i < KeyInformation.Values; i++)
1034  {
1035  /* Attempt to get the value */
1036  Status = ZwEnumerateValueKey(CardListHandle,
1037  i,
1039  PartialValueInfo,
1040  sizeof(PartialKeyBuffer),
1041  &ResultLength);
1042  if (!NT_SUCCESS(Status))
1043  {
1044  /* Something went wrong, stop the search */
1045  break;
1046  }
1047 
1048  /* Make sure it is correctly sized */
1049  if (PartialValueInfo->DataLength == sizeof(PCI_CARD_DESCRIPTOR))
1050  {
1051  /* Sure is, copy it over */
1052  *CardDescriptor = *(PPCI_CARD_DESCRIPTOR)
1053  PartialValueInfo->Data;
1054 
1055  /* One more Card List entry */
1056  ElementCount++;
1057 
1058  /* Move to the next descriptor */
1059  CardDescriptor = (CardDescriptor + 1);
1060  }
1061  }
1062  }
1063  }
1064 
1065  /* Close the Card List key */
1066  ZwClose(CardListHandle);
1067  }
1068  else
1069  {
1070  /* No key, no Card List */
1071  PciRegistryInfo = NULL;
1072  }
1073 
1074  /* Check if we failed to get the full structure */
1075  if (!PciRegistryInfo)
1076  {
1077  /* Just allocate the basic structure then */
1078  PciRegistryInfo = ExAllocatePoolWithTag(NonPagedPool,
1080  TAG_HAL);
1081  if (!PciRegistryInfo) return NULL;
1082  }
1083 
1084  /* Save the info we got */
1085  PciRegistryInfo->MajorRevision = PciRegInfo->MajorRevision;
1086  PciRegistryInfo->MinorRevision = PciRegInfo->MinorRevision;
1087  PciRegistryInfo->NoBuses = PciRegInfo->NoBuses;
1088  PciRegistryInfo->HardwareMechanism = PciRegInfo->HardwareMechanism;
1089  PciRegistryInfo->ElementCount = ElementCount;
1090 
1091  /* Return it */
1092  return PciRegistryInfo;
1093 #else
1094  return NULL;
1095 #endif
1096 }
DWORD *typedef PVOID
Definition: winlogon.h:52
IN CINT OUT PVOID IN ULONG OUT PULONG ResultLength
Definition: conport.c:47
IN PUNICODE_STRING IN POBJECT_ATTRIBUTES ObjectAttributes
Definition: conport.c:35
_Must_inspect_result_ _Out_ PNDIS_STATUS _In_ NDIS_HANDLE _In_ ULONG _Out_ PNDIS_STRING KeyName
Definition: ndis.h:4692
#define CmResourceTypeDeviceSpecific
Definition: hwresource.cpp:127
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR * PCM_PARTIAL_RESOURCE_DESCRIPTOR
#define TRUE
Definition: types.h:120
_Must_inspect_result_ _Out_ PNDIS_STATUS _In_ NDIS_HANDLE _In_ ULONG _Out_ PNDIS_STRING _Out_ PNDIS_HANDLE KeyHandle
Definition: ndis.h:4692
USHORT MaximumLength
Definition: env_spec_w32.h:370
Definition: bidi.c:75
#define KEY_READ
Definition: nt_native.h:1023
__wchar_t WCHAR
Definition: xmlstorage.h:180
NTSYSAPI NTSTATUS NTAPI ZwClose(_In_ HANDLE Handle)
UCHAR HardwareMechanism
Definition: pci.h:110
PVOID *typedef PWSTR
Definition: winlogon.h:57
struct _CM_FULL_RESOURCE_DESCRIPTOR CM_FULL_RESOURCE_DESCRIPTOR
UCHAR MinorRevision
Definition: pci.h:108
uint32_t ULONG_PTR
Definition: typedefs.h:64
GLenum GLclampf GLint i
Definition: glfuncs.h:14
UCHAR MajorRevision
Definition: pci.h:107
struct _PCI_CARD_DESCRIPTOR * PPCI_CARD_DESCRIPTOR
struct _CM_FULL_RESOURCE_DESCRIPTOR * PCM_FULL_RESOURCE_DESCRIPTOR
smooth NULL
Definition: ftsmooth.c:513
NTSYSAPI NTSTATUS NTAPI RtlIntegerToUnicodeString(ULONG Value, ULONG Base, PUNICODE_STRING String)
#define OBJ_CASE_INSENSITIVE
Definition: winternl.h:228
#define ExAllocatePoolWithTag(hernya, size, tag)
Definition: env_spec_w32.h:350
unsigned char UCHAR
Definition: xmlstorage.h:181
#define TAG_HAL
Definition: hal.h:55
Status
Definition: gdiplustypes.h:24
#define NT_SUCCESS(StatCode)
Definition: cmd.c:149
DWORD *typedef HANDLE
Definition: winlogon.h:52
LONG NTSTATUS
Definition: DriverTester.h:11
struct _KEY_VALUE_PARTIAL_INFORMATION KEY_VALUE_PARTIAL_INFORMATION
IN ULONG IN ULONG Tag
Definition: evtlib.h:155
UCHAR NoBuses
Definition: pci.h:109
unsigned int ULONG
Definition: retypes.h:1
NTSYSAPI VOID NTAPI RtlInitUnicodeString(PUNICODE_STRING DestinationString, PCWSTR SourceString)
#define InitializeObjectAttributes(p, n, a, r, s)
Definition: reg.c:106
struct _PCI_REGISTRY_INFO * PPCI_REGISTRY_INFO
VOID NTAPI HalpReadPCIConfig ( IN PBUS_HANDLER  BusHandler,
IN PCI_SLOT_NUMBER  Slot,
IN PVOID  Buffer,
IN ULONG  Offset,
IN ULONG  Length 
)

Definition at line 269 of file pcibus.c.

Referenced by HaliPciInterfaceReadConfig(), HalpAssignPCISlotResources(), HalpGetPCIData(), HalpSetPCIData(), and HalpValidPCISlot().

274 {
275  /* Validate the PCI Slot */
276  if (!HalpValidPCISlot(BusHandler, Slot))
277  {
278  /* Fill the buffer with invalid data */
280  }
281  else
282  {
283  /* Send the request */
284  HalpPCIConfig(BusHandler,
285  Slot,
286  Buffer,
287  Offset,
288  Length,
290  }
291 }
FncConfigIO ConfigRead[3]
Definition: bus.h:129
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
BOOLEAN NTAPI HalpValidPCISlot(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot)
Definition: pcibus.c:316
Definition: bufpool.h:45
PCI_CONFIG_HANDLER PCIConfigHandler
Definition: pcibus.c:33
VOID NTAPI HalpPCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PUCHAR Buffer, IN ULONG Offset, IN ULONG Length, IN FncConfigIO *ConfigIO)
Definition: pcibus.c:231
VOID UINTN Length
Definition: acefiex.h:744
#define RtlFillMemory(Dest, Length, Fill)
Definition: winternl.h:593
INIT_SECTION VOID NTAPI HalpRegisterPciDebuggingDeviceInfo ( VOID  )

Definition at line 633 of file pcibus.c.

Referenced by HalReportResourceUsage().

634 {
635  BOOLEAN Found = FALSE;
636  ULONG i;
637  PAGED_CODE();
638 
639  /* Loop PCI debugging devices */
640  for (i = 0; i < 2; i++)
641  {
642  /* Reserved bit is set if we found one */
643  if (HalpPciDebuggingDevice[i].u.bits.Reserved1)
644  {
645  Found = TRUE;
646  break;
647  }
648  }
649 
650  /* Bail out if there aren't any */
651  if (!Found) return;
652 
653  /* FIXME: TODO */
654  UNIMPLEMENTED_DBGBREAK("You have implemented the KD routines for searching PCI debugger"
655  "devices, but you have forgotten to implement this routine\n");
656 }
#define TRUE
Definition: types.h:120
PCI_TYPE1_CFG_CYCLE_BITS HalpPciDebuggingDevice[2]
Definition: pcibus.c:28
GLenum GLclampf GLint GLenum GLuint GLenum GLenum GLsizei GLenum const GLvoid GLfloat GLfloat GLfloat GLfloat GLclampd GLint GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean GLboolean GLboolean GLboolean GLint GLenum GLsizei const GLvoid GLenum GLint GLenum GLint GLint GLsizei GLint GLenum GLint GLint GLint GLint GLsizei GLenum GLsizei const GLuint GLboolean GLenum GLenum GLint GLsizei GLenum GLsizei GLenum const GLvoid GLboolean const GLboolean GLenum const GLdouble * u
Definition: glfuncs.h:88
GLenum GLclampf GLint i
Definition: glfuncs.h:14
#define FALSE
Definition: types.h:117
#define UNIMPLEMENTED_DBGBREAK(...)
Definition: debug.h:226
unsigned char BOOLEAN
#define PAGED_CODE()
Definition: video.h:57
unsigned int ULONG
Definition: retypes.h:1
INIT_SECTION NTSTATUS NTAPI HalpReleasePciDeviceForDebugging ( IN OUT PDEBUG_DEVICE_DESCRIPTOR  PciDevice)

Definition at line 624 of file pcibus.c.

625 {
626  DPRINT1("Unimplemented!\n");
627  return STATUS_NOT_IMPLEMENTED;
628 }
#define STATUS_NOT_IMPLEMENTED
Definition: ntstatus.h:225
#define DPRINT1
Definition: precomp.h:8
ULONG NTAPI HalpSetPCIData ( IN PBUS_HANDLER  BusHandler,
IN PBUS_HANDLER  RootHandler,
IN ULONG  SlotNumber,
IN PVOID  Buffer,
IN ULONG  Offset,
IN ULONG  Length 
)

Definition at line 444 of file pcibus.c.

450 {
451  PCI_SLOT_NUMBER Slot;
452  UCHAR PciBuffer[PCI_COMMON_HDR_LENGTH];
453  PPCI_COMMON_CONFIG PciConfig = (PPCI_COMMON_CONFIG)PciBuffer;
454  ULONG Len = 0;
455 
456  Slot.u.AsULONG = SlotNumber;
457 #ifdef SARCH_XBOX
458  /* Trying to get PCI config data from devices 0:0:1 and 0:0:2 will completely
459  * hang the Xbox. Also, the device number doesn't seem to be decoded for the
460  * video card, so it appears to be present on 1:0:0 - 1:31:0.
461  * We hack around these problems by indicating "device not present" for devices
462  * 0:0:1, 0:0:2, 1:1:0, 1:2:0, 1:3:0, ...., 1:31:0 */
463  if ((0 == BusHandler->BusNumber && 0 == Slot.u.bits.DeviceNumber &&
464  (1 == Slot.u.bits.FunctionNumber || 2 == Slot.u.bits.FunctionNumber)) ||
465  (1 == BusHandler->BusNumber && 0 != Slot.u.bits.DeviceNumber))
466  {
467  DPRINT1("Trying to set data on blacklisted PCI slot\n");
468  return 0;
469  }
470 #endif
471 
472  /* Normalize the length */
473  if (Length > sizeof(PCI_COMMON_CONFIG)) Length = sizeof(PCI_COMMON_CONFIG);
474 
475  /* Check if this is a vendor-specific read */
477  {
478  /* Read the header */
479  HalpReadPCIConfig(BusHandler, Slot, PciConfig, 0, sizeof(ULONG));
480 
481  /* Make sure the vendor is valid */
482  if (PciConfig->VendorID == PCI_INVALID_VENDORID) return 0;
483  }
484  else
485  {
486  /* Read the entire header and validate the vendor ID */
487  Len = PCI_COMMON_HDR_LENGTH;
488  HalpReadPCIConfig(BusHandler, Slot, PciConfig, 0, Len);
489  if (PciConfig->VendorID == PCI_INVALID_VENDORID) return 0;
490 
491  /* Return what's after the offset and normalize */
492  Len -= Offset;
493  if (Len > Length) Len = Length;
494 
495  /* Copy the specific caller data */
496  RtlMoveMemory(PciBuffer + Offset, Buffer, Len);
497 
498  /* Write the actual configuration data */
499  HalpWritePCIConfig(BusHandler, Slot, PciBuffer + Offset, Offset, Len);
500 
501  /* Update buffer and offset, decrement total length */
502  Offset += Len;
503  Buffer = (PVOID)((ULONG_PTR)Buffer + Len);
504  Length -= Len;
505  }
506 
507  /* Now we still have something to copy */
508  if (Length)
509  {
510  /* Check if it's vendor-specific data */
512  {
513  /* Read it now */
514  HalpWritePCIConfig(BusHandler, Slot, Buffer, Offset, Length);
515  Len += Length;
516  }
517  }
518 
519  /* Update the total length read */
520  return Len;
521 }
DWORD *typedef PVOID
Definition: winlogon.h:52
union _PCI_SLOT_NUMBER::@3422 u
struct _PCI_SLOT_NUMBER::@3422::@3423 bits
struct _PCI_COMMON_CONFIG * PPCI_COMMON_CONFIG
#define RtlMoveMemory(Destination, Source, Length)
Definition: typedefs.h:264
uint32_t ULONG_PTR
Definition: typedefs.h:64
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
Definition: bufpool.h:45
#define PCI_INVALID_VENDORID
Definition: iotypes.h:3212
#define Len
Definition: deflate.h:82
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG _In_ ULONG SlotNumber
Definition: halfuncs.h:156
unsigned char UCHAR
Definition: xmlstorage.h:181
VOID UINTN Length
Definition: acefiex.h:744
struct _PCI_COMMON_CONFIG PCI_COMMON_CONFIG
VOID NTAPI HalpWritePCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pcibus.c:295
#define DPRINT1
Definition: precomp.h:8
unsigned int ULONG
Definition: retypes.h:1
VOID NTAPI HalpReadPCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pcibus.c:269
#define PCI_COMMON_HDR_LENGTH
Definition: iotypes.h:3205
INIT_SECTION NTSTATUS NTAPI HalpSetupPciDeviceForDebugging ( IN PVOID  LoaderBlock,
IN OUT PDEBUG_DEVICE_DESCRIPTOR  PciDevice 
)

Definition at line 614 of file pcibus.c.

616 {
617  DPRINT1("Unimplemented!\n");
618  return STATUS_NOT_IMPLEMENTED;
619 }
#define STATUS_NOT_IMPLEMENTED
Definition: ntstatus.h:225
#define DPRINT1
Definition: precomp.h:8
BOOLEAN NTAPI HalpValidPCISlot ( IN PBUS_HANDLER  BusHandler,
IN PCI_SLOT_NUMBER  Slot 
)

Definition at line 316 of file pcibus.c.

Referenced by HalpReadPCIConfig(), and HalpWritePCIConfig().

318 {
319  PCI_SLOT_NUMBER MultiSlot;
320  PPCIPBUSDATA BusData = (PPCIPBUSDATA)BusHandler->BusData;
321  UCHAR HeaderType;
322  //ULONG Device;
323 
324  /* Simple validation */
325  if (Slot.u.bits.Reserved) return FALSE;
326  if (Slot.u.bits.DeviceNumber >= BusData->MaxDevice) return FALSE;
327 
328  /* Function 0 doesn't need checking */
329  if (!Slot.u.bits.FunctionNumber) return TRUE;
330 
331  /* Functions 0+ need Multi-Function support, so check the slot */
332  //Device = Slot.u.bits.DeviceNumber;
333  MultiSlot = Slot;
334  MultiSlot.u.bits.FunctionNumber = 0;
335 
336  /* Send function 0 request to get the header back */
337  HalpReadPCIConfig(BusHandler,
338  MultiSlot,
339  &HeaderType,
340  FIELD_OFFSET(PCI_COMMON_CONFIG, HeaderType),
341  sizeof(UCHAR));
342 
343  /* Now make sure the header is multi-function */
344  if (!(HeaderType & PCI_MULTIFUNCTION) || (HeaderType == 0xFF)) return FALSE;
345  return TRUE;
346 }
union _PCI_SLOT_NUMBER::@3422 u
struct _PCI_SLOT_NUMBER::@3422::@3423 bits
#define TRUE
Definition: types.h:120
ULONG MaxDevice
Definition: bus.h:100
#define PCI_MULTIFUNCTION
Definition: iotypes.h:3215
#define FALSE
Definition: types.h:117
if(!(yy_init))
Definition: macro.lex.yy.c:704
unsigned char UCHAR
Definition: xmlstorage.h:181
#define FIELD_OFFSET(t, f)
Definition: typedefs.h:255
struct _PCIPBUSDATA * PPCIPBUSDATA
VOID NTAPI HalpReadPCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pcibus.c:269
VOID NTAPI HalpWritePCIConfig ( IN PBUS_HANDLER  BusHandler,
IN PCI_SLOT_NUMBER  Slot,
IN PVOID  Buffer,
IN ULONG  Offset,
IN ULONG  Length 
)

Definition at line 295 of file pcibus.c.

Referenced by HalpAssignPCISlotResources(), and HalpSetPCIData().

300 {
301  /* Validate the PCI Slot */
302  if (HalpValidPCISlot(BusHandler, Slot))
303  {
304  /* Send the request */
305  HalpPCIConfig(BusHandler,
306  Slot,
307  Buffer,
308  Offset,
309  Length,
311  }
312 }
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
BOOLEAN NTAPI HalpValidPCISlot(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot)
Definition: pcibus.c:316
Definition: bufpool.h:45
PCI_CONFIG_HANDLER PCIConfigHandler
Definition: pcibus.c:33
VOID NTAPI HalpPCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PUCHAR Buffer, IN ULONG Offset, IN ULONG Length, IN FncConfigIO *ConfigIO)
Definition: pcibus.c:231
VOID UINTN Length
Definition: acefiex.h:744
FncConfigIO ConfigWrite[3]
Definition: bus.h:130
static ULONG NTAPI PciSize ( ULONG  Base,
ULONG  Mask 
)
static

Definition at line 659 of file pcibus.c.

Referenced by HalpAssignPCISlotResources().

660 {
661  ULONG Size = Mask & Base; /* Find the significant bits */
662  Size = Size & ~(Size - 1); /* Get the lowest of them to find the decode size */
663  return Size;
664 }
_In_opt_ ULONG Base
Definition: rtlfuncs.h:2327
UINTN Size
Definition: acefiex.h:555
unsigned int ULONG
Definition: retypes.h:1

Variable Documentation

ULONG HalpBusType

Definition at line 26 of file pcibus.c.

PCIPBUSDATA HalpFakePciBusData
Initial value:
=
{
{
{{{0, 0, 0}}},
{0, 0, 0, 0}
},
{{0, 0}},
32,
}
#define PCI_DATA_TAG
Definition: iotypes.h:4886
smooth NULL
Definition: ftsmooth.c:513
#define PCI_DATA_VERSION
Definition: iotypes.h:4887
VOID NTAPI HalpWritePCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pcibus.c:295
VOID NTAPI HalpReadPCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pcibus.c:269

Definition at line 88 of file pcibus.c.

BUS_HANDLER HalpFakePciBusHandler
Initial value:
=
{
1,
0,
0,
{0, 0, 0, 0},
NULL
}
ULONG NTAPI HalpGetPCIData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pcibus.c:352
smooth NULL
Definition: ftsmooth.c:513
PCIPBUSDATA HalpFakePciBusData
Definition: pcibus.c:88
ULONG(NTAPI * PGETSETBUSDATA)(_In_ PBUS_HANDLER BusHandler, _In_ PBUS_HANDLER RootHandler, _In_ ULONG SlotNumber, _Out_ PVOID Buffer, _In_ ULONG Offset, _In_ ULONG Length)
Definition: haltypes.h:125
ULONG NTAPI HalpSetPCIData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pcibus.c:444
NTSTATUS NTAPI HalpAssignPCISlotResources(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PUNICODE_STRING RegistryPath, IN PUNICODE_STRING DriverClassName OPTIONAL, IN PDRIVER_OBJECT DriverObject, IN PDEVICE_OBJECT DeviceObject OPTIONAL, IN ULONG Slot, IN OUT PCM_RESOURCE_LIST *AllocatedResources)
Definition: pcibus.c:709

Definition at line 104 of file pcibus.c.

ULONG HalpMaxPciBus

Definition at line 31 of file pcibus.c.

Referenced by HalpInitializePciStubs().

ULONG HalpMinPciBus

Definition at line 31 of file pcibus.c.

BOOLEAN HalpPCIConfigInitialized

Definition at line 30 of file pcibus.c.

Referenced by HalpInitializePciStubs().

PCI_TYPE1_CFG_CYCLE_BITS HalpPciDebuggingDevice[2] = {{{{0}}}}

Definition at line 28 of file pcibus.c.

BOOLEAN HalpPciLockSettings

Definition at line 18 of file halinit.c.

Referenced by HalpAdjustPCIResourceList(), and HalpGetParameters().

PCI_CONFIG_HANDLER PCIConfigHandler

Definition at line 33 of file pcibus.c.

PCI_CONFIG_HANDLER PCIConfigHandlerType1
Initial value:
=
{
{
(FncConfigIO)HalpPCIReadUlongType1,
(FncConfigIO)HalpPCIReadUcharType1,
(FncConfigIO)HalpPCIReadUshortType1
},
{
(FncConfigIO)HalpPCIWriteUlongType1,
(FncConfigIO)HalpPCIWriteUcharType1,
(FncConfigIO)HalpPCIWriteUshortType1
}
}
VOID NTAPI HalpPCIReleaseSynchronzationType1(IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
Definition: pcibus.c:147
VOID(NTAPI * FncReleaseSync)(IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
Definition: bus.h:120
VOID(NTAPI * FncSync)(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PVOID State)
Definition: bus.h:112
VOID NTAPI HalpPCISynchronizeType1(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PPCI_TYPE1_CFG_BITS PciCfg1)
Definition: pcibus.c:128
ULONG(NTAPI * FncConfigIO)(IN PPCIPBUSDATA BusData, IN PVOID State, IN PUCHAR Buffer, IN ULONG Offset)
Definition: bus.h:104

Definition at line 45 of file pcibus.c.

PCI_CONFIG_HANDLER PCIConfigHandlerType2
Initial value:
=
{
{
(FncConfigIO)HalpPCIReadUlongType2,
(FncConfigIO)HalpPCIReadUcharType2,
(FncConfigIO)HalpPCIReadUshortType2
},
{
(FncConfigIO)HalpPCIWriteUlongType2,
(FncConfigIO)HalpPCIWriteUcharType2,
(FncConfigIO)HalpPCIWriteUshortType2
}
}
VOID(NTAPI * FncReleaseSync)(IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
Definition: bus.h:120
VOID(NTAPI * FncSync)(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PVOID State)
Definition: bus.h:112
VOID NTAPI HalpPCIReleaseSynchronizationType2(IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
Definition: pcibus.c:204
ULONG(NTAPI * FncConfigIO)(IN PPCIPBUSDATA BusData, IN PVOID State, IN PUCHAR Buffer, IN ULONG Offset)
Definition: bus.h:104
VOID NTAPI HalpPCISynchronizeType2(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PPCI_TYPE2_ADDRESS_BITS PciCfg)
Definition: pcibus.c:173

Definition at line 67 of file pcibus.c.

UCHAR PCIDeref[4][4]
Initial value:
=
{
{0, 1, 2, 2},
{1, 1, 1, 1},
{2, 1, 2, 2},
{1, 1, 1, 1}
}

Definition at line 36 of file pcibus.c.

Referenced by HalpPCIConfig().