ReactOS 0.4.15-dev-7660-g0086d05
nvnet.h File Reference
#include <ndis.h>
#include <section_attribs.h>
#include "eth.h"
#include "nic.h"
#include "phyreg.h"
Include dependency graph for nvnet.h:
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Go to the source code of this file.

Classes

union  _NVNET_OFFLOAD
 
struct  _NVNET_STATISTICS
 
struct  _NVNET_WAKE_FRAME
 
struct  _NVNET_TX_BUFFER_DATA
 
struct  _NVNET_TX_BUFFER
 
union  _NVNET_TBD
 
struct  _NVNET_TCB
 
union  _NV_RBD
 
struct  _NVNET_RBD
 
struct  _NVNET_SEND
 
struct  _NVNET_RECEIVE
 
struct  _NVNET_ADAPTER
 

Macros

#define NO_KERNEL_LIST_ENTRY_CHECKS
 
#define NVNET_TAG   'ENVN'
 
#define NVNET_TRANSMIT_BLOCKS   64
 
#define NVNET_TRANSMIT_DESCRIPTORS   512
 
#define NVNET_TRANSMIT_BUFFERS   16
 
#define NVNET_RECEIVE_DESCRIPTORS   512
 
#define NVNET_ALIGNMENT   64
 
#define NVNET_RECEIVE_BUFFER_SIZE   2048
 
#define NVNET_RECEIVE_PROCESSING_LIMIT   64
 
#define NVNET_IM_THRESHOLD   4
 
#define NVNET_IM_MAX_IDLE   40
 
#define NVNET_TRANSMIT_HANG_THRESHOLD   5
 
#define NVNET_FRAGMENTATION_THRESHOLD   32
 
#define NVNET_MEDIA_DETECTION_INTERVAL   5000
 
#define NVNET_MAXIMUM_FRAME_SIZE   1514
 
#define NVNET_MAXIMUM_FRAME_SIZE_JUMBO   9014
 
#define NVNET_MAXIMUM_VLAN_ID   0xFFF
 
#define NVNET_MULTICAST_LIST_SIZE   32
 
#define NVNET_MINIMUM_LSO_SEGMENT_COUNT   2
 
#define NVNET_MAXIMUM_LSO_FRAME_SIZE   0xFC00
 
#define NVNET_PACKET_FILTERS
 
#define PACKET_ENTRY(Packet)   ((PLIST_ENTRY)(&(Packet)->MiniportReserved[0]))
 
#define NV_TCB_LARGE_SEND   0x00000001
 
#define NV_TCB_CHECKSUM_IP   0x00000002
 
#define NV_TCB_CHECKSUM_TCP   0x00000004
 
#define NV_TCB_CHECKSUM_UDP   0x00000008
 
#define NV_TCB_COALESCE   0x00000010
 
#define NV_ACTIVE   0x80000000
 
#define NV_SEND_CHECKSUM   0x00000002
 
#define NV_SEND_LARGE_SEND   0x00000004
 
#define NV_SEND_ERRATA_PRESENT   0x00000008
 
#define NV_MAC_IN_USE   0x00000010
 
#define NV_GIGABIT_PHY   0x00000020
 
#define NV_UNIT_SEMAPHORE_ACQUIRED   0x00000040
 
#define NV_USE_SOFT_MAC_ADDRESS   0x00000100
 
#define NV_FORCE_SPEED_AND_DUPLEX   0x00000200
 
#define NV_FORCE_FULL_DUPLEX   0x00000400
 
#define NV_USER_SPEED_100   0x00000800
 
#define NV_PACKET_PRIORITY   0x00001000
 
#define NV_VLAN_TAGGING   0x00002000
 
#define NvNetLogError(Adapter, ErrorCode)    NdisWriteErrorLogEntry((Adapter)->AdapterHandle, ErrorCode, 1, __LINE__)
 
#define NV_IMPLICIT_ENTRIES(Length)    (((Length - (NV_MAXIMUM_SG_SIZE + 1)) >> NV_TX2_TSO_MAX_SHIFT) + 1)
 
#define NvNetDisableInterrupts(Adapter)    NV_WRITE(Adapter, NvRegIrqMask, 0);
 
#define NvNetApplyInterruptMask(Adapter)    NV_WRITE(Adapter, NvRegIrqMask, (Adapter)->InterruptMask);
 

Typedefs

typedef enum _NVNET_OPTIMIZATION_MODE NVNET_OPTIMIZATION_MODE
 
typedef enum _NVNET_FLOW_CONTROL_MODE NVNET_FLOW_CONTROL_MODE
 
typedef union _NVNET_OFFLOAD NVNET_OFFLOAD
 
typedef union _NVNET_OFFLOADPNVNET_OFFLOAD
 
typedef struct _NVNET_STATISTICS NVNET_STATISTICS
 
typedef struct _NVNET_STATISTICSPNVNET_STATISTICS
 
typedef struct _NVNET_WAKE_FRAME NVNET_WAKE_FRAME
 
typedef struct _NVNET_WAKE_FRAMEPNVNET_WAKE_FRAME
 
typedef struct _NVNET_TX_BUFFER_DATA NVNET_TX_BUFFER_DATA
 
typedef struct _NVNET_TX_BUFFER_DATAPNVNET_TX_BUFFER_DATA
 
typedef struct _NVNET_TX_BUFFER NVNET_TX_BUFFER
 
typedef struct _NVNET_TX_BUFFERPNVNET_TX_BUFFER
 
typedef union _NVNET_TBD NVNET_TBD
 
typedef struct _NVNET_TCB NVNET_TCB
 
typedef struct _NVNET_TCBPNVNET_TCB
 
typedef union _NV_RBD NV_RBD
 
typedef struct _NVNET_RBD NVNET_RBD
 
typedef struct _NVNET_RBDPNVNET_RBD
 
typedef struct _NVNET_SEND NVNET_SEND
 
typedef struct _NVNET_SENDPNVNET_SEND
 
typedef struct _NVNET_RECEIVE NVNET_RECEIVE
 
typedef struct _NVNET_RECEIVEPNVNET_RECEIVE
 
typedef struct _NVNET_ADAPTER NVNET_ADAPTER
 
typedef struct _NVNET_ADAPTERPNVNET_ADAPTER
 
typedef VOID() NVNET_TRANSMIT_PACKET(_In_ PNVNET_ADAPTER Adapter, _In_ PNVNET_TCB Tcb, _In_ PSCATTER_GATHER_LIST SgList)
 
typedef NVNET_TRANSMIT_PACKETPNVNET_TRANSMIT_PACKET
 
typedef ULONG() NVNET_PROCESS_TRANSMIT(_In_ PNVNET_ADAPTER Adapter, _Inout_ PLIST_ENTRY SendReadyList)
 
typedef NVNET_PROCESS_TRANSMITPNVNET_PROCESS_TRANSMIT
 
typedef ULONG() NVNET_PROCESS_RECEIVE(_In_ PNVNET_ADAPTER Adapter, _In_ ULONG TotalRxProcessed)
 
typedef NVNET_PROCESS_RECEIVEPNVNET_PROCESS_RECEIVE
 

Enumerations

enum  _NVNET_OPTIMIZATION_MODE { NV_OPTIMIZATION_MODE_DYNAMIC = 0 , NV_OPTIMIZATION_MODE_CPU , NV_OPTIMIZATION_MODE_THROUGHPUT }
 
enum  _NVNET_FLOW_CONTROL_MODE {
  NV_FLOW_CONTROL_DISABLE = 0 , NV_FLOW_CONTROL_AUTO , NV_FLOW_CONTROL_RX , NV_FLOW_CONTROL_TX ,
  NV_FLOW_CONTROL_RX_TX
}
 

Functions

NDIS_STATUS NTAPI MiniportInitialize (_Out_ PNDIS_STATUS OpenErrorStatus, _Out_ PUINT SelectedMediumIndex, _In_ PNDIS_MEDIUM MediumArray, _In_ UINT MediumArraySize, _In_ NDIS_HANDLE MiniportAdapterHandle, _In_ NDIS_HANDLE WrapperConfigurationContext)
 
VOID NvNetFreeAdapter (_In_ PNVNET_ADAPTER Adapter)
 
NDIS_STATUS NvNetRecognizeHardware (_Inout_ PNVNET_ADAPTER Adapter)
 
NDIS_STATUS NvNetGetPermanentMacAddress (_Inout_ PNVNET_ADAPTER Adapter, _Out_writes_bytes_all_(ETH_LENGTH_OF_ADDRESS) PUCHAR MacAddress)
 
VOID NvNetSetupMacAddress (_In_ PNVNET_ADAPTER Adapter, _In_reads_bytes_(ETH_LENGTH_OF_ADDRESS) PUCHAR MacAddress)
 
NDIS_STATUS NvNetInitNIC (_In_ PNVNET_ADAPTER Adapter, _In_ BOOLEAN InitPhy)
 
NDIS_STATUS NvNetFindPhyDevice (_In_ PNVNET_ADAPTER Adapter)
 
NDIS_STATUS NvNetPhyInit (_In_ PNVNET_ADAPTER Adapter)
 
VOID SidebandUnitReleaseSemaphore (_In_ PNVNET_ADAPTER Adapter)
 
VOID NvNetStartAdapter (_In_ PNVNET_ADAPTER Adapter)
 
DECLSPEC_NOINLINE VOID NvNetPauseProcessing (_In_ PNVNET_ADAPTER Adapter)
 
VOID NvNetStopAdapter (_In_ PNVNET_ADAPTER Adapter)
 
VOID NvNetFlushTransmitQueue (_In_ PNVNET_ADAPTER Adapter, _In_ NDIS_STATUS CompleteStatus)
 
BOOLEAN MiiWrite (_In_ PNVNET_ADAPTER Adapter, _In_ ULONG PhyAddress, _In_ ULONG RegAddress, _In_ ULONG Data)
 
BOOLEAN MiiRead (_In_ PNVNET_ADAPTER Adapter, _In_ ULONG PhyAddress, _In_ ULONG RegAddress, _Out_ PULONG Data)
 
BOOLEAN NvNetUpdateLinkSpeed (_In_ PNVNET_ADAPTER Adapter)
 
VOID NvNetResetReceiverAndTransmitter (_In_ PNVNET_ADAPTER Adapter)
 
VOID NvNetStartReceiver (_In_ PNVNET_ADAPTER Adapter)
 
VOID NvNetStartTransmitter (_In_ PNVNET_ADAPTER Adapter)
 
VOID NvNetStopReceiver (_In_ PNVNET_ADAPTER Adapter)
 
VOID NvNetStopTransmitter (_In_ PNVNET_ADAPTER Adapter)
 
VOID NvNetIdleTransmitter (_In_ PNVNET_ADAPTER Adapter, _In_ BOOLEAN ClearPhyControl)
 
VOID NvNetUpdatePauseFrame (_Inout_ PNVNET_ADAPTER Adapter, _In_ ULONG PauseFlags)
 
VOID NvNetToggleClockPowerGating (_In_ PNVNET_ADAPTER Adapter, _In_ BOOLEAN Gate)
 
VOID NvNetSetPowerState (_In_ PNVNET_ADAPTER Adapter, _In_ NDIS_DEVICE_POWER_STATE NewPowerState, _In_ ULONG WakeFlags)
 
VOID NvNetBackoffSetSlotTime (_In_ PNVNET_ADAPTER Adapter)
 
VOID NvNetBackoffReseed (_In_ PNVNET_ADAPTER Adapter)
 
VOID NvNetBackoffReseedEx (_In_ PNVNET_ADAPTER Adapter)
 
NDIS_STATUS NTAPI MiniportSend (_In_ NDIS_HANDLE MiniportAdapterContext, _In_ PNDIS_PACKET Packet, _In_ UINT Flags)
 
VOID NTAPI MiniportISR (_Out_ PBOOLEAN InterruptRecognized, _Out_ PBOOLEAN QueueMiniportHandleInterrupt, _In_ NDIS_HANDLE MiniportAdapterContext)
 
VOID NTAPI MiniportHandleInterrupt (_In_ NDIS_HANDLE MiniportAdapterContext)
 
NDIS_STATUS NTAPI MiniportQueryInformation (_In_ NDIS_HANDLE MiniportAdapterContext, _In_ NDIS_OID Oid, _In_ PVOID InformationBuffer, _In_ ULONG InformationBufferLength, _Out_ PULONG BytesWritten, _Out_ PULONG BytesNeeded)
 
NDIS_STATUS NTAPI MiniportSetInformation (_In_ NDIS_HANDLE MiniportAdapterContext, _In_ NDIS_OID Oid, _In_ PVOID InformationBuffer, _In_ ULONG InformationBufferLength, _Out_ PULONG BytesRead, _Out_ PULONG BytesNeeded)
 
FORCEINLINE VOID NV_RELEASE_TCB (_In_ PNVNET_ADAPTER Adapter, _In_ PNVNET_TCB Tcb)
 
FORCEINLINE PNVNET_TCB NV_NEXT_TCB (_In_ PNVNET_ADAPTER Adapter, _In_ PNVNET_TCB Tcb)
 
FORCEINLINE NVNET_TBD NV_NEXT_TBD_32 (_In_ PNVNET_ADAPTER Adapter, _In_ NVNET_TBD Tbd)
 
FORCEINLINE NVNET_TBD NV_NEXT_TBD_64 (_In_ PNVNET_ADAPTER Adapter, _In_ NVNET_TBD Tbd)
 
FORCEINLINE VOID NV_WRITE (_In_ PNVNET_ADAPTER Adapter, _In_ NVNET_REGISTER Register, _In_ ULONG Value)
 
FORCEINLINE ULONG NV_READ (_In_ PNVNET_ADAPTER Adapter, _In_ NVNET_REGISTER Register)
 

Variables

NVNET_TRANSMIT_PACKET NvNetTransmitPacket32
 
NVNET_TRANSMIT_PACKET NvNetTransmitPacket64
 
NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptorsLegacy
 
NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptors32
 
NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptors64
 
KSYNCHRONIZE_ROUTINE NvNetInitPhaseSynchronized
 
NDIS_TIMER_FUNCTION NvNetMediaDetectionDpc
 

Macro Definition Documentation

◆ NO_KERNEL_LIST_ENTRY_CHECKS

#define NO_KERNEL_LIST_ENTRY_CHECKS

Definition at line 12 of file nvnet.h.

◆ NV_ACTIVE

#define NV_ACTIVE   0x80000000

Definition at line 286 of file nvnet.h.

◆ NV_FORCE_FULL_DUPLEX

#define NV_FORCE_FULL_DUPLEX   0x00000400

Definition at line 296 of file nvnet.h.

◆ NV_FORCE_SPEED_AND_DUPLEX

#define NV_FORCE_SPEED_AND_DUPLEX   0x00000200

Definition at line 295 of file nvnet.h.

◆ NV_GIGABIT_PHY

#define NV_GIGABIT_PHY   0x00000020

Definition at line 292 of file nvnet.h.

◆ NV_IMPLICIT_ENTRIES

#define NV_IMPLICIT_ENTRIES (   Length)     (((Length - (NV_MAXIMUM_SG_SIZE + 1)) >> NV_TX2_TSO_MAX_SHIFT) + 1)

Definition at line 585 of file nvnet.h.

◆ NV_MAC_IN_USE

#define NV_MAC_IN_USE   0x00000010

Definition at line 291 of file nvnet.h.

◆ NV_PACKET_PRIORITY

#define NV_PACKET_PRIORITY   0x00001000

Definition at line 298 of file nvnet.h.

◆ NV_SEND_CHECKSUM

#define NV_SEND_CHECKSUM   0x00000002

Definition at line 287 of file nvnet.h.

◆ NV_SEND_ERRATA_PRESENT

#define NV_SEND_ERRATA_PRESENT   0x00000008

Definition at line 289 of file nvnet.h.

◆ NV_SEND_LARGE_SEND

#define NV_SEND_LARGE_SEND   0x00000004

Definition at line 288 of file nvnet.h.

◆ NV_TCB_CHECKSUM_IP

#define NV_TCB_CHECKSUM_IP   0x00000002

Definition at line 213 of file nvnet.h.

◆ NV_TCB_CHECKSUM_TCP

#define NV_TCB_CHECKSUM_TCP   0x00000004

Definition at line 214 of file nvnet.h.

◆ NV_TCB_CHECKSUM_UDP

#define NV_TCB_CHECKSUM_UDP   0x00000008

Definition at line 215 of file nvnet.h.

◆ NV_TCB_COALESCE

#define NV_TCB_COALESCE   0x00000010

Definition at line 216 of file nvnet.h.

◆ NV_TCB_LARGE_SEND

#define NV_TCB_LARGE_SEND   0x00000001

Definition at line 212 of file nvnet.h.

◆ NV_UNIT_SEMAPHORE_ACQUIRED

#define NV_UNIT_SEMAPHORE_ACQUIRED   0x00000040

Definition at line 293 of file nvnet.h.

◆ NV_USE_SOFT_MAC_ADDRESS

#define NV_USE_SOFT_MAC_ADDRESS   0x00000100

Definition at line 294 of file nvnet.h.

◆ NV_USER_SPEED_100

#define NV_USER_SPEED_100   0x00000800

Definition at line 297 of file nvnet.h.

◆ NV_VLAN_TAGGING

#define NV_VLAN_TAGGING   0x00002000

Definition at line 299 of file nvnet.h.

◆ NVNET_ALIGNMENT

#define NVNET_ALIGNMENT   64

Definition at line 37 of file nvnet.h.

◆ NVNET_FRAGMENTATION_THRESHOLD

#define NVNET_FRAGMENTATION_THRESHOLD   32

Definition at line 55 of file nvnet.h.

◆ NVNET_IM_MAX_IDLE

#define NVNET_IM_MAX_IDLE   40

Definition at line 44 of file nvnet.h.

◆ NVNET_IM_THRESHOLD

#define NVNET_IM_THRESHOLD   4

Definition at line 43 of file nvnet.h.

◆ NVNET_MAXIMUM_FRAME_SIZE

#define NVNET_MAXIMUM_FRAME_SIZE   1514

Definition at line 60 of file nvnet.h.

◆ NVNET_MAXIMUM_FRAME_SIZE_JUMBO

#define NVNET_MAXIMUM_FRAME_SIZE_JUMBO   9014

Definition at line 61 of file nvnet.h.

◆ NVNET_MAXIMUM_LSO_FRAME_SIZE

#define NVNET_MAXIMUM_LSO_FRAME_SIZE   0xFC00

Definition at line 67 of file nvnet.h.

◆ NVNET_MAXIMUM_VLAN_ID

#define NVNET_MAXIMUM_VLAN_ID   0xFFF

Definition at line 62 of file nvnet.h.

◆ NVNET_MEDIA_DETECTION_INTERVAL

#define NVNET_MEDIA_DETECTION_INTERVAL   5000

Definition at line 58 of file nvnet.h.

◆ NVNET_MINIMUM_LSO_SEGMENT_COUNT

#define NVNET_MINIMUM_LSO_SEGMENT_COUNT   2

Definition at line 66 of file nvnet.h.

◆ NVNET_MULTICAST_LIST_SIZE

#define NVNET_MULTICAST_LIST_SIZE   32

Definition at line 64 of file nvnet.h.

◆ NVNET_PACKET_FILTERS

#define NVNET_PACKET_FILTERS
Value:
( \
#define NDIS_PACKET_TYPE_PROMISCUOUS
Definition: ndis.h:668
#define NDIS_PACKET_TYPE_BROADCAST
Definition: ndis.h:666
#define NDIS_PACKET_TYPE_MULTICAST
Definition: ndis.h:664
#define NDIS_PACKET_TYPE_DIRECTED
Definition: ndis.h:663
#define NDIS_PACKET_TYPE_ALL_MULTICAST
Definition: ndis.h:665

Definition at line 69 of file nvnet.h.

◆ NVNET_RECEIVE_BUFFER_SIZE

#define NVNET_RECEIVE_BUFFER_SIZE   2048

Definition at line 39 of file nvnet.h.

◆ NVNET_RECEIVE_DESCRIPTORS

#define NVNET_RECEIVE_DESCRIPTORS   512

Definition at line 34 of file nvnet.h.

◆ NVNET_RECEIVE_PROCESSING_LIMIT

#define NVNET_RECEIVE_PROCESSING_LIMIT   64

Definition at line 41 of file nvnet.h.

◆ NVNET_TAG

#define NVNET_TAG   'ENVN'

Definition at line 22 of file nvnet.h.

◆ NVNET_TRANSMIT_BLOCKS

#define NVNET_TRANSMIT_BLOCKS   64

Definition at line 31 of file nvnet.h.

◆ NVNET_TRANSMIT_BUFFERS

#define NVNET_TRANSMIT_BUFFERS   16

Definition at line 33 of file nvnet.h.

◆ NVNET_TRANSMIT_DESCRIPTORS

#define NVNET_TRANSMIT_DESCRIPTORS   512

Definition at line 32 of file nvnet.h.

◆ NVNET_TRANSMIT_HANG_THRESHOLD

#define NVNET_TRANSMIT_HANG_THRESHOLD   5

Definition at line 49 of file nvnet.h.

◆ NvNetApplyInterruptMask

#define NvNetApplyInterruptMask (   Adapter)     NV_WRITE(Adapter, NvRegIrqMask, (Adapter)->InterruptMask);

Definition at line 669 of file nvnet.h.

◆ NvNetDisableInterrupts

#define NvNetDisableInterrupts (   Adapter)     NV_WRITE(Adapter, NvRegIrqMask, 0);

Definition at line 666 of file nvnet.h.

◆ NvNetLogError

#define NvNetLogError (   Adapter,
  ErrorCode 
)     NdisWriteErrorLogEntry((Adapter)->AdapterHandle, ErrorCode, 1, __LINE__)

Definition at line 387 of file nvnet.h.

◆ PACKET_ENTRY

#define PACKET_ENTRY (   Packet)    ((PLIST_ENTRY)(&(Packet)->MiniportReserved[0]))

Definition at line 76 of file nvnet.h.

Typedef Documentation

◆ NV_RBD

typedef union _NV_RBD NV_RBD

◆ NVNET_ADAPTER

Definition at line 259 of file nvnet.h.

◆ NVNET_FLOW_CONTROL_MODE

◆ NVNET_OFFLOAD

◆ NVNET_OPTIMIZATION_MODE

◆ NVNET_PROCESS_RECEIVE

typedef ULONG() NVNET_PROCESS_RECEIVE(_In_ PNVNET_ADAPTER Adapter, _In_ ULONG TotalRxProcessed)

Definition at line 274 of file nvnet.h.

◆ NVNET_PROCESS_TRANSMIT

typedef ULONG() NVNET_PROCESS_TRANSMIT(_In_ PNVNET_ADAPTER Adapter, _Inout_ PLIST_ENTRY SendReadyList)

Definition at line 268 of file nvnet.h.

◆ NVNET_RBD

◆ NVNET_RECEIVE

◆ NVNET_SEND

◆ NVNET_STATISTICS

◆ NVNET_TBD

typedef union _NVNET_TBD NVNET_TBD

◆ NVNET_TCB

◆ NVNET_TRANSMIT_PACKET

typedef VOID() NVNET_TRANSMIT_PACKET(_In_ PNVNET_ADAPTER Adapter, _In_ PNVNET_TCB Tcb, _In_ PSCATTER_GATHER_LIST SgList)

Definition at line 261 of file nvnet.h.

◆ NVNET_TX_BUFFER

◆ NVNET_TX_BUFFER_DATA

◆ NVNET_WAKE_FRAME

◆ PNVNET_ADAPTER

Definition at line 259 of file nvnet.h.

◆ PNVNET_OFFLOAD

typedef union _NVNET_OFFLOAD * PNVNET_OFFLOAD

◆ PNVNET_PROCESS_RECEIVE

Definition at line 278 of file nvnet.h.

◆ PNVNET_PROCESS_TRANSMIT

Definition at line 272 of file nvnet.h.

◆ PNVNET_RBD

◆ PNVNET_RECEIVE

◆ PNVNET_SEND

◆ PNVNET_STATISTICS

◆ PNVNET_TCB

◆ PNVNET_TRANSMIT_PACKET

Definition at line 266 of file nvnet.h.

◆ PNVNET_TX_BUFFER

◆ PNVNET_TX_BUFFER_DATA

◆ PNVNET_WAKE_FRAME

Enumeration Type Documentation

◆ _NVNET_FLOW_CONTROL_MODE

Enumerator
NV_FLOW_CONTROL_DISABLE 
NV_FLOW_CONTROL_AUTO 
NV_FLOW_CONTROL_RX 
NV_FLOW_CONTROL_TX 
NV_FLOW_CONTROL_RX_TX 

Definition at line 85 of file nvnet.h.

86{
@ NV_FLOW_CONTROL_RX
Definition: nvnet.h:89
@ NV_FLOW_CONTROL_AUTO
Definition: nvnet.h:88
@ NV_FLOW_CONTROL_TX
Definition: nvnet.h:90
@ NV_FLOW_CONTROL_DISABLE
Definition: nvnet.h:87
@ NV_FLOW_CONTROL_RX_TX
Definition: nvnet.h:91
enum _NVNET_FLOW_CONTROL_MODE NVNET_FLOW_CONTROL_MODE

◆ _NVNET_OPTIMIZATION_MODE

Enumerator
NV_OPTIMIZATION_MODE_DYNAMIC 
NV_OPTIMIZATION_MODE_CPU 
NV_OPTIMIZATION_MODE_THROUGHPUT 

Definition at line 78 of file nvnet.h.

79{
@ NV_OPTIMIZATION_MODE_CPU
Definition: nvnet.h:81
@ NV_OPTIMIZATION_MODE_DYNAMIC
Definition: nvnet.h:80
@ NV_OPTIMIZATION_MODE_THROUGHPUT
Definition: nvnet.h:82
enum _NVNET_OPTIMIZATION_MODE NVNET_OPTIMIZATION_MODE

Function Documentation

◆ MiiRead()

BOOLEAN MiiRead ( _In_ PNVNET_ADAPTER  Adapter,
_In_ ULONG  PhyAddress,
_In_ ULONG  RegAddress,
_Out_ PULONG  Data 
)

Definition at line 62 of file phy.c.

67{
68 ULONG i;
69
71
73 {
76 }
77
78 NV_WRITE(Adapter, NvRegMIIControl, (PhyAddress << NVREG_MIICTL_ADDRSHIFT) | RegAddress);
79
80 for (i = NV_MIIPHY_DELAYMAX; i > 0; --i)
81 {
83
85 break;
86 }
87 if (i == 0)
88 {
89 *Data = 0;
90 return FALSE;
91 }
92
94 {
95 *Data = 0;
96 return FALSE;
97 }
98
99 *Data = NV_READ(Adapter, NvRegMIIData);
100 return TRUE;
101}
#define TRUE
Definition: types.h:120
#define FALSE
Definition: types.h:117
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
#define NdisStallExecution
Definition: ndis.h:4453
#define NV_MIIBUSY_DELAY
Definition: nic.h:460
#define NVREG_MIISTAT_MASK_RW
Definition: nic.h:228
#define NV_MIIPHY_DELAY
Definition: nic.h:461
#define NVREG_MIICTL_INUSE
Definition: nic.h:246
#define NV_MIIPHY_DELAYMAX
Definition: nic.h:462
#define NVREG_MIICTL_ADDRSHIFT
Definition: nic.h:248
#define NVREG_MIISTAT_ERROR
Definition: nic.h:226
@ NvRegMIIData
Definition: nic.h:250
@ NvRegMIIStatus
Definition: nic.h:225
@ NvRegMIIControl
Definition: nic.h:245
FORCEINLINE VOID NV_WRITE(_In_ PNVNET_ADAPTER Adapter, _In_ NVNET_REGISTER Register, _In_ ULONG Value)
Definition: nvnet.h:646
FORCEINLINE ULONG NV_READ(_In_ PNVNET_ADAPTER Adapter, _In_ NVNET_REGISTER Register)
Definition: nvnet.h:656
uint32_t ULONG
Definition: typedefs.h:59

◆ MiiWrite()

BOOLEAN MiiWrite ( _In_ PNVNET_ADAPTER  Adapter,
_In_ ULONG  PhyAddress,
_In_ ULONG  RegAddress,
_In_ ULONG  Data 
)

Definition at line 26 of file phy.c.

31{
32 ULONG i;
33
35
37 {
40 }
41
42 NV_WRITE(Adapter, NvRegMIIData, Data);
44 NVREG_MIICTL_WRITE | (PhyAddress << NVREG_MIICTL_ADDRSHIFT) | RegAddress);
45
46 for (i = NV_MIIPHY_DELAYMAX; i > 0; --i)
47 {
49
51 break;
52 }
53 if (i == 0)
54 {
55 return FALSE;
56 }
57
58 return TRUE;
59}
#define NVREG_MIICTL_WRITE
Definition: nic.h:247

◆ MiniportHandleInterrupt()

VOID NTAPI MiniportHandleInterrupt ( _In_ NDIS_HANDLE  MiniportAdapterContext)

Definition at line 449 of file interrupt.c.

451{
452 PNVNET_ADAPTER Adapter = (PNVNET_ADAPTER)MiniportAdapterContext;
453 ULONG InterruptStatus = Adapter->InterruptStatus;
454 ULONG RxProcessed, TotalTxProcessed = 0, TotalRxProcessed = 0;
455 LIST_ENTRY SendReadyList;
456
457 NDIS_DbgPrint(MIN_TRACE, ("() Events 0x%lx\n", InterruptStatus));
458
459 if (!(Adapter->Flags & NV_ACTIVE))
460 return;
461
462 InitializeListHead(&SendReadyList);
463
464 /* Process the rings and measure network activity */
465 while (TotalRxProcessed < NVNET_RECEIVE_PROCESSING_LIMIT)
466 {
468
469 TotalTxProcessed += Adapter->ProcessTransmit(Adapter, &SendReadyList);
470
472
473 while (!IsListEmpty(&SendReadyList))
474 {
475 PLIST_ENTRY Entry = RemoveHeadList(&SendReadyList);
476
478 CONTAINING_RECORD(Entry, NDIS_PACKET, MiniportReserved),
480 }
481
482 RxProcessed = ProcessReceiveDescriptors(Adapter, TotalRxProcessed);
483 if (!RxProcessed)
484 break;
485
486 TotalRxProcessed += RxProcessed;
487 }
488
489 NDIS_DbgPrint(MIN_TRACE, ("Total TX: %d, RX: %d\n", TotalTxProcessed, TotalRxProcessed));
490
491 /* Moderate the interrupts */
493 {
494 ChangeInterruptMode(Adapter, TotalTxProcessed + TotalRxProcessed);
495 }
496
497 if (InterruptStatus & NVREG_IRQ_RX_NOBUF)
498 {
500 }
501
502 if (InterruptStatus & NVREG_IRQ_LINK)
503 {
504 HandleLinkStateChange(Adapter);
505 }
506
507 if (InterruptStatus & NVREG_IRQ_RECOVER_ERROR)
508 {
509 HandleRecoverableError(Adapter);
510 }
511
512 /* Enable interrupts on the NIC */
514}
#define MIN_TRACE
Definition: debug.h:14
#define NDIS_DbgPrint(_t_, _x_)
Definition: debug.h:40
static VOID ChangeInterruptMode(_In_ PNVNET_ADAPTER Adapter, _In_ ULONG Workload)
Definition: interrupt.c:357
static VOID HandleLinkStateChange(_In_ PNVNET_ADAPTER Adapter)
Definition: interrupt.c:384
static VOID HandleRecoverableError(_In_ PNVNET_ADAPTER Adapter)
Definition: interrupt.c:440
static ULONG ProcessReceiveDescriptors(_In_ PNVNET_ADAPTER Adapter, _In_ ULONG TotalRxProcessed)
Definition: interrupt.c:221
#define IsListEmpty(ListHead)
Definition: env_spec_w32.h:954
#define RemoveHeadList(ListHead)
Definition: env_spec_w32.h:964
#define InitializeListHead(ListHead)
Definition: env_spec_w32.h:944
#define NdisDprReleaseSpinLock(_SpinLock)
Definition: ndis.h:4133
#define NDIS_STATUS_SUCCESS
Definition: ndis.h:346
#define NdisDprAcquireSpinLock(_SpinLock)
Definition: ndis.h:4124
#define NdisMSendComplete(MiniportAdapterHandle, Packet, Status)
Definition: ndis.h:5689
#define NVREG_IRQ_RECOVER_ERROR
Definition: nic.h:65
#define NVREG_IRQ_LINK
Definition: nic.h:62
#define NVREG_IRQ_RX_NOBUF
Definition: nic.h:58
#define NVNET_RECEIVE_PROCESSING_LIMIT
Definition: nvnet.h:41
#define NV_ACTIVE
Definition: nvnet.h:286
#define NvNetApplyInterruptMask(Adapter)
Definition: nvnet.h:669
struct _NVNET_ADAPTER * PNVNET_ADAPTER
Definition: nvnet.h:259
base of all file and directory entries
Definition: entries.h:83
Definition: typedefs.h:120
ULONG Flags
Definition: nvnet.h:285
NVNET_SEND Send
Definition: nvnet.h:310
ULONG InterruptStatus
Definition: nvnet.h:303
NVNET_OPTIMIZATION_MODE OptimizationMode
Definition: nvnet.h:306
NDIS_HANDLE AdapterHandle
Definition: nvnet.h:283
NVNET_STATISTICS Statistics
Definition: nvnet.h:319
PNVNET_PROCESS_TRANSMIT ProcessTransmit
Definition: nvnet.h:317
NDIS_SPIN_LOCK Lock
Definition: nvnet.h:237
ULONG ReceiveIrqNoBuffers
Definition: nvnet.h:171
#define CONTAINING_RECORD(address, type, field)
Definition: typedefs.h:260

◆ MiniportInitialize()

NDIS_STATUS NTAPI MiniportInitialize ( _Out_ PNDIS_STATUS  OpenErrorStatus,
_Out_ PUINT  SelectedMediumIndex,
_In_ PNDIS_MEDIUM  MediumArray,
_In_ UINT  MediumArraySize,
_In_ NDIS_HANDLE  MiniportAdapterHandle,
_In_ NDIS_HANDLE  WrapperConfigurationContext 
)

Definition at line 700 of file init.c.

707{
708 UINT i;
709 ULONG Size;
710 PVOID UnalignedAdapter;
711 PNVNET_ADAPTER Adapter;
713
714 PAGED_CODE();
715
716 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
717
718 for (i = 0; i < MediumArraySize; ++i)
719 {
720 if (MediumArray[i] == NdisMedium802_3)
721 {
723 break;
724 }
725 }
726 if (i == MediumArraySize)
727 {
728 NDIS_DbgPrint(MAX_TRACE, ("No supported media\n"));
730 }
731
733
734 Status = NdisAllocateMemoryWithTag((PVOID*)&UnalignedAdapter,
735 Size,
736 NVNET_TAG);
738 {
739 NDIS_DbgPrint(MAX_TRACE, ("Failed to allocate adapter\n"));
741 }
742
743 NdisZeroMemory(UnalignedAdapter, Size);
744 Adapter = ALIGN_UP_POINTER_BY(UnalignedAdapter, NdisGetSharedDataAlignment());
745 Adapter->AdapterOriginal = UnalignedAdapter;
748
751 {
752 goto Failure;
753 }
754
756 Adapter,
757 0,
759 // NDIS_ATTRIBUTE_DESERIALIZE | TODO
762
765 {
767 {
769 }
771 {
773 }
774
775 goto Failure;
776 }
777
780 {
781 goto Failure;
782 }
783
785 !!(Adapter->Features & DEV_HAS_HIGH_DMA),
787 // ^TODO: NVNET_MAX_DMA_TRANSFER);
789 {
791 goto Failure;
792 }
793
794 Status = AllocateAdapterMemory(Adapter);
796 {
797 NDIS_DbgPrint(MAX_TRACE, ("Failed to allocate adapter memory\n"));
798
800 goto Failure;
801 }
802
804 NvNetInitReceiveMemory(Adapter);
805
806 if (Adapter->Features & DEV_HAS_HIGH_DMA)
807 {
810 }
811 else
812 {
814
815 if (Adapter->Features & DEV_HAS_LARGEDESC)
816 {
818 }
819 else
820 {
822 }
823 }
824
827 {
829 goto Failure;
830 }
831
832 if (!(Adapter->Flags & NV_USE_SOFT_MAC_ADDRESS))
833 {
835 Adapter->PermanentMacAddress);
836 }
837
838 NvNetSetupMacAddress(Adapter, Adapter->CurrentMacAddress);
839
840 Status = NvNetInitNIC(Adapter, TRUE);
842 {
843 NDIS_DbgPrint(MAX_TRACE, ("Failed to initialize the NIC\n"));
844
846 goto Failure;
847 }
848
849 NvNetDisableInterrupts(Adapter);
852
853/* FIXME: Bug in the PIC HAL? */
854#if defined(SARCH_XBOX)
856 Adapter->AdapterHandle,
857 Adapter->InterruptVector,
858 Adapter->InterruptLevel,
859 TRUE, /* Request ISR calls */
860 FALSE,
862#else
864 Adapter->AdapterHandle,
865 Adapter->InterruptVector,
866 Adapter->InterruptLevel,
867 TRUE, /* Request ISR calls */
868 TRUE, /* Shared */
870#endif
872 {
874 goto Failure;
875 }
876
877 NvNetStartAdapter(Adapter);
878
879 return NDIS_STATUS_SUCCESS;
880
881Failure:
882 NvNetFreeAdapter(Adapter);
883
884 return Status;
885}
#define PAGED_CODE()
#define MAX_TRACE
Definition: debug.h:16
static NDIS_STATUS AllocateAdapterMemory(_In_ PNVNET_ADAPTER Adapter)
Definition: init.c:496
VOID NvNetFreeAdapter(_In_ PNVNET_ADAPTER Adapter)
Definition: init.c:595
static VOID NvNetInitReceiveMemory(_In_ PNVNET_ADAPTER Adapter)
Definition: init.c:555
VOID NvNetInitTransmitMemory(_In_ PNVNET_ADAPTER Adapter)
Definition: init.c:532
static NDIS_STATUS NvNetInitializeAdapterResources(_Inout_ PNVNET_ADAPTER Adapter)
Definition: init.c:215
static NDIS_STATUS NvNetReadConfiguration(_Inout_ PNVNET_ADAPTER Adapter)
Definition: init.c:67
NDIS_STATUS EXPORT NdisMInitializeScatterGatherDma(IN NDIS_HANDLE MiniportAdapterHandle, IN BOOLEAN Dma64BitAddresses, IN ULONG MaximumPhysicalMapping)
Definition: io.c:1169
NDIS_STATUS EXPORT NdisMRegisterInterrupt(OUT PNDIS_MINIPORT_INTERRUPT Interrupt, IN NDIS_HANDLE MiniportAdapterHandle, IN UINT InterruptVector, IN UINT InterruptLevel, IN BOOLEAN RequestIsr, IN BOOLEAN SharedInterrupt, IN NDIS_INTERRUPT_MODE InterruptMode)
Definition: io.c:941
NDIS_STATUS EXPORT NdisAllocateMemoryWithTag(OUT PVOID *VirtualAddress, IN UINT Length, IN ULONG Tag)
Definition: memory.c:21
ULONG EXPORT NdisGetSharedDataAlignment(VOID)
Definition: misc.c:502
Status
Definition: gdiplustypes.h:25
#define NDIS_STATUS_NOT_RECOGNIZED
Definition: ndis.h:348
#define NdisInterruptLatched
Definition: ndis.h:921
#define NdisZeroMemory(Destination, Length)
Definition: ndis.h:3926
unsigned int UINT
Definition: ndis.h:50
#define NDIS_ATTRIBUTE_BUS_MASTER
Definition: ndis.h:586
#define NDIS_ERROR_CODE_INTERRUPT_CONNECT
Definition: ndis.h:566
#define NdisInterruptLevelSensitive
Definition: ndis.h:920
#define NDIS_ERROR_CODE_OUT_OF_RESOURCES
Definition: ndis.h:563
#define NDIS_ERROR_CODE_NETWORK_ADDRESS
Definition: ndis.h:570
#define NDIS_ERROR_CODE_ADAPTER_NOT_FOUND
Definition: ndis.h:565
#define NDIS_ERROR_CODE_HARDWARE_FAILURE
Definition: ndis.h:564
_Must_inspect_result_ _Out_ PNDIS_STATUS _Out_ PNDIS_STATUS _Out_ PNDIS_HANDLE _Out_ PUINT SelectedMediumIndex
Definition: ndis.h:6011
_Must_inspect_result_ _Out_ PNDIS_STATUS _Out_ PNDIS_STATUS _Out_ PNDIS_HANDLE _Out_ PUINT _In_ UINT MediumArraySize
Definition: ndis.h:6013
@ NdisInterfacePci
Definition: ndis.h:905
_Must_inspect_result_ _Out_ PNDIS_STATUS _Out_ PNDIS_HANDLE _In_ NDIS_HANDLE WrapperConfigurationContext
Definition: ndis.h:3946
_In_ NDIS_HANDLE MiniportAdapterHandle
Definition: ndis.h:4668
#define NDIS_STATUS_UNSUPPORTED_MEDIA
Definition: ndis.h:490
#define NDIS_STATUS_ADAPTER_NOT_FOUND
Definition: ndis.h:470
#define NDIS_ATTRIBUTE_USES_SAFE_BUFFER_APIS
Definition: ndis.h:592
#define NDIS_ERROR_CODE_UNSUPPORTED_CONFIGURATION
Definition: ndis.h:571
#define NDIS_STATUS_RESOURCES
Definition: ndis.h:466
VOID EXPORT NdisMSetAttributesEx(IN NDIS_HANDLE MiniportAdapterHandle, IN NDIS_HANDLE MiniportAdapterContext, IN UINT CheckForHangTimeInSeconds OPTIONAL, IN ULONG AttributeFlags, IN NDIS_INTERFACE_TYPE AdapterType)
Definition: miniport.c:2883
NDIS_STATUS NvNetRecognizeHardware(_Inout_ PNVNET_ADAPTER Adapter)
Definition: nic.c:675
VOID NvNetSetupMacAddress(_In_ PNVNET_ADAPTER Adapter, _In_reads_bytes_(ETH_LENGTH_OF_ADDRESS) PUCHAR MacAddress)
Definition: nic.c:622
NDIS_STATUS NvNetInitNIC(_In_ PNVNET_ADAPTER Adapter, _In_ BOOLEAN InitPhy)
Definition: nic.c:401
NDIS_STATUS NvNetGetPermanentMacAddress(_Inout_ PNVNET_ADAPTER Adapter, _Out_writes_bytes_all_(ETH_LENGTH_OF_ADDRESS) PUCHAR MacAddress)
Definition: nic.c:541
@ NdisMedium802_3
Definition: ntddndis.h:188
int NDIS_STATUS
Definition: ntddndis.h:475
#define NVREG_IRQSTAT_MASK
Definition: nic.h:53
#define DEV_HAS_LARGEDESC
Definition: nic.h:20
#define NVREG_MIISTAT_MASK_ALL
Definition: nic.h:229
#define DEV_HAS_HIGH_DMA
Definition: nic.h:21
@ NvRegIrqStatus
Definition: nic.h:51
VOID NvNetStartAdapter(_In_ PNVNET_ADAPTER Adapter)
Definition: nvnet.c:74
NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptorsLegacy
Definition: nvnet.h:392
NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptors64
Definition: nvnet.h:394
NVNET_TRANSMIT_PACKET NvNetTransmitPacket64
Definition: nvnet.h:391
#define NVNET_MAXIMUM_FRAME_SIZE
Definition: nvnet.h:60
#define NvNetDisableInterrupts(Adapter)
Definition: nvnet.h:666
#define NvNetLogError(Adapter, ErrorCode)
Definition: nvnet.h:387
struct _NVNET_ADAPTER NVNET_ADAPTER
Definition: nvnet.h:259
NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptors32
Definition: nvnet.h:393
#define NV_USE_SOFT_MAC_ADDRESS
Definition: nvnet.h:294
NVNET_TRANSMIT_PACKET NvNetTransmitPacket32
Definition: nvnet.h:390
#define NVNET_TAG
Definition: nvnet.h:22
UCHAR PermanentMacAddress[ETH_LENGTH_OF_ADDRESS]
Definition: nvnet.h:338
PNVNET_TRANSMIT_PACKET TransmitPacket
Definition: nvnet.h:316
ULONG Features
Definition: nvnet.h:284
ULONG InterruptLevel
Definition: nvnet.h:371
PVOID AdapterOriginal
Definition: nvnet.h:381
NDIS_MINIPORT_INTERRUPT Interrupt
Definition: nvnet.h:369
ULONG InterruptVector
Definition: nvnet.h:370
UCHAR CurrentMacAddress[ETH_LENGTH_OF_ADDRESS]
Definition: nvnet.h:339
NDIS_HANDLE WrapperConfigurationHandle
Definition: nvnet.h:351
#define ALIGN_UP_POINTER_BY(ptr, align)
Definition: umtypes.h:85
_Must_inspect_result_ _In_ WDFDEVICE _In_ PWDF_DEVICE_PROPERTY_DATA _In_ DEVPROPTYPE _In_ ULONG Size
Definition: wdfdevice.h:4533
#define ETH_COPY_NETWORK_ADDRESS(_D, _S)
Definition: xfilter.h:77

◆ MiniportISR()

VOID NTAPI MiniportISR ( _Out_ PBOOLEAN  InterruptRecognized,
_Out_ PBOOLEAN  QueueMiniportHandleInterrupt,
_In_ NDIS_HANDLE  MiniportAdapterContext 
)

Definition at line 518 of file interrupt.c.

522{
523 PNVNET_ADAPTER Adapter = (PNVNET_ADAPTER)MiniportAdapterContext;
524 ULONG InterruptStatus;
525
526 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
527
528 InterruptStatus = NV_READ(Adapter, NvRegIrqStatus);
529
530 /* Clear any interrupt events */
531 NV_WRITE(Adapter, NvRegIrqStatus, InterruptStatus);
532
533 if (InterruptStatus & Adapter->InterruptMask)
534 {
535 /* Disable further interrupts */
536 NvNetDisableInterrupts(Adapter);
537
538 Adapter->InterruptStatus = InterruptStatus;
539
540 *InterruptRecognized = TRUE;
541 *QueueMiniportHandleInterrupt = TRUE;
542 }
543 else
544 {
545 /* This interrupt is not ours */
546 *InterruptRecognized = FALSE;
547 *QueueMiniportHandleInterrupt = FALSE;
548 }
549}
ULONG InterruptMask
Definition: nvnet.h:302

◆ MiniportQueryInformation()

NDIS_STATUS NTAPI MiniportQueryInformation ( _In_ NDIS_HANDLE  MiniportAdapterContext,
_In_ NDIS_OID  Oid,
_In_ PVOID  InformationBuffer,
_In_ ULONG  InformationBufferLength,
_Out_ PULONG  BytesWritten,
_Out_ PULONG  BytesNeeded 
)

Definition at line 973 of file requests.c.

980{
981 PNVNET_ADAPTER Adapter = (PNVNET_ADAPTER)MiniportAdapterContext;
983 ULONG InfoLength;
984 PVOID InfoPtr;
985 union _GENERIC_INFORMATION
986 {
988 ULONG Ulong;
989 ULONG64 Ulong64;
990 NDIS_MEDIUM Medium;
993 } GenericInfo;
994
995 InfoLength = sizeof(ULONG);
996 InfoPtr = &GenericInfo;
997
998 switch (Oid)
999 {
1001 InfoPtr = (PVOID)&NvpSupportedOidList;
1002 InfoLength = sizeof(NvpSupportedOidList);
1003 break;
1004
1006 InfoLength = sizeof(NDIS_HARDWARE_STATUS);
1007 GenericInfo.Status = NdisHardwareStatusReady;
1008 break;
1009
1012 {
1013 InfoLength = sizeof(NDIS_MEDIUM);
1014 GenericInfo.Medium = NdisMedium802_3;
1015 break;
1016 }
1017
1020 {
1021 GenericInfo.Ulong = Adapter->MaximumFrameSize - sizeof(ETH_HEADER);
1022 break;
1023 }
1024
1026 {
1027 GenericInfo.Ulong = Adapter->MaximumFrameSize;
1028 break;
1029 }
1030
1031 case OID_GEN_LINK_SPEED:
1032 {
1033 GenericInfo.Ulong = NvNetGetLinkSpeed(Adapter) * 10000;
1034 break;
1035 }
1036
1038 {
1039 /* TODO: Change this later, once the driver can handle multipacket sends */
1040 GenericInfo.Ulong = Adapter->MaximumFrameSize;
1041 break;
1042 }
1043
1045 {
1046 GenericInfo.Ulong = Adapter->MaximumFrameSize * NVNET_RECEIVE_DESCRIPTORS;
1047 }
1048
1052 {
1053 GenericInfo.Ulong = Adapter->MaximumFrameSize;
1054 break;
1055 }
1056
1057 case OID_GEN_VENDOR_ID:
1058 {
1059 GenericInfo.Ulong = 0;
1060 GenericInfo.Ulong |= (Adapter->PermanentMacAddress[0] << 16);
1061 GenericInfo.Ulong |= (Adapter->PermanentMacAddress[1] << 8);
1062 GenericInfo.Ulong |= (Adapter->PermanentMacAddress[2] & 0xFF);
1063 break;
1064 }
1065
1067 {
1068 InfoLength = sizeof(USHORT);
1069 GenericInfo.Ushort = (NDIS_MINIPORT_MAJOR_VERSION << 8) | NDIS_MINIPORT_MINOR_VERSION;
1070 break;
1071 }
1072
1074 {
1075 static const CHAR VendorDesc[] = "nVidia nForce Ethernet Controller";
1076 InfoPtr = (PVOID)&VendorDesc;
1077 InfoLength = sizeof(VendorDesc);
1078 break;
1079 }
1080
1082 {
1083 GenericInfo.Ulong = Adapter->PacketFilter;
1084 break;
1085 }
1086
1088 {
1089 GenericInfo.Ulong = NDIS_MAC_OPTION_COPY_LOOKAHEAD_DATA |
1092
1093 if (Adapter->Flags & NV_PACKET_PRIORITY)
1094 GenericInfo.Ulong |= NDIS_MAC_OPTION_8021P_PRIORITY;
1095 if (Adapter->Flags & NV_VLAN_TAGGING)
1096 GenericInfo.Ulong |= NDIS_MAC_OPTION_8021Q_VLAN;
1097 break;
1098 }
1099
1101 {
1102 GenericInfo.Ulong = Adapter->Connected ? NdisMediaStateConnected
1104 break;
1105 }
1106
1108 {
1109 /* TODO: Multipacket sends */
1110 GenericInfo.Ulong = 1;
1111 break;
1112 }
1113
1115 {
1116 /* 1.0.0 */
1117 GenericInfo.Ulong = 0x100;
1118 break;
1119 }
1120
1121 case OID_GEN_XMIT_OK:
1122 case OID_GEN_RCV_OK:
1123 case OID_GEN_XMIT_ERROR:
1124 case OID_GEN_RCV_ERROR:
1138 {
1140 {
1141 NvNetReadStatistics(Adapter);
1142 NvNetQueryHwCounter(Adapter, Oid, &GenericInfo.Ulong64);
1143 }
1144 else
1145 {
1146 NvNetQuerySoftwareCounter(Adapter, Oid, &GenericInfo.Ulong64);
1147 }
1148
1149 *BytesNeeded = sizeof(ULONG64);
1150 if (InformationBufferLength < sizeof(ULONG))
1151 {
1152 *BytesWritten = 0;
1154 }
1155 if (InformationBufferLength >= sizeof(ULONG64))
1156 {
1157 *BytesWritten = sizeof(ULONG64);
1158 NdisMoveMemory(InformationBuffer, InfoPtr, sizeof(ULONG64));
1159 }
1160 else
1161 {
1162 *BytesWritten = sizeof(ULONG);
1163 NdisMoveMemory(InformationBuffer, InfoPtr, sizeof(ULONG));
1164 }
1165
1166 return NDIS_STATUS_SUCCESS;
1167 }
1168
1170 {
1171 GenericInfo.Ulong = NVNET_TRANSMIT_BLOCKS - Adapter->Send.TcbSlots;
1172 break;
1173 }
1174
1176 {
1177 InfoPtr = Adapter->PermanentMacAddress;
1178 InfoLength = ETH_LENGTH_OF_ADDRESS;
1179 break;
1180 }
1181
1183 {
1184 InfoPtr = Adapter->CurrentMacAddress;
1185 InfoLength = ETH_LENGTH_OF_ADDRESS;
1186 break;
1187 }
1188
1190 {
1191 InfoPtr = Adapter->MulticastList;
1192 InfoLength = Adapter->MulticastListSize * ETH_LENGTH_OF_ADDRESS;
1193 break;
1194 }
1195
1197 {
1198 GenericInfo.Ulong = NVNET_MULTICAST_LIST_SIZE;
1199 break;
1200 }
1201
1203 {
1204 return NvNetGetTcpTaskOffload(Adapter,
1205 InformationBuffer,
1206 InformationBufferLength,
1208 BytesWritten);
1209 }
1210
1212 {
1213 GenericInfo.Ulong = NvNetGetWakeUp(Adapter);
1214 break;
1215 }
1216
1218 {
1219 InfoLength = sizeof(NDIS_PNP_CAPABILITIES);
1220
1221 if (InformationBufferLength < InfoLength)
1222 {
1223 *BytesWritten = 0;
1224 *BytesNeeded = InfoLength;
1226 }
1227
1228 *BytesWritten = InfoLength;
1229 *BytesNeeded = 0;
1230 return NvNetFillPowerManagementCapabilities(Adapter, InformationBuffer);
1231 }
1232
1234 {
1235 return NDIS_STATUS_SUCCESS;
1236 }
1237
1238 case OID_GEN_VLAN_ID:
1239 {
1240 /* TODO: Implement software VLAN support */
1241 if (!(Adapter->Flags & NV_VLAN_TAGGING))
1242 {
1244 break;
1245 }
1246
1247 GenericInfo.Ulong = Adapter->VlanId;
1248 break;
1249 }
1250
1251 default:
1253 break;
1254 }
1255
1257 {
1258 if (InfoLength > InformationBufferLength)
1259 {
1260 *BytesWritten = 0;
1261 *BytesNeeded = InfoLength;
1263 }
1264 else
1265 {
1266 NdisMoveMemory(InformationBuffer, InfoPtr, InfoLength);
1267 *BytesWritten = InfoLength;
1268 *BytesNeeded = 0;
1269 }
1270 }
1271 else
1272 {
1273 *BytesWritten = 0;
1274 *BytesNeeded = 0;
1275 }
1276
1277 return Status;
1278}
#define ETH_LENGTH_OF_ADDRESS
Definition: efilter.h:16
unsigned __int64 ULONG64
Definition: imports.h:198
#define NDIS_STATUS_NOT_SUPPORTED
Definition: ndis.h:479
#define NDIS_MAC_OPTION_TRANSFERS_NOT_PEND
Definition: ndis.h:684
#define NDIS_STATUS_INVALID_OID
Definition: ndis.h:488
#define NDIS_STATUS_BUFFER_TOO_SHORT
Definition: ndis.h:487
#define NDIS_MAC_OPTION_NO_LOOPBACK
Definition: ndis.h:685
#define NDIS_MAC_OPTION_COPY_LOOKAHEAD_DATA
Definition: ndis.h:682
#define NDIS_MAC_OPTION_8021P_PRIORITY
Definition: ndis.h:688
#define NdisMoveMemory(Destination, Source, Length)
Definition: ndis.h:3896
enum _NDIS_MEDIUM NDIS_MEDIUM
#define OID_GEN_TRANSMIT_BLOCK_SIZE
Definition: ntddndis.h:242
#define OID_GEN_XMIT_OK
Definition: ntddndis.h:267
#define OID_GEN_MAXIMUM_TOTAL_SIZE
Definition: ntddndis.h:249
#define OID_GEN_XMIT_ERROR
Definition: ntddndis.h:269
#define OID_GEN_VENDOR_DRIVER_VERSION
Definition: ntddndis.h:254
#define OID_802_3_PERMANENT_ADDRESS
Definition: ntddndis.h:302
#define OID_GEN_LINK_SPEED
Definition: ntddndis.h:239
#define OID_GEN_VENDOR_ID
Definition: ntddndis.h:244
#define OID_802_3_RCV_OVERRUN
Definition: ntddndis.h:312
#define OID_GEN_CURRENT_PACKET_FILTER
Definition: ntddndis.h:246
@ NdisMediaStateConnected
Definition: ntddndis.h:470
@ NdisMediaStateDisconnected
Definition: ntddndis.h:471
#define OID_GEN_RCV_NO_BUFFER
Definition: ntddndis.h:271
#define OID_802_3_XMIT_HEARTBEAT_FAILURE
Definition: ntddndis.h:314
enum _NDIS_DEVICE_POWER_STATE NDIS_DEVICE_POWER_STATE
#define OID_802_3_XMIT_ONE_COLLISION
Definition: ntddndis.h:308
#define OID_802_3_XMIT_MORE_COLLISIONS
Definition: ntddndis.h:309
#define OID_802_3_XMIT_MAX_COLLISIONS
Definition: ntddndis.h:311
#define OID_GEN_RECEIVE_BUFFER_SPACE
Definition: ntddndis.h:241
#define OID_802_3_XMIT_TIMES_CRS_LOST
Definition: ntddndis.h:315
#define OID_802_3_MAXIMUM_LIST_SIZE
Definition: ntddndis.h:305
#define OID_GEN_DRIVER_VERSION
Definition: ntddndis.h:248
#define OID_802_3_XMIT_UNDERRUN
Definition: ntddndis.h:313
#define OID_802_3_XMIT_LATE_COLLISIONS
Definition: ntddndis.h:316
#define OID_802_3_CURRENT_ADDRESS
Definition: ntddndis.h:303
#define OID_802_3_MULTICAST_LIST
Definition: ntddndis.h:304
struct _NDIS_PNP_CAPABILITIES NDIS_PNP_CAPABILITIES
#define OID_GEN_DIRECTED_FRAMES_RCV
Definition: ntddndis.h:281
#define OID_PNP_ENABLE_WAKE_UP
Definition: ntddndis.h:366
#define OID_GEN_TRANSMIT_BUFFER_SPACE
Definition: ntddndis.h:240
#define OID_GEN_MEDIA_SUPPORTED
Definition: ntddndis.h:235
#define OID_GEN_MAXIMUM_FRAME_SIZE
Definition: ntddndis.h:238
#define OID_GEN_RCV_CRC_ERROR
Definition: ntddndis.h:286
#define NDIS_MAC_OPTION_8021Q_VLAN
Definition: ntddndis.h:440
#define OID_GEN_MEDIA_IN_USE
Definition: ntddndis.h:236
#define OID_GEN_MEDIA_CONNECT_STATUS
Definition: ntddndis.h:252
#define OID_GEN_RCV_OK
Definition: ntddndis.h:268
#define OID_GEN_MAXIMUM_LOOKAHEAD
Definition: ntddndis.h:237
#define OID_802_3_RCV_ERROR_ALIGNMENT
Definition: ntddndis.h:307
#define OID_GEN_VLAN_ID
Definition: ntddndis.h:260
#define OID_PNP_QUERY_POWER
Definition: ntddndis.h:362
#define OID_GEN_RCV_ERROR
Definition: ntddndis.h:270
@ NdisHardwareStatusReady
Definition: ntddndis.h:450
#define OID_PNP_CAPABILITIES
Definition: ntddndis.h:360
#define OID_TCP_TASK_OFFLOAD
Definition: ntddndis.h:377
#define OID_GEN_CURRENT_LOOKAHEAD
Definition: ntddndis.h:247
#define OID_GEN_MAC_OPTIONS
Definition: ntddndis.h:251
#define OID_GEN_VENDOR_DESCRIPTION
Definition: ntddndis.h:245
#define OID_GEN_SUPPORTED_LIST
Definition: ntddndis.h:233
#define OID_802_3_XMIT_DEFERRED
Definition: ntddndis.h:310
#define OID_GEN_RECEIVE_BLOCK_SIZE
Definition: ntddndis.h:243
#define OID_GEN_MAXIMUM_SEND_PACKETS
Definition: ntddndis.h:253
#define OID_GEN_TRANSMIT_QUEUE_LENGTH
Definition: ntddndis.h:287
#define OID_GEN_HARDWARE_STATUS
Definition: ntddndis.h:234
enum _NDIS_HARDWARE_STATUS NDIS_HARDWARE_STATUS
#define DEV_HAS_STATISTICS_COUNTERS
Definition: nic.h:44
static ULONG NvNetGetWakeUp(_In_ PNVNET_ADAPTER Adapter)
Definition: requests.c:737
static VOID NvNetQuerySoftwareCounter(_In_ PNVNET_ADAPTER Adapter, _In_ NDIS_OID Oid, _Out_ PULONG64 Counter)
Definition: requests.c:344
static VOID NvNetReadStatistics(_In_ PNVNET_ADAPTER Adapter)
Definition: requests.c:213
static VOID NvNetQueryHwCounter(_In_ PNVNET_ADAPTER Adapter, _In_ NDIS_OID Oid, _Out_ PULONG64 Counter)
Definition: requests.c:258
static NDIS_STATUS NvNetGetTcpTaskOffload(_In_ PNVNET_ADAPTER Adapter, _In_ PNDIS_TASK_OFFLOAD_HEADER TaskOffloadHeader, _In_ ULONG InformationBufferLength, _Out_ PULONG BytesWritten, _Out_ PULONG BytesNeeded)
Definition: requests.c:756
static NDIS_STATUS NvNetFillPowerManagementCapabilities(_In_ PNVNET_ADAPTER Adapter, _Out_ PNDIS_PNP_CAPABILITIES Capabilities)
Definition: requests.c:413
static ULONG NvNetGetLinkSpeed(_In_ PNVNET_ADAPTER Adapter)
Definition: requests.c:82
static const NDIS_OID NvpSupportedOidList[]
Definition: requests.c:17
#define NVNET_RECEIVE_DESCRIPTORS
Definition: nvnet.h:34
#define NVNET_MULTICAST_LIST_SIZE
Definition: nvnet.h:64
#define NVNET_TRANSMIT_BLOCKS
Definition: nvnet.h:31
#define NV_PACKET_PRIORITY
Definition: nvnet.h:298
#define NV_VLAN_TAGGING
Definition: nvnet.h:299
unsigned short USHORT
Definition: pedump.c:61
Definition: lan.h:33
ULONG MaximumFrameSize
Definition: nvnet.h:321
BOOLEAN Connected
Definition: nvnet.h:334
ULONG PacketFilter
Definition: nvnet.h:309
struct _NVNET_ADAPTER::@1002 MulticastList[NVNET_MULTICAST_LIST_SIZE]
ULONG VlanId
Definition: nvnet.h:323
ULONG TcbSlots
Definition: nvnet.h:246
void * PVOID
Definition: typedefs.h:50
unsigned short Ushort
Definition: utypes.h:44
unsigned long Ulong
Definition: utypes.h:42
_Must_inspect_result_ _In_ PWDFDEVICE_INIT _In_ WDF_DEVICE_POWER_STATE PowerState
Definition: wdfdevice.h:3034
_Must_inspect_result_ _In_ WDFIOTARGET _In_opt_ WDFREQUEST _In_opt_ PWDF_MEMORY_DESCRIPTOR _In_opt_ PLONGLONG _In_opt_ PWDF_REQUEST_SEND_OPTIONS _Out_opt_ PULONG_PTR BytesWritten
Definition: wdfiotarget.h:960
char CHAR
Definition: xmlstorage.h:175

◆ MiniportSend()

NDIS_STATUS NTAPI MiniportSend ( _In_ NDIS_HANDLE  MiniportAdapterContext,
_In_ PNDIS_PACKET  Packet,
_In_ UINT  Flags 
)

Definition at line 49 of file send.c.

53{
54 PE1000_ADAPTER Adapter = (PE1000_ADAPTER)MiniportAdapterContext;
56 ULONG TransmitLength;
57 PHYSICAL_ADDRESS TransmitBuffer;
59
61
62 ASSERT(sgList != NULL);
63 ASSERT(sgList->NumberOfElements == 1);
64 ASSERT((sgList->Elements[0].Address.LowPart & 3) == 0);
65 ASSERT(sgList->Elements[0].Length <= MAXIMUM_FRAME_SIZE);
66
67 if (Adapter->TxFull)
68 {
69 NDIS_DbgPrint(MIN_TRACE, ("All TX descriptors are full\n"));
71 }
72
73 TransmitLength = sgList->Elements[0].Length;
74 TransmitBuffer = sgList->Elements[0].Address;
75 Adapter->TransmitPackets[Adapter->CurrentTxDesc] = Packet;
76
77 Status = NICTransmitPacket(Adapter, TransmitBuffer, TransmitLength);
79 {
80 NDIS_DbgPrint(MIN_TRACE, ("Transmit packet failed\n"));
81 return Status;
82 }
83
85}
#define NULL
Definition: types.h:112
static NDIS_STATUS NICTransmitPacket(_In_ PE1000_ADAPTER Adapter, _In_ PHYSICAL_ADDRESS PhysicalAddress, _In_ ULONG Length)
Definition: send.c:15
#define MAXIMUM_FRAME_SIZE
Definition: nic.h:19
struct _E1000_ADAPTER * PE1000_ADAPTER
#define ASSERT(a)
Definition: mode.c:44
#define NDIS_STATUS_PENDING
Definition: ndis.h:347
_In_ NDIS_HANDLE _In_ PNDIS_PACKET Packet
Definition: ndis.h:1549
#define NDIS_PER_PACKET_INFO_FROM_PACKET(Packet, InfoType)
Definition: ndis.h:1351
@ ScatterGatherListPacketInfo
Definition: ndis.h:1183
BOOLEAN TxFull
Definition: nic.h:81
PNDIS_PACKET TransmitPackets[NUM_TRANSMIT_DESCRIPTORS]
Definition: nic.h:77
ULONG CurrentTxDesc
Definition: nic.h:79
struct _SCATTER_GATHER_LIST * PSCATTER_GATHER_LIST
Definition: iotypes.h:2204

◆ MiniportSetInformation()

NDIS_STATUS NTAPI MiniportSetInformation ( _In_ NDIS_HANDLE  MiniportAdapterContext,
_In_ NDIS_OID  Oid,
_In_ PVOID  InformationBuffer,
_In_ ULONG  InformationBufferLength,
_Out_ PULONG  BytesRead,
_Out_ PULONG  BytesNeeded 
)

Definition at line 1282 of file requests.c.

1289{
1290 PNVNET_ADAPTER Adapter = (PNVNET_ADAPTER)MiniportAdapterContext;
1292 ULONG GenericUlong;
1293
1294 *BytesRead = 0;
1295 *BytesNeeded = 0;
1296
1297 switch (Oid)
1298 {
1300 {
1301 if (InformationBufferLength % ETH_LENGTH_OF_ADDRESS)
1302 {
1303 *BytesNeeded = (InformationBufferLength / ETH_LENGTH_OF_ADDRESS) *
1306 break;
1307 }
1308
1309 if (InformationBufferLength > sizeof(Adapter->MulticastList))
1310 {
1311 *BytesNeeded = sizeof(Adapter->MulticastList);
1313 break;
1314 }
1315
1316 *BytesRead = InformationBufferLength;
1317 NdisMoveMemory(Adapter->MulticastList, InformationBuffer, InformationBufferLength);
1318
1319 Adapter->MulticastListSize = InformationBufferLength / ETH_LENGTH_OF_ADDRESS;
1320
1321 NvNetApplyPacketFilter(Adapter);
1322 break;
1323 }
1324
1326 {
1327 if (InformationBufferLength < sizeof(ULONG))
1328 {
1329 *BytesNeeded = sizeof(ULONG);
1331 break;
1332 }
1333
1334 *BytesRead = sizeof(ULONG);
1335 NdisMoveMemory(&GenericUlong, InformationBuffer, sizeof(ULONG));
1336
1337 if (GenericUlong & ~NVNET_PACKET_FILTERS)
1338 {
1340 break;
1341 }
1342
1343 /* Do not check to see if the filter is the same filter */
1344 Adapter->PacketFilter = GenericUlong;
1345
1346 NvNetApplyPacketFilter(Adapter);
1347 break;
1348 }
1349
1351 {
1352 if (InformationBufferLength < sizeof(ULONG))
1353 {
1354 *BytesNeeded = sizeof(ULONG);
1356 break;
1357 }
1358
1359 /* Nothing to do */
1360 *BytesRead = sizeof(ULONG);
1361 break;
1362 }
1363
1364 case OID_GEN_VLAN_ID:
1365 {
1366 if (InformationBufferLength < sizeof(ULONG))
1367 {
1368 *BytesNeeded = sizeof(ULONG);
1370 break;
1371 }
1372
1373 if (!(Adapter->Flags & NV_VLAN_TAGGING))
1374 {
1376 break;
1377 }
1378
1379 *BytesRead = sizeof(ULONG);
1380 NdisMoveMemory(&GenericUlong, InformationBuffer, sizeof(ULONG));
1381
1382 if (GenericUlong > NVNET_MAXIMUM_VLAN_ID)
1383 {
1385 break;
1386 }
1387
1388 Adapter->VlanId = GenericUlong;
1389 break;
1390 }
1391
1393 {
1394 if (InformationBufferLength < sizeof(NDIS_TASK_OFFLOAD_HEADER))
1395 {
1396 *BytesNeeded = sizeof(NDIS_TASK_OFFLOAD_HEADER);
1398 break;
1399 }
1400
1401 *BytesRead = InformationBufferLength;
1402
1403 Status = NvNetSetTcpTaskOffload(Adapter, InformationBuffer, BytesRead);
1404 break;
1405 }
1406
1408 {
1409 if (InformationBufferLength < sizeof(NDIS_PM_PACKET_PATTERN))
1410 {
1411 *BytesNeeded = sizeof(NDIS_PM_PACKET_PATTERN);
1413 break;
1414 }
1415
1417
1418 Status = NvNetAddWakeUpPattern(Adapter, InformationBuffer);
1419 break;
1420 }
1421
1423 {
1424 if (InformationBufferLength < sizeof(NDIS_PM_PACKET_PATTERN))
1425 {
1426 *BytesNeeded = sizeof(NDIS_PM_PACKET_PATTERN);
1428 break;
1429 }
1430
1432
1433 Status = NvNetRemoveWakeUpPattern(Adapter, InformationBuffer);
1434 break;
1435 }
1436
1438 {
1439 if (InformationBufferLength < sizeof(ULONG))
1440 {
1441 *BytesNeeded = sizeof(ULONG);
1443 break;
1444 }
1445
1446 *BytesRead = sizeof(ULONG);
1447 NdisMoveMemory(&GenericUlong, InformationBuffer, sizeof(ULONG));
1448
1449 NvNetEnableWakeUp(Adapter, GenericUlong);
1450 break;
1451 }
1452
1453 case OID_PNP_SET_POWER:
1454 {
1455 if (InformationBufferLength < sizeof(NDIS_DEVICE_POWER_STATE))
1456 {
1457 *BytesNeeded = sizeof(NDIS_DEVICE_POWER_STATE);
1459 break;
1460 }
1461
1462 *BytesRead = sizeof(ULONG);
1463 NdisMoveMemory(&GenericUlong, InformationBuffer, sizeof(ULONG));
1464
1465 if (GenericUlong < NdisDeviceStateD0 || GenericUlong > NdisDeviceStateD3)
1466 {
1468 break;
1469 }
1470
1471 Status = NvNetSetPower(Adapter, GenericUlong);
1472 break;
1473 }
1474
1475 default:
1477 break;
1478 }
1479
1480 return Status;
1481}
#define NDIS_STATUS_INVALID_DATA
Definition: ndis.h:486
#define NDIS_STATUS_INVALID_LENGTH
Definition: ndis.h:485
#define NDIS_STATUS_FAILURE
Definition: ndis.h:465
struct _NDIS_TASK_OFFLOAD_HEADER NDIS_TASK_OFFLOAD_HEADER
#define NDIS_STATUS_MULTICAST_FULL
Definition: ndis.h:473
struct _NDIS_PM_PACKET_PATTERN NDIS_PM_PACKET_PATTERN
#define OID_PNP_SET_POWER
Definition: ntddndis.h:361
#define OID_PNP_ADD_WAKE_UP_PATTERN
Definition: ntddndis.h:363
#define OID_PNP_REMOVE_WAKE_UP_PATTERN
Definition: ntddndis.h:364
@ NdisDeviceStateD3
Definition: ntddndis.h:41
static VOID NvNetEnableWakeUp(_In_ PNVNET_ADAPTER Adapter, _In_ ULONG Flags)
Definition: requests.c:747
static DECLSPEC_NOINLINE VOID NvNetApplyPacketFilter(_In_ PNVNET_ADAPTER Adapter)
Definition: requests.c:130
static NDIS_STATUS NvNetSetPower(_In_ PNVNET_ADAPTER Adapter, _In_ NDIS_DEVICE_POWER_STATE NewPowerState)
Definition: requests.c:646
static NDIS_STATUS NvNetAddWakeUpPattern(_In_ PNVNET_ADAPTER Adapter, _In_ PNDIS_PM_PACKET_PATTERN Pattern)
Definition: requests.c:660
static NDIS_STATUS NvNetSetTcpTaskOffload(_Inout_ PNVNET_ADAPTER Adapter, _In_ PNDIS_TASK_OFFLOAD_HEADER TaskOffloadHeader, _In_ PULONG BytesRead)
Definition: requests.c:864
static NDIS_STATUS NvNetRemoveWakeUpPattern(_In_ PNVNET_ADAPTER Adapter, _In_ PNDIS_PM_PACKET_PATTERN Pattern)
Definition: requests.c:697
#define NVNET_MAXIMUM_VLAN_ID
Definition: nvnet.h:62
#define NVNET_PACKET_FILTERS
Definition: nvnet.h:69
_Must_inspect_result_ _In_ WDFIOTARGET _In_opt_ WDFREQUEST _In_opt_ PWDF_MEMORY_DESCRIPTOR _In_opt_ PLONGLONG _In_opt_ PWDF_REQUEST_SEND_OPTIONS _Out_opt_ PULONG_PTR BytesRead
Definition: wdfiotarget.h:870

◆ NV_NEXT_TBD_32()

FORCEINLINE NVNET_TBD NV_NEXT_TBD_32 ( _In_ PNVNET_ADAPTER  Adapter,
_In_ NVNET_TBD  Tbd 
)

Definition at line 622 of file nvnet.h.

625{
626 if (Tbd.x32++ == Adapter->Send.TailTbd.x32)
627 return Adapter->Send.HeadTbd;
628 else
629 return Tbd;
630}

Referenced by NvNetTransmitPacket32().

◆ NV_NEXT_TBD_64()

FORCEINLINE NVNET_TBD NV_NEXT_TBD_64 ( _In_ PNVNET_ADAPTER  Adapter,
_In_ NVNET_TBD  Tbd 
)

Definition at line 634 of file nvnet.h.

637{
638 if (Tbd.x64++ == Adapter->Send.TailTbd.x64)
639 return Adapter->Send.HeadTbd;
640 else
641 return Tbd;
642}

Referenced by NvNetTransmitPacket64().

◆ NV_NEXT_TCB()

FORCEINLINE PNVNET_TCB NV_NEXT_TCB ( _In_ PNVNET_ADAPTER  Adapter,
_In_ PNVNET_TCB  Tcb 
)

Definition at line 610 of file nvnet.h.

613{
614 if (Tcb++ == Adapter->Send.TailTcb)
615 return Adapter->Send.HeadTcb;
616 else
617 return Tcb;
618}

Referenced by NvNetFlushTransmitQueue(), NvNetSendPacket(), NvNetSendPacketLargeSend(), ProcessTransmitDescriptors32(), ProcessTransmitDescriptors64(), and ProcessTransmitDescriptorsLegacy().

◆ NV_READ()

◆ NV_RELEASE_TCB()

FORCEINLINE VOID NV_RELEASE_TCB ( _In_ PNVNET_ADAPTER  Adapter,
_In_ PNVNET_TCB  Tcb 
)

Definition at line 590 of file nvnet.h.

593{
594 if (Tcb->Flags & NV_TCB_COALESCE)
595 {
596 PushEntryList(&Adapter->Send.BufferList, &Tcb->Buffer->Link);
597 }
598
599 Tcb->Packet = NULL;
600
601 ++Adapter->Send.TcbSlots;
602
603 Adapter->Send.TbdSlots += Tcb->Slots;
604
605 Adapter->Send.StuckCount = 0;
606}
#define NV_TCB_COALESCE
Definition: nvnet.h:216
FORCEINLINE VOID PushEntryList(_Inout_ PSINGLE_LIST_ENTRY ListHead, _Inout_ __drv_aliasesMem PSINGLE_LIST_ENTRY Entry)
Definition: rtlfuncs.h:253

Referenced by NvNetFlushTransmitQueue(), ProcessTransmitDescriptors32(), ProcessTransmitDescriptors64(), and ProcessTransmitDescriptorsLegacy().

◆ NV_WRITE()

◆ NvNetBackoffReseed()

VOID NvNetBackoffReseed ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 91 of file backoff.c.

93{
94 ULONG SlotTime;
95 BOOLEAN RestartTransmitter = FALSE;
97
98 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
99
100 if ((Sample.LowPart & NVREG_SLOTTIME_MASK) == 0)
101 {
102 Sample.LowPart = 8;
103 }
104
105 SlotTime = NV_READ(Adapter, NvRegSlotTime) & ~NVREG_SLOTTIME_MASK;
106 SlotTime |= Sample.LowPart & NVREG_SLOTTIME_MASK;
107
109 {
110 RestartTransmitter = TRUE;
111 NvNetStopTransmitter(Adapter);
112 }
113 NvNetStopReceiver(Adapter);
114
115 NV_WRITE(Adapter, NvRegSlotTime, SlotTime);
116
117 if (RestartTransmitter)
118 {
119 NvNetStartTransmitter(Adapter);
120 }
121 NvNetStartReceiver(Adapter);
122}
unsigned char BOOLEAN
LARGE_INTEGER NTAPI KeQueryPerformanceCounter(IN PLARGE_INTEGER PerformanceFreq)
Definition: timer.c:138
VOID NvNetStartTransmitter(_In_ PNVNET_ADAPTER Adapter)
Definition: nic.c:130
VOID NvNetStartReceiver(_In_ PNVNET_ADAPTER Adapter)
Definition: nic.c:104
VOID NvNetStopReceiver(_In_ PNVNET_ADAPTER Adapter)
Definition: nic.c:147
VOID NvNetStopTransmitter(_In_ PNVNET_ADAPTER Adapter)
Definition: nic.c:178
#define NVREG_XMITCTL_START
Definition: nic.h:95
#define NVREG_SLOTTIME_MASK
Definition: nic.h:137
@ NvRegSlotTime
Definition: nic.h:131
@ NvRegTransmitterControl
Definition: nic.h:94
ULONG LowPart
Definition: typedefs.h:106

Referenced by ProcessTransmitDescriptors32(), ProcessTransmitDescriptors64(), and ProcessTransmitDescriptorsLegacy().

◆ NvNetBackoffReseedEx()

VOID NvNetBackoffReseedEx ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 125 of file backoff.c.

127{
128 LARGE_INTEGER Sample;
129 ULONG Seed[3], ReversedSeed[2], CombinedSeed, SeedSet;
130 ULONG i, Temp;
131
132 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
133
135 Seed[0] = Sample.LowPart & 0x0FFF;
136 if (Seed[0] == 0)
137 {
138 Seed[0] = 0x0ABC;
139 }
140
142 Seed[1] = Sample.LowPart & 0x0FFF;
143 if (Seed[1] == 0)
144 {
145 Seed[1] = 0x0ABC;
146 }
147 ReversedSeed[0] = REVERSE_SEED(Seed[1]);
148
150 Seed[2] = Sample.LowPart & 0x0FFF;
151 if (Seed[2] == 0)
152 {
153 Seed[2] = 0x0ABC;
154 }
155 ReversedSeed[1] = REVERSE_SEED(Seed[2]);
156
157 CombinedSeed = ((Seed[0] ^ ReversedSeed[0]) << 12) | (Seed[1] ^ ReversedSeed[1]);
158 if ((CombinedSeed & NVREG_BKOFFCTRL_SEED_MASK) == 0)
159 {
160 CombinedSeed |= 8;
161 }
162 if ((CombinedSeed & (NVREG_BKOFFCTRL_SEED_MASK << NVREG_BKOFFCTRL_GEAR)) == 0)
163 {
164 CombinedSeed |= 8 << NVREG_BKOFFCTRL_GEAR;
165 }
166
167 /* No need to disable transmitter here */
169 Temp |= CombinedSeed & NVREG_BKOFFCTRL_SEED_MASK;
170 Temp |= CombinedSeed >> NVREG_BKOFFCTRL_GEAR;
171 NV_WRITE(Adapter, NvRegBackOffControl, Temp);
172
173 /* Setup seeds for all gear LFSRs */
175 SeedSet = Sample.LowPart % BACKOFF_SEEDSET_ROWS;
176 for (i = 1; i <= BACKOFF_SEEDSET_LFSRS; ++i)
177 {
179 Temp |= NvpMainSeedSet[SeedSet][i - 1] & NVREG_BKOFFCTRL_SEED_MASK;
180 Temp |= (NvpGearSeedSet[SeedSet][i - 1] & NVREG_BKOFFCTRL_SEED_MASK)
182 NV_WRITE(Adapter, NvRegBackOffControl, Temp);
183 }
184}
static const ULONG NvpGearSeedSet[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS]
Definition: backoff.c:42
#define BACKOFF_SEEDSET_ROWS
Definition: backoff.c:25
#define REVERSE_SEED(s)
Definition: backoff.c:28
#define BACKOFF_SEEDSET_LFSRS
Definition: backoff.c:26
static const ULONG NvpMainSeedSet[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS]
Definition: backoff.c:30
#define NVREG_BKOFFCTRL_SEED_MASK
Definition: nic.h:171
#define NVREG_BKOFFCTRL_GEAR
Definition: nic.h:173
#define NVREG_BKOFFCTRL_DEFAULT
Definition: nic.h:170
#define NVREG_BKOFFCTRL_SELECT
Definition: nic.h:172
@ NvRegBackOffControl
Definition: nic.h:169

Referenced by NvNetBackoffSetSlotTime(), ProcessTransmitDescriptors32(), and ProcessTransmitDescriptors64().

◆ NvNetBackoffSetSlotTime()

VOID NvNetBackoffSetSlotTime ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 58 of file backoff.c.

60{
62
63 PAGED_CODE();
64
65 if ((Sample.LowPart & NVREG_SLOTTIME_MASK) == 0)
66 {
67 Sample.LowPart = 8;
68 }
69
70 if (Adapter->Features & (DEV_HAS_HIGH_DMA | DEV_HAS_LARGEDESC))
71 {
72 if (Adapter->Features & DEV_HAS_GEAR_MODE)
73 {
75 NvNetBackoffReseedEx(Adapter);
76 }
77 else
78 {
81 }
82 }
83 else
84 {
85 NV_WRITE(Adapter, NvRegSlotTime,
87 }
88}
VOID NvNetBackoffReseedEx(_In_ PNVNET_ADAPTER Adapter)
Definition: backoff.c:125
#define NVREG_SLOTTIME_DEFAULT
Definition: nic.h:136
#define NVREG_SLOTTIME_10_100_FULL
Definition: nic.h:133
#define DEV_HAS_GEAR_MODE
Definition: nic.h:39
#define NVREG_SLOTTIME_LEGBF_ENABLED
Definition: nic.h:132

Referenced by NvNetInitNIC().

◆ NvNetFindPhyDevice()

NDIS_STATUS NvNetFindPhyDevice ( _In_ PNVNET_ADAPTER  Adapter)

◆ NvNetFlushTransmitQueue()

VOID NvNetFlushTransmitQueue ( _In_ PNVNET_ADAPTER  Adapter,
_In_ NDIS_STATUS  CompleteStatus 
)

Definition at line 24 of file nvnet.c.

27{
28 PNVNET_TCB Tcb;
29
30 PAGED_CODE();
31
32 for (Tcb = Adapter->Send.LastTcb;
33 Tcb != Adapter->Send.CurrentTcb;
34 Tcb = NV_NEXT_TCB(Adapter, Tcb))
35 {
36 NdisMSendComplete(Adapter->AdapterHandle,
37 Tcb->Packet,
38 CompleteStatus);
39
40 NV_RELEASE_TCB(Adapter, Tcb);
41 }
42}
FORCEINLINE VOID NV_RELEASE_TCB(_In_ PNVNET_ADAPTER Adapter, _In_ PNVNET_TCB Tcb)
Definition: nvnet.h:590
FORCEINLINE PNVNET_TCB NV_NEXT_TCB(_In_ PNVNET_ADAPTER Adapter, _In_ PNVNET_TCB Tcb)
Definition: nvnet.h:610
PNDIS_PACKET Packet
Definition: nvnet.h:208

Referenced by MiniportHalt(), NvNetPowerWorker(), and NvNetResetWorker().

◆ NvNetFreeAdapter()

VOID NvNetFreeAdapter ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 595 of file init.c.

597{
598 ULONG i;
600
601 PAGED_CODE();
602
603 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
604
605 for (i = 0; i < RTL_NUMBER_OF(Adapter->WakeFrames); ++i)
606 {
607 PNVNET_WAKE_FRAME WakeFrame = Adapter->WakeFrames[i];
608
609 if (!WakeFrame)
610 continue;
611
612 NdisFreeMemory(WakeFrame, sizeof(*WakeFrame), 0);
613 }
614
615 if (Adapter->Interrupt.InterruptObject)
616 {
617 NdisMDeregisterInterrupt(&Adapter->Interrupt);
618 Adapter->Interrupt.InterruptObject = NULL;
619 }
620
621 if (Adapter->Features & DEV_HAS_HIGH_DMA)
622 {
624 }
625 else
626 {
628 }
629 if (Adapter->TbdOriginal)
630 {
631 NdisMFreeSharedMemory(Adapter->AdapterHandle,
633 FALSE,
634 Adapter->TbdOriginal,
635 Adapter->TbdPhysOriginal);
636 Adapter->TbdOriginal = NULL;
637 }
638 if (Adapter->RbdOriginal)
639 {
640 NdisMFreeSharedMemory(Adapter->AdapterHandle,
642 FALSE,
643 Adapter->RbdOriginal,
644 Adapter->RbdPhysOriginal);
645 Adapter->RbdOriginal = NULL;
646 }
647 if (Adapter->SendBuffer)
648 {
649 ULONG Length = ALIGN_UP_BY(Adapter->MaximumFrameSize, NVNET_ALIGNMENT);
650
651 for (i = 0; i < NVNET_TRANSMIT_BUFFERS; ++i)
652 {
653 PNVNET_TX_BUFFER_DATA SendBufferData = &Adapter->SendBufferAllocationData[i];
654
655 if (!SendBufferData->VirtualAddress)
656 continue;
657
658 NdisMFreeSharedMemory(Adapter->AdapterHandle,
659 Length,
660 TRUE,
661 SendBufferData->VirtualAddress,
662 SendBufferData->PhysicalAddress);
663 }
664
665 NdisFreeMemory(Adapter->SendBuffer, NVNET_TRANSMIT_BUFFERS * sizeof(NVNET_TX_BUFFER), 0);
666 Adapter->SendBuffer = NULL;
667 }
668
669 if (Adapter->ReceiveBuffer)
670 {
671 NdisMFreeSharedMemory(Adapter->AdapterHandle,
673 FALSE,
674 Adapter->ReceiveBuffer,
675 Adapter->ReceiveBufferPhys);
676 Adapter->ReceiveBuffer = NULL;
677 }
678
679 if (Adapter->IoBase)
680 {
681 NdisMUnmapIoSpace(Adapter->AdapterHandle,
682 Adapter->IoBase,
683 Adapter->IoLength);
684 Adapter->IoBase = NULL;
685 }
686
687 if (Adapter->Lock.SpinLock)
688 NdisFreeSpinLock(&Adapter->Lock);
689 if (Adapter->Send.Lock.SpinLock)
690 NdisFreeSpinLock(&Adapter->Send.Lock);
691 if (Adapter->Receive.Lock.SpinLock)
692 NdisFreeSpinLock(&Adapter->Receive.Lock);
693
694 NdisFreeMemory(Adapter->AdapterOriginal, sizeof(NVNET_ADAPTER), 0);
695}
#define ALIGN_UP_BY(size, align)
#define RTL_NUMBER_OF(x)
Definition: RtlRegistry.c:12
VOID EXPORT NdisMDeregisterInterrupt(IN PNDIS_MINIPORT_INTERRUPT Interrupt)
Definition: io.c:700
VOID EXPORT NdisMUnmapIoSpace(IN NDIS_HANDLE MiniportAdapterHandle, IN PVOID VirtualAddress, IN UINT Length)
Definition: io.c:1139
VOID EXPORT NdisFreeMemory(IN PVOID VirtualAddress, IN UINT Length, IN UINT MemoryFlags)
Definition: memory.c:110
VOID EXPORT NdisMFreeSharedMemory(IN NDIS_HANDLE MiniportAdapterHandle, IN ULONG Length, IN BOOLEAN Cached, IN PVOID VirtualAddress, IN NDIS_PHYSICAL_ADDRESS PhysicalAddress)
Definition: memory.c:215
#define NdisFreeSpinLock(_SpinLock)
Definition: ndis.h:4097
_In_ ULONG _In_ ULONG _In_ ULONG Length
Definition: ntddpcm.h:102
struct _NVNET_DESCRIPTOR_32 NVNET_DESCRIPTOR_32
struct _NVNET_DESCRIPTOR_64 NVNET_DESCRIPTOR_64
#define NVNET_ALIGNMENT
Definition: nvnet.h:37
#define NVNET_RECEIVE_BUFFER_SIZE
Definition: nvnet.h:39
#define NVNET_TRANSMIT_DESCRIPTORS
Definition: nvnet.h:32
#define NVNET_TRANSMIT_BUFFERS
Definition: nvnet.h:33
NDIS_PHYSICAL_ADDRESS PhysicalAddress
Definition: nvnet.h:187
PVOID VirtualAddress
Definition: nvnet.h:186
_In_ SIZE_T DescriptorSize
Definition: nls.c:40

Referenced by MiniportHalt(), and MiniportInitialize().

◆ NvNetGetPermanentMacAddress()

NDIS_STATUS NvNetGetPermanentMacAddress ( _Inout_ PNVNET_ADAPTER  Adapter,
_Out_writes_bytes_all_(ETH_LENGTH_OF_ADDRESS) PUCHAR  MacAddress 
)

Definition at line 541 of file nic.c.

544{
545 ULONG Temp[2], TxPoll;
546
547 PAGED_CODE();
548
549 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
550
551 Temp[0] = NV_READ(Adapter, NvRegMacAddrA);
552 Temp[1] = NV_READ(Adapter, NvRegMacAddrB);
553
554 TxPoll = NV_READ(Adapter, NvRegTransmitPoll);
555
556 if (Adapter->Features & DEV_HAS_CORRECT_MACADDR)
557 {
558 /* MAC address is already in the correct order */
559 MacAddress[0] = (Temp[0] >> 0) & 0xFF;
560 MacAddress[1] = (Temp[0] >> 8) & 0xFF;
561 MacAddress[2] = (Temp[0] >> 16) & 0xFF;
562 MacAddress[3] = (Temp[0] >> 24) & 0xFF;
563 MacAddress[4] = (Temp[1] >> 0) & 0xFF;
564 MacAddress[5] = (Temp[1] >> 8) & 0xFF;
565 }
566 /* Handle the special flag for the correct MAC address order */
567 else if (TxPoll & NVREG_TRANSMITPOLL_MAC_ADDR_REV)
568 {
569 /* MAC address is already in the correct order */
570 MacAddress[0] = (Temp[0] >> 0) & 0xFF;
571 MacAddress[1] = (Temp[0] >> 8) & 0xFF;
572 MacAddress[2] = (Temp[0] >> 16) & 0xFF;
573 MacAddress[3] = (Temp[0] >> 24) & 0xFF;
574 MacAddress[4] = (Temp[1] >> 0) & 0xFF;
575 MacAddress[5] = (Temp[1] >> 8) & 0xFF;
576
577 /*
578 * Set original MAC address back to the reversed version.
579 * This flag will be cleared during low power transition.
580 * Therefore, we should always put back the reversed address.
581 */
582 Temp[0] = (MacAddress[5] << 0) | (MacAddress[4] << 8) |
583 (MacAddress[3] << 16) | (MacAddress[2] << 24);
584 Temp[1] = (MacAddress[1] << 0) | (MacAddress[0] << 8);
585 }
586 else
587 {
588 /* Need to reverse MAC address to the correct order */
589 MacAddress[0] = (Temp[1] >> 8) & 0xFF;
590 MacAddress[1] = (Temp[1] >> 0) & 0xFF;
591 MacAddress[2] = (Temp[0] >> 24) & 0xFF;
592 MacAddress[3] = (Temp[0] >> 16) & 0xFF;
593 MacAddress[4] = (Temp[0] >> 8) & 0xFF;
594 MacAddress[5] = (Temp[0] >> 0) & 0xFF;
595
596 /*
597 * Use a flag to signal the driver whether the MAC address was already corrected,
598 * so that it is not reversed again on a subsequent initialize.
599 */
601 }
602
603 Adapter->OriginalMacAddress[0] = Temp[0];
604 Adapter->OriginalMacAddress[1] = Temp[1];
605
606 NDIS_DbgPrint(MIN_TRACE, ("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
607 MacAddress[0],
608 MacAddress[1],
609 MacAddress[2],
610 MacAddress[3],
611 MacAddress[4],
612 MacAddress[5]));
613
614 if (ETH_IS_MULTICAST(MacAddress) || ETH_IS_EMPTY(MacAddress))
616
617 return NDIS_STATUS_SUCCESS;
618}
#define ETH_IS_EMPTY(Address)
Definition: util.h:22
#define NDIS_STATUS_INVALID_ADDRESS
Definition: ndis.h:500
#define NVREG_TRANSMITPOLL_MAC_ADDR_REV
Definition: nic.h:183
#define DEV_HAS_CORRECT_MACADDR
Definition: nic.h:32
@ NvRegTransmitPoll
Definition: nic.h:182
@ NvRegMacAddrB
Definition: nic.h:151
@ NvRegMacAddrA
Definition: nic.h:150
#define ETH_IS_MULTICAST(Address)
Definition: xfilter.h:37

Referenced by MiniportInitialize().

◆ NvNetIdleTransmitter()

VOID NvNetIdleTransmitter ( _In_ PNVNET_ADAPTER  Adapter,
_In_ BOOLEAN  ClearPhyControl 
)

Definition at line 211 of file nic.c.

214{
215 ULONG i;
216
217 PAGED_CODE();
218
219 if (ClearPhyControl)
220 {
223 }
224 else
225 {
227 (Adapter->PhyAddress << NVREG_ADAPTCTL_PHYSHIFT) |
229 }
230
231 NV_WRITE(Adapter, NvRegTxRxControl, Adapter->TxRxControl | NVREG_TXRXCTL_BIT2);
232 for (i = 0; i < NV_TXIDLE_ATTEMPTS; ++i)
233 {
235 break;
236
238 }
239}
#define NV_TXIDLE_DELAY
Definition: nic.h:448
#define NVREG_TXRXCTL_BIT2
Definition: nic.h:203
#define NVREG_ADAPTCTL_PHYVALID
Definition: nic.h:237
#define NVREG_ADAPTCTL_RUNNING
Definition: nic.h:238
#define NVREG_ADAPTCTL_PHYSHIFT
Definition: nic.h:239
#define NVREG_TXRXCTL_IDLE
Definition: nic.h:204
#define NV_TXIDLE_ATTEMPTS
Definition: nic.h:449
@ NvRegAdapterControl
Definition: nic.h:234
@ NvRegTxRxControl
Definition: nic.h:200

Referenced by MiniportHalt(), MiniportShutdown(), NvNetPowerWorker(), and NvNetResetWorker().

◆ NvNetInitNIC()

NDIS_STATUS NvNetInitNIC ( _In_ PNVNET_ADAPTER  Adapter,
_In_ BOOLEAN  InitPhy 
)

Definition at line 401 of file nic.c.

404{
405 ULONG MiiControl, i;
407
408 PAGED_CODE();
409
410 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
411
412 /* Disable WOL */
413 NV_WRITE(Adapter, NvRegWakeUpFlags, 0);
414
415 if (InitPhy)
416 {
417 Status = NvNetPhyInit(Adapter);
419 {
420 return Status;
421 }
422 }
423
424 if (Adapter->PauseFlags & NV_PAUSEFRAME_TX_CAPABLE)
425 {
427 }
428
429 /* Power up PHY */
430 MiiRead(Adapter, Adapter->PhyAddress, MII_CONTROL, &MiiControl);
431 MiiControl &= ~MII_CR_POWER_DOWN;
432 MiiWrite(Adapter, Adapter->PhyAddress, MII_CONTROL, MiiControl);
433
435
436 NvNetResetMac(Adapter);
437
438 /* Clear multicast masks and addresses */
439 NV_WRITE(Adapter, NvRegMulticastAddrA, 0);
440 NV_WRITE(Adapter, NvRegMulticastAddrB, 0);
443
445 NV_WRITE(Adapter, NvRegReceiverControl, 0);
446
447 NV_WRITE(Adapter, NvRegAdapterControl, 0);
448
449 NV_WRITE(Adapter, NvRegLinkSpeed, 0);
453 NV_WRITE(Adapter, NvRegUnknownSetupReg6, 0);
454
455 /* Receive descriptor ring buffer */
457 NdisGetPhysicalAddressLow(Adapter->RbdPhys));
458 if (Adapter->Features & DEV_HAS_HIGH_DMA)
459 {
461 NdisGetPhysicalAddressHigh(Adapter->RbdPhys));
462 }
463
464 /* Transmit descriptor ring buffer */
466 NdisGetPhysicalAddressLow(Adapter->TbdPhys));
467 if (Adapter->Features & DEV_HAS_HIGH_DMA)
468 {
470 NdisGetPhysicalAddressHigh(Adapter->TbdPhys));
471 }
472
473 /* Ring sizes */
474 NV_WRITE(Adapter, NvRegRingSizes,
477
478 /* Set default link speed settings */
480
481 if (Adapter->Features & (DEV_HAS_HIGH_DMA | DEV_HAS_LARGEDESC))
483 else
485
486 NV_WRITE(Adapter, NvRegTxRxControl, Adapter->TxRxControl);
487 NV_WRITE(Adapter, NvRegVlanControl, Adapter->VlanControl);
488 NV_WRITE(Adapter, NvRegTxRxControl, Adapter->TxRxControl | NVREG_TXRXCTL_BIT1);
489
490 for (i = 0; i < NV_SETUP5_DELAYMAX; ++i)
491 {
493 break;
494
496 }
497
498 NV_WRITE(Adapter, NvRegMIIMask, 0);
501
506 + NV_RX_HEADERS);
507
509
511
514
515 if (Adapter->OptimizationMode == NV_OPTIMIZATION_MODE_THROUGHPUT)
517 else
520
522 (Adapter->PhyAddress << NVREG_ADAPTCTL_PHYSHIFT) |
526
528 NV_WRITE(Adapter, NvRegPowerState,
530
531 if (Adapter->Features & DEV_HAS_STATISTICS_COUNTERS)
532 {
534 }
535
536 return NDIS_STATUS_SUCCESS;
537}
VOID NvNetBackoffSetSlotTime(_In_ PNVNET_ADAPTER Adapter)
Definition: backoff.c:58
BOOLEAN MiiRead(_In_ PDC21X4_ADAPTER Adapter, _In_ ULONG PhyAddress, _In_ ULONG RegAddress, _Out_ PULONG Data)
Definition: phy.c:101
BOOLEAN MiiWrite(_In_ PDC21X4_ADAPTER Adapter, _In_ ULONG PhyAddress, _In_ ULONG RegAddress, _In_ ULONG Data)
Definition: phy.c:78
#define MII_CONTROL
Definition: dc21x4hw.h:556
#define NdisGetPhysicalAddressLow(PhysicalAddress)
Definition: ndis.h:3847
#define NdisGetPhysicalAddressHigh(PhysicalAddress)
Definition: ndis.h:3830
static VOID NvNetResetMac(_In_ PNVNET_ADAPTER Adapter)
Definition: nic.c:58
VOID NvNetToggleClockPowerGating(_In_ PNVNET_ADAPTER Adapter, _In_ BOOLEAN Gate)
Definition: nic.c:294
VOID NvNetResetReceiverAndTransmitter(_In_ PNVNET_ADAPTER Adapter)
Definition: nic.c:91
static VOID NvNetClearStatisticsCounters(_In_ PNVNET_ADAPTER Adapter)
Definition: nic.c:28
#define NVREG_POWERSTATE_VALID
Definition: nic.h:289
#define NVREG_MCASTMASKB_NONE
Definition: nic.h:161
#define NVREG_PFF_ALWAYS
Definition: nic.h:115
#define NVREG_MISC1_FORCE
Definition: nic.h:92
#define NV_SETUP5_DELAYMAX
Definition: nic.h:454
#define NVREG_TX_WM_DESC1_DEFAULT
Definition: nic.h:196
#define NVREG_TXRXCTL_BIT1
Definition: nic.h:202
#define NVREG_UNKSETUP6_VAL
Definition: nic.h:74
#define NV_RX_HEADERS
Definition: nic.h:471
#define NVREG_TX_DEFERRAL_DEFAULT
Definition: nic.h:140
#define NV_SETUP5_DELAY
Definition: nic.h:453
#define NVREG_POLL_DEFAULT_THROUGHPUT
Definition: nic.h:77
#define NVREG_MIIDELAY
Definition: nic.h:243
#define NVREG_POLL_DEFAULT_CPU
Definition: nic.h:78
#define NVREG_TX_WM_DESC2_3_DEFAULT
Definition: nic.h:197
#define NV_PAUSEFRAME_TX_CAPABLE
Definition: nic.h:544
#define NVREG_PFF_MYADDR
Definition: nic.h:117
#define NVREG_RX_DEFERRAL_DEFAULT
Definition: nic.h:148
#define NVREG_MCASTMASKA_NONE
Definition: nic.h:158
#define NVREG_UNKSETUP5_BIT31
Definition: nic.h:193
#define NVREG_RINGSZ_RXSHIFT
Definition: nic.h:180
#define NVREG_MII_LINKCHANGE
Definition: nic.h:232
#define NVREG_MIISPEED_BIT8
Definition: nic.h:242
#define NVREG_LINKSPEED_FORCE
Definition: nic.h:186
#define NVREG_MISC1_HD
Definition: nic.h:91
#define NVREG_LINKSPEED_10
Definition: nic.h:187
@ NvRegRxDeferral
Definition: nic.h:147
@ NvRegRxRingPhysAddr
Definition: nic.h:176
@ NvRegReceiverStatus
Definition: nic.h:128
@ NvRegMulticastAddrA
Definition: nic.h:153
@ NvRegTxWatermark
Definition: nic.h:195
@ NvRegRxRingPhysAddrHigh
Definition: nic.h:214
@ NvRegWakeUpFlags
Definition: nic.h:255
@ NvRegMulticastMaskA
Definition: nic.h:157
@ NvRegRingSizes
Definition: nic.h:178
@ NvRegTxDeferral
Definition: nic.h:139
@ NvRegReceiverControl
Definition: nic.h:124
@ NvRegLinkSpeed
Definition: nic.h:185
@ NvRegTxRingPhysAddrHigh
Definition: nic.h:213
@ NvRegTxPauseFrame
Definition: nic.h:216
@ NvRegVlanControl
Definition: nic.h:327
@ NvRegPollingInterval
Definition: nic.h:76
@ NvRegMIIMask
Definition: nic.h:231
@ NvRegPacketFilterFlags
Definition: nic.h:113
@ NvRegPowerState
Definition: nic.h:287
@ NvRegUnknownSetupReg5
Definition: nic.h:192
@ NvRegMulticastMaskB
Definition: nic.h:160
@ NvRegTransmitterStatus
Definition: nic.h:110
@ NvRegUnknownSetupReg6
Definition: nic.h:73
@ NvRegMIISpeed
Definition: nic.h:241
@ NvRegMulticastAddrB
Definition: nic.h:154
@ NvRegOffloadConfig
Definition: nic.h:120
@ NvRegTxRingPhysAddr
Definition: nic.h:175
@ NvRegMisc1
Definition: nic.h:89
#define NVREG_RINGSZ_TXSHIFT
Definition: nic.h:179
#define NVREG_TX_PAUSEFRAME_DISABLE
Definition: nic.h:217
NDIS_STATUS NvNetPhyInit(_In_ PNVNET_ADAPTER Adapter)
Definition: phy.c:1036

Referenced by MiniportInitialize(), NvNetPowerWorker(), and NvNetResetWorker().

◆ NvNetPauseProcessing()

DECLSPEC_NOINLINE VOID NvNetPauseProcessing ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 46 of file nvnet.c.

48{
50
51 NdisAcquireSpinLock(&Adapter->Send.Lock);
52 Adapter->Flags &= ~NV_ACTIVE;
53 NdisReleaseSpinLock(&Adapter->Send.Lock);
54}
#define NdisReleaseSpinLock(_SpinLock)
Definition: ndis.h:4115
#define NdisAcquireSpinLock(_SpinLock)
Definition: ndis.h:4106

Referenced by MiniportHalt(), MiniportReset(), MiniportShutdown(), and NvNetPowerWorker().

◆ NvNetPhyInit()

NDIS_STATUS NvNetPhyInit ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 1036 of file phy.c.

1038{
1039 ULONG PhyState;
1040 BOOLEAN RestorePhyState = FALSE, PhyInitialized = FALSE;
1041
1042 PAGED_CODE();
1043
1044 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
1045
1046 /* Take PHY and NIC out of low power mode */
1047 if (Adapter->Features & DEV_HAS_POWER_CNTRL)
1048 {
1050
1051 PowerState &= ~NVREG_POWERSTATE2_POWERUP_MASK;
1052 if ((Adapter->Features & DEV_NEED_LOW_POWER_FIX) && Adapter->RevisionId >= 0xA3)
1053 {
1055 }
1057 }
1058
1059 /* Clear PHY state and temporarily halt PHY interrupts */
1060 NV_WRITE(Adapter, NvRegMIIMask, 0);
1061 PhyState = NV_READ(Adapter, NvRegAdapterControl);
1062 if (PhyState & NVREG_ADAPTCTL_RUNNING)
1063 {
1064 RestorePhyState = TRUE;
1065
1066 PhyState &= ~NVREG_ADAPTCTL_RUNNING;
1067 NV_WRITE(Adapter, NvRegAdapterControl, PhyState);
1068 }
1070
1071 if (Adapter->Features & DEV_HAS_MGMT_UNIT)
1072 {
1073 ULONG UnitVersion;
1074
1075 /* Management unit running on the MAC? */
1079 SidebandUnitGetVersion(Adapter, &UnitVersion))
1080 {
1081 if (UnitVersion > 0)
1082 {
1084 Adapter->Flags |= NV_MAC_IN_USE;
1085 else
1086 Adapter->Flags &= ~NV_MAC_IN_USE;
1087 }
1088 else
1089 {
1090 Adapter->Flags |= NV_MAC_IN_USE;
1091 }
1092
1093 NDIS_DbgPrint(MIN_TRACE, ("Management unit is running. MAC in use\n"));
1094
1095 /* Management unit setup the PHY already? */
1096 if ((Adapter->Flags & NV_MAC_IN_USE) &&
1099 {
1100 /* PHY is inited by management unit */
1101 PhyInitialized = TRUE;
1102
1103 NDIS_DbgPrint(MIN_TRACE, ("PHY already initialized by management unit\n"));
1104 }
1105 }
1106 }
1107
1108 /* Find a suitable PHY */
1109 if (!FindPhyDevice(Adapter))
1110 {
1111 NDIS_DbgPrint(MAX_TRACE, ("Could not find a valid PHY\n"));
1112 goto Failure;
1113 }
1114
1115 /* We need to init the PHY */
1116 if (!PhyInitialized)
1117 {
1118 if (!PhyInit(Adapter))
1119 {
1120 /* It's not critical for init, continue */
1121 }
1122 }
1123 else
1124 {
1125 ULONG MiiStatus;
1126
1127 /* See if it is a gigabit PHY */
1128 MiiRead(Adapter, Adapter->PhyAddress, MII_STATUS, &MiiStatus);
1129 if (MiiStatus & PHY_GIGABIT)
1130 {
1131 Adapter->Flags |= NV_GIGABIT_PHY;
1132 }
1133 }
1134
1135 return NDIS_STATUS_SUCCESS;
1136
1137Failure:
1138 if (RestorePhyState)
1139 {
1141 }
1142
1143 return NDIS_STATUS_FAILURE;
1144}
BOOLEAN MiiRead(_In_ PDC21X4_ADAPTER Adapter, _In_ ULONG PhyAddress, _In_ ULONG RegAddress, _Out_ PULONG Data)
Definition: phy.c:101
#define MII_STATUS
Definition: dc21x4hw.h:566
#define DEV_HAS_POWER_CNTRL
Definition: nic.h:26
#define NVREG_XMITCTL_SYNC_MASK
Definition: nic.h:97
#define PHY_GIGABIT
Definition: nic.h:490
#define NVREG_XMITCTL_MGMT_ST
Definition: nic.h:96
#define NVREG_POWERSTATE2_POWERUP_REV_A3
Definition: nic.h:336
#define NVREG_MGMTUNITCONTROL_INUSE
Definition: nic.h:297
#define DEV_HAS_MGMT_UNIT
Definition: nic.h:31
#define NVREG_XMITCTL_SYNC_PHY_INIT
Definition: nic.h:99
#define DEV_NEED_LOW_POWER_FIX
Definition: nic.h:41
@ NvRegPowerState2
Definition: nic.h:334
@ NvRegMgmtUnitControl
Definition: nic.h:296
static BOOLEAN FindPhyDevice(_Inout_ PNVNET_ADAPTER Adapter)
Definition: phy.c:562
static BOOLEAN SidebandUnitAcquireSemaphore(_Inout_ PNVNET_ADAPTER Adapter)
Definition: phy.c:621
static BOOLEAN SidebandUnitGetVersion(_In_ PNVNET_ADAPTER Adapter, _Out_ PULONG Version)
Definition: phy.c:683
static NDIS_STATUS PhyInit(_In_ PNVNET_ADAPTER Adapter)
Definition: phy.c:358
#define NV_MAC_IN_USE
Definition: nvnet.h:291
#define NV_GIGABIT_PHY
Definition: nvnet.h:292

Referenced by NvNetInitNIC().

◆ NvNetRecognizeHardware()

NDIS_STATUS NvNetRecognizeHardware ( _Inout_ PNVNET_ADAPTER  Adapter)

Definition at line 675 of file nic.c.

677{
678 ULONG Bytes;
679 PCI_COMMON_CONFIG PciConfig;
680
681 PAGED_CODE();
682
683 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
684
685 Bytes = NdisReadPciSlotInformation(Adapter->AdapterHandle,
686 0,
688 &PciConfig,
692
693 if (PciConfig.VendorID != 0x10DE)
695
696 Adapter->DeviceId = PciConfig.DeviceID;
697 Adapter->RevisionId = PciConfig.RevisionID;
698
699 switch (PciConfig.DeviceID)
700 {
701 case 0x01C3: /* nForce */
702 case 0x0066: /* nForce2 */
703 case 0x00D6: /* nForce2 */
704 Adapter->Features = DEV_NEED_TIMERIRQ | DEV_NEED_LINKTIMER;
705 break;
706
707 case 0x0086: /* nForce3 */
708 case 0x008C: /* nForce3 */
709 case 0x00E6: /* nForce3 */
710 case 0x00DF: /* nForce3 */
711 Adapter->Features = DEV_NEED_TIMERIRQ | DEV_NEED_LINKTIMER |
713 break;
714
715 case 0x0056: /* CK804 */
716 case 0x0057: /* CK804 */
717 case 0x0037: /* MCP04 */
718 case 0x0038: /* MCP04 */
721 break;
722
723 case 0x0268: /* MCP51 */
724 case 0x0269: /* MCP51 */
727 break;
728
729 case 0x0372: /* MCP55 */
730 case 0x0373: /* MCP55 */
737 break;
738
739 case 0x03E5: /* MCP61 */
740 case 0x03E6: /* MCP61 */
741 case 0x03EE: /* MCP61 */
742 case 0x03EF: /* MCP61 */
747 break;
748
749 case 0x0450: /* MCP65 */
750 case 0x0451: /* MCP65 */
751 case 0x0452: /* MCP65 */
752 case 0x0453: /* MCP65 */
759 break;
760
761 case 0x054C: /* MCP67 */
762 case 0x054D: /* MCP67 */
763 case 0x054E: /* MCP67 */
764 case 0x054F: /* MCP67 */
769 break;
770
771 case 0x07DC: /* MCP73 */
772 case 0x07DD: /* MCP73 */
773 case 0x07DE: /* MCP73 */
774 case 0x07DF: /* MCP73 */
780 break;
781
782 case 0x0760: /* MCP77 */
783 case 0x0761: /* MCP77 */
784 case 0x0762: /* MCP77 */
785 case 0x0763: /* MCP77 */
793 break;
794
795 case 0x0AB0: /* MCP79 */
796 case 0x0AB1: /* MCP79 */
797 case 0x0AB2: /* MCP79 */
798 case 0x0AB3: /* MCP79 */
806 break;
807
808 case 0x0D7D: /* MCP89 */
815 break;
816
817 default:
819 }
820
821 /* Normalize all .INF parameters */
823
824 /* FIXME: Disable some NIC features, we don't support these yet */
825#if 1
826 Adapter->VlanControl = 0;
827 Adapter->Flags &= ~(NV_SEND_CHECKSUM | NV_SEND_LARGE_SEND |
829#endif
830
831 /* For code paths debugging (32-bit descriptors work on all hardware variants) */
832#if 0
833 Adapter->Features &= ~(DEV_HAS_HIGH_DMA | DEV_HAS_LARGEDESC);
834#endif
835
836 if (Adapter->Features & DEV_HAS_POWER_CNTRL)
837 Adapter->WakeFrameBitmap = ~(0xFFFFFFFF << NV_WAKEUPPATTERNS_V2);
838 else
839 Adapter->WakeFrameBitmap = ~(0xFFFFFFFF << NV_WAKEUPPATTERNS);
840
841 /* 64-bit descriptors */
842 if (Adapter->Features & DEV_HAS_HIGH_DMA)
843 {
844 /* Note: Some devices here also support Jumbo Frames */
845 Adapter->TxRxControl = NVREG_TXRXCTL_DESC_3;
846 }
847 /* 32-bit descriptors */
848 else
849 {
850 if (Adapter->Features & DEV_HAS_LARGEDESC)
851 {
852 /* Jumbo Frames */
853 Adapter->TxRxControl = NVREG_TXRXCTL_DESC_2;
854 }
855 else
856 {
857 /* Original packet format */
858 Adapter->TxRxControl = NVREG_TXRXCTL_DESC_1;
859 }
860 }
861
862 /* Flow control */
864 if (Adapter->Features & DEV_HAS_TX_PAUSEFRAME)
865 {
866 Adapter->PauseFlags |= NV_PAUSEFRAME_TX_CAPABLE | NV_PAUSEFRAME_TX_REQ;
867 }
868 if (Adapter->FlowControlMode != NV_FLOW_CONTROL_AUTO)
869 {
870 Adapter->PauseFlags &= ~(NV_PAUSEFRAME_AUTONEG | NV_PAUSEFRAME_RX_REQ |
872 switch (Adapter->FlowControlMode)
873 {
875 Adapter->PauseFlags |= NV_PAUSEFRAME_RX_REQ;
876 break;
878 Adapter->PauseFlags |= NV_PAUSEFRAME_TX_REQ;
879 break;
881 Adapter->PauseFlags |= NV_PAUSEFRAME_RX_REQ | NV_PAUSEFRAME_TX_REQ;
882 break;
883
884 default:
885 break;
886 }
887 }
888
889 /* Work around errata in some NICs */
890 if (Adapter->Features & (DEV_NEED_TX_LIMIT | DEV_NEED_TX_LIMIT2))
891 {
892 Adapter->Flags |= NV_SEND_ERRATA_PRESENT;
893
894 if ((Adapter->Features & DEV_NEED_TX_LIMIT2) && Adapter->RevisionId >= 0xA2)
895 {
896 Adapter->Flags &= ~NV_SEND_ERRATA_PRESENT;
897 }
898 }
899 if (Adapter->Flags & NV_SEND_ERRATA_PRESENT)
900 {
901 NDIS_DbgPrint(MIN_TRACE, ("Transmit workaround active\n"));
902 }
903
904 /* Initialize the interrupt mask */
905 if (Adapter->OptimizationMode == NV_OPTIMIZATION_MODE_CPU)
906 {
907 Adapter->InterruptMask = NVREG_IRQMASK_CPU;
908 }
909 else
910 {
911 Adapter->InterruptMask = NVREG_IRQMASK_THROUGHPUT;
912 }
913 if (Adapter->Features & DEV_NEED_TIMERIRQ)
914 {
915 Adapter->InterruptMask |= NVREG_IRQ_TIMER;
916 }
917
918 if (Adapter->Features & DEV_NEED_LINKTIMER)
919 {
920 NdisMInitializeTimer(&Adapter->MediaDetectionTimer,
921 Adapter->AdapterHandle,
923 Adapter);
924 }
925
926 return NDIS_STATUS_SUCCESS;
927}
ULONG EXPORT NdisReadPciSlotInformation(IN NDIS_HANDLE NdisAdapterHandle, IN ULONG SlotNumber, IN ULONG Offset, IN PVOID Buffer, IN ULONG Length)
Definition: hardware.c:180
VOID EXPORT NdisMInitializeTimer(IN OUT PNDIS_MINIPORT_TIMER Timer, IN NDIS_HANDLE MiniportAdapterHandle, IN PNDIS_TIMER_FUNCTION TimerFunction, IN PVOID FunctionContext)
Definition: time.c:192
_In_ UINT Bytes
Definition: mmcopy.h:9
static VOID NvNetValidateConfiguration(_Inout_ PNVNET_ADAPTER Adapter)
Definition: nic.c:638
#define NVREG_TXRXCTL_DESC_2
Definition: nic.h:208
#define DEV_HAS_TEST_EXTENDED
Definition: nic.h:30
#define DEV_HAS_VLAN
Definition: nic.h:23
#define DEV_HAS_MSI
Definition: nic.h:24
#define DEV_HAS_TX_PAUSEFRAME
Definition: nic.h:46
#define NVREG_TXRXCTL_DESC_3
Definition: nic.h:209
#define NV_PAUSEFRAME_TX_REQ
Definition: nic.h:548
#define DEV_HAS_STATISTICS_V1
Definition: nic.h:27
#define NV_WAKEUPPATTERNS_V2
Definition: nic.h:466
#define DEV_NEED_PHY_INIT_FIX
Definition: nic.h:40
#define NV_PAUSEFRAME_AUTONEG
Definition: nic.h:549
#define DEV_HAS_MSI_X
Definition: nic.h:25
#define NV_PAUSEFRAME_RX_CAPABLE
Definition: nic.h:543
#define DEV_HAS_PAUSEFRAME_TX_V1
Definition: nic.h:34
#define DEV_HAS_COLLISION_FIX
Definition: nic.h:33
#define DEV_NEED_LINKTIMER
Definition: nic.h:19
#define DEV_HAS_STATISTICS_V2
Definition: nic.h:28
#define DEV_HAS_PAUSEFRAME_TX_V3
Definition: nic.h:36
#define DEV_NEED_MSI_FIX
Definition: nic.h:42
#define DEV_HAS_STATISTICS_V3
Definition: nic.h:29
#define NVREG_IRQMASK_CPU
Definition: nic.h:67
#define NVREG_IRQMASK_THROUGHPUT
Definition: nic.h:66
#define DEV_NEED_TX_LIMIT
Definition: nic.h:37
#define DEV_HAS_PAUSEFRAME_TX_V2
Definition: nic.h:35
#define NVREG_IRQ_TIMER
Definition: nic.h:61
#define DEV_NEED_TX_LIMIT2
Definition: nic.h:38
#define NV_WAKEUPPATTERNS
Definition: nic.h:465
#define DEV_HAS_CHECKSUM
Definition: nic.h:22
#define NVREG_TXRXCTL_DESC_1
Definition: nic.h:207
#define DEV_NEED_TIMERIRQ
Definition: nic.h:18
#define NV_PAUSEFRAME_RX_REQ
Definition: nic.h:547
#define NV_SEND_LARGE_SEND
Definition: nvnet.h:288
#define NV_SEND_CHECKSUM
Definition: nvnet.h:287
NDIS_TIMER_FUNCTION NvNetMediaDetectionDpc
Definition: nvnet.h:471
#define NV_SEND_ERRATA_PRESENT
Definition: nvnet.h:289
#define FIELD_OFFSET(t, f)
Definition: typedefs.h:255
#define PCI_COMMON_HDR_LENGTH
Definition: iotypes.h:3594

Referenced by MiniportInitialize().

◆ NvNetResetReceiverAndTransmitter()

VOID NvNetResetReceiverAndTransmitter ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 91 of file nic.c.

93{
95 Adapter->TxRxControl | NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET);
96
98
100 Adapter->TxRxControl | NVREG_TXRXCTL_BIT2);
101}
#define NV_TXRX_RESET_DELAY
Definition: nic.h:444
#define NVREG_TXRXCTL_RESET
Definition: nic.h:205

Referenced by NvNetInitNIC().

◆ NvNetSetPowerState()

VOID NvNetSetPowerState ( _In_ PNVNET_ADAPTER  Adapter,
_In_ NDIS_DEVICE_POWER_STATE  NewPowerState,
_In_ ULONG  WakeFlags 
)

Definition at line 500 of file requests.c.

504{
505 ULONG i, PowerState, PowerState2, WakeUpFlags;
506
507 NV_READ(Adapter, NvRegPowerCap);
508
509 WakeUpFlags = 0;
510 PowerState2 = 0;
511 if (Adapter->Features & DEV_HAS_POWER_CNTRL)
512 {
513 PowerState2 = NV_READ(Adapter, NvRegPowerState2);
514 PowerState2 &= ~(NVREG_POWERSTATE2_WAKEUPPAT_5 |
517 }
518
519 if (NewPowerState != NdisDeviceStateD0)
520 {
521 ULONG FramesEnabled = 0;
522
523 if (WakeFlags & NDIS_PNP_WAKE_UP_PATTERN_MATCH)
524 WakeUpFlags |= NVREG_WAKEUPFLAGS_ENABLE_MAGPAT;
525 if (WakeFlags & NDIS_PNP_WAKE_UP_LINK_CHANGE)
527 if (WakeFlags & NDIS_PNP_WAKE_UP_MAGIC_PACKET)
528 {
530
531 for (i = 0; i < RTL_NUMBER_OF(Adapter->WakeFrames); ++i)
532 {
533 PNVNET_WAKE_FRAME WakeFrame = Adapter->WakeFrames[i];
534
535 if (!WakeFrame)
536 continue;
537
538 WriteWakeFrame(Adapter, WakeFrame, i);
539
540 PowerState2 |= FrameNumberToPowerMask(i);
541 WakeUpFlags |= FrameNumberToWakeUpMask(i);
542
543 ++FramesEnabled;
544 }
545 }
546
547 if (WakeUpFlags)
548 {
549 if (!(Adapter->Flags & NV_MAC_IN_USE))
550 {
551 PowerState2 &= ~NVREG_POWERSTATE2_GATE_CLOCKS;
552 PowerState2 |= NVREG_POWERSTATE2_GATE_CLOCK_3;
553
554 if (!FramesEnabled && (WakeUpFlags & NVREG_WAKEUPFLAGS_ENABLE_LINKCHANGE))
555 PowerState2 |= NVREG_POWERSTATE2_GATE_CLOCK_1;
556 if (FramesEnabled < NV_WAKEUPMASKENTRIES)
557 PowerState2 |= NVREG_POWERSTATE2_GATE_CLOCK_2;
558 }
559
560 NvNetStartReceiver(Adapter);
561 }
562 else
563 {
564 if (!(Adapter->Flags & NV_MAC_IN_USE))
565 PowerState2 |= NVREG_POWERSTATE2_GATE_CLOCKS;
566 }
567 }
568
570
571 NV_WRITE(Adapter, NvRegWakeUpFlags, WakeUpFlags);
572 if (Adapter->Features & DEV_HAS_POWER_CNTRL)
573 {
574 NV_WRITE(Adapter, NvRegPowerState2, PowerState2);
575 }
576
577 NV_WRITE(Adapter, NvRegPowerState,
579 for (i = 0; i < NV_POWER_ATTEMPTS; ++i)
580 {
582
584 break;
585
587
589 }
590
591 PowerState = NewPowerState - 1;
592 if (WakeUpFlags)
593 {
595 }
597}
#define NDIS_PNP_WAKE_UP_MAGIC_PACKET
Definition: ntddndis.h:372
#define NDIS_PNP_WAKE_UP_LINK_CHANGE
Definition: ntddndis.h:374
@ NdisDeviceStateD0
Definition: ntddndis.h:38
#define NDIS_PNP_WAKE_UP_PATTERN_MATCH
Definition: ntddndis.h:373
#define NVREG_WAKEUPFLAGS_ENABLE_WAKEUPPAT
Definition: nic.h:267
#define NVREG_POWERSTATE2_GATE_CLOCKS
Definition: nic.h:341
#define NVREG_POWERSTATE_POWEREDUP
Definition: nic.h:288
#define NVREG_POWERSTATE2_GATE_CLOCK_2
Definition: nic.h:339
#define NVREG_POWERSTATE2_GATE_CLOCK_3
Definition: nic.h:340
#define NVREG_POWERSTATE2_WAKEUPPAT_6
Definition: nic.h:343
#define NVREG_POWERSTATE2_GATE_CLOCK_1
Definition: nic.h:338
#define NV_POWER_DELAY
Definition: nic.h:457
#define NV_POWER_ATTEMPTS
Definition: nic.h:459
#define NVREG_POWERSTATE2_WAKEUPPAT_5
Definition: nic.h:342
#define NV_POWER_STALL
Definition: nic.h:458
#define NV_WAKEUPMASKENTRIES
Definition: nic.h:467
#define NVREG_POWERSTATE2_WAKEUPPAT_7
Definition: nic.h:344
@ NvRegPowerCap
Definition: nic.h:282
#define NVREG_WAKEUPFLAGS_ENABLE_MAGPAT
Definition: nic.h:266
#define NVREG_WAKEUPFLAGS_ENABLE_LINKCHANGE
Definition: nic.h:268
static ULONG FrameNumberToPowerMask(_In_ ULONG FrameNumber)
Definition: requests.c:482
static ULONG FrameNumberToWakeUpMask(_In_ ULONG FrameNumber)
Definition: requests.c:471
static VOID WriteWakeFrame(_In_ PNVNET_ADAPTER Adapter, _In_ PNVNET_WAKE_FRAME WakeFrame, _In_ ULONG FrameNumber)
Definition: requests.c:450

Referenced by MiniportShutdown(), and NvNetPowerWorker().

◆ NvNetSetupMacAddress()

VOID NvNetSetupMacAddress ( _In_ PNVNET_ADAPTER  Adapter,
_In_reads_bytes_(ETH_LENGTH_OF_ADDRESS) PUCHAR  MacAddress 
)

Definition at line 622 of file nic.c.

625{
626 PAGED_CODE();
627
628 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
629
630 NV_WRITE(Adapter, NvRegMacAddrA,
631 MacAddress[3] << 24 | MacAddress[2] << 16 | MacAddress[1] << 8 | MacAddress[0]);
632 NV_WRITE(Adapter, NvRegMacAddrB, MacAddress[5] << 8 | MacAddress[4]);
633}

Referenced by MiniportInitialize().

◆ NvNetStartAdapter()

VOID NvNetStartAdapter ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 74 of file nvnet.c.

76{
77 PAGED_CODE();
78
79 NdisMSynchronizeWithInterrupt(&Adapter->Interrupt,
81 Adapter);
82
83 /* Setup the link timer right after the NIC is initialized */
84 if (Adapter->Features & DEV_NEED_LINKTIMER)
85 {
86 NdisMSetPeriodicTimer(&Adapter->MediaDetectionTimer,
88 }
89}
VOID EXPORT NdisMSetPeriodicTimer(IN PNDIS_MINIPORT_TIMER Timer, IN UINT MillisecondsPeriod)
Definition: time.c:226
BOOLEAN EXPORT NdisMSynchronizeWithInterrupt(IN PNDIS_MINIPORT_INTERRUPT Interrupt, IN PVOID SynchronizeFunction, IN PVOID SynchronizeContext)
Definition: miniport.c:2955
#define NVNET_MEDIA_DETECTION_INTERVAL
Definition: nvnet.h:58
KSYNCHRONIZE_ROUTINE NvNetInitPhaseSynchronized
Definition: nvnet.h:470

Referenced by MiniportInitialize(), NvNetPowerWorker(), and NvNetResetWorker().

◆ NvNetStartReceiver()

VOID NvNetStartReceiver ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 104 of file nic.c.

106{
107 ULONG RxControl;
108
109 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
110
111 RxControl = NV_READ(Adapter, NvRegReceiverControl);
113 !(Adapter->Flags & NV_MAC_IN_USE))
114 {
115 /* Already running? Stop it */
116 RxControl &= ~NVREG_RCVCTL_START;
117 NV_WRITE(Adapter, NvRegReceiverControl, RxControl);
118 }
119 NV_WRITE(Adapter, NvRegLinkSpeed, Adapter->LinkSpeed | NVREG_LINKSPEED_FORCE);
120
121 RxControl |= NVREG_RCVCTL_START;
122 if (Adapter->Flags & NV_MAC_IN_USE)
123 {
124 RxControl &= ~NVREG_RCVCTL_RX_PATH_EN;
125 }
126 NV_WRITE(Adapter, NvRegReceiverControl, RxControl);
127}
#define NVREG_RCVCTL_START
Definition: nic.h:125

Referenced by HandleLinkStateChange(), NvNetApplyPacketFilter(), NvNetBackoffReseed(), NvNetInitPhaseSynchronized(), NvNetMediaDetectionDpc(), NvNetSetPowerState(), and NvNetSetSpeedAndDuplex().

◆ NvNetStartTransmitter()

VOID NvNetStartTransmitter ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 130 of file nic.c.

132{
133 ULONG TxControl;
134
135 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
136
137 TxControl = NV_READ(Adapter, NvRegTransmitterControl);
138 TxControl |= NVREG_XMITCTL_START;
139 if (Adapter->Flags & NV_MAC_IN_USE)
140 {
141 TxControl &= ~NVREG_XMITCTL_TX_PATH_EN;
142 }
143 NV_WRITE(Adapter, NvRegTransmitterControl, TxControl);
144}

Referenced by NvNetBackoffReseed(), NvNetInitPhaseSynchronized(), and NvNetSetSpeedAndDuplex().

◆ NvNetStopAdapter()

VOID NvNetStopAdapter ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 58 of file nvnet.c.

60{
61 BOOLEAN Dummy;
62
63 PAGED_CODE();
64
65 NdisMCancelTimer(&Adapter->MediaDetectionTimer, &Dummy);
66
68
70}
VOID NTAPI KeFlushQueuedDpcs(VOID)
Definition: dpc.c:919
VOID EXPORT NdisMCancelTimer(IN PNDIS_MINIPORT_TIMER Timer, OUT PBOOLEAN TimerCancelled)
Definition: time.c:131

Referenced by MiniportHalt(), NvNetPowerWorker(), and NvNetResetWorker().

◆ NvNetStopReceiver()

VOID NvNetStopReceiver ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 147 of file nic.c.

149{
150 ULONG RxControl, i;
151
152 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
153
154 RxControl = NV_READ(Adapter, NvRegReceiverControl);
155 if (!(Adapter->Flags & NV_MAC_IN_USE))
156 RxControl &= ~NVREG_RCVCTL_START;
157 else
158 RxControl |= NVREG_RCVCTL_RX_PATH_EN;
159 NV_WRITE(Adapter, NvRegReceiverControl, RxControl);
160
161 for (i = 0; i < NV_RXSTOP_DELAY1MAX; ++i)
162 {
164 break;
165
167 }
168
170
171 if (!(Adapter->Flags & NV_MAC_IN_USE))
172 {
173 NV_WRITE(Adapter, NvRegLinkSpeed, 0);
174 }
175}
#define NVREG_RCVCTL_RX_PATH_EN
Definition: nic.h:126
#define NV_RXSTOP_DELAY1MAX
Definition: nic.h:451
#define NV_RXSTOP_DELAY2
Definition: nic.h:452
#define NVREG_RCVSTAT_BUSY
Definition: nic.h:129
#define NV_RXSTOP_DELAY1
Definition: nic.h:450

Referenced by HandleLinkStateChange(), MiniportHalt(), MiniportShutdown(), NvNetApplyPacketFilter(), NvNetBackoffReseed(), NvNetMediaDetectionDpc(), NvNetPowerWorker(), NvNetResetWorker(), and NvNetSetSpeedAndDuplex().

◆ NvNetStopTransmitter()

VOID NvNetStopTransmitter ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 178 of file nic.c.

180{
181 ULONG TxControl, i;
182
183 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
184
185 TxControl = NV_READ(Adapter, NvRegTransmitterControl);
186 if (!(Adapter->Flags & NV_MAC_IN_USE))
187 TxControl &= ~NVREG_XMITCTL_START;
188 else
189 TxControl |= NVREG_XMITCTL_TX_PATH_EN;
190 NV_WRITE(Adapter, NvRegTransmitterControl, TxControl);
191
192 for (i = 0; i < NV_TXSTOP_DELAY1MAX; ++i)
193 {
195 break;
196
198 }
199
201
202 if (!(Adapter->Flags & NV_MAC_IN_USE))
203 {
206 }
207}
#define NV_TXSTOP_DELAY2
Definition: nic.h:447
#define NV_TXSTOP_DELAY1MAX
Definition: nic.h:446
#define NVREG_XMITCTL_TX_PATH_EN
Definition: nic.h:105
#define NVREG_XMITSTAT_BUSY
Definition: nic.h:111
#define NV_TXSTOP_DELAY1
Definition: nic.h:445

Referenced by MiniportHalt(), MiniportShutdown(), NvNetBackoffReseed(), NvNetPowerWorker(), NvNetResetWorker(), and NvNetSetSpeedAndDuplex().

◆ NvNetToggleClockPowerGating()

VOID NvNetToggleClockPowerGating ( _In_ PNVNET_ADAPTER  Adapter,
_In_ BOOLEAN  Gate 
)

Definition at line 294 of file nic.c.

297{
298 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
299
300 if (!(Adapter->Flags & NV_MAC_IN_USE) && (Adapter->Features & DEV_HAS_POWER_CNTRL))
301 {
303
304 if (Gate)
306 else
307 PowerState &= ~NVREG_POWERSTATE2_GATE_CLOCKS;
309 }
310}

Referenced by HandleLinkStateChange(), MiniportHalt(), NvNetInitNIC(), and NvNetMediaDetectionDpc().

◆ NvNetUpdateLinkSpeed()

BOOLEAN NvNetUpdateLinkSpeed ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 990 of file phy.c.

992{
993 ULONG MiiAdvertise, MiiLinkPartnerAbility, LinkSpeed;
994 BOOLEAN FullDuplex, LinkUp;
995
996 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
997
999 &MiiAdvertise,
1000 &MiiLinkPartnerAbility,
1001 &LinkSpeed,
1002 &FullDuplex);
1003 if (Adapter->FullDuplex == FullDuplex && Adapter->LinkSpeed == LinkSpeed)
1004 {
1005 return LinkUp;
1006 }
1007
1008 NDIS_DbgPrint(MIN_TRACE, ("Configuring MAC from '%lx %s-duplex' to '%lx %s-duplex'\n",
1009 Adapter->LinkSpeed,
1010 Adapter->FullDuplex ? "full" : "half",
1011 LinkSpeed,
1012 FullDuplex ? "full" : "half"));
1013
1014 Adapter->FullDuplex = FullDuplex;
1015 Adapter->LinkSpeed = LinkSpeed;
1016
1017 if (Adapter->Flags & NV_ACTIVE)
1018 {
1019 NdisDprAcquireSpinLock(&Adapter->Send.Lock);
1020 NdisDprAcquireSpinLock(&Adapter->Receive.Lock);
1021 }
1022
1023 NvNetSetSpeedAndDuplex(Adapter, MiiAdvertise, MiiLinkPartnerAbility);
1024
1025 if (Adapter->Flags & NV_ACTIVE)
1026 {
1027 NdisDprReleaseSpinLock(&Adapter->Receive.Lock);
1028 NdisDprReleaseSpinLock(&Adapter->Send.Lock);
1029 }
1030
1031 return LinkUp;
1032}
static VOID NvNetSetSpeedAndDuplex(_In_ PNVNET_ADAPTER Adapter, _In_ ULONG MiiAdvertise, _In_ ULONG MiiLinkPartnerAbility)
Definition: phy.c:821
static BOOLEAN MiiGetSpeedAndDuplex(_In_ PNVNET_ADAPTER Adapter, _Out_ PULONG MiiAdvertise, _Out_ PULONG MiiLinkPartnerAbility, _Out_ PULONG LinkSpeed, _Out_ PBOOLEAN FullDuplex)
Definition: phy.c:721
@ LinkUp
Definition: srb.h:741

Referenced by HandleLinkStateChange(), NvNetInitPhaseSynchronized(), and NvNetMediaDetectionDpc().

◆ NvNetUpdatePauseFrame()

VOID NvNetUpdatePauseFrame ( _Inout_ PNVNET_ADAPTER  Adapter,
_In_ ULONG  PauseFlags 
)

Definition at line 242 of file nic.c.

245{
246 NDIS_DbgPrint(MIN_TRACE, ("()\n"));
247
248 Adapter->PauseFlags &= ~(NV_PAUSEFRAME_TX_ENABLE | NV_PAUSEFRAME_RX_ENABLE);
249
250 if (Adapter->PauseFlags & NV_PAUSEFRAME_RX_CAPABLE)
251 {
252 ULONG PacketFilter = NV_READ(Adapter, NvRegPacketFilterFlags) & ~NVREG_PFF_PAUSE_RX;
253
254 if (PauseFlags & NV_PAUSEFRAME_RX_ENABLE)
255 {
256 PacketFilter |= NVREG_PFF_PAUSE_RX;
257 Adapter->PauseFlags |= NV_PAUSEFRAME_RX_ENABLE;
258 }
259 NV_WRITE(Adapter, NvRegPacketFilterFlags, PacketFilter);
260 }
261
262 if (Adapter->PauseFlags & NV_PAUSEFRAME_TX_CAPABLE)
263 {
264 ULONG Mics = NV_READ(Adapter, NvRegMisc1) & ~NVREG_MISC1_PAUSE_TX;
265
266 if (PauseFlags & NV_PAUSEFRAME_TX_ENABLE)
267 {
269
270 if (Adapter->Features & DEV_HAS_PAUSEFRAME_TX_V2)
271 PauseEnable = NVREG_TX_PAUSEFRAME_ENABLE_V2;
272 if (Adapter->Features & DEV_HAS_PAUSEFRAME_TX_V3)
273 {
274 PauseEnable = NVREG_TX_PAUSEFRAME_ENABLE_V3;
275 /* Limit the number of TX pause frames to a default of 8 */
276 NV_WRITE(Adapter,
280 }
281 NV_WRITE(Adapter, NvRegTxPauseFrame, PauseEnable);
282 NV_WRITE(Adapter, NvRegMisc1, Mics | NVREG_MISC1_PAUSE_TX);
283 Adapter->PauseFlags |= NV_PAUSEFRAME_TX_ENABLE;
284 }
285 else
286 {
288 NV_WRITE(Adapter, NvRegMisc1, Mics);
289 }
290 }
291}
#define NVREG_MISC1_PAUSE_TX
Definition: nic.h:90
#define NV_PAUSEFRAME_RX_ENABLE
Definition: nic.h:545
#define NVREG_TX_PAUSEFRAME_ENABLE_V3
Definition: nic.h:220
#define NVREG_TX_PAUSEFRAMELIMIT_ENABLE
Definition: nic.h:223
#define NV_PAUSEFRAME_TX_ENABLE
Definition: nic.h:546
#define NVREG_TX_PAUSEFRAME_ENABLE_V2
Definition: nic.h:219
#define NVREG_TX_PAUSEFRAME_ENABLE_V1
Definition: nic.h:218
@ NvRegTxPauseFrameLimit
Definition: nic.h:222
#define NVREG_PFF_PAUSE_RX
Definition: nic.h:114

Referenced by NvNetSetSpeedAndDuplex().

◆ SidebandUnitReleaseSemaphore()

VOID SidebandUnitReleaseSemaphore ( _In_ PNVNET_ADAPTER  Adapter)

Definition at line 667 of file phy.c.

669{
670 if (Adapter->Flags & NV_UNIT_SEMAPHORE_ACQUIRED)
671 {
672 ULONG TxControl;
673
674 TxControl = NV_READ(Adapter, NvRegTransmitterControl);
675 TxControl &= ~NVREG_XMITCTL_HOST_SEMA_ACQ;
676 NV_WRITE(Adapter, NvRegTransmitterControl, TxControl);
677 }
678}
#define NV_UNIT_SEMAPHORE_ACQUIRED
Definition: nvnet.h:293

Referenced by MiniportHalt(), and MiniportShutdown().

Variable Documentation

◆ NvNetInitPhaseSynchronized

KSYNCHRONIZE_ROUTINE NvNetInitPhaseSynchronized

Definition at line 470 of file nvnet.h.

Referenced by NvNetStartAdapter().

◆ NvNetMediaDetectionDpc

NDIS_TIMER_FUNCTION NvNetMediaDetectionDpc

Definition at line 471 of file nvnet.h.

Referenced by NvNetRecognizeHardware().

◆ NvNetTransmitPacket32

NVNET_TRANSMIT_PACKET NvNetTransmitPacket32

Definition at line 390 of file nvnet.h.

Referenced by MiniportInitialize().

◆ NvNetTransmitPacket64

NVNET_TRANSMIT_PACKET NvNetTransmitPacket64

Definition at line 391 of file nvnet.h.

Referenced by MiniportInitialize().

◆ ProcessTransmitDescriptors32

NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptors32

Definition at line 393 of file nvnet.h.

Referenced by MiniportInitialize().

◆ ProcessTransmitDescriptors64

NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptors64

Definition at line 394 of file nvnet.h.

Referenced by MiniportInitialize().

◆ ProcessTransmitDescriptorsLegacy

NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptorsLegacy

Definition at line 392 of file nvnet.h.

Referenced by MiniportInitialize().