51{
53#define NVREG_IRQSTAT_MIIEVENT 0x040
54#define NVREG_IRQSTAT_MASK 0x83ff
55
57#define NVREG_IRQ_RX_ERROR 0x0001
58#define NVREG_IRQ_RX 0x0002
59#define NVREG_IRQ_RX_NOBUF 0x0004
60#define NVREG_IRQ_TX_ERR 0x0008
61#define NVREG_IRQ_TX_OK 0x0010
62#define NVREG_IRQ_TIMER 0x0020
63#define NVREG_IRQ_LINK 0x0040
64#define NVREG_IRQ_RX_FORCED 0x0080
65#define NVREG_IRQ_TX_FORCED 0x0100
66#define NVREG_IRQ_RECOVER_ERROR 0x8200
67#define NVREG_IRQMASK_THROUGHPUT 0x00df
68#define NVREG_IRQMASK_CPU 0x0060
69#define NVREG_IRQ_TX_ALL (NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED)
70#define NVREG_IRQ_RX_ALL (NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF| \
71 NVREG_IRQ_RX_FORCED)
72#define NVREG_IRQ_OTHER (NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RECOVER_ERROR)
73
75#define NVREG_UNKSETUP6_VAL 3
76
78#define NVREG_POLL_DEFAULT_THROUGHPUT 65535
79#define NVREG_POLL_DEFAULT_CPU 13
80
83
85#define NVREG_MSI_VECTOR_0_ENABLED 0x01
86
88#define NVREG_MAC_RESET_ASSERT 0x0F3
89
91#define NVREG_MISC1_PAUSE_TX 0x01
92#define NVREG_MISC1_HD 0x02
93#define NVREG_MISC1_FORCE 0x3b0f3c
94
96#define NVREG_XMITCTL_START 0x01
97#define NVREG_XMITCTL_MGMT_ST 0x40000000
98#define NVREG_XMITCTL_SYNC_MASK 0x000f0000
99#define NVREG_XMITCTL_SYNC_NOT_READY 0x0
100#define NVREG_XMITCTL_SYNC_PHY_INIT 0x00040000
101#define NVREG_XMITCTL_MGMT_SEMA_MASK 0x00000f00
102#define NVREG_XMITCTL_MGMT_SEMA_FREE 0x0
103#define NVREG_XMITCTL_HOST_SEMA_MASK 0x0000f000
104#define NVREG_XMITCTL_HOST_SEMA_ACQ 0x0000f000
105#define NVREG_XMITCTL_HOST_LOADED 0x00004000
106#define NVREG_XMITCTL_TX_PATH_EN 0x01000000
107#define NVREG_XMITCTL_DATA_START 0x00100000
108#define NVREG_XMITCTL_DATA_READY 0x00010000
109#define NVREG_XMITCTL_DATA_ERROR 0x00020000
110
112#define NVREG_XMITSTAT_BUSY 0x01
113
115#define NVREG_PFF_PAUSE_RX 0x08
116#define NVREG_PFF_ALWAYS 0x7F0000
117#define NVREG_PFF_PROMISC 0x80
118#define NVREG_PFF_MYADDR 0x20
119#define NVREG_PFF_LOOPBACK 0x10
120
122#define NVREG_OFFLOAD_HOMEPHY 0x601
123#define NVREG_OFFLOAD_NORMAL RX_NIC_BUFSIZE
124
126#define NVREG_RCVCTL_START 0x01
127#define NVREG_RCVCTL_RX_PATH_EN 0x01000000
128
130#define NVREG_RCVSTAT_BUSY 0x01
131
133#define NVREG_SLOTTIME_LEGBF_ENABLED 0x80000000
134#define NVREG_SLOTTIME_10_100_FULL 0x00007f00
135#define NVREG_SLOTTIME_1000_FULL 0x0003ff00
136#define NVREG_SLOTTIME_HALF 0x0000ff00
137#define NVREG_SLOTTIME_DEFAULT 0x00007f00
138#define NVREG_SLOTTIME_MASK 0x000000ff
139
141#define NVREG_TX_DEFERRAL_DEFAULT 0x15050f
142#define NVREG_TX_DEFERRAL_RGMII_10_100 0x16070f
143#define NVREG_TX_DEFERRAL_RGMII_1000 0x14050f
144#define NVREG_TX_DEFERRAL_RGMII_STRETCH_10 0x16190f
145#define NVREG_TX_DEFERRAL_RGMII_STRETCH_100 0x16300f
146#define NVREG_TX_DEFERRAL_MII_STRETCH 0x152000
147
149#define NVREG_RX_DEFERRAL_DEFAULT 0x16
150
153
156#define NVREG_MCASTADDRA_FORCE 0x01
157
159#define NVREG_MCASTMASKA_NONE 0xffffffff
160
162#define NVREG_MCASTMASKB_NONE 0xffff
163
165#define PHY_100 0x1
166#define PHY_1000 0x2
167#define PHY_HALF 0x100
168#define PHY_RGMII 0x10000000
169
171#define NVREG_BKOFFCTRL_DEFAULT 0x70000000
172#define NVREG_BKOFFCTRL_SEED_MASK 0x000003ff
173#define NVREG_BKOFFCTRL_SELECT 24
174#define NVREG_BKOFFCTRL_GEAR 12
175
178
180#define NVREG_RINGSZ_TXSHIFT 0
181#define NVREG_RINGSZ_RXSHIFT 16
182
184#define NVREG_TRANSMITPOLL_MAC_ADDR_REV 0x00008000
185
187#define NVREG_LINKSPEED_FORCE 0x10000
188#define NVREG_LINKSPEED_10 1000
189#define NVREG_LINKSPEED_100 100
190#define NVREG_LINKSPEED_1000 50
191#define NVREG_LINKSPEED_MASK (0xFFF)
192
194#define NVREG_UNKSETUP5_BIT31 (1<<31)
195
197#define NVREG_TX_WM_DESC1_DEFAULT 0x0200010
198#define NVREG_TX_WM_DESC2_3_DEFAULT 0x1e08000
199#define NVREG_TX_WM_DESC2_3_1000 0xfe08000
200
202#define NVREG_TXRXCTL_KICK 0x0001
203#define NVREG_TXRXCTL_BIT1 0x0002
204#define NVREG_TXRXCTL_BIT2 0x0004
205#define NVREG_TXRXCTL_IDLE 0x0008
206#define NVREG_TXRXCTL_RESET 0x0010
207#define NVREG_TXRXCTL_RXCHECK 0x0400
208#define NVREG_TXRXCTL_DESC_1 0
209#define NVREG_TXRXCTL_DESC_2 0x002100
210#define NVREG_TXRXCTL_DESC_3 0xc02200
211#define NVREG_TXRXCTL_VLANSTRIP 0x00040
212#define NVREG_TXRXCTL_VLANINS 0x00080
213
216
218#define NVREG_TX_PAUSEFRAME_DISABLE 0x0fff0080
219#define NVREG_TX_PAUSEFRAME_ENABLE_V1 0x01800010
220#define NVREG_TX_PAUSEFRAME_ENABLE_V2 0x056003f0
221#define NVREG_TX_PAUSEFRAME_ENABLE_V3 0x09f00880
222
224#define NVREG_TX_PAUSEFRAMELIMIT_ENABLE 0x00010000
225
227#define NVREG_MIISTAT_ERROR 0x0001
228#define NVREG_MIISTAT_LINKCHANGE 0x0008
229#define NVREG_MIISTAT_MASK_RW 0x0007
230#define NVREG_MIISTAT_MASK_ALL 0x000f
231
233#define NVREG_MII_LINKCHANGE 0x0008
234
236#define NVREG_ADAPTCTL_START 0x02
237#define NVREG_ADAPTCTL_LINKUP 0x04
238#define NVREG_ADAPTCTL_PHYVALID 0x40000
239#define NVREG_ADAPTCTL_RUNNING 0x100000
240#define NVREG_ADAPTCTL_PHYSHIFT 24
241
243#define NVREG_MIISPEED_BIT8 (1<<8)
244#define NVREG_MIIDELAY 5
245
247#define NVREG_MIICTL_INUSE 0x08000
248#define NVREG_MIICTL_WRITE 0x00400
249#define NVREG_MIICTL_ADDRSHIFT 5
250
255
257#define NVREG_WAKEUPFLAGS_VAL 0x7770
258#define NVREG_WAKEUPFLAGS_BUSYSHIFT 24
259#define NVREG_WAKEUPFLAGS_ENABLESHIFT 16
260#define NVREG_WAKEUPFLAGS_D3SHIFT 12
261#define NVREG_WAKEUPFLAGS_D2SHIFT 8
262#define NVREG_WAKEUPFLAGS_D1SHIFT 4
263#define NVREG_WAKEUPFLAGS_D0SHIFT 0
264#define NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT 0x01
265#define NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT 0x02
266#define NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE 0x04
267#define NVREG_WAKEUPFLAGS_ENABLE_MAGPAT 0x1111
268#define NVREG_WAKEUPFLAGS_ENABLE_WAKEUPPAT 0x2222
269#define NVREG_WAKEUPFLAGS_ENABLE_LINKCHANGE 0x4444
270
276
278#define NVREG_MGMTUNITGETVERSION 0x01
279
281#define NVREG_MGMTUNITVERSION 0x08
282
284#define NVREG_POWERCAP_D3SUPP (1<<30)
285#define NVREG_POWERCAP_D2SUPP (1<<26)
286#define NVREG_POWERCAP_D1SUPP (1<<25)
287
289#define NVREG_POWERSTATE_POWEREDUP 0x8000
290#define NVREG_POWERSTATE_VALID 0x0100
291#define NVREG_POWERSTATE_MASK 0x0003
292#define NVREG_POWERSTATE_D0 0x0000
293#define NVREG_POWERSTATE_D1 0x0001
294#define NVREG_POWERSTATE_D2 0x0002
295#define NVREG_POWERSTATE_D3 0x0003
296
298#define NVREG_MGMTUNITCONTROL_INUSE 0x20000
299
327
329#define NVREG_VLANCONTROL_ENABLE 0x2000
330
334
336#define NVREG_POWERSTATE2_POWERUP_MASK 0x0F15
337#define NVREG_POWERSTATE2_POWERUP_REV_A3 0x0001
338#define NVREG_POWERSTATE2_PHY_RESET 0x0004
339#define NVREG_POWERSTATE2_GATE_CLOCK_1 0x0100
340#define NVREG_POWERSTATE2_GATE_CLOCK_2 0x0200
341#define NVREG_POWERSTATE2_GATE_CLOCK_3 0x0400
342#define NVREG_POWERSTATE2_GATE_CLOCKS 0x0F00
343#define NVREG_POWERSTATE2_WAKEUPPAT_5 (1<<16)
344#define NVREG_POWERSTATE2_WAKEUPPAT_6 (1<<17)
345#define NVREG_POWERSTATE2_WAKEUPPAT_7 (1<<18)
346
@ NvRegRxRingPhysAddrHigh
@ NvRegMgmtUnitGetVersion
@ NvRegTxRingPhysAddrHigh
@ NvRegTransmitterControl