ReactOS 0.4.15-dev-7918-g2a2556c
init.c File Reference
#include "dc21x4.h"
#include <debug.h>
Include dependency graph for init.c:

Go to the source code of this file.

Macros

#define DC_RECEIVE_BUFFER_SIZE   (DC_RECEIVE_BLOCK_SIZE - 4)
 
#define DC_MEM_BLOCK_SIZE_RCB    (DC_RECEIVE_BLOCK_SIZE + SYSTEM_CACHE_ALIGNMENT_SIZE - 1)
 
#define DC_MEM_BLOCK_SIZE_RBD    (sizeof(DC_RBD) * DC_RECEIVE_BUFFERS_DEFAULT + SYSTEM_CACHE_ALIGNMENT_SIZE - 1)
 
#define DC_MEM_BLOCK_SIZE_TBD_AUX
 
#define DC_MEM_BLOCK_SIZE_TX_BUFFER    (DC_TRANSMIT_BLOCK_SIZE + SYSTEM_CACHE_ALIGNMENT_SIZE - 1)
 

Functions

 C_ASSERT ((SYSTEM_CACHE_ALIGNMENT_SIZE % DC_RECEIVE_BUFFER_ALIGNMENT)==0)
 
 C_ASSERT ((SYSTEM_CACHE_ALIGNMENT_SIZE % DC_DESCRIPTOR_ALIGNMENT)==0)
 
 C_ASSERT ((SYSTEM_CACHE_ALIGNMENT_SIZE % DC_SETUP_FRAME_ALIGNMENT)==0)
 
 C_ASSERT ((DC_RECEIVE_BUFFER_SIZE % 32) !=0)
 
static VOID DcConfigQueryInteger (_In_ NDIS_HANDLE ConfigurationHandle, _In_ PCWSTR EntryName, _Out_ PULONG EntryContext, _In_ ULONG DefaultValue, _In_ ULONG Minimum, _In_ ULONG Maximum)
 
static NDIS_STATUS DcReadConfiguration (_In_ PDC21X4_ADAPTER Adapter)
 
static VOID DcFreeRcb (_In_ PDC21X4_ADAPTER Adapter, _In_ __drv_freesMem(Mem) PDC_RCB Rcb)
 
static PDC_RCB DcAllocateRcb (_In_ PDC21X4_ADAPTER Adapter)
 
static NDIS_STATUS DcAllocateReceiveBuffers (_In_ PDC21X4_ADAPTER Adapter)
 
static NDIS_STATUS DcAllocateReceiveDescriptors (_In_ PDC21X4_ADAPTER Adapter)
 
static NDIS_STATUS DcAllocateTransmitBlocks (_In_ PDC21X4_ADAPTER Adapter)
 
static NDIS_STATUS DcAllocateTransmitDescriptorsAndBuffers (_In_ PDC21X4_ADAPTER Adapter)
 
static NDIS_STATUS DcAllocateTransmitBuffers (_In_ PDC21X4_ADAPTER Adapter)
 
VOID DcInitTxRing (_In_ PDC21X4_ADAPTER Adapter)
 
static VOID DcCreateRxRing (_In_ PDC21X4_ADAPTER Adapter)
 
VOID DcInitRxRing (_In_ PDC21X4_ADAPTER Adapter)
 
static NDIS_STATUS DcAllocateMemory (_In_ PDC21X4_ADAPTER Adapter)
 
static VOID DcInitTestPacket (_In_ PDC21X4_ADAPTER Adapter)
 
static NDIS_STATUS DcInitializeAdapterResources (_In_ PDC21X4_ADAPTER Adapter)
 
static NDIS_STATUS DcInitializeAdapterLocation (_In_ PDC21X4_ADAPTER Adapter)
 
static ULONG DcGetBusModeParameters (_In_ PDC21X4_ADAPTER Adapter, _In_ PPCI_COMMON_CONFIG PciData)
 
static NDIS_STATUS DcRecognizeHardware (_In_ PDC21X4_ADAPTER Adapter)
 
VOID DcFreeAdapter (_In_ __drv_freesMem(Mem) PDC21X4_ADAPTER Adapter)
 
NDIS_STATUS NTAPI DcInitialize (_Out_ PNDIS_STATUS OpenErrorStatus, _Out_ PUINT SelectedMediumIndex, _In_ PNDIS_MEDIUM MediumArray, _In_ UINT MediumArraySize, _In_ NDIS_HANDLE MiniportAdapterHandle, _In_ NDIS_HANDLE WrapperConfigurationContext)
 

Macro Definition Documentation

◆ DC_MEM_BLOCK_SIZE_RBD

Definition at line 31 of file init.c.

◆ DC_MEM_BLOCK_SIZE_RCB

#define DC_MEM_BLOCK_SIZE_RCB    (DC_RECEIVE_BLOCK_SIZE + SYSTEM_CACHE_ALIGNMENT_SIZE - 1)

Definition at line 28 of file init.c.

◆ DC_MEM_BLOCK_SIZE_TBD_AUX

#define DC_MEM_BLOCK_SIZE_TBD_AUX
Value:
#define DC_LOOPBACK_FRAMES
Definition: dc21x4.h:26
#define DC_TRANSMIT_DESCRIPTORS
Definition: dc21x4.h:23
#define DC_LOOPBACK_FRAME_SIZE
Definition: dc21x4.h:53
struct _DC_TBD DC_TBD
#define DC_SETUP_FRAME_SIZE
Definition: dc21x4hw.h:35
#define SYSTEM_CACHE_ALIGNMENT_SIZE
Definition: ntbasedef.h:259

Definition at line 34 of file init.c.

◆ DC_MEM_BLOCK_SIZE_TX_BUFFER

#define DC_MEM_BLOCK_SIZE_TX_BUFFER    (DC_TRANSMIT_BLOCK_SIZE + SYSTEM_CACHE_ALIGNMENT_SIZE - 1)

Definition at line 39 of file init.c.

◆ DC_RECEIVE_BUFFER_SIZE

#define DC_RECEIVE_BUFFER_SIZE   (DC_RECEIVE_BLOCK_SIZE - 4)

Definition at line 25 of file init.c.

Function Documentation

◆ C_ASSERT() [1/4]

C_ASSERT ( (DC_RECEIVE_BUFFER_SIZE % 32) !  = 0)

◆ C_ASSERT() [2/4]

◆ C_ASSERT() [3/4]

◆ C_ASSERT() [4/4]

◆ DcAllocateMemory()

static NDIS_STATUS DcAllocateMemory ( _In_ PDC21X4_ADAPTER  Adapter)
static

Definition at line 601 of file init.c.

603{
605
606 PAGED_CODE();
607
608 Status = NdisMInitializeScatterGatherDma(Adapter->AdapterHandle,
609 FALSE, /* 32-bit DMA */
612 return Status;
613
616 return Status;
617
620 return Status;
621
624 return Status;
625
628 return Status;
629
632 return Status;
633
634 NdisAllocateSpinLock(&Adapter->SendLock);
635 NdisAllocateSpinLock(&Adapter->ReceiveLock);
636 NdisAllocateSpinLock(&Adapter->ModeLock);
637
638 return NDIS_STATUS_SUCCESS;
639}
#define PAGED_CODE()
#define DC_TRANSMIT_BLOCK_SIZE
Definition: dc21x4.h:37
#define FALSE
Definition: types.h:117
static NDIS_STATUS DcAllocateReceiveDescriptors(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:314
static NDIS_STATUS DcAllocateReceiveBuffers(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:244
static NDIS_STATUS DcAllocateTransmitBuffers(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:444
static NDIS_STATUS DcAllocateTransmitBlocks(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:346
static NDIS_STATUS DcAllocateTransmitDescriptorsAndBuffers(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:371
NDIS_STATUS EXPORT NdisMInitializeScatterGatherDma(IN NDIS_HANDLE MiniportAdapterHandle, IN BOOLEAN Dma64BitAddresses, IN ULONG MaximumPhysicalMapping)
Definition: io.c:1169
Status
Definition: gdiplustypes.h:25
#define NdisAllocateSpinLock(_SpinLock)
Definition: ndis.h:4088
#define NDIS_STATUS_SUCCESS
Definition: ndis.h:346
int NDIS_STATUS
Definition: ntddndis.h:475

Referenced by DcInitialize().

◆ DcAllocateRcb()

static PDC_RCB DcAllocateRcb ( _In_ PDC21X4_ADAPTER  Adapter)
static

Definition at line 180 of file init.c.

182{
184 PDC_RCB Rcb;
187
188 PAGED_CODE();
189
190 Status = NdisAllocateMemoryWithTag((PVOID*)&Rcb, sizeof(*Rcb), DC21X4_TAG);
192 return NULL;
193 NdisZeroMemory(Rcb, sizeof(*Rcb));
194
195 NdisMAllocateSharedMemory(Adapter->AdapterHandle,
197 TRUE, /* Cached */
200 if (!VirtualAddress)
201 goto Failure;
202
203 /* 32-bit DMA */
205
208
209 ASSERT((Rcb->PhysicalAddress % DC_RECEIVE_BUFFER_ALIGNMENT) == 0);
210
211 Rcb->VirtualAddressOriginal = VirtualAddress;
212 Rcb->PhysicalAddressOriginal.QuadPart = PhysicalAddress.QuadPart;
213
214 NdisAllocatePacket(&Status, &Rcb->Packet, Adapter->PacketPool);
216 goto Failure;
217
218 *DC_RCB_FROM_PACKET(Rcb->Packet) = Rcb;
219
221 &Rcb->NdisBuffer,
222 Adapter->BufferPool,
223 Rcb->VirtualAddress,
226 goto Failure;
227
229 NdisChainBufferAtFront(Rcb->Packet, Rcb->NdisBuffer);
230
231 PushEntryList(&Adapter->AllocRcbList, &Rcb->AllocListEntry);
232
233 return Rcb;
234
235Failure:
236 DcFreeRcb(Adapter, Rcb);
237
238 return NULL;
239}
#define ALIGN_UP_BY(size, align)
#define DC21X4_TAG
Definition: dc21x4.h:21
#define DC_RECEIVE_BLOCK_SIZE
Definition: dc21x4.h:38
#define DC_ETHERNET_HEADER_SIZE
Definition: dc21x4.h:39
#define DC_RECEIVE_BUFFER_ALIGNMENT
Definition: dc21x4hw.h:30
#define NULL
Definition: types.h:112
#define TRUE
Definition: types.h:120
#define DC_MEM_BLOCK_SIZE_RCB
Definition: init.c:28
static VOID DcFreeRcb(_In_ PDC21X4_ADAPTER Adapter, _In_ __drv_freesMem(Mem) PDC_RCB Rcb)
Definition: init.c:154
VOID EXPORT NdisAllocateBuffer(OUT PNDIS_STATUS Status, OUT PNDIS_BUFFER *Buffer, IN NDIS_HANDLE PoolHandle, IN PVOID VirtualAddress, IN UINT Length)
Definition: buffer.c:336
VOID EXPORT NdisAllocatePacket(OUT PNDIS_STATUS Status, OUT PNDIS_PACKET *Packet, IN NDIS_HANDLE PoolHandle)
Definition: buffer.c:394
NDIS_STATUS EXPORT NdisAllocateMemoryWithTag(OUT PVOID *VirtualAddress, IN UINT Length, IN ULONG Tag)
Definition: memory.c:21
VOID EXPORT NdisMAllocateSharedMemory(IN NDIS_HANDLE MiniportAdapterHandle, IN ULONG Length, IN BOOLEAN Cached, OUT PVOID *VirtualAddress, OUT PNDIS_PHYSICAL_ADDRESS PhysicalAddress)
Definition: memory.c:148
#define ASSERT(a)
Definition: mode.c:44
#define NdisZeroMemory(Destination, Length)
Definition: ndis.h:3926
#define NDIS_SET_PACKET_HEADER_SIZE(_Packet, _HdrSize)
Definition: ndis.h:3499
#define NdisChainBufferAtFront(Packet, Buffer)
Definition: ndis.h:3106
#define DC_RCB_FROM_PACKET(Packet)
Definition: sendrcv.h:16
#define ALIGN_UP_POINTER_BY(ptr, align)
Definition: umtypes.h:85
LONGLONG QuadPart
Definition: typedefs.h:114
ULONG LowPart
Definition: typedefs.h:106
_Must_inspect_result_ _In_ WDFDMATRANSACTION _In_ PFN_WDF_PROGRAM_DMA _In_ WDF_DMA_DIRECTION _In_ PMDL _In_ PVOID VirtualAddress
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS PhysicalAddress
Definition: iotypes.h:1098
FORCEINLINE VOID PushEntryList(_Inout_ PSINGLE_LIST_ENTRY ListHead, _Inout_ __drv_aliasesMem PSINGLE_LIST_ENTRY Entry)
Definition: rtlfuncs.h:253

Referenced by DcAllocateReceiveBuffers().

◆ DcAllocateReceiveBuffers()

static NDIS_STATUS DcAllocateReceiveBuffers ( _In_ PDC21X4_ADAPTER  Adapter)
static

Definition at line 244 of file init.c.

246{
247 ULONG i;
249 PDC_RCB Rcb;
250
251 PAGED_CODE();
252
254 &Adapter->PacketPool,
258 return Status;
259
261 &Adapter->BufferPool,
264 return Status;
265
266 /* Allocate RCBs */
267 for (i = 0; i < DC_RECEIVE_BUFFERS_DEFAULT; ++i)
268 {
269 Rcb = DcAllocateRcb(Adapter);
270 if (!Rcb)
271 {
272 WARN("RCB allocation failed, total buffers %u\n", Adapter->RcbCount);
273 break;
274 }
275
276 PushEntryList(&Adapter->UsedRcbList, &Rcb->ListEntry);
277
278 ++Adapter->RcbCount;
279 }
280
281 if (Adapter->RcbCount < DC_RECEIVE_BUFFERS_MIN)
283
284 Adapter->RcbFree = Adapter->RcbCount;
285
286 /* Fix up the ring size */
287 Adapter->TailRbd = Adapter->HeadRbd + Adapter->RcbCount - 1;
288
289 /* Allocate extra RCBs for receive indication */
290 for (i = 0; i < DC_RECEIVE_BUFFERS_EXTRA; ++i)
291 {
292 Rcb = DcAllocateRcb(Adapter);
293 if (!Rcb)
294 {
295 WARN("Extra RCB allocation failed\n");
296 break;
297 }
298
299 PushEntryList(&Adapter->FreeRcbList, &Rcb->ListEntry);
300 }
301
302 Status = NdisAllocateMemoryWithTag((PVOID*)&Adapter->RcbArray,
303 sizeof(PVOID) * Adapter->RcbCount,
304 DC21X4_TAG);
306 return Status;
307
308 return NDIS_STATUS_SUCCESS;
309}
#define WARN(fmt,...)
Definition: debug.h:112
#define DC_RECEIVE_BUFFERS_MIN
Definition: dc21x4.h:29
#define DC_RECEIVE_BUFFERS_DEFAULT
Definition: dc21x4.h:28
#define DC_RECEIVE_BUFFERS_EXTRA
Definition: dc21x4.h:30
static PDC_RCB DcAllocateRcb(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:180
VOID EXPORT NdisAllocateBufferPool(OUT PNDIS_STATUS Status, OUT PNDIS_HANDLE PoolHandle, IN UINT NumberOfDescriptors)
Definition: buffer.c:372
VOID EXPORT NdisAllocatePacketPool(OUT PNDIS_STATUS Status, OUT PNDIS_HANDLE PoolHandle, IN UINT NumberOfDescriptors, IN UINT ProtocolReservedLength)
Definition: buffer.c:421
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
#define PROTOCOL_RESERVED_SIZE_IN_PACKET
Definition: ndis.h:1540
#define NDIS_STATUS_RESOURCES
Definition: ndis.h:466
SINGLE_LIST_ENTRY ListEntry
Definition: sendrcv.h:42
uint32_t ULONG
Definition: typedefs.h:59

Referenced by DcAllocateMemory().

◆ DcAllocateReceiveDescriptors()

static NDIS_STATUS DcAllocateReceiveDescriptors ( _In_ PDC21X4_ADAPTER  Adapter)
static

Definition at line 314 of file init.c.

316{
317 PDC_RBD Rbd;
318
319 PAGED_CODE();
320
321 NdisMAllocateSharedMemory(Adapter->AdapterHandle,
323 FALSE, /* Non-cached */
324 &Adapter->RbdOriginal,
325 &Adapter->RbdPhysOriginal);
326 if (!Adapter->RbdOriginal)
328
329 /* 32-bit DMA */
330 ASSERT(Adapter->RbdPhysOriginal.HighPart == 0);
331
332 Adapter->RbdPhys = ALIGN_UP_BY(Adapter->RbdPhysOriginal.LowPart, SYSTEM_CACHE_ALIGNMENT_SIZE);
333
334 ASSERT((Adapter->RbdPhys % DC_DESCRIPTOR_ALIGNMENT) == 0);
335
336 Rbd = ALIGN_UP_POINTER_BY(Adapter->RbdOriginal, SYSTEM_CACHE_ALIGNMENT_SIZE);
337
338 Adapter->HeadRbd = Rbd;
339
340 return NDIS_STATUS_SUCCESS;
341}
#define DC_DESCRIPTOR_ALIGNMENT
Definition: dc21x4hw.h:28
#define DC_MEM_BLOCK_SIZE_RBD
Definition: init.c:31

Referenced by DcAllocateMemory().

◆ DcAllocateTransmitBlocks()

static NDIS_STATUS DcAllocateTransmitBlocks ( _In_ PDC21X4_ADAPTER  Adapter)
static

Definition at line 346 of file init.c.

348{
349 PDC_TCB Tcb;
351
352 PAGED_CODE();
353
355 DC_TRANSMIT_BLOCKS * sizeof(*Tcb),
356 DC21X4_TAG);
358 return Status;
359
360 NdisZeroMemory(Tcb, DC_TRANSMIT_BLOCKS * sizeof(*Tcb));
361
362 Adapter->HeadTcb = Tcb;
363 Adapter->TailTcb = Tcb + (DC_TRANSMIT_BLOCKS - 1);
364
365 return NDIS_STATUS_SUCCESS;
366}
#define DC_TRANSMIT_BLOCKS
Definition: dc21x4.h:24

Referenced by DcAllocateMemory().

◆ DcAllocateTransmitBuffers()

static NDIS_STATUS DcAllocateTransmitBuffers ( _In_ PDC21X4_ADAPTER  Adapter)
static

Definition at line 444 of file init.c.

446{
447 PDC_COALESCE_BUFFER CoalesceBuffer;
449 ULONG i;
450
451 PAGED_CODE();
452
453 Status = NdisAllocateMemoryWithTag((PVOID*)&CoalesceBuffer,
454 DC_TRANSMIT_BUFFERS * sizeof(*CoalesceBuffer),
455 DC21X4_TAG);
457 return Status;
458
459 NdisZeroMemory(CoalesceBuffer, DC_TRANSMIT_BUFFERS * sizeof(*CoalesceBuffer));
460
461 Adapter->CoalesceBuffer = CoalesceBuffer;
462
463 for (i = 0; i < DC_TRANSMIT_BUFFERS; ++i)
464 {
467
468 NdisMAllocateSharedMemory(Adapter->AdapterHandle,
470 FALSE, /* Non-cached */
473 if (!VirtualAddress)
474 continue;
475
477
478 CoalesceBuffer->VirtualAddress =
480 CoalesceBuffer->PhysicalAddress =
482
483 Adapter->SendBufferData[i].PhysicalAddress.QuadPart = PhysicalAddress.QuadPart;
484 Adapter->SendBufferData[i].VirtualAddress = VirtualAddress;
485
486 PushEntryList(&Adapter->SendBufferList, &CoalesceBuffer->ListEntry);
487
488 ++CoalesceBuffer;
489 }
490
491 if (!Adapter->SendBufferList.Next)
493
494 return NDIS_STATUS_SUCCESS;
495}
#define DC_TRANSMIT_BUFFERS
Definition: dc21x4.h:25
#define DC_MEM_BLOCK_SIZE_TX_BUFFER
Definition: init.c:39

Referenced by DcAllocateMemory().

◆ DcAllocateTransmitDescriptorsAndBuffers()

static NDIS_STATUS DcAllocateTransmitDescriptorsAndBuffers ( _In_ PDC21X4_ADAPTER  Adapter)
static

Definition at line 371 of file init.c.

373{
374 ULONG_PTR BufferVa, BufferPa;
376 ULONG i;
377
378 PAGED_CODE();
379
380 NdisMAllocateSharedMemory(Adapter->AdapterHandle,
382 FALSE, /* Non-cached */
383 &Adapter->TbdOriginal,
384 &Adapter->TbdPhysOriginal);
385 if (!Adapter->TbdOriginal)
387
388 /* 32-bit DMA */
389 ASSERT(Adapter->TbdPhysOriginal.HighPart == 0);
390
391 BufferVa = (ULONG_PTR)Adapter->TbdOriginal;
392 BufferPa = Adapter->TbdPhysOriginal.LowPart;
393
394 BufferVa = ALIGN_UP_BY(BufferVa, SYSTEM_CACHE_ALIGNMENT_SIZE);
395 BufferPa = ALIGN_UP_BY(BufferPa, SYSTEM_CACHE_ALIGNMENT_SIZE);
396
397 ASSERT((BufferPa % DC_DESCRIPTOR_ALIGNMENT) == 0);
398
399 Adapter->TbdPhys = (ULONG)BufferPa;
400 Adapter->HeadTbd = (PDC_TBD)BufferVa;
401 Adapter->TailTbd = (PDC_TBD)BufferVa + DC_TRANSMIT_DESCRIPTORS - 1;
402
403 BufferVa += sizeof(DC_TBD) * DC_TRANSMIT_DESCRIPTORS;
404 BufferPa += sizeof(DC_TBD) * DC_TRANSMIT_DESCRIPTORS;
405
406 BufferVa = ALIGN_UP_BY(BufferVa, SYSTEM_CACHE_ALIGNMENT_SIZE);
407 BufferPa = ALIGN_UP_BY(BufferPa, SYSTEM_CACHE_ALIGNMENT_SIZE);
408
409 ASSERT((BufferPa % DC_SETUP_FRAME_ALIGNMENT) == 0);
410
411 Adapter->SetupFrame = (PVOID)BufferVa;
412 Adapter->SetupFramePhys = BufferPa;
413
414 BufferVa += DC_SETUP_FRAME_SIZE;
415 BufferPa += DC_SETUP_FRAME_SIZE;
416
417 BufferVa = ALIGN_UP_BY(BufferVa, SYSTEM_CACHE_ALIGNMENT_SIZE);
418 BufferPa = ALIGN_UP_BY(BufferPa, SYSTEM_CACHE_ALIGNMENT_SIZE);
419
420 for (i = 0; i < DC_LOOPBACK_FRAMES; ++i)
421 {
422 Adapter->LoopbackFrame[i] = (PVOID)BufferVa;
423 Adapter->LoopbackFramePhys[i] = BufferPa;
424
425 BufferVa += DC_LOOPBACK_FRAME_SIZE;
426 BufferPa += DC_LOOPBACK_FRAME_SIZE;
427 }
428
429 if (Adapter->Features & DC_HAS_POWER_MANAGEMENT)
430 {
431 Status = NdisAllocateMemoryWithTag((PVOID*)&Adapter->SetupFrameSaved,
433 DC21X4_TAG);
435 return Status;
436 }
437
438 return NDIS_STATUS_SUCCESS;
439}
#define DC_HAS_POWER_MANAGEMENT
Definition: dc21x4.h:111
struct _DC_TBD * PDC_TBD
#define DC_SETUP_FRAME_ALIGNMENT
Definition: dc21x4hw.h:29
#define DC_MEM_BLOCK_SIZE_TBD_AUX
Definition: init.c:34
#define ULONG_PTR
Definition: config.h:101
void * PVOID
Definition: typedefs.h:50
uint32_t ULONG_PTR
Definition: typedefs.h:65

Referenced by DcAllocateMemory().

◆ DcConfigQueryInteger()

static VOID DcConfigQueryInteger ( _In_ NDIS_HANDLE  ConfigurationHandle,
_In_ PCWSTR  EntryName,
_Out_ PULONG  EntryContext,
_In_ ULONG  DefaultValue,
_In_ ULONG  Minimum,
_In_ ULONG  Maximum 
)
static

Definition at line 47 of file init.c.

54{
57 PNDIS_CONFIGURATION_PARAMETER ConfigurationParameter;
58
59 PAGED_CODE();
60
61 NdisInitUnicodeString(&Keyword, EntryName);
63 &ConfigurationParameter,
65 &Keyword,
68 {
69 TRACE("'%S' request failed, default value %u\n", EntryName, DefaultValue);
70
71 *EntryContext = DefaultValue;
72 return;
73 }
74
75 if (ConfigurationParameter->ParameterData.IntegerData >= Minimum &&
76 ConfigurationParameter->ParameterData.IntegerData <= Maximum)
77 {
78 *EntryContext = ConfigurationParameter->ParameterData.IntegerData;
79 }
80 else
81 {
82 WARN("'%S' value out of range\n", EntryName);
83
84 *EntryContext = DefaultValue;
85 }
86
87 TRACE("Set '%S' to %u\n", EntryName, *EntryContext);
88}
VOID EXPORT NdisReadConfiguration(OUT PNDIS_STATUS Status, OUT PNDIS_CONFIGURATION_PARAMETER *ParameterValue, IN NDIS_HANDLE ConfigurationHandle, IN PNDIS_STRING Keyword, IN NDIS_PARAMETER_TYPE ParameterType)
Definition: config.c:414
VOID EXPORT NdisInitUnicodeString(IN OUT PNDIS_STRING DestinationString, IN PCWSTR SourceString)
Definition: string.c:130
@ NdisParameterInteger
Definition: ndis.h:926
_Must_inspect_result_ _Out_ PNDIS_STATUS _Out_ PNDIS_HANDLE ConfigurationHandle
Definition: ndis.h:3945
_In_ PCWSTR _Inout_ _At_ QueryTable EntryContext
Definition: rtlfuncs.h:4207
#define TRACE(s)
Definition: solgame.cpp:4
union _NDIS_CONFIGURATION_PARAMETER::@2097 ParameterData

Referenced by DcReadConfiguration().

◆ DcCreateRxRing()

static VOID DcCreateRxRing ( _In_ PDC21X4_ADAPTER  Adapter)
static

Definition at line 530 of file init.c.

532{
533 PDC_RCB* RcbSlot;
534 PDC_RCB Rcb;
535 PDC_RBD Rbd;
537
538 PAGED_CODE();
539
540 Rbd = Adapter->HeadRbd;
541 Adapter->CurrentRbd = Rbd;
542
543 RcbSlot = DC_GET_RCB_SLOT(Adapter, Rbd);
544 Rcb = (PDC_RCB)Adapter->UsedRcbList.Next;
545
546 for (Entry = Adapter->UsedRcbList.Next;
547 Entry != NULL;
548 Entry = Entry->Next)
549 {
550 Rcb = (PDC_RCB)Entry;
551
553
554 Rbd->Address1 = Rcb->PhysicalAddress;
555 Rbd->Address2 = 0;
558
559 *RcbSlot = Rcb;
560
561 ++RcbSlot;
562 ++Rbd;
563 Rcb = (PDC_RCB)Rcb->ListEntry.Next;
564 }
565 Rbd = Rbd - 1;
567 Rbd->Address2 = Adapter->RbdPhys;
568
569 ASSERT(Rbd == Adapter->TailRbd);
570}
struct _DC_RCB * PDC_RCB
Definition: dc21x4.h:63
#define DC_RBD_CONTROL_CHAINED
Definition: dc21x4hw.h:131
#define DC_RECEIVE_BUFFER_SIZE_MULTIPLE
Definition: dc21x4hw.h:31
#define DC_RBD_STATUS_OWNED
Definition: dc21x4hw.h:124
#define DC_RECEIVE_BUFFER_SIZE
Definition: init.c:25
#define C_ASSERT(e)
Definition: intsafe.h:73
#define for
Definition: utility.h:88
FORCEINLINE PDC_RCB * DC_GET_RCB_SLOT(_In_ PDC21X4_ADAPTER Adapter, _In_ PDC_RBD Rbd)
Definition: sendrcv.h:110
base of all file and directory entries
Definition: entries.h:83
ULONG Control
Definition: dc21x4hw.h:128
ULONG Address1
Definition: dc21x4hw.h:134
ULONG Address2
Definition: dc21x4hw.h:135
ULONG Status
Definition: dc21x4hw.h:106
ULONG PhysicalAddress
Definition: sendrcv.h:44
Definition: ntbasedef.h:628
struct _SINGLE_LIST_ENTRY * Next
Definition: ntbasedef.h:629

Referenced by DcInitialize().

◆ DcFreeAdapter()

VOID DcFreeAdapter ( _In_ __drv_freesMem(Mem) PDC21X4_ADAPTER  Adapter)

Definition at line 1022 of file init.c.

1024{
1025 ULONG i;
1026
1027 PAGED_CODE();
1028
1029 DcFreeEeprom(Adapter);
1030
1031 if (Adapter->Interrupt.InterruptObject)
1032 {
1033 NdisMDeregisterInterrupt(&Adapter->Interrupt);
1034 }
1035
1036 if (Adapter->IoBase)
1037 {
1038 if (Adapter->Flags & DC_IO_MAPPED)
1039 {
1040 NdisMUnmapIoSpace(Adapter->AdapterHandle,
1041 Adapter->IoBase,
1042 DC_IO_LENGTH);
1043 }
1044 else
1045 {
1046 NdisMDeregisterIoPortRange(Adapter->AdapterHandle,
1047 Adapter->IoBaseAddress.LowPart,
1049 Adapter->IoBase);
1050 }
1051 }
1052
1053 if (Adapter->HeadTcb)
1054 {
1055 NdisFreeMemory(Adapter->HeadTcb, sizeof(DC_TCB) * DC_TRANSMIT_BLOCKS, 0);
1056 }
1057 if (Adapter->RcbArray)
1058 {
1059 NdisFreeMemory(Adapter->RcbArray, sizeof(PVOID) * Adapter->RcbCount, 0);
1060 }
1061 if (Adapter->SetupFrameSaved)
1062 {
1063 NdisFreeMemory(Adapter->SetupFrameSaved, DC_SETUP_FRAME_SIZE, 0);
1064 }
1065
1066 while (Adapter->AllocRcbList.Next)
1067 {
1068 PSINGLE_LIST_ENTRY Entry = PopEntryList(&Adapter->AllocRcbList);
1069 PDC_RCB Rcb = CONTAINING_RECORD(Entry, DC_RCB, AllocListEntry);
1070
1071 DcFreeRcb(Adapter, Rcb);
1072 }
1073
1074 if (Adapter->RbdOriginal)
1075 {
1076 NdisMFreeSharedMemory(Adapter->AdapterHandle,
1078 FALSE, /* Non-cached */
1079 Adapter->RbdOriginal,
1080 Adapter->RbdPhysOriginal);
1081 }
1082 if (Adapter->TbdOriginal)
1083 {
1084 NdisMFreeSharedMemory(Adapter->AdapterHandle,
1086 FALSE, /* Non-cached */
1087 Adapter->TbdOriginal,
1088 Adapter->TbdPhysOriginal);
1089 }
1090 if (Adapter->CoalesceBuffer)
1091 {
1092 for (i = 0; i < DC_TRANSMIT_BUFFERS; ++i)
1093 {
1094 PDC_TX_BUFFER_DATA SendBufferData = &Adapter->SendBufferData[i];
1095
1096 if (!SendBufferData->VirtualAddress)
1097 continue;
1098
1099 NdisMFreeSharedMemory(Adapter->AdapterHandle,
1101 FALSE, /* Non-cached */
1102 SendBufferData->VirtualAddress,
1103 SendBufferData->PhysicalAddress);
1104 }
1105 }
1106
1107 if (Adapter->PacketPool)
1108 NdisFreePacketPool(Adapter->PacketPool);
1109 if (Adapter->BufferPool)
1110 NdisFreeBufferPool(Adapter->BufferPool);
1111
1112 if (Adapter->SendLock.SpinLock)
1113 NdisFreeSpinLock(&Adapter->SendLock);
1114 if (Adapter->ReceiveLock.SpinLock)
1115 NdisFreeSpinLock(&Adapter->ReceiveLock);
1116 if (Adapter->ModeLock.SpinLock)
1117 NdisFreeSpinLock(&Adapter->ModeLock);
1118
1119 NdisFreeMemory(Adapter->AdapterOriginal, sizeof(*Adapter), 0);
1120}
#define DC_IO_MAPPED
Definition: dc21x4.h:121
VOID DcFreeEeprom(_In_ PDC21X4_ADAPTER Adapter)
Definition: eeprom.c:1444
#define DC_IO_LENGTH
Definition: dc21x4hw.h:33
VOID EXPORT NdisFreeBufferPool(IN NDIS_HANDLE PoolHandle)
Definition: buffer.c:777
VOID EXPORT NdisFreePacketPool(IN NDIS_HANDLE PoolHandle)
Definition: buffer.c:793
VOID EXPORT NdisMDeregisterInterrupt(IN PNDIS_MINIPORT_INTERRUPT Interrupt)
Definition: io.c:700
VOID EXPORT NdisMDeregisterIoPortRange(IN NDIS_HANDLE MiniportAdapterHandle, IN UINT InitialPort, IN UINT NumberOfPorts, IN PVOID PortOffset)
Definition: io.c:1093
VOID EXPORT NdisMUnmapIoSpace(IN NDIS_HANDLE MiniportAdapterHandle, IN PVOID VirtualAddress, IN UINT Length)
Definition: io.c:1139
VOID EXPORT NdisFreeMemory(IN PVOID VirtualAddress, IN UINT Length, IN UINT MemoryFlags)
Definition: memory.c:110
VOID EXPORT NdisMFreeSharedMemory(IN NDIS_HANDLE MiniportAdapterHandle, IN ULONG Length, IN BOOLEAN Cached, IN PVOID VirtualAddress, IN NDIS_PHYSICAL_ADDRESS PhysicalAddress)
Definition: memory.c:215
#define NdisFreeSpinLock(_SpinLock)
Definition: ndis.h:4097
PVOID VirtualAddress
Definition: dc21x4.h:74
NDIS_PHYSICAL_ADDRESS PhysicalAddress
Definition: dc21x4.h:75
#define CONTAINING_RECORD(address, type, field)
Definition: typedefs.h:260
FORCEINLINE PSINGLE_LIST_ENTRY PopEntryList(_Inout_ PSINGLE_LIST_ENTRY ListHead)
Definition: rtlfuncs.h:240

Referenced by DcHalt(), and DcInitialize().

◆ DcFreeRcb()

static VOID DcFreeRcb ( _In_ PDC21X4_ADAPTER  Adapter,
_In_ __drv_freesMem(Mem) PDC_RCB  Rcb 
)
static

Definition at line 154 of file init.c.

157{
158 PAGED_CODE();
159
160 if (Rcb->VirtualAddressOriginal)
161 {
162 NdisMFreeSharedMemory(Adapter->AdapterHandle,
164 TRUE, /* Cached */
165 Rcb->VirtualAddressOriginal,
166 Rcb->PhysicalAddressOriginal);
167 }
168
169 if (Rcb->NdisBuffer)
170 NdisFreeBuffer(Rcb->NdisBuffer);
171 if (Rcb->Packet)
172 NdisFreePacket(Rcb->Packet);
173
174 NdisFreeMemory(Rcb, sizeof(*Rcb), 0);
175}
VOID EXPORT NdisFreePacket(IN PNDIS_PACKET Packet)
Definition: buffer.c:828
#define NdisFreeBuffer
Definition: ndis.h:2895

Referenced by DcAllocateRcb(), and DcFreeAdapter().

◆ DcGetBusModeParameters()

static ULONG DcGetBusModeParameters ( _In_ PDC21X4_ADAPTER  Adapter,
_In_ PPCI_COMMON_CONFIG  PciData 
)
static

Definition at line 824 of file init.c.

827{
828 ULONG DefaultMode, NewMode;
829
830 PAGED_CODE();
831
832 /* TODO: Other architectures than x86 */
834
835 if (!(Adapter->Features & DC_ENABLE_PCI_COMMANDS))
836 return DefaultMode;
837
838 INFO("PCI Cache Line Size %u\n", PciData->CacheLineSize * 4);
839 INFO("PCI Command %04lx\n", PciData->Command);
840
841 /* Use the cache line size if it was set up by firmware */
842 switch (PciData->CacheLineSize)
843 {
844 case 8:
846 break;
847 case 16:
849 break;
850 case 32:
852 break;
853
854 default:
855 return DefaultMode;
856 }
857
858 /* Enable one of those commands */
859 if (PciData->Command & PCI_ENABLE_WRITE_AND_INVALIDATE)
860 {
862 }
863 else
864 {
865 NewMode |= DC_BUS_MODE_READ_LINE;
866 }
867
868 return NewMode;
869}
#define DC_ENABLE_PCI_COMMANDS
Definition: dc21x4.h:115
#define DC_BUS_MODE_BURST_LENGTH_NO_LIMIT
Definition: dc21x4hw.h:211
#define DC_BUS_MODE_BURST_LENGTH_16
Definition: dc21x4hw.h:216
#define DC_BUS_MODE_CACHE_ALIGNMENT_16
Definition: dc21x4hw.h:221
#define DC_BUS_MODE_BURST_LENGTH_8
Definition: dc21x4hw.h:215
#define DC_BUS_MODE_READ_LINE
Definition: dc21x4hw.h:207
#define DC_BUS_MODE_BURST_LENGTH_32
Definition: dc21x4hw.h:217
#define DC_BUS_MODE_WRITE_INVALIDATE
Definition: dc21x4hw.h:208
#define DC_BUS_MODE_CACHE_ALIGNMENT_8
Definition: dc21x4hw.h:220
#define DC_BUS_MODE_CACHE_ALIGNMENT_32
Definition: dc21x4hw.h:222
#define INFO
Definition: debug.h:89
#define PCI_ENABLE_WRITE_AND_INVALIDATE
Definition: iotypes.h:3620

Referenced by DcRecognizeHardware().

◆ DcInitialize()

NDIS_STATUS NTAPI DcInitialize ( _Out_ PNDIS_STATUS  OpenErrorStatus,
_Out_ PUINT  SelectedMediumIndex,
_In_ PNDIS_MEDIUM  MediumArray,
_In_ UINT  MediumArraySize,
_In_ NDIS_HANDLE  MiniportAdapterHandle,
_In_ NDIS_HANDLE  WrapperConfigurationContext 
)

Definition at line 1125 of file init.c.

1132{
1133 PDC21X4_ADAPTER Adapter;
1134 PVOID UnalignedAdapter;
1136 ULONG Alignment, AdapterSize, OpMode;
1138 UINT i;
1139
1140 INFO("Called\n");
1141
1142 PAGED_CODE();
1143
1144 for (i = 0; i < MediumArraySize; ++i)
1145 {
1146 if (MediumArray[i] == NdisMedium802_3)
1147 {
1149 break;
1150 }
1151 }
1152 if (i == MediumArraySize)
1153 {
1154 ERR("No supported media\n");
1156 }
1157
1159 AdapterSize = sizeof(*Adapter) + Alignment;
1160
1161 Status = NdisAllocateMemoryWithTag((PVOID*)&UnalignedAdapter, AdapterSize, DC21X4_TAG);
1163 {
1164 ERR("Failed to allocate adapter context\n");
1165 return NDIS_STATUS_RESOURCES;
1166 }
1167 NdisZeroMemory(UnalignedAdapter, AdapterSize);
1168
1169 Adapter = ALIGN_UP_POINTER_BY(UnalignedAdapter, Alignment);
1170 Adapter->AdapterOriginal = UnalignedAdapter;
1171 Adapter->AdapterSize = AdapterSize;
1174
1178
1180 Adapter,
1181 2, /* CheckForHangTimeInSeconds */
1186
1187 Status = DcRecognizeHardware(Adapter);
1189 {
1190 return Status;
1191 }
1192
1195 {
1196 goto Failure;
1197 }
1198
1201 {
1202 goto Failure;
1203 }
1204
1205 /* Bring the chip out of sleep mode */
1206 DcPowerSave(Adapter, FALSE);
1207
1208 OpMode = DC_READ(Adapter, DcCsr6_OpMode);
1210 DC_WRITE(Adapter, DcCsr6_OpMode, OpMode);
1211
1212 MediaInitMediaList(Adapter);
1213
1214 Status = DcReadEeprom(Adapter);
1216 {
1217 goto Failure;
1218 }
1219
1221
1222 Status = DcReadConfiguration(Adapter);
1224 {
1225 goto Failure;
1226 }
1227
1228 Status = DcAllocateMemory(Adapter);
1230 {
1231 goto Failure;
1232 }
1233
1234 DcInitTestPacket(Adapter);
1235
1236 DcCreateRxRing(Adapter);
1237
1238 /* Execute the reset sequence */
1239 if (Adapter->ResetStreamLength)
1240 {
1241 for (i = 0; i < Adapter->ResetStreamLength; ++i)
1242 {
1243 DcWriteGpio(Adapter, Adapter->ResetStream[i]);
1244 NdisMSleep(100);
1245 }
1246
1247 /* Give the PHY some time to reset */
1248 NdisMSleep(5000);
1249 }
1250
1251 /* Perform a software reset */
1253 NdisMSleep(100);
1254 DC_WRITE(Adapter, DcCsr0_BusMode, Adapter->BusMode);
1255
1256 /* Try to detect a MII PHY */
1257 if (Adapter->Features & DC_HAS_MII)
1258 {
1259 MediaSelectMiiPort(Adapter, TRUE);
1260
1261 Success = DcFindMiiPhy(Adapter);
1262 if (Success)
1263 {
1264 /* Disable all link interrupts when the MII PHY media is found */
1266 Adapter->LinkStateChangeMask = 0;
1267 }
1268 else
1269 {
1270 /* Incorrect EEPROM table or PHY is not connected, switch to a serial transceiver */
1271 WARN("No PHY devices found\n");
1272 Adapter->Features &= ~DC_HAS_MII;
1273 }
1274 }
1275
1276 MediaInitDefaultMedia(Adapter, Adapter->DefaultMedia);
1277
1278 /* Set the MAC address */
1279 DcSetupFrameInitialize(Adapter);
1280
1281 /* Clear statistics */
1282 DC_READ(Adapter, DcCsr8_RxCounters);
1283
1284 Adapter->Flags |= DC_FIRST_SETUP;
1285
1286 Status = DcSetupAdapter(Adapter);
1288 {
1289 ERR("Failed to initialize the NIC\n");
1290 goto Disable;
1291 }
1292
1293 Adapter->Flags &= ~DC_FIRST_SETUP;
1294
1296 Adapter->AdapterHandle,
1297 Adapter->InterruptVector,
1298 Adapter->InterruptLevel,
1299 TRUE, /* Request ISR calls */
1300 !!(Adapter->Flags & DC_IRQ_SHARED),
1304 {
1305 ERR("Unable to register interrupt\n");
1306 goto Disable;
1307 }
1308
1309 DcStartAdapter(Adapter);
1310
1311 return NDIS_STATUS_SUCCESS;
1312
1313Disable:
1314 DcDisableHw(Adapter);
1315Failure:
1316 ERR("Initialization failed with status %08lx\n", Status);
1317
1318 DcFreeAdapter(Adapter);
1319
1320 return Status;
1321}
unsigned char BOOLEAN
#define ERR(fmt,...)
Definition: debug.h:110
VOID DcStartAdapter(_In_ PDC21X4_ADAPTER Adapter)
Definition: dc21x4.c:168
VOID NTAPI DcTransmitTimeoutRecoveryWorker(_In_ PNDIS_WORK_ITEM WorkItem, _In_opt_ PVOID Context)
Definition: dc21x4.c:247
VOID NTAPI DcResetWorker(_In_ PNDIS_WORK_ITEM WorkItem, _In_opt_ PVOID Context)
Definition: dc21x4.c:190
VOID DcWriteGpio(_In_ PDC21X4_ADAPTER Adapter, _In_ ULONG Value)
Definition: hardware.c:64
NDIS_STATUS DcSetupAdapter(_In_ PDC21X4_ADAPTER Adapter)
Definition: hardware.c:462
VOID DcPowerSave(_In_ PDC21X4_ADAPTER Adapter, _In_ BOOLEAN Enable)
Definition: power.c:225
VOID MediaSelectMiiPort(_In_ PDC21X4_ADAPTER Adapter, _In_ BOOLEAN ResetPhy)
Definition: media.c:215
VOID DcDisableHw(_In_ PDC21X4_ADAPTER Adapter)
Definition: hardware.c:17
VOID NTAPI DcPowerWorker(_In_ PNDIS_WORK_ITEM WorkItem, _In_opt_ PVOID Context)
Definition: power.c:167
VOID DcSetupFrameInitialize(_In_ PDC21X4_ADAPTER Adapter)
Definition: hardware.c:260
FORCEINLINE ULONG DC_READ(_In_ PDC21X4_ADAPTER Adapter, _In_ DC_CSR Register)
Definition: dc21x4.h:262
#define DC_FIRST_SETUP
Definition: dc21x4.h:123
VOID MediaInitMediaList(_In_ PDC21X4_ADAPTER Adapter)
Definition: media.c:545
#define DC_IRQ_SHARED
Definition: dc21x4.h:122
#define DC_HAS_MII
Definition: dc21x4.h:113
VOID MediaInitDefaultMedia(_In_ PDC21X4_ADAPTER Adapter, _In_ ULONG MediaNumber)
Definition: media.c:325
NDIS_STATUS DcReadEeprom(_In_ PDC21X4_ADAPTER Adapter)
Definition: eeprom.c:1482
BOOLEAN DcFindMiiPhy(_In_ PDC21X4_ADAPTER Adapter)
Definition: phy.c:217
#define DC_WRITE(Adapter, Register, Value)
Definition: dc21x4.h:272
#define DC_IRQ_LINK_CHANGED
Definition: dc21x4hw.h:290
#define DC_OPMODE_TX_ENABLE
Definition: dc21x4hw.h:330
@ DcCsr6_OpMode
Definition: dc21x4hw.h:180
@ DcCsr0_BusMode
Definition: dc21x4hw.h:172
@ DcCsr8_RxCounters
Definition: dc21x4hw.h:182
#define DC_BUS_MODE_SOFT_RESET
Definition: dc21x4hw.h:197
#define DC_OPMODE_RX_ENABLE
Definition: dc21x4hw.h:319
#define DC_IRQ_LINK_PASS
Definition: dc21x4hw.h:271
#define DC_IRQ_LINK_FAIL
Definition: dc21x4hw.h:281
static VOID DcInitTestPacket(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:644
static NDIS_STATUS DcRecognizeHardware(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:874
static NDIS_STATUS DcReadConfiguration(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:93
static NDIS_STATUS DcInitializeAdapterResources(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:674
VOID DcFreeAdapter(_In_ __drv_freesMem(Mem) PDC21X4_ADAPTER Adapter)
Definition: init.c:1022
static NDIS_STATUS DcInitializeAdapterLocation(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:783
static VOID DcCreateRxRing(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:530
static NDIS_STATUS DcAllocateMemory(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:601
NDIS_STATUS EXPORT NdisMRegisterInterrupt(OUT PNDIS_MINIPORT_INTERRUPT Interrupt, IN NDIS_HANDLE MiniportAdapterHandle, IN UINT InterruptVector, IN UINT InterruptLevel, IN BOOLEAN RequestIsr, IN BOOLEAN SharedInterrupt, IN NDIS_INTERRUPT_MODE InterruptMode)
Definition: io.c:941
ULONG EXPORT NdisGetSharedDataAlignment(VOID)
Definition: misc.c:502
#define ETH_LENGTH_OF_ADDRESS
Definition: efilter.h:16
@ Success
Definition: eventcreate.c:712
union Alignment_ Alignment
#define NdisInterruptLatched
Definition: ndis.h:921
#define NdisInitializeWorkItem(_WI_, _R_, _C_)
Definition: ndis.h:3197
unsigned int UINT
Definition: ndis.h:50
#define NDIS_ATTRIBUTE_BUS_MASTER
Definition: ndis.h:586
#define NdisInterruptLevelSensitive
Definition: ndis.h:920
_Must_inspect_result_ _Out_ PNDIS_STATUS _Out_ PNDIS_STATUS _Out_ PNDIS_HANDLE _Out_ PUINT SelectedMediumIndex
Definition: ndis.h:6011
#define NDIS_ATTRIBUTE_DESERIALIZE
Definition: ndis.h:588
_Must_inspect_result_ _Out_ PNDIS_STATUS _Out_ PNDIS_STATUS _Out_ PNDIS_HANDLE _Out_ PUINT _In_ UINT MediumArraySize
Definition: ndis.h:6013
@ NdisInterfacePci
Definition: ndis.h:905
_Must_inspect_result_ _Out_ PNDIS_STATUS _Out_ PNDIS_HANDLE _In_ NDIS_HANDLE WrapperConfigurationContext
Definition: ndis.h:3946
_In_ NDIS_HANDLE MiniportAdapterHandle
Definition: ndis.h:4668
#define NDIS_STATUS_UNSUPPORTED_MEDIA
Definition: ndis.h:490
#define NDIS_ATTRIBUTE_USES_SAFE_BUFFER_APIS
Definition: ndis.h:592
#define NdisMoveMemory(Destination, Source, Length)
Definition: ndis.h:3896
#define CM_RESOURCE_INTERRUPT_LATCHED
Definition: cmtypes.h:144
VOID EXPORT NdisMSetAttributesEx(IN NDIS_HANDLE MiniportAdapterHandle, IN NDIS_HANDLE MiniportAdapterContext, IN UINT CheckForHangTimeInSeconds OPTIONAL, IN ULONG AttributeFlags, IN NDIS_INTERFACE_TYPE AdapterType)
Definition: miniport.c:2883
VOID EXPORT NdisMSleep(IN ULONG MicrosecondsToSleep)
Definition: miniport.c:2928
@ NdisMedium802_3
Definition: ntddndis.h:188
UCHAR CurrentMacAddress[ETH_LENGTH_OF_ADDRESS]
Definition: dc21x4.h:200
NDIS_HANDLE WrapperConfigurationHandle
Definition: dc21x4.h:159
ULONG AdapterSize
Definition: dc21x4.h:235
UCHAR ResetStreamLength
Definition: dc21x4.h:226
PVOID AdapterOriginal
Definition: dc21x4.h:242
UCHAR PermanentMacAddress[ETH_LENGTH_OF_ADDRESS]
Definition: dc21x4.h:199
ULONG InterruptLevel
Definition: dc21x4.h:233
ULONG InterruptFlags
Definition: dc21x4.h:234
USHORT ResetStream[SROM_MAX_STREAM_REGS]
Definition: dc21x4.h:227
NDIS_WORK_ITEM ResetWorkItem
Definition: dc21x4.h:237
ULONG Features
Definition: dc21x4.h:107
ULONG DefaultMedia
Definition: dc21x4.h:212
ULONG InterruptMask
Definition: dc21x4.h:104
ULONG LinkStateChangeMask
Definition: dc21x4.h:190
NDIS_HANDLE AdapterHandle
Definition: dc21x4.h:158
NDIS_MINIPORT_INTERRUPT Interrupt
Definition: dc21x4.h:231
ULONG InterruptVector
Definition: dc21x4.h:232
ULONG BusMode
Definition: dc21x4.h:211
NDIS_WORK_ITEM PowerWorkItem
Definition: dc21x4.h:236
NDIS_WORK_ITEM TxRecoveryWorkItem
Definition: dc21x4.h:238
ULONG Flags
Definition: dc21x4.h:119

Referenced by DriverEntry().

◆ DcInitializeAdapterLocation()

static NDIS_STATUS DcInitializeAdapterLocation ( _In_ PDC21X4_ADAPTER  Adapter)
static

Definition at line 783 of file init.c.

785{
788 ULONG PropertyValue, Length;
789
790 PAGED_CODE();
791
792 NdisMGetDeviceProperty(Adapter->AdapterHandle,
793 &Pdo,
794 NULL,
795 NULL,
796 NULL,
797 NULL);
798
801 sizeof(PropertyValue),
802 &PropertyValue,
803 &Length);
804 if (!NT_SUCCESS(Status))
805 return NDIS_STATUS_FAILURE;
806
807 /* We need this for PCI devices only ((DeviceNumber << 16) | Function) */
808 Adapter->DeviceNumber = (PropertyValue >> 16) & 0x000000FF;
809
812 sizeof(PropertyValue),
813 &Adapter->BusNumber,
814 &Length);
815 if (!NT_SUCCESS(Status))
816 return NDIS_STATUS_FAILURE;
817
818 return NDIS_STATUS_SUCCESS;
819}
LONG NTSTATUS
Definition: precomp.h:26
#define NT_SUCCESS(StatCode)
Definition: apphelp.c:32
#define NDIS_STATUS_FAILURE
Definition: ndis.h:465
VOID EXPORT NdisMGetDeviceProperty(IN NDIS_HANDLE MiniportAdapterHandle, IN OUT PDEVICE_OBJECT *PhysicalDeviceObject OPTIONAL, IN OUT PDEVICE_OBJECT *FunctionalDeviceObject OPTIONAL, IN OUT PDEVICE_OBJECT *NextDeviceObject OPTIONAL, IN OUT PCM_RESOURCE_LIST *AllocatedResources OPTIONAL, IN OUT PCM_RESOURCE_LIST *AllocatedResourcesTranslated OPTIONAL)
Definition: miniport.c:3112
_In_ ULONG _In_ ULONG _In_ ULONG Length
Definition: ntddpcm.h:102
NTSTATUS NTAPI IoGetDeviceProperty(IN PDEVICE_OBJECT DeviceObject, IN DEVICE_REGISTRY_PROPERTY DeviceProperty, IN ULONG BufferLength, OUT PVOID PropertyBuffer, OUT PULONG ResultLength)
Definition: pnpmgr.c:1382
WDF_EXTERN_C_START typedef _Must_inspect_result_ _In_ WDFDRIVER _In_opt_ PWDF_OBJECT_ATTRIBUTES _In_ PDEVICE_OBJECT _In_opt_ PDEVICE_OBJECT _In_opt_ PDEVICE_OBJECT Pdo
Definition: wdfminiport.h:72
@ DevicePropertyAddress
Definition: iotypes.h:1211
@ DevicePropertyBusNumber
Definition: iotypes.h:1209

Referenced by DcInitialize().

◆ DcInitializeAdapterResources()

static NDIS_STATUS DcInitializeAdapterResources ( _In_ PDC21X4_ADAPTER  Adapter)
static

Definition at line 674 of file init.c.

676{
678 PNDIS_RESOURCE_LIST AssignedResources = NULL;
680 PCM_PARTIAL_RESOURCE_DESCRIPTOR InterruptDescriptor = NULL;
681 UINT i, ResourceListSize = 0;
682
683 PAGED_CODE();
684
686 Adapter->WrapperConfigurationHandle,
687 AssignedResources,
688 &ResourceListSize);
690 return NDIS_STATUS_FAILURE;
691
692 Status = NdisAllocateMemoryWithTag((PVOID*)&AssignedResources,
693 ResourceListSize,
694 DC21X4_TAG);
696 return Status;
697
699 Adapter->WrapperConfigurationHandle,
700 AssignedResources,
701 &ResourceListSize);
703 goto Cleanup;
704
705 for (i = 0; i < AssignedResources->Count; ++i)
706 {
708
709 Descriptor = &AssignedResources->PartialDescriptors[i];
710 switch (Descriptor->Type)
711 {
714 {
715 if (!IoDescriptor && (Descriptor->u.Port.Length == DC_IO_LENGTH))
716 IoDescriptor = Descriptor;
717 break;
718 }
719
721 {
722 if (!InterruptDescriptor)
723 InterruptDescriptor = Descriptor;
724 break;
725 }
726
727 default:
728 break;
729 }
730 }
731
732 if (!IoDescriptor || !InterruptDescriptor)
733 {
735 goto Cleanup;
736 }
737
738 Adapter->InterruptVector = InterruptDescriptor->u.Interrupt.Vector;
739 Adapter->InterruptLevel = InterruptDescriptor->u.Interrupt.Level;
740 Adapter->InterruptFlags = InterruptDescriptor->Flags;
741 if (InterruptDescriptor->ShareDisposition == CmResourceShareShared)
742 Adapter->Flags |= DC_IRQ_SHARED;
743
744 Adapter->IoBaseAddress = IoDescriptor->u.Port.Start;
745
746 if ((IoDescriptor->Type == CmResourceTypePort) &&
747 (IoDescriptor->Flags & CM_RESOURCE_PORT_IO))
748 {
749 Status = NdisMRegisterIoPortRange((PVOID*)&Adapter->IoBase,
750 Adapter->AdapterHandle,
751 Adapter->IoBaseAddress.LowPart,
753 }
754 else
755 {
756 Status = NdisMMapIoSpace((PVOID*)&Adapter->IoBase,
757 Adapter->AdapterHandle,
758 Adapter->IoBaseAddress,
760
761 Adapter->Flags |= DC_IO_MAPPED;
762 }
764 goto Cleanup;
765
766 INFO("IO Base %p\n", Adapter->IoBase);
767 INFO("IRQ Level %u, Vector %u\n",
768 Adapter->InterruptLevel,
769 Adapter->InterruptVector);
770 INFO("IRQ ShareDisposition %u, InterruptFlags %lx\n",
771 InterruptDescriptor->ShareDisposition,
772 InterruptDescriptor->Flags);
773
774Cleanup:
775 NdisFreeMemory(AssignedResources, ResourceListSize, 0);
776
777 return Status;
778}
static const WCHAR Cleanup[]
Definition: register.c:80
VOID EXPORT NdisMQueryAdapterResources(OUT PNDIS_STATUS Status, IN NDIS_HANDLE WrapperConfigurationContext, OUT PNDIS_RESOURCE_LIST ResourceList, IN OUT PUINT BufferSize)
Definition: hardware.c:103
NDIS_STATUS EXPORT NdisMMapIoSpace(OUT PVOID *VirtualAddress, IN NDIS_HANDLE MiniportAdapterHandle, IN NDIS_PHYSICAL_ADDRESS PhysicalAddress, IN UINT Length)
Definition: io.c:774
NDIS_STATUS EXPORT NdisMRegisterIoPortRange(OUT PVOID *PortOffset, IN NDIS_HANDLE MiniportAdapterHandle, IN UINT InitialPort, IN UINT NumberOfPorts)
Definition: io.c:1018
#define CmResourceTypeMemory
Definition: hwresource.cpp:125
#define CmResourceTypePort
Definition: hwresource.cpp:123
#define CmResourceTypeInterrupt
Definition: hwresource.cpp:124
#define CM_RESOURCE_PORT_IO
Definition: cmtypes.h:109
union _CM_PARTIAL_RESOURCE_DESCRIPTOR::@393 u
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@393::@396 Interrupt
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@393::@395 Port
CM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptors[1]
Definition: hwresource.cpp:119
_Must_inspect_result_ _In_ WDFIORESLIST _In_ PIO_RESOURCE_DESCRIPTOR Descriptor
Definition: wdfresource.h:342
@ CmResourceShareShared
Definition: cmtypes.h:243

Referenced by DcInitialize().

◆ DcInitRxRing()

VOID DcInitRxRing ( _In_ PDC21X4_ADAPTER  Adapter)

Definition at line 574 of file init.c.

576{
577 PDC_RBD Rbd;
578 ULONG i;
579
580 PAGED_CODE();
581
582 Rbd = Adapter->HeadRbd;
583 Adapter->CurrentRbd = Rbd;
584
585 for (i = 0; i < Adapter->RcbCount; ++i)
586 {
589
590 ++Rbd;
591 }
592 Rbd = Rbd - 1;
594
595 ASSERT(Rbd == Adapter->TailRbd);
596}

Referenced by DcSetupAdapter().

◆ DcInitTestPacket()

static VOID DcInitTestPacket ( _In_ PDC21X4_ADAPTER  Adapter)
static

Definition at line 644 of file init.c.

646{
647 ULONG i;
648
649 PAGED_CODE();
650
651 for (i = 0; i < DC_LOOPBACK_FRAMES; ++i)
652 {
653 PETH_HEADER PacketBuffer = Adapter->LoopbackFrame[i];
654
656
657 /* Destination MAC address */
658 NdisMoveMemory(PacketBuffer->Destination,
659 Adapter->CurrentMacAddress,
661
662 /* Source MAC address */
663 NdisMoveMemory(PacketBuffer->Source,
664 Adapter->CurrentMacAddress,
666
667 ++PacketBuffer;
668 }
669}
UCHAR Destination[ETH_LENGTH_OF_ADDRESS]
Definition: util.h:13
UCHAR Source[ETH_LENGTH_OF_ADDRESS]
Definition: util.h:14

Referenced by DcInitialize().

◆ DcInitTxRing()

VOID DcInitTxRing ( _In_ PDC21X4_ADAPTER  Adapter)

Definition at line 499 of file init.c.

501{
502 PDC_TCB Tcb;
503 PDC_TBD Tbd;
504
505 PAGED_CODE();
506
507 InitializeListHead(&Adapter->SendQueueList);
508
509 Tcb = Adapter->HeadTcb;
510
511 Adapter->CurrentTcb = Tcb;
512 Adapter->LastTcb = Tcb;
513
514 Adapter->TcbSlots = DC_TRANSMIT_BLOCKS - DC_TCB_RESERVE;
515 Adapter->TbdSlots = DC_TRANSMIT_DESCRIPTORS - DC_TBD_RESERVE;
516 Adapter->LoopbackFrameSlots = DC_LOOPBACK_FRAMES;
517 Adapter->TcbCompleted = 0;
518
519 Tbd = Adapter->HeadTbd;
520 Adapter->CurrentTbd = Tbd;
521
522 NdisZeroMemory(Tbd, sizeof(*Tbd) * DC_TRANSMIT_DESCRIPTORS);
523
524 Adapter->TailTbd->Control |= DC_TBD_CONTROL_END_OF_RING;
525}
#define DC_TCB_RESERVE
Definition: dc21x4.h:57
#define DC_TBD_RESERVE
Definition: dc21x4.h:56
#define DC_TBD_CONTROL_END_OF_RING
Definition: dc21x4hw.h:82
#define InitializeListHead(ListHead)
Definition: env_spec_w32.h:944

Referenced by DcSetupAdapter().

◆ DcReadConfiguration()

static NDIS_STATUS DcReadConfiguration ( _In_ PDC21X4_ADAPTER  Adapter)
static

Definition at line 93 of file init.c.

95{
100 ULONG GenericUlong;
101
102 PAGED_CODE();
103
106 Adapter->WrapperConfigurationHandle);
108 return Status;
109
111 L"SpeedDuplex",
112 &GenericUlong,
114 MEDIA_10T,
115 MEDIA_HMR);
116 Adapter->DefaultMedia = GenericUlong;
117
120 &Length,
123 {
128 {
129 ERR("Invalid software MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n",
135 NetworkAddress[5]);
136 }
137 else
138 {
139 INFO("Using software MAC address\n");
140
141 /* Override the MAC address */
142 NdisMoveMemory(Adapter->CurrentMacAddress, NetworkAddress, ETH_LENGTH_OF_ADDRESS);
143 }
144 }
145
147
148 return NDIS_STATUS_SUCCESS;
149}
static VOID DcConfigQueryInteger(_In_ NDIS_HANDLE ConfigurationHandle, _In_ PCWSTR EntryName, _Out_ PULONG EntryContext, _In_ ULONG DefaultValue, _In_ ULONG Minimum, _In_ ULONG Maximum)
Definition: init.c:47
#define ETH_IS_LOCALLY_ADMINISTERED(Address)
Definition: util.h:19
#define ETH_IS_EMPTY(Address)
Definition: util.h:22
VOID EXPORT NdisCloseConfiguration(IN NDIS_HANDLE ConfigurationHandle)
Definition: config.c:136
VOID EXPORT NdisReadNetworkAddress(OUT PNDIS_STATUS Status, OUT PVOID *NetworkAddress, OUT PUINT NetworkAddressLength, IN NDIS_HANDLE ConfigurationHandle)
Definition: config.c:740
VOID EXPORT NdisOpenConfiguration(OUT PNDIS_STATUS Status, OUT PNDIS_HANDLE ConfigurationHandle, IN NDIS_HANDLE WrapperConfigurationContext)
Definition: config.c:197
#define MEDIA_AUTO
Definition: media.h:62
#define MEDIA_10T
Definition: media.h:46
#define MEDIA_HMR
Definition: media.h:56
_Must_inspect_result_ _Out_ PNDIS_STATUS _Outptr_result_bytebuffer_to_ NetworkAddressLength PVOID * NetworkAddress
Definition: ndis.h:3956
#define L(x)
Definition: ntvdm.h:50
unsigned char * PUCHAR
Definition: typedefs.h:53
#define ETH_IS_BROADCAST(Address)
Definition: xfilter.h:32
#define ETH_IS_MULTICAST(Address)
Definition: xfilter.h:37

Referenced by DcInitialize().

◆ DcRecognizeHardware()

static NDIS_STATUS DcRecognizeHardware ( _In_ PDC21X4_ADAPTER  Adapter)
static

Definition at line 874 of file init.c.

876{
878 PPCI_COMMON_CONFIG PciConfig = (PPCI_COMMON_CONFIG)Buffer; // Partial PCI header
879 PNDIS_TIMER_FUNCTION MediaMonitorRoutine;
880 ULONG Bytes;
881
882 PAGED_CODE();
883
884 Bytes = NdisReadPciSlotInformation(Adapter->AdapterHandle,
885 0,
887 Buffer,
888 sizeof(Buffer));
889 if (Bytes != sizeof(Buffer))
890 return NDIS_STATUS_FAILURE;
891
892 Adapter->DeviceId = PciConfig->DeviceID;
893 Adapter->RevisionId = PciConfig->RevisionID;
894
895 switch ((PciConfig->DeviceID << 16) | PciConfig->VendorID)
896 {
898 {
899 Adapter->ChipType = DC21040;
900 Adapter->InterruptMask = DC_GENERIC_IRQ_MASK | DC_IRQ_LINK_FAIL;
901 Adapter->LinkStateChangeMask = DC_IRQ_LINK_FAIL;
902 Adapter->HandleLinkStateChange = MediaLinkStateChange21040;
903 MediaMonitorRoutine = MediaMonitor21040Dpc;
904 break;
905 }
906
908 {
909 Adapter->ChipType = DC21041;
910 Adapter->Features |= DC_HAS_POWER_SAVING | DC_HAS_TIMER;
911 Adapter->InterruptMask = DC_GENERIC_IRQ_MASK | DC_IRQ_LINK_PASS | DC_IRQ_LINK_FAIL;
912 Adapter->LinkStateChangeMask = DC_IRQ_LINK_PASS | DC_IRQ_LINK_FAIL;
913 Adapter->HandleLinkStateChange = MediaLinkStateChange21041;
914 MediaMonitorRoutine = MediaMonitor21041Dpc;
915 break;
916 }
917
919 {
920 Adapter->ChipType = DC21140;
921 Adapter->Features |= DC_HAS_TIMER;
922
923 if ((PciConfig->RevisionID & 0xF0) < 0x20)
924 {
925 /* 21140 */
926 Adapter->Features |= DC_PERFECT_FILTERING_ONLY;
927 }
928 else
929 {
930 /* 21140A */
933 }
934
935 Adapter->OpMode |= DC_OPMODE_PORT_ALWAYS;
936 Adapter->InterruptMask = DC_GENERIC_IRQ_MASK;
937 MediaMonitorRoutine = MediaMonitor21140Dpc;
938 break;
939 }
940
942 {
943 Adapter->Features |= DC_NEED_RX_OVERFLOW_WORKAROUND | DC_SIA_GPIO |
945
946 Adapter->InterruptMask = DC_GENERIC_IRQ_MASK | DC_IRQ_LINK_PASS | DC_IRQ_LINK_FAIL;
947 Adapter->LinkStateChangeMask = DC_IRQ_LINK_PASS | DC_IRQ_LINK_FAIL;
948
949 Adapter->ChipType = DC21143;
950
951 if ((PciConfig->RevisionID & 0xF0) < 0x20)
952 {
953 /* 21142 */
954 }
955 else
956 {
957 /* 21143 */
958 Adapter->Features |= DC_ENABLE_PCI_COMMANDS;
959 Adapter->OpMode |= DC_OPMODE_PORT_ALWAYS;
960 Adapter->InterruptMask |= DC_IRQ_LINK_CHANGED;
961 Adapter->LinkStateChangeMask |= DC_IRQ_LINK_CHANGED;
962 }
963
964 /* 21143 -PD and -TD */
965 if ((PciConfig->RevisionID & 0xF0) > 0x30)
966 Adapter->Features |= DC_HAS_POWER_MANAGEMENT;
967
968 Adapter->HandleLinkStateChange = MediaLinkStateChange21143;
969 MediaMonitorRoutine = MediaMonitor21143Dpc;
970 break;
971 }
972
974 {
975 Adapter->ChipType = DC21145;
976
977 Adapter->Features |= DC_NEED_RX_OVERFLOW_WORKAROUND | DC_SIA_GPIO |
981
982 Adapter->OpMode |= DC_OPMODE_PORT_ALWAYS;
983 Adapter->InterruptMask = DC_GENERIC_IRQ_MASK | DC_IRQ_LINK_CHANGED |
985 Adapter->LinkStateChangeMask = DC_IRQ_LINK_CHANGED |
987 Adapter->HandleLinkStateChange = MediaLinkStateChange21143;
988 MediaMonitorRoutine = MediaMonitor21143Dpc;
989
990 Adapter->AnalogControl = DC_HPNA_ANALOG_CTRL;
991
992 /* Workaround for internal RX errata */
993 Adapter->HpnaRegister[HPNA_NOISE_FLOOR] = 0x10;
994 Adapter->HpnaInitBitmap = (1 << HPNA_NOISE_FLOOR);
995 break;
996 }
997
998 default:
1000 }
1001
1002 Adapter->BusMode = DcGetBusModeParameters(Adapter, PciConfig);
1003
1004 INFO("Bus Mode %08lx\n", Adapter->BusMode);
1005
1006 /* Errata: hash filtering is broken on some chips */
1007 if (Adapter->Features & DC_PERFECT_FILTERING_ONLY)
1008 Adapter->MulticastMaxEntries = DC_SETUP_FRAME_ADDRESSES;
1009 else
1010 Adapter->MulticastMaxEntries = DC_MULTICAST_LIST_SIZE;
1011
1012 NdisMInitializeTimer(&Adapter->MediaMonitorTimer,
1013 Adapter->AdapterHandle,
1014 MediaMonitorRoutine,
1015 Adapter);
1016
1017 return NDIS_STATUS_SUCCESS;
1018}
Definition: bufpool.h:45
#define DC_SIA_GPIO
Definition: dc21x4.h:109
#define DC_NEED_RX_OVERFLOW_WORKAROUND
Definition: dc21x4.h:108
MEDIA_HANDLE_LINK_STATE_CHANGE MediaLinkStateChange21143
Definition: dc21x4.h:504
NDIS_TIMER_FUNCTION MediaMonitor21041Dpc
Definition: dc21x4.h:498
#define DC_MULTICAST_LIST_SIZE
Definition: dc21x4.h:34
#define DC_MII_AUTOSENSE
Definition: dc21x4.h:116
NDIS_TIMER_FUNCTION MediaMonitor21143Dpc
Definition: dc21x4.h:500
#define DC_SIA_ANALOG_CONTROL
Definition: dc21x4.h:110
NDIS_TIMER_FUNCTION MediaMonitor21140Dpc
Definition: dc21x4.h:499
NDIS_TIMER_FUNCTION MediaMonitor21040Dpc
Definition: dc21x4.h:497
#define DC_PERFECT_FILTERING_ONLY
Definition: dc21x4.h:114
MEDIA_HANDLE_LINK_STATE_CHANGE MediaLinkStateChange21041
Definition: dc21x4.h:503
MEDIA_HANDLE_LINK_STATE_CHANGE MediaLinkStateChange21040
Definition: dc21x4.h:502
#define DC_HAS_POWER_SAVING
Definition: dc21x4.h:112
#define DC_HAS_TIMER
Definition: dc21x4.h:117
#define DC_DEV_INTEL_21143
Definition: dc21x4hw.h:25
@ DC21145
Definition: dc21x4hw.h:16
@ DC21140
Definition: dc21x4hw.h:14
@ DC21041
Definition: dc21x4hw.h:13
@ DC21040
Definition: dc21x4hw.h:12
@ DC21143
Definition: dc21x4hw.h:15
#define DC_DEV_DECCHIP_21140
Definition: dc21x4hw.h:24
#define HPNA_NOISE_FLOOR
Definition: dc21x4hw.h:538
#define DC_HPNA_ANALOG_CTRL
Definition: dc21x4hw.h:515
#define DC_DEV_DECCHIP_21040
Definition: dc21x4hw.h:22
#define DC_DEV_INTEL_21145
Definition: dc21x4hw.h:26
#define DC_GENERIC_IRQ_MASK
Definition: dc21x4hw.h:508
#define DC_DEV_DECCHIP_21041
Definition: dc21x4hw.h:23
#define DC_OPMODE_PORT_ALWAYS
Definition: dc21x4hw.h:340
#define DC_SETUP_FRAME_ADDRESSES
Definition: dc21x4hw.h:41
static ULONG DcGetBusModeParameters(_In_ PDC21X4_ADAPTER Adapter, _In_ PPCI_COMMON_CONFIG PciData)
Definition: init.c:824
ULONG EXPORT NdisReadPciSlotInformation(IN NDIS_HANDLE NdisAdapterHandle, IN ULONG SlotNumber, IN ULONG Offset, IN PVOID Buffer, IN ULONG Length)
Definition: hardware.c:180
VOID EXPORT NdisMInitializeTimer(IN OUT PNDIS_MINIPORT_TIMER Timer, IN NDIS_HANDLE MiniportAdapterHandle, IN PNDIS_TIMER_FUNCTION TimerFunction, IN PVOID FunctionContext)
Definition: time.c:192
_In_ UINT Bytes
Definition: mmcopy.h:9
#define NDIS_STATUS_NOT_RECOGNIZED
Definition: ndis.h:348
NDIS_TIMER_FUNCTION * PNDIS_TIMER_FUNCTION
Definition: ndis.h:640
#define RTL_SIZEOF_THROUGH_FIELD(type, field)
Definition: ntbasedef.h:672
#define FIELD_OFFSET(t, f)
Definition: typedefs.h:255
struct _PCI_COMMON_CONFIG * PPCI_COMMON_CONFIG
unsigned char UCHAR
Definition: xmlstorage.h:181

Referenced by DcInitialize().