ReactOS 0.4.15-dev-7931-gfd331f1
hardware.c
Go to the documentation of this file.
1/*
2 * PROJECT: ReactOS DC21x4 Driver
3 * LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
4 * PURPOSE: Hardware specific functions
5 * COPYRIGHT: Copyright 2023 Dmitry Borisov <di.sean@protonmail.com>
6 */
7
8/* INCLUDES *******************************************************************/
9
10#include "dc21x4.h"
11
12#include <debug.h>
13
14/* FUNCTIONS ******************************************************************/
15
16VOID
18 _In_ PDC21X4_ADAPTER Adapter)
19{
20 ULONG OpMode;
21
22 /* Disable interrupts */
23 DC_WRITE(Adapter, DcCsr7_IrqMask, 0);
24
25 /* Stop DMA */
26 OpMode = Adapter->OpMode;
28 DC_WRITE(Adapter, DcCsr6_OpMode, OpMode);
29
30 /* Put the adapter to snooze mode */
31 DcPowerSave(Adapter, TRUE);
32
33 /* Perform a software reset */
35}
36
37VOID
39 _In_ PDC21X4_ADAPTER Adapter)
40{
41 ULONG i, OpMode, Status;
42
43 OpMode = Adapter->OpMode;
45 DC_WRITE(Adapter, DcCsr6_OpMode, OpMode);
46
47 for (i = 0; i < 5000; ++i)
48 {
49 Status = DC_READ(Adapter, DcCsr5_Status);
50
53 {
54 return;
55 }
56
58 }
59
60 WARN("Failed to stop the TX/RX process 0x%08lx\n", Status);
61}
62
63VOID
65 _In_ PDC21X4_ADAPTER Adapter,
67{
69
70 /* Some chips don't have a separate GPIO register */
71 if (Adapter->Features & DC_SIA_GPIO)
72 {
73 Data = Adapter->SiaSetting;
74 Data &= 0x0000FFFF; /* SIA */
75 Data |= Value << 16; /* GPIO */
76 Adapter->SiaSetting = Data;
77
79 }
80 else
81 {
82 Data = Value;
84 }
85 DC_WRITE(Adapter, Register, Data);
86}
87
88VOID
90 _In_ PDC21X4_ADAPTER Adapter,
91 _In_ ULONG Csr13,
92 _In_ ULONG Csr14,
93 _In_ ULONG Csr15)
94{
95 ULONG SiaConn, SiaGen;
96
97 TRACE("CSR13 %08lx, CSR14 %08lx, CSR15 %08lx\n", Csr13, Csr14, Csr15);
98
99 SiaConn = 0;
100
101 /* The 21145 comes with 16 new bits in CSR13 */
102 if (Adapter->Features & DC_SIA_ANALOG_CONTROL)
103 {
104 SiaConn = Adapter->AnalogControl;
105 }
106
107 /* Reset the transceiver */
110
111 /* Some chips don't have a separate GPIO register */
112 if (Adapter->Features & DC_SIA_GPIO)
113 {
114 SiaGen = Adapter->SiaSetting;
115 SiaGen &= 0xFFFF0000; /* GPIO */
116 SiaGen |= Csr15; /* SIA */
117 Adapter->SiaSetting = SiaGen;
118 }
119 else
120 {
121 SiaGen = Csr15;
122 }
123
124 DC_WRITE(Adapter, DcCsr14_SiaTxRx, Csr14);
125 DC_WRITE(Adapter, DcCsr15_SiaGeneral, SiaGen);
126
127 /* Don't reset the transceiver twice */
128 if (Csr13 == DC_SIA_CONN_RESET)
129 return;
130
131 DC_WRITE(Adapter, DcCsr13_SiaConnectivity, SiaConn | Csr13);
132}
133
134VOID
136 _In_ PDC21X4_ADAPTER Adapter)
137{
138 PDC_TCB Tcb;
139 PDC_TBD Tbd;
140 ULONG FrameNumber;
141
142 Adapter->MediaTestStatus = FALSE;
143 Adapter->ModeFlags |= DC_MODE_TEST_PACKET;
144
145 if (!Adapter->LoopbackFrameSlots)
146 {
147 ERR("Failed to complete test packets, CSR12 %08lx, CSR5 %08lx\n",
148 DC_READ(Adapter, DcCsr12_SiaStatus),
149 DC_READ(Adapter, DcCsr5_Status));
150
151 /* Try to recover the lost TX buffers */
152 NdisScheduleWorkItem(&Adapter->TxRecoveryWorkItem);
153 return;
154 }
155
156 --Adapter->LoopbackFrameSlots;
157
158 FrameNumber = (Adapter->LoopbackFrameNumber++) % DC_LOOPBACK_FRAMES;
159
160 Tbd = Adapter->CurrentTbd;
161 Adapter->CurrentTbd = DC_NEXT_TBD(Adapter, Tbd);
162
163 Tcb = Adapter->CurrentTcb;
164 Adapter->CurrentTcb = DC_NEXT_TCB(Adapter, Tcb);
165
166 Tcb->Tbd = Tbd;
167 Tcb->Packet = NULL;
168
170
171 /* Put the loopback frame on the transmit ring */
172 Tbd->Address1 = Adapter->LoopbackFramePhys[FrameNumber];
173 Tbd->Address2 = 0;
181
182 /* Send the loopback packet to verify connectivity of a media */
184}
185
188 _In_ PDC21X4_ADAPTER Adapter,
189 _In_ BOOLEAN WaitForCompletion)
190{
191 PDC_TCB Tcb;
192 PDC_TBD Tbd;
193 ULONG i, Control;
194
195 Tbd = Adapter->CurrentTbd;
196
197 /* Ensure correct setup frame processing */
198 if (Tbd != Adapter->HeadTbd)
199 {
201
202 /* Put the null frame on the transmit ring */
204 Tbd->Address1 = 0;
205 Tbd->Address2 = 0;
208
209 Tbd = DC_NEXT_TBD(Adapter, Tbd);
210 }
211
212 Adapter->CurrentTbd = DC_NEXT_TBD(Adapter, Tbd);
213
214 Tcb = Adapter->CurrentTcb;
215 Adapter->CurrentTcb = DC_NEXT_TCB(Adapter, Tcb);
216
217 Tcb->Tbd = Tbd;
218 Tcb->Packet = NULL;
219
221
222 /* Prepare the setup frame */
223 Tbd->Address1 = Adapter->SetupFramePhys;
224 Tbd->Address2 = 0;
227 if (!WaitForCompletion)
229 if (Adapter->ProgramHashPerfectFilter)
231 Tbd->Control |= Control;
234
236
237 if (!WaitForCompletion)
238 return TRUE;
239
240 /* Wait up to 500 ms for the chip to process the setup frame */
241 for (i = 50000; i > 0; --i)
242 {
244
246 if (!(Tbd->Status & DC_TBD_STATUS_OWNED))
247 break;
248 }
249 if (i == 0)
250 {
251 ERR("Failed to complete setup frame %08lx\n", Tbd->Status);
252 return FALSE;
253 }
254
255 return TRUE;
256}
257
258CODE_SEG("PAGE")
259VOID
261 _In_ PDC21X4_ADAPTER Adapter)
262{
263 PULONG SetupFrame, SetupFrameStart;
264 PUSHORT MacAddress;
265 ULONG i;
266
267 PAGED_CODE();
268
269 SetupFrame = Adapter->SetupFrame;
270
271 /* Add the physical address entry */
272 MacAddress = (PUSHORT)Adapter->CurrentMacAddress;
273 *SetupFrame++ = DC_SETUP_FRAME_ENTRY(MacAddress[0]);
274 *SetupFrame++ = DC_SETUP_FRAME_ENTRY(MacAddress[1]);
275 *SetupFrame++ = DC_SETUP_FRAME_ENTRY(MacAddress[2]);
276
277 /* Pad to 16 addresses */
278 SetupFrameStart = Adapter->SetupFrame;
280 {
281 *SetupFrame++ = SetupFrameStart[0];
282 *SetupFrame++ = SetupFrameStart[1];
283 *SetupFrame++ = SetupFrameStart[2];
284 }
285}
286
287static
288VOID
290 _In_ PDC21X4_ADAPTER Adapter)
291{
292 PULONG SetupFrame, SetupFrameStart;
293 PUSHORT MacAddress;
294 ULONG i;
295
296 SetupFrame = Adapter->SetupFrame;
297
298 /* Add the physical address entry */
299 MacAddress = (PUSHORT)Adapter->CurrentMacAddress;
300 *SetupFrame++ = DC_SETUP_FRAME_ENTRY(MacAddress[0]);
301 *SetupFrame++ = DC_SETUP_FRAME_ENTRY(MacAddress[1]);
302 *SetupFrame++ = DC_SETUP_FRAME_ENTRY(MacAddress[2]);
303
304 /* Store multicast addresses */
305 for (i = 0; i < Adapter->MulticastCount; ++i)
306 {
307 MacAddress = (PUSHORT)Adapter->MulticastList[i].MacAddress;
308
309 *SetupFrame++ = DC_SETUP_FRAME_ENTRY(MacAddress[0]);
310 *SetupFrame++ = DC_SETUP_FRAME_ENTRY(MacAddress[1]);
311 *SetupFrame++ = DC_SETUP_FRAME_ENTRY(MacAddress[2]);
312 }
313
314 ++i;
315
316 /* Add the broadcast address entry */
317 if (Adapter->PacketFilter & NDIS_PACKET_TYPE_BROADCAST)
318 {
319 *SetupFrame++ = DC_SETUP_FRAME_ENTRY(0x0000FFFF);
320 *SetupFrame++ = DC_SETUP_FRAME_ENTRY(0x0000FFFF);
321 *SetupFrame++ = DC_SETUP_FRAME_ENTRY(0x0000FFFF);
322
323 ++i;
324 }
325
326 /* Pad to 16 addresses */
327 SetupFrameStart = Adapter->SetupFrame;
329 {
330 *SetupFrame++ = SetupFrameStart[0];
331 *SetupFrame++ = SetupFrameStart[1];
332 *SetupFrame++ = SetupFrameStart[2];
333
334 ++i;
335 }
336}
337
338static
339VOID
341 _In_ PDC21X4_ADAPTER Adapter)
342{
343 PULONG SetupFrame = Adapter->SetupFrame;
344 PUSHORT MacAddress;
345 ULONG Hash, i;
346
348
349 /* Fill up the 512-bit multicast hash table */
350 for (i = 0; i < Adapter->MulticastCount; ++i)
351 {
352 MacAddress = (PUSHORT)Adapter->MulticastList[i].MacAddress;
353
354 /* Only need lower 9 bits of the hash */
356 Hash &= 512 - 1;
357 SetupFrame[Hash / 16] |= 1 << (Hash % 16);
358 }
359
360 /* Insert the broadcast address hash to the bin */
361 if (Adapter->PacketFilter & NDIS_PACKET_TYPE_BROADCAST)
362 {
364 SetupFrame[Hash / 16] |= 1 << (Hash % 16);
365 }
366
367 /* Add the physical address entry */
368 MacAddress = (PUSHORT)Adapter->CurrentMacAddress;
369 SetupFrame[39] = DC_SETUP_FRAME_ENTRY(MacAddress[0]);
370 SetupFrame[40] = DC_SETUP_FRAME_ENTRY(MacAddress[1]);
371 SetupFrame[41] = DC_SETUP_FRAME_ENTRY(MacAddress[2]);
372}
373
376 _In_ PDC21X4_ADAPTER Adapter)
377{
378 BOOLEAN UsePerfectFiltering;
379
380 /* If more than 14 addresses are requested, switch to hash filtering mode */
381 UsePerfectFiltering = (Adapter->MulticastCount <= DC_SETUP_FRAME_ADDRESSES);
382
383 Adapter->ProgramHashPerfectFilter = UsePerfectFiltering;
384 Adapter->OidPending = TRUE;
385
386 if (UsePerfectFiltering)
388 else
390
391 NdisAcquireSpinLock(&Adapter->SendLock);
392
393 DcSetupFrameDownload(Adapter, FALSE);
394
395 NdisReleaseSpinLock(&Adapter->SendLock);
396
397 return NDIS_STATUS_PENDING;
398}
399
402 _In_ PDC21X4_ADAPTER Adapter,
403 _In_ ULONG PacketFilter)
404{
405 ULONG OpMode, OldPacketFilter;
406
407 INFO("Packet filter value 0x%lx\n", PacketFilter);
408
409 NdisAcquireSpinLock(&Adapter->ModeLock);
410
411 /* Update the filtering mode */
412 OpMode = Adapter->OpMode;
414 if (PacketFilter & NDIS_PACKET_TYPE_PROMISCUOUS)
415 {
416 OpMode |= DC_OPMODE_RX_PROMISCUOUS;
417 }
418 else if (PacketFilter & NDIS_PACKET_TYPE_ALL_MULTICAST)
419 {
421 }
422 Adapter->OpMode = OpMode;
423 DC_WRITE(Adapter, DcCsr6_OpMode, OpMode);
424
425 NdisReleaseSpinLock(&Adapter->ModeLock);
426
427 OldPacketFilter = Adapter->PacketFilter;
428 Adapter->PacketFilter = PacketFilter;
429
430 /* Program the NIC to receive or reject broadcast frames */
431 if ((OldPacketFilter ^ PacketFilter) & NDIS_PACKET_TYPE_BROADCAST)
432 {
433 return DcUpdateMulticastList(Adapter);
434 }
435
436 return NDIS_STATUS_SUCCESS;
437}
438
439static
440CODE_SEG("PAGE")
441VOID
443 _In_ PDC21X4_ADAPTER Adapter)
444{
445 PAGED_CODE();
446
447 /* Linux driver does this */
448 if (Adapter->Features & DC_HAS_MII)
449 {
450 /* Select the MII/SYM port */
452 }
453
454 /* Perform a software reset */
456 NdisMSleep(100);
457 DC_WRITE(Adapter, DcCsr0_BusMode, Adapter->BusMode);
458}
459
460CODE_SEG("PAGE")
463 _In_ PDC21X4_ADAPTER Adapter)
464{
465 PAGED_CODE();
466
467 DcInitTxRing(Adapter);
468 DcInitRxRing(Adapter);
469
470 /* Initial values */
471 if (!MEDIA_IS_FIXED(Adapter))
472 {
473 Adapter->LinkSpeedMbps = 10;
474 }
475 Adapter->MediaNumber = Adapter->DefaultMedia;
478
479 DcSoftReset(Adapter);
480
481 /* Receive descriptor ring buffer */
482 DC_WRITE(Adapter, DcCsr3_RxRingAddress, Adapter->RbdPhys);
483
484 /* Transmit descriptor ring buffer */
485 DC_WRITE(Adapter, DcCsr4_TxRingAddress, Adapter->TbdPhys);
486
487 switch (Adapter->ChipType)
488 {
489 case DC21040:
490 {
491 DcWriteSia(Adapter,
492 Adapter->Media[Adapter->MediaNumber].Csr13,
493 Adapter->Media[Adapter->MediaNumber].Csr14,
494 Adapter->Media[Adapter->MediaNumber].Csr15);
495
496 /* Explicitly specifed by user */
497 if (Adapter->MediaNumber == MEDIA_10T_FD)
498 {
499 Adapter->OpMode |= DC_OPMODE_FULL_DUPLEX;
500 }
501 break;
502 }
503
504 case DC21041:
505 {
506 MediaSiaSelect(Adapter);
507 break;
508 }
509
510 case DC21140:
511 {
512 if (Adapter->MediaNumber == MEDIA_MII)
513 {
514 MediaSelectMiiPort(Adapter, !(Adapter->Flags & DC_FIRST_SETUP));
515 MediaMiiSelect(Adapter);
516 }
517 else
518 {
519 /* All media use the same GPIO directon */
520 DC_WRITE(Adapter, DcCsr12_Gpio, Adapter->Media[Adapter->MediaNumber].GpioCtrl);
522
523 MediaGprSelect(Adapter);
524 }
525 break;
526 }
527
528 case DC21143:
529 case DC21145:
530 {
531 /* Init the HPNA PHY */
532 if ((Adapter->MediaBitmap & (1 << MEDIA_HMR)) && Adapter->HpnaInitBitmap)
533 {
534 HpnaPhyInit(Adapter);
535 }
536
537 if (Adapter->MediaNumber == MEDIA_MII)
538 {
539 MediaSelectMiiPort(Adapter, !(Adapter->Flags & DC_FIRST_SETUP));
540 MediaMiiSelect(Adapter);
541 break;
542 }
543
544 /* If the current media is FX, assume we have a link */
545 if (MEDIA_IS_FX(Adapter->MediaNumber))
546 {
547 Adapter->LinkUp = TRUE;
548
549 NdisMIndicateStatus(Adapter->AdapterHandle,
551 NULL,
552 0);
553 NdisMIndicateStatusComplete(Adapter->AdapterHandle);
554 }
555
556 MediaSiaSelect(Adapter);
557 break;
558 }
559
560 default:
561 ASSERT(FALSE);
563 break;
564 }
565
566 /* Start the TX process */
567 Adapter->OpMode |= DC_OPMODE_TX_ENABLE;
568 DC_WRITE(Adapter, DcCsr6_OpMode, Adapter->OpMode);
569
570 /* Load the address recognition RAM */
571 if (!DcSetupFrameDownload(Adapter, TRUE))
572 {
573 /* This normally should not happen */
574 ASSERT(FALSE);
575
576 NdisWriteErrorLogEntry(Adapter->AdapterHandle,
578 1,
579 __LINE__);
580
582 }
583
584 return NDIS_STATUS_SUCCESS;
585}
#define PAGED_CODE()
#define CODE_SEG(...)
unsigned char BOOLEAN
#define WARN(fmt,...)
Definition: debug.h:112
#define ERR(fmt,...)
Definition: debug.h:110
ULONG DcEthernetCrc(_In_reads_bytes_(Size) const VOID *Buffer, _In_ ULONG Size)
Definition: dc21x4.c:17
#define DC_SIA_GPIO
Definition: dc21x4.h:109
VOID DcPowerSave(_In_ PDC21X4_ADAPTER Adapter, _In_ BOOLEAN Enable)
Definition: power.c:225
VOID MediaSelectMiiPort(_In_ PDC21X4_ADAPTER Adapter, _In_ BOOLEAN ResetPhy)
Definition: media.c:215
#define DC_LOOPBACK_FRAMES
Definition: dc21x4.h:26
VOID MediaMiiSelect(_In_ PDC21X4_ADAPTER Adapter)
Definition: media.c:197
FORCEINLINE ULONG DC_READ(_In_ PDC21X4_ADAPTER Adapter, _In_ DC_CSR Register)
Definition: dc21x4.h:262
#define DC_FIRST_SETUP
Definition: dc21x4.h:123
VOID DcInitRxRing(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:574
#define DC_MODE_AUI_FAILED
Definition: dc21x4.h:166
#define DC_HAS_MII
Definition: dc21x4.h:113
#define DC_SIA_ANALOG_CONTROL
Definition: dc21x4.h:110
VOID HpnaPhyInit(_In_ PDC21X4_ADAPTER Adapter)
Definition: phy.c:194
#define DC_MODE_BNC_FAILED
Definition: dc21x4.h:167
VOID MediaGprSelect(_In_ PDC21X4_ADAPTER Adapter)
Definition: media.c:303
#define DC_MODE_PORT_AUTOSENSE
Definition: dc21x4.h:164
#define DC_MODE_TEST_PACKET
Definition: dc21x4.h:165
#define DC_LOOPBACK_FRAME_SIZE
Definition: dc21x4.h:53
VOID DcInitTxRing(_In_ PDC21X4_ADAPTER Adapter)
Definition: init.c:499
#define DC_WRITE(Adapter, Register, Value)
Definition: dc21x4.h:272
VOID MediaSiaSelect(_In_ PDC21X4_ADAPTER Adapter)
Definition: media.c:268
#define DC_MODE_AUTONEG_MASK
Definition: dc21x4.h:163
#define DC_OPMODE_FULL_DUPLEX
Definition: dc21x4hw.h:327
#define DC_OPMODE_TX_ENABLE
Definition: dc21x4hw.h:330
#define DC_SETUP_FRAME_PERFECT_FILTER_ADDRESSES
Definition: dc21x4hw.h:38
#define DC_OPMODE_RX_PROMISCUOUS
Definition: dc21x4hw.h:324
@ DC21145
Definition: dc21x4hw.h:16
@ DC21140
Definition: dc21x4hw.h:14
@ DC21041
Definition: dc21x4hw.h:13
@ DC21040
Definition: dc21x4hw.h:12
@ DC21143
Definition: dc21x4hw.h:15
#define DC_SETUP_FRAME_ENTRY(Value)
Definition: dc21x4hw.h:47
#define DC_SIA_CONN_RESET
Definition: dc21x4hw.h:449
#define DC_STATUS_RX_STATE_MASK
Definition: dc21x4hw.h:286
@ DcCsr14_SiaTxRx
Definition: dc21x4hw.h:190
@ DcCsr6_OpMode
Definition: dc21x4hw.h:180
@ DcCsr15_SiaGeneral
Definition: dc21x4hw.h:191
@ DcCsr0_BusMode
Definition: dc21x4hw.h:172
@ DcCsr4_TxRingAddress
Definition: dc21x4hw.h:178
@ DcCsr12_Gpio
Definition: dc21x4hw.h:187
@ DcCsr5_Status
Definition: dc21x4hw.h:179
@ DcCsr13_SiaConnectivity
Definition: dc21x4hw.h:189
@ DcCsr1_TxPoll
Definition: dc21x4hw.h:173
@ DcCsr12_SiaStatus
Definition: dc21x4hw.h:188
@ DcCsr7_IrqMask
Definition: dc21x4hw.h:181
@ DcCsr3_RxRingAddress
Definition: dc21x4hw.h:177
#define DC_TBD_STATUS_OWNED
Definition: dc21x4hw.h:71
#define DC_STATUS_TX_STATE_STOPPED
Definition: dc21x4hw.h:293
#define DC_TBD_CONTROL_REQUEST_INTERRUPT
Definition: dc21x4hw.h:87
#define DC_TBD_CONTROL_SETUP_FRAME
Definition: dc21x4hw.h:84
#define DC_TX_POLL_DOORBELL
Definition: dc21x4hw.h:244
#define DC_TBD_CONTROL_FIRST_FRAGMENT
Definition: dc21x4hw.h:85
#define DC_BUS_MODE_SOFT_RESET
Definition: dc21x4hw.h:197
#define DC_OPMODE_RX_ENABLE
Definition: dc21x4hw.h:319
#define DC_SETUP_FRAME_BROADCAST_HASH
Definition: dc21x4hw.h:44
#define DC_STATUS_RX_STATE_STOPPED
Definition: dc21x4hw.h:302
#define DC_TBD_CONTROL_END_OF_RING
Definition: dc21x4hw.h:82
#define DC_TBD_CONTROL_LAST_FRAGMENT
Definition: dc21x4hw.h:86
#define DC_SETUP_FRAME_SIZE
Definition: dc21x4hw.h:35
#define DC_STATUS_TX_STATE_MASK
Definition: dc21x4hw.h:287
#define DC_OPMODE_RX_ALL_MULTICAST
Definition: dc21x4hw.h:325
#define DC_OPMODE_PORT_SELECT
Definition: dc21x4hw.h:334
#define DC_TBD_CONTROL_HASH_PERFECT_FILTER
Definition: dc21x4hw.h:89
#define DC_SETUP_FRAME_ADDRESSES
Definition: dc21x4hw.h:41
#define NULL
Definition: types.h:112
#define TRUE
Definition: types.h:120
#define FALSE
Definition: types.h:117
static int Hash(const char *)
Definition: reader.c:2257
#define INFO
Definition: debug.h:89
VOID DcWriteGpio(_In_ PDC21X4_ADAPTER Adapter, _In_ ULONG Value)
Definition: hardware.c:64
NDIS_STATUS DcUpdateMulticastList(_In_ PDC21X4_ADAPTER Adapter)
Definition: hardware.c:375
NDIS_STATUS DcSetupAdapter(_In_ PDC21X4_ADAPTER Adapter)
Definition: hardware.c:462
VOID DcDisableHw(_In_ PDC21X4_ADAPTER Adapter)
Definition: hardware.c:17
VOID DcSetupFrameInitialize(_In_ PDC21X4_ADAPTER Adapter)
Definition: hardware.c:260
NDIS_STATUS DcApplyPacketFilter(_In_ PDC21X4_ADAPTER Adapter, _In_ ULONG PacketFilter)
Definition: hardware.c:401
static VOID DcSetupFrameImperfectFiltering(_In_ PDC21X4_ADAPTER Adapter)
Definition: hardware.c:340
VOID DcStopTxRxProcess(_In_ PDC21X4_ADAPTER Adapter)
Definition: hardware.c:38
static VOID DcSoftReset(_In_ PDC21X4_ADAPTER Adapter)
Definition: hardware.c:442
VOID DcWriteSia(_In_ PDC21X4_ADAPTER Adapter, _In_ ULONG Csr13, _In_ ULONG Csr14, _In_ ULONG Csr15)
Definition: hardware.c:89
BOOLEAN DcSetupFrameDownload(_In_ PDC21X4_ADAPTER Adapter, _In_ BOOLEAN WaitForCompletion)
Definition: hardware.c:187
VOID DcTestPacket(_In_ PDC21X4_ADAPTER Adapter)
Definition: hardware.c:135
static VOID DcSetupFramePerfectFiltering(_In_ PDC21X4_ADAPTER Adapter)
Definition: hardware.c:289
#define DC_WRITE_BARRIER()
Definition: util.h:30
VOID _cdecl NdisWriteErrorLogEntry(IN NDIS_HANDLE NdisAdapterHandle, IN NDIS_ERROR_CODE ErrorCode, IN ULONG NumberOfErrorValues,...)
Definition: main.c:76
NDIS_STATUS EXPORT NdisScheduleWorkItem(IN PNDIS_WORK_ITEM pWorkItem)
Definition: misc.c:467
#define ETH_LENGTH_OF_ADDRESS
Definition: efilter.h:16
Status
Definition: gdiplustypes.h:25
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
#define MEDIA_MII
Definition: media.h:67
#define MEDIA_IS_FIXED(Adapter)
Definition: media.h:126
#define MEDIA_10T_FD
Definition: media.h:51
#define MEDIA_IS_FX(MediaNumber)
Definition: media.h:122
#define MEDIA_HMR
Definition: media.h:56
#define ASSERT(a)
Definition: mode.c:44
#define _In_
Definition: ms_sal.h:308
#define NdisReleaseSpinLock(_SpinLock)
Definition: ndis.h:4115
#define NDIS_PACKET_TYPE_PROMISCUOUS
Definition: ndis.h:668
#define NDIS_STATUS_PENDING
Definition: ndis.h:347
#define NDIS_STATUS_MEDIA_CONNECT
Definition: ndis.h:361
#define NdisMIndicateStatusComplete(MiniportAdapterHandle)
Definition: ndis.h:5580
#define NDIS_ERROR_CODE_HARDWARE_FAILURE
Definition: ndis.h:564
#define NDIS_PACKET_TYPE_BROADCAST
Definition: ndis.h:666
#define NdisStallExecution
Definition: ndis.h:4453
#define NDIS_STATUS_SUCCESS
Definition: ndis.h:346
#define NDIS_PACKET_TYPE_ALL_MULTICAST
Definition: ndis.h:665
#define NdisAcquireSpinLock(_SpinLock)
Definition: ndis.h:4106
#define NDIS_STATUS_HARD_ERRORS
Definition: ndis.h:463
#define NdisMIndicateStatus(MiniportAdapterHandle, GeneralStatus, StatusBuffer, StatusBufferSize)
Definition: ndis.h:5570
VOID EXPORT NdisMSleep(IN ULONG MicrosecondsToSleep)
Definition: miniport.c:2928
#define UNREACHABLE
int NDIS_STATUS
Definition: ntddndis.h:475
#define KeMemoryBarrierWithoutFence()
Definition: ke.h:66
FORCEINLINE PDC_TBD DC_NEXT_TBD(_In_ PDC21X4_ADAPTER Adapter, _In_ PDC_TBD Tbd)
Definition: sendrcv.h:86
FORCEINLINE PDC_TCB DC_NEXT_TCB(_In_ PDC21X4_ADAPTER Adapter, _In_ PDC_TCB Tcb)
Definition: sendrcv.h:74
#define TRACE(s)
Definition: solgame.cpp:4
ULONG Status
Definition: dc21x4hw.h:59
ULONG Address1
Definition: dc21x4hw.h:95
ULONG Control
Definition: dc21x4hw.h:77
ULONG Address2
Definition: dc21x4hw.h:96
PDC_TBD Tbd
Definition: sendrcv.h:33
PNDIS_PACKET Packet
Definition: sendrcv.h:34
uint32_t * PULONG
Definition: typedefs.h:59
uint16_t * PUSHORT
Definition: typedefs.h:56
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:262
uint32_t ULONG
Definition: typedefs.h:59
_Must_inspect_result_ _In_ WDFKEY _In_ PCUNICODE_STRING _Out_opt_ PUSHORT _Inout_opt_ PUNICODE_STRING Value
Definition: wdfregistry.h:413
_In_ WDF_WMI_PROVIDER_CONTROL Control
Definition: wdfwmi.h:166