ReactOS  0.4.13-dev-241-g63286c6
hardware.c
Go to the documentation of this file.
1 /*
2  * PROJECT: ReactOS Intel PRO/1000 Driver
3  * LICENSE: GPL-2.0+ (https://spdx.org/licenses/GPL-2.0+)
4  * PURPOSE: Hardware specific functions
5  * COPYRIGHT: 2018 Mark Jansen (mark.jansen@reactos.org)
6  * 2019 Victor Perevertkin (victor.perevertkin@reactos.org)
7  */
8 
9 #include "nic.h"
10 
11 #include <debug.h>
12 
13 
15 {
16  /* 8254x Family adapters. Not all of them are tested */
17  0x1000, // Intel 82542
18  0x1001, // Intel 82543GC Fiber
19  0x1004, // Intel 82543GC Copper
20  0x1008, // Intel 82544EI Copper
21  0x1009, // Intel 82544EI Fiber
22  0x100A, // Intel 82540EM
23  0x100C, // Intel 82544GC Copper
24  0x100D, // Intel 82544GC LOM (LAN on Motherboard)
25  0x100E, // Intel 82540EM
26  0x100F, // Intel 82545EM Copper
27  0x1010, // Intel 82546EB Copper
28  0x1011, // Intel 82545EM Fiber
29  0x1012, // Intel 82546EB Fiber
30  0x1013, // Intel 82541EI
31  0x1014, // Intel 82541EI LOM
32  0x1015, // Intel 82540EM LOM
33  0x1016, // Intel 82540EP LOM
34  0x1017, // Intel 82540EP
35  0x1018, // Intel 82541EI Mobile
36  0x1019, // Intel 82547EI
37  0x101A, // Intel 82547EI Mobile
38  0x101D, // Intel 82546EB Quad Copper
39  0x101E, // Intel 82540EP LP (Low profile)
40  0x1026, // Intel 82545GM Copper
41  0x1027, // Intel 82545GM Fiber
42  0x1028, // Intel 82545GM SerDes
43  0x1075, // Intel 82547GI
44  0x1076, // Intel 82541GI
45  0x1077, // Intel 82541GI Mobile
46  0x1078, // Intel 82541ER
47  0x1079, // Intel 82546GB Copper
48  0x107A, // Intel 82546GB Fiber
49  0x107B, // Intel 82546GB SerDes
50  0x107C, // Intel 82541PI
51  0x108A, // Intel 82546GB PCI-E
52  0x1099, // Intel 82546GB Quad Copper
53  0x10B5, // Intel 82546GB Quad Copper KSP3
54 };
55 
56 
58 {
59  volatile ULONG Value;
60 
61  NdisReadRegisterUlong(Adapter->IoBase + E1000_REG_STATUS, &Value);
62  return Value;
63 }
64 
66 {
67  NdisWriteRegisterUlong((PULONG)(Adapter->IoBase + Address), Value);
68 }
69 
71 {
72  NdisReadRegisterUlong((PULONG)(Adapter->IoBase + Address), Value);
73 }
74 
76 {
77  NdisRawWritePortUlong((PULONG)(Adapter->IoPort), Address);
78  E1000WriteFlush(Adapter);
79  NdisRawWritePortUlong((PULONG)(Adapter->IoPort + 4), Value);
80 }
81 
82 static ULONG PacketFilterToMask(ULONG PacketFilter)
83 {
84  ULONG FilterMask = 0;
85 
86  if (PacketFilter & NDIS_PACKET_TYPE_ALL_MULTICAST)
87  {
88  /* Multicast Promiscuous Enabled */
89  FilterMask |= E1000_RCTL_MPE;
90  }
91  if (PacketFilter & NDIS_PACKET_TYPE_PROMISCUOUS)
92  {
93  /* Unicast Promiscuous Enabled */
94  FilterMask |= E1000_RCTL_UPE;
95  /* Multicast Promiscuous Enabled */
96  FilterMask |= E1000_RCTL_MPE;
97  }
98  if (PacketFilter & NDIS_PACKET_TYPE_MAC_FRAME)
99  {
100  /* Pass MAC Control Frames */
101  FilterMask |= E1000_RCTL_PMCF;
102  }
103  if (PacketFilter & NDIS_PACKET_TYPE_BROADCAST)
104  {
105  /* Broadcast Accept Mode */
106  FilterMask |= E1000_RCTL_BAM;
107  }
108 
109  return FilterMask;
110 }
111 
113 {
114  static ULONG PredefSizes[4] = {
115  2048, 1024, 512, 256,
116  };
117  ULONG Size;
118 
119  Size = PredefSizes[BufSize & E1000_RCVBUF_INDEXMASK];
121  {
122  ASSERT(BufSize != 2048);
123  Size *= 16;
124  }
125  return Size;
126 }
127 
129 {
130  ULONG Mask = 0;
131 
133  Mask <<= E1000_RCTL_BSIZE_SHIFT;
135  Mask |= E1000_RCTL_BSEX;
136 
137  return Mask;
138 }
139 
140 #if 0
141 /* This function works, but the driver does not use PHY register access right now */
142 static BOOLEAN E1000ReadMdic(IN PE1000_ADAPTER Adapter, IN ULONG Address, USHORT *Result)
143 {
144  ULONG ResultAddress;
145  ULONG Mdic;
146  UINT n;
147 
149  {
150  NDIS_DbgPrint(MIN_TRACE, ("PHY Address %d is invalid\n", Address));
151  return 1;
152  }
153 
154  Mdic = (Address << E1000_MDIC_REGADD_SHIFT);
156  Mdic |= E1000_MDIC_OP_READ;
157 
158  E1000WriteUlong(Adapter, E1000_REG_MDIC, Mdic);
159 
160  for (n = 0; n < MAX_PHY_READ_ATTEMPTS; n++)
161  {
162  NdisStallExecution(50);
163  E1000ReadUlong(Adapter, E1000_REG_MDIC, &Mdic);
164  if (Mdic & E1000_MDIC_R)
165  break;
166  }
167  if (!(Mdic & E1000_MDIC_R))
168  {
169  NDIS_DbgPrint(MIN_TRACE, ("MDI Read incomplete\n"));
170  return FALSE;
171  }
172  if (Mdic & E1000_MDIC_E)
173  {
174  NDIS_DbgPrint(MIN_TRACE, ("MDI Read error\n"));
175  return FALSE;
176  }
177 
178  ResultAddress = (Mdic >> E1000_MDIC_REGADD_SHIFT) & MAX_PHY_REG_ADDRESS;
179 
180  if (ResultAddress!= Address)
181  {
182  /* Add locking? */
183  NDIS_DbgPrint(MIN_TRACE, ("MDI Read got wrong address (%d instead of %d)\n",
184  ResultAddress, Address));
185  return FALSE;
186  }
187  *Result = (USHORT) Mdic;
188  return TRUE;
189 }
190 #endif
191 
192 
194 {
195  ULONG Value;
196  UINT n;
197 
199 
200  for (n = 0; n < MAX_EEPROM_READ_ATTEMPTS; ++n)
201  {
203 
204  E1000ReadUlong(Adapter, E1000_REG_EERD, &Value);
205 
206  if (Value & E1000_EERD_DONE)
207  break;
208  }
209  if (!(Value & E1000_EERD_DONE))
210  {
211  NDIS_DbgPrint(MIN_TRACE, ("EEPROM Read incomplete\n"));
212  return FALSE;
213  }
215  return TRUE;
216 }
217 
219 {
220  USHORT Checksum = 0, Data;
221  UINT n;
222 
223  /* 5.6.35 Checksum Word Calculation (Word 3Fh) */
224  for (n = 0; n <= E1000_NVM_REG_CHECKSUM; n++)
225  {
226  if (!E1000ReadEeprom(Adapter, n, &Data))
227  {
228  return FALSE;
229  }
230  Checksum += Data;
231  }
232 
233  if (Checksum != NVM_MAGIC_SUM)
234  {
235  NDIS_DbgPrint(MIN_TRACE, ("EEPROM has an invalid checksum of 0x%x\n", (ULONG)Checksum));
236  return FALSE;
237  }
238 
239  return TRUE;
240 }
241 
242 
243 BOOLEAN
244 NTAPI
246  IN PE1000_ADAPTER Adapter)
247 {
248  UINT n;
249  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
250 
251  if (Adapter->VendorID != HW_VENDOR_INTEL)
252  {
253  NDIS_DbgPrint(MIN_TRACE, ("Unknown vendor: 0x%x\n", Adapter->VendorID));
254  return FALSE;
255  }
256 
257  for (n = 0; n < ARRAYSIZE(SupportedDevices); ++n)
258  {
259  if (SupportedDevices[n] == Adapter->DeviceID)
260  {
261  return TRUE;
262  }
263  }
264 
265  NDIS_DbgPrint(MIN_TRACE, ("Unknown device: 0x%x\n", Adapter->DeviceID));
266 
267  return FALSE;
268 }
269 
271 NTAPI
273  IN PE1000_ADAPTER Adapter,
275 {
276  UINT n;
277  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
278 
279  for (n = 0; n < ResourceList->Count; n++)
280  {
281  PCM_PARTIAL_RESOURCE_DESCRIPTOR ResourceDescriptor = ResourceList->PartialDescriptors + n;
282 
283  switch (ResourceDescriptor->Type)
284  {
285  case CmResourceTypePort:
286  ASSERT(Adapter->IoPortAddress == 0);
287  ASSERT(ResourceDescriptor->u.Port.Start.HighPart == 0);
288 
289  Adapter->IoPortAddress = ResourceDescriptor->u.Port.Start.LowPart;
290  Adapter->IoPortLength = ResourceDescriptor->u.Port.Length;
291 
292  NDIS_DbgPrint(MID_TRACE, ("I/O port range is %p to %p\n",
293  Adapter->IoPortAddress,
294  Adapter->IoPortAddress + Adapter->IoPortLength));
295  break;
297  ASSERT(Adapter->InterruptVector == 0);
298  ASSERT(Adapter->InterruptLevel == 0);
299 
300  Adapter->InterruptVector = ResourceDescriptor->u.Interrupt.Vector;
301  Adapter->InterruptLevel = ResourceDescriptor->u.Interrupt.Level;
302  Adapter->InterruptShared = (ResourceDescriptor->ShareDisposition == CmResourceShareShared);
303  Adapter->InterruptFlags = ResourceDescriptor->Flags;
304 
305  NDIS_DbgPrint(MID_TRACE, ("IRQ vector is %d\n", Adapter->InterruptVector));
306  break;
308  /* Internal registers and memories (including PHY) */
309  if (ResourceDescriptor->u.Memory.Length == (128 * 1024))
310  {
311  ASSERT(Adapter->IoAddress.LowPart == 0);
312  ASSERT(ResourceDescriptor->u.Port.Start.HighPart == 0);
313 
314 
315  Adapter->IoAddress.QuadPart = ResourceDescriptor->u.Memory.Start.QuadPart;
316  Adapter->IoLength = ResourceDescriptor->u.Memory.Length;
317  NDIS_DbgPrint(MID_TRACE, ("Memory range is %I64x to %I64x\n",
318  Adapter->IoAddress.QuadPart,
319  Adapter->IoAddress.QuadPart + Adapter->IoLength));
320  }
321  break;
322 
323  default:
324  NDIS_DbgPrint(MIN_TRACE, ("Unrecognized resource type: 0x%x\n", ResourceDescriptor->Type));
325  break;
326  }
327  }
328 
329  if (Adapter->IoAddress.QuadPart == 0 || Adapter->IoPortAddress == 0 || Adapter->InterruptVector == 0)
330  {
331  NDIS_DbgPrint(MIN_TRACE, ("Adapter didn't receive enough resources\n"));
332  return NDIS_STATUS_RESOURCES;
333  }
334 
335  return NDIS_STATUS_SUCCESS;
336 }
337 
339 NTAPI
341  IN PE1000_ADAPTER Adapter)
342 {
345  UINT n;
346 
347  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
348 
349  Status = NdisMRegisterIoPortRange((PVOID*)&Adapter->IoPort,
350  Adapter->AdapterHandle,
351  Adapter->IoPortAddress,
352  Adapter->IoPortLength);
354  {
355  NDIS_DbgPrint(MIN_TRACE, ("Unable to register IO port range (0x%x)\n", Status));
356  return NDIS_STATUS_RESOURCES;
357  }
358 
359  Status = NdisMMapIoSpace((PVOID*)&Adapter->IoBase,
360  Adapter->AdapterHandle,
361  Adapter->IoAddress,
362  Adapter->IoLength);
363 
364 
365  NdisMAllocateSharedMemory(Adapter->AdapterHandle,
367  FALSE,
368  (PVOID*)&Adapter->TransmitDescriptors,
369  &Adapter->TransmitDescriptorsPa);
370  if (Adapter->TransmitDescriptors == NULL)
371  {
372  NDIS_DbgPrint(MIN_TRACE, ("Unable to allocate transmit descriptors\n"));
373  return NDIS_STATUS_RESOURCES;
374  }
375 
376  for (n = 0; n < NUM_TRANSMIT_DESCRIPTORS; ++n)
377  {
378  PE1000_TRANSMIT_DESCRIPTOR Descriptor = Adapter->TransmitDescriptors + n;
379  Descriptor->Address = 0;
380  Descriptor->Length = 0;
381  }
382 
383  NdisMAllocateSharedMemory(Adapter->AdapterHandle,
385  FALSE,
386  (PVOID*)&Adapter->ReceiveDescriptors,
387  &Adapter->ReceiveDescriptorsPa);
388  if (Adapter->ReceiveDescriptors == NULL)
389  {
390  NDIS_DbgPrint(MIN_TRACE, ("Unable to allocate receive descriptors\n"));
391  return NDIS_STATUS_RESOURCES;
392  }
393 
394  AllocationSize = RcvBufAllocationSize(Adapter->ReceiveBufferType);
395  ASSERT(Adapter->ReceiveBufferEntrySize == 0 || Adapter->ReceiveBufferEntrySize == AllocationSize);
396  Adapter->ReceiveBufferEntrySize = AllocationSize;
397 
398  NdisMAllocateSharedMemory(Adapter->AdapterHandle,
399  Adapter->ReceiveBufferEntrySize * NUM_RECEIVE_DESCRIPTORS,
400  FALSE,
401  (PVOID*)&Adapter->ReceiveBuffer,
402  &Adapter->ReceiveBufferPa);
403 
404  if (Adapter->ReceiveBuffer == NULL)
405  {
406  NDIS_DbgPrint(MIN_TRACE, ("Unable to allocate receive buffer\n"));
407  return NDIS_STATUS_RESOURCES;
408  }
409 
410  for (n = 0; n < NUM_RECEIVE_DESCRIPTORS; ++n)
411  {
412  PE1000_RECEIVE_DESCRIPTOR Descriptor = Adapter->ReceiveDescriptors + n;
413 
415  Descriptor->Address = Adapter->ReceiveBufferPa.QuadPart + n * Adapter->ReceiveBufferEntrySize;
416  }
417 
418  return NDIS_STATUS_SUCCESS;
419 }
420 
422 NTAPI
424  IN PE1000_ADAPTER Adapter)
425 {
427  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
428 
429  Status = NdisMRegisterInterrupt(&Adapter->Interrupt,
430  Adapter->AdapterHandle,
431  Adapter->InterruptVector,
432  Adapter->InterruptLevel,
433  TRUE, // We always want ISR calls
434  Adapter->InterruptShared,
435  (Adapter->InterruptFlags & CM_RESOURCE_INTERRUPT_LATCHED) ?
437 
439  {
440  Adapter->InterruptRegistered = TRUE;
441  }
442 
443  return Status;
444 }
445 
447 NTAPI
449  IN PE1000_ADAPTER Adapter)
450 {
451  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
452 
453  if (Adapter->InterruptRegistered)
454  {
455  NdisMDeregisterInterrupt(&Adapter->Interrupt);
456  Adapter->InterruptRegistered = FALSE;
457  }
458 
459  return NDIS_STATUS_SUCCESS;
460 }
461 
463 NTAPI
465  IN PE1000_ADAPTER Adapter)
466 {
467  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
468 
469  if (Adapter->ReceiveDescriptors != NULL)
470  {
471  /* Disassociate our shared buffer before freeing it to avoid NIC-induced memory corruption */
472  if (Adapter->IoBase)
473  {
474  E1000WriteUlong(Adapter, E1000_REG_RDH, 0);
475  E1000WriteUlong(Adapter, E1000_REG_RDT, 0);
476  }
477 
478  NdisMFreeSharedMemory(Adapter->AdapterHandle,
480  FALSE,
481  Adapter->ReceiveDescriptors,
482  Adapter->ReceiveDescriptorsPa);
483 
484  Adapter->ReceiveDescriptors = NULL;
485  }
486 
487  if (Adapter->ReceiveBuffer != NULL)
488  {
489  NdisMFreeSharedMemory(Adapter->AdapterHandle,
490  Adapter->ReceiveBufferEntrySize * NUM_RECEIVE_DESCRIPTORS,
491  FALSE,
492  Adapter->ReceiveBuffer,
493  Adapter->ReceiveBufferPa);
494 
495  Adapter->ReceiveBuffer = NULL;
496  Adapter->ReceiveBufferEntrySize = 0;
497  }
498 
499 
500  if (Adapter->TransmitDescriptors != NULL)
501  {
502  /* Disassociate our shared buffer before freeing it to avoid NIC-induced memory corruption */
503  if (Adapter->IoBase)
504  {
505  E1000WriteUlong(Adapter, E1000_REG_TDH, 0);
506  E1000WriteUlong(Adapter, E1000_REG_TDT, 0);
507  }
508 
509  NdisMFreeSharedMemory(Adapter->AdapterHandle,
511  FALSE,
512  Adapter->TransmitDescriptors,
513  Adapter->TransmitDescriptorsPa);
514 
515  Adapter->TransmitDescriptors = NULL;
516  }
517 
518 
519 
520  if (Adapter->IoPort)
521  {
522  NdisMDeregisterIoPortRange(Adapter->AdapterHandle,
523  Adapter->IoPortAddress,
524  Adapter->IoPortLength,
525  Adapter->IoPort);
526  }
527 
528  if (Adapter->IoBase)
529  {
530  NdisMUnmapIoSpace(Adapter->AdapterHandle, Adapter->IoBase, Adapter->IoLength);
531  }
532 
533 
534  return NDIS_STATUS_SUCCESS;
535 }
536 
537 
539 NTAPI
541  IN PE1000_ADAPTER Adapter)
542 {
544  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
545 
546  Status = NICSoftReset(Adapter);
548  {
549  return Status;
550  }
551 
552  if (!E1000ValidateNvmChecksum(Adapter))
553  {
555  }
556 
557  return NDIS_STATUS_SUCCESS;
558 }
559 
561 NTAPI
563  IN PE1000_ADAPTER Adapter)
564 {
565  ULONG Value, ResetAttempts;
566  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
567 
568  NICDisableInterrupts(Adapter);
569  E1000WriteUlong(Adapter, E1000_REG_RCTL, 0);
570  E1000WriteUlong(Adapter, E1000_REG_TCTL, 0);
571  E1000ReadUlong(Adapter, E1000_REG_CTRL, &Value);
572  /* Write this using IO port, some devices cannot ack this otherwise */
574 
575 
576  for (ResetAttempts = 0; ResetAttempts < MAX_RESET_ATTEMPTS; ResetAttempts++)
577  {
578  /* Wait 1us after reset (according to manual) */
580  E1000ReadUlong(Adapter, E1000_REG_CTRL, &Value);
581 
582  if (!(Value & E1000_CTRL_RST))
583  {
584  NDIS_DbgPrint(MAX_TRACE, ("Device is back (%u)\n", ResetAttempts));
585 
586  NICDisableInterrupts(Adapter);
587  /* Clear out interrupts (the register is cleared upon read) */
588  E1000ReadUlong(Adapter, E1000_REG_ICR, &Value);
589 
590  E1000ReadUlong(Adapter, E1000_REG_CTRL, &Value);
594 
595  return NDIS_STATUS_SUCCESS;
596  }
597  }
598 
599  NDIS_DbgPrint(MIN_TRACE, ("Device did not recover\n"));
600  return NDIS_STATUS_FAILURE;
601 }
602 
604 NTAPI
606  IN PE1000_ADAPTER Adapter)
607 {
608  ULONG Value;
609 
610  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
611  NDIS_DbgPrint(MID_TRACE, ("Setting up transmit.\n"));
612 
613  /* Make sure the thing is disabled first. */
614  E1000WriteUlong(Adapter, E1000_REG_TCTL, 0);
615 
616  /* Transmit descriptor ring buffer */
617  E1000WriteUlong(Adapter, E1000_REG_TDBAH, Adapter->TransmitDescriptorsPa.HighPart);
618  E1000WriteUlong(Adapter, E1000_REG_TDBAL, Adapter->TransmitDescriptorsPa.LowPart);
619 
620  /* Transmit descriptor buffer size */
622 
623  /* Transmit descriptor tail / head */
624  E1000WriteUlong(Adapter, E1000_REG_TDH, 0);
625  E1000WriteUlong(Adapter, E1000_REG_TDT, 0);
626  Adapter->CurrentTxDesc = 0;
627 
628  /* Set up interrupt timers */
629  E1000WriteUlong(Adapter, E1000_REG_TADV, 96); // value is in 1.024 of usec
630  E1000WriteUlong(Adapter, E1000_REG_TIDV, 16);
631 
633 
635 
636  NDIS_DbgPrint(MID_TRACE, ("Setting up receive.\n"));
637 
638  /* Make sure the thing is disabled first. */
639  E1000WriteUlong(Adapter, E1000_REG_RCTL, 0);
640 
641  /* Receive descriptor ring buffer */
642  E1000WriteUlong(Adapter, E1000_REG_RDBAH, Adapter->ReceiveDescriptorsPa.HighPart);
643  E1000WriteUlong(Adapter, E1000_REG_RDBAL, Adapter->ReceiveDescriptorsPa.LowPart);
644 
645  /* Receive descriptor buffer size */
647 
648  /* Receive descriptor tail / head */
649  E1000WriteUlong(Adapter, E1000_REG_RDH, 0);
651 
652  /* Set up interrupt timers */
653  E1000WriteUlong(Adapter, E1000_REG_RADV, 96);
654  E1000WriteUlong(Adapter, E1000_REG_RDTR, 16);
655 
656  /* Some defaults */
658 
659  /* Receive buffer size */
660  Value |= RcvBufRegisterMask(Adapter->ReceiveBufferType);
661 
662  /* Add our current packet filter */
663  Value |= PacketFilterToMask(Adapter->PacketFilter);
664 
666 
667  return NDIS_STATUS_SUCCESS;
668 }
669 
671 NTAPI
673  IN PE1000_ADAPTER Adapter)
674 {
675  ULONG Value;
676 
677  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
678 
679  E1000ReadUlong(Adapter, E1000_REG_TCTL, &Value);
680  Value &= ~E1000_TCTL_EN;
682 
683  E1000ReadUlong(Adapter, E1000_REG_RCTL, &Value);
684  Value &= ~E1000_RCTL_EN;
686 
687  return NDIS_STATUS_SUCCESS;
688 }
689 
691 NTAPI
693  IN PE1000_ADAPTER Adapter,
694  OUT PUCHAR MacAddress)
695 {
696  USHORT AddrWord;
697  UINT n;
698 
699  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
700 
701  /* Should we read from RAL/RAH first? */
702  for (n = 0; n < (IEEE_802_ADDR_LENGTH / 2); ++n)
703  {
704  if (!E1000ReadEeprom(Adapter, (UCHAR)n, &AddrWord))
705  return NDIS_STATUS_FAILURE;
706  Adapter->PermanentMacAddress[n * 2 + 0] = AddrWord & 0xff;
707  Adapter->PermanentMacAddress[n * 2 + 1] = (AddrWord >> 8) & 0xff;
708  }
709 
710  NDIS_DbgPrint(MIN_TRACE, ("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
711  Adapter->PermanentMacAddress[0],
712  Adapter->PermanentMacAddress[1],
713  Adapter->PermanentMacAddress[2],
714  Adapter->PermanentMacAddress[3],
715  Adapter->PermanentMacAddress[4],
716  Adapter->PermanentMacAddress[5]));
717  return NDIS_STATUS_SUCCESS;
718 }
719 
721 NTAPI
723  IN PE1000_ADAPTER Adapter)
724 {
725  UINT n;
726  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
727 
728  for (n = 0; n < MAXIMUM_MULTICAST_ADDRESSES; ++n)
729  {
730  ULONG Ral = *(ULONG *)Adapter->MulticastList[n].MacAddress;
731  ULONG Rah = *(USHORT *)&Adapter->MulticastList[n].MacAddress[4];
732 
733  if (Rah || Ral)
734  {
735  Rah |= E1000_RAH_AV;
736 
737  E1000WriteUlong(Adapter, E1000_REG_RAL + (8*n), Ral);
738  E1000WriteUlong(Adapter, E1000_REG_RAH + (8*n), Rah);
739  }
740  else
741  {
742  E1000WriteUlong(Adapter, E1000_REG_RAH + (8*n), 0);
743  E1000WriteUlong(Adapter, E1000_REG_RAL + (8*n), 0);
744  }
745  }
746 
747  return NDIS_STATUS_SUCCESS;
748 }
749 
751 NTAPI
753  IN PE1000_ADAPTER Adapter)
754 {
755  ULONG FilterMask;
756 
757  E1000ReadUlong(Adapter, E1000_REG_RCTL, &FilterMask);
758 
759  FilterMask &= ~E1000_RCTL_FILTER_BITS;
760  FilterMask |= PacketFilterToMask(Adapter->PacketFilter);
761  E1000WriteUlong(Adapter, E1000_REG_RCTL, FilterMask);
762 
763  return NDIS_STATUS_SUCCESS;
764 }
765 
767 NTAPI
769  IN PE1000_ADAPTER Adapter)
770 {
771  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
772 
773  E1000WriteUlong(Adapter, E1000_REG_IMS, Adapter->InterruptMask /*| 0x1F6DC*/);
774  return NDIS_STATUS_SUCCESS;
775 }
776 
778 NTAPI
780  IN PE1000_ADAPTER Adapter)
781 {
782  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
783 
784  E1000WriteUlong(Adapter, E1000_REG_IMC, ~0);
785  return NDIS_STATUS_SUCCESS;
786 }
787 
788 ULONG
789 NTAPI
791  IN PE1000_ADAPTER Adapter,
792  OUT PBOOLEAN InterruptRecognized)
793 {
794  ULONG Value;
795 
796  /* Reading the interrupt acknowledges them */
797  E1000ReadUlong(Adapter, E1000_REG_ICR, &Value);
798 
799  *InterruptRecognized = (Value & Adapter->InterruptMask) != 0;
800 
801  NDIS_DbgPrint(MAX_TRACE, ("NICInterruptRecognized(0x%x, 0x%x).\n", Value, *InterruptRecognized));
802 
803  return (Value & Adapter->InterruptMask);
804 }
805 
806 VOID
807 NTAPI
809  IN PE1000_ADAPTER Adapter)
810 {
811  ULONG DeviceStatus;
812  SIZE_T SpeedIndex;
813  static ULONG SpeedValues[] = { 10, 100, 1000, 1000 };
814 
815  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
816 
817  E1000ReadUlong(Adapter, E1000_REG_STATUS, &DeviceStatus);
818  Adapter->MediaState = (DeviceStatus & E1000_STATUS_LU) ? NdisMediaStateConnected : NdisMediaStateDisconnected;
819  SpeedIndex = (DeviceStatus & E1000_STATUS_SPEEDMASK) >> E1000_STATUS_SPEEDSHIFT;
820  Adapter->LinkSpeedMbps = SpeedValues[SpeedIndex];
821 }
822 
824 NTAPI
826  IN PE1000_ADAPTER Adapter,
828  IN ULONG Length)
829 {
830  volatile PE1000_TRANSMIT_DESCRIPTOR TransmitDescriptor;
831 
832  NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
833 
834  TransmitDescriptor = Adapter->TransmitDescriptors + Adapter->CurrentTxDesc;
835  TransmitDescriptor->Address = PhysicalAddress.QuadPart;
836  TransmitDescriptor->Length = Length;
837  TransmitDescriptor->ChecksumOffset = 0;
839  TransmitDescriptor->Status = 0;
840  TransmitDescriptor->ChecksumStartField = 0;
841  TransmitDescriptor->Special = 0;
842 
843  Adapter->CurrentTxDesc = (Adapter->CurrentTxDesc + 1) % NUM_TRANSMIT_DESCRIPTORS;
844 
845  E1000WriteUlong(Adapter, E1000_REG_TDT, Adapter->CurrentTxDesc);
846 
847  if (Adapter->CurrentTxDesc == Adapter->LastTxDesc)
848  {
849  NDIS_DbgPrint(MID_TRACE, ("All TX descriptors are full now\n"));
850  Adapter->TxFull = TRUE;
851  }
852 
853  return NDIS_STATUS_SUCCESS;
854 }
_In_opt_ ULONG _Out_ PULONG Value
Definition: rtlfuncs.h:2327
#define NdisWriteRegisterUlong(Register, Data)
Definition: ndis.h:4294
#define NdisInterruptLevelSensitive
Definition: ndis.h:920
NDIS_STATUS NTAPI NICSoftReset(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:562
#define E1000_STATUS_SPEEDSHIFT
Definition: e1000hw.h:161
#define IN
Definition: typedefs.h:38
static ULONG PacketFilterToMask(ULONG PacketFilter)
Definition: hardware.c:82
#define E1000_REG_RDH
Definition: e1000hw.h:132
static USHORT SupportedDevices[]
Definition: hardware.c:14
#define MAXIMUM_MULTICAST_ADDRESSES
Definition: e1000hw.h:23
#define TRUE
Definition: types.h:120
enum _E1000_RCVBUF_SIZE E1000_RCVBUF_SIZE
VOID NTAPI E1000ReadUlong(IN PE1000_ADAPTER Adapter, IN ULONG Address, OUT PULONG Value)
Definition: hardware.c:70
#define MID_TRACE
Definition: debug.h:15
#define E1000_MDIC_E
Definition: e1000hw.h:178
VOID EXPORT NdisMAllocateSharedMemory(IN NDIS_HANDLE MiniportAdapterHandle, IN ULONG Length, IN BOOLEAN Cached, OUT PVOID *VirtualAddress, OUT PNDIS_PHYSICAL_ADDRESS PhysicalAddress)
Definition: memory.c:148
#define E1000_REG_STATUS
Definition: e1000hw.h:115
#define E1000_TCTL_EN
Definition: e1000hw.h:211
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@369::@371 Port
#define E1000_CTRL_RST
Definition: e1000hw.h:154
#define E1000_REG_RCTL
Definition: e1000hw.h:125
#define MAX_PHY_READ_ATTEMPTS
Definition: e1000hw.h:18
#define E1000_TDESC_CMD_IDE
Definition: e1000hw.h:79
#define E1000_TDESC_CMD_RS
Definition: e1000hw.h:80
#define NUM_RECEIVE_DESCRIPTORS
Definition: e1000hw.h:109
NDIS_STATUS EXPORT NdisMRegisterIoPortRange(OUT PVOID *PortOffset, IN NDIS_HANDLE MiniportAdapterHandle, IN UINT InitialPort, IN UINT NumberOfPorts)
Definition: io.c:1018
NDIS_STATUS NTAPI NICApplyPacketFilter(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:752
#define E1000_EERD_DONE
Definition: e1000hw.h:167
unsigned char * PUCHAR
Definition: retypes.h:3
#define E1000_CTRL_VME
Definition: e1000hw.h:155
#define E1000_STATUS_SPEEDMASK
Definition: e1000hw.h:162
GLdouble n
Definition: glext.h:7729
union _CM_PARTIAL_RESOURCE_DESCRIPTOR::@369 u
NDIS_STATUS NTAPI NICAllocateIoResources(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:340
ULONG NTAPI NICInterruptRecognized(IN PE1000_ADAPTER Adapter, OUT PBOOLEAN InterruptRecognized)
Definition: hardware.c:790
#define E1000_REG_TDH
Definition: e1000hw.h:140
VOID EXPORT NdisMUnmapIoSpace(IN NDIS_HANDLE MiniportAdapterHandle, IN PVOID VirtualAddress, IN UINT Length)
Definition: io.c:1139
#define E1000_REG_IMC
Definition: e1000hw.h:123
#define ARRAYSIZE(array)
Definition: filtermapper.c:47
#define E1000_MDIC_R
Definition: e1000hw.h:177
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@369::@372 Interrupt
struct _CM_PARTIAL_RESOURCE_DESCRIPTOR::@369::@374 Memory
#define E1000_REG_EERD
Definition: e1000hw.h:116
NDIS_STATUS NTAPI NICEnableTxRx(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:605
#define NUM_TRANSMIT_DESCRIPTORS
Definition: e1000hw.h:108
#define E1000_EERD_ADDR_SHIFT
Definition: e1000hw.h:168
#define E1000_RCTL_BSIZE_SHIFT
Definition: e1000hw.h:202
const MUI_LANGUAGE_RESOURCE ResourceList[]
Definition: muilanguages.h:414
#define CmResourceTypePort
Definition: hwresource.cpp:123
int NDIS_STATUS
Definition: ntddndis.h:445
NDIS_STATUS NTAPI NICInitializeAdapterResources(IN PE1000_ADAPTER Adapter, IN PNDIS_RESOURCE_LIST ResourceList)
Definition: hardware.c:272
#define E1000_CTRL_ASDE
Definition: e1000hw.h:152
NDIS_STATUS NTAPI NICUnregisterInterrupts(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:448
#define E1000_RCTL_BAM
Definition: e1000hw.h:201
VOID EXPORT NdisMFreeSharedMemory(IN NDIS_HANDLE MiniportAdapterHandle, IN ULONG Length, IN BOOLEAN Cached, IN PVOID VirtualAddress, IN NDIS_PHYSICAL_ADDRESS PhysicalAddress)
Definition: memory.c:215
#define E1000_REG_RDT
Definition: e1000hw.h:133
static VOID E1000WriteIoUlong(IN PE1000_ADAPTER Adapter, IN ULONG Address, IN ULONG Value)
Definition: hardware.c:75
NTSTATUS(* NTAPI)(IN PFILE_FULL_EA_INFORMATION EaBuffer, IN ULONG EaLength, OUT PULONG ErrorOffset)
Definition: IoEaTest.cpp:117
#define E1000_REG_RAH
Definition: e1000hw.h:147
#define E1000_RCTL_MPE
Definition: e1000hw.h:200
#define E1000_REG_CTRL
Definition: e1000hw.h:114
unsigned char BOOLEAN
smooth NULL
Definition: ftsmooth.c:416
static WCHAR Address[46]
Definition: ping.c:68
_At_(*)(_In_ PWSK_CLIENT Client, _In_opt_ PUNICODE_STRING NodeName, _In_opt_ PUNICODE_STRING ServiceName, _In_opt_ ULONG NameSpace, _In_opt_ GUID *Provider, _In_opt_ PADDRINFOEXW Hints, _Outptr_ PADDRINFOEXW *Result, _In_opt_ PEPROCESS OwningProcess, _In_opt_ PETHREAD OwningThread, _Inout_ PIRP Irp Result)(Mem)) NTSTATUS(WSKAPI *PFN_WSK_GET_ADDRESS_INFO
Definition: wsk.h:426
_In_ LPGUID _In_ PVOID Data
Definition: classpnp.h:778
VOID NTAPI NICUpdateLinkStatus(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:808
#define NDIS_STATUS_INVALID_DATA
Definition: ndis.h:486
#define E1000_STATUS_LU
Definition: e1000hw.h:160
#define E1000_RCTL_PMCF
Definition: e1000hw.h:203
#define E1000_RCTL_BSEX
Definition: e1000hw.h:204
#define BufSize
Definition: FsRtlTunnel.c:28
#define NDIS_PACKET_TYPE_ALL_MULTICAST
Definition: ndis.h:665
#define E1000_MDIC_PHYADD_SHIFT
Definition: e1000hw.h:174
#define E1000_MDIC_REGADD_SHIFT
Definition: e1000hw.h:173
#define E1000_REG_TCTL
Definition: e1000hw.h:126
#define E1000_REG_TADV
Definition: e1000hw.h:143
#define E1000_REG_TDBAH
Definition: e1000hw.h:138
#define E1000_RCTL_FILTER_BITS
Definition: e1000hw.h:207
#define NVM_MAGIC_SUM
Definition: e1000hw.h:228
NDIS_STATUS EXPORT NdisMRegisterInterrupt(OUT PNDIS_MINIPORT_INTERRUPT Interrupt, IN NDIS_HANDLE MiniportAdapterHandle, IN UINT InterruptVector, IN UINT InterruptLevel, IN BOOLEAN RequestIsr, IN BOOLEAN SharedInterrupt, IN NDIS_INTERRUPT_MODE InterruptMode)
Definition: io.c:941
#define E1000_TCTL_PSP
Definition: e1000hw.h:212
#define E1000_REG_ICR
Definition: e1000hw.h:119
#define E1000_REG_RDBAH
Definition: e1000hw.h:130
#define E1000_REG_IMS
Definition: e1000hw.h:122
#define E1000_RCTL_EN
Definition: e1000hw.h:197
#define E1000_CTRL_SLU
Definition: e1000hw.h:153
#define E1000_TDESC_CMD_EOP
Definition: e1000hw.h:82
#define NdisInterruptLatched
Definition: ndis.h:921
#define E1000_EERD_START
Definition: e1000hw.h:166
#define IEEE_802_ADDR_LENGTH
Definition: e1000hw.h:11
#define E1000_REG_TDLEN
Definition: e1000hw.h:139
#define E1000_TDESC_CMD_IFCS
Definition: e1000hw.h:81
#define E1000_REG_TDBAL
Definition: e1000hw.h:137
#define E1000_RCTL_UPE
Definition: e1000hw.h:199
_In_ ULONG _In_ ULONG _In_ ULONG Length
Definition: ntddpcm.h:101
#define E1000_REG_TIPG
Definition: e1000hw.h:127
#define E1000_RCTL_SECRC
Definition: e1000hw.h:205
ASSERT((InvokeOnSuccess||InvokeOnError||InvokeOnCancel) ?(CompletionRoutine !=NULL) :TRUE)
#define NDIS_STATUS_SUCCESS
Definition: ndis.h:346
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS PhysicalAddress
Definition: iotypes.h:1060
#define E1000_REG_MDIC
Definition: e1000hw.h:117
unsigned char UCHAR
Definition: xmlstorage.h:181
NDIS_STATUS NTAPI NICPowerOn(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:540
char * PBOOLEAN
Definition: retypes.h:11
#define E1000_MDIC_OP_READ
Definition: e1000hw.h:176
static ULONG RcvBufAllocationSize(E1000_RCVBUF_SIZE BufSize)
Definition: hardware.c:112
NDIS_STATUS NTAPI NICDisableTxRx(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:672
NDIS_STATUS NTAPI NICRegisterInterrupts(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:423
static ULONG RcvBufRegisterMask(E1000_RCVBUF_SIZE BufSize)
Definition: hardware.c:128
NDIS_STATUS NTAPI NICApplyInterruptMask(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:768
#define E1000_TIPG_IPGR1_DEF
Definition: e1000hw.h:216
IN PVOID IN PVOID IN USHORT IN USHORT Size
Definition: pci.h:359
#define MAX_PHY_REG_ADDRESS
Definition: e1000hw.h:17
Status
Definition: gdiplustypes.h:24
#define E1000_MDIC_PHYADD_GIGABIT
Definition: e1000hw.h:175
IN PFCB IN PFILE_OBJECT FileObject IN ULONG AllocationSize
Definition: fatprocs.h:310
#define E1000_RAH_AV
Definition: e1000hw.h:221
ULONG_PTR SIZE_T
Definition: typedefs.h:78
#define E1000_REG_RDBAL
Definition: e1000hw.h:129
#define MAX_EEPROM_READ_ATTEMPTS
Definition: e1000hw.h:20
#define E1000_REG_RDLEN
Definition: e1000hw.h:131
#define E1000_REG_TDT
Definition: e1000hw.h:141
NDIS_STATUS NTAPI NICTransmitPacket(IN PE1000_ADAPTER Adapter, IN PHYSICAL_ADDRESS PhysicalAddress, IN ULONG Length)
Definition: hardware.c:825
#define MAX_TRACE
Definition: debug.h:16
#define MAX_RESET_ATTEMPTS
Definition: e1000hw.h:15
unsigned short USHORT
Definition: pedump.c:61
static BOOLEAN E1000ReadEeprom(IN PE1000_ADAPTER Adapter, IN UCHAR Address, USHORT *Result)
Definition: hardware.c:193
unsigned int * PULONG
Definition: retypes.h:1
unsigned int UINT
Definition: ndis.h:50
#define NdisReadRegisterUlong(Register, Data)
Definition: ndis.h:4267
NDIS_STATUS NTAPI NICReleaseIoResources(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:464
#define NDIS_PACKET_TYPE_PROMISCUOUS
Definition: ndis.h:668
VOID EXPORT NdisMDeregisterIoPortRange(IN NDIS_HANDLE MiniportAdapterHandle, IN UINT InitialPort, IN UINT NumberOfPorts, IN PVOID PortOffset)
Definition: io.c:1093
#define E1000_EERD_DATA_SHIFT
Definition: e1000hw.h:169
#define CmResourceTypeInterrupt
Definition: hwresource.cpp:124
#define NDIS_DbgPrint(_t_, _x_)
Definition: debug.h:40
NDIS_STATUS NTAPI NICUpdateMulticastList(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:722
#define E1000_TIPG_IPGR2_DEF
Definition: e1000hw.h:217
NDIS_STATUS NTAPI NICDisableInterrupts(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:779
#define OUT
Definition: typedefs.h:39
#define CM_RESOURCE_INTERRUPT_LATCHED
Definition: cmtypes.h:144
#define NDIS_STATUS_RESOURCES
Definition: ndis.h:466
unsigned int ULONG
Definition: retypes.h:1
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:261
#define MIN_TRACE
Definition: debug.h:14
VOID NTAPI E1000WriteUlong(IN PE1000_ADAPTER Adapter, IN ULONG Address, IN ULONG Value)
Definition: hardware.c:65
NDIS_STATUS EXPORT NdisMMapIoSpace(OUT PVOID *VirtualAddress, IN NDIS_HANDLE MiniportAdapterHandle, IN NDIS_PHYSICAL_ADDRESS PhysicalAddress, IN UINT Length)
Definition: io.c:774
#define E1000_REG_TIDV
Definition: e1000hw.h:142
#define E1000_REG_RDTR
Definition: e1000hw.h:134
#define NdisStallExecution
Definition: ndis.h:4453
BOOLEAN E1000ValidateNvmChecksum(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:218
#define NDIS_PACKET_TYPE_MAC_FRAME
Definition: ndis.h:674
#define CmResourceTypeMemory
Definition: hwresource.cpp:125
#define E1000_TIPG_IPGT_DEF
Definition: e1000hw.h:215
#define E1000_REG_RADV
Definition: e1000hw.h:135
#define E1000_CTRL_LRST
Definition: e1000hw.h:151
NDIS_STATUS NTAPI NICGetPermanentMacAddress(IN PE1000_ADAPTER Adapter, OUT PUCHAR MacAddress)
Definition: hardware.c:692
VOID EXPORT NdisMDeregisterInterrupt(IN PNDIS_MINIPORT_INTERRUPT Interrupt)
Definition: io.c:700
#define NDIS_STATUS_FAILURE
Definition: ndis.h:465
LONGLONG QuadPart
Definition: typedefs.h:112
static ULONG E1000WriteFlush(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:57
#define E1000_NVM_REG_CHECKSUM
Definition: e1000hw.h:227
#define NDIS_PACKET_TYPE_BROADCAST
Definition: ndis.h:666
BOOLEAN NTAPI NICRecognizeHardware(IN PE1000_ADAPTER Adapter)
Definition: hardware.c:245
_In_ PSTORAGE_PROPERTY_ID _Outptr_ PSTORAGE_DESCRIPTOR_HEADER * Descriptor
Definition: classpnp.h:966
#define E1000_REG_RAL
Definition: e1000hw.h:146
#define NdisRawWritePortUlong(Port, Data)
Definition: ndis.h:4239