13#define PG0_PSTART 0x01
47#define PG2_PSTART 0x01
145#define IEEE_802_ADDR_LENGTH 6
159#define NICDisableInterrupts(Adapter) { \
160 NDIS_DbgPrint(MAX_TRACE, ("NICDisableInterrupts()\n")); \
161 NdisRawWritePortUchar((Adapter)->IOBase + PG0_IMR, 0x00); \
164#define NICEnableInterrupts(Adapter) { \
165 NDIS_DbgPrint(MAX_TRACE, ("NICEnableInterrupts() Mask (0x%X)\n", (Adapter)->InterruptMask)); \
166 NdisRawWritePortUchar((Adapter)->IOBase + PG0_IMR, (Adapter)->InterruptMask); \
struct _DISCARD_HEADER DISCARD_HEADER
struct _ETH_HEADER ETH_HEADER
struct _DISCARD_HEADER * PDISCARD_HEADER
VOID NTAPI MiniportHandleInterrupt(IN NDIS_HANDLE MiniportAdapterContext)
struct _PACKET_HEADER PACKET_HEADER
struct _PACKET_HEADER * PPACKET_HEADER
struct _ETH_HEADER * PETH_HEADER
#define IEEE_802_ADDR_LENGTH