10#define MAXIMUM_MULTICAST_ADDRESSES 8
11#define DEFAULT_INTERRUPT_MASK (R_I_RXOK | R_I_RXERR | R_I_TXOK | \
12 R_I_TXERR | R_I_RXOVRFLW | R_I_RXUNDRUN | \
13 R_I_FIFOOVR | R_I_PCSTMOUT | R_I_PCIERR)
14#define TX_DESC_COUNT 4
38#define R_TXS_HOSTOWNS 0x00002000
39#define R_TXS_UNDERRUN 0x00004000
40#define R_TXS_STATOK 0x00008000
41#define R_TXS_OOW 0x20000000
42#define R_TXS_ABORTED 0x40000000
43#define R_TXS_CARLOST 0x80000000
46#define R_CMD_RXEMPTY 0x01
57#define R_I_RXOK 0x0001
58#define R_I_RXERR 0x0002
59#define R_I_TXOK 0x0004
60#define R_I_TXERR 0x0008
61#define R_I_RXOVRFLW 0x0010
62#define R_I_RXUNDRUN 0x0020
63#define R_I_FIFOOVR 0x0040
64#define R_I_PCSTMOUT 0x4000
65#define R_I_PCIERR 0x8000
82#define R_MS_LINKDWN 0x04
83#define R_MS_SPEED_10 0x08
98#define R_RXERRCTR 0x72
101#define R_CSCR_LINKOK 0x00400
102#define R_CSCR_LINKCHNG 0x00800
123#define R_LSBCRC0 0xCC
124#define R_LSBCRC1 0xCD
125#define R_LSBCRC2 0xCE
126#define R_LSBCRC3 0xCF
127#define R_LSBCRC4 0xD0
128#define R_LSBCRC5 0xD1
129#define R_LSBCRC6 0xD2
130#define R_LSBCRC7 0xD3
134#define EE_DATA_READ 0x01
135#define EE_DATA_WRITE 0x02
136#define EE_SHIFT_CLK 0x04
142#define EE_READ_CMD 0x06
144#define RSR_MAR 0x8000
145#define RSR_PAM 0x4000
146#define RSR_BAR 0x2000
147#define RSR_ISE 0x0020
148#define RSR_RUNT 0x0010
149#define RSR_LONG 0x0008
150#define RSR_CRC 0x0004
151#define RSR_FAE 0x0002
152#define RSR_ROK 0x0001
160#define IEEE_802_ADDR_LENGTH 6
struct _ETH_HEADER ETH_HEADER
#define IEEE_802_ADDR_LENGTH
struct _PACKET_HEADER PACKET_HEADER
struct _PACKET_HEADER * PPACKET_HEADER
struct _ETH_HEADER * PETH_HEADER