ReactOS 0.4.15-dev-5829-g6b6a045
pdo.c
Go to the documentation of this file.
1/*
2 * COPYRIGHT: See COPYING in the top level directory
3 * PROJECT: PCI IDE bus driver extension
4 * FILE: drivers/storage/pciidex/pdo.c
5 * PURPOSE: IRP_MJ_PNP operations for PDOs
6 * PROGRAMMERS: Hervé Poussineau (hpoussin@reactos.org)
7 */
8
9#include "pciidex.h"
10
11#include <stdio.h>
12
13#define NDEBUG
14#include <debug.h>
15
16static NTSTATUS
19 IN PIRP Irp,
21{
22 PPDO_DEVICE_EXTENSION DeviceExtension;
23 PFDO_DEVICE_EXTENSION FdoDeviceExtension;
24 WCHAR Buffer[256];
25 ULONG Index = 0;
30
32 DeviceExtension = (PPDO_DEVICE_EXTENSION)DeviceObject->DeviceExtension;
33 FdoDeviceExtension = (PFDO_DEVICE_EXTENSION)DeviceExtension->ControllerFdo->DeviceExtension;
34
35 switch (IdType)
36 {
38 {
39 DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_ID / BusQueryDeviceID\n");
40 RtlInitUnicodeString(&SourceString, L"PCIIDE\\IDEChannel");
41 break;
42 }
44 {
45 DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_ID / BusQueryHardwareIDs\n");
46
47 switch (FdoDeviceExtension->VendorId)
48 {
49 case 0x0e11:
50 Index += swprintf(&Buffer[Index], L"Compaq-%04x", FdoDeviceExtension->DeviceId) + 1;
51 break;
52 case 0x1039:
53 Index += swprintf(&Buffer[Index], L"SiS-%04x", FdoDeviceExtension->DeviceId) + 1;
54 break;
55 case 0x1050:
56 Index += swprintf(&Buffer[Index], L"WinBond-%04x", FdoDeviceExtension->DeviceId) + 1;
57 break;
58 case 0x1095:
59 Index += swprintf(&Buffer[Index], L"CMD-%04x", FdoDeviceExtension->DeviceId) + 1;
60 break;
61 case 0x8086:
62 {
63 switch (FdoDeviceExtension->DeviceId)
64 {
65 case 0x1230:
66 Index += swprintf(&Buffer[Index], L"Intel-PIIX") + 1;
67 break;
68 case 0x7010:
69 Index += swprintf(&Buffer[Index], L"Intel-PIIX3") + 1;
70 break;
71 case 0x7111:
72 Index += swprintf(&Buffer[Index], L"Intel-PIIX4") + 1;
73 break;
74 default:
75 Index += swprintf(&Buffer[Index], L"Intel-%04x", FdoDeviceExtension->DeviceId) + 1;
76 break;
77 }
78 break;
79 }
80 default:
81 break;
82 }
83 if (DeviceExtension->Channel == 0)
84 Index += swprintf(&Buffer[Index], L"Primary_IDE_Channel") + 1;
85 else
86 Index += swprintf(&Buffer[Index], L"Secondary_IDE_Channel") + 1;
87 Index += swprintf(&Buffer[Index], L"*PNP0600") + 1;
91 break;
92 }
94 {
95 DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_ID / BusQueryCompatibleIDs\n");
96
97 Index += swprintf(&Buffer[Index], L"*PNP0600") + 1;
101 break;
102 }
104 {
105 DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_ID / BusQueryInstanceID\n");
106 swprintf(Buffer, L"%lu", DeviceExtension->Channel);
108 break;
109 }
110 default:
111 DPRINT1("IRP_MJ_PNP / IRP_MN_QUERY_ID / unknown query id type 0x%lx\n", IdType);
112 ASSERT(FALSE);
114 }
115
119 &String);
120 *Information = (ULONG_PTR)String.Buffer;
121 return Status;
122}
123
124static NTSTATUS
127 OUT PULONG CommandPortBase,
128 OUT PULONG ControlPortBase,
129 OUT PULONG BusMasterPortBase,
130 OUT PULONG InterruptVector)
131{
132 PPDO_DEVICE_EXTENSION DeviceExtension;
133 PFDO_DEVICE_EXTENSION FdoDeviceExtension;
134 ULONG BaseIndex;
136 PCI_COMMON_CONFIG PciConfig;
138
139 DeviceExtension = (PPDO_DEVICE_EXTENSION)DeviceObject->DeviceExtension;
140 FdoDeviceExtension = (PFDO_DEVICE_EXTENSION)DeviceExtension->ControllerFdo->DeviceExtension;
141 BaseIndex = DeviceExtension->Channel * 2;
142
143 BytesRead = (*FdoDeviceExtension->BusInterface->GetBusData)(
144 FdoDeviceExtension->BusInterface->Context,
146 &PciConfig,
147 0,
151
152 /* We have found a known native pci ide controller */
153 if ((PciConfig.ProgIf & 0x80) && (PciConfig.u.type0.BaseAddresses[4] & PCI_ADDRESS_IO_SPACE))
154 {
155 DPRINT("Found IDE Bus Master controller!\n");
156 *BusMasterPortBase = PciConfig.u.type0.BaseAddresses[4] & PCI_ADDRESS_IO_ADDRESS_MASK;
157 DPRINT(" IDE Bus Master Registers at IO %lx\n", *BusMasterPortBase);
158 }
159 else
160 {
161 *BusMasterPortBase = 0;
162 }
163
164 if ((PciConfig.ProgIf >> BaseIndex) & 0x1)
165 {
166 /* Native mode */
167 if ((PciConfig.u.type0.BaseAddresses[BaseIndex + 0] & PCI_ADDRESS_IO_SPACE) &&
168 (PciConfig.u.type0.BaseAddresses[BaseIndex + 1] & PCI_ADDRESS_IO_SPACE))
169 {
170 /* Channel is enabled */
171 *CommandPortBase = PciConfig.u.type0.BaseAddresses[BaseIndex + 0] & PCI_ADDRESS_IO_ADDRESS_MASK;
172 *ControlPortBase = PciConfig.u.type0.BaseAddresses[BaseIndex + 1] & PCI_ADDRESS_IO_ADDRESS_MASK;
173 *InterruptVector = PciConfig.u.type0.InterruptLine;
175 }
176 }
177 else
178 {
179 /* Compatibility mode */
180 switch (DeviceExtension->Channel)
181 {
182 case 0:
183 if (IoGetConfigurationInformation()->AtDiskPrimaryAddressClaimed)
185 else
186 {
187 *CommandPortBase = 0x1F0;
188 *ControlPortBase = 0x3F6;
189 *InterruptVector = 14;
191 }
192 break;
193 case 1:
194 if (IoGetConfigurationInformation()->AtDiskSecondaryAddressClaimed)
196 else
197 {
198 *CommandPortBase = 0x170;
199 *ControlPortBase = 0x376;
200 *InterruptVector = 15;
202 }
203 break;
204 }
205 }
206
207 return ret;
208}
209
210static NTSTATUS
213 IN PIRP Irp,
215{
216 ULONG CommandPortBase;
217 ULONG ControlPortBase;
218 ULONG BusMasterPortBase;
219 ULONG InterruptVector;
220 ULONG ListSize;
224
225 Status = GetCurrentResources(DeviceObject, &CommandPortBase,
226 &ControlPortBase, &BusMasterPortBase, &InterruptVector);
227 if (!NT_SUCCESS(Status))
228 return Status;
229
230 DPRINT("IDE Channel %lu: IO %x and %x, BM %lx, Irq %lu\n",
231 ((PPDO_DEVICE_EXTENSION)DeviceObject->DeviceExtension)->Channel,
232 CommandPortBase, ControlPortBase,
233 BusMasterPortBase, InterruptVector);
234
235 /* FIXME: what to do with BusMasterPortBase? */
236
237 ListSize = sizeof(IO_RESOURCE_REQUIREMENTS_LIST)
238 + 2 * sizeof(IO_RESOURCE_DESCRIPTOR);
240 if (!RequirementsList)
242
244 RequirementsList->ListSize = ListSize;
245 RequirementsList->AlternativeLists = 1;
246
247 RequirementsList->List[0].Version = 1;
248 RequirementsList->List[0].Revision = 1;
249 RequirementsList->List[0].Count = 3;
250
251 Descriptor = &RequirementsList->List[0].Descriptors[0];
252
253 /* Command port base */
254 Descriptor->Option = 0; /* Required */
256 Descriptor->ShareDisposition = CmResourceShareDeviceExclusive;
260 Descriptor->u.Port.Length = 8;
261 Descriptor->u.Port.Alignment = 1;
262 Descriptor->u.Port.MinimumAddress.QuadPart = (ULONGLONG)CommandPortBase;
263 Descriptor->u.Port.MaximumAddress.QuadPart = (ULONGLONG)(CommandPortBase + Descriptor->u.Port.Length - 1);
264 Descriptor++;
265
266 /* Control port base */
267 Descriptor->Option = 0; /* Required */
269 Descriptor->ShareDisposition = CmResourceShareDeviceExclusive;
273 Descriptor->u.Port.Length = 1;
274 Descriptor->u.Port.Alignment = 1;
275 Descriptor->u.Port.MinimumAddress.QuadPart = (ULONGLONG)ControlPortBase;
276 Descriptor->u.Port.MaximumAddress.QuadPart = (ULONGLONG)(ControlPortBase + Descriptor->u.Port.Length - 1);
277 Descriptor++;
278
279 /* Interrupt */
280 Descriptor->Option = 0; /* Required */
282 Descriptor->ShareDisposition = CmResourceShareShared;
284 Descriptor->u.Interrupt.MinimumVector = InterruptVector;
285 Descriptor->u.Interrupt.MaximumVector = InterruptVector;
286
288 return STATUS_SUCCESS;
289}
290
291static NTSTATUS
294 IN PIRP Irp,
296{
297 PPDO_DEVICE_EXTENSION DeviceExtension;
298 ULONG DeviceTextType;
301
302 DeviceTextType = IoGetCurrentIrpStackLocation(Irp)->Parameters.QueryDeviceText.DeviceTextType;
303 DeviceExtension = (PPDO_DEVICE_EXTENSION)DeviceObject->DeviceExtension;
304
305 switch (DeviceTextType)
306 {
309 {
310 DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_DEVICE_TEXT / %S\n",
311 DeviceTextType == DeviceTextDescription ? L"DeviceTextDescription" : L"DeviceTextLocationInformation");
312 if (DeviceExtension->Channel == 0)
313 SourceString = L"Primary channel";
314 else
315 SourceString = L"Secondary channel";
316 break;
317 }
318 default:
319 DPRINT1("IRP_MJ_PNP / IRP_MN_QUERY_DEVICE_TEXT / unknown type 0x%lx\n", DeviceTextType);
320 ASSERT(FALSE);
322 }
323
325 {
326 *Information = (ULONG_PTR)String.Buffer;
327 return STATUS_SUCCESS;
328 }
329 else
331}
332
333static NTSTATUS
336 OUT PDEVICE_RELATIONS* pDeviceRelations)
337{
338 PFDO_DEVICE_EXTENSION DeviceExtension;
339 PDEVICE_RELATIONS DeviceRelations;
340
341 DeviceExtension = (PFDO_DEVICE_EXTENSION)DeviceObject->DeviceExtension;
342 ASSERT(DeviceExtension->Common.IsFDO);
343
344 DeviceRelations = (PDEVICE_RELATIONS)ExAllocatePool(
345 PagedPool,
346 sizeof(DEVICE_RELATIONS));
347 if (!DeviceRelations)
349
351 DeviceRelations->Count = 1;
352 DeviceRelations->Objects[0] = DeviceObject;
353
354 *pDeviceRelations = DeviceRelations;
355 return STATUS_SUCCESS;
356}
357
361 IN PIRP Irp)
362{
365 ULONG_PTR Information = Irp->IoStatus.Information;
367
369 MinorFunction = Stack->MinorFunction;
370
371 switch (MinorFunction)
372 {
373 /* FIXME:
374 * Those are required:
375 * IRP_MN_START_DEVICE (done)
376 * IRP_MN_QUERY_STOP_DEVICE
377 * IRP_MN_STOP_DEVICE
378 * IRP_MN_CANCEL_STOP_DEVICE
379 * IRP_MN_QUERY_REMOVE_DEVICE
380 * IRP_MN_REMOVE_DEVICE
381 * IRP_MN_CANCEL_REMOVE_DEVICE
382 * IRP_MN_SURPRISE_REMOVAL
383 * IRP_MN_QUERY_CAPABILITIES (done)
384 * IRP_MN_QUERY_DEVICE_RELATIONS / TargetDeviceRelations (done)
385 * IRP_MN_QUERY_ID / BusQueryDeviceID (done)
386 * Those may be required/optional:
387 * IRP_MN_DEVICE_USAGE_NOTIFICATION
388 * IRP_MN_QUERY_RESOURCES
389 * IRP_MN_QUERY_RESOURCE_REQUIREMENTS (done)
390 * IRP_MN_QUERY_DEVICE_TEXT
391 * IRP_MN_QUERY_BUS_INFORMATION
392 * IRP_MN_QUERY_INTERFACE
393 * IRP_MN_READ_CONFIG
394 * IRP_MN_WRITE_CONFIG
395 * IRP_MN_EJECT
396 * IRP_MN_SET_LOCK
397 * Those are optional:
398 * IRP_MN_QUERY_DEVICE_RELATIONS / EjectionRelations
399 * IRP_MN_QUERY_ID / BusQueryHardwareIDs (done)
400 * IRP_MN_QUERY_ID / BusQueryCompatibleIDs (done)
401 * IRP_MN_QUERY_ID / BusQueryInstanceID (done)
402 */
403 case IRP_MN_START_DEVICE: /* 0x00 */
404 {
405 DPRINT("IRP_MJ_PNP / IRP_MN_START_DEVICE\n");
407 break;
408 }
409 case IRP_MN_QUERY_REMOVE_DEVICE: /* 0x01 */
410 {
411 DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_REMOVE_DEVICE\n");
413 break;
414 }
415 case IRP_MN_QUERY_DEVICE_RELATIONS: /* 0x07 */
416 {
417 switch (Stack->Parameters.QueryDeviceRelations.Type)
418 {
420 {
421 PDEVICE_RELATIONS DeviceRelations = NULL;
422 DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_DEVICE_RELATIONS / TargetDeviceRelation\n");
424 Information = (ULONG_PTR)DeviceRelations;
425 break;
426 }
427 default:
428 {
429 DPRINT1("IRP_MJ_PNP / IRP_MN_QUERY_DEVICE_RELATIONS / Unknown type 0x%lx\n",
430 Stack->Parameters.QueryDeviceRelations.Type);
431 Status = Irp->IoStatus.Status;
432 break;
433 }
434 }
435 break;
436 }
437 case IRP_MN_QUERY_CAPABILITIES: /* 0x09 */
438 {
440 ULONG i;
441 DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_CAPABILITIES\n");
442
443 DeviceCapabilities = (PDEVICE_CAPABILITIES)Stack->Parameters.DeviceCapabilities.Capabilities;
444 /* FIXME: capabilities can change with connected device */
445 DeviceCapabilities->LockSupported = FALSE;
446 DeviceCapabilities->EjectSupported = FALSE;
447 DeviceCapabilities->Removable = TRUE;
448 DeviceCapabilities->DockDevice = FALSE;
449 DeviceCapabilities->UniqueID = FALSE;
450 DeviceCapabilities->SilentInstall = FALSE;
451 DeviceCapabilities->RawDeviceOK = FALSE;
452 DeviceCapabilities->SurpriseRemovalOK = TRUE;
453 DeviceCapabilities->HardwareDisabled = FALSE; /* FIXME */
454 //DeviceCapabilities->NoDisplayInUI = FALSE; /* FIXME */
455 DeviceCapabilities->DeviceState[0] = PowerDeviceD0; /* FIXME */
456 for (i = 0; i < PowerSystemMaximum; i++)
457 DeviceCapabilities->DeviceState[i] = PowerDeviceD3; /* FIXME */
458 //DeviceCapabilities->DeviceWake = PowerDeviceUndefined; /* FIXME */
459 DeviceCapabilities->D1Latency = 0; /* FIXME */
460 DeviceCapabilities->D2Latency = 0; /* FIXME */
461 DeviceCapabilities->D3Latency = 0; /* FIXME */
463 break;
464 }
465 case IRP_MN_QUERY_RESOURCES: /* 0x0a */
466 {
467 /* This IRP is optional; do nothing */
468 Information = Irp->IoStatus.Information;
469 Status = Irp->IoStatus.Status;
470 break;
471 }
473 {
474 DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_RESOURCE_REQUIREMENTS\n");
476 break;
477 }
478 case IRP_MN_QUERY_DEVICE_TEXT: /* 0x0c */
479 {
481 break;
482 }
484 {
485 DPRINT("IRP_MJ_PNP / IRP_MN_FILTER_RESOURCE_REQUIREMENTS\n");
486 Information = Irp->IoStatus.Information;
487 Status = Irp->IoStatus.Status;
488 break;
489 }
490 case IRP_MN_QUERY_ID: /* 0x13 */
491 {
493 break;
494 }
495 case IRP_MN_QUERY_PNP_DEVICE_STATE: /* 0x14 */
496 {
497 DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_PNP_DEVICE_STATE\n");
500 break;
501 }
502 case IRP_MN_QUERY_BUS_INFORMATION: /* 0x15 */
503 {
504 PPNP_BUS_INFORMATION BusInfo;
505 DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_BUS_INFORMATION\n");
506
508 if (!BusInfo)
510 else
511 {
512 /*RtlCopyMemory(
513 &BusInfo->BusTypeGuid,
514 &GUID_DEVINTERFACE_XXX,
515 sizeof(GUID));*/
516 BusInfo->LegacyBusType = PNPBus;
517 BusInfo->BusNumber = 0; /* FIXME */
518 Information = (ULONG_PTR)BusInfo;
520 }
521 break;
522 }
523 default:
524 {
525 /* We can't forward request to the lower driver, because
526 * we are a Pdo, so we don't have lower driver... */
527 DPRINT1("IRP_MJ_PNP / Unknown minor function 0x%lx\n", MinorFunction);
528 Information = Irp->IoStatus.Information;
529 Status = Irp->IoStatus.Status;
530 }
531 }
532
533 Irp->IoStatus.Information = Information;
534 Irp->IoStatus.Status = Status;
536 return Status;
537}
struct _IO_RESOURCE_REQUIREMENTS_LIST IO_RESOURCE_REQUIREMENTS_LIST
LONG NTSTATUS
Definition: precomp.h:26
#define DPRINT1
Definition: precomp.h:8
Definition: bufpool.h:45
_In_ BUS_QUERY_ID_TYPE IdType
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NTSYSAPI BOOLEAN NTAPI RtlCreateUnicodeString(PUNICODE_STRING DestinationString, PCWSTR SourceString)
_In_ PIRP Irp
Definition: csq.h:116
#define NULL
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Definition: types.h:120
#define FALSE
Definition: types.h:117
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Definition: precomp.h:40
struct _FDO_DEVICE_EXTENSION * PFDO_DEVICE_EXTENSION
struct _PDO_DEVICE_EXTENSION * PPDO_DEVICE_EXTENSION
switch(r->id)
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#define ULONG_PTR
Definition: config.h:101
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#define ExAllocatePool(type, size)
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Status
Definition: gdiplustypes.h:25
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
#define RTL_DUPLICATE_UNICODE_STRING_NULL_TERMINATE
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@ PNPBus
Definition: hwresource.cpp:152
#define CmResourceTypePort
Definition: hwresource.cpp:123
#define CmResourceTypeInterrupt
Definition: hwresource.cpp:124
NTSTATUS DuplicateUnicodeString(IN ULONG Flags, IN PCUNICODE_STRING SourceString, OUT PUNICODE_STRING DestinationString)
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PCONFIGURATION_INFORMATION NTAPI IoGetConfigurationInformation(VOID)
Definition: iorsrce.c:830
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Definition: cmtypes.h:113
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Definition: cmtypes.h:109
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Definition: cmtypes.h:112
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Definition: cmtypes.h:143
_Out_ _Inout_ POEM_STRING _In_ PCUNICODE_STRING SourceString
Definition: rtlfuncs.h:1910
NTSYSAPI VOID NTAPI RtlInitUnicodeString(PUNICODE_STRING DestinationString, PCWSTR SourceString)
#define UNICODE_NULL
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Definition: irp.c:1240
@ PowerSystemMaximum
Definition: ntpoapi.h:42
@ PowerDeviceD0
Definition: ntpoapi.h:49
@ PowerDeviceD3
Definition: ntpoapi.h:52
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static NTSTATUS PciIdeXPdoQueryDeviceRelations(IN PDEVICE_OBJECT DeviceObject, OUT PDEVICE_RELATIONS *pDeviceRelations)
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static NTSTATUS GetCurrentResources(IN PDEVICE_OBJECT DeviceObject, OUT PULONG CommandPortBase, OUT PULONG ControlPortBase, OUT PULONG BusMasterPortBase, OUT PULONG InterruptVector)
Definition: pdo.c:125
static NTSTATUS PciIdeXPdoQueryResourceRequirements(IN PDEVICE_OBJECT DeviceObject, IN PIRP Irp, OUT ULONG_PTR *Information)
Definition: pdo.c:211
NTSTATUS NTAPI PciIdeXPdoPnpDispatch(IN PDEVICE_OBJECT DeviceObject, IN PIRP Irp)
Definition: pdo.c:359
static NTSTATUS PciIdeXPdoQueryDeviceText(IN PDEVICE_OBJECT DeviceObject, IN PIRP Irp, OUT ULONG_PTR *Information)
Definition: pdo.c:292
static NTSTATUS PciIdeXPdoQueryId(IN PDEVICE_OBJECT DeviceObject, IN PIRP Irp, OUT ULONG_PTR *Information)
Definition: pdo.c:17
PGET_SET_DEVICE_DATA GetBusData
Definition: iotypes.h:916
PVOID DeviceExtension
Definition: env_spec_w32.h:418
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Definition: iotypes.h:2163
COMMON_DEVICE_EXTENSION Common
Definition: pci.h:84
PBUS_INTERFACE_STANDARD BusInterface
Definition: pciidex.h:23
struct _NAMED_PIPE_CREATE_PARAMETERS * Parameters
Definition: iotypes.h:3128
PDEVICE_OBJECT ControllerFdo
Definition: pciidex.h:38
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void * Buffer
Definition: sprintf.c:453
unsigned short MaximumLength
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Definition: typedefs.h:57
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Definition: typedefs.h:36
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uint32_t ULONG_PTR
Definition: typedefs.h:65
#define IN
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uint32_t ULONG
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_In_ WDFCOLLECTION _In_ ULONG Index
_In_ PDEVICE_OBJECT DeviceObject
Definition: wdfdevice.h:2055
_Must_inspect_result_ _In_ WDFDEVICE _In_ WDFSTRING String
Definition: wdfdevice.h:2433
_In_ UCHAR _In_ UCHAR MinorFunction
Definition: wdfdevice.h:1699
_Must_inspect_result_ _In_ WDFIOTARGET _In_opt_ WDFREQUEST _In_opt_ PWDF_MEMORY_DESCRIPTOR _In_opt_ PLONGLONG _In_opt_ PWDF_REQUEST_SEND_OPTIONS _Out_opt_ PULONG_PTR BytesRead
Definition: wdfiotarget.h:870
_In_ WDFREQUEST _In_ PIO_STACK_LOCATION Stack
Definition: wdfrequest.h:639
_In_ WDFREQUEST _In_ NTSTATUS _In_ ULONG_PTR Information
Definition: wdfrequest.h:1049
_In_ WDFIORESREQLIST RequirementsList
Definition: wdfresource.h:65
_Must_inspect_result_ _In_ WDFIORESLIST _In_ PIO_RESOURCE_DESCRIPTOR Descriptor
Definition: wdfresource.h:342
#define DeviceCapabilities
Definition: wingdi.h:4449
struct _PNP_BUS_INFORMATION * PPNP_BUS_INFORMATION
@ CmResourceShareDeviceExclusive
Definition: cmtypes.h:241
@ CmResourceShareShared
Definition: cmtypes.h:243
__drv_aliasesMem FORCEINLINE PIO_STACK_LOCATION IoGetCurrentIrpStackLocation(_In_ PIRP Irp)
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@ TargetDeviceRelation
Definition: iotypes.h:2156
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#define PNP_DEVICE_NOT_DISABLEABLE
Definition: iotypes.h:1006
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Definition: iotypes.h:3644
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Definition: iotypes.h:4233
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Definition: iotypes.h:598
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#define IRP_MN_QUERY_RESOURCE_REQUIREMENTS
#define IRP_MN_QUERY_ID
#define PCI_ADDRESS_IO_SPACE
Definition: iotypes.h:4230
#define IRP_MN_FILTER_RESOURCE_REQUIREMENTS
struct _DEVICE_RELATIONS * PDEVICE_RELATIONS
#define IRP_MN_QUERY_DEVICE_RELATIONS
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Definition: iotypes.h:3594
#define IRP_MN_QUERY_DEVICE_TEXT
#define IRP_MN_QUERY_CAPABILITIES
#define IRP_MN_QUERY_RESOURCES
* PDEVICE_CAPABILITIES
Definition: iotypes.h:965
@ DeviceTextLocationInformation
Definition: iotypes.h:2946
@ DeviceTextDescription
Definition: iotypes.h:2945
@ BusQueryCompatibleIDs
Definition: iotypes.h:2938
@ BusQueryInstanceID
Definition: iotypes.h:2939
@ BusQueryDeviceID
Definition: iotypes.h:2936
@ BusQueryHardwareIDs
Definition: iotypes.h:2937
#define IRP_MN_QUERY_BUS_INFORMATION
#define IRP_MN_QUERY_REMOVE_DEVICE
#define ObReferenceObject
Definition: obfuncs.h:204
__wchar_t WCHAR
Definition: xmlstorage.h:180