ReactOS  0.4.14-dev-368-gfa26425
pdo.c
Go to the documentation of this file.
1 /*
2  * COPYRIGHT: See COPYING in the top level directory
3  * PROJECT: PCI IDE bus driver extension
4  * FILE: drivers/storage/pciidex/pdo.c
5  * PURPOSE: IRP_MJ_PNP operations for PDOs
6  * PROGRAMMERS: Hervé Poussineau (hpoussin@reactos.org)
7  */
8 
9 #include "pciidex.h"
10 
11 #include <stdio.h>
12 
13 #define NDEBUG
14 #include <debug.h>
15 
16 static NTSTATUS
19  IN PIRP Irp,
21 {
22  PPDO_DEVICE_EXTENSION DeviceExtension;
23  PFDO_DEVICE_EXTENSION FdoDeviceExtension;
24  WCHAR Buffer[256];
25  ULONG Index = 0;
26  ULONG IdType;
30 
33  FdoDeviceExtension = (PFDO_DEVICE_EXTENSION)DeviceExtension->ControllerFdo->DeviceExtension;
34 
35  switch (IdType)
36  {
37  case BusQueryDeviceID:
38  {
39  DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_ID / BusQueryDeviceID\n");
40  RtlInitUnicodeString(&SourceString, L"PCIIDE\\IDEChannel");
41  break;
42  }
44  {
45  DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_ID / BusQueryHardwareIDs\n");
46 
47  switch (FdoDeviceExtension->VendorId)
48  {
49  case 0x0e11:
50  Index += swprintf(&Buffer[Index], L"Compaq-%04x", FdoDeviceExtension->DeviceId) + 1;
51  break;
52  case 0x1039:
53  Index += swprintf(&Buffer[Index], L"SiS-%04x", FdoDeviceExtension->DeviceId) + 1;
54  break;
55  case 0x1050:
56  Index += swprintf(&Buffer[Index], L"WinBond-%04x", FdoDeviceExtension->DeviceId) + 1;
57  break;
58  case 0x1095:
59  Index += swprintf(&Buffer[Index], L"CMD-%04x", FdoDeviceExtension->DeviceId) + 1;
60  break;
61  case 0x8086:
62  {
63  switch (FdoDeviceExtension->DeviceId)
64  {
65  case 0x1230:
66  Index += swprintf(&Buffer[Index], L"Intel-PIIX") + 1;
67  break;
68  case 0x7010:
69  Index += swprintf(&Buffer[Index], L"Intel-PIIX3") + 1;
70  break;
71  case 0x7111:
72  Index += swprintf(&Buffer[Index], L"Intel-PIIX4") + 1;
73  break;
74  default:
75  Index += swprintf(&Buffer[Index], L"Intel-%04x", FdoDeviceExtension->DeviceId) + 1;
76  break;
77  }
78  break;
79  }
80  default:
81  break;
82  }
83  if (DeviceExtension->Channel == 0)
84  Index += swprintf(&Buffer[Index], L"Primary_IDE_Channel") + 1;
85  else
86  Index += swprintf(&Buffer[Index], L"Secondary_IDE_Channel") + 1;
87  Index += swprintf(&Buffer[Index], L"*PNP0600") + 1;
91  break;
92  }
94  {
95  DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_ID / BusQueryCompatibleIDs\n");
96 
97  Index += swprintf(&Buffer[Index], L"*PNP0600") + 1;
101  break;
102  }
103  case BusQueryInstanceID:
104  {
105  DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_ID / BusQueryInstanceID\n");
106  swprintf(Buffer, L"%lu", DeviceExtension->Channel);
108  break;
109  }
110  default:
111  DPRINT1("IRP_MJ_PNP / IRP_MN_QUERY_ID / unknown query id type 0x%lx\n", IdType);
112  ASSERT(FALSE);
113  return STATUS_NOT_SUPPORTED;
114  }
115 
118  &SourceString,
119  &String);
120  *Information = (ULONG_PTR)String.Buffer;
121  return Status;
122 }
123 
124 static NTSTATUS
127  OUT PULONG CommandPortBase,
128  OUT PULONG ControlPortBase,
129  OUT PULONG BusMasterPortBase,
130  OUT PULONG InterruptVector)
131 {
132  PPDO_DEVICE_EXTENSION DeviceExtension;
133  PFDO_DEVICE_EXTENSION FdoDeviceExtension;
134  ULONG BaseIndex;
136  PCI_COMMON_CONFIG PciConfig;
138 
140  FdoDeviceExtension = (PFDO_DEVICE_EXTENSION)DeviceExtension->ControllerFdo->DeviceExtension;
141  BaseIndex = DeviceExtension->Channel * 2;
142 
143  BytesRead = (*FdoDeviceExtension->BusInterface->GetBusData)(
144  FdoDeviceExtension->BusInterface->Context,
146  &PciConfig,
147  0,
150  return STATUS_IO_DEVICE_ERROR;
151 
152  /* We have found a known native pci ide controller */
153  if ((PciConfig.ProgIf & 0x80) && (PciConfig.u.type0.BaseAddresses[4] & PCI_ADDRESS_IO_SPACE))
154  {
155  DPRINT("Found IDE Bus Master controller!\n");
156  *BusMasterPortBase = PciConfig.u.type0.BaseAddresses[4] & PCI_ADDRESS_IO_ADDRESS_MASK;
157  DPRINT(" IDE Bus Master Registers at IO %lx\n", *BusMasterPortBase);
158  }
159  else
160  {
161  *BusMasterPortBase = 0;
162  }
163 
164  if ((PciConfig.ProgIf >> BaseIndex) & 0x1)
165  {
166  /* Native mode */
167  if ((PciConfig.u.type0.BaseAddresses[BaseIndex + 0] & PCI_ADDRESS_IO_SPACE) &&
168  (PciConfig.u.type0.BaseAddresses[BaseIndex + 1] & PCI_ADDRESS_IO_SPACE))
169  {
170  /* Channel is enabled */
171  *CommandPortBase = PciConfig.u.type0.BaseAddresses[BaseIndex + 0] & PCI_ADDRESS_IO_ADDRESS_MASK;
172  *ControlPortBase = PciConfig.u.type0.BaseAddresses[BaseIndex + 1] & PCI_ADDRESS_IO_ADDRESS_MASK;
173  *InterruptVector = PciConfig.u.type0.InterruptLine;
175  }
176  }
177  else
178  {
179  /* Compatibility mode */
180  switch (DeviceExtension->Channel)
181  {
182  case 0:
183  if (IoGetConfigurationInformation()->AtDiskPrimaryAddressClaimed)
185  else
186  {
187  *CommandPortBase = 0x1F0;
188  *ControlPortBase = 0x3F6;
189  *InterruptVector = 14;
191  }
192  break;
193  case 1:
194  if (IoGetConfigurationInformation()->AtDiskSecondaryAddressClaimed)
196  else
197  {
198  *CommandPortBase = 0x170;
199  *ControlPortBase = 0x376;
200  *InterruptVector = 15;
202  }
203  break;
204  }
205  }
206 
207  return ret;
208 }
209 
210 static NTSTATUS
213  IN PIRP Irp,
215 {
216  ULONG CommandPortBase;
217  ULONG ControlPortBase;
218  ULONG BusMasterPortBase;
219  ULONG InterruptVector;
220  ULONG ListSize;
221  PIO_RESOURCE_REQUIREMENTS_LIST RequirementsList;
224 
225  Status = GetCurrentResources(DeviceObject, &CommandPortBase,
226  &ControlPortBase, &BusMasterPortBase, &InterruptVector);
227  if (!NT_SUCCESS(Status))
228  return Status;
229 
230  DPRINT("IDE Channel %lu: IO %x and %x, BM %lx, Irq %lu\n",
232  CommandPortBase, ControlPortBase,
233  BusMasterPortBase, InterruptVector);
234 
235  /* FIXME: what to do with BusMasterPortBase? */
236 
237  ListSize = sizeof(IO_RESOURCE_REQUIREMENTS_LIST)
238  + 2 * sizeof(IO_RESOURCE_DESCRIPTOR);
239  RequirementsList = ExAllocatePool(PagedPool, ListSize);
240  if (!RequirementsList)
242 
243  RtlZeroMemory(RequirementsList, ListSize);
244  RequirementsList->ListSize = ListSize;
245  RequirementsList->AlternativeLists = 1;
246 
247  RequirementsList->List[0].Version = 1;
248  RequirementsList->List[0].Revision = 1;
249  RequirementsList->List[0].Count = 3;
250 
251  Descriptor = &RequirementsList->List[0].Descriptors[0];
252 
253  /* Command port base */
254  Descriptor->Option = 0; /* Required */
256  Descriptor->ShareDisposition = CmResourceShareDeviceExclusive;
260  Descriptor->u.Port.Length = 7;
261  Descriptor->u.Port.Alignment = 1;
262  Descriptor->u.Port.MinimumAddress.QuadPart = (ULONGLONG)CommandPortBase;
263  Descriptor->u.Port.MaximumAddress.QuadPart = (ULONGLONG)(CommandPortBase + 7 - 1);
264  Descriptor++;
265 
266  /* Control port base */
267  Descriptor->Option = 0; /* Required */
269  Descriptor->ShareDisposition = CmResourceShareDeviceExclusive;
273  Descriptor->u.Port.Length = 1;
274  Descriptor->u.Port.Alignment = 1;
275  Descriptor->u.Port.MinimumAddress.QuadPart = (ULONGLONG)ControlPortBase;
276  Descriptor->u.Port.MaximumAddress.QuadPart = (ULONGLONG)(ControlPortBase + 1 - 1);
277  Descriptor++;
278 
279  /* Interrupt */
280  Descriptor->Option = 0; /* Required */
282  Descriptor->ShareDisposition = CmResourceShareShared;
284  Descriptor->u.Interrupt.MinimumVector = InterruptVector;
285  Descriptor->u.Interrupt.MaximumVector = InterruptVector;
286 
287  *Information = (ULONG_PTR)RequirementsList;
288  return STATUS_SUCCESS;
289 }
290 
291 static NTSTATUS
294  IN PIRP Irp,
296 {
297  PPDO_DEVICE_EXTENSION DeviceExtension;
298  ULONG DeviceTextType;
301 
302  DeviceTextType = IoGetCurrentIrpStackLocation(Irp)->Parameters.QueryDeviceText.DeviceTextType;
304 
305  switch (DeviceTextType)
306  {
309  {
310  DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_DEVICE_TEXT / %S\n",
311  DeviceTextType == DeviceTextDescription ? L"DeviceTextDescription" : L"DeviceTextLocationInformation");
312  if (DeviceExtension->Channel == 0)
313  SourceString = L"Primary channel";
314  else
315  SourceString = L"Secondary channel";
316  break;
317  }
318  default:
319  DPRINT1("IRP_MJ_PNP / IRP_MN_QUERY_DEVICE_TEXT / unknown type 0x%lx\n", DeviceTextType);
320  ASSERT(FALSE);
321  return STATUS_NOT_SUPPORTED;
322  }
323 
325  {
326  *Information = (ULONG_PTR)String.Buffer;
327  return STATUS_SUCCESS;
328  }
329  else
331 }
332 
333 static NTSTATUS
336  OUT PDEVICE_RELATIONS* pDeviceRelations)
337 {
338  PFDO_DEVICE_EXTENSION DeviceExtension;
339  PDEVICE_RELATIONS DeviceRelations;
340 
342  ASSERT(DeviceExtension->Common.IsFDO);
343 
344  DeviceRelations = (PDEVICE_RELATIONS)ExAllocatePool(
345  PagedPool,
346  sizeof(DEVICE_RELATIONS));
347  if (!DeviceRelations)
349 
351  DeviceRelations->Count = 1;
352  DeviceRelations->Objects[0] = DeviceObject;
353 
354  *pDeviceRelations = DeviceRelations;
355  return STATUS_SUCCESS;
356 }
357 
361  IN PIRP Irp)
362 {
364  PIO_STACK_LOCATION Stack;
365  ULONG_PTR Information = Irp->IoStatus.Information;
367 
369  MinorFunction = Stack->MinorFunction;
370 
371  switch (MinorFunction)
372  {
373  /* FIXME:
374  * Those are required:
375  * IRP_MN_START_DEVICE (done)
376  * IRP_MN_QUERY_STOP_DEVICE
377  * IRP_MN_STOP_DEVICE
378  * IRP_MN_CANCEL_STOP_DEVICE
379  * IRP_MN_QUERY_REMOVE_DEVICE
380  * IRP_MN_REMOVE_DEVICE
381  * IRP_MN_CANCEL_REMOVE_DEVICE
382  * IRP_MN_SURPRISE_REMOVAL
383  * IRP_MN_QUERY_CAPABILITIES (done)
384  * IRP_MN_QUERY_DEVICE_RELATIONS / TargetDeviceRelations (done)
385  * IRP_MN_QUERY_ID / BusQueryDeviceID (done)
386  * Those may be required/optional:
387  * IRP_MN_DEVICE_USAGE_NOTIFICATION
388  * IRP_MN_QUERY_RESOURCES
389  * IRP_MN_QUERY_RESOURCE_REQUIREMENTS (done)
390  * IRP_MN_QUERY_DEVICE_TEXT
391  * IRP_MN_QUERY_BUS_INFORMATION
392  * IRP_MN_QUERY_INTERFACE
393  * IRP_MN_READ_CONFIG
394  * IRP_MN_WRITE_CONFIG
395  * IRP_MN_EJECT
396  * IRP_MN_SET_LOCK
397  * Those are optional:
398  * IRP_MN_QUERY_DEVICE_RELATIONS / EjectionRelations
399  * IRP_MN_QUERY_ID / BusQueryHardwareIDs (done)
400  * IRP_MN_QUERY_ID / BusQueryCompatibleIDs (done)
401  * IRP_MN_QUERY_ID / BusQueryInstanceID (done)
402  */
403  case IRP_MN_START_DEVICE: /* 0x00 */
404  {
405  DPRINT("IRP_MJ_PNP / IRP_MN_START_DEVICE\n");
407  break;
408  }
409  case IRP_MN_QUERY_REMOVE_DEVICE: /* 0x01 */
410  {
411  DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_REMOVE_DEVICE\n");
413  break;
414  }
415  case IRP_MN_QUERY_DEVICE_RELATIONS: /* 0x07 */
416  {
417  switch (Stack->Parameters.QueryDeviceRelations.Type)
418  {
420  {
421  PDEVICE_RELATIONS DeviceRelations = NULL;
422  DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_DEVICE_RELATIONS / TargetDeviceRelation\n");
424  Information = (ULONG_PTR)DeviceRelations;
425  break;
426  }
427  default:
428  {
429  DPRINT1("IRP_MJ_PNP / IRP_MN_QUERY_DEVICE_RELATIONS / Unknown type 0x%lx\n",
430  Stack->Parameters.QueryDeviceRelations.Type);
431  Status = Irp->IoStatus.Status;
432  break;
433  }
434  }
435  break;
436  }
437  case IRP_MN_QUERY_CAPABILITIES: /* 0x09 */
438  {
440  ULONG i;
441  DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_CAPABILITIES\n");
442 
443  DeviceCapabilities = (PDEVICE_CAPABILITIES)Stack->Parameters.DeviceCapabilities.Capabilities;
444  /* FIXME: capabilities can change with connected device */
445  DeviceCapabilities->LockSupported = FALSE;
446  DeviceCapabilities->EjectSupported = FALSE;
447  DeviceCapabilities->Removable = TRUE;
448  DeviceCapabilities->DockDevice = FALSE;
449  DeviceCapabilities->UniqueID = FALSE;
450  DeviceCapabilities->SilentInstall = FALSE;
451  DeviceCapabilities->RawDeviceOK = FALSE;
452  DeviceCapabilities->SurpriseRemovalOK = TRUE;
453  DeviceCapabilities->HardwareDisabled = FALSE; /* FIXME */
454  //DeviceCapabilities->NoDisplayInUI = FALSE; /* FIXME */
455  DeviceCapabilities->DeviceState[0] = PowerDeviceD0; /* FIXME */
456  for (i = 0; i < PowerSystemMaximum; i++)
457  DeviceCapabilities->DeviceState[i] = PowerDeviceD3; /* FIXME */
458  //DeviceCapabilities->DeviceWake = PowerDeviceUndefined; /* FIXME */
459  DeviceCapabilities->D1Latency = 0; /* FIXME */
460  DeviceCapabilities->D2Latency = 0; /* FIXME */
461  DeviceCapabilities->D3Latency = 0; /* FIXME */
463  break;
464  }
465  case IRP_MN_QUERY_RESOURCES: /* 0x0a */
466  {
467  /* This IRP is optional; do nothing */
468  Information = Irp->IoStatus.Information;
469  Status = Irp->IoStatus.Status;
470  break;
471  }
472  case IRP_MN_QUERY_RESOURCE_REQUIREMENTS: /* 0x0b */
473  {
474  DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_RESOURCE_REQUIREMENTS\n");
476  break;
477  }
478  case IRP_MN_QUERY_DEVICE_TEXT: /* 0x0c */
479  {
481  break;
482  }
483  case IRP_MN_FILTER_RESOURCE_REQUIREMENTS: /* 0x0d */
484  {
485  DPRINT("IRP_MJ_PNP / IRP_MN_FILTER_RESOURCE_REQUIREMENTS\n");
486  Information = Irp->IoStatus.Information;
487  Status = Irp->IoStatus.Status;
488  break;
489  }
490  case IRP_MN_QUERY_ID: /* 0x13 */
491  {
493  break;
494  }
495  case IRP_MN_QUERY_PNP_DEVICE_STATE: /* 0x14 */
496  {
497  DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_PNP_DEVICE_STATE\n");
500  break;
501  }
502  case IRP_MN_QUERY_BUS_INFORMATION: /* 0x15 */
503  {
504  PPNP_BUS_INFORMATION BusInfo;
505  DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_BUS_INFORMATION\n");
506 
508  if (!BusInfo)
510  else
511  {
512  /*RtlCopyMemory(
513  &BusInfo->BusTypeGuid,
514  &GUID_DEVINTERFACE_XXX,
515  sizeof(GUID));*/
516  BusInfo->LegacyBusType = PNPBus;
517  BusInfo->BusNumber = 0; /* FIXME */
518  Information = (ULONG_PTR)BusInfo;
520  }
521  break;
522  }
523  default:
524  {
525  /* We can't forward request to the lower driver, because
526  * we are a Pdo, so we don't have lower driver... */
527  DPRINT1("IRP_MJ_PNP / Unknown minor function 0x%lx\n", MinorFunction);
528  Information = Irp->IoStatus.Information;
529  Status = Irp->IoStatus.Status;
530  }
531  }
532 
533  Irp->IoStatus.Information = Information;
534  Irp->IoStatus.Status = Status;
536  return Status;
537 }
PDEVICE_OBJECT ControllerFdo
Definition: pciidex.h:38
const uint16_t * PCWSTR
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Definition: iotypes.h:566
NTSYSAPI VOID NTAPI RtlInitUnicodeString(PUNICODE_STRING DestinationString, PCWSTR SourceString)
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:261
#define ULONG_PTR
Definition: config.h:101
struct _NAMED_PIPE_CREATE_PARAMETERS * Parameters
Definition: iotypes.h:2772
IN BOOLEAN OUT PSTR Buffer
Definition: progress.h:34
return STATUS_SUCCESS
Definition: btrfs.c:2938
#define PCI_ADDRESS_IO_SPACE
Definition: iotypes.h:3874
unsigned short MaximumLength
Definition: sprintf.c:452
INTERFACE_TYPE LegacyBusType
Definition: cmtypes.h:363
#define IRP_MN_QUERY_PNP_DEVICE_STATE
_Must_inspect_result_ _In_ PFILE_OBJECT _In_opt_ PLARGE_INTEGER _In_ ULONG _In_ FLT_IO_OPERATION_FLAGS _Out_opt_ PULONG BytesRead
Definition: fltkernel.h:1255
Iosb Information
Definition: create.c:4377
#define IRP_MN_QUERY_CAPABILITIES
#define PCI_COMMON_HDR_LENGTH
Definition: iotypes.h:3238
_In_ PSTORAGE_PROPERTY_ID _Outptr_ PSTORAGE_DESCRIPTOR_HEADER * Descriptor
Definition: classpnp.h:966