ReactOS 0.4.16-dev-2633-g8dc9e50
ahci_io.c File Reference
#include "pciidex.h"
Include dependency graph for ahci_io.c:

Go to the source code of this file.

Functions

static VOID AtaAhciBeginHostToDeviceFis (_In_ ATA_DEVICE_REQUEST *__restrict Request, _Out_ AHCI_FIS_HOST_TO_DEVICE *__restrict Fis)
 
static VOID AtaAhciBuildPacketCommandFis (_In_ ATA_DEVICE_REQUEST *__restrict Request, _Out_ AHCI_FIS_HOST_TO_DEVICE *__restrict Fis)
 
static VOID AtaAhciBuildAtaCommandFis (_In_ ATA_DEVICE_REQUEST *__restrict Request, _Out_ AHCI_FIS_HOST_TO_DEVICE *__restrict Fis)
 
static VOID AtaAhciTransferACMDRegion (_In_ VOID *__restrict Destination, _In_ VOID *__restrict Source, _In_ ATA_IO_CONTEXT_COMMON *__restrict Device)
 
 C_ASSERT (FIELD_OFFSET(ATA_DEVICE_REQUEST, Cdb) % sizeof(ULONG64)==0)
 
 C_ASSERT (FIELD_OFFSET(AHCI_COMMAND_TABLE, AtapiCommand) % sizeof(ULONG64)==0)
 
BOOLEAN AtaAhciStartIo (_In_ PVOID ChannelContext, _In_ PATA_DEVICE_REQUEST Request)
 
VOID AtaAhciPrepareIo (_In_ PVOID ChannelContext, _In_ PATA_DEVICE_REQUEST Request)
 
VOID AtaAhciPreparePrdTable (_In_ PVOID ChannelContext, _In_ PATA_DEVICE_REQUEST Request, _In_ SCATTER_GATHER_LIST *__restrict SgList)
 
BOOLEAN AtaAhciAllocateSlot (_In_ PVOID ChannelContext, _In_ PATA_DEVICE_REQUEST Request, _In_ BOOLEAN Allocate)
 
static VOID AtaAhciPortCompleteCommands (_In_ PCHANNEL_DATA_AHCI ChanData, _In_ ULONG CommandsCompleted)
 
static VOID AtaAhciPortHandleInterrupt (_In_ PCHANNEL_DATA_AHCI ChanData)
 
BOOLEAN NTAPI AtaAhciHbaIsr (_In_ PKINTERRUPT Interrupt, _In_ PVOID Context)
 

Function Documentation

◆ AtaAhciAllocateSlot()

BOOLEAN AtaAhciAllocateSlot ( _In_ PVOID  ChannelContext,
_In_ PATA_DEVICE_REQUEST  Request,
_In_ BOOLEAN  Allocate 
)

Definition at line 260 of file ahci_io.c.

264{
265 PCHANNEL_DATA_AHCI ChanData = ChannelContext;
266
267 if (Allocate)
268 {
269 /*
270 * We cannot issue commands to more than one device behind the Port Multiplier
271 * that supports only command-based switching.
272 */
273 if ((ChanData->ChanInfo & CHANNEL_FLAG_IS_PMP) &&
274 !(ChanData->ChanInfo & CHANNEL_FLAG_FBS_ENABLED))
275 {
276 if ((ChanData->LastPmpDeviceNumber != 0xFF) &&
277 (ChanData->LastPmpDeviceNumber != DEV_NUMBER(Request->Device)))
278 {
279 return FALSE;
280 }
281
282 ChanData->LastPmpDeviceNumber = DEV_NUMBER(Request->Device);
283
285 }
286 }
287 else
288 {
290 {
291 ChanData->LastPmpDeviceNumber = 0xFF;
292 }
293 }
294
295 return TRUE;
296}
_In_ PATA_DEVICE_REQUEST _In_ BOOLEAN Allocate
Definition: ata_shared.h:437
#define REQUEST_FLAG_DEVICE_EXCLUSIVE_ACCESS
Definition: ata_shared.h:350
#define TRUE
Definition: types.h:120
#define FALSE
Definition: types.h:117
#define CHANNEL_FLAG_IS_PMP
Definition: pciidex.h:272
#define CHANNEL_FLAG_FBS_ENABLED
Definition: pciidex.h:274
#define DEV_NUMBER(Device)
Definition: pciidex.h:56
UCHAR LastPmpDeviceNumber
Definition: pciidex.h:344
_In_ WDFREQUEST Request
Definition: wdfdevice.h:547

◆ AtaAhciBeginHostToDeviceFis()

static VOID AtaAhciBeginHostToDeviceFis ( _In_ ATA_DEVICE_REQUEST *__restrict  Request,
_Out_ AHCI_FIS_HOST_TO_DEVICE *__restrict  Fis 
)
static

Definition at line 16 of file ahci_io.c.

19{
20 RtlZeroMemory(Fis, sizeof(*Fis));
21
23 Fis->Flags = UPDATE_COMMAND | DEV_NUMBER(Request->Device);
24
26 Fis->Device = Request->TaskFile.DriveSelect;
27 else
28 Fis->Device = IDE_DRIVE_SELECT;
29
30 Fis->Control = IDE_DC_ALWAYS;
31}
#define UPDATE_COMMAND
Definition: ahci.h:360
#define AHCI_FIS_REGISTER_HOST_TO_DEVICE
Definition: ahci.h:39
#define IDE_DC_ALWAYS
Definition: hwidep.h:54
#define REQUEST_FLAG_SET_DEVICE_REGISTER
Definition: hwidep.h:170
#define IDE_DRIVE_SELECT
Definition: hwidep.h:56
#define RtlZeroMemory(Destination, Length)
Definition: typedefs.h:262

Referenced by AtaAhciPrepareIo().

◆ AtaAhciBuildAtaCommandFis()

static VOID AtaAhciBuildAtaCommandFis ( _In_ ATA_DEVICE_REQUEST *__restrict  Request,
_Out_ AHCI_FIS_HOST_TO_DEVICE *__restrict  Fis 
)
static

Definition at line 68 of file ahci_io.c.

71{
72 PATA_TASKFILE TaskFile = &Request->TaskFile;
73
74 Fis->Command = TaskFile->Command;
75 Fis->Features = TaskFile->Feature;
76 Fis->LbaLow = TaskFile->LowLba;
77 Fis->LbaMid = TaskFile->MidLba;
78 Fis->LbaHigh = TaskFile->HighLba;
79 Fis->SectorCount = TaskFile->SectorCount;
80
81 /* Unique queue tag */
82 if (Request->Flags & REQUEST_FLAG_NCQ)
83 Fis->SectorCount |= Request->Slot << 3;
84
85 if (Request->Flags & REQUEST_FLAG_LBA48)
86 {
87 Fis->LbaLowEx = TaskFile->LowLbaEx;
88 Fis->LbaMidEx = TaskFile->MidLbaEx;
89 Fis->LbaHighEx = TaskFile->HighLbaEx;
90 Fis->FeaturesEx = TaskFile->FeatureEx;
91 Fis->SectorCountEx = TaskFile->SectorCountEx;
92 }
93
95 Fis->Icc = TaskFile->Icc;
96
98 Fis->Auxiliary = TaskFile->Auxiliary;
99}
#define REQUEST_FLAG_NCQ
Definition: ata_shared.h:284
#define REQUEST_FLAG_SET_AUXILIARY_FIELD
Definition: ata_shared.h:318
#define REQUEST_FLAG_SET_ICC_FIELD
Definition: ata_shared.h:321
#define REQUEST_FLAG_LBA48
Definition: hwidep.h:167
UCHAR SectorCountEx
Definition: ata_shared.h:200
UCHAR SectorCount
Definition: hwidep.h:151
UCHAR Feature
Definition: hwidep.h:150
UCHAR MidLba
LBA bits 8-15.
Definition: hwidep.h:153
UCHAR LowLbaEx
LBA bits 24-31.
Definition: ata_shared.h:195
UCHAR HighLba
LBA bits 16-23.
Definition: hwidep.h:154
ULONG Auxiliary
Definition: ata_shared.h:202
UCHAR Icc
Isochronous Command Completion.
Definition: ata_shared.h:201
UCHAR FeatureEx
Definition: ata_shared.h:198
UCHAR HighLbaEx
LBA bits 40-47.
Definition: ata_shared.h:197
UCHAR Command
Definition: hwidep.h:147
UCHAR LowLba
LBA bits 0-7.
Definition: hwidep.h:152
UCHAR MidLbaEx
LBA bits 32-39.
Definition: ata_shared.h:196

Referenced by AtaAhciPrepareIo().

◆ AtaAhciBuildPacketCommandFis()

static VOID AtaAhciBuildPacketCommandFis ( _In_ ATA_DEVICE_REQUEST *__restrict  Request,
_Out_ AHCI_FIS_HOST_TO_DEVICE *__restrict  Fis 
)
static

Definition at line 35 of file ahci_io.c.

38{
39 Fis->Command = IDE_COMMAND_ATAPI_PACKET;
40
41 if (Request->Flags & REQUEST_FLAG_DMA)
42 {
43 /* DMA transfer */
44 if ((Request->Device->TransportFlags & DEVICE_NEED_DMA_DIRECTION) &&
46 {
47 /* Some SATA-to-PATA bridges require the DMADIR bit to be set */
48 Fis->Features = IDE_FEATURE_DMA | IDE_FEATURE_DMADIR;
49 }
50 else
51 {
52 Fis->Features = IDE_FEATURE_DMA;
53 }
54 }
55 else
56 {
58
59 /* PIO transfer */
60 ByteCount = min(Request->DataTransferLength, ATAPI_MAX_DRQ_DATA_BLOCK);
61 Fis->LbaMid = (UCHAR)ByteCount;
62 Fis->LbaHigh = ByteCount >> 8;
63 }
64}
#define REQUEST_FLAG_DATA_IN
Definition: ata_shared.h:287
#define DEVICE_NEED_DMA_DIRECTION
Definition: ata_shared.h:167
#define REQUEST_FLAG_DMA
Definition: ata_shared.h:278
#define IDE_FEATURE_DMA
Definition: atapi.h:219
#define IDE_FEATURE_DMADIR
Definition: atapi.h:220
#define IDE_COMMAND_ATAPI_PACKET
Definition: atapi.h:109
#define min(a, b)
Definition: monoChain.cc:55
#define ATAPI_MAX_DRQ_DATA_BLOCK
Definition: pata.h:65
unsigned short USHORT
Definition: pedump.c:61
unsigned char UCHAR
Definition: typedefs.h:53
_Must_inspect_result_ typedef _In_ PHYSICAL_ADDRESS _In_ LARGE_INTEGER ByteCount
Definition: iotypes.h:1099

Referenced by AtaAhciPrepareIo().

◆ AtaAhciHbaIsr()

BOOLEAN NTAPI AtaAhciHbaIsr ( _In_ PKINTERRUPT  Interrupt,
_In_ PVOID  Context 
)

Definition at line 406 of file ahci_io.c.

409{
410 PATA_CONTROLLER Controller = Context;
411 ULONG Port, InterruptStatus, PortInterruptBitmap;
412
413 InterruptStatus = AHCI_HBA_READ(Controller->IoBase, HbaInterruptStatus);
414 if (InterruptStatus == 0)
415 return FALSE;
416
417 PortInterruptBitmap = InterruptStatus & Controller->ChannelBitmap;
418 while (_BitScanForward(&Port, PortInterruptBitmap) != 0)
419 {
420 PortInterruptBitmap &= ~(1 << Port);
421
423 }
424
425 /* Clear pending HBA interrupts */
426 AHCI_HBA_WRITE(Controller->IoBase, HbaInterruptStatus, InterruptStatus);
427
428 return TRUE;
429}
FORCEINLINE ULONG AHCI_HBA_READ(_In_ PVOID HbaIoBase, _In_ AHCI_HOST_BUS_ADAPTER_REGISTER Register)
Definition: ahci.h:529
FORCEINLINE VOID AHCI_HBA_WRITE(_In_ PVOID HbaIoBase, _In_ AHCI_HOST_BUS_ADAPTER_REGISTER Register, _In_ ULONG Value)
Definition: ahci.h:538
@ HbaInterruptStatus
Definition: ahci.h:85
static VOID AtaAhciPortHandleInterrupt(_In_ PCHANNEL_DATA_AHCI ChanData)
Definition: ahci_io.c:343
CPPORT Port[4]
Definition: headless.c:38
unsigned char _BitScanForward(unsigned long *_Index, unsigned long _Mask)
Definition: intrin_arm.h:57
_In_ PVOID Context
Definition: storport.h:2269
PVOID IoBase
Definition: pciidex.h:194
ULONG ChannelBitmap
Definition: pciidex.h:214
PVOID Channels[MAX_CHANNELS]
Definition: pciidex.h:233
uint32_t ULONG
Definition: typedefs.h:59

◆ AtaAhciPortCompleteCommands()

static VOID AtaAhciPortCompleteCommands ( _In_ PCHANNEL_DATA_AHCI  ChanData,
_In_ ULONG  CommandsCompleted 
)
static

Definition at line 300 of file ahci_io.c.

303{
304 ULONG Slot;
305
306 while (_BitScanForward(&Slot, CommandsCompleted) != 0)
307 {
309 UCHAR SrbStatus;
310
311 CommandsCompleted &= ~(1 << Slot);
312
313 Request = ChanData->Slots[Slot];
315 ASSERT(Request->Slot == Slot);
316
317 SrbStatus = SRB_STATUS_SUCCESS;
318
319 if (!(Request->Flags & REQUEST_FLAG_NCQ) &&
321 {
322 PAHCI_COMMAND_HEADER CommandHeader = &ChanData->CommandList->CommandHeader[Slot];
323
324 /* This indicates a residual underrun */
325 if (CommandHeader->PrdByteCount < Request->DataTransferLength)
326 {
327 Request->DataTransferLength = CommandHeader->PrdByteCount;
328 SrbStatus = SRB_STATUS_DATA_OVERRUN;
329 }
330 }
331 Request->SrbStatus = SrbStatus;
332
333 /* Save the latest copy of the task file registers */
335 {
337 }
338 }
339}
VOID AtaAhciSaveTaskFile(_In_ PCHANNEL_DATA_AHCI ChanData, _Inout_ PATA_DEVICE_REQUEST Request, _In_ BOOLEAN ProcessErrorStatus)
Definition: ahci_hw.c:1325
#define REQUEST_FLAG_DATA_OUT
Definition: ata_shared.h:290
#define REQUEST_FLAG_SAVE_TASK_FILE
Definition: ata_shared.h:309
#define SRB_STATUS_DATA_OVERRUN
Definition: srb.h:357
#define SRB_STATUS_SUCCESS
Definition: srb.h:341
#define ASSERT(a)
Definition: mode.c:44
ULONG PrdByteCount
Definition: ahci.h:482

Referenced by AtaAhciPortHandleInterrupt().

◆ AtaAhciPortHandleInterrupt()

static VOID AtaAhciPortHandleInterrupt ( _In_ PCHANNEL_DATA_AHCI  ChanData)
static

Definition at line 343 of file ahci_io.c.

345{
346 ULONG InterruptStatus, CommandsIssued, CommandsCompleted;
347 AHCI_PORT_REGISTER CommandRegister;
348
349 /* Clear all pending events */
350 InterruptStatus = AHCI_PORT_READ(ChanData->IoBase, PxInterruptStatus);
351 AHCI_PORT_WRITE(ChanData->IoBase, PxInterruptStatus, InterruptStatus);
352
353 TRACE("CH %lu: Intr %08lx\n", ChanData->Channel, InterruptStatus);
354
355 /* Clear interface errors */
356 AHCI_PORT_WRITE(ChanData->IoBase, PxSataError,
357 AHCI_PORT_READ(ChanData->IoBase, PxSataError));
358
359 /* Determine commands that have completed */
360 if (ChanData->ActiveQueuedSlotsBitmap != 0)
361 CommandRegister = PxSataActive;
362 else
363 CommandRegister = PxCommandIssue;
364 CommandsIssued = AHCI_PORT_READ(ChanData->IoBase, CommandRegister);
365 CommandsCompleted = ~CommandsIssued & ChanData->ActiveSlotsBitmap;
366
367 /* Complete processed commands */
368 if (CommandsCompleted != 0)
369 {
370 ChanData->ActiveSlotsBitmap &= ~CommandsCompleted;
371 ChanData->ActiveQueuedSlotsBitmap &= ~CommandsCompleted;
372
373 AtaAhciPortCompleteCommands(ChanData, CommandsCompleted);
374 ChanData->PortNotification(AtaRequestComplete, ChanData->PortContext, CommandsCompleted);
375 }
376
377 /* Asynchronous notification received */
378 if (InterruptStatus & AHCI_PXIRQ_SDBS)
379 {
380 ULONG Message = AHCI_PORT_READ(ChanData->IoBase, PxSataNotification);
381
382 if (Message != 0)
383 {
384 AHCI_PORT_WRITE(ChanData->IoBase, PxSataNotification, Message);
385
386 WARN("CH %lu: Notification %08lx arrived\n", ChanData->Channel, Message);
387
388 ChanData->PortNotification(AtaAsyncNotificationDetected, ChanData->PortContext, 0x1);
389 }
390 }
391
392 /* Handle various errors and link change events */
393 if (InterruptStatus & AHCI_PXIRQ_PORT_STATUS)
394 {
395 AtaAhciHandlePortStateChange(ChanData, InterruptStatus);
396 }
397
398 if (InterruptStatus & AHCI_PXIRQ_FATAL_ERROR)
399 {
400 AtaAhciHandleFatalError(ChanData);
401 }
402}
FORCEINLINE VOID AHCI_PORT_WRITE(_In_ PVOID PortIoBase, _In_ AHCI_PORT_REGISTER Register, _In_ ULONG Value)
Definition: ahci.h:557
#define AHCI_PXIRQ_PORT_STATUS
Definition: ahci.h:143
#define AHCI_PXIRQ_FATAL_ERROR
Definition: ahci.h:140
enum _AHCI_PORT_REGISTER AHCI_PORT_REGISTER
FORCEINLINE ULONG AHCI_PORT_READ(_In_ PVOID PortIoBase, _In_ AHCI_PORT_REGISTER Register)
Definition: ahci.h:548
#define AHCI_PXIRQ_SDBS
Definition: ahci.h:123
@ PxCommandIssue
Definition: ahci.h:111
@ PxSataNotification
Definition: ahci.h:112
@ PxSataError
Definition: ahci.h:109
@ PxInterruptStatus
Definition: ahci.h:102
@ PxSataActive
Definition: ahci.h:110
VOID AtaAhciHandleFatalError(_In_ PCHANNEL_DATA_AHCI ChanData)
Definition: ahci_hw.c:1397
VOID AtaAhciHandlePortStateChange(_In_ PCHANNEL_DATA_AHCI ChanData, _In_ ULONG InterruptStatus)
Definition: ahci_hw.c:1512
static VOID AtaAhciPortCompleteCommands(_In_ PCHANNEL_DATA_AHCI ChanData, _In_ ULONG CommandsCompleted)
Definition: ahci_io.c:300
@ AtaAsyncNotificationDetected
Definition: ata_shared.h:78
@ AtaRequestComplete
Definition: ata_shared.h:74
#define WARN(fmt,...)
Definition: precomp.h:61
static const WCHAR Message[]
Definition: register.c:74
#define TRACE(s)
Definition: solgame.cpp:4

Referenced by AtaAhciHbaIsr().

◆ AtaAhciPrepareIo()

VOID AtaAhciPrepareIo ( _In_ PVOID  ChannelContext,
_In_ PATA_DEVICE_REQUEST  Request 
)

Definition at line 169 of file ahci_io.c.

172{
173 PCHANNEL_DATA_AHCI ChanData = ChannelContext;
174 PAHCI_COMMAND_TABLE CommandTable;
175 PAHCI_COMMAND_HEADER CommandHeader;
178
179 Control = sizeof(*Fis) / sizeof(ULONG);
181
183 {
185
186 Control |= Request->SgList->NumberOfElements << AHCI_COMMAND_HEADER_PRDT_LENGTH_SHIFT;
187
188 if (Request->Flags & REQUEST_FLAG_DATA_OUT)
189 {
191 }
192 }
193
194 CommandTable = ChanData->CommandTable[Request->Slot];
195
196 Fis = &CommandTable->HostToDeviceFis;
197
199
201 {
204 Request->Cdb,
205 Request->Device);
206
208 }
209 else
210 {
212 }
213
214 CommandHeader = &ChanData->CommandList->CommandHeader[Request->Slot];
215 CommandHeader->Control = Control;
216 CommandHeader->PrdByteCount = 0;
217
219}
#define AHCI_COMMAND_HEADER_PMP_SHIFT
Definition: ahci.h:480
#define AHCI_COMMAND_HEADER_WRITE
Definition: ahci.h:471
#define AHCI_COMMAND_HEADER_PRDT_LENGTH_SHIFT
Definition: ahci.h:479
#define AHCI_COMMAND_HEADER_ATAPI
Definition: ahci.h:470
static VOID AtaAhciBuildPacketCommandFis(_In_ ATA_DEVICE_REQUEST *__restrict Request, _Out_ AHCI_FIS_HOST_TO_DEVICE *__restrict Fis)
Definition: ahci_io.c:35
static VOID AtaAhciTransferACMDRegion(_In_ VOID *__restrict Destination, _In_ VOID *__restrict Source, _In_ ATA_IO_CONTEXT_COMMON *__restrict Device)
Definition: ahci_io.c:104
static VOID AtaAhciBeginHostToDeviceFis(_In_ ATA_DEVICE_REQUEST *__restrict Request, _Out_ AHCI_FIS_HOST_TO_DEVICE *__restrict Fis)
Definition: ahci_io.c:16
static VOID AtaAhciBuildAtaCommandFis(_In_ ATA_DEVICE_REQUEST *__restrict Request, _Out_ AHCI_FIS_HOST_TO_DEVICE *__restrict Fis)
Definition: ahci_io.c:68
#define REQUEST_FLAG_HAS_SG_LIST
Definition: ata_shared.h:330
#define REQUEST_FLAG_PACKET_COMMAND
Definition: hwidep.h:169
#define KeFlushIoBuffers(_Mdl, _ReadOperation, _DmaOperation)
Definition: ke.h:174
AHCI_COMMAND_HEADER CommandHeader[ANYSIZE_ARRAY]
Definition: ahci.h:492
UCHAR AtapiCommand[16]
Definition: ahci.h:515
AHCI_FIS_HOST_TO_DEVICE HostToDeviceFis
Definition: ahci.h:512
PAHCI_COMMAND_TABLE CommandTable[AHCI_MAX_COMMAND_SLOTS]
Definition: pciidex.h:343
PAHCI_COMMAND_LIST CommandList
Definition: pciidex.h:342
_In_ WDF_WMI_PROVIDER_CONTROL Control
Definition: wdfwmi.h:166

◆ AtaAhciPreparePrdTable()

VOID AtaAhciPreparePrdTable ( _In_ PVOID  ChannelContext,
_In_ PATA_DEVICE_REQUEST  Request,
_In_ SCATTER_GATHER_LIST *__restrict  SgList 
)

Definition at line 222 of file ahci_io.c.

226{
227 PCHANNEL_DATA_AHCI ChanData = ChannelContext;
228 PAHCI_PRD_TABLE_ENTRY PrdTableEntry;
229 ULONG i;
230#if DBG
231 BOOLEAN Is64BitDma = !!(ChanData->Controller->AhciCapabilities & AHCI_CAP_S64A);
232#endif
233
234 ASSUME(SgList->NumberOfElements > 0);
235 ASSERT(SgList->NumberOfElements < AHCI_MAX_PRDT_ENTRIES);
236
237 PrdTableEntry = ChanData->CommandTable[Request->Slot]->PrdTable;
238
239 for (i = 0; i < SgList->NumberOfElements; ++i)
240 {
241 ASSERT(SgList->Elements[i].Length != 0);
242 ASSERT(SgList->Elements[i].Length < AHCI_MAX_PRD_LENGTH);
243 ASSERT((SgList->Elements[i].Length & ATA_MIN_BUFFER_ALIGNMENT) == 0);
244 ASSERT(Is64BitDma || (SgList->Elements[i].Address.HighPart == 0));
245 ASSERT(i < ChanData->MaximumPhysicalPages);
246
247 PrdTableEntry->DataBaseLow = SgList->Elements[i].Address.LowPart;
248 PrdTableEntry->DataBaseHigh = SgList->Elements[i].Address.HighPart;
249 PrdTableEntry->ByteCount = SgList->Elements[i].Length - 1;
250
251 ++PrdTableEntry;
252 }
253
254 /* Enable IRQ on last entry */
255 --PrdTableEntry;
257}
unsigned char BOOLEAN
Definition: actypes.h:127
#define AHCI_PRD_INTERRUPT_ON_COMPLETION
Definition: ahci.h:502
#define AHCI_MAX_PRDT_ENTRIES
Definition: ahci.h:15
#define AHCI_MAX_PRD_LENGTH
Definition: ahci.h:16
#define AHCI_CAP_S64A
Definition: ahci.h:335
#define ATA_MIN_BUFFER_ALIGNMENT
Definition: ata_shared.h:30
#define ASSUME(cond)
Definition: atapi.h:165
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
AHCI_PRD_TABLE_ENTRY PrdTable[ANYSIZE_ARRAY]
Definition: ahci.h:517
Definition: ahci.h:496
ULONG DataBaseLow
Definition: ahci.h:497
ULONG DataBaseHigh
Definition: ahci.h:498
ULONG ByteCount
Definition: ahci.h:501
WDF_EXTERN_C_START typedef _In_ WDFDEVICE _In_ WDFCONTEXT _In_ WDF_DMA_DIRECTION _In_ PSCATTER_GATHER_LIST SgList

◆ AtaAhciStartIo()

BOOLEAN AtaAhciStartIo ( _In_ PVOID  ChannelContext,
_In_ PATA_DEVICE_REQUEST  Request 
)

Definition at line 134 of file ahci_io.c.

137{
138 PCHANNEL_DATA_AHCI ChanData = ChannelContext;
139 PULONG IoBase = ChanData->IoBase;
140 ULONG IssueSlot;
141
142 IssueSlot = 1 << Request->Slot;
143
144 ChanData->ActiveSlotsBitmap |= IssueSlot;
145
146 if (Request->Flags & REQUEST_FLAG_NCQ)
147 {
148 ChanData->ActiveQueuedSlotsBitmap |= IssueSlot;
149 AHCI_PORT_WRITE(IoBase, PxSataActive, IssueSlot);
150 }
151
152 if ((ChanData->ChanInfo & CHANNEL_FLAG_FBS_ENABLED) &&
153 (ChanData->LastFbsDeviceNumber != DEV_NUMBER(Request->Device)))
154 {
156
157 ChanData->LastFbsDeviceNumber = DEV_NUMBER(Request->Device);
158
162 }
163
164 AHCI_PORT_WRITE(IoBase, PxCommandIssue, IssueSlot);
165 return FALSE;
166}
#define AHCI_FBS_ENABLE
Definition: ahci.h:257
#define AHCI_FBS_ISSUE_SHIFT
Definition: ahci.h:264
@ PxFisSwitchingControl
Definition: ahci.h:113
UCHAR LastFbsDeviceNumber
Definition: pciidex.h:345
uint32_t * PULONG
Definition: typedefs.h:59

◆ AtaAhciTransferACMDRegion()

static VOID AtaAhciTransferACMDRegion ( _In_ VOID *__restrict  Destination,
_In_ VOID *__restrict  Source,
_In_ ATA_IO_CONTEXT_COMMON *__restrict  Device 
)
static

Copy the CDB bytes (12 or 16 bytes)

Definition at line 104 of file ahci_io.c.

108{
109 /* Both addresses are 8-byte aligned */
110#if defined(_WIN64)
111 PULONG64 Dest = Destination, Src = Source;
112
113 *Dest++ = *Src++;
114
115 if ((Device->CdbSize & (sizeof(ULONG64) - 1)) == 0)
116 *Dest = *Src;
117 else
118 *(PULONG)Dest = *(PULONG)Src;
119#else
120 PULONG Dest = Destination, Src = Source;
121
122 *Dest++ = *Src++;
123 *Dest++ = *Src++;
124 *Dest++ = *Src++;
125
126 if ((Device->CdbSize & (sizeof(ULONG64) - 1)) == 0)
127 *Dest = *Src;
128#endif
129}
unsigned __int64 * PULONG64
Definition: imports.h:198
unsigned __int64 ULONG64
Definition: imports.h:198
_In_ UINT _In_ UINT _In_ PNDIS_PACKET Source
Definition: ndis.h:3169
_In_ PUNICODE_STRING _Inout_ PUNICODE_STRING Destination
Definition: rtlfuncs.h:3051
_Must_inspect_result_ _In_ WDFDEVICE Device
Definition: wdfchildlist.h:474

Referenced by AtaAhciPrepareIo().

◆ C_ASSERT() [1/2]

C_ASSERT ( FIELD_OFFSET(AHCI_COMMAND_TABLE, AtapiCommand) % sizeof(ULONG64 = =0)

◆ C_ASSERT() [2/2]