#include <pshpack1.h>
#include <poppack.h>

Include dependency graph for ahci.h:

This graph shows which files directly or indirectly include this file:

Classes
struct	_AHCI_FIS_HOST_TO_DEVICE

struct	_AHCI_FIS_PIO_SETUP

struct	_AHCI_FIS_DEVICE_TO_HOST

struct	_AHCI_FIS_SET_DEVICE_BITS

struct	_AHCI_RECEIVED_FIS

struct	_AHCI_COMMAND_HEADER

struct	_AHCI_COMMAND_LIST

struct	_AHCI_PRD_TABLE_ENTRY

struct	_AHCI_COMMAND_TABLE

Macros
#define	AHCI_MAX_PORTS 32

#define	AHCI_MAX_PORT_DEVICES 1

#define	AHCI_MAX_PMP_DEVICES 15

#define	AHCI_MAX_COMMAND_SLOTS 32

#define	AHCI_MAX_PRDT_ENTRIES 0x000FFFFF

#define	AHCI_MAX_PRD_LENGTH 0x003FFFFF

#define	AHCI_PMP_CONTROL_PORT 15

#define	AHCI_COMMAND_TABLE_ALIGNMENT 128

#define	AHCI_RECEIVED_FIS_ALIGNMENT 256

#define	AHCI_COMMAND_LIST_ALIGNMENT 1024

#define	AHCI_RECEIVED_FIS_FBS_ALIGNMENT 4096

#define	AHCI_FBS_RECEIVE_AREA_SIZE 4096

#define	AHCI_DELAY_1_SECOND (1000 / PORT_TIMER_TICK_MS)

#define	AHCI_DELAY_CR_START_STOP (500 / PORT_TIMER_TICK_MS)

#define	AHCI_DELAY_FR_START_STOP (500 / PORT_TIMER_TICK_MS)

#define	AHCI_DELAY_DET_PRESENCE (40 / PORT_TIMER_TICK_MS)

#define	AHCI_DELAY_DET_STABLE (200 / PORT_TIMER_TICK_MS)

#define	AHCI_DELAY_READY_DRIVE (10000 / PORT_TIMER_TICK_MS)

#define	AHCI_DELAY_PMP_READY_DRIVE (400 / PORT_TIMER_TICK_MS)

#define	AHCI_DELAY_PMP_DET_PRESENSE (100 / PORT_TIMER_TICK_MS)

#define	AHCI_DELAY_PMP_DET_STABLE (300 / PORT_TIMER_TICK_MS)

#define	AHCI_DELAY_CLO_CLEAR (10 / PORT_TIMER_TICK_MS)

#define	AHCI_DELAY_INTERFACE_CHANGE (10 / PORT_TIMER_TICK_MS)

#define	AHCI_FIS_REGISTER_HOST_TO_DEVICE 0x27

#define	AHCI_FIS_REGISTER_DEVICE_TO_HOST 0x34

#define	AHCI_FIS_DMA_ACTIVATE_DEVICE_TO_HOST 0x39

#define	AHCI_FIS_DMA_SETUP 0x41

#define	AHCI_FIS_DATA 0x46

#define	AHCI_FIS_BIST_ACTIVATE 0x58

#define	AHCI_FIS_PIO_SETUP_DEVICE_TO_HOST 0x5F

#define	AHCI_FIS_SET_DEVICE_BITS_DEVICE_TO_HOST 0xA1

#define	IDE_COMMAND_READ_PORT_MULTIPLIER 0xE4

#define	IDE_COMMAND_WRITE_PORT_MULTIPLIER 0xE8

#define	AHCI_INTERNAL_SLOT 0

#define	AHCI_PMP_BIST 0x00000001

#define	AHCI_PMP_PMREQ 0x00000002

#define	AHCI_PMP_SSC 0x00000004

#define	AHCI_PMP_SNTF 0x00000008

#define	AHCI_PXIRQ_DHRS 0x00000001

#define	AHCI_PXIRQ_PSS 0x00000002

#define	AHCI_PXIRQ_DSS 0x00000004

#define	AHCI_PXIRQ_SDBS 0x00000008

#define	AHCI_PXIRQ_UFS 0x00000010

#define	AHCI_PXIRQ_DPS 0x00000020

#define	AHCI_PXIRQ_PCS 0x00000040

#define	AHCI_PXIRQ_DMPS 0x00000080

#define	AHCI_PXIRQ_RSV1 0x003FFF00

#define	AHCI_PXIRQ_PRCS 0x00400000

#define	AHCI_PXIRQ_IPMS 0x00800000

#define	AHCI_PXIRQ_OFS 0x01000000

#define	AHCI_PXIRQ_RSV2 0x02000000

#define	AHCI_PXIRQ_INFS 0x04000000

#define	AHCI_PXIRQ_IFS 0x08000000

#define	AHCI_PXIRQ_HBDS 0x10000000

#define	AHCI_PXIRQ_HBFS 0x20000000

#define	AHCI_PXIRQ_TFES 0x40000000

#define	AHCI_PXIRQ_CPDS 0x80000000

#define	AHCI_PXIRQ_FATAL_ERROR (AHCI_PXIRQ_TFES \| AHCI_PXIRQ_IFS \| AHCI_PXIRQ_HBDS \| AHCI_PXIRQ_HBFS)

#define	AHCI_PXIRQ_PORT_STATUS (AHCI_PXIRQ_PCS \| AHCI_PXIRQ_PRCS \| AHCI_PXIRQ_DMPS)

#define	AHCI_PXCMD_ST 0x00000001

#define	AHCI_PXCMD_SUD 0x00000002

#define	AHCI_PXCMD_POD 0x00000004

#define	AHCI_PXCMD_CLO 0x00000008

#define	AHCI_PXCMD_FRE 0x00000010

#define	AHCI_PXCMD_RSV 0x000000E0

#define	AHCI_PXCMD_CCS_MASK 0x00001F00

#define	AHCI_PXCMD_MPSS 0x00002000

#define	AHCI_PXCMD_FR 0x00004000

#define	AHCI_PXCMD_CR 0x00008000

#define	AHCI_PXCMD_CPS 0x00010000

#define	AHCI_PXCMD_PMA 0x00020000

#define	AHCI_PXCMD_HPCP 0x00040000

#define	AHCI_PXCMD_MPSP 0x00080000

#define	AHCI_PXCMD_CPD 0x00100000

#define	AHCI_PXCMD_ESP 0x00200000

#define	AHCI_PXCMD_FBSCP 0x00400000

#define	AHCI_PXCMD_APSTE 0x00800000

#define	AHCI_PXCMD_ATAPI 0x01000000

#define	AHCI_PXCMD_DLAE 0x02000000

#define	AHCI_PXCMD_ALPE 0x04000000

#define	AHCI_PXCMD_ASP 0x08000000

#define	AHCI_PXCMD_ICC_MASK 0xF0000000

#define	AHCI_PXCMD_ICC_IDLE 0x00000000

#define	AHCI_PXCMD_ICC_ACTIVE 0x10000000

#define	AHCI_PXCMD_ICC_PARTIAL 0x20000000

#define	AHCI_PXCMD_ICC_SLUMBER 0x60000000

#define	AHCI_PXCMD_ICC_DEVSLEEP 0x80000000

#define	AHCI_PXCMD_ICC_DEVSLEEP 0x80000000

#define	AHCI_PXCMD_CCS_SHIFT 8

#define	AHCI_PXCMD_CCS(Value) (((Value) & AHCI_PXCMD_CCS_MASK) >> AHCI_PXCMD_CCS_SHIFT)

#define	AHCI_PXTFD_STATUS_MASK 0x000000FF

#define	AHCI_PXTFD_ERROR_MASK 0x0000FF00

#define	AHCI_PXTFD_ERROR_SHIFT 8

#define	AHCI_PXSIG_INVALID 0xFFFFFFFF

#define	AHCI_PXSIG_ATAPI 0xEB140101

#define	AHCI_PXSIG_PMP 0x96690101

#define	AHCI_PXSIG_MASK 0xFFFF0000

#define	AHCI_PXSSTS_DET_MASK 0x0000000F

#define	AHCI_PXSSTS_SPD_MASK 0x000000F0

#define	AHCI_PXSSTS_IPM_MASK 0x00000F00

#define	AHCI_PXSSTS_DET_NO_DEVICE 0x00000000

#define	AHCI_PXSSTS_DET_PHY_NOT_READY 0x00000001

#define	AHCI_PXSSTS_DET_PHY_OK 0x00000003

#define	AHCI_PXSSTS_DET_PHY_OFFLINE 0x00000004

#define	AHCI_PXSSTS_SPD_UNKNOWN 0x00000000

#define	AHCI_PXSSTS_SPD_SATA1 0x00000010

#define	AHCI_PXSSTS_SPD_SATA2 0x00000020

#define	AHCI_PXSSTS_SPD_SATA3 0x00000030

#define	AHCI_PXSSTS_IPM_NO_DEVICE 0x00000000

#define	AHCI_PXSSTS_IPM_ACTIVE 0x00000100

#define	AHCI_PXSSTS_IPM_PARTIAL 0x00000200

#define	AHCI_PXSSTS_IPM_SLUMBER 0x00000600

#define	AHCI_PXSSTS_IPM_DEVSLEEP 0x00000800

#define	AHCI_PXCTL_DET_MASK 0x0000000F

#define	AHCI_PXCTL_SPD_MASK 0x000000F0

#define	AHCI_PXCTL_IPM_MASK 0x00000F00

#define	AHCI_PXCTL_DET_IDLE 0x00000000

#define	AHCI_PXCTL_DET_RESET 0x00000001

#define	AHCI_PXCTL_DET_DISABLE_SATA 0x00000004

#define	AHCI_PXCTL_SPD_LIMIT_NONE 0x00000000

#define	AHCI_PXCTL_SPD_LIMIT_SATA1 0x00000010

#define	AHCI_PXCTL_SPD_LIMIT_SATA2 0x00000020

#define	AHCI_PXCTL_SPD_LIMIT_SATA3 0x00000030

#define	AHCI_PXCTL_SPD_LIMIT_LEVEL 0x00000010

#define	AHCI_PXCTL_IPM_DISABLE_NONE 0x00000000

#define	AHCI_PXCTL_IPM_DISABLE_PARTIAL 0x00000100

#define	AHCI_PXCTL_IPM_DISABLE_SLUMBER 0x00000200

#define	AHCI_PXCTL_IPM_DISABLE_DEVSLEEP 0x00000400

#define	AHCI_PXCTL_IPM_DISABLE_ALL 0x00000700

#define	AHCI_FBS_ENABLE 0x00000001

#define	AHCI_FBS_DEV_ERROR_CLEAR 0x00000002

#define	AHCI_FBS_SINGLE_DEV_ERROR 0x00000004

#define	AHCI_FBS_ISSUE_MASK 0x00000F00

#define	AHCI_FBS_ACTIVE_DEV_OPT_MASK 0x0000F000

#define	AHCI_FBS_DEV_WITH_ERROR_MASK 0x000F0000

#define	AHCI_FBS_ISSUE_SHIFT 8

#define	AHCI_PXDEVSLP_ADSE 0x00000001

#define	AHCI_PXDEVSLP_DSP 0x00000002

#define	AHCI_PXDEVSLP_DETO_MASK 0x000003FC

#define	AHCI_PXDEVSLP_MDAT_MASK 0x00007C00

#define	AHCI_PXDEVSLP_DITO_MASK 0x01FF8000

#define	AHCI_PXDEVSLP_DM_MASK 0x1E000000

#define	AHCI_PORT_INTERRUPT_MASK

#define	AHCI_VERSION_0_95 0x00000905

#define	AHCI_VERSION_1_0 0x00010000

#define	AHCI_VERSION_1_2 0x00010200

#define	AHCI_VERSION_1_3_0 0x00010300

#define	AHCI_VERSION_1_3_1 0x00010301

#define	AHCI_GHC_HR 0x00000001

#define	AHCI_GHC_IE 0x00000002

#define	AHCI_GHC_MRSM 0x00000004

#define	AHCI_GHC_AE 0x80000000

#define	AHCI_CAP_NP 0x0000001F

#define	AHCI_CAP_SXS 0x00000020

#define	AHCI_CAP_EMS 0x00000040

#define	AHCI_CAP_CCCS 0x00000080

#define	AHCI_CAP_NCS 0x00001F00

#define	AHCI_CAP_PSC 0x00002000

#define	AHCI_CAP_SSC 0x00004000

#define	AHCI_CAP_PMD 0x00008000

#define	AHCI_CAP_FBSS 0x00010000

#define	AHCI_CAP_SPM 0x00020000

#define	AHCI_CAP_SAM 0x00040000

#define	AHCI_CAP_RSV 0x00080000

#define	AHCI_CAP_ISS 0x00F00000

#define	AHCI_CAP_SCLO 0x01000000

#define	AHCI_CAP_SAL 0x02000000

#define	AHCI_CAP_SALP 0x04000000

#define	AHCI_CAP_SSS 0x08000000

#define	AHCI_CAP_SMPS 0x10000000

#define	AHCI_CAP_SSNTF 0x20000000

#define	AHCI_CAP_SNCQ 0x40000000

#define	AHCI_CAP_S64A 0x80000000

#define	AHCI_CAP2_BOH 0x00000001

#define	AHCI_CAP2_NVMP 0x00000002

#define	AHCI_CAP2_APST 0x00000004

#define	AHCI_CAP2_SDS 0x00000008

#define	AHCI_CAP2_SADM 0x00000010

#define	AHCI_CAP2_DESO 0x00000020

#define	AHCI_BOHC_BIOS_SEMAPHORE 0x00000001

#define	AHCI_BOHC_OS_SEMAPHORE 0x00000002

#define	AHCI_BOHC_SMI_ON_OS_OWNERSHIP_CHANGE 0x00000004

#define	AHCI_BOHC_OS_OWNERSHIP_CHANGE 0x00000008

#define	AHCI_BOHC_BIOS_BUSY 0x00000010

#define	UPDATE_COMMAND 0x80

#define	PMP_NUMBER 0x0F

#define	AHCI_COMMAND_HEADER_COMMAND_FIS_LENGTH 0x0000001F

#define	AHCI_COMMAND_HEADER_ATAPI 0x00000020

#define	AHCI_COMMAND_HEADER_WRITE 0x00000040

#define	AHCI_COMMAND_HEADER_PREFETCHABLE 0x00000080

#define	AHCI_COMMAND_HEADER_RESET 0x00000100

#define	AHCI_COMMAND_HEADER_BIST 0x00000200

#define	AHCI_COMMAND_HEADER_CLEAR_BUSY_UPON_OK 0x00000400

#define	AHCI_COMMAND_HEADER_PMP 0x0000F000

#define	AHCI_COMMAND_HEADER_PRDT_LENGTH 0xFFFF0000

#define	AHCI_COMMAND_HEADER_PRDT_LENGTH_SHIFT 16

#define	AHCI_COMMAND_HEADER_PMP_SHIFT 12

#define	AHCI_PRD_INTERRUPT_ON_COMPLETION 0x80000000

#define	AHCI_PORT_BASE(HbaIoBase, PortNumber) (PULONG)((ULONG_PTR)(HbaIoBase) + (PortNumber) * 0x80 + 0x100)

Typedefs
typedef enum _SATA_SCR_REGISTER	SATA_SCR_REGISTER

typedef enum _AHCI_PORT_MULTIPLIER_REGISTER	AHCI_PORT_MULTIPLIER_REGISTER

typedef enum _AHCI_HOST_BUS_ADAPTER_REGISTER	AHCI_HOST_BUS_ADAPTER_REGISTER

typedef enum _AHCI_PORT_REGISTER	AHCI_PORT_REGISTER

typedef struct _AHCI_FIS_HOST_TO_DEVICE	AHCI_FIS_HOST_TO_DEVICE

typedef struct _AHCI_FIS_HOST_TO_DEVICE *	PAHCI_FIS_HOST_TO_DEVICE

typedef struct _AHCI_FIS_PIO_SETUP	AHCI_FIS_PIO_SETUP

typedef struct _AHCI_FIS_PIO_SETUP *	PAHCI_FIS_PIO_SETUP

typedef struct _AHCI_FIS_DEVICE_TO_HOST	AHCI_FIS_DEVICE_TO_HOST

typedef struct _AHCI_FIS_DEVICE_TO_HOST *	PAHCI_FIS_DEVICE_TO_HOST

typedef struct _AHCI_FIS_SET_DEVICE_BITS	AHCI_FIS_SET_DEVICE_BITS

typedef struct _AHCI_FIS_SET_DEVICE_BITS *	PAHCI_FIS_SET_DEVICE_BITS

typedef struct _AHCI_RECEIVED_FIS	AHCI_RECEIVED_FIS

typedef struct _AHCI_RECEIVED_FIS *	PAHCI_RECEIVED_FIS

typedef struct _AHCI_COMMAND_HEADER	AHCI_COMMAND_HEADER

typedef struct _AHCI_COMMAND_HEADER *	PAHCI_COMMAND_HEADER

typedef struct _AHCI_COMMAND_LIST	AHCI_COMMAND_LIST

typedef struct _AHCI_COMMAND_LIST *	PAHCI_COMMAND_LIST

typedef struct _AHCI_PRD_TABLE_ENTRY	AHCI_PRD_TABLE_ENTRY

typedef struct _AHCI_PRD_TABLE_ENTRY *	PAHCI_PRD_TABLE_ENTRY

typedef struct _AHCI_COMMAND_TABLE	AHCI_COMMAND_TABLE

typedef struct _AHCI_COMMAND_TABLE *	PAHCI_COMMAND_TABLE

Enumerations
enum	_SATA_SCR_REGISTER { ATA_SSTATUS = 0 , ATA_SERROR = 1 , ATA_SCONTROL = 2 , ATA_SACTIVE = 3 , ATA_SNOTIFICATION = 4 }

enum	_AHCI_PORT_MULTIPLIER_REGISTER { PmpProductId = 0 , PmpRevisionInfo = 1 , PmpPortInfo = 2 , PmpErrorInfo = 32 , PmpErrorControl = 33 , PmpPhyEventCounterControl = 34 , PmpCapabilities = 64 , PmpFeaturesEnabled = 96 }

enum	_AHCI_HOST_BUS_ADAPTER_REGISTER { HbaCapabilities = 0x00 , HbaGlobalControl = 0x04 , HbaInterruptStatus = 0x08 , HbaPortBitmap = 0x0C , HbaAhciVersion = 0x10 , HbaCoalescingControl = 0x14 , HbaCoalescingPorts = 0x18 , HbaEnclosureManagementLocation = 0x1C , HbaEnclosureManagementControl = 0x20 , HbaCapabilitiesEx = 0x24 , HbaBiosHandoffControl = 0x28 }

enum	_AHCI_PORT_REGISTER { PxCommandListBaseLow = 0x00 , PxCommandListBaseHigh = 0x04 , PxFisBaseLow = 0x08 , PxFisBaseHigh = 0x0C , PxInterruptStatus = 0x10 , PxInterruptEnable = 0x14 , PxCmdStatus = 0x18 , PxTaskFileData = 0x20 , PxSignature = 0x24 , PxSataStatus = 0x28 , PxSataControl = 0x2C , PxSataError = 0x30 , PxSataActive = 0x34 , PxCommandIssue = 0x38 , PxSataNotification = 0x3C , PxFisSwitchingControl = 0x40 , PxDeviceSleep = 0x44 }

Functions
	C_ASSERT (sizeof(AHCI_FIS_HOST_TO_DEVICE)==20)

	C_ASSERT (sizeof(AHCI_FIS_PIO_SETUP)==20)

	C_ASSERT (sizeof(AHCI_FIS_DEVICE_TO_HOST)==20)

	C_ASSERT (sizeof(AHCI_FIS_SET_DEVICE_BITS)==8)

	C_ASSERT (sizeof(AHCI_RECEIVED_FIS)==256)

	C_ASSERT (sizeof(AHCI_COMMAND_HEADER)==32)

	C_ASSERT (sizeof(AHCI_PRD_TABLE_ENTRY)==16)

	C_ASSERT (FIELD_OFFSET(AHCI_COMMAND_TABLE, PrdTable)==128)

FORCEINLINE ULONG	AHCI_HBA_READ (_In_ PVOID HbaIoBase, _In_ AHCI_HOST_BUS_ADAPTER_REGISTER Register)

FORCEINLINE VOID	AHCI_HBA_WRITE (_In_ PVOID HbaIoBase, _In_ AHCI_HOST_BUS_ADAPTER_REGISTER Register, _In_ ULONG Value)

FORCEINLINE ULONG	AHCI_PORT_READ (_In_ PVOID PortIoBase, _In_ AHCI_PORT_REGISTER Register)

FORCEINLINE VOID	AHCI_PORT_WRITE (_In_ PVOID PortIoBase, _In_ AHCI_PORT_REGISTER Register, _In_ ULONG Value)

Macro Definition Documentation

◆ AHCI_BOHC_BIOS_BUSY

#define AHCI_BOHC_BIOS_BUSY 0x00000010

Definition at line 351 of file ahci.h.

◆ AHCI_BOHC_BIOS_SEMAPHORE

#define AHCI_BOHC_BIOS_SEMAPHORE 0x00000001

Definition at line 347 of file ahci.h.

◆ AHCI_BOHC_OS_OWNERSHIP_CHANGE

#define AHCI_BOHC_OS_OWNERSHIP_CHANGE 0x00000008

Definition at line 350 of file ahci.h.

◆ AHCI_BOHC_OS_SEMAPHORE

#define AHCI_BOHC_OS_SEMAPHORE 0x00000002

Definition at line 348 of file ahci.h.

◆ AHCI_BOHC_SMI_ON_OS_OWNERSHIP_CHANGE

#define AHCI_BOHC_SMI_ON_OS_OWNERSHIP_CHANGE 0x00000004

Definition at line 349 of file ahci.h.

◆ AHCI_CAP2_APST

#define AHCI_CAP2_APST 0x00000004

Definition at line 342 of file ahci.h.

◆ AHCI_CAP2_BOH

#define AHCI_CAP2_BOH 0x00000001

Definition at line 340 of file ahci.h.

◆ AHCI_CAP2_DESO

#define AHCI_CAP2_DESO 0x00000020

Definition at line 345 of file ahci.h.

◆ AHCI_CAP2_NVMP

#define AHCI_CAP2_NVMP 0x00000002

Definition at line 341 of file ahci.h.

◆ AHCI_CAP2_SADM

#define AHCI_CAP2_SADM 0x00000010

Definition at line 344 of file ahci.h.

◆ AHCI_CAP2_SDS

#define AHCI_CAP2_SDS 0x00000008

Definition at line 343 of file ahci.h.

◆ AHCI_CAP_CCCS

#define AHCI_CAP_CCCS 0x00000080

Definition at line 318 of file ahci.h.

◆ AHCI_CAP_EMS

#define AHCI_CAP_EMS 0x00000040

Definition at line 317 of file ahci.h.

◆ AHCI_CAP_FBSS

#define AHCI_CAP_FBSS 0x00010000

Definition at line 323 of file ahci.h.

◆ AHCI_CAP_ISS

#define AHCI_CAP_ISS 0x00F00000

Definition at line 327 of file ahci.h.

◆ AHCI_CAP_NCS

#define AHCI_CAP_NCS 0x00001F00

Definition at line 319 of file ahci.h.

◆ AHCI_CAP_NP

#define AHCI_CAP_NP 0x0000001F

Definition at line 315 of file ahci.h.

◆ AHCI_CAP_PMD

#define AHCI_CAP_PMD 0x00008000

Definition at line 322 of file ahci.h.

◆ AHCI_CAP_PSC

#define AHCI_CAP_PSC 0x00002000

Definition at line 320 of file ahci.h.

◆ AHCI_CAP_RSV

#define AHCI_CAP_RSV 0x00080000

Definition at line 326 of file ahci.h.

◆ AHCI_CAP_S64A

#define AHCI_CAP_S64A 0x80000000

Definition at line 335 of file ahci.h.

◆ AHCI_CAP_SAL

#define AHCI_CAP_SAL 0x02000000

Definition at line 329 of file ahci.h.

◆ AHCI_CAP_SALP

#define AHCI_CAP_SALP 0x04000000

Definition at line 330 of file ahci.h.

◆ AHCI_CAP_SAM

#define AHCI_CAP_SAM 0x00040000

Definition at line 325 of file ahci.h.

◆ AHCI_CAP_SCLO

#define AHCI_CAP_SCLO 0x01000000

Definition at line 328 of file ahci.h.

◆ AHCI_CAP_SMPS

#define AHCI_CAP_SMPS 0x10000000

Definition at line 332 of file ahci.h.

◆ AHCI_CAP_SNCQ

#define AHCI_CAP_SNCQ 0x40000000

Definition at line 334 of file ahci.h.

◆ AHCI_CAP_SPM

#define AHCI_CAP_SPM 0x00020000

Definition at line 324 of file ahci.h.

◆ AHCI_CAP_SSC

#define AHCI_CAP_SSC 0x00004000

Definition at line 321 of file ahci.h.

◆ AHCI_CAP_SSNTF

#define AHCI_CAP_SSNTF 0x20000000

Definition at line 333 of file ahci.h.

◆ AHCI_CAP_SSS

#define AHCI_CAP_SSS 0x08000000

Definition at line 331 of file ahci.h.

◆ AHCI_CAP_SXS

#define AHCI_CAP_SXS 0x00000020

Definition at line 316 of file ahci.h.

◆ AHCI_COMMAND_HEADER_ATAPI

#define AHCI_COMMAND_HEADER_ATAPI 0x00000020

Definition at line 470 of file ahci.h.

◆ AHCI_COMMAND_HEADER_BIST

#define AHCI_COMMAND_HEADER_BIST 0x00000200

Definition at line 474 of file ahci.h.

◆ AHCI_COMMAND_HEADER_CLEAR_BUSY_UPON_OK

#define AHCI_COMMAND_HEADER_CLEAR_BUSY_UPON_OK 0x00000400

Definition at line 475 of file ahci.h.

◆ AHCI_COMMAND_HEADER_COMMAND_FIS_LENGTH

#define AHCI_COMMAND_HEADER_COMMAND_FIS_LENGTH 0x0000001F

Definition at line 469 of file ahci.h.

◆ AHCI_COMMAND_HEADER_PMP

#define AHCI_COMMAND_HEADER_PMP 0x0000F000

Definition at line 476 of file ahci.h.

◆ AHCI_COMMAND_HEADER_PMP_SHIFT

#define AHCI_COMMAND_HEADER_PMP_SHIFT 12

Definition at line 480 of file ahci.h.

◆ AHCI_COMMAND_HEADER_PRDT_LENGTH

#define AHCI_COMMAND_HEADER_PRDT_LENGTH 0xFFFF0000

Definition at line 477 of file ahci.h.

◆ AHCI_COMMAND_HEADER_PRDT_LENGTH_SHIFT

#define AHCI_COMMAND_HEADER_PRDT_LENGTH_SHIFT 16

Definition at line 479 of file ahci.h.

◆ AHCI_COMMAND_HEADER_PREFETCHABLE

#define AHCI_COMMAND_HEADER_PREFETCHABLE 0x00000080

Definition at line 472 of file ahci.h.

◆ AHCI_COMMAND_HEADER_RESET

#define AHCI_COMMAND_HEADER_RESET 0x00000100

Definition at line 473 of file ahci.h.

◆ AHCI_COMMAND_HEADER_WRITE

#define AHCI_COMMAND_HEADER_WRITE 0x00000040

Definition at line 471 of file ahci.h.

◆ AHCI_COMMAND_LIST_ALIGNMENT

#define AHCI_COMMAND_LIST_ALIGNMENT 1024

Definition at line 22 of file ahci.h.

◆ AHCI_COMMAND_TABLE_ALIGNMENT

#define AHCI_COMMAND_TABLE_ALIGNMENT 128

Definition at line 20 of file ahci.h.

◆ AHCI_DELAY_1_SECOND

#define AHCI_DELAY_1_SECOND (1000 / PORT_TIMER_TICK_MS)

Definition at line 27 of file ahci.h.

◆ AHCI_DELAY_CLO_CLEAR

#define AHCI_DELAY_CLO_CLEAR (10 / PORT_TIMER_TICK_MS)

Definition at line 36 of file ahci.h.

◆ AHCI_DELAY_CR_START_STOP

#define AHCI_DELAY_CR_START_STOP (500 / PORT_TIMER_TICK_MS)

Definition at line 28 of file ahci.h.

◆ AHCI_DELAY_DET_PRESENCE

#define AHCI_DELAY_DET_PRESENCE (40 / PORT_TIMER_TICK_MS)

Definition at line 30 of file ahci.h.

◆ AHCI_DELAY_DET_STABLE

#define AHCI_DELAY_DET_STABLE (200 / PORT_TIMER_TICK_MS)

Definition at line 31 of file ahci.h.

◆ AHCI_DELAY_FR_START_STOP

#define AHCI_DELAY_FR_START_STOP (500 / PORT_TIMER_TICK_MS)

Definition at line 29 of file ahci.h.

◆ AHCI_DELAY_INTERFACE_CHANGE

#define AHCI_DELAY_INTERFACE_CHANGE (10 / PORT_TIMER_TICK_MS)

Definition at line 37 of file ahci.h.

◆ AHCI_DELAY_PMP_DET_PRESENSE

#define AHCI_DELAY_PMP_DET_PRESENSE (100 / PORT_TIMER_TICK_MS)

Definition at line 34 of file ahci.h.

◆ AHCI_DELAY_PMP_DET_STABLE

#define AHCI_DELAY_PMP_DET_STABLE (300 / PORT_TIMER_TICK_MS)

Definition at line 35 of file ahci.h.

◆ AHCI_DELAY_PMP_READY_DRIVE

#define AHCI_DELAY_PMP_READY_DRIVE (400 / PORT_TIMER_TICK_MS)

Definition at line 33 of file ahci.h.

◆ AHCI_DELAY_READY_DRIVE

#define AHCI_DELAY_READY_DRIVE (10000 / PORT_TIMER_TICK_MS)

Definition at line 32 of file ahci.h.

◆ AHCI_FBS_ACTIVE_DEV_OPT_MASK

#define AHCI_FBS_ACTIVE_DEV_OPT_MASK 0x0000F000

Definition at line 261 of file ahci.h.

◆ AHCI_FBS_DEV_ERROR_CLEAR

#define AHCI_FBS_DEV_ERROR_CLEAR 0x00000002

Definition at line 258 of file ahci.h.

◆ AHCI_FBS_DEV_WITH_ERROR_MASK

#define AHCI_FBS_DEV_WITH_ERROR_MASK 0x000F0000

Definition at line 262 of file ahci.h.

◆ AHCI_FBS_ENABLE

#define AHCI_FBS_ENABLE 0x00000001

Definition at line 257 of file ahci.h.

◆ AHCI_FBS_ISSUE_MASK

#define AHCI_FBS_ISSUE_MASK 0x00000F00

Definition at line 260 of file ahci.h.

◆ AHCI_FBS_ISSUE_SHIFT

#define AHCI_FBS_ISSUE_SHIFT 8

Definition at line 264 of file ahci.h.

◆ AHCI_FBS_RECEIVE_AREA_SIZE

#define AHCI_FBS_RECEIVE_AREA_SIZE 4096

Definition at line 25 of file ahci.h.

◆ AHCI_FBS_SINGLE_DEV_ERROR

#define AHCI_FBS_SINGLE_DEV_ERROR 0x00000004

Definition at line 259 of file ahci.h.

◆ AHCI_FIS_BIST_ACTIVATE

#define AHCI_FIS_BIST_ACTIVATE 0x58

Definition at line 44 of file ahci.h.

◆ AHCI_FIS_DATA

#define AHCI_FIS_DATA 0x46

Definition at line 43 of file ahci.h.

◆ AHCI_FIS_DMA_ACTIVATE_DEVICE_TO_HOST

#define AHCI_FIS_DMA_ACTIVATE_DEVICE_TO_HOST 0x39

Definition at line 41 of file ahci.h.

◆ AHCI_FIS_DMA_SETUP

#define AHCI_FIS_DMA_SETUP 0x41

Definition at line 42 of file ahci.h.

◆ AHCI_FIS_PIO_SETUP_DEVICE_TO_HOST

#define AHCI_FIS_PIO_SETUP_DEVICE_TO_HOST 0x5F

Definition at line 45 of file ahci.h.

◆ AHCI_FIS_REGISTER_DEVICE_TO_HOST

#define AHCI_FIS_REGISTER_DEVICE_TO_HOST 0x34

Definition at line 40 of file ahci.h.

◆ AHCI_FIS_REGISTER_HOST_TO_DEVICE

#define AHCI_FIS_REGISTER_HOST_TO_DEVICE 0x27

Definition at line 39 of file ahci.h.

◆ AHCI_FIS_SET_DEVICE_BITS_DEVICE_TO_HOST

#define AHCI_FIS_SET_DEVICE_BITS_DEVICE_TO_HOST 0xA1

Definition at line 46 of file ahci.h.

◆ AHCI_GHC_AE

#define AHCI_GHC_AE 0x80000000

Definition at line 310 of file ahci.h.

◆ AHCI_GHC_HR

#define AHCI_GHC_HR 0x00000001

Definition at line 307 of file ahci.h.

◆ AHCI_GHC_IE

#define AHCI_GHC_IE 0x00000002

Definition at line 308 of file ahci.h.

◆ AHCI_GHC_MRSM

#define AHCI_GHC_MRSM 0x00000004

Definition at line 309 of file ahci.h.

◆ AHCI_INTERNAL_SLOT

#define AHCI_INTERNAL_SLOT 0

Definition at line 60 of file ahci.h.

◆ AHCI_MAX_COMMAND_SLOTS

#define AHCI_MAX_COMMAND_SLOTS 32

Definition at line 13 of file ahci.h.

◆ AHCI_MAX_PMP_DEVICES

#define AHCI_MAX_PMP_DEVICES 15

Definition at line 12 of file ahci.h.

◆ AHCI_MAX_PORT_DEVICES

#define AHCI_MAX_PORT_DEVICES 1

Definition at line 11 of file ahci.h.

◆ AHCI_MAX_PORTS

#define AHCI_MAX_PORTS 32

Definition at line 10 of file ahci.h.

◆ AHCI_MAX_PRD_LENGTH

#define AHCI_MAX_PRD_LENGTH 0x003FFFFF

Definition at line 16 of file ahci.h.

◆ AHCI_MAX_PRDT_ENTRIES

#define AHCI_MAX_PRDT_ENTRIES 0x000FFFFF

Definition at line 15 of file ahci.h.

◆ AHCI_PMP_BIST

#define AHCI_PMP_BIST 0x00000001

Definition at line 75 of file ahci.h.

◆ AHCI_PMP_CONTROL_PORT

#define AHCI_PMP_CONTROL_PORT 15

Definition at line 18 of file ahci.h.

◆ AHCI_PMP_PMREQ

#define AHCI_PMP_PMREQ 0x00000002

Definition at line 76 of file ahci.h.

◆ AHCI_PMP_SNTF

#define AHCI_PMP_SNTF 0x00000008

Definition at line 78 of file ahci.h.

◆ AHCI_PMP_SSC

#define AHCI_PMP_SSC 0x00000004

Definition at line 77 of file ahci.h.

◆ AHCI_PORT_BASE

#define AHCI_PORT_BASE	(	HbaIoBase,
		PortNumber
	)	(PULONG)((ULONG_PTR)(HbaIoBase) + (PortNumber) * 0x80 + 0x100)

Definition at line 524 of file ahci.h.

◆ AHCI_PORT_INTERRUPT_MASK

#define AHCI_PORT_INTERRUPT_MASK

Value:

    (AHCI_PXIRQ_DHRS | \
     AHCI_PXIRQ_PSS  | \
     AHCI_PXIRQ_DSS  | \
     AHCI_PXIRQ_SDBS | \
     AHCI_PXIRQ_UFS  | \
     AHCI_PXIRQ_DPS  | \
     AHCI_PXIRQ_PCS  | \
     AHCI_PXIRQ_DMPS | \
     AHCI_PXIRQ_PRCS | \
     AHCI_PXIRQ_IPMS | \
     AHCI_PXIRQ_OFS  | \
     AHCI_PXIRQ_INFS | \
     AHCI_PXIRQ_IFS  | \
     AHCI_PXIRQ_HBDS | \
     AHCI_PXIRQ_HBFS | \
     AHCI_PXIRQ_TFES | \
     AHCI_PXIRQ_CPDS)

Definition at line 276 of file ahci.h.

◆ AHCI_PRD_INTERRUPT_ON_COMPLETION

#define AHCI_PRD_INTERRUPT_ON_COMPLETION 0x80000000

Definition at line 502 of file ahci.h.

◆ AHCI_PXCMD_ALPE

#define AHCI_PXCMD_ALPE 0x04000000

Definition at line 169 of file ahci.h.

◆ AHCI_PXCMD_APSTE

#define AHCI_PXCMD_APSTE 0x00800000

Definition at line 166 of file ahci.h.

◆ AHCI_PXCMD_ASP

#define AHCI_PXCMD_ASP 0x08000000

Definition at line 170 of file ahci.h.

◆ AHCI_PXCMD_ATAPI

#define AHCI_PXCMD_ATAPI 0x01000000

Definition at line 167 of file ahci.h.

◆ AHCI_PXCMD_CCS

#define AHCI_PXCMD_CCS ( Value ) (((Value) & AHCI_PXCMD_CCS_MASK) >> AHCI_PXCMD_CCS_SHIFT)

Definition at line 183 of file ahci.h.

◆ AHCI_PXCMD_CCS_MASK

#define AHCI_PXCMD_CCS_MASK 0x00001F00

Definition at line 155 of file ahci.h.

◆ AHCI_PXCMD_CCS_SHIFT

#define AHCI_PXCMD_CCS_SHIFT 8

Definition at line 181 of file ahci.h.

◆ AHCI_PXCMD_CLO

#define AHCI_PXCMD_CLO 0x00000008

Definition at line 152 of file ahci.h.

◆ AHCI_PXCMD_CPD

#define AHCI_PXCMD_CPD 0x00100000

Definition at line 163 of file ahci.h.

◆ AHCI_PXCMD_CPS

#define AHCI_PXCMD_CPS 0x00010000

Definition at line 159 of file ahci.h.

◆ AHCI_PXCMD_CR

#define AHCI_PXCMD_CR 0x00008000

Definition at line 158 of file ahci.h.

◆ AHCI_PXCMD_DLAE

#define AHCI_PXCMD_DLAE 0x02000000

Definition at line 168 of file ahci.h.

◆ AHCI_PXCMD_ESP

#define AHCI_PXCMD_ESP 0x00200000

Definition at line 164 of file ahci.h.

◆ AHCI_PXCMD_FBSCP

#define AHCI_PXCMD_FBSCP 0x00400000

Definition at line 165 of file ahci.h.

◆ AHCI_PXCMD_FR

#define AHCI_PXCMD_FR 0x00004000

Definition at line 157 of file ahci.h.

◆ AHCI_PXCMD_FRE

#define AHCI_PXCMD_FRE 0x00000010

Definition at line 153 of file ahci.h.

◆ AHCI_PXCMD_HPCP

#define AHCI_PXCMD_HPCP 0x00040000

Definition at line 161 of file ahci.h.

◆ AHCI_PXCMD_ICC_ACTIVE

#define AHCI_PXCMD_ICC_ACTIVE 0x10000000

Definition at line 174 of file ahci.h.

◆ AHCI_PXCMD_ICC_DEVSLEEP [1/2]

#define AHCI_PXCMD_ICC_DEVSLEEP 0x80000000

Definition at line 179 of file ahci.h.

◆ AHCI_PXCMD_ICC_DEVSLEEP [2/2]

#define AHCI_PXCMD_ICC_DEVSLEEP 0x80000000

Definition at line 179 of file ahci.h.

◆ AHCI_PXCMD_ICC_IDLE

#define AHCI_PXCMD_ICC_IDLE 0x00000000

Definition at line 173 of file ahci.h.

◆ AHCI_PXCMD_ICC_MASK

#define AHCI_PXCMD_ICC_MASK 0xF0000000

Definition at line 171 of file ahci.h.

◆ AHCI_PXCMD_ICC_PARTIAL

#define AHCI_PXCMD_ICC_PARTIAL 0x20000000

Definition at line 175 of file ahci.h.

◆ AHCI_PXCMD_ICC_SLUMBER

#define AHCI_PXCMD_ICC_SLUMBER 0x60000000

Definition at line 176 of file ahci.h.

◆ AHCI_PXCMD_MPSP

#define AHCI_PXCMD_MPSP 0x00080000

Definition at line 162 of file ahci.h.

◆ AHCI_PXCMD_MPSS

#define AHCI_PXCMD_MPSS 0x00002000

Definition at line 156 of file ahci.h.

◆ AHCI_PXCMD_PMA

#define AHCI_PXCMD_PMA 0x00020000

Definition at line 160 of file ahci.h.

◆ AHCI_PXCMD_POD

#define AHCI_PXCMD_POD 0x00000004

Definition at line 151 of file ahci.h.

◆ AHCI_PXCMD_RSV

#define AHCI_PXCMD_RSV 0x000000E0

Definition at line 154 of file ahci.h.

◆ AHCI_PXCMD_ST

#define AHCI_PXCMD_ST 0x00000001

Definition at line 149 of file ahci.h.

◆ AHCI_PXCMD_SUD

#define AHCI_PXCMD_SUD 0x00000002

Definition at line 150 of file ahci.h.

◆ AHCI_PXCTL_DET_DISABLE_SATA

#define AHCI_PXCTL_DET_DISABLE_SATA 0x00000004

Definition at line 238 of file ahci.h.

◆ AHCI_PXCTL_DET_IDLE

#define AHCI_PXCTL_DET_IDLE 0x00000000

Definition at line 236 of file ahci.h.

◆ AHCI_PXCTL_DET_MASK

#define AHCI_PXCTL_DET_MASK 0x0000000F

Definition at line 232 of file ahci.h.

◆ AHCI_PXCTL_DET_RESET

#define AHCI_PXCTL_DET_RESET 0x00000001

Definition at line 237 of file ahci.h.

◆ AHCI_PXCTL_IPM_DISABLE_ALL

#define AHCI_PXCTL_IPM_DISABLE_ALL 0x00000700

Definition at line 252 of file ahci.h.

◆ AHCI_PXCTL_IPM_DISABLE_DEVSLEEP

#define AHCI_PXCTL_IPM_DISABLE_DEVSLEEP 0x00000400

Definition at line 250 of file ahci.h.

◆ AHCI_PXCTL_IPM_DISABLE_NONE

#define AHCI_PXCTL_IPM_DISABLE_NONE 0x00000000

Definition at line 247 of file ahci.h.

◆ AHCI_PXCTL_IPM_DISABLE_PARTIAL

#define AHCI_PXCTL_IPM_DISABLE_PARTIAL 0x00000100

Definition at line 248 of file ahci.h.

◆ AHCI_PXCTL_IPM_DISABLE_SLUMBER

#define AHCI_PXCTL_IPM_DISABLE_SLUMBER 0x00000200

Definition at line 249 of file ahci.h.

◆ AHCI_PXCTL_IPM_MASK

#define AHCI_PXCTL_IPM_MASK 0x00000F00

Definition at line 234 of file ahci.h.

◆ AHCI_PXCTL_SPD_LIMIT_LEVEL

#define AHCI_PXCTL_SPD_LIMIT_LEVEL 0x00000010

Definition at line 245 of file ahci.h.

◆ AHCI_PXCTL_SPD_LIMIT_NONE

#define AHCI_PXCTL_SPD_LIMIT_NONE 0x00000000

Definition at line 240 of file ahci.h.

◆ AHCI_PXCTL_SPD_LIMIT_SATA1

#define AHCI_PXCTL_SPD_LIMIT_SATA1 0x00000010

Definition at line 241 of file ahci.h.

◆ AHCI_PXCTL_SPD_LIMIT_SATA2

#define AHCI_PXCTL_SPD_LIMIT_SATA2 0x00000020

Definition at line 242 of file ahci.h.

◆ AHCI_PXCTL_SPD_LIMIT_SATA3

#define AHCI_PXCTL_SPD_LIMIT_SATA3 0x00000030

Definition at line 243 of file ahci.h.

◆ AHCI_PXCTL_SPD_MASK

#define AHCI_PXCTL_SPD_MASK 0x000000F0

Definition at line 233 of file ahci.h.

◆ AHCI_PXDEVSLP_ADSE

#define AHCI_PXDEVSLP_ADSE 0x00000001

Definition at line 269 of file ahci.h.

◆ AHCI_PXDEVSLP_DETO_MASK

#define AHCI_PXDEVSLP_DETO_MASK 0x000003FC

Definition at line 271 of file ahci.h.

◆ AHCI_PXDEVSLP_DITO_MASK

#define AHCI_PXDEVSLP_DITO_MASK 0x01FF8000

Definition at line 273 of file ahci.h.

◆ AHCI_PXDEVSLP_DM_MASK

#define AHCI_PXDEVSLP_DM_MASK 0x1E000000

Definition at line 274 of file ahci.h.

◆ AHCI_PXDEVSLP_DSP

#define AHCI_PXDEVSLP_DSP 0x00000002

Definition at line 270 of file ahci.h.

◆ AHCI_PXDEVSLP_MDAT_MASK

#define AHCI_PXDEVSLP_MDAT_MASK 0x00007C00

Definition at line 272 of file ahci.h.

◆ AHCI_PXIRQ_CPDS

#define AHCI_PXIRQ_CPDS 0x80000000

Definition at line 138 of file ahci.h.

◆ AHCI_PXIRQ_DHRS

#define AHCI_PXIRQ_DHRS 0x00000001

Definition at line 120 of file ahci.h.

◆ AHCI_PXIRQ_DMPS

#define AHCI_PXIRQ_DMPS 0x00000080

Definition at line 127 of file ahci.h.

◆ AHCI_PXIRQ_DPS

#define AHCI_PXIRQ_DPS 0x00000020

Definition at line 125 of file ahci.h.

◆ AHCI_PXIRQ_DSS

#define AHCI_PXIRQ_DSS 0x00000004

Definition at line 122 of file ahci.h.

◆ AHCI_PXIRQ_FATAL_ERROR

#define AHCI_PXIRQ_FATAL_ERROR (AHCI_PXIRQ_TFES | AHCI_PXIRQ_IFS | AHCI_PXIRQ_HBDS | AHCI_PXIRQ_HBFS)

Definition at line 140 of file ahci.h.

◆ AHCI_PXIRQ_HBDS

#define AHCI_PXIRQ_HBDS 0x10000000

Definition at line 135 of file ahci.h.

◆ AHCI_PXIRQ_HBFS

#define AHCI_PXIRQ_HBFS 0x20000000

Definition at line 136 of file ahci.h.

◆ AHCI_PXIRQ_IFS

#define AHCI_PXIRQ_IFS 0x08000000

Definition at line 134 of file ahci.h.

◆ AHCI_PXIRQ_INFS

#define AHCI_PXIRQ_INFS 0x04000000

Definition at line 133 of file ahci.h.

◆ AHCI_PXIRQ_IPMS

#define AHCI_PXIRQ_IPMS 0x00800000

Definition at line 130 of file ahci.h.

◆ AHCI_PXIRQ_OFS

#define AHCI_PXIRQ_OFS 0x01000000

Definition at line 131 of file ahci.h.

◆ AHCI_PXIRQ_PCS

#define AHCI_PXIRQ_PCS 0x00000040

Definition at line 126 of file ahci.h.

◆ AHCI_PXIRQ_PORT_STATUS

#define AHCI_PXIRQ_PORT_STATUS (AHCI_PXIRQ_PCS | AHCI_PXIRQ_PRCS | AHCI_PXIRQ_DMPS)

Definition at line 143 of file ahci.h.

◆ AHCI_PXIRQ_PRCS

#define AHCI_PXIRQ_PRCS 0x00400000

Definition at line 129 of file ahci.h.

◆ AHCI_PXIRQ_PSS

#define AHCI_PXIRQ_PSS 0x00000002

Definition at line 121 of file ahci.h.

◆ AHCI_PXIRQ_RSV1

#define AHCI_PXIRQ_RSV1 0x003FFF00

Definition at line 128 of file ahci.h.

◆ AHCI_PXIRQ_RSV2

#define AHCI_PXIRQ_RSV2 0x02000000

Definition at line 132 of file ahci.h.

◆ AHCI_PXIRQ_SDBS

#define AHCI_PXIRQ_SDBS 0x00000008

Definition at line 123 of file ahci.h.

◆ AHCI_PXIRQ_TFES

#define AHCI_PXIRQ_TFES 0x40000000

Definition at line 137 of file ahci.h.

◆ AHCI_PXIRQ_UFS

#define AHCI_PXIRQ_UFS 0x00000010

Definition at line 124 of file ahci.h.

◆ AHCI_PXSIG_ATAPI

#define AHCI_PXSIG_ATAPI 0xEB140101

Definition at line 197 of file ahci.h.

◆ AHCI_PXSIG_INVALID

#define AHCI_PXSIG_INVALID 0xFFFFFFFF

Definition at line 196 of file ahci.h.

◆ AHCI_PXSIG_MASK

#define AHCI_PXSIG_MASK 0xFFFF0000

Definition at line 204 of file ahci.h.

◆ AHCI_PXSIG_PMP

#define AHCI_PXSIG_PMP 0x96690101

Definition at line 198 of file ahci.h.

◆ AHCI_PXSSTS_DET_MASK

#define AHCI_PXSSTS_DET_MASK 0x0000000F

Definition at line 209 of file ahci.h.

◆ AHCI_PXSSTS_DET_NO_DEVICE

#define AHCI_PXSSTS_DET_NO_DEVICE 0x00000000

Definition at line 213 of file ahci.h.

◆ AHCI_PXSSTS_DET_PHY_NOT_READY

#define AHCI_PXSSTS_DET_PHY_NOT_READY 0x00000001

Definition at line 214 of file ahci.h.

◆ AHCI_PXSSTS_DET_PHY_OFFLINE

#define AHCI_PXSSTS_DET_PHY_OFFLINE 0x00000004

Definition at line 216 of file ahci.h.

◆ AHCI_PXSSTS_DET_PHY_OK

#define AHCI_PXSSTS_DET_PHY_OK 0x00000003

Definition at line 215 of file ahci.h.

◆ AHCI_PXSSTS_IPM_ACTIVE

#define AHCI_PXSSTS_IPM_ACTIVE 0x00000100

Definition at line 224 of file ahci.h.

◆ AHCI_PXSSTS_IPM_DEVSLEEP

#define AHCI_PXSSTS_IPM_DEVSLEEP 0x00000800

Definition at line 227 of file ahci.h.

◆ AHCI_PXSSTS_IPM_MASK

#define AHCI_PXSSTS_IPM_MASK 0x00000F00

Definition at line 211 of file ahci.h.

◆ AHCI_PXSSTS_IPM_NO_DEVICE

#define AHCI_PXSSTS_IPM_NO_DEVICE 0x00000000

Definition at line 223 of file ahci.h.

◆ AHCI_PXSSTS_IPM_PARTIAL

#define AHCI_PXSSTS_IPM_PARTIAL 0x00000200

Definition at line 225 of file ahci.h.

◆ AHCI_PXSSTS_IPM_SLUMBER

#define AHCI_PXSSTS_IPM_SLUMBER 0x00000600

Definition at line 226 of file ahci.h.

◆ AHCI_PXSSTS_SPD_MASK

#define AHCI_PXSSTS_SPD_MASK 0x000000F0

Definition at line 210 of file ahci.h.

◆ AHCI_PXSSTS_SPD_SATA1

#define AHCI_PXSSTS_SPD_SATA1 0x00000010

Definition at line 219 of file ahci.h.

◆ AHCI_PXSSTS_SPD_SATA2

#define AHCI_PXSSTS_SPD_SATA2 0x00000020

Definition at line 220 of file ahci.h.

◆ AHCI_PXSSTS_SPD_SATA3

#define AHCI_PXSSTS_SPD_SATA3 0x00000030

Definition at line 221 of file ahci.h.

◆ AHCI_PXSSTS_SPD_UNKNOWN

#define AHCI_PXSSTS_SPD_UNKNOWN 0x00000000

Definition at line 218 of file ahci.h.

◆ AHCI_PXTFD_ERROR_MASK

#define AHCI_PXTFD_ERROR_MASK 0x0000FF00

Definition at line 189 of file ahci.h.

◆ AHCI_PXTFD_ERROR_SHIFT

#define AHCI_PXTFD_ERROR_SHIFT 8

Definition at line 191 of file ahci.h.

◆ AHCI_PXTFD_STATUS_MASK

#define AHCI_PXTFD_STATUS_MASK 0x000000FF

Definition at line 188 of file ahci.h.

◆ AHCI_RECEIVED_FIS_ALIGNMENT

#define AHCI_RECEIVED_FIS_ALIGNMENT 256

Definition at line 21 of file ahci.h.

◆ AHCI_RECEIVED_FIS_FBS_ALIGNMENT

#define AHCI_RECEIVED_FIS_FBS_ALIGNMENT 4096

Definition at line 23 of file ahci.h.

◆ AHCI_VERSION_0_95

#define AHCI_VERSION_0_95 0x00000905

Definition at line 298 of file ahci.h.

◆ AHCI_VERSION_1_0

#define AHCI_VERSION_1_0 0x00010000

Definition at line 299 of file ahci.h.

◆ AHCI_VERSION_1_2

#define AHCI_VERSION_1_2 0x00010200

Definition at line 300 of file ahci.h.

◆ AHCI_VERSION_1_3_0

#define AHCI_VERSION_1_3_0 0x00010300

Definition at line 301 of file ahci.h.

◆ AHCI_VERSION_1_3_1

#define AHCI_VERSION_1_3_1 0x00010301

Definition at line 302 of file ahci.h.

◆ IDE_COMMAND_READ_PORT_MULTIPLIER

#define IDE_COMMAND_READ_PORT_MULTIPLIER 0xE4

Definition at line 48 of file ahci.h.

◆ IDE_COMMAND_WRITE_PORT_MULTIPLIER

#define IDE_COMMAND_WRITE_PORT_MULTIPLIER 0xE8

Definition at line 49 of file ahci.h.

◆ PMP_NUMBER

#define PMP_NUMBER 0x0F

Definition at line 361 of file ahci.h.

◆ UPDATE_COMMAND

#define UPDATE_COMMAND 0x80

Definition at line 360 of file ahci.h.

Typedef Documentation

◆ AHCI_COMMAND_HEADER

typedef struct _AHCI_COMMAND_HEADER AHCI_COMMAND_HEADER

◆ AHCI_COMMAND_LIST

typedef struct _AHCI_COMMAND_LIST AHCI_COMMAND_LIST

◆ AHCI_COMMAND_TABLE

typedef struct _AHCI_COMMAND_TABLE AHCI_COMMAND_TABLE

◆ AHCI_FIS_DEVICE_TO_HOST

typedef struct _AHCI_FIS_DEVICE_TO_HOST AHCI_FIS_DEVICE_TO_HOST

◆ AHCI_FIS_HOST_TO_DEVICE

typedef struct _AHCI_FIS_HOST_TO_DEVICE AHCI_FIS_HOST_TO_DEVICE

◆ AHCI_FIS_PIO_SETUP

typedef struct _AHCI_FIS_PIO_SETUP AHCI_FIS_PIO_SETUP

◆ AHCI_FIS_SET_DEVICE_BITS

typedef struct _AHCI_FIS_SET_DEVICE_BITS AHCI_FIS_SET_DEVICE_BITS

◆ AHCI_HOST_BUS_ADAPTER_REGISTER

typedef enum _AHCI_HOST_BUS_ADAPTER_REGISTER AHCI_HOST_BUS_ADAPTER_REGISTER

◆ AHCI_PORT_MULTIPLIER_REGISTER

typedef enum _AHCI_PORT_MULTIPLIER_REGISTER AHCI_PORT_MULTIPLIER_REGISTER

Port Multiplier Registers

◆ AHCI_PORT_REGISTER

typedef enum _AHCI_PORT_REGISTER AHCI_PORT_REGISTER

◆ AHCI_PRD_TABLE_ENTRY

typedef struct _AHCI_PRD_TABLE_ENTRY AHCI_PRD_TABLE_ENTRY

◆ AHCI_RECEIVED_FIS

typedef struct _AHCI_RECEIVED_FIS AHCI_RECEIVED_FIS

◆ PAHCI_COMMAND_HEADER

typedef struct _AHCI_COMMAND_HEADER * PAHCI_COMMAND_HEADER

◆ PAHCI_COMMAND_LIST

typedef struct _AHCI_COMMAND_LIST * PAHCI_COMMAND_LIST

◆ PAHCI_COMMAND_TABLE

typedef struct _AHCI_COMMAND_TABLE * PAHCI_COMMAND_TABLE

◆ PAHCI_FIS_DEVICE_TO_HOST

typedef struct _AHCI_FIS_DEVICE_TO_HOST * PAHCI_FIS_DEVICE_TO_HOST

◆ PAHCI_FIS_HOST_TO_DEVICE

typedef struct _AHCI_FIS_HOST_TO_DEVICE * PAHCI_FIS_HOST_TO_DEVICE

◆ PAHCI_FIS_PIO_SETUP

typedef struct _AHCI_FIS_PIO_SETUP * PAHCI_FIS_PIO_SETUP

◆ PAHCI_FIS_SET_DEVICE_BITS

typedef struct _AHCI_FIS_SET_DEVICE_BITS * PAHCI_FIS_SET_DEVICE_BITS

◆ PAHCI_PRD_TABLE_ENTRY

typedef struct _AHCI_PRD_TABLE_ENTRY * PAHCI_PRD_TABLE_ENTRY

◆ PAHCI_RECEIVED_FIS

typedef struct _AHCI_RECEIVED_FIS * PAHCI_RECEIVED_FIS

◆ SATA_SCR_REGISTER

typedef enum _SATA_SCR_REGISTER SATA_SCR_REGISTER

Enumeration Type Documentation

◆ _AHCI_HOST_BUS_ADAPTER_REGISTER

enum _AHCI_HOST_BUS_ADAPTER_REGISTER

Enumerator
HbaCapabilities
HbaGlobalControl
HbaInterruptStatus
HbaPortBitmap
HbaAhciVersion
HbaCoalescingControl
HbaCoalescingPorts
HbaEnclosureManagementLocation
HbaEnclosureManagementControl
HbaCapabilitiesEx
HbaBiosHandoffControl

Definition at line 81 of file ahci.h.

{
    HbaCapabilities = 0x00,
    HbaGlobalControl = 0x04,
    HbaInterruptStatus = 0x08,
    HbaPortBitmap = 0x0C,
    HbaAhciVersion = 0x10,
    HbaCoalescingControl = 0x14,
    HbaCoalescingPorts = 0x18,
    HbaEnclosureManagementLocation = 0x1C,
    HbaEnclosureManagementControl = 0x20,
    HbaCapabilitiesEx = 0x24,
    HbaBiosHandoffControl = 0x28,
} AHCI_HOST_BUS_ADAPTER_REGISTER;

◆ _AHCI_PORT_MULTIPLIER_REGISTER

enum _AHCI_PORT_MULTIPLIER_REGISTER

Port Multiplier Registers

Enumerator
PmpProductId
PmpRevisionInfo
PmpPortInfo
PmpErrorInfo
PmpErrorControl
PmpPhyEventCounterControl
PmpCapabilities
PmpFeaturesEnabled

Definition at line 65 of file ahci.h.

{
    PmpProductId = 0,
    PmpRevisionInfo = 1,
    PmpPortInfo = 2,
    PmpErrorInfo = 32,
    PmpErrorControl = 33,
    PmpPhyEventCounterControl = 34,
    PmpCapabilities = 64,
    PmpFeaturesEnabled = 96,
#define AHCI_PMP_BIST        0x00000001
#define AHCI_PMP_PMREQ       0x00000002
#define AHCI_PMP_SSC         0x00000004
#define AHCI_PMP_SNTF        0x00000008
} AHCI_PORT_MULTIPLIER_REGISTER;

◆ _AHCI_PORT_REGISTER

enum _AHCI_PORT_REGISTER

Enumerator
PxCommandListBaseLow
PxCommandListBaseHigh
PxFisBaseLow
PxFisBaseHigh
PxInterruptStatus
PxInterruptEnable
PxCmdStatus
PxTaskFileData
PxSignature
PxSataStatus
PxSataControl
PxSataError
PxSataActive
PxCommandIssue
PxSataNotification
PxFisSwitchingControl
PxDeviceSleep

Definition at line 96 of file ahci.h.

{
    PxCommandListBaseLow = 0x00,
    PxCommandListBaseHigh = 0x04,
    PxFisBaseLow = 0x08,
    PxFisBaseHigh = 0x0C,
    PxInterruptStatus = 0x10,
    PxInterruptEnable = 0x14,
    PxCmdStatus = 0x18,
    PxTaskFileData = 0x20,
    PxSignature = 0x24,
    PxSataStatus = 0x28,
    PxSataControl = 0x2C,
    PxSataError = 0x30,
    PxSataActive = 0x34,
    PxCommandIssue = 0x38,
    PxSataNotification = 0x3C,
    PxFisSwitchingControl = 0x40,
    PxDeviceSleep = 0x44,
} AHCI_PORT_REGISTER;

◆ _SATA_SCR_REGISTER

enum _SATA_SCR_REGISTER

Enumerator
ATA_SSTATUS
ATA_SERROR
ATA_SCONTROL
ATA_SACTIVE
ATA_SNOTIFICATION

Definition at line 51 of file ahci.h.

{
    ATA_SSTATUS = 0,
    ATA_SERROR = 1,
    ATA_SCONTROL = 2,
    ATA_SACTIVE = 3,
    ATA_SNOTIFICATION = 4,
} SATA_SCR_REGISTER;

Function Documentation

◆ AHCI_HBA_READ()

FORCEINLINE ULONG AHCI_HBA_READ	(	_In_ PVOID	HbaIoBase,
		_In_ AHCI_HOST_BUS_ADAPTER_REGISTER	Register
	)

Definition at line 529 of file ahci.h.

{
    return READ_REGISTER_ULONG((PULONG)((ULONG_PTR)HbaIoBase + Register));
}

Referenced by AhciGetControllerProperties(), AtaAhciHbaIsr(), AtaAhciHbaRequestOsOwnership(), AtaAhciHbaStart(), AtaAhciHbaStop(), and AtaAhciIsHbaHotRemoved().

◆ AHCI_HBA_WRITE()

FORCEINLINE VOID AHCI_HBA_WRITE	(	_In_ PVOID	HbaIoBase,
		_In_ AHCI_HOST_BUS_ADAPTER_REGISTER	Register,
		_In_ ULONG	Value
	)

Definition at line 538 of file ahci.h.

{
    WRITE_REGISTER_ULONG((PULONG)((ULONG_PTR)HbaIoBase + Register), Value);
}

Referenced by AhciGetControllerProperties(), AtaAhciEnableInterrupts(), AtaAhciHbaIsr(), AtaAhciHbaRequestOsOwnership(), AtaAhciHbaStart(), AtaAhciHbaStop(), and AtaAhciPostRequestPolled().

◆ AHCI_PORT_READ()

FORCEINLINE ULONG AHCI_PORT_READ	(	_In_ PVOID	PortIoBase,
		_In_ AHCI_PORT_REGISTER	Register
	)

Definition at line 548 of file ahci.h.

{
    return READ_REGISTER_ULONG((PULONG)((ULONG_PTR)PortIoBase + Register));
}

Referenced by AtaAhciAtapiLedControl(), AtaAhciCreateChannelData(), AtaAhciDowngradeInterfaceSpeed(), AtaAhciEnterIdleState(), AtaAhciFbsControl(), AtaAhciHandleFatalError(), AtaAhciHandlePortStateChange(), AtaAhciIdentifyDevice(), AtaAhciPerformCommandListOverride(), AtaAhciPhyCheckConnection(), AtaAhciPhyCheckDevicePresence(), AtaAhciPhyEnterListenMode(), AtaAhciPmpDetect(), AtaAhciPollRegister(), AtaAhciPortHandleInterrupt(), AtaAhciPostRequestPolled(), AtaAhciSaveTaskFile(), AtaAhciSendComReset(), AtaAhciSpinUp(), AtaAhciStartCommandListProcess(), AtaAhciStartFisReceiveProcess(), AtaAhciStartFisReceiveProcessAndWait(), AtaAhciStopCommandListProcess(), AtaAhciStopFisReceiveProcess(), AtaAhciWaitForDeviceReady(), and AtaCtrlAbortChannel().

◆ AHCI_PORT_WRITE()

FORCEINLINE VOID AHCI_PORT_WRITE	(	_In_ PVOID	PortIoBase,
		_In_ AHCI_PORT_REGISTER	Register,
		_In_ ULONG	Value
	)

◆ C_ASSERT() [1/8]

C_ASSERT ( FIELD_OFFSET(AHCI_COMMAND_TABLE, PrdTable) = =128 )

◆ C_ASSERT() [2/8]

C_ASSERT ( sizeof(AHCI_COMMAND_HEADER) = =32 )

◆ C_ASSERT() [3/8]

C_ASSERT ( sizeof(AHCI_FIS_DEVICE_TO_HOST) = =20 )

◆ C_ASSERT() [4/8]

C_ASSERT ( sizeof(AHCI_FIS_HOST_TO_DEVICE) = =20 )

◆ C_ASSERT() [5/8]

C_ASSERT ( sizeof(AHCI_FIS_PIO_SETUP) = =20 )

◆ C_ASSERT() [6/8]

C_ASSERT ( sizeof(AHCI_FIS_SET_DEVICE_BITS) = =8 )

◆ C_ASSERT() [7/8]

C_ASSERT ( sizeof(AHCI_PRD_TABLE_ENTRY) = =16 )

◆ C_ASSERT() [8/8]

C_ASSERT ( sizeof(AHCI_RECEIVED_FIS) = =256 )

Classes

Macros

Typedefs

Enumerations

Functions