ReactOS  0.4.15-dev-1171-gab82533
cpu_arm.c File Reference
#include <assert.h>
#include "ntstatus.h"
#include "dbghelp_private.h"
#include "winternl.h"
#include "wine/debug.h"
Include dependency graph for cpu_arm.c:

Go to the source code of this file.

Macros

#define WIN32_NO_STATUS
 

Functions

 WINE_DEFAULT_DEBUG_CHANNEL (dbghelp)
 
static BOOL arm_get_addr (HANDLE hThread, const CONTEXT *ctx, enum cpu_addr ca, ADDRESS64 *addr)
 
static BOOL arm_stack_walk (struct cpu_stack_walk *csw, STACKFRAME64 *frame, union ctx *context)
 
static unsigned arm_map_dwarf_register (unsigned regno, const struct module *module, BOOL eh_frame)
 
static voidarm_fetch_context_reg (union ctx *pctx, unsigned regno, unsigned *size)
 
static const chararm_fetch_regname (unsigned regno)
 
static BOOL arm_fetch_minidump_thread (struct dump_context *dc, unsigned index, unsigned flags, const CONTEXT *ctx)
 
static BOOL arm_fetch_minidump_module (struct dump_context *dc, unsigned index, unsigned flags)
 

Variables

DECLSPEC_HIDDEN struct cpu cpu_arm
 

Macro Definition Documentation

◆ WIN32_NO_STATUS

#define WIN32_NO_STATUS

Definition at line 25 of file cpu_arm.c.

Function Documentation

◆ arm_fetch_context_reg()

static void* arm_fetch_context_reg ( union ctx pctx,
unsigned  regno,
unsigned size 
)
static

Definition at line 173 of file cpu_arm.c.

174 {
175 #ifdef __arm__
176  CONTEXT *ctx = &pctx->ctx;
177 
178  switch (regno)
179  {
180  case CV_ARM_R0 + 0: *size = sizeof(ctx->R0); return &ctx->R0;
181  case CV_ARM_R0 + 1: *size = sizeof(ctx->R1); return &ctx->R1;
182  case CV_ARM_R0 + 2: *size = sizeof(ctx->R2); return &ctx->R2;
183  case CV_ARM_R0 + 3: *size = sizeof(ctx->R3); return &ctx->R3;
184  case CV_ARM_R0 + 4: *size = sizeof(ctx->R4); return &ctx->R4;
185  case CV_ARM_R0 + 5: *size = sizeof(ctx->R5); return &ctx->R5;
186  case CV_ARM_R0 + 6: *size = sizeof(ctx->R6); return &ctx->R6;
187  case CV_ARM_R0 + 7: *size = sizeof(ctx->R7); return &ctx->R7;
188  case CV_ARM_R0 + 8: *size = sizeof(ctx->R8); return &ctx->R8;
189  case CV_ARM_R0 + 9: *size = sizeof(ctx->R9); return &ctx->R9;
190  case CV_ARM_R0 + 10: *size = sizeof(ctx->R10); return &ctx->R10;
191 #ifdef __REACTOS__
192  case CV_ARM_R0 + 11: *size = sizeof(ctx->R11); return &ctx->R11;
193  case CV_ARM_R0 + 12: *size = sizeof(ctx->R12); return &ctx->R12;
194 #else
195  case CV_ARM_R0 + 11: *size = sizeof(ctx->Fp); return &ctx->Fp;
196  case CV_ARM_R0 + 12: *size = sizeof(ctx->Ip); return &ctx->Ip;
197 #endif
198 
199  case CV_ARM_SP: *size = sizeof(ctx->Sp); return &ctx->Sp;
200  case CV_ARM_LR: *size = sizeof(ctx->Lr); return &ctx->Lr;
201  case CV_ARM_PC: *size = sizeof(ctx->Pc); return &ctx->Pc;
202  case CV_ARM_CPSR: *size = sizeof(ctx->Cpsr); return &ctx->Cpsr;
203  }
204 #endif
205  FIXME("Unknown register %x\n", regno);
206  return NULL;
207 }
#define FIXME(fmt,...)
Definition: debug.h:111
smooth NULL
Definition: ftsmooth.c:416
GLsizeiptr size
Definition: glext.h:5919
CONTEXT ctx

◆ arm_fetch_minidump_module()

static BOOL arm_fetch_minidump_module ( struct dump_context dc,
unsigned  index,
unsigned  flags 
)
static

Definition at line 250 of file cpu_arm.c.

251 {
252  /* FIXME: actually, we should probably take care of FPO data, unless it's stored in
253  * function table minidump stream
254  */
255  return FALSE;
256 }
#define FALSE
Definition: types.h:117

◆ arm_fetch_minidump_thread()

static BOOL arm_fetch_minidump_thread ( struct dump_context dc,
unsigned  index,
unsigned  flags,
const CONTEXT ctx 
)
static

Definition at line 236 of file cpu_arm.c.

237 {
238  if (ctx->ContextFlags && (flags & ThreadWriteInstructionWindow))
239  {
240  /* FIXME: crop values across module boundaries, */
241 #ifdef __arm__
242  ULONG base = ctx->Pc <= 0x80 ? 0 : ctx->Pc - 0x80;
243  minidump_add_memory_block(dc, base, ctx->Pc + 0x80 - base, 0);
244 #endif
245  }
246 
247  return TRUE;
248 }
#define TRUE
Definition: types.h:120
void minidump_add_memory_block(struct dump_context *dc, ULONG64 base, ULONG size, ULONG rva) DECLSPEC_HIDDEN
Definition: minidump.c:355
GLbitfield flags
Definition: glext.h:7161
unsigned int ULONG
Definition: retypes.h:1
static const WCHAR dc[]

◆ arm_fetch_regname()

static const char* arm_fetch_regname ( unsigned  regno)
static

Definition at line 209 of file cpu_arm.c.

210 {
211  switch (regno)
212  {
213  case CV_ARM_R0 + 0: return "r0";
214  case CV_ARM_R0 + 1: return "r1";
215  case CV_ARM_R0 + 2: return "r2";
216  case CV_ARM_R0 + 3: return "r3";
217  case CV_ARM_R0 + 4: return "r4";
218  case CV_ARM_R0 + 5: return "r5";
219  case CV_ARM_R0 + 6: return "r6";
220  case CV_ARM_R0 + 7: return "r7";
221  case CV_ARM_R0 + 8: return "r8";
222  case CV_ARM_R0 + 9: return "r9";
223  case CV_ARM_R0 + 10: return "r10";
224  case CV_ARM_R0 + 11: return "r11";
225  case CV_ARM_R0 + 12: return "r12";
226 
227  case CV_ARM_SP: return "sp";
228  case CV_ARM_LR: return "lr";
229  case CV_ARM_PC: return "pc";
230  case CV_ARM_CPSR: return "cpsr";
231  }
232  FIXME("Unknown register %x\n", regno);
233  return NULL;
234 }
#define FIXME(fmt,...)
Definition: debug.h:111
smooth NULL
Definition: ftsmooth.c:416

◆ arm_get_addr()

static BOOL arm_get_addr ( HANDLE  hThread,
const CONTEXT ctx,
enum cpu_addr  ca,
ADDRESS64 addr 
)
static

Definition at line 32 of file cpu_arm.c.

34 {
35  addr->Mode = AddrModeFlat;
36  addr->Segment = 0; /* don't need segment */
37  switch (ca)
38  {
39 #ifdef __arm__
40  case cpu_addr_pc: addr->Offset = ctx->Pc; return TRUE;
41  case cpu_addr_stack: addr->Offset = ctx->Sp; return TRUE;
42 #ifdef __REACTOS__
43  case cpu_addr_frame: addr->Offset = ctx->R11; return TRUE;
44 #else
45  case cpu_addr_frame: addr->Offset = ctx->Fp; return TRUE;
46 #endif
47 #endif
48  default: addr->Mode = -1;
49  return FALSE;
50  }
51 }
#define TRUE
Definition: types.h:120
#define FALSE
Definition: types.h:117
GLenum const GLvoid * addr
Definition: glext.h:9621
static const WCHAR ca[]
Definition: main.c:455

◆ arm_map_dwarf_register()

static unsigned arm_map_dwarf_register ( unsigned  regno,
const struct module module,
BOOL  eh_frame 
)
static

Definition at line 164 of file cpu_arm.c.

165 {
166  if (regno <= 15) return CV_ARM_R0 + regno;
167  if (regno == 128) return CV_ARM_CPSR;
168 
169  FIXME("Don't know how to map register %d\n", regno);
170  return CV_ARM_NOREG;
171 }
#define FIXME(fmt,...)
Definition: debug.h:111

◆ arm_stack_walk()

static BOOL arm_stack_walk ( struct cpu_stack_walk csw,
STACKFRAME64 frame,
union ctx context 
)
static

Definition at line 157 of file cpu_arm.c.

159 {
160  return FALSE;
161 }
#define FALSE
Definition: types.h:117

◆ WINE_DEFAULT_DEBUG_CHANNEL()

WINE_DEFAULT_DEBUG_CHANNEL ( dbghelp  )

Variable Documentation

◆ cpu_arm

Initial value:
= {
4,
CV_ARM_R0 + 11,
}
smooth NULL
Definition: ftsmooth.c:416
static unsigned arm_map_dwarf_register(unsigned regno, const struct module *module, BOOL eh_frame)
Definition: cpu_arm.c:164
static const char * arm_fetch_regname(unsigned regno)
Definition: cpu_arm.c:209
static BOOL arm_fetch_minidump_module(struct dump_context *dc, unsigned index, unsigned flags)
Definition: cpu_arm.c:250
static void * arm_fetch_context_reg(union ctx *pctx, unsigned regno, unsigned *size)
Definition: cpu_arm.c:173
static BOOL arm_get_addr(HANDLE hThread, const CONTEXT *ctx, enum cpu_addr ca, ADDRESS64 *addr)
Definition: cpu_arm.c:32
static BOOL arm_stack_walk(struct cpu_stack_walk *csw, STACKFRAME64 *frame, union ctx *context)
Definition: cpu_arm.c:157
static BOOL arm_fetch_minidump_thread(struct dump_context *dc, unsigned index, unsigned flags, const CONTEXT *ctx)
Definition: cpu_arm.c:236
#define IMAGE_FILE_MACHINE_ARMNT
Definition: compat.h:127

Definition at line 258 of file cpu_arm.c.