cpu_arm.c File Reference

#include <assert.h>
#include "ntstatus.h"
#include "dbghelp_private.h"
#include "winternl.h"
#include "wine/debug.h"

Include dependency graph for cpu_arm.c:

Go to the source code of this file.

Macros
#define	WIN32_NO_STATUS

Functions
	WINE_DEFAULT_DEBUG_CHANNEL (dbghelp)
static BOOL	arm_get_addr (HANDLE hThread, const CONTEXT *ctx, enum cpu_addr ca, ADDRESS64 *addr)
static BOOL	arm_stack_walk (struct cpu_stack_walk *csw, STACKFRAME64 *frame, union ctx *context)
static unsigned	arm_map_dwarf_register (unsigned regno, const struct module *module, BOOL eh_frame)
static void *	arm_fetch_context_reg (union ctx *pctx, unsigned regno, unsigned *size)
static const char *	arm_fetch_regname (unsigned regno)
static BOOL	arm_fetch_minidump_thread (struct dump_context *dc, unsigned index, unsigned flags, const CONTEXT *ctx)
static BOOL	arm_fetch_minidump_module (struct dump_context *dc, unsigned index, unsigned flags)

Variables
DECLSPEC_HIDDEN struct cpu	cpu_arm

Macro Definition Documentation

WIN32_NO_STATUS

#define WIN32_NO_STATUS

Definition at line 25 of file cpu_arm.c.

Function Documentation

arm_fetch_context_reg()

static void * arm_fetch_context_reg ( union ctx *  pctx, unsigned  regno, unsigned *  size  )

static

Definition at line 173 of file cpu_arm.c.

{
#ifdef __arm__
    CONTEXT *ctx = &pctx->ctx;
 
    switch (regno)
    {
    case CV_ARM_R0 +  0: *size = sizeof(ctx->R0); return &ctx->R0;
    case CV_ARM_R0 +  1: *size = sizeof(ctx->R1); return &ctx->R1;
    case CV_ARM_R0 +  2: *size = sizeof(ctx->R2); return &ctx->R2;
    case CV_ARM_R0 +  3: *size = sizeof(ctx->R3); return &ctx->R3;
    case CV_ARM_R0 +  4: *size = sizeof(ctx->R4); return &ctx->R4;
    case CV_ARM_R0 +  5: *size = sizeof(ctx->R5); return &ctx->R5;
    case CV_ARM_R0 +  6: *size = sizeof(ctx->R6); return &ctx->R6;
    case CV_ARM_R0 +  7: *size = sizeof(ctx->R7); return &ctx->R7;
    case CV_ARM_R0 +  8: *size = sizeof(ctx->R8); return &ctx->R8;
    case CV_ARM_R0 +  9: *size = sizeof(ctx->R9); return &ctx->R9;
    case CV_ARM_R0 + 10: *size = sizeof(ctx->R10); return &ctx->R10;
#ifdef __REACTOS__
    case CV_ARM_R0 + 11: *size = sizeof(ctx->R11); return &ctx->R11;
    case CV_ARM_R0 + 12: *size = sizeof(ctx->R12); return &ctx->R12;
#else
    case CV_ARM_R0 + 11: *size = sizeof(ctx->Fp); return &ctx->Fp;
    case CV_ARM_R0 + 12: *size = sizeof(ctx->Ip); return &ctx->Ip;
#endif
 
    case CV_ARM_SP: *size = sizeof(ctx->Sp); return &ctx->Sp;
    case CV_ARM_LR: *size = sizeof(ctx->Lr); return &ctx->Lr;
    case CV_ARM_PC: *size = sizeof(ctx->Pc); return &ctx->Pc;
    case CV_ARM_CPSR: *size = sizeof(ctx->Cpsr); return &ctx->Cpsr;
    }
#endif
    FIXME("Unknown register %x\n", regno);
    return NULL;
}

arm_fetch_minidump_module()

static BOOL arm_fetch_minidump_module ( struct dump_context *  dc, unsigned  index, unsigned  flags  )

static

Definition at line 250 of file cpu_arm.c.

{
    /* FIXME: actually, we should probably take care of FPO data, unless it's stored in
     * function table minidump stream
     */
    return FALSE;
}

arm_fetch_minidump_thread()

static BOOL arm_fetch_minidump_thread ( struct dump_context *  dc, unsigned  index, unsigned  flags, const CONTEXT *  ctx  )

static

Definition at line 236 of file cpu_arm.c.

{
    if (ctx->ContextFlags && (flags & ThreadWriteInstructionWindow))
    {
        /* FIXME: crop values across module boundaries, */
#ifdef __arm__
        ULONG base = ctx->Pc <= 0x80 ? 0 : ctx->Pc - 0x80;
        minidump_add_memory_block(dc, base, ctx->Pc + 0x80 - base, 0);
#endif
    }
 
    return TRUE;
}

arm_fetch_regname()

static const char * arm_fetch_regname ( unsigned  regno )

static

Definition at line 209 of file cpu_arm.c.

{
    switch (regno)
    {
    case CV_ARM_R0 +  0: return "r0";
    case CV_ARM_R0 +  1: return "r1";
    case CV_ARM_R0 +  2: return "r2";
    case CV_ARM_R0 +  3: return "r3";
    case CV_ARM_R0 +  4: return "r4";
    case CV_ARM_R0 +  5: return "r5";
    case CV_ARM_R0 +  6: return "r6";
    case CV_ARM_R0 +  7: return "r7";
    case CV_ARM_R0 +  8: return "r8";
    case CV_ARM_R0 +  9: return "r9";
    case CV_ARM_R0 + 10: return "r10";
    case CV_ARM_R0 + 11: return "r11";
    case CV_ARM_R0 + 12: return "r12";
 
    case CV_ARM_SP: return "sp";
    case CV_ARM_LR: return "lr";
    case CV_ARM_PC: return "pc";
    case CV_ARM_CPSR: return "cpsr";
    }
    FIXME("Unknown register %x\n", regno);
    return NULL;
}

arm_get_addr()

static BOOL arm_get_addr ( HANDLE  hThread, const CONTEXT *  ctx, enum cpu_addr  ca, ADDRESS64 *  addr  )

static

Definition at line 32 of file cpu_arm.c.

{
    addr->Mode    = AddrModeFlat;
    addr->Segment = 0; /* don't need segment */
    switch (ca)
    {
#ifdef __arm__
    case cpu_addr_pc:    addr->Offset = ctx->Pc; return TRUE;
    case cpu_addr_stack: addr->Offset = ctx->Sp; return TRUE;
#ifdef __REACTOS__
    case cpu_addr_frame: addr->Offset = ctx->R11; return TRUE;
#else
    case cpu_addr_frame: addr->Offset = ctx->Fp; return TRUE;
#endif
#endif
    default: addr->Mode = -1;
        return FALSE;
    }
}

arm_map_dwarf_register()

static unsigned arm_map_dwarf_register ( unsigned  regno, const struct module *  module, BOOL  eh_frame  )

static

Definition at line 164 of file cpu_arm.c.

{
    if (regno <= 15) return CV_ARM_R0 + regno;
    if (regno == 128) return CV_ARM_CPSR;
 
    FIXME("Don't know how to map register %d\n", regno);
    return CV_ARM_NOREG;
}

arm_stack_walk()

static BOOL arm_stack_walk ( struct cpu_stack_walk *  csw, STACKFRAME64 *  frame, union ctx *  context  )

static

Definition at line 157 of file cpu_arm.c.

{
    return FALSE;
}

WINE_DEFAULT_DEBUG_CHANNEL()

WINE_DEFAULT_DEBUG_CHANNEL

(

dbghelp

)

Variable Documentation

cpu_arm

DECLSPEC_HIDDEN struct cpu cpu_arm

Initial value:

= {
    IMAGE_FILE_MACHINE_ARMNT,
    4,
    CV_ARM_R0 + 11,
    arm_get_addr,
    arm_stack_walk,
    NULL,
    arm_map_dwarf_register,
    arm_fetch_context_reg,
    arm_fetch_regname,
    arm_fetch_minidump_thread,
    arm_fetch_minidump_module,
}

Definition at line 258 of file cpu_arm.c.