ReactOS  0.4.15-dev-4921-g25fcdc5
cpu_arm.c
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1 /*
2  * File cpu_arm.c
3  *
4  * Copyright (C) 2009 Eric Pouech
5  * Copyright (C) 2010, 2011 AndrĂ© Hentschel
6  *
7  * This library is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * This library is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with this library; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
20  */
21 
22 #include <assert.h>
23 
24 #include "ntstatus.h"
25 #define WIN32_NO_STATUS
26 #include "dbghelp_private.h"
27 #include "winternl.h"
28 #include "wine/debug.h"
29 
31 
33  enum cpu_addr ca, ADDRESS64* addr)
34 {
35  addr->Mode = AddrModeFlat;
36  addr->Segment = 0; /* don't need segment */
37  switch (ca)
38  {
39 #ifdef __arm__
40  case cpu_addr_pc: addr->Offset = ctx->Pc; return TRUE;
41  case cpu_addr_stack: addr->Offset = ctx->Sp; return TRUE;
42 #ifdef __REACTOS__
43  case cpu_addr_frame: addr->Offset = ctx->R11; return TRUE;
44 #else
45  case cpu_addr_frame: addr->Offset = ctx->Fp; return TRUE;
46 #endif
47 #endif
48  default: addr->Mode = -1;
49  return FALSE;
50  }
51 }
52 
53 #ifdef __arm__
54 enum st_mode {stm_start, stm_arm, stm_done};
55 
56 /* indexes in Reserved array */
57 #define __CurrentModeCount 0
58 
59 #define curr_mode (frame->Reserved[__CurrentModeCount] & 0x0F)
60 #define curr_count (frame->Reserved[__CurrentModeCount] >> 4)
61 
62 #define set_curr_mode(m) {frame->Reserved[__CurrentModeCount] &= ~0x0F; frame->Reserved[__CurrentModeCount] |= (m & 0x0F);}
63 #define inc_curr_count() (frame->Reserved[__CurrentModeCount] += 0x10)
64 
65 /* fetch_next_frame()
66  *
67  * modify (at least) context.Pc using unwind information
68  * either out of debug info (dwarf), or simple Lr trace
69  */
70 static BOOL fetch_next_frame(struct cpu_stack_walk* csw, union ctx *pcontext,
71  DWORD_PTR curr_pc)
72 {
73  DWORD64 xframe;
74  CONTEXT *context = &pcontext->ctx;
75  DWORD oldReturn = context->Lr;
76 
77  if (dwarf2_virtual_unwind(csw, curr_pc, pcontext, &xframe))
78  {
79  context->Sp = xframe;
80  context->Pc = oldReturn;
81  return TRUE;
82  }
83 
84  if (context->Pc == context->Lr) return FALSE;
85  context->Pc = oldReturn;
86 
87  return TRUE;
88 }
89 
90 static BOOL arm_stack_walk(struct cpu_stack_walk *csw, STACKFRAME64 *frame,
91  union ctx *context)
92 {
93  unsigned deltapc = curr_count <= 1 ? 0 : 4;
94 
95  /* sanity check */
96  if (curr_mode >= stm_done) return FALSE;
97 
98  TRACE("Enter: PC=%s Frame=%s Return=%s Stack=%s Mode=%s Count=%s\n",
99  wine_dbgstr_addr(&frame->AddrPC),
100  wine_dbgstr_addr(&frame->AddrFrame),
101  wine_dbgstr_addr(&frame->AddrReturn),
102  wine_dbgstr_addr(&frame->AddrStack),
103  curr_mode == stm_start ? "start" : "ARM",
105 
106  if (curr_mode == stm_start)
107  {
108  /* Init done */
109  set_curr_mode(stm_arm);
110  frame->AddrReturn.Mode = frame->AddrStack.Mode = AddrModeFlat;
111  /* don't set up AddrStack on first call. Either the caller has set it up, or
112  * we will get it in the next frame
113  */
114  memset(&frame->AddrBStore, 0, sizeof(frame->AddrBStore));
115  }
116  else
117  {
118  if (context->ctx.Sp != frame->AddrStack.Offset) FIXME("inconsistent Stack Pointer\n");
119  if (context->ctx.Pc != frame->AddrPC.Offset) FIXME("inconsistent Program Counter\n");
120 
121  if (frame->AddrReturn.Offset == 0) goto done_err;
122  if (!fetch_next_frame(csw, context, frame->AddrPC.Offset - deltapc))
123  goto done_err;
124  }
125 
126  memset(&frame->Params, 0, sizeof(frame->Params));
127 
128  /* set frame information */
129  frame->AddrStack.Offset = context->ctx.Sp;
130  frame->AddrReturn.Offset = context->ctx.Lr;
131 #ifdef __REACTOS__
132  frame->AddrFrame.Offset = context->ctx.R11;
133 #else
134  frame->AddrFrame.Offset = context->ctx.Fp;
135 #endif
136  frame->AddrPC.Offset = context->ctx.Pc;
137 
138  frame->Far = TRUE;
139  frame->Virtual = TRUE;
140  inc_curr_count();
141 
142  TRACE("Leave: PC=%s Frame=%s Return=%s Stack=%s Mode=%s Count=%s FuncTable=%p\n",
143  wine_dbgstr_addr(&frame->AddrPC),
144  wine_dbgstr_addr(&frame->AddrFrame),
145  wine_dbgstr_addr(&frame->AddrReturn),
146  wine_dbgstr_addr(&frame->AddrStack),
147  curr_mode == stm_start ? "start" : "ARM",
149  frame->FuncTableEntry);
150 
151  return TRUE;
152 done_err:
154  return FALSE;
155 }
156 #else
157 static BOOL arm_stack_walk(struct cpu_stack_walk *csw, STACKFRAME64 *frame,
158  union ctx *context)
159 {
160  return FALSE;
161 }
162 #endif
163 
164 static unsigned arm_map_dwarf_register(unsigned regno, const struct module* module, BOOL eh_frame)
165 {
166  if (regno <= 15) return CV_ARM_R0 + regno;
167  if (regno == 128) return CV_ARM_CPSR;
168 
169  FIXME("Don't know how to map register %d\n", regno);
170  return CV_ARM_NOREG;
171 }
172 
173 static void *arm_fetch_context_reg(union ctx *pctx, unsigned regno, unsigned *size)
174 {
175 #ifdef __arm__
176  CONTEXT *ctx = &pctx->ctx;
177 
178  switch (regno)
179  {
180  case CV_ARM_R0 + 0: *size = sizeof(ctx->R0); return &ctx->R0;
181  case CV_ARM_R0 + 1: *size = sizeof(ctx->R1); return &ctx->R1;
182  case CV_ARM_R0 + 2: *size = sizeof(ctx->R2); return &ctx->R2;
183  case CV_ARM_R0 + 3: *size = sizeof(ctx->R3); return &ctx->R3;
184  case CV_ARM_R0 + 4: *size = sizeof(ctx->R4); return &ctx->R4;
185  case CV_ARM_R0 + 5: *size = sizeof(ctx->R5); return &ctx->R5;
186  case CV_ARM_R0 + 6: *size = sizeof(ctx->R6); return &ctx->R6;
187  case CV_ARM_R0 + 7: *size = sizeof(ctx->R7); return &ctx->R7;
188  case CV_ARM_R0 + 8: *size = sizeof(ctx->R8); return &ctx->R8;
189  case CV_ARM_R0 + 9: *size = sizeof(ctx->R9); return &ctx->R9;
190  case CV_ARM_R0 + 10: *size = sizeof(ctx->R10); return &ctx->R10;
191 #ifdef __REACTOS__
192  case CV_ARM_R0 + 11: *size = sizeof(ctx->R11); return &ctx->R11;
193  case CV_ARM_R0 + 12: *size = sizeof(ctx->R12); return &ctx->R12;
194 #else
195  case CV_ARM_R0 + 11: *size = sizeof(ctx->Fp); return &ctx->Fp;
196  case CV_ARM_R0 + 12: *size = sizeof(ctx->Ip); return &ctx->Ip;
197 #endif
198 
199  case CV_ARM_SP: *size = sizeof(ctx->Sp); return &ctx->Sp;
200  case CV_ARM_LR: *size = sizeof(ctx->Lr); return &ctx->Lr;
201  case CV_ARM_PC: *size = sizeof(ctx->Pc); return &ctx->Pc;
202  case CV_ARM_CPSR: *size = sizeof(ctx->Cpsr); return &ctx->Cpsr;
203  }
204 #endif
205  FIXME("Unknown register %x\n", regno);
206  return NULL;
207 }
208 
209 static const char* arm_fetch_regname(unsigned regno)
210 {
211  switch (regno)
212  {
213  case CV_ARM_R0 + 0: return "r0";
214  case CV_ARM_R0 + 1: return "r1";
215  case CV_ARM_R0 + 2: return "r2";
216  case CV_ARM_R0 + 3: return "r3";
217  case CV_ARM_R0 + 4: return "r4";
218  case CV_ARM_R0 + 5: return "r5";
219  case CV_ARM_R0 + 6: return "r6";
220  case CV_ARM_R0 + 7: return "r7";
221  case CV_ARM_R0 + 8: return "r8";
222  case CV_ARM_R0 + 9: return "r9";
223  case CV_ARM_R0 + 10: return "r10";
224  case CV_ARM_R0 + 11: return "r11";
225  case CV_ARM_R0 + 12: return "r12";
226 
227  case CV_ARM_SP: return "sp";
228  case CV_ARM_LR: return "lr";
229  case CV_ARM_PC: return "pc";
230  case CV_ARM_CPSR: return "cpsr";
231  }
232  FIXME("Unknown register %x\n", regno);
233  return NULL;
234 }
235 
236 static BOOL arm_fetch_minidump_thread(struct dump_context* dc, unsigned index, unsigned flags, const CONTEXT* ctx)
237 {
238  if (ctx->ContextFlags && (flags & ThreadWriteInstructionWindow))
239  {
240  /* FIXME: crop values across module boundaries, */
241 #ifdef __arm__
242  ULONG base = ctx->Pc <= 0x80 ? 0 : ctx->Pc - 0x80;
243  minidump_add_memory_block(dc, base, ctx->Pc + 0x80 - base, 0);
244 #endif
245  }
246 
247  return TRUE;
248 }
249 
250 static BOOL arm_fetch_minidump_module(struct dump_context* dc, unsigned index, unsigned flags)
251 {
252  /* FIXME: actually, we should probably take care of FPO data, unless it's stored in
253  * function table minidump stream
254  */
255  return FALSE;
256 }
257 
260  4,
261  CV_ARM_R0 + 11,
262  arm_get_addr,
264  NULL,
270 };
BOOL dwarf2_virtual_unwind(struct cpu_stack_walk *csw, DWORD_PTR ip, union ctx *ctx, DWORD64 *cfa) DECLSPEC_HIDDEN
Definition: dwarf.c:3258
#define set_curr_mode(m)
Definition: cpu_i386.c:151
DECLSPEC_HIDDEN struct cpu cpu_arm
Definition: cpu_arm.c:258
Definition: http.c:7251
#define TRUE
Definition: types.h:120
#define DECLSPEC_HIDDEN
Definition: precomp.h:8
DWORD64 Params[4]
Definition: compat.h:1266
ADDRESS64 AddrBStore
Definition: compat.h:1264
void minidump_add_memory_block(struct dump_context *dc, ULONG64 base, ULONG size, ULONG rva) DECLSPEC_HIDDEN
Definition: minidump.c:355
#define curr_mode
Definition: cpu_i386.c:146
#define FALSE
Definition: types.h:117
unsigned int BOOL
Definition: ntddk_ex.h:94
#define FIXME(fmt,...)
Definition: debug.h:111
cpu_addr
#define inc_curr_count()
Definition: cpu_i386.c:152
static unsigned arm_map_dwarf_register(unsigned regno, const struct module *module, BOOL eh_frame)
Definition: cpu_arm.c:164
static const char * arm_fetch_regname(unsigned regno)
Definition: cpu_arm.c:209
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Definition: dbghelp.c:142
static BOOL arm_fetch_minidump_module(struct dump_context *dc, unsigned index, unsigned flags)
Definition: cpu_arm.c:250
GLuint index
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static void * arm_fetch_context_reg(union ctx *pctx, unsigned regno, unsigned *size)
Definition: cpu_arm.c:173
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Definition: cpu_arm.c:32
ADDRESS64 AddrReturn
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unsigned long DWORD
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GLbitfield flags
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PVOID FuncTableEntry
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Definition: glext.h:9621
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Definition: cpu_arm.c:157
uint32_t DWORD_PTR
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st_mode
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uint64_t DWORD64
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CONTEXT ctx
WINE_DEFAULT_DEBUG_CHANNEL(dbghelp)
static BOOL arm_fetch_minidump_thread(struct dump_context *dc, unsigned index, unsigned flags, const CONTEXT *ctx)
Definition: cpu_arm.c:236
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Definition: cpu_i386.c:147
static const WCHAR ca[]
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