ReactOS 0.4.15-dev-5836-g942b022
apicsmp.c File Reference
#include <hal.h>
#include "apicp.h"
#include <debug.h>
Include dependency graph for apicsmp.c:

Go to the source code of this file.

Macros

#define NDEBUG
 

Functions

FORCEINLINE VOID ApicRequestGlobalInterrupt (_In_ UCHAR DestinationProcessor, _In_ UCHAR Vector, _In_ APIC_MT MessageType, _In_ APIC_TGM TriggerMode, _In_ APIC_DSH DestinationShortHand)
 
VOID NTAPI HalpRequestIpi (KAFFINITY TargetProcessors)
 

Macro Definition Documentation

◆ NDEBUG

#define NDEBUG

Definition at line 13 of file apicsmp.c.

Function Documentation

◆ ApicRequestGlobalInterrupt()

FORCEINLINE VOID ApicRequestGlobalInterrupt ( _In_ UCHAR  DestinationProcessor,
_In_ UCHAR  Vector,
_In_ APIC_MT  MessageType,
_In_ APIC_TGM  TriggerMode,
_In_ APIC_DSH  DestinationShortHand 
)
Parameters
Vector- Specifies the interrupt vector to be delivered.
MessageType- Specifies the message type sent to the CPU core interrupt handler. This can be one of the following values: APIC_MT_Fixed - Delivers an interrupt to the target local APIC specified in Destination field. APIC_MT_LowestPriority - Delivers an interrupt to the local APIC executing at the lowest priority of all local APICs. APIC_MT_SMI - Delivers an SMI interrupt to target local APIC(s). APIC_MT_RemoteRead - Delivers a read request to read an APIC register in the target local APIC specified in Destination field. APIC_MT_NMI - Delivers a non-maskable interrupt to the target local APIC specified in the Destination field. Vector is ignored. APIC_MT_INIT - Delivers an INIT request to the target local APIC(s) specified in the Destination field. TriggerMode must be APIC_TGM_Edge, Vector must be 0. APIC_MT_Startup - Delivers a start-up request (SIPI) to the target local APIC(s) specified in Destination field. Vector specifies the startup address. APIC_MT_ExtInt - Delivers an external interrupt to the target local APIC specified in Destination field.
TriggerMode- The trigger mode of the interrupt. Can be: APIC_TGM_Edge - The interrupt is edge triggered. APIC_TGM_Level - The interrupt is level triggered.
DestinationShortHand- Specifies where to send the interrupt. APIC_DSH_Destination APIC_DSH_Self APIC_DSH_AllIncludingSelf APIC_DSH_AllExclusingSelf
See also
"AMD64 Architecture Programmer's Manual Volume 2 System Programming" Chapter 16 "Advanced Programmable Interrupt Controller (APIC)" 16.5 "Interprocessor Interrupts (IPI)"

Definition at line 58 of file apicsmp.c.

64{
66
67 /* Setup the command register */
68 Icr.LongLong = 0;
69 Icr.Vector = Vector;
70 Icr.MessageType = MessageType;
72 Icr.DeliveryStatus = 0;
73 Icr.Level = 0;
74 Icr.TriggerMode = TriggerMode;
75 Icr.RemoteReadStatus = 0;
76 Icr.DestinationShortHand = DestinationShortHand;
77 Icr.Destination = DestinationProcessor;
78
79 /* Write the low dword last to send the interrupt */
82}
@ APIC_DM_Physical
Definition: apicp.h:144
FORCEINLINE VOID ApicWrite(APIC_REGISTER Register, ULONG Value)
Definition: apicp.h:322
@ APIC_ICR0
Definition: apicp.h:93
@ APIC_ICR1
Definition: apicp.h:94

◆ HalpRequestIpi()

VOID NTAPI HalpRequestIpi ( KAFFINITY  TargetProcessors)

Definition at line 90 of file apicsmp.c.

91{
94}
#define UNIMPLEMENTED
Definition: debug.h:115
void __cdecl __debugbreak(void)
Definition: intrin_ppc.h:698