ReactOS 0.4.15-dev-8138-g1e75ea8
interrupt.c
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1/*
2 * PROJECT: ReactOS DC21x4 Driver
3 * LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
4 * PURPOSE: Interrupt handling
5 * COPYRIGHT: Copyright 2023 Dmitry Borisov <di.sean@protonmail.com>
6 */
7
8/* INCLUDES *******************************************************************/
9
10#include "dc21x4.h"
11
12#include <debug.h>
13
14/* FUNCTIONS ******************************************************************/
15
16static
17VOID
19 _In_ PDC21X4_ADAPTER Adapter)
20{
21 ULONG OpMode;
22
23 TRACE("TX underrun\n");
24
25 /* Maximum threshold reached */
26 if ((Adapter->OpMode & DC_OPMODE_STORE_AND_FORWARD) ||
27 (++Adapter->TransmitUnderruns < DC_TX_UNDERRUN_LIMIT))
28 {
29 NdisDprAcquireSpinLock(&Adapter->SendLock);
30
31 /* Start the transmit process if it was suspended */
33
34 NdisDprReleaseSpinLock(&Adapter->SendLock);
35 return;
36 }
37 Adapter->TransmitUnderruns = 0;
38
39 NdisDprAcquireSpinLock(&Adapter->ModeLock);
40
41 OpMode = Adapter->OpMode;
42
43 /* Update the FIFO threshold level to minimize Tx FIFO underrun */
45 {
47
48 INFO("New OP Mode %08lx\n", OpMode);
49 }
50 else
51 {
53
54 INFO("Store & Forward\n");
55 }
56
57 DcStopTxRxProcess(Adapter);
58
59 Adapter->OpMode = OpMode;
60
61 /* Restart the transmit process */
62 DC_WRITE(Adapter, DcCsr6_OpMode, OpMode);
63
64 NdisDprReleaseSpinLock(&Adapter->ModeLock);
65}
66
67static
68VOID
70 _In_ PDC21X4_ADAPTER Adapter)
71{
72 WARN("Transmit jabber timer timed out\n");
73
74 NdisWriteErrorLogEntry(Adapter->AdapterHandle, NDIS_ERROR_CODE_HARDWARE_FAILURE, 1, __LINE__);
75
76 NdisDprAcquireSpinLock(&Adapter->ModeLock);
77
78 /* Start the transmit process if it was stopped */
79 DC_WRITE(Adapter, DcCsr6_OpMode, Adapter->OpMode);
80
81 NdisDprReleaseSpinLock(&Adapter->ModeLock);
82}
83
84static
85VOID
87 _In_ PDC21X4_ADAPTER Adapter,
88 _Inout_ PLIST_ENTRY SendReadyList,
89 _Out_ PULONG DpcEvents)
90{
91 PDC_TCB Tcb;
92 PDC_TBD Tbd;
93 ULONG TbdStatus, Collisions;
94
95 for (Tcb = Adapter->LastTcb;
96 Tcb != Adapter->CurrentTcb;
97 Tcb = DC_NEXT_TCB(Adapter, Tcb))
98 {
99 Tbd = Tcb->Tbd;
100 TbdStatus = Tbd->Status;
101
102 if (TbdStatus & DC_TBD_STATUS_OWNED)
103 break;
104
105 ++Adapter->TcbCompleted;
106
107 /* Complete the packet filter change request asynchronously */
109 {
110 Tbd->Control &= ~DC_TBD_CONTROL_SETUP_FRAME;
111
113 {
114 *DpcEvents |= DC_EVENT_SETUP_FRAME_COMPLETED;
115 }
116
117 continue;
118 }
119
120 /* This is our media test packet, so no need to update the TX statistics */
121 if (!Tcb->Packet)
122 {
123 _InterlockedExchange(&Adapter->MediaTestStatus,
124 !(TbdStatus & DC_TBD_STATUS_ERROR_SUMMARY));
125
126 ASSERT(Adapter->LoopbackFrameSlots < DC_LOOPBACK_FRAMES);
127
128 ++Adapter->LoopbackFrameSlots;
129
130 continue;
131 }
132
133 if (TbdStatus & DC_TBD_STATUS_ERROR_SUMMARY)
134 {
135 ++Adapter->Statistics.TransmitErrors;
136
137 if (TbdStatus & DC_TBD_STATUS_UNDERFLOW)
138 ++Adapter->Statistics.TransmitUnderrunErrors;
139 else if (TbdStatus & DC_TBD_STATUS_LATE_COLLISION)
140 ++Adapter->Statistics.TransmitLateCollisions;
141
142 if (TbdStatus & DC_TBD_STATUS_RETRY_ERROR)
143 ++Adapter->Statistics.TransmitExcessiveCollisions;
144 if (TbdStatus & DC_TBD_STATUS_CARRIER_LOST)
145 ++Adapter->Statistics.TransmitLostCarrierSense;
146 }
147 else
148 {
149 ++Adapter->Statistics.TransmitOk;
150
151 if (TbdStatus & DC_TBD_STATUS_DEFFERED)
152 ++Adapter->Statistics.TransmitDeferred;
153 if (TbdStatus & DC_TBD_STATUS_HEARTBEAT_FAIL)
154 ++Adapter->Statistics.TransmitHeartbeatErrors;
155
156 Collisions = (TbdStatus & DC_TBD_STATUS_COLLISIONS_MASK) >>
158 if (Collisions == 1)
159 ++Adapter->Statistics.TransmitOneRetry;
160 else if (Collisions > 1)
161 ++Adapter->Statistics.TransmitMoreCollisions;
162 }
163
164 InsertTailList(SendReadyList, DC_LIST_ENTRY_FROM_PACKET(Tcb->Packet));
165
166 DC_RELEASE_TCB(Adapter, Tcb);
167 }
168
169 Adapter->LastTcb = Tcb;
170}
171
172static
173VOID
175 _In_ PDC21X4_ADAPTER Adapter)
176{
177 LIST_ENTRY SendReadyList;
178 ULONG DpcEvents;
179
180 TRACE("Handle TX\n");
181
182 InitializeListHead(&SendReadyList);
183 DpcEvents = 0;
184
185 NdisDprAcquireSpinLock(&Adapter->SendLock);
186
187 DcHandleTxCompletedFrames(Adapter, &SendReadyList, &DpcEvents);
188
189 if (!IsListEmpty(&Adapter->SendQueueList))
190 {
192 }
193
194 NdisDprReleaseSpinLock(&Adapter->SendLock);
195
196 while (!IsListEmpty(&SendReadyList))
197 {
198 PLIST_ENTRY Entry = RemoveHeadList(&SendReadyList);
199
200 TRACE("Complete TX packet %p\n", DC_PACKET_FROM_LIST_ENTRY(Entry));
201
202 NdisMSendComplete(Adapter->AdapterHandle,
205 }
206
207 /* We have to complete the OID request outside of the spinlock */
208 if (DpcEvents & DC_EVENT_SETUP_FRAME_COMPLETED)
209 {
210 TRACE("SP completed\n");
211
212 Adapter->OidPending = FALSE;
213
214 NdisMSetInformationComplete(Adapter->AdapterHandle, NDIS_STATUS_SUCCESS);
215 }
216}
217
218static
219VOID
221 _In_ PDC21X4_ADAPTER Adapter)
222{
223 ULONG i, OpMode, Status;
224
225 OpMode = Adapter->OpMode;
226 OpMode &= ~DC_OPMODE_RX_ENABLE;
227 DC_WRITE(Adapter, DcCsr6_OpMode, OpMode);
228
229 for (i = 0; i < 5000; ++i)
230 {
231 Status = DC_READ(Adapter, DcCsr5_Status);
232
234 return;
235
237 }
238
239 WARN("Failed to stop the RX process 0x%08lx\n", Status);
240}
241
242VOID
243NTAPI
245 _In_ NDIS_HANDLE MiniportAdapterContext,
247{
248 PDC21X4_ADAPTER Adapter = (PDC21X4_ADAPTER)MiniportAdapterContext;
249 PDC_RCB Rcb;
250
252
254
255 PushEntryList(&Adapter->FreeRcbList, &Rcb->ListEntry);
256
257 ++Adapter->RcbFree;
258
260}
261
262static
263VOID
265 _In_ PDC21X4_ADAPTER Adapter,
266 _In_ PNDIS_PACKET* ReceiveArray,
267 _In_ ULONG PacketsToIndicate)
268{
270 PDC_RBD Rbd;
271 PDC_RCB Rcb;
272 ULONG i;
273
274 NdisDprReleaseSpinLock(&Adapter->ReceiveLock);
275
276 NdisMIndicateReceivePacket(Adapter->AdapterHandle,
277 ReceiveArray,
278 PacketsToIndicate);
279
280 NdisDprAcquireSpinLock(&Adapter->ReceiveLock);
281
282 for (i = 0; i < PacketsToIndicate; ++i)
283 {
284 Packet = ReceiveArray[i];
286
287 /* Reuse the RCB immediately */
288 if (Rcb->Flags & DC_RCB_FLAG_RECLAIM)
289 {
291
293 }
294 }
295}
296
297static
298VOID
300 _In_ PDC21X4_ADAPTER Adapter)
301{
302 PDC_RBD Rbd, StartRbd, LastRbd;
303 ULONG PacketsToIndicate;
305
306 Rbd = StartRbd = LastRbd = Adapter->CurrentRbd;
307 PacketsToIndicate = 0;
308
309 while (PacketsToIndicate < RTL_NUMBER_OF(ReceiveArray))
310 {
311 PDC_RCB Rcb;
312 PDC_RCB* RcbSlot;
314 ULONG RbdStatus, PacketLength, RxCounters;
315
316 if (Rbd->Status & DC_RBD_STATUS_OWNED)
317 break;
318
319 /* Work around the RX overflow bug */
320 if ((Adapter->Features & DC_NEED_RX_OVERFLOW_WORKAROUND) && (Rbd == LastRbd))
321 {
322 /* Find the last received packet, to correctly catch invalid packets */
323 do
324 {
325 LastRbd = DC_NEXT_RBD(Adapter, LastRbd);
326
327 if (LastRbd->Status & DC_RBD_STATUS_OWNED)
328 break;
329 }
330 while (LastRbd != Rbd);
331
332 RxCounters = DC_READ(Adapter, DcCsr8_RxCounters);
333
334 Adapter->Statistics.ReceiveNoBuffers += RxCounters & DC_COUNTER_RX_NO_BUFFER_MASK;
335
336 /* A receive overflow might indicate a data corruption */
337 if (RxCounters & DC_COUNTER_RX_OVERFLOW_MASK)
338 {
339 ERR("RX overflow, dropping the packets\n");
340
341 Adapter->Statistics.ReceiveOverrunErrors +=
343
344 NdisDprAcquireSpinLock(&Adapter->ModeLock);
345
346 /* Stop the receive process */
347 DcStopRxProcess(Adapter);
348
349 /* Drop all received packets regardless of what the status indicates */
350 while (TRUE)
351 {
352 if (Rbd->Status & DC_RBD_STATUS_OWNED)
353 break;
354
355 ++Adapter->Statistics.ReceiveOverrunErrors;
356
358
359 Rbd = DC_NEXT_RBD(Adapter, Rbd);
360 }
361 LastRbd = Rbd;
362
363 /* Restart the receive process */
364 DC_WRITE(Adapter, DcCsr6_OpMode, Adapter->OpMode);
365
366 NdisDprReleaseSpinLock(&Adapter->ModeLock);
367
368 continue;
369 }
370 }
371
372 RbdStatus = Rbd->Status;
373
374 /* Ignore oversized packets */
375 if (!(RbdStatus & DC_RBD_STATUS_LAST_DESCRIPTOR))
376 {
378 goto NextRbd;
379 }
380
381 /* Check for an invalid packet */
382 if (RbdStatus & DC_RBD_STATUS_INVALID)
383 {
384 ++Adapter->Statistics.ReceiveErrors;
385
386 if (RbdStatus & DC_RBD_STATUS_OVERRUN)
387 ++Adapter->Statistics.ReceiveOverrunErrors;
388
389 if (RbdStatus & DC_RBD_STATUS_CRC_ERROR)
390 {
391 if (RbdStatus & DC_RBD_STATUS_DRIBBLE)
392 ++Adapter->Statistics.ReceiveAlignmentErrors;
393 else
394 ++Adapter->Statistics.ReceiveCrcErrors;
395 }
396
398 goto NextRbd;
399 }
400
401 ++Adapter->Statistics.ReceiveOk;
402
403 PacketLength = (RbdStatus & DC_RBD_STATUS_FRAME_LENGTH_MASK) >>
405
406 /* Omit the CRC */
407 PacketLength -= 4;
408
409 RcbSlot = DC_GET_RCB_SLOT(Adapter, Rbd);
410 Rcb = *RcbSlot;
411
412 TRACE("RX packet (len %u), RCB %p\n", PacketLength, Rcb);
413
414 NdisAdjustBufferLength(Rcb->NdisBuffer, PacketLength);
415
416 /* Receive buffers are in cached memory */
418
419 if (RbdStatus & DC_RBD_STATUS_MULTICAST)
420 {
422 ++Adapter->Statistics.ReceiveBroadcast;
423 else
424 ++Adapter->Statistics.ReceiveMulticast;
425 }
426 else
427 {
428 ++Adapter->Statistics.ReceiveUnicast;
429 }
430
431 Packet = Rcb->Packet;
432
433 ReceiveArray[PacketsToIndicate++] = Packet;
434
435 if (Adapter->FreeRcbList.Next)
436 {
437 Rcb->Flags = 0;
439
440 Rcb = (PDC_RCB)DcPopEntryList(&Adapter->FreeRcbList);
441 *RcbSlot = Rcb;
442
443 ASSERT(Adapter->RcbFree > 0);
444 --Adapter->RcbFree;
445
446 Rbd->Address1 = Rcb->PhysicalAddress;
449 }
450 else
451 {
454
456 }
457
458NextRbd:
459 Rbd = DC_NEXT_RBD(Adapter, Rbd);
460
461 /*
462 * Check the next descriptor to prevent wrap-around.
463 * Since we don't use a fixed-sized ring,
464 * the receive ring may be smaller in length than the ReceiveArray[].
465 */
466 if (Rbd == StartRbd)
467 break;
468 }
469
470 Adapter->CurrentRbd = Rbd;
471
472 /* Pass the packets up */
473 if (PacketsToIndicate)
474 {
475 DcIndicateReceivePackets(Adapter, ReceiveArray, PacketsToIndicate);
476 }
477}
478
479static
480VOID
482 _In_ PDC21X4_ADAPTER Adapter)
483{
484 NdisDprAcquireSpinLock(&Adapter->ReceiveLock);
485
486 do
487 {
489 }
490 while (!(Adapter->CurrentRbd->Status & DC_RBD_STATUS_OWNED));
491
492 NdisDprReleaseSpinLock(&Adapter->ReceiveLock);
493}
494
495static
496VOID
498 _In_ PDC21X4_ADAPTER Adapter,
499 _In_ ULONG InterruptStatus)
500{
501 ERR("%s error occured, CSR5 %08lx\n", DcDbgBusError(InterruptStatus), InterruptStatus);
502
503 NdisWriteErrorLogEntry(Adapter->AdapterHandle, NDIS_ERROR_CODE_HARDWARE_FAILURE, 1, __LINE__);
504
505 /* Issue a software reset, which also enables the interrupts */
506 if (_InterlockedCompareExchange(&Adapter->ResetLock, 2, 0) == 0)
507 {
508 NdisScheduleWorkItem(&Adapter->ResetWorkItem);
509 }
510}
511
512VOID
513NTAPI
515 _In_ NDIS_HANDLE MiniportAdapterContext)
516{
517 ULONG InterruptStatus, IoLimit;
518 PDC21X4_ADAPTER Adapter = (PDC21X4_ADAPTER)MiniportAdapterContext;
519
520 TRACE("Events %08lx\n", Adapter->InterruptStatus);
521
522 if (!(Adapter->Flags & DC_ACTIVE))
523 return;
524
526 InterruptStatus = Adapter->InterruptStatus;
527
528 /* Loop until the condition to stop is encountered */
529 while (TRUE)
530 {
531 /* Uncommon interrupts */
532 if (InterruptStatus & DC_IRQ_ABNORMAL_SUMMARY)
533 {
534 /* PCI bus error detected */
535 if (InterruptStatus & DC_IRQ_SYSTEM_ERROR)
536 {
537 DcHandleSystemError(Adapter, InterruptStatus);
538 return;
539 }
540
541 /* Transmit jabber timeout */
542 if (InterruptStatus & DC_IRQ_TX_JABBER_TIMEOUT)
543 {
545 }
546
547 /* Link state changed */
548 if (InterruptStatus & Adapter->LinkStateChangeMask)
549 {
550 Adapter->HandleLinkStateChange(Adapter, InterruptStatus);
551 }
552 }
553
554 /* Handling receive interrupts */
555 if (InterruptStatus & (DC_IRQ_RX_OK | DC_IRQ_RX_STOPPED))
556 {
557 DcHandleRx(Adapter);
558 }
559
560 /* Handling transmit interrupts */
561 if (InterruptStatus & (DC_IRQ_TX_OK | DC_IRQ_TX_STOPPED))
562 {
563 DcHandleTx(Adapter);
564 }
565
566 /* Transmit underflow error detected */
567 if (InterruptStatus & DC_IRQ_TX_UNDERFLOW)
568 {
570 }
571
572 /* Limit in order to avoid doing too much work at DPC level */
573 if (!--IoLimit)
574 break;
575
576 /* Check if new events have occurred */
577 InterruptStatus = DC_READ(Adapter, DcCsr5_Status);
578 if (InterruptStatus == 0xFFFFFFFF || !(InterruptStatus & Adapter->InterruptMask))
579 break;
580
581 /* Acknowledge the events */
582 DC_WRITE(Adapter, DcCsr5_Status, InterruptStatus);
583 }
584
585 /* TODO: Add interrupt mitigation (CSR11) */
586
587 /* Reenable interrupts */
589 DC_WRITE(Adapter, DcCsr7_IrqMask, Adapter->InterruptMask);
590}
591
592VOID
593NTAPI
595 _Out_ PBOOLEAN InterruptRecognized,
596 _Out_ PBOOLEAN QueueMiniportHandleInterrupt,
597 _In_ NDIS_HANDLE MiniportAdapterContext)
598{
599 PDC21X4_ADAPTER Adapter = (PDC21X4_ADAPTER)MiniportAdapterContext;
600 ULONG InterruptStatus;
601
602 if (Adapter->CurrentInterruptMask == 0)
603 goto NotOurs;
604
605 InterruptStatus = DC_READ(Adapter, DcCsr5_Status);
606 if (InterruptStatus == 0xFFFFFFFF || !(InterruptStatus & Adapter->CurrentInterruptMask))
607 goto NotOurs;
608
609 /* Disable further interrupts */
610 DC_WRITE(Adapter, DcCsr7_IrqMask, 0);
611
612 /* Clear all pending events */
613 DC_WRITE(Adapter, DcCsr5_Status, InterruptStatus);
614
615 Adapter->InterruptStatus = InterruptStatus;
616 Adapter->CurrentInterruptMask = 0;
617
618 *InterruptRecognized = TRUE;
619 *QueueMiniportHandleInterrupt = TRUE;
620 return;
621
622NotOurs:
623 *InterruptRecognized = FALSE;
624 *QueueMiniportHandleInterrupt = FALSE;
625}
#define RTL_NUMBER_OF(x)
Definition: RtlRegistry.c:12
#define WARN(fmt,...)
Definition: debug.h:115
#define ERR(fmt,...)
Definition: debug.h:113
struct _DC_RCB * PDC_RCB
Definition: dc21x4.h:63
#define DC_INTERRUPT_PROCESSING_LIMIT
Definition: dc21x4.h:42
#define DC_EVENT_SETUP_FRAME_COMPLETED
Definition: dc21x4.h:59
#define DC_NEED_RX_OVERFLOW_WORKAROUND
Definition: dc21x4.h:108
#define DC_RECEIVE_ARRAY_SIZE
Definition: dc21x4.h:32
#define DC_LOOPBACK_FRAMES
Definition: dc21x4.h:26
struct _DC21X4_ADAPTER * PDC21X4_ADAPTER
Definition: dc21x4.h:61
#define DC_ACTIVE
Definition: dc21x4.h:120
FORCEINLINE ULONG DC_READ(_In_ PDC21X4_ADAPTER Adapter, _In_ DC_CSR Register)
Definition: dc21x4.h:262
VOID DcStopTxRxProcess(_In_ PDC21X4_ADAPTER Adapter)
Definition: hardware.c:38
VOID DcProcessPendingPackets(_In_ PDC21X4_ADAPTER Adapter)
Definition: send.c:201
#define DC_TX_UNDERRUN_LIMIT
Definition: dc21x4.h:41
#define DC_WRITE(Adapter, Register, Value)
Definition: dc21x4.h:272
#define DC_RBD_STATUS_INVALID
Definition: dc21x4hw.h:499
#define DC_RBD_STATUS_FRAME_LENGTH_SHIFT
Definition: dc21x4hw.h:126
#define DC_OPMODE_TX_THRESHOLD_LEVEL
Definition: dc21x4hw.h:349
#define DC_TBD_STATUS_UNDERFLOW
Definition: dc21x4hw.h:61
#define DC_TBD_STATUS_COLLISIONS_MASK
Definition: dc21x4hw.h:63
#define DC_IRQ_RX_OK
Definition: dc21x4hw.h:273
#define DC_STATUS_RX_STATE_MASK
Definition: dc21x4hw.h:286
@ DcCsr6_OpMode
Definition: dc21x4hw.h:180
@ DcCsr5_Status
Definition: dc21x4hw.h:179
@ DcCsr1_TxPoll
Definition: dc21x4hw.h:173
@ DcCsr8_RxCounters
Definition: dc21x4hw.h:182
@ DcCsr7_IrqMask
Definition: dc21x4hw.h:181
#define DC_TBD_STATUS_RETRY_ERROR
Definition: dc21x4hw.h:65
#define DC_TBD_STATUS_OWNED
Definition: dc21x4hw.h:71
#define DC_RBD_STATUS_LAST_DESCRIPTOR
Definition: dc21x4hw.h:115
#define DC_TBD_CONTROL_REQUEST_INTERRUPT
Definition: dc21x4hw.h:87
#define DC_IRQ_TX_OK
Definition: dc21x4hw.h:267
#define DC_IRQ_ABNORMAL_SUMMARY
Definition: dc21x4hw.h:284
#define DC_COUNTER_RX_OVERFLOW_SHIFT
Definition: dc21x4hw.h:368
#define DC_IRQ_TX_STOPPED
Definition: dc21x4hw.h:268
#define DC_TBD_CONTROL_SETUP_FRAME
Definition: dc21x4hw.h:84
#define DC_TX_POLL_DOORBELL
Definition: dc21x4hw.h:244
#define DC_RBD_STATUS_DRIBBLE
Definition: dc21x4hw.h:109
#define DC_TBD_STATUS_COLLISIONS_SHIFT
Definition: dc21x4hw.h:75
#define DC_COUNTER_RX_OVERFLOW_MASK
Definition: dc21x4hw.h:366
#define DC_TBD_STATUS_CARRIER_LOST
Definition: dc21x4hw.h:68
#define DC_IRQ_RX_STOPPED
Definition: dc21x4hw.h:275
#define DC_IRQ_TX_JABBER_TIMEOUT
Definition: dc21x4hw.h:270
#define DC_STATUS_RX_STATE_STOPPED
Definition: dc21x4hw.h:302
#define DC_OPMODE_TX_THRESHOLD_MAX
Definition: dc21x4hw.h:350
#define DC_OPMODE_TX_THRESHOLD_CTRL_MASK
Definition: dc21x4hw.h:331
#define DC_RBD_STATUS_FRAME_LENGTH_MASK
Definition: dc21x4hw.h:122
#define DC_OPMODE_STORE_AND_FORWARD
Definition: dc21x4hw.h:336
#define DC_RBD_STATUS_MULTICAST
Definition: dc21x4hw.h:117
#define DC_RBD_STATUS_OVERRUN
Definition: dc21x4hw.h:107
#define DC_IRQ_TX_UNDERFLOW
Definition: dc21x4hw.h:272
#define DC_TBD_STATUS_DEFFERED
Definition: dc21x4hw.h:60
#define DC_IRQ_SYSTEM_ERROR
Definition: dc21x4hw.h:282
#define DC_TBD_STATUS_HEARTBEAT_FAIL
Definition: dc21x4hw.h:64
#define DC_TBD_STATUS_LATE_COLLISION
Definition: dc21x4hw.h:66
#define DC_COUNTER_RX_NO_BUFFER_MASK
Definition: dc21x4hw.h:365
#define DC_RBD_STATUS_CRC_ERROR
Definition: dc21x4hw.h:108
#define DC_TBD_STATUS_ERROR_SUMMARY
Definition: dc21x4hw.h:70
#define DC_RBD_STATUS_OWNED
Definition: dc21x4hw.h:124
#define TRUE
Definition: types.h:120
#define FALSE
Definition: types.h:117
#define DcDbgBusError
Definition: debug.h:94
#define INFO
Definition: debug.h:89
VOID NTAPI DcReturnPacket(_In_ NDIS_HANDLE MiniportAdapterContext, _In_ PNDIS_PACKET Packet)
Definition: interrupt.c:244
static VOID DcHandleRx(_In_ PDC21X4_ADAPTER Adapter)
Definition: interrupt.c:481
static VOID DcHandleTxJabberTimeout(_In_ PDC21X4_ADAPTER Adapter)
Definition: interrupt.c:69
VOID NTAPI DcIsr(_Out_ PBOOLEAN InterruptRecognized, _Out_ PBOOLEAN QueueMiniportHandleInterrupt, _In_ NDIS_HANDLE MiniportAdapterContext)
Definition: interrupt.c:594
static VOID DcHandleTxCompletedFrames(_In_ PDC21X4_ADAPTER Adapter, _Inout_ PLIST_ENTRY SendReadyList, _Out_ PULONG DpcEvents)
Definition: interrupt.c:86
static VOID DcHandleRxReceivedFrames(_In_ PDC21X4_ADAPTER Adapter)
Definition: interrupt.c:299
VOID NTAPI DcHandleInterrupt(_In_ NDIS_HANDLE MiniportAdapterContext)
Definition: interrupt.c:514
static VOID DcHandleSystemError(_In_ PDC21X4_ADAPTER Adapter, _In_ ULONG InterruptStatus)
Definition: interrupt.c:497
static VOID DcStopRxProcess(_In_ PDC21X4_ADAPTER Adapter)
Definition: interrupt.c:220
static VOID DcIndicateReceivePackets(_In_ PDC21X4_ADAPTER Adapter, _In_ PNDIS_PACKET *ReceiveArray, _In_ ULONG PacketsToIndicate)
Definition: interrupt.c:264
static VOID DcAdjustTxFifoThreshold(_In_ PDC21X4_ADAPTER Adapter)
Definition: interrupt.c:18
static VOID DcHandleTx(_In_ PDC21X4_ADAPTER Adapter)
Definition: interrupt.c:174
FORCEINLINE PSINGLE_LIST_ENTRY DcPopEntryList(_Inout_ PSINGLE_LIST_ENTRY ListHead)
Definition: util.h:71
#define DC_WRITE_BARRIER()
Definition: util.h:30
VOID _cdecl NdisWriteErrorLogEntry(IN NDIS_HANDLE NdisAdapterHandle, IN NDIS_ERROR_CODE ErrorCode, IN ULONG NumberOfErrorValues,...)
Definition: main.c:76
NDIS_STATUS EXPORT NdisScheduleWorkItem(IN PNDIS_WORK_ITEM pWorkItem)
Definition: misc.c:467
#define InsertTailList(ListHead, Entry)
#define IsListEmpty(ListHead)
Definition: env_spec_w32.h:954
#define RemoveHeadList(ListHead)
Definition: env_spec_w32.h:964
#define InitializeListHead(ListHead)
Definition: env_spec_w32.h:944
Status
Definition: gdiplustypes.h:25
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
long __cdecl _InterlockedExchange(_Interlocked_operand_ long volatile *_Target, long _Value)
long __cdecl _InterlockedCompareExchange(_Interlocked_operand_ long volatile *_Destination, long _Exchange, long _Comparand)
#define ASSERT(a)
Definition: mode.c:44
#define _Inout_
Definition: ms_sal.h:378
#define _Out_
Definition: ms_sal.h:345
#define _In_
Definition: ms_sal.h:308
#define NdisMIndicateReceivePacket(MiniportAdapterHandle, ReceivePackets, NumberOfPackets)
Definition: ndis.h:5556
#define NdisMSetInformationComplete(MiniportAdapterHandle, Status)
Definition: ndis.h:5762
#define NdisReleaseSpinLock(_SpinLock)
Definition: ndis.h:4115
_In_ NDIS_HANDLE _In_ PNDIS_PACKET Packet
Definition: ndis.h:1549
#define NdisFlushBuffer(Buffer, WriteToDevice)
Definition: ndis.h:3261
#define NdisDprReleaseSpinLock(_SpinLock)
Definition: ndis.h:4133
#define NDIS_ERROR_CODE_HARDWARE_FAILURE
Definition: ndis.h:564
#define NdisAdjustBufferLength(Buffer, Length)
Definition: ndis.h:3314
#define NdisStallExecution
Definition: ndis.h:4453
#define NDIS_STATUS_SUCCESS
Definition: ndis.h:346
#define NdisDprAcquireSpinLock(_SpinLock)
Definition: ndis.h:4124
#define NDIS_SET_PACKET_STATUS(_Packet, _Status)
Definition: ndis.h:3509
#define NdisMSendComplete(MiniportAdapterHandle, Packet, Status)
Definition: ndis.h:5689
#define NdisAcquireSpinLock(_SpinLock)
Definition: ndis.h:4106
#define NDIS_STATUS_RESOURCES
Definition: ndis.h:466
#define DC_PACKET_FROM_LIST_ENTRY(ListEntry)
Definition: sendrcv.h:13
#define DC_RBD_FROM_PACKET(Packet)
Definition: sendrcv.h:19
#define DC_RCB_FROM_PACKET(Packet)
Definition: sendrcv.h:16
FORCEINLINE PDC_TCB DC_NEXT_TCB(_In_ PDC21X4_ADAPTER Adapter, _In_ PDC_TCB Tcb)
Definition: sendrcv.h:74
FORCEINLINE PDC_RBD DC_NEXT_RBD(_In_ PDC21X4_ADAPTER Adapter, _In_ PDC_RBD Rbd)
Definition: sendrcv.h:98
FORCEINLINE PDC_RCB * DC_GET_RCB_SLOT(_In_ PDC21X4_ADAPTER Adapter, _In_ PDC_RBD Rbd)
Definition: sendrcv.h:110
#define DC_RCB_FLAG_RECLAIM
Definition: sendrcv.h:46
FORCEINLINE VOID DC_RELEASE_TCB(_In_ PDC21X4_ADAPTER Adapter, _In_ PDC_TCB Tcb)
Definition: sendrcv.h:58
#define DC_LIST_ENTRY_FROM_PACKET(Packet)
Definition: sendrcv.h:10
#define TRACE(s)
Definition: solgame.cpp:4
base of all file and directory entries
Definition: entries.h:83
ULONG InterruptStatus
Definition: dc21x4.h:126
ULONG RcbFree
Definition: dc21x4.h:151
ULONG CurrentInterruptMask
Definition: dc21x4.h:105
PMEDIA_HANDLE_LINK_STATE_CHANGE HandleLinkStateChange
Definition: dc21x4.h:127
ULONG InterruptMask
Definition: dc21x4.h:104
ULONG LinkStateChangeMask
Definition: dc21x4.h:190
DECLSPEC_CACHEALIGN NDIS_SPIN_LOCK ReceiveLock
Definition: dc21x4.h:145
SINGLE_LIST_ENTRY FreeRcbList
Definition: dc21x4.h:150
ULONG Flags
Definition: dc21x4.h:119
ULONG Address1
Definition: dc21x4hw.h:134
ULONG Status
Definition: dc21x4hw.h:106
PNDIS_BUFFER NdisBuffer
Definition: sendrcv.h:49
SINGLE_LIST_ENTRY ListEntry
Definition: sendrcv.h:42
PNDIS_PACKET Packet
Definition: sendrcv.h:48
PVOID VirtualAddress
Definition: sendrcv.h:50
ULONG PhysicalAddress
Definition: sendrcv.h:44
ULONG Flags
Definition: sendrcv.h:45
ULONG Status
Definition: dc21x4hw.h:59
ULONG Control
Definition: dc21x4hw.h:77
PDC_TBD Tbd
Definition: sendrcv.h:33
PNDIS_PACKET Packet
Definition: sendrcv.h:34
Definition: typedefs.h:120
uint32_t * PULONG
Definition: typedefs.h:59
unsigned char * PBOOLEAN
Definition: typedefs.h:53
#define NTAPI
Definition: typedefs.h:36
int32_t * PLONG
Definition: typedefs.h:58
uint32_t ULONG
Definition: typedefs.h:59
FORCEINLINE VOID PushEntryList(_Inout_ PSINGLE_LIST_ENTRY ListHead, _Inout_ __drv_aliasesMem PSINGLE_LIST_ENTRY Entry)
Definition: rtlfuncs.h:253
#define ETH_IS_BROADCAST(Address)
Definition: xfilter.h:32