ReactOS 0.4.15-dev-8393-g61b7fb9
wavepcistream.cpp
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1/********************************************************************************
2** Copyright (c) 1998-2000 Microsoft Corporation. All Rights Reserved.
3**
4** Portions Copyright (c) 1998-1999 Intel Corporation
5**
6********************************************************************************/
7
8/* The file wavepcistream.cpp was reviewed by LCA in June 2011 and is acceptable for use by Microsoft. */
9
10// Every debug output has "Modulname text"
11#define STR_MODULENAME "AC97 Stream: "
12
13#include "wavepciminiport.h"
14#include "wavepcistream.h"
15
18
19/*****************************************************************************
20 * General Info
21 *****************************************************************************
22 * To protect the stBDList structure that is used to store mappings, we use a
23 * spin lock called MapLock. This spin lock is also acquired when we change
24 * the DMA registers. Normally, changes in stBDList and the DMA registers go
25 * hand in hand. In case we only want to change the DMA registers, we need
26 * to acquire the spin lock!
27 */
28
29#ifdef _MSC_VER
30#pragma code_seg("PAGE")
31#endif
32/*****************************************************************************
33 * CreateMiniportWaveICHStream
34 *****************************************************************************
35 * Creates a wave miniport stream object for the AC97 audio adapter. This is
36 * (nearly) like the macro STD_CREATE_BODY_ from STDUNK.H.
37 */
39(
40 OUT CMiniportWaveICHStream **MiniportPCIStream,
41 IN PUNKNOWN pUnknownOuter,
43 __drv_reportError("Must succeed pool allocations are forbidden. "
44 "Allocation failures cause a system crash"))
46)
47{
48 PAGED_CODE ();
49
50 DOUT (DBG_PRINT, ("[CreateMiniportWaveICHStream]"));
51
52 //
53 // This is basically like the macro at stdunk with the change that we
54 // don't cast to interface unknown but to interface MiniportIchStream.
55 //
56 *MiniportPCIStream = new (PoolType, PoolTag)
57 CMiniportWaveICHStream (pUnknownOuter);
58 if (*MiniportPCIStream)
59 {
60 (*MiniportPCIStream)->AddRef ();
61 return STATUS_SUCCESS;
62 }
63
65}
66
67
68/*****************************************************************************
69 * CMiniportWaveICHStream::~CMiniportWaveICHStream
70 *****************************************************************************
71 * Destructor
72 */
74{
75 PAGED_CODE ();
76
77
78 DOUT (DBG_PRINT, ("[CMiniportWaveICHStream::~CMiniportWaveICHStream]"));
79
80 //
81 // Print information about the scatter gather list.
82 //
83 DOUT (DBG_DMA, ("Head %d, Tail %d, Entries %d.",
86
87 // Release the scatter/gather table.
89}
90
91
92/*****************************************************************************
93 * CMiniportWaveICHStream::Init
94 *****************************************************************************
95 * This routine initializes the stream object, sets up the BDL, and programs
96 * the buffer descriptor list base address register for the pin being
97 * initialized.
98 */
100{
101 PAGED_CODE ();
102
103 DOUT (DBG_PRINT, ("[CMiniportWaveICHStream::Init]"));
104
105 //
106 // The rule here is that we return when we fail without a cleanup.
107 // The destructor will relase the allocated memory.
108 //
109
110 //
111 // Initialize the BDL spinlock.
112 //
114
115 //
116 // Setup the Buffer Descriptor List (BDL)
117 // Allocate 32 entries of 8 bytes (one BDL entry).
118 // The pointer is aligned on a 8 byte boundary (that's what we need).
119 //
120
121 if (!BDList_Alloc())
122 {
123 DOUT (DBG_ERROR, ("Failed AllocateCommonBuffer!"));
125 }
126
127 PPREFETCHOFFSET PreFetchOffset;
128 //
129 // Query for the new interface "PreFetchOffset" and use
130 // function offered there in case the interface is offered.
131 //
132 if (NT_SUCCESS(PortStream->QueryInterface(IID_IPreFetchOffset, (PVOID *)&PreFetchOffset)))
133 {
134 // why don't we pad by 32 sample frames
135 PreFetchOffset->SetPreFetchOffset(32 * (DataFormat->WaveFormatEx.nChannels * 2));
136 PreFetchOffset->Release();
137 }
138
139 return STATUS_SUCCESS;
140}
141
142/*****************************************************************************
143 * CMiniportWaveICHStream::GetAllocatorFraming
144 *****************************************************************************
145 * Returns the framing requirements for this device.
146 * That is sample size (for one sample) and preferred frame (buffer) size.
147 */
148STDMETHODIMP_(NTSTATUS) CMiniportWaveICHStream::GetAllocatorFraming
149(
151)
152{
153 PAGED_CODE ();
154
155 ULONG SampleSize;
156
157 DOUT (DBG_PRINT, ("[CMiniportWaveICHStream::GetAllocatorFraming]"));
158
159 //
160 // Determine sample size in bytes. Always number of
161 // channels * 2 (because 16-bit).
162 //
163 SampleSize = DataFormat->WaveFormatEx.nChannels * 2;
164
165 //
166 // Report the suggested requirements.
167 //
172
173 //
174 // Currently, arbitrarily selecting 10ms as the frame target size.
175 //
176 // This value needs to be sample block aligned for AC97 to work correctly.
177 // Assumes 100Hz minimum sample rate (otherwise FrameSize is 0 bytes)
178 //
179 AllocatorFraming->FrameSize = SampleSize * (DataFormat->WaveFormatEx.nSamplesPerSec / 100);
182
183 return STATUS_SUCCESS;
184}
185
186
187
188
189/*****************************************************************************
190 * Non paged code begins here
191 *****************************************************************************
192 */
193
194#ifdef _MSC_VER
195#pragma code_seg()
196#endif
197/*****************************************************************************
198 * CMiniportWaveICHStream::PowerChangeNotify_
199 *****************************************************************************
200 * This functions saves and maintains the stream state through power changes.
201 */
203(
204 IN POWER_STATE NewState
205)
206{
208
210
211 if(NewState.DeviceState == PowerDeviceD0)
212 {
213 ResetDMA ();
214
215 // Restore the remaining DMA registers, that is last valid index
216 // only if the index is not pointing to 0. Note that the index is
217 // equal to head + entries.
218 if (stBDList.nTail)
219 {
221 }
222 }
223 else
224 {
225
226 // Disable interrupts and stop DMA just in case.
227 WriteReg8 (X_CR, (UCHAR)0);
228
229 // Get current index
230 // int nCurrentIndex = (int)ReadReg8 (X_CIV);
231 }
232
234}
235
236/*****************************************************************************
237 * CMiniportWaveICHStream::SetState
238 *****************************************************************************
239 * This routine sets/changes the DMA engine state to play, stop, or pause
240 */
242(
244)
245{
247
248 DOUT (DBG_PRINT, ("[CMiniportWaveICHStream::SetState]"));
249 DOUT (DBG_STREAM, ("SetState to %d", State));
250
251
252 //
253 // Start or stop the DMA engine dependent of the state.
254 //
255 switch (State)
256 {
257 case KSSTATE_STOP:
258 // acquire the mapping spin lock
260
261 // Just pause DMA. If we have mappings left in our queue,
262 // portcls will call RevokeMappings to destroy them.
263 PauseDMA ();
264
265 // release the mapping spin lock
267
268 // Release processed mappings
270
271 // Reset the position counters.
273 break;
274
275 case KSSTATE_ACQUIRE:
276 case KSSTATE_PAUSE:
277 // acquire the mapping spin lock
279
280 // pause now.
281 PauseDMA ();
282
283 // release the mapping spin lock
285
286 // Release processed mappings
288
289 break;
290
291 case KSSTATE_RUN:
292 //
293 // Let's rock.
294 //
295
296
297 // Make sure we are not running already.
299 {
300 return STATUS_SUCCESS;
301 }
302
303 // Release processed mappings.
305
306 // Get new mappings.
308
309 // acquire the mapping spin lock
311
312 // Kick DMA again just in case.
314
315 // release the mapping spin lock
317 break;
318 }
319
320 return STATUS_SUCCESS;
321}
322
323/*****************************************************************************
324 * CMiniportWaveICHStream::Service
325 *****************************************************************************
326 * This routine is called by the port driver in response to the interrupt
327 * service routine requesting service on the stream's service group.
328 * Requesting service on the service group results in a DPC being scheduled
329 * that calls this routine when it runs.
330 */
331STDMETHODIMP_(void) CMiniportWaveICHStream::Service (void)
332{
333
334 DOUT (DBG_PRINT, ("Service"));
335
336 // release all mappings
338
339 // get new mappings
341}
342
343
344/*****************************************************************************
345 * CMiniportWaveICHStream::NormalizePhysicalPosition
346 *****************************************************************************
347 * Given a physical position based on the actual number of bytes transferred,
348 * this function converts the position to a time-based value of 100ns units.
349 */
351(
352 _Inout_ PLONGLONG PhysicalPosition
353)
354{
355 ULONG SampleSize;
356
357 DOUT (DBG_PRINT, ("NormalizePhysicalPosition"));
358
359 //
360 // Determine the sample size in bytes
361 //
362 SampleSize = DataFormat->WaveFormatEx.nChannels * 2;
363
364 //
365 // Calculate the time in 100ns steps.
366 //
367 *PhysicalPosition = (_100NS_UNITS_PER_SECOND / SampleSize *
368 *PhysicalPosition) / CurrentRate;
369
370 return STATUS_SUCCESS;
371}
372
373
374/*****************************************************************************
375 * CMiniportWaveICHStream::GetPosition
376 *****************************************************************************
377 * Gets the stream position. This is a byte count of the current position of
378 * a stream running on a particular DMA engine. We must return a sample
379 * accurate count or the MiniportDrv32 wave drift tests (35.2 & 36.2) will fail.
380 *
381 * The position is the sum of three parts:
382 * 1) The total number of bytes in released buffers
383 * 2) The position in the current buffer.
384 * 3) The total number of bytes in played but not yet released buffers
385 */
386STDMETHODIMP_(NTSTATUS) CMiniportWaveICHStream::GetPosition
387(
389)
390{
392 UCHAR nCurrentIndex = 0;
393 DWORD buffPos;
394
396
397 //
398 // Acquire the mapping spin lock.
399 //
401
402 //
403 // Start with TotalBytesReleased (mappings released).
404 //
406
407 //
408 // If we have entries in the list, we may have buffers that have not been
409 // released but have been at least partially played.
410 //
412 {
413 nCurrentIndex = GetBuffPos(&buffPos);
414
415 //
416 // Add in our position in the current buffer
417 //
418 *Position += buffPos;
419
420 //
421 // Total any buffers that have been played and not released.
422 //
423 if (nCurrentIndex != ((stBDList.nHead -1) & BDL_MASK))
424 {
425 int i = stBDList.nHead;
426 while (i != nCurrentIndex)
427 {
429 i = (i + 1) & BDL_MASK;
430 }
431 }
432 }
433
434 DOUT (DBG_POSITION, ("[GetPosition] POS: %08x'%08x\n", (DWORD)(*Position >> 32), (DWORD)*Position));
435
436 //
437 // Release the mapping spin lock.
438 //
440
441
442 return STATUS_SUCCESS;
443}
444
445
446/*****************************************************************************
447 * CMiniportWaveICHStream::RevokeMappings
448 *****************************************************************************
449 * This routine is used by the port to revoke mappings previously delivered
450 * to the miniport stream that have not yet been unmapped. This would
451 * typically be called in response to an I/O cancellation request.
452 */
453STDMETHODIMP_(NTSTATUS) CMiniportWaveICHStream::RevokeMappings
454(
455 _In_ PVOID FirstTag,
456 _In_ PVOID LastTag,
457 _Out_ PULONG MappingsRevoked
458)
459{
460 ASSERT (MappingsRevoked);
461
463 ULONG ulOldDMAEngineState;
464
465 DOUT (DBG_PRINT, ("[CMiniportWaveICHStream::RevokeMappings]"));
466
467 //
468 // print information about the scatter gather list.
469 //
470 DOUT (DBG_DMA, ("Head %d, Tail %d, Entries %d.",
473
474 //
475 // Start accessing the mappings.
476 //
478
479 //
480 // Save old DMA engine state.
481 //
482 ulOldDMAEngineState = DMAEngineState;
483
484 //
485 // First stop the DMA engine so it won't process the next buffer in the
486 // scatter gather list which might be one of the revoked buffers.
487 //
488 PauseDMA ();
489
490 //
491 // Mark items as revoked
492 //
493
494 for (intptr_t i = (intptr_t)FirstTag; i != (intptr_t)LastTag; i = (i + 1) & BDL_MASK)
495 {
496 if (stBDList.pMapData[i].ulState == 1)
497 {
499 BDList[i].wLength = 0;
500 BDList[i].wPolicyBits = 0;
501 *MappingsRevoked += 1;
502 }
503 }
504
505 //
506 // Just un-pause the DMA engine if it was running before
507 //
508 ResumeDMA(ulOldDMAEngineState);
509
510 //
511 // Release the mapping spin lock
512 //
514
515
516 return STATUS_SUCCESS;
517}
518
519
520/*****************************************************************************
521 * CMiniportWaveICHStream::MappingAvailable
522 *****************************************************************************
523 * This routine is called by the port driver to notify the stream that there
524 * are new mappings available. Note that this is ONLY called after the stream
525 * has previously had a GetMapping() call fail due to lack of available
526 * mappings.
527 */
528STDMETHODIMP_(void) CMiniportWaveICHStream::MappingAvailable (void)
529{
530 DOUT (DBG_PRINT, ("MappingAvailable"));
531
532 //
533 // Release processed mappings.
534 //
536
537 //
538 // Process the new mappings.
539 //
541}
542
543
544/*****************************************************************************
545 * CMiniportWaveICHStream::GetNewMappings
546 *****************************************************************************
547 * This routine is called when new mappings are available from the port driver.
548 * The routine places mappings into the input mapping queue. AC97 can handle up
549 * to 32 entries (descriptors). We program the DMA registers if we have at least
550 * one mapping in the queue. The mapping spin lock must be held when calling
551 * this routine.
552 */
554{
556
557 NTSTATUS ntStatus = STATUS_SUCCESS;
558 ULONG ulBytesMapped = 0;
559 int nInsertMappings = 0;
560 int nTail; // aut. variable
561
562 DOUT (DBG_PRINT, ("[CMiniportWaveICHStream::GetNewMappings]"));
563
564 // acquire the mapping spin lock
566
567 // detect reentrance
568 if(m_inGetMapping) {
569 m_inGetMapping = 2;
571 return STATUS_SUCCESS;
572 }
573
574#if (DBG)
575 if (ReadReg16 (X_SR) & SR_CELV)
576 {
577 //
578 // We starve. :-(
579 //
580 DOUT (DBG_DMA, ("[GetNewMappings] We starved ... Head %d, Tail %d, Entries %d.",
582 }
583#endif
584
585 //
586 // Get available mappings up to the max of 31 that we can hold in the BDL.
587 //
588 while (stBDList.nBDEntries < (MAX_BDL_ENTRIES - 1))
589 {
590 //
591 // Get the information from the list.
592 //
593 ULONG Flags;
595 ULONG ulBufferLength;
596 PHYSICAL_ADDRESS PhysAddr;
597 PVOID VirtAddr;
598
599
600 // Release the mapping spin lock
601NEW_MAPPINGS_AVAILBLE_MAYBE:
604
605 //
606 // Try to get the mapping from the port.
607 // Here comes the problem: When calling GetMapping or ReleaseMapping we
608 // cannot hold our spin lock. So we need to buffer the return values and
609 // stick the information into the structure later when we have the spin
610 // lock acquired.
611 //
612 ntStatus = PortStream->GetMapping ((PVOID)ULongToPtr(ulTag),
613 (PPHYSICAL_ADDRESS)&PhysAddr,
614 &VirtAddr,
615 &ulBufferLength,
616 &Flags);
617
618 // Acquire the mapping spin lock
620
621 //
622 // Quit this loop when we run out of mappings.
623 //
624 if (!NT_SUCCESS (ntStatus))
625 {
626 if(m_inGetMapping == 2)
627 goto NEW_MAPPINGS_AVAILBLE_MAYBE;
628 break;
629 }
630
631 // Sanity check: The audio stack will not give you data
632 // that you cannot handle, but an application could use
633 // DirectKS and send bad buffer down.
634
635 // One mapping needs to be <0x1FFFF bytes for mono
636 // streams on the AC97.
637 if (ulBufferLength > 0x1FFFE)
638 {
639 // That is a little too long. That should never happen.
640 DOUT (DBG_ERROR, ("[GetNewMappings] Buffer length too long!"));
641 ulBufferLength = 0x1FFFE;
642 }
643
644 // The AC97 can only handle WORD aligned buffers.
645 if (PhysAddr.LowPart & 0x01)
646 {
647 // we cannot play that! Set the buffer length to 0 so
648 // that the HW will skip the buffer.
649 DOUT (DBG_WARNING, ("[GetNewMappings] Buffer address unaligned!"));
650 ulBufferLength = 0;
651 }
652
653 // The AC97 cannot handle unaligned mappings with respect
654 // to the frame size (eg. 42 bytes on 4ch playback).
655 if (ulBufferLength % NumberOfChannels)
656 {
657 // modify the length (don't play the rest of the bytes)
658 DOUT (DBG_WARNING, ("[GetNewMappings] Buffer length unaligned!"));
659 ulBufferLength -= ulBufferLength % NumberOfChannels;
660 }
661
662 //
663 // Save the mapping.
664 //
665 nTail = stBDList.nTail;
666 stBDList.pMapData[nTail].ulBufferLength = ulBufferLength;
667 stBDList.pMapData[nTail].ulState = 1;
668 ulBytesMapped += ulBufferLength;
669
670 //
671 // Fill in the BDL entry with pointer to physical address and length.
672 //
673 BDList[nTail].dwPtrToPhyAddress = PhysAddr.LowPart;
674 BDList[nTail].wLength = (WORD)(ulBufferLength >> 1);
675 BDList[nTail].wPolicyBits = BUP_SET;
676
677 //
678 // Generate an interrupt when portcls tells us to or roughly every 10ms.
679 //
680 if (Flags || (ulBytesMapped > (CurrentRate * NumberOfChannels * 2) / 100))
681 {
682 BDList[nTail].wPolicyBits |= IOC_ENABLE;
683 ulBytesMapped = 0;
684 }
685
686 //
687 // Take the new mapping into account.
688 //
691 TotalBytesMapped += (ULONGLONG)ulBufferLength;
692 nInsertMappings++;
693
694 //
695 // Set last valid index (LVI) register! We need to do this here to avoid inconsistency
696 // of the BDList with the HW. Note that we need to release spin locks every time
697 // we call into portcls, that means we can be interrupted by ReleaseUsedMappings.
698 //
699 WriteReg8 (X_LVI, (UCHAR)nTail);
700 }
701
702 //
703 // If there were processed mappings, print out some debug messages and eventually try to
704 // restart DMA engine.
705 //
706 if (nInsertMappings)
707 {
708 //
709 // Print debug information ...
710 //
711 DOUT (DBG_DMA, ("[GetNewMappings] Got %d mappings.", nInsertMappings));
712 DOUT (DBG_DMA, ("[GetNewMappings] Head %d, Tail %d, Entries %d.",
714
715 if(stBDList.nBDEntries >= 2)
717 }
718
719 // Release the mapping spin lock
722
723 return ntStatus;
724}
725
726
727/*****************************************************************************
728 * CMiniportWaveICHStream::ReleaseUsedMappings
729 *****************************************************************************
730 * This routine unmaps previously mapped memory that the hardware has
731 * completed processing on. This routine is typically called at DPC level
732 * from the stream deferred procedure call that results from a stream
733 * interrupt. The mapping spin lock must be held when calling this routine.
734 */
736{
738 int nMappingsReleased = 0;
739
740 DOUT (DBG_PRINT, ("[CMiniportWaveICHStream::ReleaseUsedMappings]"));
741
742 // acquire the mapping spin lock
744
745 //
746 // Clean up everything to that index.
747 //
748 while (stBDList.nBDEntries)
749 {
750 //
751 // Get current index
752 //
753 int nCurrentIndex = (int)ReadReg8 (X_CIV);
754
755 //
756 // When CIV is == Head -1 we released all mappings.
757 //
758 if (nCurrentIndex == ((stBDList.nHead - 1) & BDL_MASK))
759 {
760 break;
761 }
762
763 //
764 // Check if CIV is between head and tail.
765 //
766 if (nCurrentIndex < stBDList.nHead)
767 {
768 //
769 // Check for CIV being outside range.
770 //
771 if ((nCurrentIndex + MAX_BDL_ENTRIES) >=
773 {
774 DOUT (DBG_ERROR, ("[ReleaseUsedMappings] CIV out of range!"));
775 break;
776 }
777 }
778 else
779 {
780 //
781 // Check for CIV being outside range.
782 //
783 if (nCurrentIndex >= (stBDList.nHead + stBDList.nBDEntries))
784 {
785 DOUT (DBG_ERROR, ("[ReleaseUsedMappings] CIV out of range!"));
786 break;
787 }
788 }
789
790 //
791 // Check to see if we've released all the buffers.
792 //
793 if (stBDList.nHead == nCurrentIndex)
794 {
795 if (nCurrentIndex == ((stBDList.nTail - 1) & BDL_MASK))
796 {
797 //
798 // A special case is starvation or stop of stream, when the
799 // DMA engine finished playing the buffers, CVI is equal LVI
800 // and SR_CELV is set.
801 //
802 if (!(ReadReg16 (X_SR) & SR_CELV))
803 {
804 // It is still playing the last buffer.
805 break;
806 }
807
808 //
809 // In case the CVI=LVI bit is set, nBDEntries should be 1
810 //
811 if (stBDList.nBDEntries != 1)
812 {
813 DOUT (DBG_ERROR, ("[ReleaseUsedMappings] Inconsitency: Tail reached and Entries != 1."));
814 }
815 }
816 else
817 {
818 //
819 // Bail out. Current Index did not move.
820 //
821 break;
822 }
823 }
824
825 //
826 // Save the tag and remove the entry from the list.
827 //
831 nMappingsReleased++;
832
833 // if entry has not been revoked
835 {
837
838 // Release the mapping spin lock
840
841 //
842 // Release this entry.
843 //
844 PortStream->ReleaseMapping ((PVOID)ULongToPtr(ulTag));
845
846 // acquire the mapping spin lock
848 }
849
851 }
852
853
854 // Print some debug information in case we released mappings.
855 if (nMappingsReleased)
856 {
857 //
858 // Print release information and return.
859 //
860 DOUT (DBG_DMA, ("[ReleaseUsedMappings] Head %d, Tail %d, Entries %d.",
862 }
863
864 // Release the mapping spin lock
866
867 return STATUS_SUCCESS;
868}
869
870/*****************************************************************************
871 * Non paged code begins here
872 *****************************************************************************
873 */
874
875#ifdef _MSC_VER
876#pragma code_seg()
877#endif
878
880{
881 //
882 // Request DPC service for PCM out.
883 //
884 Miniport->Port->Notify (ServiceGroup);
885}
#define PAGED_CODE()
LONG NTSTATUS
Definition: precomp.h:26
#define ULongToPtr(ul)
Definition: basetsd.h:92
tBDEntry * BDList
Definition: stream.h:61
PVOID BDList_Alloc()
Definition: stream2.cpp:11
WORD NumberOfChannels
Definition: stream.h:45
void ResumeDMA(ULONG state=DMA_ENGINE_ON)
Definition: stream.cpp:599
UCHAR ReadReg8(ULONG addr)
Definition: stream.cpp:629
ULONG CurrentRate
Definition: stream.h:56
void BDList_Free()
Definition: stream2.cpp:25
CMiniport * Miniport
Definition: stream.h:42
void ResetDMA(void)
Definition: stream.cpp:544
NTSTATUS NormalizePhysicalPosition(_Inout_ PLONGLONG PhysicalPosition)
Definition: stream2.cpp:139
int GetBuffPos(DWORD *buffPos)
Definition: stream.cpp:509
USHORT ReadReg16(ULONG addr)
Definition: stream.cpp:631
void PauseDMA(void)
Definition: stream.cpp:614
PPORTSTREAM_ PortStream
Definition: stream.h:48
PSERVICEGROUP ServiceGroup
Definition: stream.h:55
void WriteReg8(ULONG addr, UCHAR data)
Definition: stream.cpp:623
NTSTATUS SetState(_In_ KSSTATE State)
Definition: stream2.cpp:78
ULONG DMAEngineState
Definition: stream.h:57
void PowerChangeNotify_(IN POWER_STATE NewState)
void InterruptServiceRoutine()
Definition: rtstream.cpp:417
NTSTATUS GetNewMappings(void)
ULONGLONG TotalBytesReleased
Definition: wavepcistream.h:67
NTSTATUS ReleaseUsedMappings(void)
PPORT_ Port
Definition: miniport.h:30
int intptr_t
Definition: crtdefs.h:304
#define TRUE
Definition: types.h:120
#define FALSE
Definition: types.h:117
#define NT_SUCCESS(StatCode)
Definition: apphelp.c:33
unsigned int(__cdecl typeof(jpeg_read_scanlines))(struct jpeg_decompress_struct *
Definition: typeof.h:31
const int DBG_STREAM
Definition: debug.h:22
#define DOUT(lvl, strings)
Definition: debug.h:82
const int DBG_POSITION
Definition: debug.h:30
const int DBG_WARNING
Definition: debug.h:18
const int DBG_DMA
Definition: debug.h:24
const int DMA_ENGINE_PAUSE
Definition: stream.h:5
const int DMA_ENGINE_OFF
Definition: stream.h:4
const int DMA_ENGINE_ON
Definition: stream.h:7
#define IMP_CMiniportStream_QueryInterface(cType, sType)
Definition: stream.h:185
#define IMP_CMiniportStream_SetFormat(cType)
Definition: stream.h:181
const int DMA_ENGINE_PEND
Definition: stream.h:6
#define __drv_reportError(why)
Definition: driverspecs.h:320
UCHAR KIRQL
Definition: env_spec_w32.h:591
#define KeReleaseSpinLock(sl, irql)
Definition: env_spec_w32.h:627
#define KeAcquireSpinLock(sl, irql)
Definition: env_spec_w32.h:609
#define NonPagedPool
Definition: env_spec_w32.h:307
#define KeInitializeSpinLock(sl)
Definition: env_spec_w32.h:604
unsigned long DWORD
Definition: ntddk_ex.h:95
unsigned short WORD
Definition: ntddk_ex.h:93
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
const ULONG X_CR
Definition: ichreg.h:56
const USHORT IOC_ENABLE
Definition: ichreg.h:103
const ULONG X_LVI
Definition: ichreg.h:52
const ULONG X_SR
Definition: ichreg.h:53
const ULONG X_CIV
Definition: ichreg.h:51
const USHORT BUP_SET
Definition: ichreg.h:104
const USHORT SR_CELV
Definition: ichreg.h:62
_In_ PKSALLOCATOR_FRAMING AllocatorFraming
Definition: ks.h:4518
#define KSALLOCATOR_REQUIREMENTF_SYSTEM_MEMORY
Definition: ks.h:1685
KSSTATE
Definition: ks.h:1214
@ KSSTATE_ACQUIRE
Definition: ks.h:1216
@ KSSTATE_PAUSE
Definition: ks.h:1217
@ KSSTATE_RUN
Definition: ks.h:1218
@ KSSTATE_STOP
Definition: ks.h:1215
#define KSALLOCATOR_REQUIREMENTF_PREFERENCES_ONLY
Definition: ks.h:1688
#define ASSERT(a)
Definition: mode.c:44
#define _Inout_
Definition: ms_sal.h:378
#define _Out_
Definition: ms_sal.h:345
#define _When_(expr, annos)
Definition: ms_sal.h:254
#define _In_
Definition: ms_sal.h:308
#define DBG_ERROR
Definition: nfs41_debug.h:78
#define FILE_LONG_ALIGNMENT
Definition: nt_native.h:788
__GNU_EXTENSION typedef unsigned __int64 * PULONGLONG
Definition: ntbasedef.h:383
__GNU_EXTENSION typedef __int64 * PLONGLONG
Definition: ntbasedef.h:382
@ PowerDeviceD0
Definition: ntpoapi.h:49
#define _100NS_UNITS_PER_SECOND
Definition: portcls.h:159
IPreFetchOffset * PPREFETCHOFFSET
Definition: portcls.h:2297
const int MAX_BDL_ENTRIES
Definition: rtstream.h:24
const int BDL_MASK
Definition: rtstream.h:29
#define STATUS_SUCCESS
Definition: shellext.h:65
ULONG PoolType
Definition: ks.h:1668
ULONG RequirementsFlags
Definition: ks.h:1663
ULONG Frames
Definition: ks.h:1670
ULONG FileAlignment
Definition: ks.h:1672
ULONG FrameSize
Definition: ks.h:1671
WORD wPolicyBits
Definition: stream.h:33
WORD wLength
Definition: stream.h:32
DWORD dwPtrToPhyAddress
Definition: stream.h:31
tMapData * pMapData
ULONG ulState
Definition: wavepcistream.h:30
ULONG ulBufferLength
static COORD Position
Definition: mouse.c:34
uint32_t * PULONG
Definition: typedefs.h:59
INT POOL_TYPE
Definition: typedefs.h:78
#define IN
Definition: typedefs.h:39
uint32_t ULONG
Definition: typedefs.h:59
uint64_t ULONGLONG
Definition: typedefs.h:67
#define OUT
Definition: typedefs.h:40
#define STATUS_INSUFFICIENT_RESOURCES
Definition: udferr_usr.h:158
ULONG LowPart
Definition: typedefs.h:106
STDMETHODIMP_(void) CMiniportWaveICHStream
NTSTATUS CreateMiniportWaveICHStream(OUT CMiniportWaveICHStream **MiniportPCIStream, IN PUNKNOWN pUnknownOuter, _When_((PoolType &NonPagedPoolMustSucceed) !=0, __drv_reportError("Must succeed pool allocations are forbidden. " "Allocation failures cause a system crash")) IN POOL_TYPE PoolType)
_Must_inspect_result_ _In_ WDFDEVICE _In_ DEVICE_REGISTRY_PROPERTY _In_ _Strict_type_match_ POOL_TYPE PoolType
Definition: wdfdevice.h:3815
_Must_inspect_result_ _In_opt_ PWDF_OBJECT_ATTRIBUTES _In_ _Strict_type_match_ POOL_TYPE _In_opt_ ULONG PoolTag
Definition: wdfmemory.h:164
#define DBG_PRINT(ppi, ch, level)
Definition: win32kdebug.h:169
_In_ ULONG _In_ ULONG ulTag
Definition: winddi.h:3942
_Must_inspect_result_ _In_ ULONG Flags
Definition: wsk.h:170
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:778
@ NonPagedPoolMustSucceed
Definition: ketypes.h:880
unsigned char UCHAR
Definition: xmlstorage.h:181