ReactOS  0.4.15-dev-1397-g19779b3
cport_pc98.c
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1 /*
2  * PROJECT: ReactOS ComPort Library for NEC PC-98 series
3  * LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
4  * PURPOSE: Provides a serial port library for KDCOM, INIT, and FREELDR
5  * COPYRIGHT: Copyright 2020 Dmitry Borisov (di.sean@protonmail.com)
6  */
7 
8 /* Note: ns16550 code from cportlib.c */
9 
10 /* INCLUDES *******************************************************************/
11 
12 #include <intrin.h>
13 #include <ioaccess.h>
14 #include <ntstatus.h>
15 #include <ntstatus.h>
16 #include <cportlib/cportlib.h>
17 #include <drivers/pc98/serial.h>
18 #include <drivers/pc98/sysport.h>
19 #include <drivers/pc98/pit.h>
20 #include <drivers/pc98/cpu.h>
21 
22 #define NDEBUG
23 #include <debug.h>
24 
25 /* GLOBALS ********************************************************************/
26 
27 #define TIMEOUT_COUNT 1024 * 200
28 
29 static struct
30 {
35 } Rs232ComPort[] =
36 {
37  { (PUCHAR)0x030, FALSE, FALSE, 0 },
38  { (PUCHAR)0x238, FALSE, FALSE, 0 }
39 };
40 
42 
43 /* FUNCTIONS ******************************************************************/
44 
45 static BOOLEAN
47 {
48  UCHAR Input[4] = "NP2";
49  UCHAR Output[4] = {0};
50  UCHAR i;
51 
52  for (i = 0; i < 3; i++)
53  WRITE_PORT_UCHAR((PUCHAR)0x7EF, Input[i]);
54 
55  for (i = 0; i < 3; i++)
56  Output[i] = READ_PORT_UCHAR((PUCHAR)0x7EF);
57 
58  return (*(PULONG)Input == *(PULONG)Output);
59 }
60 
61 static VOID
63 {
64  UCHAR i;
65 
66  for (i = 0; i < 6; i++)
68 }
69 
70 VOID
71 NTAPI
75 {
76  /* Set FIFO and clear the receive/transmit buffers */
78  {
79  if (Enable)
82  else
84  Rs232ComPort[0].FifoEnabled = Enable;
85  }
86  else if (Address == Rs232ComPort[1].Address && Rs232ComPort[1].HasFifo)
87  {
88  if (Enable)
91  else
93  Rs232ComPort[1].FifoEnabled = Enable;
94  }
95  CpWait();
96 }
97 
98 VOID
99 NTAPI
101  IN PCPPORT Port,
102  IN ULONG BaudRate)
103 {
104  UCHAR Lcr;
105  USHORT Count;
106  TIMER_CONTROL_PORT_REGISTER TimerControl;
107 
108  if (Port->Address == Rs232ComPort[0].Address)
109  {
110  if (Rs232ComPort[0].HasFifo)
112 
113  TimerControl.BcdMode = FALSE;
114  TimerControl.OperatingMode = PitOperatingMode3;
115  TimerControl.AccessMode = PitAccessModeLowHigh;
116  TimerControl.Channel = PitChannel2;
117  if (IsNekoProject)
118  {
119  /* The horrible text input lag happens by about 6 seconds on my PC */
120  Count = 3;
121  }
122  else
123  {
124  Count = (READ_PORT_UCHAR((PUCHAR)0x42) & 0x20) ?
125  (TIMER_FREQUENCY_1 / (BaudRate * 16)) : (TIMER_FREQUENCY_2 / (BaudRate * 16));
126  }
127  Write8253Timer(TimerControl, Count);
128 
129  /* Save baud rate in port */
130  Port->BaudRate = BaudRate;
131  }
132  else if (Port->Address == Rs232ComPort[1].Address)
133  {
134  /* Set the DLAB on */
137 
138  /* Set the baud rate */
139  Count = SER2_CLOCK_RATE / BaudRate;
142 
143  /* Reset DLAB */
145 
146  /* Save baud rate in port */
147  Port->BaudRate = BaudRate;
148  }
149 }
150 
151 NTSTATUS
152 NTAPI
154  IN PCPPORT Port,
155  IN PUCHAR Address,
156  IN ULONG BaudRate)
157 {
158  SYSTEM_CONTROL_PORT_C_REGISTER SystemControl;
159  UCHAR FifoStatus;
160 
161  if (Port == NULL || Address == NULL || BaudRate == 0)
163 
164  if (!CpDoesPortExist(Address))
165  return STATUS_NOT_FOUND;
166 
167  /* Initialize port data */
168  Port->Address = Address;
169  Port->BaudRate = 0;
170  Port->Flags = 0;
171 
173 
174  if (Port->Address == Rs232ComPort[0].Address)
175  {
176  /* FIFO test */
178  CpWait();
180 
181  /* Disable the interrupts */
182  SystemControl.Bits = READ_PORT_UCHAR((PUCHAR)PPI_IO_i_PORT_C);
183  SystemControl.InterruptEnableRxReady = FALSE;
184  SystemControl.InterruptEnableTxEmpty = FALSE;
185  SystemControl.InterruptEnableTxReady = FALSE;
186  WRITE_PORT_UCHAR((PUCHAR)PPI_IO_o_PORT_C, SystemControl.Bits);
187 
188  /* Turn off FIFO */
189  if (Rs232ComPort[0].HasFifo)
191 
192  /* Set the baud rate */
193  CpSetBaud(Port, BaudRate);
194 
195  /* Software reset */
197  CpWait();
199  CpWait();
201  CpWait();
203  CpWait();
204 
205  /* Mode instruction - asynchronous mode, 8 data bits, 1 stop bit, no parity, 16x clock divisor */
208  CpWait();
209 
210  /* Command instruction - transmit enable, turn on DTR and RTS, receive enable, clear error flag */
214  CpWait();
215 
216  /* Disable the interrupts again */
217  WRITE_PORT_UCHAR((PUCHAR)PPI_IO_o_PORT_C, SystemControl.Bits);
218 
219  /* Turn on FIFO */
220  if (Rs232ComPort[0].HasFifo)
222 
223  /* Read junk out of the data register */
224  if (Rs232ComPort[0].HasFifo)
226  else
228 
229  return STATUS_SUCCESS;
230  }
231  else if (Port->Address == Rs232ComPort[1].Address)
232  {
233  /* Disable the interrupts */
236 
237  /* Turn on DTR, RTS and OUT2 */
240 
241  /* Set the baud rate */
242  CpSetBaud(Port, BaudRate);
243 
244  /* Set 8 data bits, 1 stop bit, no parity, no break */
247 
248  /* FIFO test */
250 
251  /* Turn on FIFO */
252  if (Rs232ComPort[1].HasFifo)
254 
255  /* Read junk out of the RBR */
257 
258  return STATUS_SUCCESS;
259  }
260 
261  return STATUS_NOT_FOUND;
262 }
263 
264 static BOOLEAN
266 {
267  /*
268  * See "Building Hardware and Firmware to Complement Microsoft Windows Headless Operation"
269  * Out-of-Band Management Port Device Requirements:
270  * The device must act as a 16550 or 16450 UART.
271  * Windows Server 2003 will test this device using the following process:
272  * 1. Save off the current modem status register.
273  * 2. Place the UART into diagnostic mode (The UART is placed into loopback mode
274  * by writing SERIAL_MCR_LOOP to the modem control register).
275  * 3. The modem status register is read and the high bits are checked. This means
276  * SERIAL_MSR_CTS, SERIAL_MSR_DSR, SERIAL_MSR_RI and SERIAL_MSR_DCD should
277  * all be clear.
278  * 4. Place the UART in diagnostic mode and turn on OUTPUT (Loopback Mode and
279  * OUTPUT are both turned on by writing (SERIAL_MCR_LOOP | SERIAL_MCR_OUT1)
280  * to the modem control register).
281  * 5. The modem status register is read and the ring indicator is checked.
282  * This means SERIAL_MSR_RI should be set.
283  * 6. Restore original modem status register.
284  *
285  * REMARK: Strangely enough, the Virtual PC 2007 virtual machine
286  * doesn't pass this test.
287  */
288 
289  BOOLEAN RetVal = FALSE;
290  UCHAR Mcr, Msr;
291 
292  /* Save the Modem Control Register */
294 
295  /* Enable loop (diagnostic) mode (set Bit 4 of the MCR) */
297 
298  /* Clear all modem output bits */
300 
301  /* Read the Modem Status Register */
303 
304  /*
305  * The upper nibble of the MSR (modem output bits) must be
306  * equal to the lower nibble of the MCR (modem input bits).
307  */
308  if ((Msr & (SER_MSR_CTS | SER_MSR_DSR | SER_MSR_RI | SER_MSR_DCD)) == 0x00)
309  {
310  /* Set all modem output bits */
312  SER2_MCR_OUT_1 | SER2_MCR_LOOPBACK); // Windows
313 /* ReactOS
314  WRITE_PORT_UCHAR((PUCHAR)SER2_IO_o_MODEM_CONTROL,
315  SER2_MCR_DTR_STATE | SER2_MCR_RTS_STATE |
316  SER2_MCR_OUT_1 | SER2_MCR_OUT_2 | SER2_MCR_LOOPBACK);
317 */
318 
319  /* Read the Modem Status Register */
321 
322  /*
323  * The upper nibble of the MSR (modem output bits) must be
324  * equal to the lower nibble of the MCR (modem input bits).
325  */
326  if (Msr & SER_MSR_RI) // Windows
327  // if (Msr & (SER_MSR_CTS | SER_MSR_DSR | SER_MSR_RI | SER_MSR_DCD) == 0xF0) // ReactOS
328  {
329  RetVal = TRUE;
330  }
331  }
332 
333  /* Restore the MCR */
335 
336  return RetVal;
337 }
338 
339 static BOOLEAN
341 {
342  /*
343  * This test checks whether the 16450/16550 scratch register is available.
344  * If not, the serial port is considered as unexisting.
345  */
346 
347  UCHAR Byte = 0;
348 
349  do
350  {
352 
354  return FALSE;
355 
356  }
357  while (++Byte != 0);
358 
359  return TRUE;
360 }
361 
362 BOOLEAN
363 NTAPI
365 {
366  UCHAR Data, Status;
367 
368  if (Address == Rs232ComPort[0].Address || Address == (PUCHAR)0x41)
369  {
372  if ((Data & Status) == 0xFF || (Data | Status) == 0x00)
373  return FALSE;
374  else
375  return TRUE;
376  }
377  else if (Address == Rs232ComPort[1].Address)
378  {
380  }
381 
382  return FALSE;
383 }
384 
385 UCHAR
386 NTAPI
388  IN PCPPORT Port,
389  IN UCHAR ExpectedValue)
390 {
391  UCHAR Lsr, Msr;
392  SYSTEM_CONTROL_PORT_B_REGISTER SystemControl;
393 
394  if (Port->Address == Rs232ComPort[0].Address)
395  {
396  /* Read the LSR and check if the expected value is present */
397  if (Rs232ComPort[0].HasFifo)
398  {
400  if (!(Lsr & ExpectedValue))
401  {
403 
404  /* If the ring indicator reaches 3, we've seen this on/off twice */
405  Rs232ComPort[0].RingIndicator |= (Msr & SER_MSR_RI) ? 1 : 2;
406  if (Rs232ComPort[0].RingIndicator == 3)
408  }
409  }
410  else
411  {
413  if (!(Lsr & ExpectedValue))
414  {
415  SystemControl.Bits = READ_PORT_UCHAR((PUCHAR)PPI_IO_i_PORT_B);
416 
417  /* If the ring indicator reaches 3, we've seen this on/off twice */
418  Rs232ComPort[0].RingIndicator |= SystemControl.RingIndicator ? 1 : 2;
419  if (Rs232ComPort[0].RingIndicator == 3)
421  }
422  }
423 
424  return Lsr;
425  }
426  else if (Port->Address == Rs232ComPort[1].Address)
427  {
428  /* Read the LSR and check if the expected value is present */
430  if (!(Lsr & ExpectedValue))
431  {
433 
434  /* If the indicator reaches 3, we've seen this on/off twice */
435  Rs232ComPort[1].RingIndicator |= (Msr & SER_MSR_RI) ? 1 : 2;
436  if (Rs232ComPort[1].RingIndicator == 3)
438  }
439 
440  return Lsr;
441  }
442 
443  return 0;
444 }
445 
446 USHORT
447 NTAPI
449  IN PCPPORT Port,
450  OUT PUCHAR Byte,
451  IN BOOLEAN Wait,
452  IN BOOLEAN Poll)
453 {
454  UCHAR Lsr;
455  ULONG LimitCount = Wait ? TIMEOUT_COUNT : 1;
456  UCHAR SuccessFlags, ErrorFlags;
458 
459  /* Handle early read-before-init */
460  if (!Port->Address)
461  return CP_GET_NODATA;
462 
463  if (Port->Address == Rs232ComPort[0].Address)
464  {
465  SuccessFlags = Rs232ComPort[0].HasFifo ? SER1_LSR_RxRDY : SER1_STATUS_RxRDY;
466  ErrorFlags = Rs232ComPort[0].HasFifo ? (SER1_LSR_PE | SER1_LSR_OE) :
468 
469  /* If "wait" mode enabled, spin many times, otherwise attempt just once */
470  while (LimitCount--)
471  {
472  /* Read LSR for data ready */
473  Lsr = CpReadLsr(Port, SuccessFlags);
474  if (Lsr & SuccessFlags)
475  {
476  /* If an error happened, clear the byte and fail */
477  if (Lsr & ErrorFlags)
478  {
479  /* Save the last FIFO state */
480  FifoEnabled = Rs232ComPort[0].FifoEnabled;
481 
482  /* Turn off FIFO */
483  if (FifoEnabled)
485 
486  /* Clear error flag */
490 
491  /* Turn on FIFO */
492  if (FifoEnabled)
494 
495  *Byte = 0;
496  return CP_GET_ERROR;
497  }
498 
499  /* If only polling was requested by caller, return now */
500  if (Poll)
501  return CP_GET_SUCCESS;
502 
503  /* Otherwise read the byte and return it */
504  if (Rs232ComPort[0].HasFifo)
506  else
508 
509  /* TODO: Handle CD if port is in modem control mode */
510 
511  /* Byte was read */
512  return CP_GET_SUCCESS;
513  }
514  else if (IsNekoProject && Rs232ComPort[0].HasFifo)
515  {
516  /*
517  * Neko Project 21/W doesn't set RxRDY without reading any data from 0x136.
518  * TODO: Check real hardware behavior.
519  */
521  }
522  }
523 
524  /* Reset LSR, no data was found */
525  CpReadLsr(Port, 0);
526  }
527  else if (Port->Address == Rs232ComPort[1].Address)
528  {
529  /* If "wait" mode enabled, spin many times, otherwise attempt just once */
530  while (LimitCount--)
531  {
532  /* Read LSR for data ready */
533  Lsr = CpReadLsr(Port, SER2_LSR_DR);
534  if ((Lsr & SER2_LSR_DR) == SER2_LSR_DR)
535  {
536  /* If an error happened, clear the byte and fail */
537  if (Lsr & (SER2_LSR_FE | SER2_LSR_PE | SER2_LSR_OE))
538  {
539  *Byte = 0;
540  return CP_GET_ERROR;
541  }
542 
543  /* If only polling was requested by caller, return now */
544  if (Poll)
545  return CP_GET_SUCCESS;
546 
547  /* Otherwise read the byte and return it */
549 
550  /* TODO: Handle CD if port is in modem control mode */
551 
552  /* Byte was read */
553  return CP_GET_SUCCESS;
554  }
555  }
556 
557  /* Reset LSR, no data was found */
558  CpReadLsr(Port, 0);
559  }
560 
561  return CP_GET_NODATA;
562 }
563 
564 VOID
565 NTAPI
567  IN PCPPORT Port,
568  IN UCHAR Byte)
569 {
570  if (Port->Address == Rs232ComPort[0].Address)
571  {
572  /* TODO: Check if port is in modem control to handle CD */
573 
574  if (Rs232ComPort[0].HasFifo)
575  {
576  while ((CpReadLsr(Port, SER1_LSR_TxRDY) & SER1_LSR_TxRDY) == 0)
577  NOTHING;
578 
580  }
581  else
582  {
584  NOTHING;
585 
587  }
588  }
589  else if (Port->Address == Rs232ComPort[1].Address)
590  {
591  /* TODO: Check if port is in modem control to handle CD */
592 
594  NOTHING;
595 
597  }
598 }
#define SER1_IO_o_FIFO_CONTROL
Definition: serial.h:86
CPPORT Port[4]
Definition: headless.c:34
BOOLEAN NTAPI CpDoesPortExist(IN PUCHAR Address)
Definition: cport_pc98.c:364
#define IN
Definition: typedefs.h:39
#define SER2_IO_i_SCRATCH
Definition: serial.h:135
#define SER2_MCR_RTS_STATE
Definition: serial.h:177
#define CP_GET_ERROR
Definition: cportlib.h:20
#define SER1_STATUS_TxRDY
Definition: serial.h:17
#define SER1_STATUS_RxRDY
Definition: serial.h:18
#define SER_MSR_RI
Definition: serial.h:40
#define SER2_IO_i_MODEM_CONTROL
Definition: serial.h:123
#define SER2_IIR_HAS_FIFO
Definition: serial.h:120
#define READ_PORT_UCHAR(p)
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#define SER1_IO_i_RECEIVER_BUFFER
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#define TIMEOUT_COUNT
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#define TRUE
Definition: types.h:120
#define SER_MSR_DCD
Definition: serial.h:41
#define STATUS_INVALID_PARAMETER
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BOOLEAN FifoEnabled
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_In_ WDFDPC _In_ BOOLEAN Wait
Definition: wdfdpc.h:167
#define SER2_MCR_OUT_2
Definition: serial.h:179
unsigned char * PUCHAR
Definition: retypes.h:3
BOOLEAN HasFifo
Definition: cport_pc98.c:32
_Must_inspect_result_ _In_ WDFDEVICE _In_ PWDF_DEVICE_PROPERTY_DATA _In_ DEVPROPTYPE _In_ ULONG _In_opt_ PVOID Data
Definition: wdfdevice.h:4527
LONG NTSTATUS
Definition: precomp.h:26
_In_ ULONGLONG _In_ ULONGLONG _In_ BOOLEAN Enable
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#define SER1_STATUS_OE
Definition: serial.h:21
Definition: arc.h:84
#define SER1_COMMMAND_IR
Definition: serial.h:83
#define SER1_COMMMAND_DTR
Definition: serial.h:78
FORCEINLINE VOID Write8253Timer(TIMER_CONTROL_PORT_REGISTER TimerControl, USHORT Count)
Definition: pit.h:90
UCHAR NTAPI CpReadLsr(IN PCPPORT Port, IN UCHAR ExpectedValue)
Definition: cport_pc98.c:387
#define SER1_IIR_FIFOS_ENABLED
Definition: serial.h:51
#define SER_MSR_DSR
Definition: serial.h:39
#define SER2_IO_o_INTERRUPT_EN
Definition: serial.h:150
static BOOLEAN ComPortTest2(IN PUCHAR Address)
Definition: cport_pc98.c:340
#define SER2_IO_o_MODEM_CONTROL
Definition: serial.h:175
#define SER2_LSR_THR_EMPTY
Definition: serial.h:130
#define SER1_LSR_RxRDY
Definition: serial.h:29
#define SER2_IO_o_TRANSMITTER_BUFFER
Definition: serial.h:137
#define PPI_IO_o_PORT_C
Definition: sysport.h:10
#define SER1_LSR_TxRDY
Definition: serial.h:28
#define SER2_LSR_DR
Definition: serial.h:125
#define SER2_IO_o_LINE_CONTROL
Definition: serial.h:158
#define SER1_IO_i_INTERRUPT_ID
Definition: serial.h:42
#define SER1_IO_o_DIVISOR_LATCH
Definition: serial.h:96
#define SER2_IO_i_MODEM_STATUS
Definition: serial.h:133
NTSTATUS(* NTAPI)(IN PFILE_FULL_EA_INFORMATION EaBuffer, IN ULONG EaLength, OUT PULONG ErrorOffset)
Definition: IoEaTest.cpp:117
USHORT NTAPI CpGetByte(IN PCPPORT Port, OUT PUCHAR Byte, IN BOOLEAN Wait, IN BOOLEAN Poll)
Definition: cport_pc98.c:448
#define FALSE
Definition: types.h:117
#define SER1_IO_o_DATA
Definition: serial.h:55
#define SER1_LSR_OE
Definition: serial.h:30
USHORT Flags
Definition: cportlib.h:31
#define SER2_LCR_DLAB
Definition: serial.h:174
#define SER2_IO_i_LINE_STATUS
Definition: serial.h:124
#define SER2_LCR_NO_PARITY
Definition: serial.h:168
static VOID CpWait(VOID)
Definition: cport_pc98.c:62
static BOOLEAN IsNekoProject
Definition: cport_pc98.c:41
VOID NTAPI CpSetBaud(IN PCPPORT Port, IN ULONG BaudRate)
Definition: cport_pc98.c:100
#define SER_MSR_CTS
Definition: serial.h:38
unsigned char BOOLEAN
#define SER2_CLOCK_RATE
Definition: serial.h:184
#define SER2_IO_o_FIFO_CONTROL
Definition: serial.h:155
#define SER1_IO_i_MODEM_STATUS
Definition: serial.h:33
#define SER1_STATUS_FE
Definition: serial.h:22
#define SER2_LCR_LENGTH_8
Definition: serial.h:163
static BOOLEAN CpIsNekoProject(VOID)
Definition: cport_pc98.c:46
Status
Definition: gdiplustypes.h:24
#define STATUS_NOT_FOUND
Definition: shellext.h:72
int Count
Definition: noreturn.cpp:7
#define SER1_IO_o_TRANSMITTER_BUFFER
Definition: serial.h:85
#define SER1_IO_i_LINE_STATUS
Definition: serial.h:26
UCHAR RingIndicator
Definition: cport_pc98.c:34
#define SER1_DLR_MODE_LEGACY
Definition: serial.h:105
#define SER2_MCR_DTR_STATE
Definition: serial.h:176
#define SER_FCR_ENABLE
Definition: serial.h:88
#define SER2_LSR_PE
Definition: serial.h:127
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Definition: sysport.h:20
#define SER1_COMMMAND_ER
Definition: serial.h:81
#define SER2_LSR_OE
Definition: serial.h:126
#define SER_FCR_RCVR_RESET
Definition: serial.h:89
unsigned char UCHAR
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#define SER2_MCR_LOOPBACK
Definition: serial.h:180
NTSTATUS NTAPI CpInitialize(IN PCPPORT Port, IN PUCHAR Address, IN ULONG BaudRate)
Definition: cport_pc98.c:153
#define WRITE_PORT_UCHAR(p, d)
Definition: pc98vid.h:21
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#define VOID
Definition: acefi.h:82
#define SER2_IO_o_SCRATCH
Definition: serial.h:182
#define NOTHING
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#define SER2_IO_i_RECEIVER_BUFFER
Definition: serial.h:112
PUCHAR Address
Definition: cportlib.h:29
PUCHAR Address
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#define TIMER_FREQUENCY_1
Definition: pit.h:16
#define SER1_COMMMAND_RTS
Definition: serial.h:82
#define SER2_IO_o_DIVISOR_LATCH_MSB
Definition: serial.h:149
#define CPU_IO_o_ARTIC_DELAY
Definition: cpu.h:22
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
#define SER1_MODE_LENGTH_8
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#define SER2_MCR_OUT_1
Definition: serial.h:178
unsigned short USHORT
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#define CPPORT_FLAG_MODEM_CONTROL
Definition: cportlib.h:25
#define SER1_COMMMAND_TxEN
Definition: serial.h:77
ULONG BaudRate
Definition: cportlib.h:30
unsigned int * PULONG
Definition: retypes.h:1
#define NULL
Definition: types.h:112
#define SER2_IO_i_LINE_CONTROL
Definition: serial.h:122
#define CP_GET_SUCCESS
Definition: cportlib.h:18
#define SER2_LSR_FE
Definition: serial.h:128
#define SER1_IO_i_DATA
Definition: serial.h:15
#define SER2_LCR_ST1
Definition: serial.h:165
#define SER2_IO_o_DIVISOR_LATCH_LSB
Definition: serial.h:138
#define SER1_MODE_1_STOP
Definition: serial.h:73
#define SER1_MODE_CLOCKx16
Definition: serial.h:70
unsigned char Byte
Definition: zlib.h:37
#define SER1_IO_o_MODE_COMMAND
Definition: serial.h:56
#define PPI_IO_i_PORT_B
Definition: sysport.h:19
#define SER1_IO_i_STATUS
Definition: serial.h:16
#define OUT
Definition: typedefs.h:40
unsigned int ULONG
Definition: retypes.h:1
#define SER1_STATUS_PE
Definition: serial.h:20
static struct @4106 Rs232ComPort[]
#define SER2_IO_i_INTERRUPT_ID
Definition: serial.h:116
VOID NTAPI CpEnableFifo(IN PUCHAR Address, IN BOOLEAN Enable)
Definition: cport_pc98.c:72
#define SER1_LSR_PE
Definition: serial.h:31
#define SER_FCR_TXMT_RESET
Definition: serial.h:90
#define STATUS_SUCCESS
Definition: shellext.h:65
#define CP_GET_NODATA
Definition: cportlib.h:19
#define SER1_COMMMAND_RxEN
Definition: serial.h:79
VOID NTAPI CpPutByte(IN PCPPORT Port, IN UCHAR Byte)
Definition: cport_pc98.c:566
#define SER_FCR_DISABLE
Definition: serial.h:87
static BOOLEAN ComPortTest1(IN PUCHAR Address)
Definition: cport_pc98.c:265
#define TIMER_FREQUENCY_2
Definition: pit.h:17