10#define PPI_IO_o_PORT_C 0x35
12#define PPI_IO_o_CONTROL 0x37
13 #define PPI_TIMER_1_GATE_TO_SPEAKER 0x06
14 #define PPI_TIMER_1_UNGATE_TO_SPEAKER 0x07
15 #define PPI_SHUTDOWN_1_ENABLE 0x0B
16 #define PPI_SHUTDOWN_0_ENABLE 0x0F
18#define PPI_IO_i_PORT_A 0x31
19#define PPI_IO_i_PORT_B 0x33
20#define PPI_IO_i_PORT_C 0x35
union _SYSTEM_CONTROL_PORT_B_REGISTER * PSYSTEM_CONTROL_PORT_B_REGISTER
union _SYSTEM_CONTROL_PORT_B_REGISTER SYSTEM_CONTROL_PORT_B_REGISTER
union _SYSTEM_CONTROL_PORT_A_REGISTER * PSYSTEM_CONTROL_PORT_A_REGISTER
union _SYSTEM_CONTROL_PORT_C_REGISTER SYSTEM_CONTROL_PORT_C_REGISTER
union _SYSTEM_CONTROL_PORT_C_REGISTER * PSYSTEM_CONTROL_PORT_C_REGISTER
union _SYSTEM_CONTROL_PORT_A_REGISTER SYSTEM_CONTROL_PORT_A_REGISTER
UCHAR ExtendedMemoryParityCheck
UCHAR Timer1GateToSpeaker
UCHAR PrinterStrobeSignal
UCHAR InterruptEnableTxReady
UCHAR InterruptEnableRxReady
UCHAR InterruptEnableTxEmpty