ReactOS
0.4.15-dev-4594-g505ac65
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Go to the source code of this file.
#define SER1_IIR_FIFOS_ENABLED 0x40 /* Toggles for each read */ |
#define SER1_MODE_EP 0x20 /* Even parity generation/check */ |
#define SER1_STATUS_SYNDET 0x40 /* Sync detect / Break detect */ |
#define SER2_IER_DATA_RECEIVED 0x01 /* Received data available */ |
#define SER2_IER_LSR_CHANGE 0x04 /* Receiver line register status change */ |
#define SER2_IER_MSR_CHANGE 0x08 /* Modem status register change */ |
#define SER2_IER_THR_EMPTY 0x02 /* Transmitter holding register empty */ |
#define SER2_IO_i_DIVISOR_LATCH_LSB 0x238 /* If DLAB = 1 */ |
#define SER2_IO_i_DIVISOR_LATCH_MSB 0x239 /* If DLAB = 1 */ |
#define SER2_IO_o_DIVISOR_LATCH_LSB 0x238 /* If DLAB = 1 */ |
#define SER2_IO_o_DIVISOR_LATCH_MSB 0x239 /* If DLAB = 1 */ |
#define SER2_IO_o_TRANSMITTER_BUFFER 0x238 /* If DLAB = 0 */ |
#define SER2_LSR_THR_EMPTY 0x20 /* Transmit holding register empty */ |
#define SER2_LSR_TSR_EMPTY 0x40 /* Transmitter FIFO empty */ |
#define SER_IIR_THR 0x02 /* Transmitter holding register empty */ |
#define SER_MSR_CTS_CHANGED 0x01 /* Change in clear to send */ |
#define SER_MSR_DCD_CHANGED 0x08 /* Change in carrier detect */ |
#define SER_MSR_DSR_CHANGED 0x02 /* Change in data set ready */ |