delay.c File Reference

#include <hal.h>
#include <debug.h>
#include "delay.h"

Include dependency graph for delay.c:

Go to the source code of this file.

Macros
#define	NDEBUG
#define	SAMPLE_FREQUENCY   1024

Functions
VOID __cdecl	HalpTscCalibrationISR (VOID)
static VOID	HalpPrepareStallExecution (VOID)
static ULONG64	HalpDoLinearRegression (_In_ ULONG XMax, _In_reads_(XMax+1) const ULONG64 *ArrayY)
VOID NTAPI	HalpCalibrateStallExecution (VOID)

Variables
volatile ULONG	TscCalibrationPhase
ULONG64	TscCalibrationArray [NUM_SAMPLES]

Macro Definition Documentation

NDEBUG

#define NDEBUG

Definition at line 13 of file delay.c.

SAMPLE_FREQUENCY

#define SAMPLE_FREQUENCY   1024

Definition at line 20 of file delay.c.

Function Documentation

HalpCalibrateStallExecution()

VOID NTAPI HalpCalibrateStallExecution

(

VOID

)

Definition at line 94 of file delay.c.

{
    ULONG_PTR Flags;
    PVOID PreviousHandler;
    TIMER_CONTROL_PORT_REGISTER TimerControl;
    ULONG TimerFrequency;
    USHORT Period;
    ULONG64 CpuClockFrequency;
 
    /* Check if the CPU supports RDTSC */
    if (!(KeGetCurrentPrcb()->FeatureBits & KF_RDTSC))
    {
        KeBugCheck(HAL_INITIALIZATION_FAILED);
    }
 
    Flags = __readeflags();
    _disable();
 
    PreviousHandler = KeQueryInterruptHandler(PIC_TIMER_IRQ);
    KeRegisterInterruptHandler(PRIMARY_VECTOR_BASE + PIC_TIMER_IRQ, HalpTscCalibrationISR);
 
    /* Program the PIT for binary mode */
    TimerControl.BcdMode = FALSE;
    TimerControl.OperatingMode = PitOperatingMode2;
    TimerControl.Channel = PitChannel0;
    TimerControl.AccessMode = PitAccessModeLowHigh;
 
    if (__inbyte(0x42) & 0x20)
        TimerFrequency = TIMER_FREQUENCY_1;
    else
        TimerFrequency = TIMER_FREQUENCY_2;
    Period = (TimerFrequency + (SAMPLE_FREQUENCY / 2)) / SAMPLE_FREQUENCY;
 
    __outbyte(TIMER_CONTROL_PORT, TimerControl.Bits);
    __outbyte(TIMER_CHANNEL0_DATA_PORT, Period & 0xFF);
    __outbyte(TIMER_CHANNEL0_DATA_PORT, Period >> 8);
 
    HalEnableSystemInterrupt(PRIMARY_VECTOR_BASE + PIC_TIMER_IRQ, CLOCK2_LEVEL, Latched);
 
    /* Collect the sample data */
    _enable();
    while (TscCalibrationPhase != (NUM_SAMPLES + 1))
        NOTHING;
    _disable();
 
    HalDisableSystemInterrupt(PRIMARY_VECTOR_BASE + PIC_TIMER_IRQ, CLOCK2_LEVEL);
    KeRegisterInterruptHandler(PRIMARY_VECTOR_BASE + PIC_TIMER_IRQ, PreviousHandler);
 
    /* Calculate an average, using simplified linear regression */
    CpuClockFrequency = HalpDoLinearRegression(NUM_SAMPLES - 1, TscCalibrationArray);
    KeGetPcr()->StallScaleFactor = (ULONG)(CpuClockFrequency / 1000000);
 
    HalpPrepareStallExecution();
 
    __writeeflags(Flags);
}

HalpDoLinearRegression()

static ULONG64 HalpDoLinearRegression ( _In_ ULONG  XMax, _In_reads_(XMax+1) const ULONG64 *  ArrayY  )

static

Definition at line 68 of file delay.c.

{
    ULONG X, SumXX;
    ULONG64 SumXY;
 
    /* Calculate the sum of the squares of X */
    SumXX = (XMax * (XMax + 1) * (2 * XMax + 1)) / 6;
 
    /* Calculate the sum of the differences to the first value weighted by X */
    for (SumXY = 0, X = 1; X <= XMax; X++)
    {
        SumXY += X * (ArrayY[X] - ArrayY[0]);
    }
 
    /* Account for sample frequency */
    SumXY *= SAMPLE_FREQUENCY;
 
    /* Return the quotient of the sums */
    return (SumXY + (SumXX / 2)) / SumXX;
}

Referenced by HalpCalibrateStallExecution().

HalpPrepareStallExecution()

static VOID HalpPrepareStallExecution ( VOID  )

static

Definition at line 34 of file delay.c.

{
    PUCHAR Instruction = (PUCHAR)((ULONG_PTR)KeStallExecutionProcessor + 1);
    PKPRCB Prcb = KeGetCurrentPrcb();
 
    /* xor eax, eax; cpuid */
    ASSERT((Instruction[1] == 0xC0) && // The byte [0] has different encodings
           (Instruction[2] == 0x0F) &&
           (Instruction[3] == 0xA2));
 
    /*
     * Starting with the Pentium Pro processor it is necessary to force
     * the in-order execution of the RDTSC instruction using a serializing instruction.
     * For more details, please refer to Section 3.1 of
     * Intel "Using the RDTSC Instruction for Performance Monitoring".
     *
     * Patch the KeStallExecutionProcessor function to remove the serializing instruction
     * for the Pentium and Pentium MMX processors.
     */
    if ((Prcb->CpuType < 6) && !strcmp(Prcb->VendorString, "GenuineIntel"))
    {
        /* Replace "xor eax, eax; cpuid" with "lea esi, [esi+0]" */
        Instruction[0] = 0x8D;
        Instruction[1] = 0x74;
        Instruction[2] = 0x26;
        Instruction[3] = 0x00;
 
        KeSweepICache(Instruction, 4);
    }
}

Referenced by HalpCalibrateStallExecution().

HalpTscCalibrationISR()

VOID __cdecl HalpTscCalibrationISR

(

VOID

)

Referenced by HalpCalibrateStallExecution().

Variable Documentation

TscCalibrationArray

ULONG64 TscCalibrationArray[NUM_SAMPLES]

extern

Definition at line 20 of file tsc.c.

Referenced by HalpCalibrateStallExecution(), and HalpInitializeTsc().

TscCalibrationPhase

volatile ULONG TscCalibrationPhase

extern

Definition at line 19 of file tsc.c.

Referenced by HalpCalibrateStallExecution(), and HalpInitializeTsc().