ReactOS  0.4.14-dev-317-g96040ec
hardware.h File Reference
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Classes

struct  _UHCI_TRANSFER_DESCRIPTOR
 
struct  _UHCI_QUEUE_HEAD
 

Macros

#define PCI_LEGSUP   0xC0
 
#define PCI_LEGSUP_USBPIRQDEN   0x2000
 
#define PCI_LEGSUP_CLEAR_SMI   0x8f00
 
#define UHCI_USBCMD   0x00
 
#define UHCI_USBSTS   0x02
 
#define UHCI_USBINTR   0x04
 
#define UHCI_FRNUM   0x06
 
#define UHCI_FRBASEADD   0x08
 
#define UHCI_SOFMOD   0x0c
 
#define UHCI_PORTSC1   0x10
 
#define UHCI_PORTSC2   0x12
 
#define UHCI_USBCMD_RS   0x01
 
#define UHCI_USBCMD_HCRESET   0x02
 
#define UHCI_USBCMD_GRESET   0x04
 
#define UHCI_USBCMD_EGSM   0x08
 
#define UHCI_USBCMD_FGR   0x10
 
#define UHCI_USBCMD_SWDBG   0x20
 
#define UHCI_USBCMD_CF   0x40
 
#define UHCI_USBCMD_MAXP   0x80
 
#define UHCI_USBSTS_USBINT   0x01
 
#define UHCI_USBSTS_ERRINT   0x02
 
#define UHCI_USBSTS_RESDET   0x04
 
#define UHCI_USBSTS_HOSTERR   0x08
 
#define UHCI_USBSTS_HCPRERR   0x10
 
#define UHCI_USBSTS_HCHALT   0x20
 
#define UHCI_USBINTR_CRC   0x01
 
#define UHCI_USBINTR_RESUME   0x02
 
#define UHCI_USBINTR_IOC   0x04
 
#define UHCI_USBINTR_SHORT   0x08
 
#define UHCI_PORTSC_CURSTAT   0x0001
 
#define UHCI_PORTSC_STATCHA   0x0002
 
#define UHCI_PORTSC_ENABLED   0x0004
 
#define UHCI_PORTSC_ENABCHA   0x0008
 
#define UHCI_PORTSC_LINE_0   0x0010
 
#define UHCI_PORTSC_LINE_1   0x0020
 
#define UHCI_PORTSC_RESUME   0x0040
 
#define UHCI_PORTSC_LOWSPEED   0x0100
 
#define UHCI_PORTSC_RESET   0x0200
 
#define UHCI_PORTSC_SUSPEND   0x1000
 
#define UHCI_PORTSC_DATAMASK   0x13f5
 
#define FRAMELIST_TERMINATE   0x1
 
#define FRAMELIST_NEXT_IS_QH   0x2
 
#define NUMBER_OF_FRAMES   1024
 
#define MAX_AVAILABLE_BANDWIDTH   900
 
#define TD_NEXT_IS_QH   0x02
 
#define TD_CONTROL_SPD   (1 << 29)
 
#define TD_CONTROL_3_ERRORS   (3 << 27)
 
#define TD_CONTROL_LOWSPEED   (1 << 26)
 
#define TD_CONTROL_ISOCHRONOUS   (1 << 25)
 
#define TD_CONTROL_IOC   (1 << 24)
 
#define TD_STATUS_ACTIVE   (1 << 23)
 
#define TD_STATUS_ERROR_STALLED   (1 << 22)
 
#define TD_STATUS_ERROR_BUFFER   (1 << 21)
 
#define TD_STATUS_ERROR_BABBLE   (1 << 20)
 
#define TD_STATUS_ERROR_NAK   (1 << 19)
 
#define TD_STATUS_ERROR_CRC   (1 << 18)
 
#define TD_STATUS_ERROR_TIMEOUT   (1 << 18)
 
#define TD_STATUS_ERROR_BITSTUFF   (1 << 17)
 
#define TD_STATUS_ACTLEN_MASK   0x07ff
 
#define TD_STATUS_ACTLEN_NULL   0x07ff
 
#define TD_TOKEN_MAXLEN_SHIFT   21
 
#define TD_TOKEN_NULL_DATA   (0x07ff << TD_TOKEN_MAXLEN_SHIFT)
 
#define TD_TOKEN_DATA_TOGGLE_SHIFT   19
 
#define TD_TOKEN_DATA1   (1 << TD_TOKEN_DATA_TOGGLE_SHIFT)
 
#define TD_TOKEN_SETUP   0x2d
 
#define TD_TOKEN_IN   0x69
 
#define TD_TOKEN_OUT   0xe1
 
#define TD_TOKEN_ENDPTADDR_SHIFT   15
 
#define TD_TOKEN_DEVADDR_SHIFT   8
 
#define TD_DEPTH_FIRST   0x04
 
#define TD_TERMINATE   0x01
 
#define TD_ERROR_MASK   0x440000
 
#define TD_ERROR_COUNT_SHIFT   27
 
#define TD_ERROR_COUNT_MASK   0x03
 
#define TD_LINK_MASK   0xfffffff0
 
#define QH_TERMINATE   0x01
 
#define QH_NEXT_IS_QH   0x02
 
#define QH_LINK_MASK   0xfffffff0
 
#define UHCI_INTERRUPT_QUEUE   0
 
#define UHCI_LOW_SPEED_CONTROL_QUEUE   1
 
#define UHCI_FULL_SPEED_CONTROL_QUEUE   2
 
#define UHCI_BULK_QUEUE   3
 
#define UHCI_DEBUG_QUEUE   4
 

Typedefs

typedef struct _UHCI_TRANSFER_DESCRIPTOR UHCI_TRANSFER_DESCRIPTOR
 
typedef struct _UHCI_TRANSFER_DESCRIPTORPUHCI_TRANSFER_DESCRIPTOR
 
typedef struct _UHCI_QUEUE_HEAD UHCI_QUEUE_HEAD
 
typedef struct _UHCI_QUEUE_HEADPUHCI_QUEUE_HEAD
 

Functions

static ULONG UHCI_TRANSFER_DESCRIPTOR_MAXIMUM_LENGTH (PUHCI_TRANSFER_DESCRIPTOR Descriptor)
 
static ULONG UHCI_TRANSFER_DESCRIPTOR_LENGTH (PUHCI_TRANSFER_DESCRIPTOR Descriptor)
 

Macro Definition Documentation

◆ FRAMELIST_NEXT_IS_QH

#define FRAMELIST_NEXT_IS_QH   0x2

Definition at line 80 of file hardware.h.

◆ FRAMELIST_TERMINATE

#define FRAMELIST_TERMINATE   0x1

Definition at line 79 of file hardware.h.

◆ MAX_AVAILABLE_BANDWIDTH

#define MAX_AVAILABLE_BANDWIDTH   900

Definition at line 84 of file hardware.h.

◆ NUMBER_OF_FRAMES

#define NUMBER_OF_FRAMES   1024

Definition at line 83 of file hardware.h.

◆ PCI_LEGSUP

#define PCI_LEGSUP   0xC0

Definition at line 22 of file hardware.h.

◆ PCI_LEGSUP_CLEAR_SMI

#define PCI_LEGSUP_CLEAR_SMI   0x8f00

Definition at line 24 of file hardware.h.

◆ PCI_LEGSUP_USBPIRQDEN

#define PCI_LEGSUP_USBPIRQDEN   0x2000

Definition at line 23 of file hardware.h.

◆ QH_LINK_MASK

#define QH_LINK_MASK   0xfffffff0

Definition at line 182 of file hardware.h.

◆ QH_NEXT_IS_QH

#define QH_NEXT_IS_QH   0x02

Definition at line 181 of file hardware.h.

◆ QH_TERMINATE

#define QH_TERMINATE   0x01

Definition at line 180 of file hardware.h.

◆ TD_CONTROL_3_ERRORS

#define TD_CONTROL_3_ERRORS   (3 << 27)

Definition at line 106 of file hardware.h.

◆ TD_CONTROL_IOC

#define TD_CONTROL_IOC   (1 << 24)

Definition at line 109 of file hardware.h.

◆ TD_CONTROL_ISOCHRONOUS

#define TD_CONTROL_ISOCHRONOUS   (1 << 25)

Definition at line 108 of file hardware.h.

◆ TD_CONTROL_LOWSPEED

#define TD_CONTROL_LOWSPEED   (1 << 26)

Definition at line 107 of file hardware.h.

◆ TD_CONTROL_SPD

#define TD_CONTROL_SPD   (1 << 29)

Definition at line 105 of file hardware.h.

◆ TD_DEPTH_FIRST

#define TD_DEPTH_FIRST   0x04

Definition at line 136 of file hardware.h.

◆ TD_ERROR_COUNT_MASK

#define TD_ERROR_COUNT_MASK   0x03

Definition at line 140 of file hardware.h.

◆ TD_ERROR_COUNT_SHIFT

#define TD_ERROR_COUNT_SHIFT   27

Definition at line 139 of file hardware.h.

◆ TD_ERROR_MASK

#define TD_ERROR_MASK   0x440000

Definition at line 138 of file hardware.h.

◆ TD_LINK_MASK

#define TD_LINK_MASK   0xfffffff0

Definition at line 141 of file hardware.h.

◆ TD_NEXT_IS_QH

#define TD_NEXT_IS_QH   0x02

Definition at line 102 of file hardware.h.

◆ TD_STATUS_ACTIVE

#define TD_STATUS_ACTIVE   (1 << 23)

Definition at line 111 of file hardware.h.

◆ TD_STATUS_ACTLEN_MASK

#define TD_STATUS_ACTLEN_MASK   0x07ff

Definition at line 120 of file hardware.h.

◆ TD_STATUS_ACTLEN_NULL

#define TD_STATUS_ACTLEN_NULL   0x07ff

Definition at line 121 of file hardware.h.

◆ TD_STATUS_ERROR_BABBLE

#define TD_STATUS_ERROR_BABBLE   (1 << 20)

Definition at line 114 of file hardware.h.

◆ TD_STATUS_ERROR_BITSTUFF

#define TD_STATUS_ERROR_BITSTUFF   (1 << 17)

Definition at line 118 of file hardware.h.

◆ TD_STATUS_ERROR_BUFFER

#define TD_STATUS_ERROR_BUFFER   (1 << 21)

Definition at line 113 of file hardware.h.

◆ TD_STATUS_ERROR_CRC

#define TD_STATUS_ERROR_CRC   (1 << 18)

Definition at line 116 of file hardware.h.

◆ TD_STATUS_ERROR_NAK

#define TD_STATUS_ERROR_NAK   (1 << 19)

Definition at line 115 of file hardware.h.

◆ TD_STATUS_ERROR_STALLED

#define TD_STATUS_ERROR_STALLED   (1 << 22)

Definition at line 112 of file hardware.h.

◆ TD_STATUS_ERROR_TIMEOUT

#define TD_STATUS_ERROR_TIMEOUT   (1 << 18)

Definition at line 117 of file hardware.h.

◆ TD_TERMINATE

#define TD_TERMINATE   0x01

Definition at line 137 of file hardware.h.

◆ TD_TOKEN_DATA1

#define TD_TOKEN_DATA1   (1 << TD_TOKEN_DATA_TOGGLE_SHIFT)

Definition at line 127 of file hardware.h.

◆ TD_TOKEN_DATA_TOGGLE_SHIFT

#define TD_TOKEN_DATA_TOGGLE_SHIFT   19

Definition at line 126 of file hardware.h.

◆ TD_TOKEN_DEVADDR_SHIFT

#define TD_TOKEN_DEVADDR_SHIFT   8

Definition at line 134 of file hardware.h.

◆ TD_TOKEN_ENDPTADDR_SHIFT

#define TD_TOKEN_ENDPTADDR_SHIFT   15

Definition at line 133 of file hardware.h.

◆ TD_TOKEN_IN

#define TD_TOKEN_IN   0x69

Definition at line 130 of file hardware.h.

◆ TD_TOKEN_MAXLEN_SHIFT

#define TD_TOKEN_MAXLEN_SHIFT   21

Definition at line 124 of file hardware.h.

◆ TD_TOKEN_NULL_DATA

#define TD_TOKEN_NULL_DATA   (0x07ff << TD_TOKEN_MAXLEN_SHIFT)

Definition at line 125 of file hardware.h.

◆ TD_TOKEN_OUT

#define TD_TOKEN_OUT   0xe1

Definition at line 131 of file hardware.h.

◆ TD_TOKEN_SETUP

#define TD_TOKEN_SETUP   0x2d

Definition at line 129 of file hardware.h.

◆ UHCI_BULK_QUEUE

#define UHCI_BULK_QUEUE   3

Definition at line 188 of file hardware.h.

◆ UHCI_DEBUG_QUEUE

#define UHCI_DEBUG_QUEUE   4

Definition at line 189 of file hardware.h.

◆ UHCI_FRBASEADD

#define UHCI_FRBASEADD   0x08

Definition at line 31 of file hardware.h.

◆ UHCI_FRNUM

#define UHCI_FRNUM   0x06

Definition at line 30 of file hardware.h.

◆ UHCI_FULL_SPEED_CONTROL_QUEUE

#define UHCI_FULL_SPEED_CONTROL_QUEUE   2

Definition at line 187 of file hardware.h.

◆ UHCI_INTERRUPT_QUEUE

#define UHCI_INTERRUPT_QUEUE   0

Definition at line 185 of file hardware.h.

◆ UHCI_LOW_SPEED_CONTROL_QUEUE

#define UHCI_LOW_SPEED_CONTROL_QUEUE   1

Definition at line 186 of file hardware.h.

◆ UHCI_PORTSC1

#define UHCI_PORTSC1   0x10

Definition at line 33 of file hardware.h.

◆ UHCI_PORTSC2

#define UHCI_PORTSC2   0x12

Definition at line 34 of file hardware.h.

◆ UHCI_PORTSC_CURSTAT

#define UHCI_PORTSC_CURSTAT   0x0001

Definition at line 61 of file hardware.h.

◆ UHCI_PORTSC_DATAMASK

#define UHCI_PORTSC_DATAMASK   0x13f5

Definition at line 72 of file hardware.h.

◆ UHCI_PORTSC_ENABCHA

#define UHCI_PORTSC_ENABCHA   0x0008

Definition at line 64 of file hardware.h.

◆ UHCI_PORTSC_ENABLED

#define UHCI_PORTSC_ENABLED   0x0004

Definition at line 63 of file hardware.h.

◆ UHCI_PORTSC_LINE_0

#define UHCI_PORTSC_LINE_0   0x0010

Definition at line 65 of file hardware.h.

◆ UHCI_PORTSC_LINE_1

#define UHCI_PORTSC_LINE_1   0x0020

Definition at line 66 of file hardware.h.

◆ UHCI_PORTSC_LOWSPEED

#define UHCI_PORTSC_LOWSPEED   0x0100

Definition at line 68 of file hardware.h.

◆ UHCI_PORTSC_RESET

#define UHCI_PORTSC_RESET   0x0200

Definition at line 69 of file hardware.h.

◆ UHCI_PORTSC_RESUME

#define UHCI_PORTSC_RESUME   0x0040

Definition at line 67 of file hardware.h.

◆ UHCI_PORTSC_STATCHA

#define UHCI_PORTSC_STATCHA   0x0002

Definition at line 62 of file hardware.h.

◆ UHCI_PORTSC_SUSPEND

#define UHCI_PORTSC_SUSPEND   0x1000

Definition at line 70 of file hardware.h.

◆ UHCI_SOFMOD

#define UHCI_SOFMOD   0x0c

Definition at line 32 of file hardware.h.

◆ UHCI_USBCMD

#define UHCI_USBCMD   0x00

Definition at line 27 of file hardware.h.

◆ UHCI_USBCMD_CF

#define UHCI_USBCMD_CF   0x40

Definition at line 43 of file hardware.h.

◆ UHCI_USBCMD_EGSM

#define UHCI_USBCMD_EGSM   0x08

Definition at line 40 of file hardware.h.

◆ UHCI_USBCMD_FGR

#define UHCI_USBCMD_FGR   0x10

Definition at line 41 of file hardware.h.

◆ UHCI_USBCMD_GRESET

#define UHCI_USBCMD_GRESET   0x04

Definition at line 39 of file hardware.h.

◆ UHCI_USBCMD_HCRESET

#define UHCI_USBCMD_HCRESET   0x02

Definition at line 38 of file hardware.h.

◆ UHCI_USBCMD_MAXP

#define UHCI_USBCMD_MAXP   0x80

Definition at line 44 of file hardware.h.

◆ UHCI_USBCMD_RS

#define UHCI_USBCMD_RS   0x01

Definition at line 37 of file hardware.h.

◆ UHCI_USBCMD_SWDBG

#define UHCI_USBCMD_SWDBG   0x20

Definition at line 42 of file hardware.h.

◆ UHCI_USBINTR

#define UHCI_USBINTR   0x04

Definition at line 29 of file hardware.h.

◆ UHCI_USBINTR_CRC

#define UHCI_USBINTR_CRC   0x01

Definition at line 55 of file hardware.h.

◆ UHCI_USBINTR_IOC

#define UHCI_USBINTR_IOC   0x04

Definition at line 57 of file hardware.h.

◆ UHCI_USBINTR_RESUME

#define UHCI_USBINTR_RESUME   0x02

Definition at line 56 of file hardware.h.

◆ UHCI_USBINTR_SHORT

#define UHCI_USBINTR_SHORT   0x08

Definition at line 58 of file hardware.h.

◆ UHCI_USBSTS

#define UHCI_USBSTS   0x02

Definition at line 28 of file hardware.h.

◆ UHCI_USBSTS_ERRINT

#define UHCI_USBSTS_ERRINT   0x02

Definition at line 48 of file hardware.h.

◆ UHCI_USBSTS_HCHALT

#define UHCI_USBSTS_HCHALT   0x20

Definition at line 52 of file hardware.h.

◆ UHCI_USBSTS_HCPRERR

#define UHCI_USBSTS_HCPRERR   0x10

Definition at line 51 of file hardware.h.

◆ UHCI_USBSTS_HOSTERR

#define UHCI_USBSTS_HOSTERR   0x08

Definition at line 50 of file hardware.h.

◆ UHCI_USBSTS_RESDET

#define UHCI_USBSTS_RESDET   0x04

Definition at line 49 of file hardware.h.

◆ UHCI_USBSTS_USBINT

#define UHCI_USBSTS_USBINT   0x01

Definition at line 47 of file hardware.h.

Typedef Documentation

◆ PUHCI_QUEUE_HEAD

◆ PUHCI_TRANSFER_DESCRIPTOR

◆ UHCI_QUEUE_HEAD

◆ UHCI_TRANSFER_DESCRIPTOR

Function Documentation

◆ UHCI_TRANSFER_DESCRIPTOR_LENGTH()

static ULONG UHCI_TRANSFER_DESCRIPTOR_LENGTH ( PUHCI_TRANSFER_DESCRIPTOR  Descriptor)
inlinestatic

Definition at line 158 of file hardware.h.

159 {
160  ULONG Length = (Descriptor->Status & TD_STATUS_ACTLEN_MASK) + 1;
161  if (Length == TD_STATUS_ACTLEN_NULL + 1)
162  return 0;
163  return Length;
164 }
_In_ ULONG _In_ ULONG _In_ ULONG Length
Definition: ntddpcm.h:101
#define TD_STATUS_ACTLEN_MASK
Definition: hardware.h:120
unsigned int ULONG
Definition: retypes.h:1
#define TD_STATUS_ACTLEN_NULL
Definition: hardware.h:121
_In_ PSTORAGE_PROPERTY_ID _Outptr_ PSTORAGE_DESCRIPTOR_HEADER * Descriptor
Definition: classpnp.h:966

◆ UHCI_TRANSFER_DESCRIPTOR_MAXIMUM_LENGTH()

static ULONG UHCI_TRANSFER_DESCRIPTOR_MAXIMUM_LENGTH ( PUHCI_TRANSFER_DESCRIPTOR  Descriptor)
inlinestatic

Definition at line 147 of file hardware.h.

148 {
149  ULONG Length = (Descriptor->Token >> TD_TOKEN_MAXLEN_SHIFT) + 1;
150  if (Length == TD_STATUS_ACTLEN_NULL + 1)
151  return 0;
152  return Length;
153 }
_In_ ULONG _In_ ULONG _In_ ULONG Length
Definition: ntddpcm.h:101
#define TD_TOKEN_MAXLEN_SHIFT
Definition: hardware.h:124
unsigned int ULONG
Definition: retypes.h:1
#define TD_STATUS_ACTLEN_NULL
Definition: hardware.h:121
_In_ PSTORAGE_PROPERTY_ID _Outptr_ PSTORAGE_DESCRIPTOR_HEADER * Descriptor
Definition: classpnp.h:966