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Classes
union	_UHCI_PCI_LEGSUP

union	_UHCI_USB_COMMAND

union	_UHCI_USB_STATUS

union	_UHCI_INTERRUPT_ENABLE

union	_UHCI_PORT_STATUS_CONTROL

struct	_UHCI_HW_REGISTERS

union	_UHCI_CONTROL_STATUS

union	_UHCI_TD_TOKEN

struct	_UHCI_TD

struct	_UHCI_QH

Macros
#define	UHCI_FRAME_LIST_MAX_ENTRIES 1024

#define	UHCI_NUM_ROOT_HUB_PORTS 2

#define	UHCI_USBCMD 0

#define	UHCI_USBSTS 1

#define	UHCI_USBINTR 2

#define	UHCI_FRNUM 3

#define	UHCI_FRBASEADD 4

#define	UHCI_SOFMOD 6

#define	UHCI_PORTSC1 8

#define	UHCI_PORTSC2 9

#define	PCI_LEGSUP 0xC0

#define	PCI_LEGSUP_USBPIRQDEN 0x2000

#define	PCI_LEGSUP_CLEAR_SMI 0x8F00

#define	UHCI_USB_STATUS_MASK 0x3F

#define	UHCI_FRNUM_FRAME_MASK 0x7FF

#define	UHCI_FRNUM_INDEX_MASK 0x3FF

#define	UHCI_FRNUM_OVERFLOW_LIST 0x400

#define	UHCI_TD_STS_ACTIVE (1 << 7)

#define	UHCI_TD_STS_STALLED (1 << 6)

#define	UHCI_TD_STS_DATA_BUFFER_ERROR (1 << 5)

#define	UHCI_TD_STS_BABBLE_DETECTED (1 << 4)

#define	UHCI_TD_STS_NAK_RECEIVED (1 << 3)

#define	UHCI_TD_STS_TIMEOUT_CRC_ERROR (1 << 2)

#define	UHCI_TD_STS_BITSTUFF_ERROR (1 << 1)

#define	UHCI_TD_VALID_LENGTH 0x4FF

#define	UHCI_TD_LENGTH_INVALID 0x7FE

#define	UHCI_TD_LENGTH_NULL 0x7FF

#define	UHCI_TD_PID_IN 0x69

#define	UHCI_TD_PID_OUT 0xE1

#define	UHCI_TD_PID_SETUP 0x2D

#define	UHCI_TD_PID_DATA0 0

#define	UHCI_TD_PID_DATA1 1

#define	UHCI_TD_LINK_PTR_VALID (0 << 0)

#define	UHCI_TD_LINK_PTR_TERMINATE (1 << 0)

#define	UHCI_TD_LINK_PTR_TD (0 << 1)

#define	UHCI_TD_LINK_PTR_QH (1 << 1)

#define	UHCI_TD_LINK_PTR_BREADTH_FIRST (0 << 2)

#define	UHCI_TD_LINK_PTR_DEPTH_FIRST (1 << 2)

#define	UHCI_TD_LINK_POINTER_MASK 0xFFFFFFF0

#define	UHCI_QH_HEAD_LINK_PTR_VALID (0 << 0)

#define	UHCI_QH_HEAD_LINK_PTR_TERMINATE (1 << 0)

#define	UHCI_QH_HEAD_LINK_PTR_TD (0 << 1)

#define	UHCI_QH_HEAD_LINK_PTR_QH (1 << 1)

#define	UHCI_QH_HEAD_LINK_POINTER_MASK 0xFFFFFFF0

#define	UHCI_QH_ELEMENT_LINK_PTR_VALID (0 << 0)

#define	UHCI_QH_ELEMENT_LINK_PTR_TERMINATE (1 << 0)

#define	UHCI_QH_ELEMENT_LINK_PTR_TD (0 << 1)

#define	UHCI_QH_ELEMENT_LINK_PTR_QH (1 << 1)

#define	UHCI_QH_ELEMENT_LINK_POINTER_MASK 0xFFFFFFF0

Typedefs
typedef union _UHCI_PCI_LEGSUP	UHCI_PCI_LEGSUP

typedef union _UHCI_USB_COMMAND	UHCI_USB_COMMAND

typedef union _UHCI_USB_STATUS	UHCI_USB_STATUS

typedef union _UHCI_INTERRUPT_ENABLE	UHCI_INTERRUPT_ENABLE

typedef union _UHCI_PORT_STATUS_CONTROL	UHCI_PORT_STATUS_CONTROL

typedef struct _UHCI_HW_REGISTERS	UHCI_HW_REGISTERS

typedef struct _UHCI_HW_REGISTERS *	PUHCI_HW_REGISTERS

typedef union _UHCI_CONTROL_STATUS	UHCI_CONTROL_STATUS

typedef union _UHCI_TD_TOKEN	UHCI_TD_TOKEN

typedef struct _UHCI_TD	UHCI_TD

typedef struct _UHCI_TD *	PUHCI_TD

typedef struct _UHCI_QH	UHCI_QH

typedef struct _UHCI_QH *	PUHCI_QH

Functions
	C_ASSERT (sizeof(UHCI_PCI_LEGSUP)==sizeof(USHORT))

	C_ASSERT (sizeof(UHCI_USB_COMMAND)==sizeof(USHORT))

	C_ASSERT (sizeof(UHCI_USB_STATUS)==sizeof(USHORT))

	C_ASSERT (sizeof(UHCI_INTERRUPT_ENABLE)==sizeof(USHORT))

	C_ASSERT (sizeof(UHCI_PORT_STATUS_CONTROL)==sizeof(USHORT))

	C_ASSERT (sizeof(UHCI_CONTROL_STATUS)==sizeof(ULONG))

	C_ASSERT (sizeof(UHCI_TD_TOKEN)==sizeof(ULONG))

	C_ASSERT (sizeof(UHCI_TD)==16)

	C_ASSERT (sizeof(UHCI_QH)==8)

Macro Definition Documentation

◆ PCI_LEGSUP

#define PCI_LEGSUP 0xC0

Definition at line 22 of file hardware.h.

◆ PCI_LEGSUP_CLEAR_SMI

#define PCI_LEGSUP_CLEAR_SMI 0x8F00

Definition at line 24 of file hardware.h.

◆ PCI_LEGSUP_USBPIRQDEN

#define PCI_LEGSUP_USBPIRQDEN 0x2000

Definition at line 23 of file hardware.h.

◆ UHCI_FRAME_LIST_MAX_ENTRIES

#define UHCI_FRAME_LIST_MAX_ENTRIES 1024

Definition at line 8 of file hardware.h.

◆ UHCI_FRBASEADD

#define UHCI_FRBASEADD 4

Definition at line 16 of file hardware.h.

◆ UHCI_FRNUM

#define UHCI_FRNUM 3

Definition at line 15 of file hardware.h.

◆ UHCI_FRNUM_FRAME_MASK

#define UHCI_FRNUM_FRAME_MASK 0x7FF

Definition at line 102 of file hardware.h.

◆ UHCI_FRNUM_INDEX_MASK

#define UHCI_FRNUM_INDEX_MASK 0x3FF

Definition at line 103 of file hardware.h.

◆ UHCI_FRNUM_OVERFLOW_LIST

#define UHCI_FRNUM_OVERFLOW_LIST 0x400

Definition at line 104 of file hardware.h.

◆ UHCI_NUM_ROOT_HUB_PORTS

#define UHCI_NUM_ROOT_HUB_PORTS 2

Definition at line 9 of file hardware.h.

◆ UHCI_PORTSC1

#define UHCI_PORTSC1 8

Definition at line 18 of file hardware.h.

◆ UHCI_PORTSC2

#define UHCI_PORTSC2 9

Definition at line 19 of file hardware.h.

◆ UHCI_QH_ELEMENT_LINK_POINTER_MASK

#define UHCI_QH_ELEMENT_LINK_POINTER_MASK 0xFFFFFFF0

Definition at line 218 of file hardware.h.

◆ UHCI_QH_ELEMENT_LINK_PTR_QH

#define UHCI_QH_ELEMENT_LINK_PTR_QH (1 << 1)

Definition at line 217 of file hardware.h.

◆ UHCI_QH_ELEMENT_LINK_PTR_TD

#define UHCI_QH_ELEMENT_LINK_PTR_TD (0 << 1)

Definition at line 216 of file hardware.h.

◆ UHCI_QH_ELEMENT_LINK_PTR_TERMINATE

#define UHCI_QH_ELEMENT_LINK_PTR_TERMINATE (1 << 0)

Definition at line 215 of file hardware.h.

◆ UHCI_QH_ELEMENT_LINK_PTR_VALID

#define UHCI_QH_ELEMENT_LINK_PTR_VALID (0 << 0)

Definition at line 214 of file hardware.h.

◆ UHCI_QH_HEAD_LINK_POINTER_MASK

#define UHCI_QH_HEAD_LINK_POINTER_MASK 0xFFFFFFF0

Definition at line 212 of file hardware.h.

◆ UHCI_QH_HEAD_LINK_PTR_QH

#define UHCI_QH_HEAD_LINK_PTR_QH (1 << 1)

Definition at line 211 of file hardware.h.

◆ UHCI_QH_HEAD_LINK_PTR_TD

#define UHCI_QH_HEAD_LINK_PTR_TD (0 << 1)

Definition at line 210 of file hardware.h.

◆ UHCI_QH_HEAD_LINK_PTR_TERMINATE

#define UHCI_QH_HEAD_LINK_PTR_TERMINATE (1 << 0)

Definition at line 209 of file hardware.h.

◆ UHCI_QH_HEAD_LINK_PTR_VALID

#define UHCI_QH_HEAD_LINK_PTR_VALID (0 << 0)

Definition at line 208 of file hardware.h.

◆ UHCI_SOFMOD

#define UHCI_SOFMOD 6

Definition at line 17 of file hardware.h.

◆ UHCI_TD_LENGTH_INVALID

#define UHCI_TD_LENGTH_INVALID 0x7FE

Definition at line 149 of file hardware.h.

◆ UHCI_TD_LENGTH_NULL

#define UHCI_TD_LENGTH_NULL 0x7FF

Definition at line 150 of file hardware.h.

◆ UHCI_TD_LINK_POINTER_MASK

#define UHCI_TD_LINK_POINTER_MASK 0xFFFFFFF0

Definition at line 196 of file hardware.h.

◆ UHCI_TD_LINK_PTR_BREADTH_FIRST

#define UHCI_TD_LINK_PTR_BREADTH_FIRST (0 << 2)

Definition at line 194 of file hardware.h.

◆ UHCI_TD_LINK_PTR_DEPTH_FIRST

#define UHCI_TD_LINK_PTR_DEPTH_FIRST (1 << 2)

Definition at line 195 of file hardware.h.

◆ UHCI_TD_LINK_PTR_QH

#define UHCI_TD_LINK_PTR_QH (1 << 1)

Definition at line 193 of file hardware.h.

◆ UHCI_TD_LINK_PTR_TD

#define UHCI_TD_LINK_PTR_TD (0 << 1)

Definition at line 192 of file hardware.h.

◆ UHCI_TD_LINK_PTR_TERMINATE

#define UHCI_TD_LINK_PTR_TERMINATE (1 << 0)

Definition at line 191 of file hardware.h.

◆ UHCI_TD_LINK_PTR_VALID

#define UHCI_TD_LINK_PTR_VALID (0 << 0)

Definition at line 190 of file hardware.h.

◆ UHCI_TD_PID_DATA0

#define UHCI_TD_PID_DATA0 0

Definition at line 173 of file hardware.h.

◆ UHCI_TD_PID_DATA1

#define UHCI_TD_PID_DATA1 1

Definition at line 174 of file hardware.h.

◆ UHCI_TD_PID_IN

#define UHCI_TD_PID_IN 0x69

Definition at line 169 of file hardware.h.

◆ UHCI_TD_PID_OUT

#define UHCI_TD_PID_OUT 0xE1

Definition at line 170 of file hardware.h.

◆ UHCI_TD_PID_SETUP

#define UHCI_TD_PID_SETUP 0x2D

Definition at line 171 of file hardware.h.

◆ UHCI_TD_STS_ACTIVE

#define UHCI_TD_STS_ACTIVE (1 << 7)

Definition at line 139 of file hardware.h.

◆ UHCI_TD_STS_BABBLE_DETECTED

#define UHCI_TD_STS_BABBLE_DETECTED (1 << 4)

Definition at line 142 of file hardware.h.

◆ UHCI_TD_STS_BITSTUFF_ERROR

#define UHCI_TD_STS_BITSTUFF_ERROR (1 << 1)

Definition at line 145 of file hardware.h.

◆ UHCI_TD_STS_DATA_BUFFER_ERROR

#define UHCI_TD_STS_DATA_BUFFER_ERROR (1 << 5)

Definition at line 141 of file hardware.h.

◆ UHCI_TD_STS_NAK_RECEIVED

#define UHCI_TD_STS_NAK_RECEIVED (1 << 3)

Definition at line 143 of file hardware.h.

◆ UHCI_TD_STS_STALLED

#define UHCI_TD_STS_STALLED (1 << 6)

Definition at line 140 of file hardware.h.

◆ UHCI_TD_STS_TIMEOUT_CRC_ERROR

#define UHCI_TD_STS_TIMEOUT_CRC_ERROR (1 << 2)

Definition at line 144 of file hardware.h.

◆ UHCI_TD_VALID_LENGTH

#define UHCI_TD_VALID_LENGTH 0x4FF

Definition at line 148 of file hardware.h.

◆ UHCI_USB_STATUS_MASK

#define UHCI_USB_STATUS_MASK 0x3F

Definition at line 70 of file hardware.h.

◆ UHCI_USBCMD

#define UHCI_USBCMD 0

Definition at line 12 of file hardware.h.

◆ UHCI_USBINTR

#define UHCI_USBINTR 2

Definition at line 14 of file hardware.h.

◆ UHCI_USBSTS

#define UHCI_USBSTS 1

Definition at line 13 of file hardware.h.

Typedef Documentation

◆ PUHCI_HW_REGISTERS

typedef struct _UHCI_HW_REGISTERS * PUHCI_HW_REGISTERS

◆ PUHCI_QH

typedef struct _UHCI_QH * PUHCI_QH

◆ PUHCI_TD

typedef struct _UHCI_TD * PUHCI_TD

◆ UHCI_CONTROL_STATUS

typedef union _UHCI_CONTROL_STATUS UHCI_CONTROL_STATUS

◆ UHCI_HW_REGISTERS

typedef struct _UHCI_HW_REGISTERS UHCI_HW_REGISTERS

◆ UHCI_INTERRUPT_ENABLE

typedef union _UHCI_INTERRUPT_ENABLE UHCI_INTERRUPT_ENABLE

◆ UHCI_PCI_LEGSUP

typedef union _UHCI_PCI_LEGSUP UHCI_PCI_LEGSUP

◆ UHCI_PORT_STATUS_CONTROL

typedef union _UHCI_PORT_STATUS_CONTROL UHCI_PORT_STATUS_CONTROL

◆ UHCI_QH

typedef struct _UHCI_QH UHCI_QH

◆ UHCI_TD

typedef struct _UHCI_TD UHCI_TD

◆ UHCI_TD_TOKEN

typedef union _UHCI_TD_TOKEN UHCI_TD_TOKEN

◆ UHCI_USB_COMMAND

typedef union _UHCI_USB_COMMAND UHCI_USB_COMMAND

◆ UHCI_USB_STATUS

typedef union _UHCI_USB_STATUS UHCI_USB_STATUS

Function Documentation

◆ C_ASSERT() [1/9]

C_ASSERT ( sizeof(UHCI_CONTROL_STATUS) = =sizeof(ULONG) )

◆ C_ASSERT() [2/9]

C_ASSERT ( sizeof(UHCI_INTERRUPT_ENABLE) = =sizeof(USHORT) )

◆ C_ASSERT() [3/9]

C_ASSERT ( sizeof(UHCI_PCI_LEGSUP) = =sizeof(USHORT) )

◆ C_ASSERT() [4/9]

C_ASSERT ( sizeof(UHCI_PORT_STATUS_CONTROL) = =sizeof(USHORT) )

◆ C_ASSERT() [5/9]

C_ASSERT ( sizeof(UHCI_QH) = =8 )

◆ C_ASSERT() [6/9]

C_ASSERT ( sizeof(UHCI_TD) = =16 )

◆ C_ASSERT() [7/9]

C_ASSERT ( sizeof(UHCI_TD_TOKEN) = =sizeof(ULONG) )

◆ C_ASSERT() [8/9]

C_ASSERT ( sizeof(UHCI_USB_COMMAND) = =sizeof(USHORT) )

◆ C_ASSERT() [9/9]

C_ASSERT ( sizeof(UHCI_USB_STATUS) = =sizeof(USHORT) )

Classes

Macros

Typedefs

Functions