#include <ArchitecturalMsr.h>
Public Attributes | |
| struct { | |
| UINT32 Enable: 1 | |
| UINT32 Reserved1: 29 | |
| UINT32 Lock: 1 | |
| UINT32 DebugOccurred: 1 | |
| UINT32 Reserved2: 32 | |
| } | Bits |
| UINT32 | Uint32 |
| UINT64 | Uint64 |
Detailed Description
MSR information returned for MSR index MSR_IA32_DEBUG_INTERFACE
Definition at line 5809 of file ArchitecturalMsr.h.
Member Data Documentation
◆
| struct { ... } MSR_IA32_DEBUG_INTERFACE_REGISTER::Bits |
Individual bit fields
◆ DebugOccurred
| UINT32 MSR_IA32_DEBUG_INTERFACE_REGISTER::DebugOccurred |
[Bit 31] Debug Occurred (R/O): This "sticky bit" is set by hardware to indicate the status of bit 0. Default is 0. If CPUID.01H:ECX.[11] = 1.
Definition at line 5830 of file ArchitecturalMsr.h.
◆ Enable
| UINT32 MSR_IA32_DEBUG_INTERFACE_REGISTER::Enable |
[Bit 0] Enable (R/W) BIOS set 1 to enable Silicon debug features. Default is 0. If CPUID.01H:ECX.[11] = 1.
Definition at line 5818 of file ArchitecturalMsr.h.
◆ Lock
| UINT32 MSR_IA32_DEBUG_INTERFACE_REGISTER::Lock |
[Bit 30] Lock (R/W): If 1, locks any further change to the MSR. The lock bit is set automatically on the first SMI assertion even if not explicitly set by BIOS. Default is 0. If CPUID.01H:ECX.[11] = 1.
Definition at line 5825 of file ArchitecturalMsr.h.
◆ Reserved1
| UINT32 MSR_IA32_DEBUG_INTERFACE_REGISTER::Reserved1 |
Definition at line 5819 of file ArchitecturalMsr.h.
◆ Reserved2
| UINT32 MSR_IA32_DEBUG_INTERFACE_REGISTER::Reserved2 |
Definition at line 5831 of file ArchitecturalMsr.h.
◆ Uint32
| UINT32 MSR_IA32_DEBUG_INTERFACE_REGISTER::Uint32 |
All bit fields as a 32-bit value
Definition at line 5836 of file ArchitecturalMsr.h.
◆ Uint64
| UINT64 MSR_IA32_DEBUG_INTERFACE_REGISTER::Uint64 |
All bit fields as a 64-bit value
Definition at line 5840 of file ArchitecturalMsr.h.
The documentation for this union was generated from the following file:
- sdk/include/reactos/x86x64/Intel/ArchitecturalMsr.h
