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Examples
legacy.c
Go to the documentation of this file.
1
/*
2
* COPYRIGHT: See COPYING in the top level directory
3
* PROJECT: Serial port driver
4
* FILE: drivers/bus/serial/legacy.c
5
* PURPOSE: Legacy serial port enumeration
6
*
7
* PROGRAMMERS: Herv� Poussineau (hpoussin@reactos.org)
8
* Mark Junker (mjscod@gmx.de)
9
*/
10
11
#include "
serial.h
"
12
13
#include <debug.h>
14
15
UART_TYPE
16
SerialDetectUartType
(
17
IN
PUCHAR
BaseAddress
)
18
{
19
UCHAR
Lcr, TestLcr;
20
UCHAR
OldScr, Scr5A, ScrA5;
21
BOOLEAN
FifoEnabled
;
22
UCHAR
NewFifoStatus;
23
24
Lcr =
READ_PORT_UCHAR
(
SER_LCR
(
BaseAddress
));
25
WRITE_PORT_UCHAR
(
SER_LCR
(
BaseAddress
), Lcr ^ 0xFF);
26
TestLcr =
READ_PORT_UCHAR
(
SER_LCR
(
BaseAddress
)) ^ 0xFF;
27
WRITE_PORT_UCHAR
(
SER_LCR
(
BaseAddress
), Lcr);
28
29
/* Accessing the LCR must work for a usable serial port */
30
if
(TestLcr != Lcr)
31
return
UartUnknown
;
32
33
/* Ensure that all following accesses are done as required */
34
READ_PORT_UCHAR
(
SER_RBR
(
BaseAddress
));
35
READ_PORT_UCHAR
(
SER_IER
(
BaseAddress
));
36
READ_PORT_UCHAR
(
SER_IIR
(
BaseAddress
));
37
READ_PORT_UCHAR
(
SER_LCR
(
BaseAddress
));
38
READ_PORT_UCHAR
(
SER_MCR
(
BaseAddress
));
39
READ_PORT_UCHAR
(
SER_LSR
(
BaseAddress
));
40
READ_PORT_UCHAR
(
SER_MSR
(
BaseAddress
));
41
READ_PORT_UCHAR
(
SER_SCR
(
BaseAddress
));
42
43
/* Test scratch pad */
44
OldScr =
READ_PORT_UCHAR
(
SER_SCR
(
BaseAddress
));
45
WRITE_PORT_UCHAR
(
SER_SCR
(
BaseAddress
), 0x5A);
46
Scr5A =
READ_PORT_UCHAR
(
SER_SCR
(
BaseAddress
));
47
WRITE_PORT_UCHAR
(
SER_SCR
(
BaseAddress
), 0xA5);
48
ScrA5 =
READ_PORT_UCHAR
(
SER_SCR
(
BaseAddress
));
49
WRITE_PORT_UCHAR
(
SER_SCR
(
BaseAddress
), OldScr);
50
51
/* When non-functional, we have a 8250 */
52
if
(Scr5A != 0x5A || ScrA5 != 0xA5)
53
return
Uart8250
;
54
55
/* Test FIFO type */
56
FifoEnabled
= (
READ_PORT_UCHAR
(
SER_IIR
(
BaseAddress
)) & 0x80) != 0;
57
WRITE_PORT_UCHAR
(
SER_FCR
(
BaseAddress
),
SR_FCR_ENABLE_FIFO
);
58
NewFifoStatus =
READ_PORT_UCHAR
(
SER_IIR
(
BaseAddress
)) & 0xC0;
59
if
(!
FifoEnabled
)
60
WRITE_PORT_UCHAR
(
SER_FCR
(
BaseAddress
), 0);
61
switch
(NewFifoStatus)
62
{
63
case
0x00:
64
return
Uart16450
;
65
case
0x40:
66
case
0x80:
67
/* Not sure about this but the documentation says that 0x40
68
* indicates an unusable FIFO but my tests only worked
69
* with 0x80 */
70
return
Uart16550
;
71
}
72
73
/* FIFO is only functional for 16550A+ */
74
return
Uart16550A
;
75
}
BOOLEAN
unsigned char BOOLEAN
Definition:
ProcessorBind.h:185
FifoEnabled
BOOLEAN FifoEnabled
Definition:
cport_pc98.c:29
SerialDetectUartType
UART_TYPE SerialDetectUartType(IN PUCHAR BaseAddress)
Definition:
legacy.c:16
UART_TYPE
UART_TYPE
Definition:
serial.h:30
Uart16550
@ Uart16550
Definition:
serial.h:34
Uart16550A
@ Uart16550A
Definition:
serial.h:35
UartUnknown
@ UartUnknown
Definition:
serial.h:31
Uart16450
@ Uart16450
Definition:
serial.h:33
Uart8250
@ Uart8250
Definition:
serial.h:32
SER_SCR
#define SER_SCR(x)
Definition:
serial.h:170
SER_MSR
#define SER_MSR(x)
Definition:
serial.h:161
SR_FCR_ENABLE_FIFO
#define SR_FCR_ENABLE_FIFO
Definition:
serial.h:128
SER_IIR
#define SER_IIR(x)
Definition:
serial.h:120
SER_FCR
#define SER_FCR(x)
Definition:
serial.h:127
SER_IER
#define SER_IER(x)
Definition:
serial.h:112
SER_RBR
#define SER_RBR(x)
Definition:
serial.h:109
SER_MCR
#define SER_MCR(x)
Definition:
serial.h:149
SER_LCR
#define SER_LCR(x)
Definition:
serial.h:135
SER_LSR
#define SER_LSR(x)
Definition:
serial.h:152
BaseAddress
_In_ HANDLE _Outptr_result_bytebuffer_ ViewSize PVOID * BaseAddress
Definition:
mmfuncs.h:404
READ_PORT_UCHAR
#define READ_PORT_UCHAR(p)
Definition:
pc98vid.h:22
WRITE_PORT_UCHAR
#define WRITE_PORT_UCHAR(p, d)
Definition:
pc98vid.h:21
serial.h
IN
#define IN
Definition:
typedefs.h:39
PUCHAR
unsigned char * PUCHAR
Definition:
typedefs.h:53
UCHAR
unsigned char UCHAR
Definition:
xmlstorage.h:181
drivers
serial
serial
legacy.c
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