ReactOS 0.4.15-dev-8344-g0574987

#include <Cpuid.h>

Collaboration diagram for CPUID_CACHE_PARAMS_EAX:

Public Attributes

struct {
   UINT32   CacheType: 5
   UINT32   CacheLevel: 3
   UINT32   SelfInitializingCache: 1
   UINT32   FullyAssociativeCache: 1
   UINT32   Reserved: 4
   UINT32   MaximumAddressableIdsForLogicalProcessors: 12
   UINT32   MaximumAddressableIdsForProcessorCores: 6
UINT32 Uint32

Detailed Description

CPUID Cache Parameters Information returned in EAX for CPUID leaf CPUID_CACHE_PARAMS.

Definition at line 808 of file Cpuid.h.

Member Data Documentation


struct { ... } CPUID_CACHE_PARAMS_EAX::Bits

Individual bit fields

◆ CacheLevel


[Bits 7:5] Cache level (Starts at 1).

Definition at line 821 of file Cpuid.h.

◆ CacheType


[Bits 4:0] Cache type field. If CPUID_CACHE_PARAMS_CACHE_TYPE_NULL, then there is no information for the requested cache level.

Definition at line 817 of file Cpuid.h.

◆ FullyAssociativeCache

UINT32 CPUID_CACHE_PARAMS_EAX::FullyAssociativeCache

[Bit 9] Fully Associative cache.

Definition at line 829 of file Cpuid.h.

◆ MaximumAddressableIdsForLogicalProcessors

UINT32 CPUID_CACHE_PARAMS_EAX::MaximumAddressableIdsForLogicalProcessors

[Bits 25:14] Maximum number of addressable IDs for logical processors sharing this cache.

Add one to the return value to get the result. The nearest power-of-2 integer that is not smaller than (1 + EAX[25:14]) is the number of unique initial APIC IDs reserved for addressing different logical processors sharing this cache.

Definition at line 843 of file Cpuid.h.

◆ MaximumAddressableIdsForProcessorCores

UINT32 CPUID_CACHE_PARAMS_EAX::MaximumAddressableIdsForProcessorCores

[Bits 31:26] Maximum number of addressable IDs for processor cores in the physical package.

The nearest power-of-2 integer that is not smaller than (1 + EAX[31:26]) is the number of unique Core_IDs reserved for addressing different processor cores in a physical package. Core ID is a subset of bits of the initial APIC ID. The returned value is constant for valid initial values in ECX. Valid ECX values start from 0.

Definition at line 855 of file Cpuid.h.

◆ Reserved


[Bits 13:10] Reserved.

Definition at line 833 of file Cpuid.h.

◆ SelfInitializingCache

UINT32 CPUID_CACHE_PARAMS_EAX::SelfInitializingCache

[Bit 8] Self Initializing cache level (does not need SW initialization).

Definition at line 825 of file Cpuid.h.

◆ Uint32


All bit fields as a 32-bit value

Definition at line 860 of file Cpuid.h.

The documentation for this union was generated from the following file: