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◆ EHCI_ASYNCLISTBASE
◆ EHCI_CONFIG_FLAG_CONFIGURED
| #define EHCI_CONFIG_FLAG_CONFIGURED 1 |
◆ EHCI_CONFIGFLAG
◆ EHCI_CTRLDSSEGMENT
◆ EHCI_FLADJ_PCI_CONFIG_OFFSET
| #define EHCI_FLADJ_PCI_CONFIG_OFFSET 0x61 |
◆ EHCI_FRAME_LIST_MAX_ENTRIES
| #define EHCI_FRAME_LIST_MAX_ENTRIES 1024 |
◆ EHCI_FRINDEX
◆ EHCI_FRINDEX_FRAME_MASK
| #define EHCI_FRINDEX_FRAME_MASK 0x7FF |
◆ EHCI_FRINDEX_INDEX_MASK
| #define EHCI_FRINDEX_INDEX_MASK 0x3FF |
◆ EHCI_INTERRUPT_MASK
| #define EHCI_INTERRUPT_MASK 0x3F |
◆ EHCI_LINE_STATUS_K_STATE_LOW_SPEED
| #define EHCI_LINE_STATUS_K_STATE_LOW_SPEED 1 |
◆ EHCI_LINK_TYPE_FSTN
◆ EHCI_LINK_TYPE_iTD
◆ EHCI_LINK_TYPE_QH
◆ EHCI_LINK_TYPE_siTD
◆ EHCI_MAX_QTD_BUFFER_PAGES
| #define EHCI_MAX_QTD_BUFFER_PAGES 5 |
◆ EHCI_PERIODICLISTBASE
| #define EHCI_PERIODICLISTBASE 5 |
◆ EHCI_PORT_OWNER_COMPANION_CONTROLLER
| #define EHCI_PORT_OWNER_COMPANION_CONTROLLER 1 |
◆ EHCI_PORTSC
◆ EHCI_QH_EP_FULL_SPEED
| #define EHCI_QH_EP_FULL_SPEED 0 |
◆ EHCI_QH_EP_HIGH_SPEED
| #define EHCI_QH_EP_HIGH_SPEED 2 |
◆ EHCI_QH_EP_LOW_SPEED
| #define EHCI_QH_EP_LOW_SPEED 1 |
◆ EHCI_TD_TOKEN_PID_IN
| #define EHCI_TD_TOKEN_PID_IN 1 |
◆ EHCI_TD_TOKEN_PID_OUT
| #define EHCI_TD_TOKEN_PID_OUT 0 |
◆ EHCI_TD_TOKEN_PID_RESERVED
| #define EHCI_TD_TOKEN_PID_RESERVED 3 |
◆ EHCI_TD_TOKEN_PID_SETUP
| #define EHCI_TD_TOKEN_PID_SETUP 2 |
◆ EHCI_TOKEN_STATUS_ACTIVE
| #define EHCI_TOKEN_STATUS_ACTIVE (1 << 7) |
◆ EHCI_TOKEN_STATUS_BABBLE_DETECTED
| #define EHCI_TOKEN_STATUS_BABBLE_DETECTED (1 << 4) |
◆ EHCI_TOKEN_STATUS_DATA_BUFFER_ERROR
| #define EHCI_TOKEN_STATUS_DATA_BUFFER_ERROR (1 << 5) |
◆ EHCI_TOKEN_STATUS_HALTED
| #define EHCI_TOKEN_STATUS_HALTED (1 << 6) |
◆ EHCI_TOKEN_STATUS_MISSED_MICROFRAME
| #define EHCI_TOKEN_STATUS_MISSED_MICROFRAME (1 << 2) |
◆ EHCI_TOKEN_STATUS_PING_STATE
| #define EHCI_TOKEN_STATUS_PING_STATE (1 << 0) |
◆ EHCI_TOKEN_STATUS_SPLIT_STATE
| #define EHCI_TOKEN_STATUS_SPLIT_STATE (1 << 1) |
◆ EHCI_TOKEN_STATUS_TRANSACTION_ERROR
| #define EHCI_TOKEN_STATUS_TRANSACTION_ERROR (1 << 3) |
◆ EHCI_USBCMD
◆ EHCI_USBINTR
◆ EHCI_USBSTS
◆ LINK_POINTER_MASK
| #define LINK_POINTER_MASK 0xFFFFFFE0 |
◆ TERMINATE_POINTER
◆ EHCI_FS_ENDPOINT_PARAMS
◆ EHCI_HC_CAPABILITY_PARAMS
◆ EHCI_HC_CAPABILITY_REGISTERS
◆ EHCI_HC_STRUCTURAL_PARAMS
◆ EHCI_HW_REGISTERS
◆ EHCI_INTERRUPT_ENABLE
◆ EHCI_ISOCHRONOUS_TD
◆ EHCI_LEGACY_EXTENDED_CAPABILITY
◆ EHCI_LINK_POINTER
◆ EHCI_MICROFRAME_CONTROL
◆ EHCI_PORT_STATUS_CONTROL
◆ EHCI_QH_EP_CAPS
◆ EHCI_QH_EP_PARAMS
◆ EHCI_QUEUE_HEAD
◆ EHCI_QUEUE_TD
◆ EHCI_SPLIT_BUFFER_POINTER
◆ EHCI_SPLIT_ISOCHRONOUS_TD
◆ EHCI_SPLIT_TRANSFER_STATE
◆ EHCI_TD_TOKEN
◆ EHCI_TRANSACTION_BUFFER
◆ EHCI_TRANSACTION_CONTROL
◆ EHCI_USB_COMMAND
◆ EHCI_USB_STATUS
◆ PEHCI_HC_CAPABILITY_REGISTERS
◆ PEHCI_HW_REGISTERS
◆ PEHCI_ISOCHRONOUS_TD
◆ PEHCI_QUEUE_HEAD
◆ PEHCI_QUEUE_TD
◆ PEHCI_SPLIT_ISOCHRONOUS_TD
◆ PEHCI_TD_TOKEN
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