ReactOS 0.4.15-dev-8127-g6338913
hardware.h
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1/*
2 * PROJECT: ReactOS USB EHCI Miniport Driver
3 * LICENSE: GPL-2.0+ (https://spdx.org/licenses/GPL-2.0+)
4 * PURPOSE: USBEHCI hardware declarations
5 * COPYRIGHT: Copyright 2017-2018 Vadim Galyant <vgal@rambler.ru>
6 */
7
8#define EHCI_FRAME_LIST_MAX_ENTRIES 1024 // Number of frames in Frame List
9
10/* EHCI hardware registers */
11#define EHCI_USBCMD 0
12#define EHCI_USBSTS 1
13#define EHCI_USBINTR 2
14#define EHCI_FRINDEX 3
15#define EHCI_CTRLDSSEGMENT 4
16#define EHCI_PERIODICLISTBASE 5
17#define EHCI_ASYNCLISTBASE 6
18#define EHCI_CONFIGFLAG 16
19#define EHCI_PORTSC 17
20
21#define EHCI_FLADJ_PCI_CONFIG_OFFSET 0x61
22
24 struct {
31 };
34
36
38 struct {
47 ULONG DebugPortNumber : 4; //Optional
49 };
52
54
56 struct {
64 };
67
69
78
79typedef union _EHCI_USB_COMMAND {
80 struct {
87 ULONG LightResetHC : 1; // optional
94 };
97
98C_ASSERT(sizeof(EHCI_USB_COMMAND) == sizeof(ULONG));
99
100typedef union _EHCI_USB_STATUS {
101 struct {
114 };
117
118C_ASSERT(sizeof(EHCI_USB_STATUS) == sizeof(ULONG));
119
120#define EHCI_INTERRUPT_MASK 0x3F
121
123 struct {
131 };
134
136
137#define EHCI_LINE_STATUS_K_STATE_LOW_SPEED 1
138#define EHCI_PORT_OWNER_COMPANION_CONTROLLER 1
139
141 struct {
161 };
164
166
167/* FRINDEX Frame Index Register */
168#define EHCI_FRINDEX_FRAME_MASK 0x7FF
169#define EHCI_FRINDEX_INDEX_MASK 0x3FF
170
171#define EHCI_CONFIG_FLAG_CONFIGURED 1
172
173typedef struct _EHCI_HW_REGISTERS {
174 EHCI_USB_COMMAND HcCommand; // RO, R/W (field dependent), WO
175 EHCI_USB_STATUS HcStatus; // RO, R/W, R/WC, (field dependent)
177 ULONG FrameIndex; // R/W (Writes must be DWord Writes)
178 ULONG SegmentSelector; // R/W (Writes must be DWord Writes)
179 ULONG PeriodicListBase; // R/W (Writes must be DWord Writes)
180 ULONG AsyncListBase; // Read/Write (Writes must be DWord Writes)
183 EHCI_PORT_STATUS_CONTROL PortControl[15]; // (1-15) RO, R/W, R/WC (field dependent)
185
186/* Link Pointer */
187#define EHCI_LINK_TYPE_iTD 0 // isochronous transfer descriptor
188#define EHCI_LINK_TYPE_QH 1 // queue head
189#define EHCI_LINK_TYPE_siTD 2 // split transaction isochronous transfer
190#define EHCI_LINK_TYPE_FSTN 3 // frame span traversal node
191
192/* Used for QHs and qTDs to mark Pointers as the end */
193#define TERMINATE_POINTER 1
194
195#define LINK_POINTER_MASK 0xFFFFFFE0
196
197typedef union _EHCI_LINK_POINTER {
198 struct {
203 };
206
207C_ASSERT(sizeof(EHCI_LINK_POINTER) == sizeof(ULONG));
208
209/* Isochronous (High-Speed) Transfer Descriptor (iTD) */
211 struct {
217 };
220
222
224 struct {
229 };
230 struct {
234 };
235 struct {
239 };
240 struct {
243 };
246
248
249typedef struct _EHCI_ISOCHRONOUS_TD { // must be aligned on a 32-byte boundary
255
257
258/* Split Transaction Isochronous Transfer Descriptor (siTD) */
260 struct {
269 };
272
274
276 struct {
280 };
283
285
287 struct {
294 };
297
299
301 struct {
304 };
305 struct {
310 };
313
315
316typedef struct _EHCI_SPLIT_ISOCHRONOUS_TD { // must be aligned on a 32-byte boundary
325
327
328/* Queue Element Transfer Descriptor (qTD) */
329#define EHCI_MAX_QTD_BUFFER_PAGES 5
330
331#define EHCI_TOKEN_STATUS_ACTIVE (1 << 7)
332#define EHCI_TOKEN_STATUS_HALTED (1 << 6)
333#define EHCI_TOKEN_STATUS_DATA_BUFFER_ERROR (1 << 5)
334#define EHCI_TOKEN_STATUS_BABBLE_DETECTED (1 << 4)
335#define EHCI_TOKEN_STATUS_TRANSACTION_ERROR (1 << 3)
336#define EHCI_TOKEN_STATUS_MISSED_MICROFRAME (1 << 2)
337#define EHCI_TOKEN_STATUS_SPLIT_STATE (1 << 1)
338#define EHCI_TOKEN_STATUS_PING_STATE (1 << 0)
339
340#define EHCI_TD_TOKEN_PID_OUT 0
341#define EHCI_TD_TOKEN_PID_IN 1
342#define EHCI_TD_TOKEN_PID_SETUP 2
343#define EHCI_TD_TOKEN_PID_RESERVED 3
344
345typedef union _EHCI_TD_TOKEN {
346 struct {
354 };
357
358C_ASSERT(sizeof(EHCI_TD_TOKEN) == sizeof(ULONG));
359
360typedef struct _EHCI_QUEUE_TD { // must be aligned on 32-byte boundaries
367
368C_ASSERT(sizeof(EHCI_QUEUE_TD) == 52);
369
370/* Queue Head */
371#define EHCI_QH_EP_FULL_SPEED 0
372#define EHCI_QH_EP_LOW_SPEED 1
373#define EHCI_QH_EP_HIGH_SPEED 2
374
375typedef union _EHCI_QH_EP_PARAMS {
376 struct {
383 ULONG MaximumPacketLength : 11; // corresponds to the maximum packet size of the associated endpoint (wMaxPacketSize).
386 };
389
390C_ASSERT(sizeof(EHCI_QH_EP_PARAMS) == sizeof(ULONG));
391
392typedef union _EHCI_QH_EP_CAPS {
393 struct {
399 };
402
403C_ASSERT(sizeof(EHCI_QH_EP_CAPS) == sizeof(ULONG));
404
405typedef struct _EHCI_QUEUE_HEAD { // must be aligned on 32-byte boundaries
416
Definition: bufpool.h:45
union _EHCI_USB_STATUS EHCI_USB_STATUS
union _EHCI_LINK_POINTER EHCI_LINK_POINTER
struct _EHCI_QUEUE_HEAD EHCI_QUEUE_HEAD
union _EHCI_HC_CAPABILITY_PARAMS EHCI_HC_CAPABILITY_PARAMS
union _EHCI_TRANSACTION_CONTROL EHCI_TRANSACTION_CONTROL
union _EHCI_FS_ENDPOINT_PARAMS EHCI_FS_ENDPOINT_PARAMS
union _EHCI_PORT_STATUS_CONTROL EHCI_PORT_STATUS_CONTROL
union _EHCI_SPLIT_TRANSFER_STATE EHCI_SPLIT_TRANSFER_STATE
union _EHCI_LEGACY_EXTENDED_CAPABILITY EHCI_LEGACY_EXTENDED_CAPABILITY
union _EHCI_QH_EP_CAPS EHCI_QH_EP_CAPS
union _EHCI_TD_TOKEN * PEHCI_TD_TOKEN
union _EHCI_TD_TOKEN EHCI_TD_TOKEN
union _EHCI_USB_COMMAND EHCI_USB_COMMAND
struct _EHCI_QUEUE_TD EHCI_QUEUE_TD
union _EHCI_INTERRUPT_ENABLE EHCI_INTERRUPT_ENABLE
union _EHCI_QH_EP_PARAMS EHCI_QH_EP_PARAMS
struct _EHCI_HC_CAPABILITY_REGISTERS EHCI_HC_CAPABILITY_REGISTERS
struct _EHCI_QUEUE_TD * PEHCI_QUEUE_TD
struct _EHCI_ISOCHRONOUS_TD EHCI_ISOCHRONOUS_TD
struct _EHCI_HW_REGISTERS EHCI_HW_REGISTERS
struct _EHCI_ISOCHRONOUS_TD * PEHCI_ISOCHRONOUS_TD
struct _EHCI_SPLIT_ISOCHRONOUS_TD EHCI_SPLIT_ISOCHRONOUS_TD
struct _EHCI_QUEUE_HEAD * PEHCI_QUEUE_HEAD
union _EHCI_MICROFRAME_CONTROL EHCI_MICROFRAME_CONTROL
struct _EHCI_HC_CAPABILITY_REGISTERS * PEHCI_HC_CAPABILITY_REGISTERS
union _EHCI_TRANSACTION_BUFFER EHCI_TRANSACTION_BUFFER
union _EHCI_HC_STRUCTURAL_PARAMS EHCI_HC_STRUCTURAL_PARAMS
union _EHCI_SPLIT_BUFFER_POINTER EHCI_SPLIT_BUFFER_POINTER
struct _EHCI_HW_REGISTERS * PEHCI_HW_REGISTERS
struct _EHCI_SPLIT_ISOCHRONOUS_TD * PEHCI_SPLIT_ISOCHRONOUS_TD
#define C_ASSERT(e)
Definition: intsafe.h:73
unsigned short USHORT
Definition: pedump.c:61
EHCI_HC_CAPABILITY_PARAMS CapParameters
Definition: hardware.h:75
EHCI_HC_STRUCTURAL_PARAMS StructParameters
Definition: hardware.h:74
ULONG SegmentSelector
Definition: hardware.h:178
EHCI_USB_COMMAND HcCommand
Definition: hardware.h:174
EHCI_INTERRUPT_ENABLE HcInterruptEnable
Definition: hardware.h:176
EHCI_USB_STATUS HcStatus
Definition: hardware.h:175
EHCI_PORT_STATUS_CONTROL PortControl[15]
Definition: hardware.h:183
ULONG PeriodicListBase
Definition: hardware.h:179
ULONG ExtendedBuffer[7]
Definition: hardware.h:253
EHCI_LINK_POINTER NextLink
Definition: hardware.h:250
EHCI_LINK_POINTER HorizontalLink
Definition: hardware.h:406
EHCI_QH_EP_PARAMS EndpointParams
Definition: hardware.h:407
EHCI_TD_TOKEN Token
Definition: hardware.h:412
ULONG AlternateNextTD
Definition: hardware.h:411
EHCI_QH_EP_CAPS EndpointCaps
Definition: hardware.h:408
ULONG ExtendedBuffer[5]
Definition: hardware.h:414
ULONG AlternateNextTD
Definition: hardware.h:362
ULONG NextTD
Definition: hardware.h:361
EHCI_TD_TOKEN Token
Definition: hardware.h:363
ULONG ExtendedBuffer[5]
Definition: hardware.h:365
EHCI_LINK_POINTER NextLink
Definition: hardware.h:317
EHCI_MICROFRAME_CONTROL MicroFrameControl
Definition: hardware.h:319
EHCI_SPLIT_TRANSFER_STATE TransferState
Definition: hardware.h:320
EHCI_FS_ENDPOINT_PARAMS EndpointCharacteristics
Definition: hardware.h:318
uint32_t ULONG
Definition: typedefs.h:59
ULONG InterruptOnAsyncAdvance
Definition: hardware.h:129
ULONG InterruptMask
Definition: hardware.h:394
ULONG PortNumber
Definition: hardware.h:397
ULONG SplitCompletionMask
Definition: hardware.h:395
ULONG PipeMultiplier
Definition: hardware.h:398
ULONG InactivateOnNextTransaction
Definition: hardware.h:378
ULONG DataToggleControl
Definition: hardware.h:381
ULONG EndpointNumber
Definition: hardware.h:379
ULONG ControlEndpointFlag
Definition: hardware.h:384
ULONG MaximumPacketLength
Definition: hardware.h:383
ULONG NakCountReload
Definition: hardware.h:385
ULONG HeadReclamationListFlag
Definition: hardware.h:382
ULONG Status
Definition: hardware.h:347
ULONG AsULONG
Definition: hardware.h:355
ULONG CurrentPage
Definition: hardware.h:350
ULONG TransferBytes
Definition: hardware.h:352
ULONG PIDCode
Definition: hardware.h:348
ULONG ErrorCounter
Definition: hardware.h:349
ULONG InterruptOnComplete
Definition: hardware.h:351
ULONG DataToggle
Definition: hardware.h:353
ULONG PeriodicEnable
Definition: hardware.h:84
ULONG FrameListSize
Definition: hardware.h:83
ULONG LightResetHC
Definition: hardware.h:87
ULONG AsynchronousEnable
Definition: hardware.h:85
ULONG InterruptThreshold
Definition: hardware.h:92
ULONG AsynchronousParkModeEnable
Definition: hardware.h:90
ULONG AsynchronousParkModeCount
Definition: hardware.h:88
ULONG InterruptAdvanceDoorbell
Definition: hardware.h:86
ULONG InterruptOnAsyncAdvance
Definition: hardware.h:107
ULONG ErrorInterrupt
Definition: hardware.h:103
ULONG PeriodicStatus
Definition: hardware.h:111
ULONG PortChangeDetect
Definition: hardware.h:104
ULONG Reclamation
Definition: hardware.h:110
ULONG HostSystemError
Definition: hardware.h:106
ULONG AsynchronousStatus
Definition: hardware.h:112
ULONG FrameListRollover
Definition: hardware.h:105
_Reserved_ PVOID Reserved
Definition: winddi.h:3974
unsigned char UCHAR
Definition: xmlstorage.h:181